Merge branch 'master' into vulkan
This commit is contained in:
commit
962f7daeb2
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@ -4604,11 +4604,8 @@ void D3D12RenderTargetCache::PerformTransfersAndResolveClears(
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dest_rt_key.pitch_tiles_at_32bpp;
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dest_rt_key.pitch_tiles_at_32bpp;
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host_depth_store_render_target_constant.resolution_scale =
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host_depth_store_render_target_constant.resolution_scale =
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resolution_scale_;
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resolution_scale_;
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host_depth_store_render_target_constant.second_sample_index =
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host_depth_store_render_target_constant.msaa_2x_supported =
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(dest_rt_key.msaa_samples == xenos::MsaaSamples::k2X &&
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uint32_t(msaa_2x_supported_);
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!msaa_2x_supported_)
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? 3
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: 1;
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command_list.D3DSetComputeRoot32BitConstants(
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command_list.D3DSetComputeRoot32BitConstants(
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kHostDepthStoreRootParameterRenderTargetConstant,
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kHostDepthStoreRootParameterRenderTargetConstant,
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sizeof(host_depth_store_render_target_constant) / sizeof(uint32_t),
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sizeof(host_depth_store_render_target_constant) / sizeof(uint32_t),
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@ -536,8 +536,8 @@ class D3D12RenderTargetCache final : public RenderTargetCache {
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uint32_t pitch_tiles : xenos::kEdramPitchTilesBits;
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uint32_t pitch_tiles : xenos::kEdramPitchTilesBits;
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// 1 to 3.
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// 1 to 3.
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uint32_t resolution_scale : 2;
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uint32_t resolution_scale : 2;
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// For native 2x MSAA vs. 2x over 4x.
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// Whether 2x MSAA is supported natively rather than through 4x.
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uint32_t second_sample_index : 2;
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uint32_t msaa_2x_supported : 1;
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};
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};
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uint32_t constant = 0;
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uint32_t constant = 0;
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};
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};
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@ -801,10 +801,10 @@ bool RenderTargetCache::Update(bool is_rasterization_done,
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uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets(
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uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets(
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bool distinguish_gamma_formats,
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bool distinguish_gamma_formats,
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uint32_t* depth_and_color_resource_formats_out) const {
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uint32_t* depth_and_color_formats_out) const {
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if (GetPath() != Path::kHostRenderTargets) {
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if (GetPath() != Path::kHostRenderTargets) {
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if (depth_and_color_resource_formats_out) {
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if (depth_and_color_formats_out) {
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std::memset(depth_and_color_resource_formats_out, 0,
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std::memset(depth_and_color_formats_out, 0,
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sizeof(uint32_t) * (1 + xenos::kMaxColorRenderTargets));
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sizeof(uint32_t) * (1 + xenos::kMaxColorRenderTargets));
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}
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}
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return 0;
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return 0;
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@ -814,14 +814,14 @@ uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets(
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const RenderTarget* render_target =
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const RenderTarget* render_target =
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last_update_accumulated_render_targets_[i];
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last_update_accumulated_render_targets_[i];
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if (!render_target) {
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if (!render_target) {
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if (depth_and_color_resource_formats_out) {
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if (depth_and_color_formats_out) {
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depth_and_color_resource_formats_out[i] = 0;
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depth_and_color_formats_out[i] = 0;
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}
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}
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continue;
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continue;
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}
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}
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rts_used |= uint32_t(1) << i;
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rts_used |= uint32_t(1) << i;
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if (depth_and_color_resource_formats_out) {
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if (depth_and_color_formats_out) {
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depth_and_color_resource_formats_out[i] =
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depth_and_color_formats_out[i] =
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(distinguish_gamma_formats && i &&
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(distinguish_gamma_formats && i &&
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(last_update_accumulated_color_targets_are_gamma_ &
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(last_update_accumulated_color_targets_are_gamma_ &
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(uint32_t(1) << (i - 1))))
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(uint32_t(1) << (i - 1))))
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@ -77,8 +77,9 @@ imul null, r0.w, r2.z, r2.x
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imad r0.y, r0.z, r2.x, r0.y
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imad r0.y, r0.z, r2.x, r0.y
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imad r0.x, r0.x, r0.w, r0.y
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imad r0.x, r0.x, r0.w, r0.y
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ushr r0.x, r0.x, l(2)
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ushr r0.x, r0.x, l(2)
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ubfe r0.y, l(2), l(12), CB1[1][0].x
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ubfe r0.y, l(1), l(12), CB1[1][0].x
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movc r0.y, r2.y, r0.y, l(0)
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movc r0.zw, r2.yyyy, l(0,0,0,3), l(0,0,1,0)
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movc r0.y, r0.y, r0.z, r0.w
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mov r1.w, l(0)
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mov r1.w, l(0)
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ldms r2.x, r1.xyww, T0[0].xyzw, r0.y
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ldms r2.x, r1.xyww, T0[0].xyzw, r0.y
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iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0)
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iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0)
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@ -106,20 +107,20 @@ mov r1.zw, l(0,0,0,0)
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ldms r2.w, r1.xyzw, T0[0].yzwx, r0.y
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ldms r2.w, r1.xyzw, T0[0].yzwx, r0.y
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store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw
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store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw
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ret
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ret
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// Approximately 55 instruction slots used
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// Approximately 56 instruction slots used
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#endif
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#endif
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const BYTE host_depth_store_2xmsaa_cs[] =
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const BYTE host_depth_store_2xmsaa_cs[] =
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{
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{
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68, 88, 66, 67, 70, 151,
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68, 88, 66, 67, 15, 231,
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47, 41, 106, 214, 147, 230,
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223, 186, 190, 135, 229, 39,
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77, 220, 169, 203, 166, 115,
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211, 185, 26, 121, 39, 17,
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42, 93, 1, 0, 0, 0,
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25, 229, 1, 0, 0, 0,
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248, 10, 0, 0, 5, 0,
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52, 11, 0, 0, 5, 0,
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0, 0, 52, 0, 0, 0,
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0, 0, 52, 0, 0, 0,
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172, 2, 0, 0, 188, 2,
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172, 2, 0, 0, 188, 2,
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0, 0, 204, 2, 0, 0,
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0, 0, 204, 2, 0, 0,
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92, 10, 0, 0, 82, 68,
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152, 10, 0, 0, 82, 68,
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69, 70, 112, 2, 0, 0,
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69, 70, 112, 2, 0, 0,
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2, 0, 0, 0, 92, 1,
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2, 0, 0, 0, 92, 1,
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0, 0, 4, 0, 0, 0,
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0, 0, 4, 0, 0, 0,
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@ -231,8 +232,8 @@ const BYTE host_depth_store_2xmsaa_cs[] =
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71, 78, 8, 0, 0, 0,
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71, 78, 8, 0, 0, 0,
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0, 0, 0, 0, 8, 0,
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0, 0, 0, 0, 8, 0,
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0, 0, 83, 72, 69, 88,
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0, 0, 83, 72, 69, 88,
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136, 7, 0, 0, 81, 0,
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196, 7, 0, 0, 81, 0,
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5, 0, 226, 1, 0, 0,
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5, 0, 241, 1, 0, 0,
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106, 8, 0, 1, 89, 0,
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106, 8, 0, 1, 89, 0,
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0, 7, 70, 142, 48, 0,
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0, 7, 70, 142, 48, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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@ -395,17 +396,27 @@ const BYTE host_depth_store_2xmsaa_cs[] =
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0, 0, 2, 0, 0, 0,
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0, 0, 2, 0, 0, 0,
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138, 0, 0, 11, 34, 0,
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138, 0, 0, 11, 34, 0,
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16, 0, 0, 0, 0, 0,
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16, 0, 0, 0, 0, 0,
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1, 64, 0, 0, 2, 0,
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1, 64, 0, 0, 1, 0,
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0, 0, 1, 64, 0, 0,
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0, 0, 1, 64, 0, 0,
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12, 0, 0, 0, 10, 128,
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12, 0, 0, 0, 10, 128,
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48, 0, 1, 0, 0, 0,
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48, 0, 1, 0, 0, 0,
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1, 0, 0, 0, 0, 0,
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0, 0, 55, 0, 0, 15,
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194, 0, 16, 0, 0, 0,
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0, 0, 86, 5, 16, 0,
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2, 0, 0, 0, 2, 64,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 3, 0, 0, 0,
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2, 64, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0,
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0, 0, 55, 0, 0, 9,
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0, 0, 55, 0, 0, 9,
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34, 0, 16, 0, 0, 0,
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34, 0, 16, 0, 0, 0,
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0, 0, 26, 0, 16, 0,
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0, 0, 26, 0, 16, 0,
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2, 0, 0, 0, 26, 0,
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0, 0, 0, 0, 42, 0,
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16, 0, 0, 0, 0, 0,
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16, 0, 0, 0, 0, 0,
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1, 64, 0, 0, 0, 0,
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58, 0, 16, 0, 0, 0,
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0, 0, 54, 0, 0, 5,
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0, 0, 54, 0, 0, 5,
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130, 0, 16, 0, 1, 0,
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130, 0, 16, 0, 1, 0,
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0, 0, 1, 64, 0, 0,
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0, 0, 1, 64, 0, 0,
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@ -554,7 +565,7 @@ const BYTE host_depth_store_2xmsaa_cs[] =
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70, 14, 16, 0, 2, 0,
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70, 14, 16, 0, 2, 0,
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0, 0, 62, 0, 0, 1,
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0, 0, 62, 0, 0, 1,
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83, 84, 65, 84, 148, 0,
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83, 84, 65, 84, 148, 0,
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0, 0, 55, 0, 0, 0,
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0, 0, 56, 0, 0, 0,
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5, 0, 0, 0, 0, 0,
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5, 0, 0, 0, 0, 0,
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0, 0, 1, 0, 0, 0,
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0, 0, 1, 0, 0, 0,
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0, 0, 0, 0, 16, 0,
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0, 0, 0, 0, 16, 0,
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@ -567,7 +578,7 @@ const BYTE host_depth_store_2xmsaa_cs[] =
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0, 0, 8, 0, 0, 0,
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0, 0, 8, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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13, 0, 0, 0, 1, 0,
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13, 0, 0, 0, 2, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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@ -30,8 +30,8 @@ uint XeHostDepthStoreResolutionScale() {
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return (xe_host_depth_store_render_target >> 10u) & 0x3u;
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return (xe_host_depth_store_render_target >> 10u) & 0x3u;
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}
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}
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uint XeHostDepthStoreSecondSampleIndex() {
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bool XeHostDepthStoreMsaa2xSupported() {
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return (xe_host_depth_store_render_target >> 12u) & 0x3u;
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return bool((xe_host_depth_store_render_target >> 12u) & 0x1u);
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}
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}
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// 40-sample columns are not swapped for addressing simplicity (because this is
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// 40-sample columns are not swapped for addressing simplicity (because this is
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@ -21,8 +21,11 @@ void main(uint3 xe_thread_id : SV_DispatchThreadID) {
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kXenosMsaaSamples_2X, false, 0u, dest_sample_index,
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kXenosMsaaSamples_2X, false, 0u, dest_sample_index,
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resolution_scale)
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resolution_scale)
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>> 2u;
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>> 2u;
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// Top and bottom to Direct3D 10.1+ top 1 and bottom 0 (for 2x) or top-left 0
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// and bottom-right 3 (for 4x).
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int source_sample_index =
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int source_sample_index =
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int(dest_sample_index != 0u ? XeHostDepthStoreSecondSampleIndex() : 0u);
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XeHostDepthStoreMsaa2xSupported() ? (dest_sample_index ? 0u : 1u)
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: (dest_sample_index ? 3u : 0u);
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xe_host_depth_store_dest[edram_address_int4s] = asuint(float4(
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xe_host_depth_store_dest[edram_address_int4s] = asuint(float4(
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xe_host_depth_store_source.Load(int2(pixel_index), source_sample_index),
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xe_host_depth_store_source.Load(int2(pixel_index), source_sample_index),
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xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0),
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xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0),
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