From 913e1e949c8b5a56a8b04543d2e68ee4e490fc96 Mon Sep 17 00:00:00 2001 From: Triang3l Date: Mon, 26 Apr 2021 22:12:09 +0300 Subject: [PATCH] [GPU] Ownership-transfer-based RT cache, 3x3 resolution scaling The ROV path is also disabled by default because of lower performance --- .../gpu/d3d12/d3d12_command_processor.cc | 539 +- src/xenia/gpu/d3d12/d3d12_command_processor.h | 61 +- src/xenia/gpu/d3d12/d3d12_graphics_system.cc | 6 +- .../gpu/d3d12/d3d12_render_target_cache.cc | 6613 +++++ .../gpu/d3d12/d3d12_render_target_cache.h | 841 + src/xenia/gpu/d3d12/d3d12_shared_memory.cc | 7 +- src/xenia/gpu/d3d12/d3d12_shared_memory.h | 1 + src/xenia/gpu/d3d12/deferred_command_list.cc | 37 +- src/xenia/gpu/d3d12/deferred_command_list.h | 113 +- src/xenia/gpu/d3d12/pipeline_cache.cc | 237 +- src/xenia/gpu/d3d12/pipeline_cache.h | 36 +- src/xenia/gpu/d3d12/render_target_cache.cc | 2190 -- src/xenia/gpu/d3d12/render_target_cache.h | 574 - .../gpu/d3d12/shaders/clear_uint2.ps.hlsl | 7 + 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| 205 + .../dxbc/host_depth_store_1xmsaa_cs.txt | 95 + .../dxbc/host_depth_store_2xmsaa_cs.cso | Bin 0 -> 2808 bytes .../shaders/dxbc/host_depth_store_2xmsaa_cs.h | 238 + .../dxbc/host_depth_store_2xmsaa_cs.txt | 108 + .../dxbc/host_depth_store_4xmsaa_cs.cso | Bin 0 -> 2536 bytes .../shaders/dxbc/host_depth_store_4xmsaa_cs.h | 216 + .../dxbc/host_depth_store_4xmsaa_cs.txt | 97 + .../dxbc/passthrough_position_xy_vs.cso | Bin 0 -> 524 bytes .../shaders/dxbc/passthrough_position_xy_vs.h | 48 + .../dxbc/passthrough_position_xy_vs.txt | 26 + .../shaders/dxbc/primitive_point_list_gs.cso | Bin 7712 -> 7640 bytes .../shaders/dxbc/primitive_point_list_gs.h | 292 +- .../shaders/dxbc/primitive_point_list_gs.txt | 33 +- .../dxbc/resolve_clear_32bpp_2xres_cs.cso | Bin 2228 -> 2176 bytes .../dxbc/resolve_clear_32bpp_2xres_cs.h | 130 +- .../dxbc/resolve_clear_32bpp_2xres_cs.txt | 13 +- .../dxbc/resolve_clear_32bpp_3xres_cs.cso | Bin 0 -> 2744 bytes ...32_cs.h => resolve_clear_32bpp_3xres_cs.h} | 179 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third_party/dxbc/d3d12TokenizedProgramFormat.hpp diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.cc b/src/xenia/gpu/d3d12/d3d12_command_processor.cc index 172c63660..b1419fc30 100644 --- a/src/xenia/gpu/d3d12/d3d12_command_processor.cc +++ b/src/xenia/gpu/d3d12/d3d12_command_processor.cc @@ -9,6 +9,7 @@ #include #include +#include #include #include "xenia/base/assert.h" @@ -28,10 +29,6 @@ DEFINE_bool(d3d12_bindless, true, "Use bindless resources where available - may improve performance, " "but may make debugging more complicated.", "D3D12"); -DEFINE_bool(d3d12_edram_rov, true, - "Use rasterizer-ordered views for render target emulation where " - "available.", - "D3D12"); DEFINE_bool(d3d12_readback_memexport, false, "Read data written by memory export in shaders on the CPU. This " "may be needed in some games (but many only access exported data " @@ -45,11 +42,6 @@ DEFINE_bool(d3d12_readback_resolve, false, "causes mid-frame synchronization, so it has a huge performance " "impact.", "D3D12"); -DEFINE_bool(d3d12_ssaa_custom_sample_positions, false, - "Enable custom SSAA sample positions for the RTV/DSV rendering " - "path where available instead of centers (experimental, not very " - "high-quality).", - "D3D12"); DEFINE_bool(d3d12_submit_on_primary_buffer_end, true, "Submit the command list when a PM4 primary buffer ends if it's " "possible to submit immediately to try to reduce frame latency.", @@ -289,7 +281,8 @@ ID3D12RootSignature* D3D12CommandProcessor::GetRootSignature( UINT(DxbcShaderTranslator::UAVRegister::kSharedMemory); shared_memory_and_edram_ranges[1].RegisterSpace = 0; shared_memory_and_edram_ranges[1].OffsetInDescriptorsFromTableStart = 1; - if (edram_rov_used_) { + if (render_target_cache_->GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock) { ++parameter.DescriptorTable.NumDescriptorRanges; shared_memory_and_edram_ranges[2].RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; @@ -465,7 +458,7 @@ void D3D12CommandProcessor::ReleaseViewBindlessDescriptorImmediately( } bool D3D12CommandProcessor::RequestOneUseSingleViewDescriptors( - uint32_t count, ui::d3d12::util::DescriptorCPUGPUHandlePair* handles_out) { + uint32_t count, ui::d3d12::util::DescriptorCpuGpuHandlePair* handles_out) { assert_true(submission_open_); if (!count) { return true; @@ -514,7 +507,7 @@ bool D3D12CommandProcessor::RequestOneUseSingleViewDescriptors( return true; } -ui::d3d12::util::DescriptorCPUGPUHandlePair +ui::d3d12::util::DescriptorCpuGpuHandlePair D3D12CommandProcessor::GetSystemBindlessViewHandlePair( SystemBindlessView view) const { assert_true(bindless_resources_used_); @@ -525,7 +518,7 @@ D3D12CommandProcessor::GetSystemBindlessViewHandlePair( view_bindless_heap_gpu_start_, uint32_t(view))); } -ui::d3d12::util::DescriptorCPUGPUHandlePair +ui::d3d12::util::DescriptorCpuGpuHandlePair D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessSRVHandlePair( uint32_t element_size_bytes_pow2) const { SystemBindlessView view; @@ -546,7 +539,7 @@ D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessSRVHandlePair( return GetSystemBindlessViewHandlePair(view); } -ui::d3d12::util::DescriptorCPUGPUHandlePair +ui::d3d12::util::DescriptorCpuGpuHandlePair D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessUAVHandlePair( uint32_t element_size_bytes_pow2) const { SystemBindlessView view; @@ -567,7 +560,7 @@ D3D12CommandProcessor::GetSharedMemoryUintPow2BindlessUAVHandlePair( return GetSystemBindlessViewHandlePair(view); } -ui::d3d12::util::DescriptorCPUGPUHandlePair +ui::d3d12::util::DescriptorCpuGpuHandlePair D3D12CommandProcessor::GetEdramUintPow2BindlessSRVHandlePair( uint32_t element_size_bytes_pow2) const { SystemBindlessView view; @@ -588,6 +581,27 @@ D3D12CommandProcessor::GetEdramUintPow2BindlessSRVHandlePair( return GetSystemBindlessViewHandlePair(view); } +ui::d3d12::util::DescriptorCpuGpuHandlePair +D3D12CommandProcessor::GetEdramUintPow2BindlessUAVHandlePair( + uint32_t element_size_bytes_pow2) const { + SystemBindlessView view; + switch (element_size_bytes_pow2) { + case 2: + view = SystemBindlessView::kEdramR32UintUAV; + break; + case 3: + view = SystemBindlessView::kEdramR32G32UintUAV; + break; + case 4: + view = SystemBindlessView::kEdramR32G32B32A32UintUAV; + break; + default: + assert_unhandled_case(element_size_bytes_pow2); + view = SystemBindlessView::kEdramR32UintUAV; + } + return GetSystemBindlessViewHandlePair(view); +} + uint64_t D3D12CommandProcessor::RequestSamplerBindfulDescriptors( uint64_t previous_heap_index, uint32_t count_for_partial_update, uint32_t count_for_full_update, D3D12_CPU_DESCRIPTOR_HANDLE& cpu_handle_out, @@ -670,73 +684,64 @@ void D3D12CommandProcessor::ReleaseScratchGPUBuffer( } } -void D3D12CommandProcessor::SetSamplePositions( - xenos::MsaaSamples sample_positions) { - if (current_sample_positions_ == sample_positions) { - return; - } - // Evaluating attributes by sample index - which is done for per-sample - // depth - is undefined with programmable sample positions, so can't use them - // for ROV output. There's hardly any difference between 2,6 (of 0 and 3 with - // 4x MSAA) and 4,4 anyway. - // https://docs.microsoft.com/en-us/windows/desktop/api/d3d12/nf-d3d12-id3d12graphicscommandlist1-setsamplepositions - if (cvars::d3d12_ssaa_custom_sample_positions && !edram_rov_used_ && - command_list_1_) { - auto& provider = GetD3D12Context().GetD3D12Provider(); - auto tier = provider.GetProgrammableSamplePositionsTier(); - if (tier >= D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER_2) { - // Depth buffer transitions are affected by sample positions. - SubmitBarriers(); - // Standard sample positions in Direct3D 10.1, but adjusted to take the - // fact that SSAA samples are already shifted by 1/4 of a pixel. - // TODO(Triang3l): Find what sample positions are used by Xenos, though - // they are not necessarily better. The purpose is just to make 2x SSAA - // work a little bit better for tall stairs. - // FIXME(Triang3l): This is currently even uglier than without custom - // sample positions. - if (sample_positions >= xenos::MsaaSamples::k2X) { - // Sample 1 is lower-left on Xenos, but upper-right in Direct3D 12. - D3D12_SAMPLE_POSITION d3d_sample_positions[4]; - if (sample_positions >= xenos::MsaaSamples::k4X) { - // Upper-left. - d3d_sample_positions[0].X = -2 + 4; - d3d_sample_positions[0].Y = -6 + 4; - // Upper-right. - d3d_sample_positions[1].X = 6 - 4; - d3d_sample_positions[1].Y = -2 + 4; - // Lower-left. - d3d_sample_positions[2].X = -6 + 4; - d3d_sample_positions[2].Y = 2 - 4; - // Lower-right. - d3d_sample_positions[3].X = 2 - 4; - d3d_sample_positions[3].Y = 6 - 4; - } else { - // Upper. - d3d_sample_positions[0].X = -4; - d3d_sample_positions[0].Y = -4 + 4; - d3d_sample_positions[1].X = -4; - d3d_sample_positions[1].Y = -4 + 4; - // Lower. - d3d_sample_positions[2].X = 4; - d3d_sample_positions[2].Y = 4 - 4; - d3d_sample_positions[3].X = 4; - d3d_sample_positions[3].Y = 4 - 4; - } - deferred_command_list_.D3DSetSamplePositions(1, 4, - d3d_sample_positions); - } else { - deferred_command_list_.D3DSetSamplePositions(0, 0, nullptr); - } - } - } - current_sample_positions_ = sample_positions; -} - -void D3D12CommandProcessor::SetComputePipeline(ID3D12PipelineState* pipeline) { +void D3D12CommandProcessor::SetExternalPipeline(ID3D12PipelineState* pipeline) { if (current_external_pipeline_ != pipeline) { - deferred_command_list_.D3DSetPipelineState(pipeline); current_external_pipeline_ = pipeline; current_cached_pipeline_ = nullptr; + deferred_command_list_.D3DSetPipelineState(pipeline); + } +} + +void D3D12CommandProcessor::SetExternalGraphicsRootSignature( + ID3D12RootSignature* root_signature) { + if (current_graphics_root_signature_ != root_signature) { + current_graphics_root_signature_ = root_signature; + deferred_command_list_.D3DSetGraphicsRootSignature(root_signature); + } + // Force-invalidate because setting a non-guest root signature. + current_graphics_root_up_to_date_ = 0; +} + +void D3D12CommandProcessor::SetViewport(const D3D12_VIEWPORT& viewport) { + ff_viewport_update_needed_ |= ff_viewport_.TopLeftX != viewport.TopLeftX; + ff_viewport_update_needed_ |= ff_viewport_.TopLeftY != viewport.TopLeftY; + ff_viewport_update_needed_ |= ff_viewport_.Width != viewport.Width; + ff_viewport_update_needed_ |= ff_viewport_.Height != viewport.Height; + ff_viewport_update_needed_ |= ff_viewport_.MinDepth != viewport.MinDepth; + ff_viewport_update_needed_ |= ff_viewport_.MaxDepth != viewport.MaxDepth; + if (ff_viewport_update_needed_) { + ff_viewport_ = viewport; + deferred_command_list_.RSSetViewport(viewport); + ff_viewport_update_needed_ = false; + } +} + +void D3D12CommandProcessor::SetScissorRect(const D3D12_RECT& scissor_rect) { + ff_scissor_update_needed_ |= ff_scissor_.left != scissor_rect.left; + ff_scissor_update_needed_ |= ff_scissor_.top != scissor_rect.top; + ff_scissor_update_needed_ |= ff_scissor_.right != scissor_rect.right; + ff_scissor_update_needed_ |= ff_scissor_.bottom != scissor_rect.bottom; + if (ff_scissor_update_needed_) { + ff_scissor_ = scissor_rect; + deferred_command_list_.RSSetScissorRect(scissor_rect); + ff_scissor_update_needed_ = false; + } +} + +void D3D12CommandProcessor::SetStencilReference(uint32_t stencil_ref) { + ff_stencil_ref_update_needed_ |= ff_stencil_ref_ != stencil_ref; + if (ff_stencil_ref_update_needed_) { + ff_stencil_ref_ = stencil_ref; + deferred_command_list_.D3DOMSetStencilRef(stencil_ref); + ff_stencil_ref_update_needed_ = false; + } +} + +void D3D12CommandProcessor::SetPrimitiveTopology( + D3D12_PRIMITIVE_TOPOLOGY primitive_topology) { + if (primitive_topology_ != primitive_topology) { + primitive_topology_ = primitive_topology; + deferred_command_list_.D3DIASetPrimitiveTopology(primitive_topology); } } @@ -753,14 +758,9 @@ void D3D12CommandProcessor::NotifyShaderBindingsLayoutUIDsInvalidated() { } std::string D3D12CommandProcessor::GetWindowTitleText() const { + std::ostringstream title; + title << "Direct3D 12"; if (render_target_cache_) { - if (!edram_rov_used_) { - return "Direct3D 12 - no ROV, inaccurate"; - } - // Currently scaling is only supported with ROV. - if (texture_cache_ != nullptr && texture_cache_->IsResolutionScale2X()) { - return "Direct3D 12 - ROV 2x"; - } // Rasterizer-ordered views are a feature very rarely used as of 2020 and // that faces adoption complications (outside of Direct3D - on Vulkan - at // least), but crucial to Xenia - raise awareness of its usage. @@ -768,9 +768,24 @@ std::string D3D12CommandProcessor::GetWindowTitleText() const { // "In Xenia's title bar "D3D12 ROV" can be seen, which was a surprise, as I // wasn't aware that Xenia D3D12 backend was using Raster Order Views // feature" - oscarbg in that issue. - return "Direct3D 12 - ROV"; + switch (render_target_cache_->GetPath()) { + case RenderTargetCache::Path::kHostRenderTargets: + title << " - RTV/DSV"; + break; + case RenderTargetCache::Path::kPixelShaderInterlock: + title << " - ROV"; + break; + default: + break; + } + uint32_t resolution_scale = render_target_cache_->GetResolutionScale(); + if (resolution_scale > 1) { + title.put(' '); + title << resolution_scale; + title.put('x'); + } } - return "Direct3D 12"; + return title.str(); } std::unique_ptr D3D12CommandProcessor::Capture() { @@ -844,7 +859,7 @@ bool D3D12CommandProcessor::SetupContext() { auto device = provider.GetDevice(); auto direct_queue = provider.GetDirectQueue(); - fence_completion_event_ = CreateEvent(nullptr, false, false, nullptr); + fence_completion_event_ = CreateEvent(nullptr, FALSE, FALSE, nullptr); if (fence_completion_event_ == nullptr) { XELOGE("Failed to create the fence completion event"); return false; @@ -890,8 +905,15 @@ bool D3D12CommandProcessor::SetupContext() { bindless_resources_used_ = cvars::d3d12_bindless && provider.GetResourceBindingTier() >= D3D12_RESOURCE_BINDING_TIER_2; - edram_rov_used_ = - cvars::d3d12_edram_rov && provider.AreRasterizerOrderedViewsSupported(); + + // Initialize the render target cache before configuring binding - need to + // know if using rasterizer-ordered views for the bindless root signature. + render_target_cache_ = std::make_unique( + *register_file_, *this, trace_writer_, bindless_resources_used_); + if (!render_target_cache_->Initialize()) { + XELOGE("Failed to initialize the render target cache"); + return false; + } // Initialize resource binding. constant_buffer_pool_ = std::make_unique( @@ -1083,7 +1105,8 @@ bool D3D12CommandProcessor::SetupContext() { UINT(SystemBindlessView::kSharedMemoryRawUAV); } // EDRAM. - if (edram_rov_used_) { + if (render_target_cache_->GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock) { assert_true(parameter.DescriptorTable.NumDescriptorRanges < xe::countof(root_bindless_view_ranges)); auto& range = root_bindless_view_ranges[parameter.DescriptorTable @@ -1172,24 +1195,16 @@ bool D3D12CommandProcessor::SetupContext() { } texture_cache_ = std::make_unique( - *this, *register_file_, bindless_resources_used_, *shared_memory_); - if (!texture_cache_->Initialize(edram_rov_used_)) { + *this, *register_file_, *shared_memory_, bindless_resources_used_, + render_target_cache_->GetResolutionScale()); + if (!texture_cache_->Initialize()) { XELOGE("Failed to initialize the texture cache"); return false; } - render_target_cache_ = std::make_unique( - *this, *register_file_, trace_writer_, bindless_resources_used_, - edram_rov_used_); - if (!render_target_cache_->Initialize(*texture_cache_)) { - XELOGE("Failed to initialize the render target cache"); - return false; - } - - pipeline_cache_ = std::make_unique( - *this, *register_file_, bindless_resources_used_, edram_rov_used_, - render_target_cache_->depth_float24_conversion(), - texture_cache_->IsResolutionScale2X() ? 2 : 1); + pipeline_cache_ = std::make_unique(*this, *register_file_, + *render_target_cache_.get(), + bindless_resources_used_); if (!pipeline_cache_->Initialize()) { XELOGE("Failed to initialize the graphics pipeline cache"); return false; @@ -1442,6 +1457,12 @@ bool D3D12CommandProcessor::SetupContext() { view_bindless_heap_cpu_start_, uint32_t(SystemBindlessView::kEdramR32UintUAV)), 2); + // kEdramR32G32UintUAV. + render_target_cache_->WriteEdramUintPow2UAVDescriptor( + provider.OffsetViewDescriptor( + view_bindless_heap_cpu_start_, + uint32_t(SystemBindlessView::kEdramR32G32UintUAV)), + 3); // kEdramR32G32B32A32UintUAV. render_target_cache_->WriteEdramUintPow2UAVDescriptor( provider.OffsetViewDescriptor( @@ -1512,8 +1533,6 @@ void D3D12CommandProcessor::ShutdownContext() { pipeline_cache_.reset(); - render_target_cache_.reset(); - texture_cache_.reset(); shared_memory_.reset(); @@ -1547,6 +1566,8 @@ void D3D12CommandProcessor::ShutdownContext() { } constant_buffer_pool_.reset(); + render_target_cache_.reset(); + deferred_command_list_.Reset(); ui::d3d12::util::ReleaseAndNull(command_list_1_); ui::d3d12::util::ReleaseAndNull(command_list_); @@ -1691,8 +1712,6 @@ void D3D12CommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, ID3D12Resource* swap_texture_resource = texture_cache_->RequestSwapTexture( swap_texture_srv_desc, frontbuffer_format); if (swap_texture_resource) { - render_target_cache_->FlushAndUnbindRenderTargets(); - // This is according to D3D::InitializePresentationParameters from a game // executable, which initializes the normal gamma ramp for 8_8_8_8 output // and the PWL gamma ramp for 2_10_10_10. @@ -1701,8 +1720,8 @@ void D3D12CommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, frontbuffer_format == xenos::TextureFormat::k_2_10_10_10_AS_16_16_16_16; bool descriptors_obtained; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_swap_texture; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_gamma_ramp; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_swap_texture; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_gamma_ramp; if (bindless_resources_used_) { descriptors_obtained = RequestOneUseSingleViewDescriptors(1, &descriptor_swap_texture); @@ -1710,7 +1729,7 @@ void D3D12CommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, use_pwl_gamma_ramp ? SystemBindlessView::kGammaRampPWLSRV : SystemBindlessView::kGammaRampNormalSRV); } else { - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors[2]; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptors[2]; descriptors_obtained = RequestOneUseSingleViewDescriptors(2, descriptors); if (descriptors_obtained) { descriptor_swap_texture = descriptors[0]; @@ -1739,6 +1758,7 @@ void D3D12CommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, auto swap_texture_size = GetSwapTextureSize(); // Draw the stretching rectangle. + render_target_cache_->InvalidateCommandListRenderTargets(); deferred_command_list_.D3DOMSetRenderTargets(1, &swap_texture_rtv_, TRUE, nullptr); D3D12_VIEWPORT viewport; @@ -1748,15 +1768,19 @@ void D3D12CommandProcessor::PerformSwap(uint32_t frontbuffer_ptr, viewport.Height = float(swap_texture_size.second); viewport.MinDepth = 0.0f; viewport.MaxDepth = 0.0f; - deferred_command_list_.RSSetViewport(viewport); + SetViewport(viewport); D3D12_RECT scissor; scissor.left = 0; scissor.top = 0; scissor.right = swap_texture_size.first; scissor.bottom = swap_texture_size.second; - deferred_command_list_.RSSetScissorRect(scissor); + SetScissorRect(scissor); D3D12GraphicsSystem* graphics_system = static_cast(graphics_system_); + current_cached_pipeline_ = nullptr; + current_external_pipeline_ = nullptr; + current_graphics_root_signature_ = nullptr; + primitive_topology_ = D3D_PRIMITIVE_TOPOLOGY_UNDEFINED; graphics_system->StretchTextureToFrontBuffer( descriptor_swap_texture.second, &descriptor_gamma_ramp.second, use_pwl_gamma_ramp ? (1.0f / 128.0f) : (1.0f / 256.0f), @@ -1825,19 +1849,21 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return false; } pipeline_cache_->AnalyzeShaderUcode(*vertex_shader); - bool memexport_used_vertex = - !vertex_shader->memexport_stream_constants().empty(); + bool memexport_used_vertex = vertex_shader->is_valid_memexport_used(); DxbcShaderTranslator::Modification vertex_shader_modification; pipeline_cache_->GetCurrentShaderModification(*vertex_shader, vertex_shader_modification); - bool tessellated = vertex_shader_modification.host_vertex_shader_type != - Shader::HostVertexShaderType::kVertex; + bool tessellated = + vertex_shader_modification.vertex.host_vertex_shader_type != + Shader::HostVertexShaderType::kVertex; bool primitive_polygonal = xenos::IsPrimitivePolygonal(tessellated, primitive_type); // Pixel shader. + bool is_rasterization_done = + draw_util::IsRasterizationPotentiallyDone(regs, primitive_polygonal); D3D12Shader* pixel_shader = nullptr; - if (draw_util::IsRasterizationPotentiallyDone(regs, primitive_polygonal)) { + if (is_rasterization_done) { // See xenos::ModeControl for explanation why the pixel shader is only used // when it's kColorDepth here. if (edram_mode == xenos::ModeControl::kColorDepth) { @@ -1861,7 +1887,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, bool memexport_used_pixel; DxbcShaderTranslator::Modification pixel_shader_modification; if (pixel_shader) { - memexport_used_pixel = !pixel_shader->memexport_stream_constants().empty(); + memexport_used_pixel = pixel_shader->is_valid_memexport_used(); if (!pipeline_cache_->GetCurrentShaderModification( *pixel_shader, pixel_shader_modification)) { return false; @@ -1875,15 +1901,13 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, BeginSubmission(true); - // Set up the render targets - this may bind pipelines. + // Set up the render targets - this may perform dispatches and draws. uint32_t pixel_shader_writes_color_targets = pixel_shader ? pixel_shader->writes_color_targets() : 0; - if (!render_target_cache_->UpdateRenderTargets( - pixel_shader_writes_color_targets)) { + if (!render_target_cache_->Update(is_rasterization_done, + pixel_shader_writes_color_targets)) { return false; } - const RenderTargetCache::PipelineRenderTarget* pipeline_render_targets = - render_target_cache_->GetCurrentPipelineRenderTargets(); // Set up primitive topology. bool indexed = index_buffer_info != nullptr && index_buffer_info->guest_base; @@ -1931,10 +1955,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, return false; } } - if (primitive_topology_ != primitive_topology) { - primitive_topology_ = primitive_topology; - deferred_command_list_.D3DIASetPrimitiveTopology(primitive_topology); - } + SetPrimitiveTopology(primitive_topology); uint32_t line_loop_closing_index; if (primitive_type == xenos::PrimitiveType::kLineLoop && !indexed && index_count >= 3) { @@ -1958,13 +1979,27 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, pixel_shader->GetOrCreateTranslation( pixel_shader_modification.value)) : nullptr; + uint32_t bound_depth_and_color_render_target_bits; + uint32_t bound_depth_and_color_render_target_formats + [1 + xenos::kMaxColorRenderTargets]; + bool host_render_targets_used = render_target_cache_->GetPath() == + RenderTargetCache::Path::kHostRenderTargets; + if (host_render_targets_used) { + bound_depth_and_color_render_target_bits = + render_target_cache_->GetLastUpdateBoundRenderTargets( + bound_depth_and_color_render_target_formats); + } else { + bound_depth_and_color_render_target_bits = 0; + } void* pipeline_handle; ID3D12RootSignature* root_signature; if (!pipeline_cache_->ConfigurePipeline( vertex_shader_translation, pixel_shader_translation, primitive_type_converted, indexed ? index_buffer_info->format : xenos::IndexFormat::kInt16, - pipeline_render_targets, &pipeline_handle, &root_signature)) { + bound_depth_and_color_render_target_bits, + bound_depth_and_color_render_target_formats, &pipeline_handle, + &root_signature)) { return false; } @@ -1986,53 +2021,37 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, } // Get dynamic rasterizer state. - // Supersampling replacing multisampling due to difficulties of emulating - // EDRAM with multisampling with RTV/DSV (with ROV, there's MSAA), and also - // resolution scale. - uint32_t pixel_size_x, pixel_size_y; - if (edram_rov_used_) { - pixel_size_x = 1; - pixel_size_y = 1; - } else { - xenos::MsaaSamples msaa_samples = - regs.Get().msaa_samples; - pixel_size_x = msaa_samples >= xenos::MsaaSamples::k4X ? 2 : 1; - pixel_size_y = msaa_samples >= xenos::MsaaSamples::k2X ? 2 : 1; - } - if (texture_cache_->IsResolutionScale2X()) { - pixel_size_x *= 2; - pixel_size_y *= 2; - } - flags::DepthFloat24Conversion depth_float24_conversion = + uint32_t resolution_scale = texture_cache_->GetDrawResolutionScale(); + RenderTargetCache::DepthFloat24Conversion depth_float24_conversion = render_target_cache_->depth_float24_conversion(); draw_util::ViewportInfo viewport_info; draw_util::GetHostViewportInfo( - regs, float(pixel_size_x), float(pixel_size_y), true, - float(D3D12_VIEWPORT_BOUNDS_MAX), float(D3D12_VIEWPORT_BOUNDS_MAX), false, - !edram_rov_used_ && + regs, resolution_scale, true, float(D3D12_VIEWPORT_BOUNDS_MAX), + float(D3D12_VIEWPORT_BOUNDS_MAX), false, + host_render_targets_used && (depth_float24_conversion == - flags::DepthFloat24Conversion::kOnOutputTruncating || + RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating || depth_float24_conversion == - flags::DepthFloat24Conversion::kOnOutputRounding), - viewport_info); + RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding), + host_render_targets_used, viewport_info); draw_util::Scissor scissor; draw_util::GetScissor(regs, scissor); - scissor.left *= pixel_size_x; - scissor.top *= pixel_size_y; - scissor.width *= pixel_size_x; - scissor.height *= pixel_size_y; + scissor.left *= resolution_scale; + scissor.top *= resolution_scale; + scissor.width *= resolution_scale; + scissor.height *= resolution_scale; // Update viewport, scissor, blend factor and stencil reference. UpdateFixedFunctionState(viewport_info, scissor, primitive_polygonal); // Update system constants before uploading them. + // TODO(Triang3l): With ROV, pass the disabled render target mask for safety. UpdateSystemConstantValues( memexport_used, primitive_polygonal, line_loop_closing_index, indexed ? index_buffer_info->endianness : xenos::Endian::kNone, - viewport_info, pixel_size_x, pixel_size_y, used_texture_mask, + viewport_info, used_texture_mask, pixel_shader ? GetCurrentColorMask(pixel_shader->writes_color_targets()) - : 0, - pipeline_render_targets); + : 0); // Update constant buffers, descriptors and root parameters. if (!UpdateBindings(vertex_shader, pixel_shader, root_signature)) { @@ -2305,7 +2324,7 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type, const MemExportRange& memexport_range = memexport_ranges[i]; shared_memory_->RangeWrittenByGpu( memexport_range.base_address_dwords << 2, - memexport_range.size_dwords << 2); + memexport_range.size_dwords << 2, false); } if (cvars::d3d12_readback_memexport) { // Read the exported data on the CPU. @@ -2385,8 +2404,8 @@ bool D3D12CommandProcessor::IssueCopy() { written_address, written_length)) { return false; } - if (cvars::d3d12_readback_resolve && !texture_cache_->IsResolutionScale2X() && - written_length) { + if (cvars::d3d12_readback_resolve && + texture_cache_->GetDrawResolutionScale() <= 1 && written_length) { // Read the resolved data on the CPU. ID3D12Resource* readback_buffer = RequestReadbackBuffer(written_length); if (readback_buffer != nullptr) { @@ -2560,7 +2579,6 @@ void D3D12CommandProcessor::BeginSubmission(bool is_guest_command) { ff_scissor_update_needed_ = true; ff_blend_factor_update_needed_ = true; ff_stencil_ref_update_needed_ = true; - current_sample_positions_ = xenos::MsaaSamples::k1X; current_cached_pipeline_ = nullptr; current_external_pipeline_ = nullptr; current_graphics_root_signature_ = nullptr; @@ -2576,6 +2594,8 @@ void D3D12CommandProcessor::BeginSubmission(bool is_guest_command) { render_target_cache_->BeginSubmission(); + texture_cache_->BeginSubmission(); + primitive_converter_->BeginSubmission(); } @@ -2654,8 +2674,6 @@ bool D3D12CommandProcessor::EndSubmission(bool is_swap) { bool is_closing_frame = is_swap && frame_open_; if (is_closing_frame) { - render_target_cache_->EndFrame(); - texture_cache_->EndFrame(); } @@ -2670,7 +2688,11 @@ bool D3D12CommandProcessor::EndSubmission(bool is_swap) { auto direct_queue = provider.GetDirectQueue(); - // Submit the command list. + // Submit the deferred command list. + // Only one deferred command list must be executed in the same + // ExecuteCommandLists - the boundaries of ExecuteCommandLists are a full + // UAV and aliasing barrier, and subsystems of the emulator assume it + // happens between Xenia submissions. ID3D12CommandAllocator* command_allocator = command_allocator_writable_first_->command_allocator; command_allocator->Reset(); @@ -2795,17 +2817,7 @@ void D3D12CommandProcessor::UpdateFixedFunctionState( viewport.Height = viewport_info.height; viewport.MinDepth = viewport_info.z_min; viewport.MaxDepth = viewport_info.z_max; - ff_viewport_update_needed_ |= ff_viewport_.TopLeftX != viewport.TopLeftX; - ff_viewport_update_needed_ |= ff_viewport_.TopLeftY != viewport.TopLeftY; - ff_viewport_update_needed_ |= ff_viewport_.Width != viewport.Width; - ff_viewport_update_needed_ |= ff_viewport_.Height != viewport.Height; - ff_viewport_update_needed_ |= ff_viewport_.MinDepth != viewport.MinDepth; - ff_viewport_update_needed_ |= ff_viewport_.MaxDepth != viewport.MaxDepth; - if (ff_viewport_update_needed_) { - ff_viewport_ = viewport; - deferred_command_list_.RSSetViewport(viewport); - ff_viewport_update_needed_ = false; - } + SetViewport(viewport); // Scissor. D3D12_RECT scissor_rect; @@ -2813,17 +2825,10 @@ void D3D12CommandProcessor::UpdateFixedFunctionState( scissor_rect.top = LONG(scissor.top); scissor_rect.right = LONG(scissor.left + scissor.width); scissor_rect.bottom = LONG(scissor.top + scissor.height); - ff_scissor_update_needed_ |= ff_scissor_.left != scissor_rect.left; - ff_scissor_update_needed_ |= ff_scissor_.top != scissor_rect.top; - ff_scissor_update_needed_ |= ff_scissor_.right != scissor_rect.right; - ff_scissor_update_needed_ |= ff_scissor_.bottom != scissor_rect.bottom; - if (ff_scissor_update_needed_) { - ff_scissor_ = scissor_rect; - deferred_command_list_.RSSetScissorRect(scissor_rect); - ff_scissor_update_needed_ = false; - } + SetScissorRect(scissor_rect); - if (!edram_rov_used_) { + if (render_target_cache_->GetPath() == + RenderTargetCache::Path::kHostRenderTargets) { const RegisterFile& regs = *register_file_; // Blend factor. @@ -2869,9 +2874,8 @@ void D3D12CommandProcessor::UpdateFixedFunctionState( void D3D12CommandProcessor::UpdateSystemConstantValues( bool shared_memory_is_uav, bool primitive_polygonal, uint32_t line_loop_closing_index, xenos::Endian index_endian, - const draw_util::ViewportInfo& viewport_info, uint32_t pixel_size_x, - uint32_t pixel_size_y, uint32_t used_texture_mask, uint32_t color_mask, - const RenderTargetCache::PipelineRenderTarget render_targets[4]) { + const draw_util::ViewportInfo& viewport_info, uint32_t used_texture_mask, + uint32_t color_mask) { #if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES SCOPE_profile_cpu_f("gpu"); #endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES @@ -2894,10 +2898,15 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( auto sq_program_cntl = regs.Get(); int32_t vgt_indx_offset = int32_t(regs[XE_GPU_REG_VGT_INDX_OFFSET].u32); - // Get the color info register values for each render target, and also put - // some safety measures for the ROV path - disable fully aliased render - // targets. Also, for ROV, exclude components that don't exist in the format - // from the write mask. + bool edram_rov_used = render_target_cache_->GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; + uint32_t resolution_scale = texture_cache_->GetDrawResolutionScale(); + + // Get the color info register values for each render target. Also, for ROV, + // exclude components that don't exist in the format from the write mask. + // Don't exclude fully overlapping render targets, however - two render + // targets with the same base address are used in the lighting pass of Halo 3, + // for example, with the needed one picked with dynamic control flow. reg::RB_COLOR_INFO color_infos[4]; float rt_clamp[4][4]; uint32_t rt_keep_masks[4][2]; @@ -2905,29 +2914,13 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( auto color_info = regs.Get( reg::RB_COLOR_INFO::rt_register_indices[i]); color_infos[i] = color_info; - - if (edram_rov_used_) { + if (edram_rov_used) { // Get the mask for keeping previous color's components unmodified, // or two UINT32_MAX if no colors actually existing in the RT are written. DxbcShaderTranslator::ROV_GetColorFormatSystemConstants( color_info.color_format, (color_mask >> (i * 4)) & 0b1111, rt_clamp[i][0], rt_clamp[i][1], rt_clamp[i][2], rt_clamp[i][3], rt_keep_masks[i][0], rt_keep_masks[i][1]); - - // Disable the render target if it has the same EDRAM base as another one - // (with a smaller index - assume it's more important). - if (rt_keep_masks[i][0] == UINT32_MAX && - rt_keep_masks[i][1] == UINT32_MAX) { - for (uint32_t j = 0; j < i; ++j) { - if (color_info.color_base == color_infos[j].color_base && - (rt_keep_masks[j][0] != UINT32_MAX || - rt_keep_masks[j][1] != UINT32_MAX)) { - rt_keep_masks[i][0] = UINT32_MAX; - rt_keep_masks[i][1] = UINT32_MAX; - break; - } - } - } } } @@ -2936,7 +2929,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( // already disabled there). bool depth_stencil_enabled = rb_depthcontrol.stencil_enable || rb_depthcontrol.z_enable; - if (edram_rov_used_ && depth_stencil_enabled) { + if (edram_rov_used && depth_stencil_enabled) { for (uint32_t i = 0; i < 4; ++i) { if (rb_depth_info.depth_base == color_infos[i].color_base && (rt_keep_masks[i][0] != UINT32_MAX || @@ -2987,6 +2980,10 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( if (pa_cl_clip_cntl.vtx_kill_or) { flags |= DxbcShaderTranslator::kSysFlag_KillIfAnyVertexKilled; } + // Depth format. + if (rb_depth_info.depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { + flags |= DxbcShaderTranslator::kSysFlag_DepthFloat24; + } // Alpha test. xenos::CompareFunction alpha_test_function = rb_colorcontrol.alpha_test_enable ? rb_colorcontrol.alpha_func @@ -2994,17 +2991,16 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( flags |= uint32_t(alpha_test_function) << DxbcShaderTranslator::kSysFlag_AlphaPassIfLess_Shift; // Gamma writing. - for (uint32_t i = 0; i < 4; ++i) { - if (color_infos[i].color_format == - xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) { - flags |= DxbcShaderTranslator::kSysFlag_Color0Gamma << i; + if (!render_target_cache_->gamma_render_target_as_srgb()) { + for (uint32_t i = 0; i < 4; ++i) { + if (color_infos[i].color_format == + xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) { + flags |= DxbcShaderTranslator::kSysFlag_ConvertColor0ToGamma << i; + } } } - if (edram_rov_used_ && depth_stencil_enabled) { + if (edram_rov_used && depth_stencil_enabled) { flags |= DxbcShaderTranslator::kSysFlag_ROVDepthStencil; - if (rb_depth_info.depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { - flags |= DxbcShaderTranslator::kSysFlag_ROVDepthFloat24; - } if (rb_depthcontrol.z_enable) { flags |= uint32_t(rb_depthcontrol.zfunc) << DxbcShaderTranslator::kSysFlag_ROVDepthPassIfLess_Shift; @@ -3094,21 +3090,34 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( system_constants_.point_size_min_max[0] = point_size_min; system_constants_.point_size_min_max[1] = point_size_max; float point_screen_to_ndc_x = - (0.5f * 2.0f * pixel_size_x) / viewport_info.width; + (0.5f * 2.0f * resolution_scale) / viewport_info.width; float point_screen_to_ndc_y = - (0.5f * 2.0f * pixel_size_y) / viewport_info.height; + (0.5f * 2.0f * resolution_scale) / viewport_info.height; dirty |= system_constants_.point_screen_to_ndc[0] != point_screen_to_ndc_x; dirty |= system_constants_.point_screen_to_ndc[1] != point_screen_to_ndc_y; system_constants_.point_screen_to_ndc[0] = point_screen_to_ndc_x; system_constants_.point_screen_to_ndc[1] = point_screen_to_ndc_y; + // Interpolator sampling pattern, centroid or center. + uint32_t interpolator_sampling_pattern = + xenos::GetInterpolatorSamplingPattern( + rb_surface_info.msaa_samples, sq_context_misc.sc_sample_cntl, + regs.Get().sampling_pattern); + dirty |= system_constants_.interpolator_sampling_pattern != + interpolator_sampling_pattern; + system_constants_.interpolator_sampling_pattern = + interpolator_sampling_pattern; + // Pixel parameter register. uint32_t ps_param_gen = sq_program_cntl.param_gen ? sq_context_misc.param_gen_pos : UINT_MAX; dirty |= system_constants_.ps_param_gen != ps_param_gen; system_constants_.ps_param_gen = ps_param_gen; - // Texture signedness. + // Texture signedness / gamma. + bool gamma_render_target_as_srgb = + render_target_cache_->gamma_render_target_as_srgb(); + uint32_t textures_resolved = 0; uint32_t textures_remaining = used_texture_mask; uint32_t texture_index; while (xe::bit_scan_forward(textures_remaining, &texture_index)) { @@ -3116,17 +3125,23 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( uint32_t& texture_signs_uint = system_constants_.texture_swizzled_signs[texture_index >> 2]; uint32_t texture_signs_shift = (texture_index & 3) * 8; - uint32_t texture_signs_shifted = - uint32_t(texture_cache_->GetActiveTextureSwizzledSigns(texture_index)) - << texture_signs_shift; + uint8_t texture_signs = + texture_cache_->GetActiveTextureSwizzledSigns(texture_index); + uint32_t texture_signs_shifted = uint32_t(texture_signs) + << texture_signs_shift; uint32_t texture_signs_mask = uint32_t(0b11111111) << texture_signs_shift; dirty |= (texture_signs_uint & texture_signs_mask) != texture_signs_shifted; texture_signs_uint = (texture_signs_uint & ~texture_signs_mask) | texture_signs_shifted; + textures_resolved |= + uint32_t(texture_cache_->IsActiveTextureResolved(texture_index)) + << texture_index; } + dirty |= system_constants_.textures_resolved != textures_resolved; + system_constants_.textures_resolved = textures_resolved; - // Log2 of sample count, for scaling VPOS with SSAA (without ROV) and for - // EDRAM address calculation with MSAA (with ROV). + // Log2 of sample count, for alpha to mask and with ROV, for EDRAM address + // calculation with MSAA. uint32_t sample_count_log2_x = rb_surface_info.msaa_samples >= xenos::MsaaSamples::k4X ? 1 : 0; uint32_t sample_count_log2_y = @@ -3146,7 +3161,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( system_constants_.alpha_to_mask = alpha_to_mask; // EDRAM pitch for ROV writing. - if (edram_rov_used_) { + if (edram_rov_used) { uint32_t edram_pitch_tiles = ((rb_surface_info.surface_pitch * (rb_surface_info.msaa_samples >= xenos::MsaaSamples::k4X ? 2 : 1)) + @@ -3164,14 +3179,11 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( if (color_info.color_format == xenos::ColorRenderTargetFormat::k_16_16 || color_info.color_format == xenos::ColorRenderTargetFormat::k_16_16_16_16) { - // On the Xbox 360, k_16_16_EDRAM and k_16_16_16_16_EDRAM internally have - // -32...32 range and expect shaders to give -32...32 values, but they're - // emulated using normalized RG16/RGBA16 when not using the ROV, so the - // value returned from the shader needs to be divided by 32 (blending will - // be incorrect in this case, but there's no other way without using ROV, - // though there's an option to limit the range to -1...1). - // http://www.students.science.uu.nl/~3220516/advancedgraphics/papers/inferred_lighting.pdf - if (!edram_rov_used_ && cvars::d3d12_16bit_rtv_full_range) { + if (render_target_cache_->GetPath() == + RenderTargetCache::Path::kHostRenderTargets && + !render_target_cache_->IsFixed16TruncatedToMinus1To1()) { + // Remap from -32...32 to -1...1 by dividing the output values by 32, + // losing blending correctness, but getting the full range. color_exp_bias -= 5; } } @@ -3180,7 +3192,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( 0x3F800000 + (color_exp_bias << 23); dirty |= system_constants_.color_exp_bias[i] != color_exp_bias_scale; system_constants_.color_exp_bias[i] = color_exp_bias_scale; - if (edram_rov_used_) { + if (edram_rov_used) { dirty |= system_constants_.edram_rt_keep_mask[i][0] != rt_keep_masks[i][0]; system_constants_.edram_rt_keep_mask[i][0] = rt_keep_masks[i][0]; @@ -3189,10 +3201,8 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( system_constants_.edram_rt_keep_mask[i][1] = rt_keep_masks[i][1]; if (rt_keep_masks[i][0] != UINT32_MAX || rt_keep_masks[i][1] != UINT32_MAX) { - uint32_t rt_base_dwords_scaled = color_info.color_base * 1280; - if (texture_cache_->IsResolutionScale2X()) { - rt_base_dwords_scaled <<= 2; - } + uint32_t rt_base_dwords_scaled = + color_info.color_base * 1280 * resolution_scale * resolution_scale; dirty |= system_constants_.edram_rt_base_dwords_scaled[i] != rt_base_dwords_scaled; system_constants_.edram_rt_base_dwords_scaled[i] = @@ -3213,35 +3223,12 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( blend_factors_ops; system_constants_.edram_rt_blend_factors_ops[i] = blend_factors_ops; } - } else { - dirty |= system_constants_.color_output_map[i] != - render_targets[i].guest_render_target; - system_constants_.color_output_map[i] = - render_targets[i].guest_render_target; } } // Interpolator sampling pattern, resolution scale, depth/stencil testing and // blend constant for ROV. - if (edram_rov_used_) { - // Not needed without ROV because without ROV, MSAA is faked with SSAA, and - // everything is interpolated at samples, without the possibility of - // extrapolation. - uint32_t interpolator_sampling_pattern = - xenos::GetInterpolatorSamplingPattern( - rb_surface_info.msaa_samples, sq_context_misc.sc_sample_cntl, - regs.Get().sampling_pattern); - dirty |= system_constants_.interpolator_sampling_pattern != - interpolator_sampling_pattern; - system_constants_.interpolator_sampling_pattern = - interpolator_sampling_pattern; - - uint32_t resolution_square_scale = - texture_cache_->IsResolutionScale2X() ? 4 : 1; - dirty |= system_constants_.edram_resolution_square_scale != - resolution_square_scale; - system_constants_.edram_resolution_square_scale = resolution_square_scale; - + if (edram_rov_used) { uint32_t depth_base_dwords = rb_depth_info.depth_base * 1280; dirty |= system_constants_.edram_depth_base_dwords != depth_base_dwords; system_constants_.edram_depth_base_dwords = depth_base_dwords; @@ -3282,12 +3269,8 @@ void D3D12CommandProcessor::UpdateSystemConstantValues( } // "slope computed in subpixels (1/12 or 1/16)" - R5xx Acceleration. Also: // https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L943 - poly_offset_front_scale *= 1.0f / 16.0f; - poly_offset_back_scale *= 1.0f / 16.0f; - if (texture_cache_->IsResolutionScale2X()) { - poly_offset_front_scale *= 2.f; - poly_offset_back_scale *= 2.f; - } + poly_offset_front_scale *= (1.0f / 16.0f) * resolution_scale; + poly_offset_back_scale *= (1.0f / 16.0f) * resolution_scale; dirty |= system_constants_.edram_poly_offset_front_scale != poly_offset_front_scale; system_constants_.edram_poly_offset_front_scale = poly_offset_front_scale; @@ -3889,6 +3872,8 @@ bool D3D12CommandProcessor::UpdateBindings( sampler_count_vertex && !bindful_samplers_written_vertex_; bool write_samplers_pixel = sampler_count_pixel && !bindful_samplers_written_pixel_; + bool edram_rov_used = render_target_cache_->GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; // Allocate the descriptors. size_t view_count_partial_update = 0; @@ -3901,7 +3886,7 @@ bool D3D12CommandProcessor::UpdateBindings( // All the constants + shared memory SRV and UAV + textures. size_t view_count_full_update = 2 + texture_count_vertex + texture_count_pixel; - if (edram_rov_used_) { + if (edram_rov_used) { // + EDRAM UAV. ++view_count_full_update; } @@ -3955,7 +3940,7 @@ bool D3D12CommandProcessor::UpdateBindings( shared_memory_->WriteRawUAVDescriptor(view_cpu_handle); view_cpu_handle.ptr += descriptor_size_view; view_gpu_handle.ptr += descriptor_size_view; - if (edram_rov_used_) { + if (edram_rov_used) { render_target_cache_->WriteEdramUintPow2UAVDescriptor(view_cpu_handle, 2); view_cpu_handle.ptr += descriptor_size_view; diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.h b/src/xenia/gpu/d3d12/d3d12_command_processor.h index fc72433fc..0d90080d0 100644 --- a/src/xenia/gpu/d3d12/d3d12_command_processor.h +++ b/src/xenia/gpu/d3d12/d3d12_command_processor.h @@ -20,11 +20,11 @@ #include "xenia/base/assert.h" #include "xenia/gpu/command_processor.h" #include "xenia/gpu/d3d12/d3d12_graphics_system.h" +#include "xenia/gpu/d3d12/d3d12_render_target_cache.h" #include "xenia/gpu/d3d12/d3d12_shared_memory.h" #include "xenia/gpu/d3d12/deferred_command_list.h" #include "xenia/gpu/d3d12/pipeline_cache.h" #include "xenia/gpu/d3d12/primitive_converter.h" -#include "xenia/gpu/d3d12/render_target_cache.h" #include "xenia/gpu/d3d12/texture_cache.h" #include "xenia/gpu/draw_util.h" #include "xenia/gpu/dxbc_shader.h" @@ -131,7 +131,7 @@ class D3D12CommandProcessor : public CommandProcessor { // descriptors, this must only be used to allocate SRVs, otherwise it won't // work on Nvidia Fermi (root signature creation will fail)! bool RequestOneUseSingleViewDescriptors( - uint32_t count, ui::d3d12::util::DescriptorCPUGPUHandlePair* handles_out); + uint32_t count, ui::d3d12::util::DescriptorCpuGpuHandlePair* handles_out); // These are needed often, so they are always allocated. enum class SystemBindlessView : uint32_t { kSharedMemoryRawSRV, @@ -149,6 +149,7 @@ class D3D12CommandProcessor : public CommandProcessor { kEdramR32G32B32A32UintSRV, kEdramRawUAV, kEdramR32UintUAV, + kEdramR32G32UintUAV, kEdramR32G32B32A32UintUAV, kGammaRampNormalSRV, @@ -164,16 +165,18 @@ class D3D12CommandProcessor : public CommandProcessor { kCount, }; - ui::d3d12::util::DescriptorCPUGPUHandlePair GetSystemBindlessViewHandlePair( + ui::d3d12::util::DescriptorCpuGpuHandlePair GetSystemBindlessViewHandlePair( SystemBindlessView view) const; - ui::d3d12::util::DescriptorCPUGPUHandlePair + ui::d3d12::util::DescriptorCpuGpuHandlePair GetSharedMemoryUintPow2BindlessSRVHandlePair( uint32_t element_size_bytes_pow2) const; - ui::d3d12::util::DescriptorCPUGPUHandlePair + ui::d3d12::util::DescriptorCpuGpuHandlePair GetSharedMemoryUintPow2BindlessUAVHandlePair( uint32_t element_size_bytes_pow2) const; - ui::d3d12::util::DescriptorCPUGPUHandlePair + ui::d3d12::util::DescriptorCpuGpuHandlePair GetEdramUintPow2BindlessSRVHandlePair(uint32_t element_size_bytes_pow2) const; + ui::d3d12::util::DescriptorCpuGpuHandlePair + GetEdramUintPow2BindlessUAVHandlePair(uint32_t element_size_bytes_pow2) const; // Returns a single temporary GPU-side buffer within a submission for tasks // like texture untiling and resolving. @@ -185,19 +188,20 @@ class D3D12CommandProcessor : public CommandProcessor { void ReleaseScratchGPUBuffer(ID3D12Resource* buffer, D3D12_RESOURCE_STATES new_state); - // Sets the current SSAA sample positions, needs to be done before setting - // render targets or copying to depth render targets. - void SetSamplePositions(xenos::MsaaSamples sample_positions); - // Returns a pipeline with deferred creation by its handle. May return nullptr // if failed to create the pipeline. ID3D12PipelineState* GetD3D12PipelineByHandle(void* handle) const { return pipeline_cache_->GetD3D12PipelineByHandle(handle); } - // Sets the current pipeline to a compute one. This is for cache invalidation - // primarily. A submission must be open. - void SetComputePipeline(ID3D12PipelineState* pipeline); + // Sets the current cached values to external ones. This is for cache + // invalidation primarily. A submission must be open. + void SetExternalPipeline(ID3D12PipelineState* pipeline); + void SetExternalGraphicsRootSignature(ID3D12RootSignature* root_signature); + void SetViewport(const D3D12_VIEWPORT& viewport); + void SetScissorRect(const D3D12_RECT& scissor_rect); + void SetStencilReference(uint32_t stencil_ref); + void SetPrimitiveTopology(D3D12_PRIMITIVE_TOPOLOGY primitive_topology); // For the pipeline cache to call when binding layout UIDs may be reused. void NotifyShaderBindingsLayoutUIDsInvalidated(); @@ -351,12 +355,13 @@ class D3D12CommandProcessor : public CommandProcessor { void UpdateFixedFunctionState(const draw_util::ViewportInfo& viewport_info, const draw_util::Scissor& scissor, bool primitive_polygonal); - void UpdateSystemConstantValues( - bool shared_memory_is_uav, bool primitive_polygonal, - uint32_t line_loop_closing_index, xenos::Endian index_endian, - const draw_util::ViewportInfo& viewport_info, uint32_t pixel_size_x, - uint32_t pixel_size_y, uint32_t used_texture_mask, uint32_t color_mask, - const RenderTargetCache::PipelineRenderTarget render_targets[4]); + void UpdateSystemConstantValues(bool shared_memory_is_uav, + bool primitive_polygonal, + uint32_t line_loop_closing_index, + xenos::Endian index_endian, + const draw_util::ViewportInfo& viewport_info, + uint32_t used_texture_mask, + uint32_t color_mask); bool UpdateBindings(const D3D12Shader* vertex_shader, const D3D12Shader* pixel_shader, ID3D12RootSignature* root_signature); @@ -418,10 +423,8 @@ class D3D12CommandProcessor : public CommandProcessor { // bindful - mainly because of CopyDescriptorsSimple, which takes the majority // of UpdateBindings time, and that's outside the emulator's control even). bool bindless_resources_used_ = false; - // Should a rasterizer-ordered UAV of the EDRAM buffer with format conversion - // and blending performed in pixel shaders be used instead of host render - // targets. - bool edram_rov_used_ = false; + + std::unique_ptr render_target_cache_; std::unique_ptr constant_buffer_pool_; @@ -491,8 +494,6 @@ class D3D12CommandProcessor : public CommandProcessor { std::unique_ptr texture_cache_; - std::unique_ptr render_target_cache_; - std::unique_ptr primitive_converter_; // Mip 0 contains the normal gamma ramp (256 entries), mip 1 contains the PWL @@ -508,10 +509,9 @@ class D3D12CommandProcessor : public CommandProcessor { static constexpr uint32_t kSwapTextureWidth = 1280; static constexpr uint32_t kSwapTextureHeight = 720; std::pair GetSwapTextureSize() const { - if (texture_cache_->IsResolutionScale2X()) { - return std::make_pair(kSwapTextureWidth * 2, kSwapTextureHeight * 2); - } - return std::make_pair(kSwapTextureWidth, kSwapTextureHeight); + uint32_t resolution_scale = texture_cache_->GetDrawResolutionScale(); + return std::make_pair(kSwapTextureWidth * resolution_scale, + kSwapTextureHeight * resolution_scale); } ID3D12Resource* swap_texture_ = nullptr; D3D12_PLACED_SUBRESOURCE_FOOTPRINT swap_texture_copy_footprint_; @@ -549,9 +549,6 @@ class D3D12CommandProcessor : public CommandProcessor { bool ff_blend_factor_update_needed_; bool ff_stencil_ref_update_needed_; - // Current SSAA sample positions (to be updated by the render target cache). - xenos::MsaaSamples current_sample_positions_; - // Currently bound pipeline, either a graphics pipeline from the pipeline // cache (with potentially deferred creation - current_external_pipeline_ is // nullptr in this case) or a non-Xenos graphics or compute pipeline diff --git a/src/xenia/gpu/d3d12/d3d12_graphics_system.cc b/src/xenia/gpu/d3d12/d3d12_graphics_system.cc index d32f223ce..12259a1a3 100644 --- a/src/xenia/gpu/d3d12/d3d12_graphics_system.cc +++ b/src/xenia/gpu/d3d12/d3d12_graphics_system.cc @@ -21,7 +21,7 @@ namespace gpu { namespace d3d12 { // Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h" #include "xenia/gpu/d3d12/shaders/dxbc/stretch_gamma_ps.h" #include "xenia/gpu/d3d12/shaders/dxbc/stretch_ps.h" @@ -138,8 +138,8 @@ X_STATUS D3D12GraphicsSystem::Setup(cpu::Processor* processor, // Create the stretch pipelines. D3D12_GRAPHICS_PIPELINE_STATE_DESC stretch_pipeline_desc = {}; stretch_pipeline_desc.pRootSignature = stretch_root_signature_; - stretch_pipeline_desc.VS.pShaderBytecode = fullscreen_vs; - stretch_pipeline_desc.VS.BytecodeLength = sizeof(fullscreen_vs); + stretch_pipeline_desc.VS.pShaderBytecode = fullscreen_tc_vs; + stretch_pipeline_desc.VS.BytecodeLength = sizeof(fullscreen_tc_vs); stretch_pipeline_desc.PS.pShaderBytecode = stretch_ps; stretch_pipeline_desc.PS.BytecodeLength = sizeof(stretch_ps); // The shader will set alpha to 1, don't use output-merger to preserve it. diff --git a/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc b/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc new file mode 100644 index 000000000..8287b14a5 --- /dev/null +++ b/src/xenia/gpu/d3d12/d3d12_render_target_cache.cc @@ -0,0 +1,6613 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/gpu/d3d12/d3d12_render_target_cache.h" + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "third_party/dxbc/DXBCChecksum.h" + +#include "xenia/base/assert.h" +#include "xenia/base/cvar.h" +#include "xenia/base/logging.h" +#include "xenia/base/math.h" +#include "xenia/base/string.h" +#include "xenia/gpu/d3d12/d3d12_command_processor.h" +#include "xenia/gpu/d3d12/deferred_command_list.h" +#include "xenia/gpu/d3d12/texture_cache.h" +#include "xenia/gpu/draw_util.h" +#include "xenia/gpu/dxbc.h" +#include "xenia/gpu/dxbc_shader_translator.h" +#include "xenia/gpu/gpu_flags.h" +#include "xenia/gpu/trace_writer.h" +#include "xenia/gpu/xenos.h" +#include "xenia/ui/d3d12/d3d12_provider.h" +#include "xenia/ui/d3d12/d3d12_util.h" + +DEFINE_bool( + native_stencil_value_output_d3d12_intel, false, + "Allow stencil reference output usage on Direct3D 12 on Intel GPUs - not " + "working on UHD Graphics 630 as of March 2021 (driver 27.20.0100.8336).", + "GPU"); +// TODO(Triang3l): Make ROV the default when it's optimized better (for +// instance, using static shader modifications to pass render target +// parameters). +DEFINE_string( + render_target_path_d3d12, "", + "Render target emulation path to use on Direct3D 12.\n" + "Use: [any, rtv, rov]\n" + " rtv:\n" + " Host render targets and fixed-function blending and depth / stencil " + "testing, copying between render targets when needed.\n" + " Lower accuracy (limited pixel format support).\n" + " Performance limited primarily by render target layout changes requiring " + "copying, but generally higher.\n" + " rov:\n" + " Manual pixel packing, blending and depth / stencil testing, with free " + "render target layout changes.\n" + " Requires a GPU supporting rasterizer-ordered views.\n" + " Highest accuracy (all pixel formats handled in software).\n" + " Performance limited primarily by overdraw.\n" + " On AMD drivers, currently causes shader compiler crashes in many " + "cases.\n" + " Any other value:\n" + " Choose what is considered the most optimal for the system (currently " + "always RTV because the ROV path is much slower now).", + "GPU"); + +namespace xe { +namespace gpu { +namespace d3d12 { + +// Generated with `xb buildhlsl`. +#include "xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h" +#include "xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h" + +const std::pair + D3D12RenderTargetCache::kResolveCopyShaders[size_t( + draw_util::ResolveCopyShaderIndex::kCount)] = { + {resolve_fast_32bpp_1x2xmsaa_cs, + sizeof(resolve_fast_32bpp_1x2xmsaa_cs)}, + {resolve_fast_32bpp_4xmsaa_cs, sizeof(resolve_fast_32bpp_4xmsaa_cs)}, + {resolve_fast_32bpp_2xres_cs, sizeof(resolve_fast_32bpp_2xres_cs)}, + {resolve_fast_32bpp_3xres_1x2xmsaa_cs, + sizeof(resolve_fast_32bpp_3xres_1x2xmsaa_cs)}, + {resolve_fast_32bpp_3xres_4xmsaa_cs, + sizeof(resolve_fast_32bpp_3xres_4xmsaa_cs)}, + {resolve_fast_64bpp_1x2xmsaa_cs, + sizeof(resolve_fast_64bpp_1x2xmsaa_cs)}, + {resolve_fast_64bpp_4xmsaa_cs, sizeof(resolve_fast_64bpp_4xmsaa_cs)}, + {resolve_fast_64bpp_2xres_cs, sizeof(resolve_fast_64bpp_2xres_cs)}, + {resolve_fast_64bpp_3xres_cs, sizeof(resolve_fast_64bpp_3xres_cs)}, + {resolve_full_8bpp_cs, sizeof(resolve_full_8bpp_cs)}, + {resolve_full_8bpp_2xres_cs, sizeof(resolve_full_8bpp_2xres_cs)}, + {resolve_full_8bpp_3xres_cs, sizeof(resolve_full_8bpp_3xres_cs)}, + {resolve_full_16bpp_cs, sizeof(resolve_full_16bpp_cs)}, + {resolve_full_16bpp_2xres_cs, sizeof(resolve_full_16bpp_2xres_cs)}, + {resolve_full_16bpp_from_32bpp_3xres_cs, + sizeof(resolve_full_16bpp_from_32bpp_3xres_cs)}, + {resolve_full_16bpp_from_64bpp_3xres_cs, + sizeof(resolve_full_16bpp_from_64bpp_3xres_cs)}, + {resolve_full_32bpp_cs, sizeof(resolve_full_32bpp_cs)}, + {resolve_full_32bpp_2xres_cs, sizeof(resolve_full_32bpp_2xres_cs)}, + {resolve_full_32bpp_from_32bpp_3xres_cs, + sizeof(resolve_full_32bpp_from_32bpp_3xres_cs)}, + {resolve_full_32bpp_from_64bpp_3xres_cs, + sizeof(resolve_full_32bpp_from_64bpp_3xres_cs)}, + {resolve_full_64bpp_cs, sizeof(resolve_full_64bpp_cs)}, + {resolve_full_64bpp_2xres_cs, sizeof(resolve_full_64bpp_2xres_cs)}, + {resolve_full_64bpp_from_32bpp_3xres_cs, + sizeof(resolve_full_64bpp_from_32bpp_3xres_cs)}, + {resolve_full_64bpp_from_64bpp_3xres_cs, + sizeof(resolve_full_64bpp_from_64bpp_3xres_cs)}, + {resolve_full_128bpp_cs, sizeof(resolve_full_128bpp_cs)}, + {resolve_full_128bpp_2xres_cs, sizeof(resolve_full_128bpp_2xres_cs)}, + {resolve_full_128bpp_from_32bpp_3xres_cs, + sizeof(resolve_full_128bpp_from_32bpp_3xres_cs)}, + {resolve_full_128bpp_from_64bpp_3xres_cs, + sizeof(resolve_full_128bpp_from_64bpp_3xres_cs)}, +}; + +const uint32_t D3D12RenderTargetCache::kTransferUsedRootParameters[size_t( + TransferRootSignatureIndex::kCount)] = { + // kColor + kTransferUsedRootParameterColorSRVBit | + kTransferUsedRootParameterAddressConstantBit, + // kDepth + kTransferUsedRootParameterDepthSRVBit | + kTransferUsedRootParameterAddressConstantBit, + // kDepthStencil + kTransferUsedRootParameterDepthSRVBit | + kTransferUsedRootParameterStencilSRVBit | + kTransferUsedRootParameterAddressConstantBit, + // kColorToStencilBit + kTransferUsedRootParameterStencilMaskConstantBit | + kTransferUsedRootParameterColorSRVBit | + kTransferUsedRootParameterAddressConstantBit, + // kStencilToStencilBit + kTransferUsedRootParameterStencilMaskConstantBit | + kTransferUsedRootParameterStencilSRVBit | + kTransferUsedRootParameterAddressConstantBit, + // kColorAndHostDepth + kTransferUsedRootParameterColorSRVBit | + kTransferUsedRootParameterAddressConstantBit | + kTransferUsedRootParameterHostDepthSRVBit | + kTransferUsedRootParameterHostDepthAddressConstantBit, + // kDepthAndHostDepth + kTransferUsedRootParameterDepthSRVBit | + kTransferUsedRootParameterAddressConstantBit | + kTransferUsedRootParameterHostDepthSRVBit | + kTransferUsedRootParameterHostDepthAddressConstantBit, + // kDepthStencilAndHostDepth + kTransferUsedRootParameterDepthSRVBit | + kTransferUsedRootParameterStencilSRVBit | + kTransferUsedRootParameterAddressConstantBit | + kTransferUsedRootParameterHostDepthSRVBit | + kTransferUsedRootParameterHostDepthAddressConstantBit, +}; + +const D3D12RenderTargetCache::TransferModeInfo + D3D12RenderTargetCache::kTransferModes[size_t(TransferMode::kCount)] = { + // kColorToDepth + {TransferOutput::kDepth, TransferRootSignatureIndex::kColor, + TransferRootSignatureIndex::kColor}, + // kColorToColor + {TransferOutput::kColor, TransferRootSignatureIndex::kColor, + TransferRootSignatureIndex::kColor}, + // kDepthToDepth + {TransferOutput::kDepth, TransferRootSignatureIndex::kDepth, + TransferRootSignatureIndex::kDepthStencil}, + // kDepthToColor + {TransferOutput::kColor, TransferRootSignatureIndex::kDepthStencil, + TransferRootSignatureIndex::kDepthStencil}, + // kColorToStencilBit + {TransferOutput::kStencilBit, + TransferRootSignatureIndex::kColorToStencilBit, + TransferRootSignatureIndex::kColorToStencilBit}, + // kDepthToStencilBit + {TransferOutput::kStencilBit, + TransferRootSignatureIndex::kStencilToStencilBit, + TransferRootSignatureIndex::kStencilToStencilBit}, + // kColorAndHostDepthToDepth + {TransferOutput::kDepth, TransferRootSignatureIndex::kColorAndHostDepth, + TransferRootSignatureIndex::kColorAndHostDepth}, + // kDepthAndHostDepthToDepth + {TransferOutput::kDepth, TransferRootSignatureIndex::kDepthAndHostDepth, + TransferRootSignatureIndex::kDepthStencilAndHostDepth}, +}; + +const std::pair + D3D12RenderTargetCache::kResolveROVClear32bppShaders[3] = { + {resolve_clear_32bpp_cs, sizeof(resolve_clear_32bpp_cs)}, + {resolve_clear_32bpp_2xres_cs, sizeof(resolve_clear_32bpp_2xres_cs)}, + {resolve_clear_32bpp_3xres_cs, sizeof(resolve_clear_32bpp_3xres_cs)}, +}; + +const std::pair + D3D12RenderTargetCache::kResolveROVClear64bppShaders[3] = { + {resolve_clear_64bpp_cs, sizeof(resolve_clear_64bpp_cs)}, + {resolve_clear_64bpp_2xres_cs, sizeof(resolve_clear_64bpp_2xres_cs)}, + {resolve_clear_64bpp_3xres_cs, sizeof(resolve_clear_64bpp_3xres_cs)}, +}; + +D3D12RenderTargetCache::~D3D12RenderTargetCache() { Shutdown(true); } + +bool D3D12RenderTargetCache::Initialize() { + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + + if (cvars::render_target_path_d3d12 == "rtv") { + path_ = Path::kHostRenderTargets; + } else if (cvars::render_target_path_d3d12 == "rov") { + path_ = Path::kPixelShaderInterlock; + } else { +#if 1 + // The ROV path is currently much slower generally. + // TODO(Triang3l): Make ROV the default when it's optimized better (for + // instance, using static shader modifications to pass render target + // parameters). + path_ = Path::kHostRenderTargets; +#else + // The AMD shader compiler crashes very often with Xenia's custom + // output-merger code as of March 2021. + path_ = + provider.GetAdapterVendorID() == ui::GraphicsProvider::GpuVendorID::kAMD + ? Path::kHostRenderTargets + : Path::kPixelShaderInterlock; +#endif + } + if (path_ == Path::kPixelShaderInterlock && + !provider.AreRasterizerOrderedViewsSupported()) { + path_ = Path::kHostRenderTargets; + } + + uint32_t config_resolution_scale = + uint32_t(std::max(cvars::draw_resolution_scale, int32_t(1))); + resolution_scale_ = + std::min(std::min(config_resolution_scale, + TextureCache::GetMaxDrawResolutionScale(provider)), + uint32_t(3)); + if (resolution_scale_ != config_resolution_scale) { + XELOGW( + "D3D12RenderTargetCache: {}x resolution scale not supported by the " + "device or the emulator, reducing to {}x", + config_resolution_scale, resolution_scale_); + } + + // Create the buffer for reinterpreting EDRAM contents. + uint32_t edram_buffer_size = + xenos::kEdramSizeBytes * resolution_scale_ * resolution_scale_; + D3D12_RESOURCE_DESC edram_buffer_desc; + ui::d3d12::util::FillBufferResourceDesc( + edram_buffer_desc, edram_buffer_size, + D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS); + // The first operation will likely be depth self-comparison with host render + // targets or drawing with ROV. + edram_buffer_state_ = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; + // Creating zeroed for stable initial value with ROV (though on a real + // console it has to be cleared anyway probably) and not to leak irrelevant + // data to trace dumps when not covered by host render targets entirely. + if (FAILED(device->CreateCommittedResource( + &ui::d3d12::util::kHeapPropertiesDefault, D3D12_HEAP_FLAG_NONE, + &edram_buffer_desc, edram_buffer_state_, nullptr, + IID_PPV_ARGS(&edram_buffer_)))) { + XELOGE("D3D12RenderTargetCache: Failed to create the EDRAM buffer"); + Shutdown(); + return false; + } + edram_buffer_->SetName(L"EDRAM Buffer"); + edram_buffer_modification_status_ = + EdramBufferModificationStatus::kUnmodified; + + // Create non-shader-visible descriptors of the EDRAM buffer for copying. + D3D12_DESCRIPTOR_HEAP_DESC edram_buffer_descriptor_heap_desc; + edram_buffer_descriptor_heap_desc.Type = + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV; + edram_buffer_descriptor_heap_desc.NumDescriptors = + uint32_t(EdramBufferDescriptorIndex::kCount); + edram_buffer_descriptor_heap_desc.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE; + edram_buffer_descriptor_heap_desc.NodeMask = 0; + if (FAILED(device->CreateDescriptorHeap( + &edram_buffer_descriptor_heap_desc, + IID_PPV_ARGS(&edram_buffer_descriptor_heap_)))) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the descriptor heap for " + "EDRAM buffer views"); + Shutdown(); + return false; + } + edram_buffer_descriptor_heap_start_ = + edram_buffer_descriptor_heap_->GetCPUDescriptorHandleForHeapStart(); + ui::d3d12::util::CreateBufferRawSRV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kRawSRV)), + edram_buffer_, edram_buffer_size); + ui::d3d12::util::CreateBufferTypedSRV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32UintSRV)), + edram_buffer_, DXGI_FORMAT_R32_UINT, edram_buffer_size >> 2); + ui::d3d12::util::CreateBufferTypedSRV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32G32UintSRV)), + edram_buffer_, DXGI_FORMAT_R32G32_UINT, edram_buffer_size >> 3); + ui::d3d12::util::CreateBufferTypedSRV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32G32B32A32UintSRV)), + edram_buffer_, DXGI_FORMAT_R32G32B32A32_UINT, edram_buffer_size >> 4); + ui::d3d12::util::CreateBufferRawUAV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kRawUAV)), + edram_buffer_, edram_buffer_size); + ui::d3d12::util::CreateBufferTypedUAV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32UintUAV)), + edram_buffer_, DXGI_FORMAT_R32_UINT, edram_buffer_size >> 2); + ui::d3d12::util::CreateBufferTypedUAV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32G32UintUAV)), + edram_buffer_, DXGI_FORMAT_R32G32_UINT, edram_buffer_size >> 3); + ui::d3d12::util::CreateBufferTypedUAV( + device, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32G32B32A32UintUAV)), + edram_buffer_, DXGI_FORMAT_R32G32B32A32_UINT, edram_buffer_size >> 4); + + // Create the resolve copying root signature. + D3D12_ROOT_PARAMETER resolve_copy_root_parameters[3]; + // Parameter 0 is constants. + resolve_copy_root_parameters[0].ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + resolve_copy_root_parameters[0].Constants.ShaderRegister = 0; + resolve_copy_root_parameters[0].Constants.RegisterSpace = 0; + // Binding all of the shared memory at 1x resolution, portions with scaled + // resolution. + resolve_copy_root_parameters[0].Constants.Num32BitValues = + (resolution_scale_ > 1 + ? sizeof(draw_util::ResolveCopyShaderConstants::DestRelative) + : sizeof(draw_util::ResolveCopyShaderConstants)) / + sizeof(uint32_t); + resolve_copy_root_parameters[0].ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + // Parameter 1 is the destination (shared memory). + D3D12_DESCRIPTOR_RANGE resolve_copy_dest_range; + resolve_copy_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; + resolve_copy_dest_range.NumDescriptors = 1; + resolve_copy_dest_range.BaseShaderRegister = 0; + resolve_copy_dest_range.RegisterSpace = 0; + resolve_copy_dest_range.OffsetInDescriptorsFromTableStart = 0; + resolve_copy_root_parameters[1].ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + resolve_copy_root_parameters[1].DescriptorTable.NumDescriptorRanges = 1; + resolve_copy_root_parameters[1].DescriptorTable.pDescriptorRanges = + &resolve_copy_dest_range; + resolve_copy_root_parameters[1].ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + // Parameter 2 is the source (EDRAM). + D3D12_DESCRIPTOR_RANGE resolve_copy_source_range; + resolve_copy_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + resolve_copy_source_range.NumDescriptors = 1; + resolve_copy_source_range.BaseShaderRegister = 0; + resolve_copy_source_range.RegisterSpace = 0; + resolve_copy_source_range.OffsetInDescriptorsFromTableStart = 0; + resolve_copy_root_parameters[2].ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + resolve_copy_root_parameters[2].DescriptorTable.NumDescriptorRanges = 1; + resolve_copy_root_parameters[2].DescriptorTable.pDescriptorRanges = + &resolve_copy_source_range; + resolve_copy_root_parameters[2].ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + D3D12_ROOT_SIGNATURE_DESC resolve_copy_root_signature_desc; + resolve_copy_root_signature_desc.NumParameters = + UINT(xe::countof(resolve_copy_root_parameters)); + resolve_copy_root_signature_desc.pParameters = resolve_copy_root_parameters; + resolve_copy_root_signature_desc.NumStaticSamplers = 0; + resolve_copy_root_signature_desc.pStaticSamplers = nullptr; + resolve_copy_root_signature_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; + resolve_copy_root_signature_ = ui::d3d12::util::CreateRootSignature( + provider, resolve_copy_root_signature_desc); + if (resolve_copy_root_signature_ == nullptr) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the resolve copy root " + "signature"); + Shutdown(); + return false; + } + + // Create the resolve copying pipelines. + for (size_t i = 0; i < size_t(draw_util::ResolveCopyShaderIndex::kCount); + ++i) { + // Somewhat verification whether resolve_copy_shaders_ is up to date. + assert_not_null(kResolveCopyShaders[i].first); + const draw_util::ResolveCopyShaderInfo& resolve_copy_shader_info = + draw_util::resolve_copy_shader_info[i]; + if (resolve_copy_shader_info.resolution_scale != resolution_scale_) { + continue; + } + const std::pair& resolve_copy_shader = + kResolveCopyShaders[i]; + ID3D12PipelineState* resolve_copy_pipeline = + ui::d3d12::util::CreateComputePipeline( + device, resolve_copy_shader.first, resolve_copy_shader.second, + resolve_copy_root_signature_); + if (resolve_copy_pipeline == nullptr) { + XELOGE( + "D3D12RenderTargetCache: Failed to create {} resolve copy pipeline", + resolve_copy_shader_info.debug_name); + Shutdown(); + return false; + } + std::u16string resolve_copy_pipeline_name = + xe::to_utf16(resolve_copy_shader_info.debug_name); + resolve_copy_pipeline->SetName( + reinterpret_cast(resolve_copy_pipeline_name.c_str())); + resolve_copy_pipelines_[i] = resolve_copy_pipeline; + } + + // Using the cvar on emulator initialization so used pipelines are consistent + // across different titles launched in one emulator instance. + use_stencil_reference_output_ = + cvars::native_stencil_value_output && + provider.IsPSSpecifiedStencilReferenceSupported() && + (cvars::native_stencil_value_output_d3d12_intel || + provider.GetAdapterVendorID() != + ui::GraphicsProvider::GpuVendorID::kIntel); + + if (path_ == Path::kHostRenderTargets) { + // Host render targets. + + gamma_render_target_as_srgb_ = cvars::gamma_render_target_as_srgb; + + depth_float24_conversion_ = GetConfigDepthFloat24Conversion(); + + // Check if 2x MSAA is supported or needs to be emulated with 4x MSAA + // instead. + if (cvars::native_2x_msaa) { + msaa_2x_supported_ = true; + static const DXGI_FORMAT kRenderTargetDXGIFormats[] = { + DXGI_FORMAT_R16G16B16A16_FLOAT, + DXGI_FORMAT_R16G16B16A16_SNORM, + DXGI_FORMAT_R32G32_FLOAT, + DXGI_FORMAT_D32_FLOAT_S8X24_UINT, + DXGI_FORMAT_R10G10B10A2_UNORM, + DXGI_FORMAT_R8G8B8A8_UNORM, + DXGI_FORMAT_R16G16_FLOAT, + DXGI_FORMAT_R16G16_SNORM, + DXGI_FORMAT_R32_FLOAT, + DXGI_FORMAT_D24_UNORM_S8_UINT, + // For ownership transfer. + DXGI_FORMAT_R16G16B16A16_UINT, + DXGI_FORMAT_R32G32_UINT, + DXGI_FORMAT_R16G16_UINT, + DXGI_FORMAT_R32_UINT, + }; + D3D12_FEATURE_DATA_MULTISAMPLE_QUALITY_LEVELS multisample_quality_levels; + multisample_quality_levels.SampleCount = 2; + multisample_quality_levels.Flags = + D3D12_MULTISAMPLE_QUALITY_LEVELS_FLAG_NONE; + for (size_t i = 0; i < xe::countof(kRenderTargetDXGIFormats); ++i) { + multisample_quality_levels.Format = kRenderTargetDXGIFormats[i]; + multisample_quality_levels.NumQualityLevels = 0; + if (FAILED(device->CheckFeatureSupport( + D3D12_FEATURE_MULTISAMPLE_QUALITY_LEVELS, + &multisample_quality_levels, + sizeof(multisample_quality_levels))) || + !multisample_quality_levels.NumQualityLevels) { + msaa_2x_supported_ = false; + break; + } + } + } else { + msaa_2x_supported_ = false; + } + if (!msaa_2x_supported_) { + XELOGW( + "2x MSAA is not supported, emulated via top-left and bottom-right " + "samples of 4x MSAA"); + } + + descriptor_pool_color_ = + std::make_unique( + provider, D3D12_DESCRIPTOR_HEAP_TYPE_RTV, 11); + descriptor_pool_depth_ = + std::make_unique( + provider, D3D12_DESCRIPTOR_HEAP_TYPE_DSV, 11); + descriptor_pool_srv_ = std::make_unique( + provider, D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV, 11); + + // Create null render target descriptors for gaps, must be fully typed + // (though in pipeline states, DXGI_FORMAT_UNKNOWN must be used instead - + // this would also cause a mismatching format error in the debug layer, but + // it's a bug in the debug layer itself - needs to be suppressed, and + // already fixed in some version of Windows). + null_rtv_descriptor_ss_ = descriptor_pool_color_->AllocateDescriptor(); + null_rtv_descriptor_ms_ = descriptor_pool_color_->AllocateDescriptor(); + if (!null_rtv_descriptor_ss_ || !null_rtv_descriptor_ms_) { + Shutdown(); + return false; + } + D3D12_RENDER_TARGET_VIEW_DESC null_rtv_desc; + // The format doesn't matter, but it must be bindable as a render target, + // not DXGI_FORMAT_UNKNOWN. + null_rtv_desc.Format = DXGI_FORMAT_R8G8B8A8_UNORM; + null_rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2D; + null_rtv_desc.Texture2D.MipSlice = 0; + null_rtv_desc.Texture2D.PlaneSlice = 0; + device->CreateRenderTargetView(nullptr, &null_rtv_desc, + null_rtv_descriptor_ss_.GetHandle()); + null_rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2DMS; + device->CreateRenderTargetView(nullptr, &null_rtv_desc, + null_rtv_descriptor_ms_.GetHandle()); + + // For host depth -> same depth transfers, host depth storing root signature + // and pipelines. + D3D12_ROOT_PARAMETER + host_depth_store_root_parameters[kHostDepthStoreRootParameterCount]; + // Rectangle constant. + D3D12_ROOT_PARAMETER& host_depth_store_root_rectangle_constant = + host_depth_store_root_parameters + [kHostDepthStoreRootParameterRectangleConstant]; + host_depth_store_root_rectangle_constant.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + host_depth_store_root_rectangle_constant.Constants.ShaderRegister = 0; + host_depth_store_root_rectangle_constant.Constants.RegisterSpace = 0; + host_depth_store_root_rectangle_constant.Constants.Num32BitValues = + sizeof(HostDepthStoreRectangleConstant) / sizeof(uint32_t); + host_depth_store_root_rectangle_constant.ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + // Render target constant. + D3D12_ROOT_PARAMETER& host_depth_store_root_render_target_constant = + host_depth_store_root_parameters + [kHostDepthStoreRootParameterRenderTargetConstant]; + host_depth_store_root_render_target_constant.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + host_depth_store_root_render_target_constant.Constants.ShaderRegister = 1; + host_depth_store_root_render_target_constant.Constants.RegisterSpace = 0; + host_depth_store_root_render_target_constant.Constants.Num32BitValues = + sizeof(HostDepthStoreRenderTargetConstant) / sizeof(uint32_t); + host_depth_store_root_render_target_constant.ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + // Source. + D3D12_DESCRIPTOR_RANGE host_depth_store_root_source_range; + host_depth_store_root_source_range.RangeType = + D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + host_depth_store_root_source_range.NumDescriptors = 1; + host_depth_store_root_source_range.BaseShaderRegister = 0; + host_depth_store_root_source_range.RegisterSpace = 0; + host_depth_store_root_source_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_ROOT_PARAMETER& host_depth_store_root_source = + host_depth_store_root_parameters[kHostDepthStoreRootParameterSource]; + host_depth_store_root_source.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + host_depth_store_root_source.DescriptorTable.NumDescriptorRanges = 1; + host_depth_store_root_source.DescriptorTable.pDescriptorRanges = + &host_depth_store_root_source_range; + host_depth_store_root_source.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + // Destination. + D3D12_DESCRIPTOR_RANGE host_depth_store_root_dest_range; + host_depth_store_root_dest_range.RangeType = + D3D12_DESCRIPTOR_RANGE_TYPE_UAV; + host_depth_store_root_dest_range.NumDescriptors = 1; + host_depth_store_root_dest_range.BaseShaderRegister = 0; + host_depth_store_root_dest_range.RegisterSpace = 0; + host_depth_store_root_dest_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_ROOT_PARAMETER& host_depth_store_root_dest = + host_depth_store_root_parameters[kHostDepthStoreRootParameterDest]; + host_depth_store_root_dest.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + host_depth_store_root_dest.DescriptorTable.NumDescriptorRanges = 1; + host_depth_store_root_dest.DescriptorTable.pDescriptorRanges = + &host_depth_store_root_dest_range; + host_depth_store_root_dest.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + // Root signature. + D3D12_ROOT_SIGNATURE_DESC host_depth_store_root_desc; + host_depth_store_root_desc.NumParameters = + UINT(xe::countof(host_depth_store_root_parameters)); + host_depth_store_root_desc.pParameters = host_depth_store_root_parameters; + host_depth_store_root_desc.NumStaticSamplers = 0; + host_depth_store_root_desc.pStaticSamplers = nullptr; + host_depth_store_root_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; + host_depth_store_root_signature_ = ui::d3d12::util::CreateRootSignature( + provider, host_depth_store_root_desc); + if (!host_depth_store_root_signature_) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the host depth storing " + "root signature"); + Shutdown(); + return false; + } + // Pipelines. + // 1 sample. + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k1X)] = + ui::d3d12::util::CreateComputePipeline( + device, host_depth_store_1xmsaa_cs, + sizeof(host_depth_store_1xmsaa_cs), + host_depth_store_root_signature_); + if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k1X)]) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the 1-sample host depth " + "storing pipeline"); + Shutdown(); + return false; + } + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k1X)]->SetName( + L"Host Depth Store 1xMSAA"); + // 2 samples. + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k2X)] = + ui::d3d12::util::CreateComputePipeline( + device, host_depth_store_2xmsaa_cs, + sizeof(host_depth_store_2xmsaa_cs), + host_depth_store_root_signature_); + if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k2X)]) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the 2-sample host depth " + "storing pipeline"); + Shutdown(); + return false; + } + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k2X)]->SetName( + L"Host Depth Store 2xMSAA"); + // 4 samples. + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X)] = + ui::d3d12::util::CreateComputePipeline( + device, host_depth_store_4xmsaa_cs, + sizeof(host_depth_store_4xmsaa_cs), + host_depth_store_root_signature_); + if (!host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X)]) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the 4-sample host depth " + "storing pipeline"); + Shutdown(); + return false; + } + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X)]->SetName( + L"Host Depth Store 4xMSAA"); + + // Transfer and clear vertex buffer, for quads of up to tile granularity. + transfer_vertex_buffer_pool_ = + std::make_unique( + provider, + std::max(ui::d3d12::D3D12UploadBufferPool::kDefaultPageSize, + sizeof(float) * 2 * 6 * + Transfer::kMaxCutoutBorderRectangles * + xenos::kEdramTileCount)); + + // Transfer root signatures. + D3D12_DESCRIPTOR_RANGE transfer_root_color_srv_range; + transfer_root_color_srv_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + transfer_root_color_srv_range.NumDescriptors = 1; + transfer_root_color_srv_range.BaseShaderRegister = + kTransferSRVRegisterColor; + transfer_root_color_srv_range.RegisterSpace = 0; + transfer_root_color_srv_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_DESCRIPTOR_RANGE transfer_root_depth_srv_range; + transfer_root_depth_srv_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + transfer_root_depth_srv_range.NumDescriptors = 1; + transfer_root_depth_srv_range.BaseShaderRegister = + kTransferSRVRegisterDepth; + transfer_root_depth_srv_range.RegisterSpace = 0; + transfer_root_depth_srv_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_DESCRIPTOR_RANGE transfer_root_stencil_srv_range; + transfer_root_stencil_srv_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + transfer_root_stencil_srv_range.NumDescriptors = 1; + transfer_root_stencil_srv_range.BaseShaderRegister = + kTransferSRVRegisterStencil; + transfer_root_stencil_srv_range.RegisterSpace = 0; + transfer_root_stencil_srv_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_DESCRIPTOR_RANGE transfer_root_host_depth_srv_range; + transfer_root_host_depth_srv_range.RangeType = + D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + transfer_root_host_depth_srv_range.NumDescriptors = 1; + transfer_root_host_depth_srv_range.BaseShaderRegister = + kTransferSRVRegisterHostDepth; + transfer_root_host_depth_srv_range.RegisterSpace = 0; + transfer_root_host_depth_srv_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_ROOT_PARAMETER + transfer_root_parameters[kTransferUsedRootParameterCount]; + D3D12_ROOT_SIGNATURE_DESC transfer_root_desc; + transfer_root_desc.pParameters = transfer_root_parameters; + transfer_root_desc.NumStaticSamplers = 0; + transfer_root_desc.pStaticSamplers = nullptr; + transfer_root_desc.Flags = + D3D12_ROOT_SIGNATURE_FLAG_ALLOW_INPUT_ASSEMBLER_INPUT_LAYOUT; + for (size_t i = 0; i < size_t(TransferRootSignatureIndex::kCount); ++i) { + uint32_t transfer_root_mask = kTransferUsedRootParameters[i]; + // Stencil mask constant. + if (transfer_root_mask & + kTransferUsedRootParameterStencilMaskConstantBit) { + D3D12_ROOT_PARAMETER& transfer_root_stencil_mask_constant = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterStencilMaskConstantBit - 1))]; + transfer_root_stencil_mask_constant.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + transfer_root_stencil_mask_constant.Constants.ShaderRegister = + kTransferCBVRegisterStencilMask; + transfer_root_stencil_mask_constant.Constants.RegisterSpace = 0; + transfer_root_stencil_mask_constant.Constants.Num32BitValues = 1; + transfer_root_stencil_mask_constant.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Color SRV. + if (transfer_root_mask & kTransferUsedRootParameterColorSRVBit) { + D3D12_ROOT_PARAMETER& transfer_root_color_srv = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterColorSRVBit - 1))]; + transfer_root_color_srv.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + transfer_root_color_srv.DescriptorTable.NumDescriptorRanges = 1; + transfer_root_color_srv.DescriptorTable.pDescriptorRanges = + &transfer_root_color_srv_range; + transfer_root_color_srv.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Depth SRV. + if (transfer_root_mask & kTransferUsedRootParameterDepthSRVBit) { + D3D12_ROOT_PARAMETER& transfer_root_depth_srv = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterDepthSRVBit - 1))]; + transfer_root_depth_srv.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + transfer_root_depth_srv.DescriptorTable.NumDescriptorRanges = 1; + transfer_root_depth_srv.DescriptorTable.pDescriptorRanges = + &transfer_root_depth_srv_range; + transfer_root_depth_srv.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Stencil SRV. + if (transfer_root_mask & kTransferUsedRootParameterStencilSRVBit) { + D3D12_ROOT_PARAMETER& transfer_root_stencil_srv = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterStencilSRVBit - 1))]; + transfer_root_stencil_srv.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + transfer_root_stencil_srv.DescriptorTable.NumDescriptorRanges = 1; + transfer_root_stencil_srv.DescriptorTable.pDescriptorRanges = + &transfer_root_stencil_srv_range; + transfer_root_stencil_srv.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Address constant. + if (transfer_root_mask & kTransferUsedRootParameterAddressConstantBit) { + D3D12_ROOT_PARAMETER& transfer_root_address_constant = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterAddressConstantBit - 1))]; + transfer_root_address_constant.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + transfer_root_address_constant.Constants.ShaderRegister = + kTransferCBVRegisterAddress; + transfer_root_address_constant.Constants.RegisterSpace = 0; + transfer_root_address_constant.Constants.Num32BitValues = + sizeof(TransferAddressConstant) / sizeof(uint32_t); + transfer_root_address_constant.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Host depth SRV. + if (transfer_root_mask & kTransferUsedRootParameterHostDepthSRVBit) { + D3D12_ROOT_PARAMETER& transfer_root_host_depth_srv = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterHostDepthSRVBit - 1))]; + transfer_root_host_depth_srv.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + transfer_root_host_depth_srv.DescriptorTable.NumDescriptorRanges = 1; + transfer_root_host_depth_srv.DescriptorTable.pDescriptorRanges = + &transfer_root_host_depth_srv_range; + transfer_root_host_depth_srv.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + // Host depth address constant. + if (transfer_root_mask & + kTransferUsedRootParameterHostDepthAddressConstantBit) { + D3D12_ROOT_PARAMETER& transfer_root_host_address_constant = + transfer_root_parameters[xe::bit_count( + transfer_root_mask & + (kTransferUsedRootParameterHostDepthAddressConstantBit - 1))]; + transfer_root_host_address_constant.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + transfer_root_host_address_constant.Constants.ShaderRegister = + kTransferCBVRegisterHostDepthAddress; + transfer_root_host_address_constant.Constants.RegisterSpace = 0; + transfer_root_host_address_constant.Constants.Num32BitValues = + sizeof(TransferAddressConstant) / sizeof(uint32_t); + transfer_root_host_address_constant.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + } + transfer_root_desc.NumParameters = xe::bit_count(transfer_root_mask); + assert_true(transfer_root_desc.NumParameters <= + kTransferUsedRootParameterCount); + transfer_root_signatures_[i] = + ui::d3d12::util::CreateRootSignature(provider, transfer_root_desc); + if (!transfer_root_signatures_[i]) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the render target " + "ownership transfer root signature {:X}", + transfer_root_mask); + Shutdown(); + return false; + } + } + + // Dumping root signatures. + D3D12_DESCRIPTOR_RANGE dump_root_source_range; + dump_root_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + dump_root_source_range.NumDescriptors = 1; + dump_root_source_range.BaseShaderRegister = 0; + dump_root_source_range.RegisterSpace = 0; + dump_root_source_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_DESCRIPTOR_RANGE dump_root_stencil_range; + dump_root_stencil_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; + dump_root_stencil_range.NumDescriptors = 1; + dump_root_stencil_range.BaseShaderRegister = 1; + dump_root_stencil_range.RegisterSpace = 0; + dump_root_stencil_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_DESCRIPTOR_RANGE dump_root_edram_range; + dump_root_edram_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; + dump_root_edram_range.NumDescriptors = 1; + dump_root_edram_range.BaseShaderRegister = 0; + dump_root_edram_range.RegisterSpace = 0; + dump_root_edram_range.OffsetInDescriptorsFromTableStart = 0; + D3D12_ROOT_PARAMETER + dump_root_color_parameters[kDumpRootParameterColorCount]; + D3D12_ROOT_PARAMETER + dump_root_depth_parameters[kDumpRootParameterDepthCount]; + for (uint32_t i = 0; i < 2; ++i) { + // Offsets. + D3D12_ROOT_PARAMETER& dump_root_offsets = + i ? dump_root_depth_parameters[kDumpRootParameterOffsets] + : dump_root_color_parameters[kDumpRootParameterOffsets]; + dump_root_offsets.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + dump_root_offsets.Constants.ShaderRegister = kDumpCbufferOffsets; + dump_root_offsets.Constants.RegisterSpace = 0; + dump_root_offsets.Constants.Num32BitValues = + sizeof(DumpOffsets) / sizeof(uint32_t); + dump_root_offsets.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + // Source. + D3D12_ROOT_PARAMETER& dump_root_source = + i ? dump_root_depth_parameters[kDumpRootParameterSource] + : dump_root_color_parameters[kDumpRootParameterSource]; + dump_root_source.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + dump_root_source.DescriptorTable.NumDescriptorRanges = 1; + dump_root_source.DescriptorTable.pDescriptorRanges = + &dump_root_source_range; + dump_root_source.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + // Stencil. + if (i) { + D3D12_ROOT_PARAMETER& dump_root_stencil = + dump_root_depth_parameters[kDumpRootParameterDepthStencil]; + dump_root_stencil.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + dump_root_stencil.DescriptorTable.NumDescriptorRanges = 1; + dump_root_stencil.DescriptorTable.pDescriptorRanges = + &dump_root_stencil_range; + dump_root_stencil.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + } + // Pitches. + D3D12_ROOT_PARAMETER& dump_root_pitches = + i ? dump_root_depth_parameters[kDumpRootParameterDepthPitches] + : dump_root_color_parameters[kDumpRootParameterColorPitches]; + dump_root_pitches.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + dump_root_pitches.Constants.ShaderRegister = kDumpCbufferPitches; + dump_root_pitches.Constants.RegisterSpace = 0; + dump_root_pitches.Constants.Num32BitValues = + sizeof(DumpPitches) / sizeof(uint32_t); + dump_root_pitches.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + // EDRAM. + D3D12_ROOT_PARAMETER& dump_root_edram = + i ? dump_root_depth_parameters[kDumpRootParameterDepthEdram] + : dump_root_color_parameters[kDumpRootParameterColorEdram]; + dump_root_edram.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + dump_root_edram.DescriptorTable.NumDescriptorRanges = 1; + dump_root_edram.DescriptorTable.pDescriptorRanges = + &dump_root_edram_range; + dump_root_edram.ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; + } + D3D12_ROOT_SIGNATURE_DESC dump_root_desc; + dump_root_desc.NumParameters = + UINT(xe::countof(dump_root_color_parameters)); + dump_root_desc.pParameters = dump_root_color_parameters; + dump_root_desc.NumStaticSamplers = 0; + dump_root_desc.pStaticSamplers = nullptr; + dump_root_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; + dump_root_signature_color_ = + ui::d3d12::util::CreateRootSignature(provider, dump_root_desc); + if (!dump_root_signature_color_) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the color render target " + "dumping root signature"); + Shutdown(); + return false; + } + dump_root_desc.NumParameters = + UINT(xe::countof(dump_root_depth_parameters)); + dump_root_desc.pParameters = dump_root_depth_parameters; + dump_root_signature_depth_ = + ui::d3d12::util::CreateRootSignature(provider, dump_root_desc); + if (!dump_root_signature_depth_) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the depth render target " + "dumping root signature"); + Shutdown(); + return false; + } + + // k_32_FLOAT and k_32_32_FLOAT clear root signature and pipelines. + D3D12_ROOT_PARAMETER uint32_rtv_clear_root_constants; + uint32_rtv_clear_root_constants.ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + uint32_rtv_clear_root_constants.Constants.ShaderRegister = 0; + uint32_rtv_clear_root_constants.Constants.RegisterSpace = 0; + uint32_rtv_clear_root_constants.Constants.Num32BitValues = 2; + uint32_rtv_clear_root_constants.ShaderVisibility = + D3D12_SHADER_VISIBILITY_PIXEL; + D3D12_ROOT_SIGNATURE_DESC uint32_rtv_clear_root_desc; + uint32_rtv_clear_root_desc.NumParameters = 1; + uint32_rtv_clear_root_desc.pParameters = &uint32_rtv_clear_root_constants; + uint32_rtv_clear_root_desc.NumStaticSamplers = 0; + uint32_rtv_clear_root_desc.pStaticSamplers = nullptr; + uint32_rtv_clear_root_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; + uint32_rtv_clear_root_signature_ = ui::d3d12::util::CreateRootSignature( + provider, uint32_rtv_clear_root_desc); + if (!uint32_rtv_clear_root_signature_) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the k_32_FLOAT / " + "k_32_32_FLOAT render target clearing root signature"); + Shutdown(); + return false; + } + D3D12_GRAPHICS_PIPELINE_STATE_DESC uint32_rtv_clear_pipeline_desc = {}; + uint32_rtv_clear_pipeline_desc.pRootSignature = + uint32_rtv_clear_root_signature_; + uint32_rtv_clear_pipeline_desc.VS.pShaderBytecode = fullscreen_vs; + uint32_rtv_clear_pipeline_desc.VS.BytecodeLength = sizeof(fullscreen_vs); + uint32_rtv_clear_pipeline_desc.PS.pShaderBytecode = clear_uint2_ps; + uint32_rtv_clear_pipeline_desc.PS.BytecodeLength = sizeof(clear_uint2_ps); + uint32_rtv_clear_pipeline_desc.BlendState.RenderTarget[0] + .RenderTargetWriteMask = D3D12_COLOR_WRITE_ENABLE_ALL; + uint32_rtv_clear_pipeline_desc.RasterizerState.FillMode = + D3D12_FILL_MODE_SOLID; + uint32_rtv_clear_pipeline_desc.RasterizerState.CullMode = + D3D12_CULL_MODE_NONE; + uint32_rtv_clear_pipeline_desc.RasterizerState.DepthClipEnable = TRUE; + uint32_rtv_clear_pipeline_desc.PrimitiveTopologyType = + D3D12_PRIMITIVE_TOPOLOGY_TYPE_TRIANGLE; + uint32_rtv_clear_pipeline_desc.NumRenderTargets = 1; + for (size_t i = 0; i < 2; ++i) { + uint32_rtv_clear_pipeline_desc.RTVFormats[0] = + GetColorOwnershipTransferDXGIFormat( + i ? xenos::ColorRenderTargetFormat::k_32_32_FLOAT + : xenos::ColorRenderTargetFormat::k_32_FLOAT); + for (size_t j = size_t(xenos::MsaaSamples::k1X); + j <= size_t(xenos::MsaaSamples::k4X); ++j) { + if (xenos::MsaaSamples(j) == xenos::MsaaSamples::k2X && + !msaa_2x_supported_) { + // Using sample 0 as 0 and 3 as 1 for 2x instead. + uint32_rtv_clear_pipeline_desc.SampleMask = 0b1001; + uint32_rtv_clear_pipeline_desc.SampleDesc.Count = 4; + } else { + uint32_rtv_clear_pipeline_desc.SampleMask = UINT_MAX; + uint32_rtv_clear_pipeline_desc.SampleDesc.Count = 1 << j; + } + ID3D12PipelineState* uint32_rtv_clear_pipeline; + if (FAILED(device->CreateGraphicsPipelineState( + &uint32_rtv_clear_pipeline_desc, + IID_PPV_ARGS(&uint32_rtv_clear_pipeline)))) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the {} {}-sample " + "render target clearing pipeline", + i ? "k_32_32_FLOAT" : "k_32_FLOAT", uint32_t(1) << j); + Shutdown(); + return false; + } + uint32_rtv_clear_pipelines_[i][j] = uint32_rtv_clear_pipeline; + std::wstring uint32_rtv_clear_pipeline_name = + fmt::format(L"Resolve Clear {} {}xMSAA", + i ? L"k_32_32_FLOAT" : L"k_32_FLOAT", uint32_t(1) << j); + uint32_rtv_clear_pipeline->SetName( + reinterpret_cast(uint32_rtv_clear_pipeline_name.c_str())); + } + } + + // FXC-compiled depth / stencil dumping shader is ~2 KB, reserve 4 KB for + // some additional space. + built_shader_.reserve(1024); + } else if (path_ == Path::kPixelShaderInterlock) { + // Pixel shader interlock (rasterizer-ordered view). + + // Blending is done in linear space directly in shaders. + gamma_render_target_as_srgb_ = false; + + // Always true float24 depth. + depth_float24_conversion_ = DepthFloat24Conversion::kOnOutputRounding; + + // Only ForcedSampleCount, which doesn't support 2x. + msaa_2x_supported_ = false; + + // Create the resolve EDRAM buffer clearing root signature. + D3D12_ROOT_PARAMETER resolve_rov_clear_root_parameters[2]; + // Parameter 0 is constants. + resolve_rov_clear_root_parameters[0].ParameterType = + D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; + resolve_rov_clear_root_parameters[0].Constants.ShaderRegister = 0; + resolve_rov_clear_root_parameters[0].Constants.RegisterSpace = 0; + // Binding all of the shared memory at 1x resolution, portions with scaled + // resolution. + resolve_rov_clear_root_parameters[0].Constants.Num32BitValues = + sizeof(draw_util::ResolveClearShaderConstants) / sizeof(uint32_t); + resolve_rov_clear_root_parameters[0].ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + // Parameter 1 is the destination (EDRAM). + D3D12_DESCRIPTOR_RANGE resolve_rov_clear_dest_range; + resolve_rov_clear_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; + resolve_rov_clear_dest_range.NumDescriptors = 1; + resolve_rov_clear_dest_range.BaseShaderRegister = 0; + resolve_rov_clear_dest_range.RegisterSpace = 0; + resolve_rov_clear_dest_range.OffsetInDescriptorsFromTableStart = 0; + resolve_rov_clear_root_parameters[1].ParameterType = + D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; + resolve_rov_clear_root_parameters[1].DescriptorTable.NumDescriptorRanges = + 1; + resolve_rov_clear_root_parameters[1].DescriptorTable.pDescriptorRanges = + &resolve_rov_clear_dest_range; + resolve_rov_clear_root_parameters[1].ShaderVisibility = + D3D12_SHADER_VISIBILITY_ALL; + D3D12_ROOT_SIGNATURE_DESC resolve_rov_clear_root_signature_desc; + resolve_rov_clear_root_signature_desc.NumParameters = + UINT(xe::countof(resolve_rov_clear_root_parameters)); + resolve_rov_clear_root_signature_desc.pParameters = + resolve_rov_clear_root_parameters; + resolve_rov_clear_root_signature_desc.NumStaticSamplers = 0; + resolve_rov_clear_root_signature_desc.pStaticSamplers = nullptr; + resolve_rov_clear_root_signature_desc.Flags = + D3D12_ROOT_SIGNATURE_FLAG_NONE; + resolve_rov_clear_root_signature_ = ui::d3d12::util::CreateRootSignature( + provider, resolve_rov_clear_root_signature_desc); + if (resolve_rov_clear_root_signature_ == nullptr) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the resolve EDRAM buffer " + "clear root signature"); + Shutdown(); + return false; + } + + // Create the resolve EDRAM buffer clearing pipelines. + resolve_rov_clear_32bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( + device, kResolveROVClear32bppShaders[resolution_scale_ - 1].first, + kResolveROVClear32bppShaders[resolution_scale_ - 1].second, + resolve_rov_clear_root_signature_); + if (resolve_rov_clear_32bpp_pipeline_ == nullptr) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the 32bpp resolve EDRAM " + "buffer clear pipeline"); + Shutdown(); + return false; + } + resolve_rov_clear_32bpp_pipeline_->SetName(L"Resolve Clear 32bpp"); + resolve_rov_clear_64bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( + device, kResolveROVClear64bppShaders[resolution_scale_ - 1].first, + kResolveROVClear64bppShaders[resolution_scale_ - 1].second, + resolve_rov_clear_root_signature_); + if (resolve_rov_clear_64bpp_pipeline_ == nullptr) { + XELOGE( + "D3D12RenderTargetCache: Failed to create the 64bpp resolve EDRAM " + "buffer clear pipeline"); + Shutdown(); + return false; + } + resolve_rov_clear_64bpp_pipeline_->SetName(L"Resolve Clear 64bpp"); + } else { + assert_unhandled_case(path_); + Shutdown(); + return false; + } + + InitializeCommon(); + + return true; +} + +void D3D12RenderTargetCache::Shutdown(bool from_destructor) { + ui::d3d12::util::ReleaseAndNull(resolve_rov_clear_64bpp_pipeline_); + ui::d3d12::util::ReleaseAndNull(resolve_rov_clear_32bpp_pipeline_); + ui::d3d12::util::ReleaseAndNull(resolve_rov_clear_root_signature_); + + for (size_t i = 0; i < 2; ++i) { + for (size_t j = size_t(xenos::MsaaSamples::k1X); + j <= size_t(xenos::MsaaSamples::k4X); ++j) { + ui::d3d12::util::ReleaseAndNull(uint32_rtv_clear_pipelines_[i][j]); + } + } + ui::d3d12::util::ReleaseAndNull(uint32_rtv_clear_root_signature_); + + for (const auto& dump_pipeline_pair : dump_pipelines_) { + if (dump_pipeline_pair.second) { + dump_pipeline_pair.second->Release(); + } + } + dump_pipelines_.clear(); + ui::d3d12::util::ReleaseAndNull(dump_root_signature_depth_); + ui::d3d12::util::ReleaseAndNull(dump_root_signature_color_); + + for (const auto& transfer_pipeline_array_pair : + transfer_stencil_bit_pipelines_) { + for (ID3D12PipelineState* transfer_pipeline : + transfer_pipeline_array_pair.second) { + if (transfer_pipeline) { + transfer_pipeline->Release(); + } + } + } + transfer_stencil_bit_pipelines_.clear(); + for (const auto& transfer_pipeline_pair : transfer_pipelines_) { + if (transfer_pipeline_pair.second) { + transfer_pipeline_pair.second->Release(); + } + } + transfer_pipelines_.clear(); + for (size_t i = 0; i < xe::countof(transfer_root_signatures_); ++i) { + ui::d3d12::util::ReleaseAndNull(transfer_root_signatures_[i]); + } + + transfer_vertex_buffer_pool_.reset(); + + for (size_t i = 0; i < xe::countof(host_depth_store_pipelines_); ++i) { + ui::d3d12::util::ReleaseAndNull(host_depth_store_pipelines_[i]); + } + ui::d3d12::util::ReleaseAndNull(host_depth_store_root_signature_); + + null_rtv_descriptor_ms_.Free(); + null_rtv_descriptor_ss_.Free(); + descriptor_pool_srv_.reset(); + descriptor_pool_depth_.reset(); + descriptor_pool_color_.reset(); + + for (size_t i = 0; i < xe::countof(resolve_copy_pipelines_); ++i) { + ui::d3d12::util::ReleaseAndNull(resolve_copy_pipelines_[i]); + } + ui::d3d12::util::ReleaseAndNull(resolve_copy_root_signature_); + + edram_snapshot_restore_pool_.reset(); + ui::d3d12::util::ReleaseAndNull(edram_snapshot_download_buffer_); + + ui::d3d12::util::ReleaseAndNull(edram_buffer_descriptor_heap_); + ui::d3d12::util::ReleaseAndNull(edram_buffer_); + + if (!from_destructor) { + ShutdownCommon(); + } +} + +void D3D12RenderTargetCache::CompletedSubmissionUpdated() { + if (edram_snapshot_restore_pool_) { + edram_snapshot_restore_pool_->Reclaim( + command_processor_.GetCompletedSubmission()); + } + if (transfer_vertex_buffer_pool_) { + transfer_vertex_buffer_pool_->Reclaim( + command_processor_.GetCompletedSubmission()); + } +} + +void D3D12RenderTargetCache::BeginSubmission() { + // New command list - render targets not bound. + InvalidateCommandListRenderTargets(); + // ExecuteCommandLists is a full UAV barrier. + if (edram_buffer_modification_status_ != + EdramBufferModificationStatus::kUnmodified) { + assert_true(edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + edram_buffer_modification_status_ = + EdramBufferModificationStatus::kUnmodified; + PixelShaderInterlockFullEdramBarrierPlaced(); + } +} + +bool D3D12RenderTargetCache::Update(bool is_rasterization_done, + uint32_t shader_writes_color_targets) { + if (!RenderTargetCache::Update(is_rasterization_done, + shader_writes_color_targets)) { + return false; + } + switch (GetPath()) { + case Path::kHostRenderTargets: { + RenderTarget* const* depth_and_color_render_targets = + last_update_accumulated_render_targets(); + PerformTransfersAndResolveClears(1 + xenos::kMaxColorRenderTargets, + depth_and_color_render_targets, + last_update_transfers()); + SetCommandListRenderTargets(depth_and_color_render_targets); + } break; + case Path::kPixelShaderInterlock: { + // For ROV, only the barrier is needed - already scheduled if required. + // But the buffer will be used for ROV drawing now. + TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + // Commit preceding UAV (but not ROV) writes like clears as they aren't + // synchronized with ROV accesses. + CommitEdramBufferUAVWrites(EdramBufferModificationStatus::kAsUAV); + // TODO(Triang3l): Check if this draw call modifies color or depth / + // stencil, at least coarsely, to prevent useless barriers. + MarkEdramBufferModified(EdramBufferModificationStatus::kAsROV); + } break; + default: + assert_unhandled_case(GetPath()); + return false; + } + return true; +} + +void D3D12RenderTargetCache::WriteEdramRawSRVDescriptor( + D3D12_CPU_DESCRIPTOR_HANDLE handle) { + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + device->CopyDescriptorsSimple( + 1, handle, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kRawSRV)), + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); +} + +void D3D12RenderTargetCache::WriteEdramRawUAVDescriptor( + D3D12_CPU_DESCRIPTOR_HANDLE handle) { + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + device->CopyDescriptorsSimple( + 1, handle, + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kRawUAV)), + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); +} + +void D3D12RenderTargetCache::WriteEdramUintPow2SRVDescriptor( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { + EdramBufferDescriptorIndex descriptor_index; + switch (element_size_bytes_pow2) { + case 2: + descriptor_index = EdramBufferDescriptorIndex::kR32UintSRV; + break; + case 3: + descriptor_index = EdramBufferDescriptorIndex::kR32G32UintSRV; + break; + case 4: + descriptor_index = EdramBufferDescriptorIndex::kR32G32B32A32UintSRV; + break; + default: + assert_unhandled_case(element_size_bytes_pow2); + return; + } + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + device->CopyDescriptorsSimple( + 1, handle, + provider.OffsetViewDescriptor(edram_buffer_descriptor_heap_start_, + uint32_t(descriptor_index)), + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); +} + +void D3D12RenderTargetCache::WriteEdramUintPow2UAVDescriptor( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { + EdramBufferDescriptorIndex descriptor_index; + switch (element_size_bytes_pow2) { + case 2: + descriptor_index = EdramBufferDescriptorIndex::kR32UintUAV; + break; + case 3: + descriptor_index = EdramBufferDescriptorIndex::kR32G32UintUAV; + break; + case 4: + descriptor_index = EdramBufferDescriptorIndex::kR32G32B32A32UintUAV; + break; + default: + assert_unhandled_case(element_size_bytes_pow2); + return; + } + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + device->CopyDescriptorsSimple( + 1, handle, + provider.OffsetViewDescriptor(edram_buffer_descriptor_heap_start_, + uint32_t(descriptor_index)), + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); +} + +bool D3D12RenderTargetCache::Resolve(const Memory& memory, + D3D12SharedMemory& shared_memory, + TextureCache& texture_cache, + uint32_t& written_address_out, + uint32_t& written_length_out) { + written_address_out = 0; + written_length_out = 0; + + uint32_t resolution_scale = GetResolutionScale(); + draw_util::ResolveInfo resolve_info; + if (!draw_util::GetResolveInfo( + register_file(), memory, trace_writer_, resolution_scale, + IsFixed16TruncatedToMinus1To1(), resolve_info)) { + return false; + } + + // Nothing to copy/clear. + if (!resolve_info.address.width_div_8 || !resolve_info.address.height_div_8) { + return true; + } + + DeferredCommandList& command_list = + command_processor_.GetDeferredCommandList(); + + // Copying. + bool copied = false; + if (resolve_info.copy_dest_length) { + if (GetPath() == Path::kHostRenderTargets) { + // Dump the current contents of the render targets owning the affected + // range to edram_buffer_. + // TODO(Triang3l): Direct host render target -> shared memory resolve + // shaders for non-converting cases. + uint32_t dump_base; + uint32_t dump_row_length_used; + uint32_t dump_rows; + uint32_t dump_pitch; + resolve_info.GetCopyEdramTileSpan(dump_base, dump_row_length_used, + dump_rows, dump_pitch); + DumpRenderTargets(dump_base, dump_row_length_used, dump_rows, dump_pitch); + } + + draw_util::ResolveCopyShaderConstants copy_shader_constants; + uint32_t copy_group_count_x, copy_group_count_y; + draw_util::ResolveCopyShaderIndex copy_shader = + resolve_info.GetCopyShader(resolution_scale, copy_shader_constants, + copy_group_count_x, copy_group_count_y); + assert_true(copy_group_count_x && copy_group_count_y); + if (copy_shader != draw_util::ResolveCopyShaderIndex::kUnknown) { + const draw_util::ResolveCopyShaderInfo& copy_shader_info = + draw_util::resolve_copy_shader_info[size_t(copy_shader)]; + + // Make sure there is memory to write to. + bool copy_dest_committed; + if (resolution_scale > 1) { + copy_dest_committed = + texture_cache.EnsureScaledResolveMemoryCommitted( + resolve_info.copy_dest_base, resolve_info.copy_dest_length) && + texture_cache.MakeScaledResolveRangeCurrent( + resolve_info.copy_dest_base, resolve_info.copy_dest_length); + } else { + copy_dest_committed = shared_memory.RequestRange( + resolve_info.copy_dest_base, resolve_info.copy_dest_length); + } + if (copy_dest_committed) { + // Write the descriptors and transition the resources. + // Full shared memory without resolution scaling, range of the scaled + // resolve buffer with scaling because only 128 R32 elements can be + // addressed on Nvidia. + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_dest; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_source; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptors[2]; + if (command_processor_.RequestOneUseSingleViewDescriptors( + bindless_resources_used_ ? uint32_t(resolution_scale > 1) : 2, + descriptors)) { + if (bindless_resources_used_) { + if (resolution_scale > 1) { + descriptor_dest = descriptors[0]; + } else { + descriptor_dest = + command_processor_ + .GetSharedMemoryUintPow2BindlessUAVHandlePair( + copy_shader_info.dest_bpe_log2); + } + if (copy_shader_info.source_is_raw) { + descriptor_source = + command_processor_.GetSystemBindlessViewHandlePair( + D3D12CommandProcessor::SystemBindlessView::kEdramRawSRV); + } else { + descriptor_source = + command_processor_.GetEdramUintPow2BindlessSRVHandlePair( + copy_shader_info.source_bpe_log2); + } + } else { + descriptor_dest = descriptors[0]; + if (resolution_scale <= 1) { + shared_memory.WriteUintPow2UAVDescriptor( + descriptor_dest.first, copy_shader_info.dest_bpe_log2); + } + descriptor_source = descriptors[1]; + if (copy_shader_info.source_is_raw) { + WriteEdramRawSRVDescriptor(descriptor_source.first); + } else { + WriteEdramUintPow2SRVDescriptor(descriptor_source.first, + copy_shader_info.source_bpe_log2); + } + } + if (resolution_scale > 1) { + texture_cache.CreateCurrentScaledResolveRangeUintPow2UAV( + descriptor_dest.first, copy_shader_info.dest_bpe_log2); + texture_cache.TransitionCurrentScaledResolveRange( + D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + } else { + shared_memory.UseForWriting(); + } + TransitionEdramBuffer(D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); + + // Submit the resolve. + command_list.D3DSetComputeRootSignature(resolve_copy_root_signature_); + command_list.D3DSetComputeRootDescriptorTable( + 2, descriptor_source.second); + command_list.D3DSetComputeRootDescriptorTable(1, + descriptor_dest.second); + if (resolution_scale > 1) { + command_list.D3DSetComputeRoot32BitConstants( + 0, + sizeof(copy_shader_constants.dest_relative) / sizeof(uint32_t), + ©_shader_constants.dest_relative, 0); + } else { + command_list.D3DSetComputeRoot32BitConstants( + 0, sizeof(copy_shader_constants) / sizeof(uint32_t), + ©_shader_constants, 0); + } + command_processor_.SetExternalPipeline( + resolve_copy_pipelines_[size_t(copy_shader)]); + command_processor_.SubmitBarriers(); + command_list.D3DDispatch(copy_group_count_x, copy_group_count_y, 1); + + // Order the resolve with other work using the destination as a UAV. + if (resolution_scale > 1) { + texture_cache.MarkCurrentScaledResolveRangeUAVWritesCommitNeeded(); + } else { + shared_memory.MarkUAVWritesCommitNeeded(); + } + + // Invalidate textures and mark the range as scaled if needed. + texture_cache.MarkRangeAsResolved(resolve_info.copy_dest_base, + resolve_info.copy_dest_length); + written_address_out = resolve_info.copy_dest_base; + written_length_out = resolve_info.copy_dest_length; + copied = true; + } + } else { + XELOGE( + "D3D12RenderTargetCache: Failed to obtain the resolve destination " + "memory region"); + } + } + } else { + copied = true; + } + + // Clearing. + bool cleared = false; + bool clear_depth = resolve_info.IsClearingDepth(); + bool clear_color = resolve_info.IsClearingColor(); + if (clear_depth || clear_color) { + switch (GetPath()) { + case Path::kHostRenderTargets: { + Transfer::Rectangle clear_rectangle; + RenderTarget* clear_render_targets[2]; + if (PrepareHostRenderTargetsResolveClear( + resolve_info, clear_rectangle, clear_render_targets[0], + clear_transfers_[0], clear_render_targets[1], + clear_transfers_[1])) { + uint64_t clear_values[2]; + clear_values[0] = resolve_info.rb_depth_clear; + clear_values[1] = resolve_info.rb_color_clear | + (uint64_t(resolve_info.rb_color_clear_lo) << 32); + PerformTransfersAndResolveClears(2, clear_render_targets, + clear_transfers_, clear_values, + &clear_rectangle); + } else { + // May be just an empty region (success) or an error - don't care. + cleared = true; + } + } break; + case Path::kPixelShaderInterlock: { + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_edram; + bool descriptor_edram_obtained; + if (bindless_resources_used_) { + descriptor_edram = command_processor_.GetSystemBindlessViewHandlePair( + D3D12CommandProcessor::SystemBindlessView :: + kEdramR32G32B32A32UintUAV); + descriptor_edram_obtained = true; + } else { + descriptor_edram_obtained = + command_processor_.RequestOneUseSingleViewDescriptors( + 1, &descriptor_edram); + if (descriptor_edram_obtained) { + WriteEdramUintPow2UAVDescriptor(descriptor_edram.first, 4); + } + } + if (descriptor_edram_obtained) { + TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + // Should be safe to only commit once (if was UAV / ROV previously - + // if there was nothing to copy, only to clear, for some reason, for + // instance), overlap of the depth and the color ranges is highly + // unlikely. + CommitEdramBufferUAVWrites(); + command_list.D3DSetComputeRootSignature( + resolve_rov_clear_root_signature_); + command_list.D3DSetComputeRootDescriptorTable( + 1, descriptor_edram.second); + std::pair clear_group_count = + resolve_info.GetClearShaderGroupCount(); + assert_true(clear_group_count.first && clear_group_count.second); + if (clear_depth) { + draw_util::ResolveClearShaderConstants depth_clear_constants; + resolve_info.GetDepthClearShaderConstants(depth_clear_constants); + command_list.D3DSetComputeRoot32BitConstants( + 0, sizeof(depth_clear_constants) / sizeof(uint32_t), + &depth_clear_constants, 0); + command_processor_.SetExternalPipeline( + resolve_rov_clear_32bpp_pipeline_); + command_processor_.SubmitBarriers(); + command_list.D3DDispatch(clear_group_count.first, + clear_group_count.second, 1); + } + if (clear_color) { + draw_util::ResolveClearShaderConstants color_clear_constants; + resolve_info.GetColorClearShaderConstants(color_clear_constants); + if (clear_depth) { + // Non-RT-specific constants have already been set. + command_list.D3DSetComputeRoot32BitConstants( + 0, + sizeof(color_clear_constants.rt_specific) / sizeof(uint32_t), + &color_clear_constants.rt_specific, + offsetof(draw_util::ResolveClearShaderConstants, + rt_specific) / + sizeof(uint32_t)); + } else { + command_list.D3DSetComputeRoot32BitConstants( + 0, sizeof(color_clear_constants) / sizeof(uint32_t), + &color_clear_constants, 0); + } + command_processor_.SetExternalPipeline( + resolve_info.color_edram_info.format_is_64bpp + ? resolve_rov_clear_64bpp_pipeline_ + : resolve_rov_clear_32bpp_pipeline_); + command_processor_.SubmitBarriers(); + command_list.D3DDispatch(clear_group_count.first, + clear_group_count.second, 1); + } + MarkEdramBufferModified(); + cleared = true; + } + } break; + default: + assert_unhandled_case(GetPath()); + } + } else { + cleared = true; + } + + return copied && cleared; +} + +bool D3D12RenderTargetCache::InitializeTraceSubmitDownloads() { + if (resolution_scale_ > 1) { + // No 1:1 mapping. + return false; + } + if (!edram_snapshot_download_buffer_) { + D3D12_RESOURCE_DESC edram_snapshot_download_buffer_desc; + ui::d3d12::util::FillBufferResourceDesc(edram_snapshot_download_buffer_desc, + xenos::kEdramSizeBytes, + D3D12_RESOURCE_FLAG_NONE); + auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); + auto device = provider.GetDevice(); + if (FAILED(device->CreateCommittedResource( + &ui::d3d12::util::kHeapPropertiesReadback, + provider.GetHeapFlagCreateNotZeroed(), + &edram_snapshot_download_buffer_desc, + D3D12_RESOURCE_STATE_COPY_DEST, nullptr, + IID_PPV_ARGS(&edram_snapshot_download_buffer_)))) { + XELOGE( + "D3D12RenderTargetCache: Failed to create a EDRAM snapshot download " + "buffer"); + return false; + } + } + if (GetPath() == Path::kHostRenderTargets) { + // Dump all host render targets to edram_buffer_. + DumpRenderTargets(0, xenos::kEdramTileCount, 1, xenos::kEdramTileCount); + } + TransitionEdramBuffer(D3D12_RESOURCE_STATE_COPY_SOURCE); + command_processor_.SubmitBarriers(); + command_processor_.GetDeferredCommandList().D3DCopyBufferRegion( + edram_snapshot_download_buffer_, 0, edram_buffer_, 0, + xenos::kEdramSizeBytes); + return true; +} + +void D3D12RenderTargetCache::InitializeTraceCompleteDownloads() { + if (!edram_snapshot_download_buffer_) { + return; + } + void* download_mapping; + if (SUCCEEDED(edram_snapshot_download_buffer_->Map(0, nullptr, + &download_mapping))) { + trace_writer_.WriteEdramSnapshot(download_mapping); + D3D12_RANGE download_write_range = {}; + edram_snapshot_download_buffer_->Unmap(0, &download_write_range); + } else { + XELOGE( + "D3D12RenderTargetCache: Failed to map the EDRAM snapshot download " + "buffer"); + } + edram_snapshot_download_buffer_->Release(); + edram_snapshot_download_buffer_ = nullptr; +} + +void D3D12RenderTargetCache::RestoreEdramSnapshot(const void* snapshot) { + if (resolution_scale_ > 1) { + // No 1:1 mapping. + return; + } + + // Create the buffer - will be used for copying to either a 32-bit 1280x2048 + // render target or the EDRAM buffer. + auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); + if (!edram_snapshot_restore_pool_) { + edram_snapshot_restore_pool_ = + std::make_unique( + provider, xenos::kEdramSizeBytes); + } + ID3D12Resource* upload_buffer; + size_t upload_buffer_offset; + void* upload_buffer_mapping = edram_snapshot_restore_pool_->Request( + command_processor_.GetCurrentSubmission(), xenos::kEdramSizeBytes, 1, + &upload_buffer, &upload_buffer_offset, nullptr); + if (!upload_buffer_mapping) { + XELOGE( + "D3D12RenderTargetCache: Failed to get a buffer for restoring a EDRAM " + "snapshot"); + return; + } + + DeferredCommandList& command_list = + command_processor_.GetDeferredCommandList(); + + switch (GetPath()) { + case Path::kHostRenderTargets: { + // k_32_FLOAT because it's unambiguous (not effected by something like + // DXGI_FORMAT_R8G8B8A8 vs. DXGI_FORMAT_B8G8R8A8). + D3D12RenderTarget* full_edram_render_target = + static_cast( + PrepareFullEdram1280xRenderTargetForSnapshotRestoration( + xenos::ColorRenderTargetFormat::k_32_FLOAT)); + if (!full_edram_render_target) { + return; + } + D3D12_TEXTURE_COPY_LOCATION copy_source_location; + copy_source_location.pResource = upload_buffer; + copy_source_location.Type = D3D12_TEXTURE_COPY_TYPE_PLACED_FOOTPRINT; + UINT64 copy_total_bytes; + D3D12_RESOURCE_DESC full_edram_render_target_desc = + full_edram_render_target->resource()->GetDesc(); + provider.GetDevice()->GetCopyableFootprints( + &full_edram_render_target_desc, 0, 1, 0, + ©_source_location.PlacedFootprint, nullptr, nullptr, + ©_total_bytes); + // 1280 width * sizeof(uint32_t) is aligned to + // D3D12_TEXTURE_DATA_PITCH_ALIGNMENT (256). + assert_true(copy_total_bytes <= xenos::kEdramSizeBytes); + assert_false(full_edram_render_target->key().Is64bpp()); + uint32_t pitch_tiles = + full_edram_render_target->key().pitch_tiles_at_32bpp; + uint32_t tile_rows = xenos::kEdramTileCount / pitch_tiles; + assert_true(pitch_tiles * tile_rows == xenos::kEdramTileCount); + const uint8_t* snapshot_sample_row = + reinterpret_cast(snapshot); + for (uint32_t y_tile = 0; y_tile < tile_rows; ++y_tile) { + uint8_t* upload_buffer_tile_row_origin = + reinterpret_cast(upload_buffer_mapping) + + copy_source_location.PlacedFootprint.Offset + + xenos::kEdramTileHeightSamples * y_tile * + copy_source_location.PlacedFootprint.Footprint.RowPitch; + for (uint32_t x_tile = 0; x_tile < pitch_tiles; ++x_tile) { + uint8_t* upload_buffer_sample_row = + upload_buffer_tile_row_origin + + sizeof(uint32_t) * xenos::kEdramTileWidthSamples * x_tile; + for (uint32_t sample_row = 0; + sample_row < xenos::kEdramTileHeightSamples; ++sample_row) { + std::memcpy(upload_buffer_sample_row, snapshot_sample_row, + sizeof(uint32_t) * xenos::kEdramTileWidthSamples); + snapshot_sample_row += + sizeof(uint32_t) * xenos::kEdramTileWidthSamples; + upload_buffer_sample_row += + copy_source_location.PlacedFootprint.Footprint.RowPitch; + } + } + } + command_processor_.PushTransitionBarrier( + full_edram_render_target->resource(), + full_edram_render_target->SetResourceState( + D3D12_RESOURCE_STATE_COPY_DEST), + D3D12_RESOURCE_STATE_COPY_DEST); + command_processor_.SubmitBarriers(); + D3D12_TEXTURE_COPY_LOCATION copy_dest_location; + copy_dest_location.pResource = full_edram_render_target->resource(); + copy_dest_location.Type = D3D12_TEXTURE_COPY_TYPE_SUBRESOURCE_INDEX; + copy_dest_location.SubresourceIndex = 0; + command_list.D3DCopyTextureRegion(©_dest_location, 0, 0, 0, + ©_source_location, nullptr); + } break; + + case Path::kPixelShaderInterlock: { + std::memcpy(upload_buffer_mapping, snapshot, xenos::kEdramSizeBytes); + TransitionEdramBuffer(D3D12_RESOURCE_STATE_COPY_DEST); + command_processor_.SubmitBarriers(); + command_list.D3DCopyBufferRegion(edram_buffer_, 0, upload_buffer, + UINT64(upload_buffer_offset), + xenos::kEdramSizeBytes); + } break; + + default: + assert_unhandled_case(GetPath()); + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetColorResourceDXGIFormat( + xenos::ColorRenderTargetFormat format) const { + // Typed should be preferred over typeless so there are more opportunities for + // compression. + switch (format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + if (gamma_render_target_as_srgb_) { + // Can toggle between UNORM and UNORM_SRGB for the same data. + return DXGI_FORMAT_R8G8B8A8_TYPELESS; + } + return DXGI_FORMAT_R8G8B8A8_UNORM; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + return DXGI_FORMAT_R10G10B10A2_UNORM; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: + return DXGI_FORMAT_R16G16B16A16_FLOAT; + // SNORM has two representations of -1. + case xenos::ColorRenderTargetFormat::k_16_16: + return DXGI_FORMAT_R16G16_TYPELESS; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + return DXGI_FORMAT_R16G16B16A16_TYPELESS; + // Floating-point - ensure NaN propagation during ownership transfer for + // unmodified data. + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + return DXGI_FORMAT_R16G16_TYPELESS; + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + return DXGI_FORMAT_R16G16B16A16_TYPELESS; + // TODO(Triang3l): Check if NaN propagation defined in the D3D11.3 + // specification can be relied on for 32-bit float render targets. + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + return DXGI_FORMAT_R32_TYPELESS; + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + return DXGI_FORMAT_R32G32_TYPELESS; + default: + assert_unhandled_case(format); + return DXGI_FORMAT_UNKNOWN; + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetColorDrawDXGIFormat( + xenos::ColorRenderTargetFormat format) const { + switch (format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + // sRGB is handled in a different way, not via the RenderTargetKey format. + return DXGI_FORMAT_R8G8B8A8_UNORM; + case xenos::ColorRenderTargetFormat::k_16_16: + return DXGI_FORMAT_R16G16_SNORM; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + return DXGI_FORMAT_R16G16B16A16_SNORM; + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + return DXGI_FORMAT_R16G16_FLOAT; + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + return DXGI_FORMAT_R16G16B16A16_FLOAT; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + return DXGI_FORMAT_R32_FLOAT; + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + return DXGI_FORMAT_R32G32_FLOAT; + default: + return GetColorResourceDXGIFormat(format); + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetColorOwnershipTransferDXGIFormat( + xenos::ColorRenderTargetFormat format, bool* is_integer_out) const { + if (is_integer_out) { + *is_integer_out = true; + } + switch (format) { + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + return DXGI_FORMAT_R16G16_UINT; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + return DXGI_FORMAT_R16G16B16A16_UINT; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + return DXGI_FORMAT_R32_UINT; + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + return DXGI_FORMAT_R32G32_UINT; + default: + if (is_integer_out) { + *is_integer_out = false; + } + return GetColorDrawDXGIFormat(format); + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetDepthResourceDXGIFormat( + xenos::DepthRenderTargetFormat format) { + switch (format) { + case xenos::DepthRenderTargetFormat::kD24S8: + return DXGI_FORMAT_R24G8_TYPELESS; + case xenos::DepthRenderTargetFormat::kD24FS8: + return DXGI_FORMAT_R32G8X24_TYPELESS; + default: + assert_unhandled_case(format); + return DXGI_FORMAT_UNKNOWN; + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetDepthDSVDXGIFormat( + xenos::DepthRenderTargetFormat format) { + switch (format) { + case xenos::DepthRenderTargetFormat::kD24S8: + return DXGI_FORMAT_D24_UNORM_S8_UINT; + case xenos::DepthRenderTargetFormat::kD24FS8: + return DXGI_FORMAT_D32_FLOAT_S8X24_UINT; + default: + assert_unhandled_case(format); + return DXGI_FORMAT_UNKNOWN; + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetDepthSRVDepthDXGIFormat( + xenos::DepthRenderTargetFormat format) { + switch (format) { + case xenos::DepthRenderTargetFormat::kD24S8: + return DXGI_FORMAT_R24_UNORM_X8_TYPELESS; + case xenos::DepthRenderTargetFormat::kD24FS8: + return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS; + default: + assert_unhandled_case(format); + return DXGI_FORMAT_UNKNOWN; + } +} + +DXGI_FORMAT D3D12RenderTargetCache::GetDepthSRVStencilDXGIFormat( + xenos::DepthRenderTargetFormat format) { + switch (format) { + case xenos::DepthRenderTargetFormat::kD24S8: + return DXGI_FORMAT_X24_TYPELESS_G8_UINT; + case xenos::DepthRenderTargetFormat::kD24FS8: + return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT; + default: + assert_unhandled_case(format); + return DXGI_FORMAT_UNKNOWN; + } +} + +xenos::ColorRenderTargetFormat +D3D12RenderTargetCache::GetHostRelevantColorFormat( + xenos::ColorRenderTargetFormat format) const { + switch (format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + // Currently handled in the shader (with incorrect blending), but even if + // handling is changed (to true sRGB), it will still be able to alias it + // with R8G8B8A8_UNORM. + return xenos::ColorRenderTargetFormat::k_8_8_8_8; + default: + return format; + } +} + +RenderTargetCache::RenderTarget* D3D12RenderTargetCache::CreateRenderTarget( + RenderTargetKey key) { + ID3D12Device* device = + command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); + + D3D12_RESOURCE_DESC resource_desc; + resource_desc.Dimension = D3D12_RESOURCE_DIMENSION_TEXTURE2D; + resource_desc.Alignment = 0; + resource_desc.Width = key.GetWidth() * resolution_scale_; + resource_desc.Height = + GetRenderTargetHeight(key.pitch_tiles_at_32bpp, key.msaa_samples) * + resolution_scale_; + resource_desc.DepthOrArraySize = 1; + resource_desc.MipLevels = 1; + if (key.is_depth) { + resource_desc.Format = GetDepthResourceDXGIFormat(key.GetDepthFormat()); + } else { + resource_desc.Format = GetColorResourceDXGIFormat(key.GetColorFormat()); + } + assert_true(resource_desc.Format != DXGI_FORMAT_UNKNOWN); + if (resource_desc.Format == DXGI_FORMAT_UNKNOWN) { + XELOGE("D3D12RenderTargetCache: Unknown {} render target format {}", + key.is_depth ? "depth" : "color", key.host_relevant_format); + return nullptr; + } + if (key.msaa_samples == xenos::MsaaSamples::k2X && !msaa_2x_supported()) { + resource_desc.SampleDesc.Count = 4; + } else { + resource_desc.SampleDesc.Count = UINT(1) << UINT(key.msaa_samples); + } + resource_desc.SampleDesc.Quality = 0; + resource_desc.Layout = D3D12_TEXTURE_LAYOUT_UNKNOWN; + resource_desc.Flags = key.is_depth ? D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL + : D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET; + // The first access will be ownership transfer into this render target or + // starting to draw directly. + D3D12_RESOURCE_STATES resource_state = + key.is_depth ? D3D12_RESOURCE_STATE_DEPTH_WRITE + : D3D12_RESOURCE_STATE_RENDER_TARGET; + D3D12_CLEAR_VALUE optimized_clear_value; + if (key.is_depth) { + optimized_clear_value.Format = GetDepthDSVDXGIFormat(key.GetDepthFormat()); + // Fixed-point depth is generally direct (1 being the farthest), + // floating-point is used for more uniform precision across the range (0 + // being the farthest). + optimized_clear_value.DepthStencil.Depth = + key.GetDepthFormat() == xenos::DepthRenderTargetFormat::kD24S8 ? 1.0f + : 0.0f; + optimized_clear_value.DepthStencil.Stencil = 0; + } else { + optimized_clear_value.Format = GetColorDrawDXGIFormat(key.GetColorFormat()); + optimized_clear_value.Color[0] = 0.0f; + optimized_clear_value.Color[1] = 0.0f; + optimized_clear_value.Color[2] = 0.0f; + optimized_clear_value.Color[3] = 0.0f; + } + // Create zeroed for more determinism, primarily with respect to compression + // and depth float24 / float32 mirroring. + Microsoft::WRL::ComPtr resource; + if (FAILED(device->CreateCommittedResource( + &ui::d3d12::util::kHeapPropertiesDefault, D3D12_HEAP_FLAG_NONE, + &resource_desc, resource_state, &optimized_clear_value, + IID_PPV_ARGS(&resource)))) { + return nullptr; + } + { + std::u16string resource_name = xe::to_utf16(key.GetDebugName()); + resource->SetName(reinterpret_cast(resource_name.c_str())); + } + + ui::d3d12::D3D12CpuDescriptorPool& descriptor_pool = + key.is_depth ? *descriptor_pool_depth_ : *descriptor_pool_color_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw = + descriptor_pool.AllocateDescriptor(); + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_srv = + descriptor_pool_srv_->AllocateDescriptor(); + if (!descriptor_draw.IsValid() || !descriptor_srv.IsValid()) { + return nullptr; + } + D3D12_CPU_DESCRIPTOR_HANDLE descriptor_draw_handle = + descriptor_draw.GetHandle(); + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw_srgb; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_load_separate; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_srv_stencil; + D3D12_SHADER_RESOURCE_VIEW_DESC srv_desc; + srv_desc.Shader4ComponentMapping = D3D12_DEFAULT_SHADER_4_COMPONENT_MAPPING; + if (resource_desc.SampleDesc.Count > 1) { + srv_desc.ViewDimension = D3D12_SRV_DIMENSION_TEXTURE2DMS; + } else { + srv_desc.ViewDimension = D3D12_SRV_DIMENSION_TEXTURE2D; + srv_desc.Texture2D.MostDetailedMip = 0; + srv_desc.Texture2D.MipLevels = 1; + srv_desc.Texture2D.PlaneSlice = 0; + srv_desc.Texture2D.ResourceMinLODClamp = 0.0f; + } + if (key.is_depth) { + // DSV and stencil SRV. + descriptor_srv_stencil = descriptor_pool_srv_->AllocateDescriptor(); + if (!descriptor_srv_stencil.IsValid()) { + return nullptr; + } + D3D12_DEPTH_STENCIL_VIEW_DESC dsv_desc; + dsv_desc.Format = optimized_clear_value.Format; + dsv_desc.Flags = D3D12_DSV_FLAG_NONE; + D3D12_SHADER_RESOURCE_VIEW_DESC stencil_srv_desc; + stencil_srv_desc.Format = + GetDepthSRVStencilDXGIFormat(key.GetDepthFormat()); + stencil_srv_desc.Shader4ComponentMapping = + D3D12_DEFAULT_SHADER_4_COMPONENT_MAPPING; + if (resource_desc.SampleDesc.Count > 1) { + dsv_desc.ViewDimension = D3D12_DSV_DIMENSION_TEXTURE2DMS; + stencil_srv_desc.ViewDimension = D3D12_SRV_DIMENSION_TEXTURE2DMS; + } else { + dsv_desc.ViewDimension = D3D12_DSV_DIMENSION_TEXTURE2D; + dsv_desc.Texture2D.MipSlice = 0; + stencil_srv_desc.ViewDimension = D3D12_SRV_DIMENSION_TEXTURE2D; + stencil_srv_desc.Texture2D.MostDetailedMip = 0; + stencil_srv_desc.Texture2D.MipLevels = 1; + stencil_srv_desc.Texture2D.PlaneSlice = 1; + stencil_srv_desc.Texture2D.ResourceMinLODClamp = 0.0f; + } + device->CreateDepthStencilView(resource.Get(), &dsv_desc, + descriptor_draw_handle); + device->CreateShaderResourceView(resource.Get(), &stencil_srv_desc, + descriptor_srv_stencil.GetHandle()); + // Depth SRV. + srv_desc.Format = GetDepthSRVDepthDXGIFormat(key.GetDepthFormat()); + } else { + // Drawing RTV. + D3D12_RENDER_TARGET_VIEW_DESC rtv_desc; + rtv_desc.Format = optimized_clear_value.Format; + if (resource_desc.SampleDesc.Count > 1) { + rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2DMS; + } else { + rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2D; + rtv_desc.Texture2D.MipSlice = 0; + rtv_desc.Texture2D.PlaneSlice = 0; + } + device->CreateRenderTargetView(resource.Get(), &rtv_desc, + descriptor_draw_handle); + // sRGB drawing RTV. + switch (key.GetColorFormat()) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + if (gamma_render_target_as_srgb_) { + descriptor_draw_srgb = descriptor_pool.AllocateDescriptor(); + if (!descriptor_draw_srgb.IsValid()) { + return nullptr; + } + rtv_desc.Format = DXGI_FORMAT_R8G8B8A8_UNORM_SRGB; + device->CreateRenderTargetView(resource.Get(), &rtv_desc, + descriptor_draw_srgb.GetHandle()); + } + break; + default: + break; + } + // Ownership transfer RTV. + DXGI_FORMAT load_format = + GetColorOwnershipTransferDXGIFormat(key.GetColorFormat()); + if (rtv_desc.Format != load_format) { + descriptor_load_separate = descriptor_pool.AllocateDescriptor(); + if (!descriptor_load_separate.IsValid()) { + return nullptr; + } + rtv_desc.Format = load_format; + device->CreateRenderTargetView(resource.Get(), &rtv_desc, + descriptor_load_separate.GetHandle()); + } + // SRV for ownership transfer and dumping. + srv_desc.Format = load_format; + } + device->CreateShaderResourceView(resource.Get(), &srv_desc, + descriptor_srv.GetHandle()); + + return new D3D12RenderTarget( + key, *this, resource.Get(), std::move(descriptor_draw), + std::move(descriptor_draw_srgb), std::move(descriptor_load_separate), + std::move(descriptor_srv), std::move(descriptor_srv_stencil), + resource_state); +} + +bool D3D12RenderTargetCache::IsHostDepthEncodingDifferent( + xenos::DepthRenderTargetFormat format) const { + if (format == xenos::DepthRenderTargetFormat::kD24FS8) { + return depth_float24_conversion_ == DepthFloat24Conversion::kOnCopy; + } + return false; +} + +void D3D12RenderTargetCache::RequestPixelShaderInterlockBarrier() { + CommitEdramBufferUAVWrites(); +} + +void D3D12RenderTargetCache::TransitionEdramBuffer( + D3D12_RESOURCE_STATES new_state) { + command_processor_.PushTransitionBarrier(edram_buffer_, edram_buffer_state_, + new_state); + edram_buffer_state_ = new_state; + if (new_state != D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { + edram_buffer_modification_status_ = + EdramBufferModificationStatus::kUnmodified; + } +} + +void D3D12RenderTargetCache::MarkEdramBufferModified( + EdramBufferModificationStatus modification_status) { + assert_true(modification_status != + EdramBufferModificationStatus::kUnmodified); + assert_true(edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + if (edram_buffer_state_ != D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { + return; + } + // max because being modified as a UAV requires stricter synchronization than + // as ROV. + edram_buffer_modification_status_ = + std::max(edram_buffer_modification_status_, modification_status); +} + +void D3D12RenderTargetCache::CommitEdramBufferUAVWrites( + EdramBufferModificationStatus commit_status) { + assert_true(commit_status != EdramBufferModificationStatus::kUnmodified); + if (edram_buffer_modification_status_ < commit_status) { + return; + } + assert_true(edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + if (edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { + command_processor_.PushUAVBarrier(edram_buffer_); + } + edram_buffer_modification_status_ = + EdramBufferModificationStatus::kUnmodified; + PixelShaderInterlockFullEdramBarrierPlaced(); +} + +ID3D12PipelineState* const* +D3D12RenderTargetCache::GetOrCreateTransferPipelines(TransferShaderKey key) { + const TransferModeInfo& mode = kTransferModes[size_t(key.mode)]; + bool dest_is_stencil_bit = (mode.output == TransferOutput::kStencilBit); + + if (dest_is_stencil_bit) { + auto pipelines_it = transfer_stencil_bit_pipelines_.find(key); + if (pipelines_it != transfer_stencil_bit_pipelines_.end()) { + return pipelines_it->second[0] ? pipelines_it->second.data() : nullptr; + } + } else { + auto pipeline_it = transfer_pipelines_.find(key); + if (pipeline_it != transfer_pipelines_.end()) { + return pipeline_it->second ? &pipeline_it->second : nullptr; + } + } + + uint32_t rs = kTransferUsedRootParameters[size_t( + use_stencil_reference_output_ ? mode.root_signature_with_stencil_ref + : mode.root_signature_no_stencil_ref)]; + + // If not dest_is_color, it's depth, or stencil bit - 40-sample columns are + // swapped as opposed to color source. + bool dest_is_color = (mode.output == TransferOutput::kColor); + + xenos::ColorRenderTargetFormat dest_color_format = + xenos::ColorRenderTargetFormat(key.dest_host_relevant_format); + xenos::DepthRenderTargetFormat dest_depth_format = + xenos::DepthRenderTargetFormat(key.dest_host_relevant_format); + bool dest_is_64bpp = + dest_is_color && xenos::IsColorRenderTargetFormat64bpp(dest_color_format); + + xenos::ColorRenderTargetFormat source_color_format = + xenos::ColorRenderTargetFormat(key.source_host_relevant_format); + xenos::DepthRenderTargetFormat source_depth_format = + xenos::DepthRenderTargetFormat(key.source_host_relevant_format); + // If not source_is_color, it's depth / stencil - 40-sample columns are + // swapped as opposed to color destination. + bool source_is_color = (rs & kTransferUsedRootParameterColorSRVBit) != 0; + bool source_is_64bpp; + uint32_t source_color_format_component_count; + uint32_t source_color_srv_component_count; + bool source_color_is_uint; + if (source_is_color) { + assert_zero(rs & kTransferUsedRootParameterDepthSRVBit); + assert_zero(rs & kTransferUsedRootParameterStencilSRVBit); + source_is_64bpp = + xenos::IsColorRenderTargetFormat64bpp(source_color_format); + source_color_format_component_count = + xenos::GetColorRenderTargetFormatComponentCount(source_color_format); + if (dest_is_stencil_bit) { + if (source_is_64bpp && !dest_is_64bpp) { + // Need one component, but choosing from the two 32bpp halves of the + // 64bpp sample. + source_color_srv_component_count = + (source_color_format_component_count >> 1) + 1; + } else { + // Red is at least 8 bits per component in all formats. + source_color_srv_component_count = 1; + } + } else { + source_color_srv_component_count = source_color_format_component_count; + } + GetColorOwnershipTransferDXGIFormat(source_color_format, + &source_color_is_uint); + } else { + source_is_64bpp = false; + source_color_format_component_count = 0; + source_color_srv_component_count = 0; + source_color_is_uint = false; + } + + bool shader_uses_stencil_reference_output = + mode.output == TransferOutput::kDepth && use_stencil_reference_output_; + + // Because of built_shader_.resize(), pointers can't be kept persistently + // here! Resizing also zeroes the memory. + + built_shader_.clear(); + + // RDEF, ISGN, OSGN, SHEX, optionally SFI0, STAT. + uint32_t blob_count = 5 + uint32_t(shader_uses_stencil_reference_output); + + // Allocate space for the container header and the blob offsets. + built_shader_.resize(sizeof(dxbc::ContainerHeader) / sizeof(uint32_t) + + blob_count); + uint32_t blob_offset_position_dwords = + sizeof(dxbc::ContainerHeader) / sizeof(uint32_t); + uint32_t blob_position_dwords = uint32_t(built_shader_.size()); + constexpr uint32_t kBlobHeaderSizeDwords = + sizeof(dxbc::BlobHeader) / sizeof(uint32_t); + + uint32_t name_ptr; + + // *************************************************************************** + // Resource definition + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t rdef_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + // Not needed, as the next operation done is resize, to allocate the space for + // both the blob header and the resource definition header. + // built_shader_.resize(rdef_position_dwords); + + // Allocate space for the RDEF header. + built_shader_.resize(rdef_position_dwords + + sizeof(dxbc::RdefHeader) / sizeof(uint32_t)); + // Generator name. + dxbc::AppendAlignedString(built_shader_, "Xenia"); + + // Constant types - uint (aka "dword" when it's scalar) only. + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_dword_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "dword"); + // Types. + uint32_t rdef_type_uint_position_dwords = uint32_t(built_shader_.size()); + uint32_t rdef_type_uint_ptr = + uint32_t((rdef_type_uint_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + built_shader_.resize(rdef_type_uint_position_dwords + + sizeof(dxbc::RdefType) / sizeof(uint32_t)); + { + auto& rdef_type_uint = *reinterpret_cast( + built_shader_.data() + rdef_type_uint_position_dwords); + rdef_type_uint.variable_class = dxbc::RdefVariableClass::kScalar; + rdef_type_uint.variable_type = dxbc::RdefVariableType::kUInt; + rdef_type_uint.row_count = 1; + rdef_type_uint.column_count = 1; + rdef_type_uint.name_ptr = rdef_dword_name_ptr; + } + + // Constants, if needed: + // - uint xe_transfer_stencil_mask + // - uint xe_transfer_address + // - uint xe_transfer_host_depth_address + uint32_t rdef_constant_count = 0; + uint32_t rdef_constant_index_stencil_mask = + (rs & kTransferUsedRootParameterStencilMaskConstantBit) + ? rdef_constant_count++ + : UINT32_MAX; + assert_false(dest_is_stencil_bit && + rdef_constant_index_stencil_mask == UINT32_MAX); + uint32_t rdef_constant_index_address = + (rs & kTransferUsedRootParameterAddressConstantBit) + ? rdef_constant_count++ + : UINT32_MAX; + assert_true(rdef_constant_index_address != UINT32_MAX); + uint32_t rdef_constant_index_host_depth_address = + (rs & kTransferUsedRootParameterHostDepthAddressConstantBit) + ? rdef_constant_count++ + : UINT32_MAX; + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_xe_transfer_stencil_mask_name_ptr = name_ptr; + if (rdef_constant_index_stencil_mask != UINT32_MAX) { + name_ptr += + dxbc::AppendAlignedString(built_shader_, "xe_transfer_stencil_mask"); + } + uint32_t rdef_xe_transfer_address_name_ptr = name_ptr; + if (rdef_constant_index_address != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_transfer_address"); + } + uint32_t rdef_xe_transfer_host_depth_address_name_ptr = name_ptr; + if (rdef_constant_index_host_depth_address != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, + "xe_transfer_host_depth_address"); + } + // Constants. + uint32_t rdef_constants_position_dwords = uint32_t(built_shader_.size()); + uint32_t rdef_constants_ptr = + uint32_t((rdef_constants_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + built_shader_.resize(rdef_constants_position_dwords + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t) * + rdef_constant_count); + { + auto rdef_constants = reinterpret_cast( + built_shader_.data() + rdef_constants_position_dwords); + // uint xe_transfer_stencil_mask + if (rdef_constant_index_stencil_mask != UINT32_MAX) { + dxbc::RdefVariable& rdef_constant_stencil_mask = + rdef_constants[rdef_constant_index_stencil_mask]; + rdef_constant_stencil_mask.name_ptr = + rdef_xe_transfer_stencil_mask_name_ptr; + rdef_constant_stencil_mask.size_bytes = sizeof(uint32_t); + rdef_constant_stencil_mask.flags = dxbc::kRdefVariableFlagUsed; + rdef_constant_stencil_mask.type_ptr = rdef_type_uint_ptr; + rdef_constant_stencil_mask.start_texture = UINT32_MAX; + rdef_constant_stencil_mask.start_sampler = UINT32_MAX; + } + // uint xe_transfer_address + if (rdef_constant_index_address != UINT32_MAX) { + dxbc::RdefVariable& rdef_constant_address = + rdef_constants[rdef_constant_index_address]; + rdef_constant_address.name_ptr = rdef_xe_transfer_address_name_ptr; + rdef_constant_address.size_bytes = sizeof(uint32_t); + rdef_constant_address.flags = dxbc::kRdefVariableFlagUsed; + rdef_constant_address.type_ptr = rdef_type_uint_ptr; + rdef_constant_address.start_texture = UINT32_MAX; + rdef_constant_address.start_sampler = UINT32_MAX; + } + // uint xe_transfer_host_depth_address + if (rdef_constant_index_host_depth_address != UINT32_MAX) { + dxbc::RdefVariable& rdef_constant_host_depth_address = + rdef_constants[rdef_constant_index_host_depth_address]; + rdef_constant_host_depth_address.name_ptr = + rdef_xe_transfer_host_depth_address_name_ptr; + rdef_constant_host_depth_address.size_bytes = sizeof(uint32_t); + rdef_constant_host_depth_address.flags = dxbc::kRdefVariableFlagUsed; + rdef_constant_host_depth_address.type_ptr = rdef_type_uint_ptr; + rdef_constant_host_depth_address.start_texture = UINT32_MAX; + rdef_constant_host_depth_address.start_sampler = UINT32_MAX; + } + } + + // Constant buffers, if needed: + // - xe_transfer_stencil_mask { uint xe_transfer_stencil_mask; } + // - xe_transfer_address { uint xe_transfer_address; } + // - xe_transfer_host_depth_address { uint xe_transfer_host_depth_address; } + // Reusing the constant names for constant buffers. + uint32_t rdef_cbuffer_count = 0; + uint32_t cbuffer_index_stencil_mask = + rdef_constant_index_stencil_mask != UINT32_MAX ? rdef_cbuffer_count++ + : UINT32_MAX; + uint32_t cbuffer_index_address = rdef_constant_index_address != UINT32_MAX + ? rdef_cbuffer_count++ + : UINT32_MAX; + uint32_t cbuffer_index_host_depth_address = + rdef_constant_index_host_depth_address != UINT32_MAX + ? rdef_cbuffer_count++ + : UINT32_MAX; + uint32_t rdef_cbuffer_position_dwords = uint32_t(built_shader_.size()); + built_shader_.resize(rdef_cbuffer_position_dwords + + sizeof(dxbc::RdefCbuffer) / sizeof(uint32_t) * + rdef_cbuffer_count); + { + auto rdef_cbuffers = reinterpret_cast( + built_shader_.data() + rdef_cbuffer_position_dwords); + // xe_transfer_stencil_mask + if (cbuffer_index_stencil_mask != UINT32_MAX) { + dxbc::RdefCbuffer& rdef_cbuffer_stencil_mask = + rdef_cbuffers[cbuffer_index_stencil_mask]; + rdef_cbuffer_stencil_mask.name_ptr = + rdef_xe_transfer_stencil_mask_name_ptr; + rdef_cbuffer_stencil_mask.variable_count = 1; + rdef_cbuffer_stencil_mask.variables_ptr = + uint32_t(rdef_constants_ptr + sizeof(dxbc::RdefVariable) * + rdef_constant_index_stencil_mask); + rdef_cbuffer_stencil_mask.size_vector_aligned_bytes = + sizeof(uint32_t) * 4; + } + // xe_transfer_address + if (cbuffer_index_address != UINT32_MAX) { + dxbc::RdefCbuffer& rdef_cbuffer_address = + rdef_cbuffers[cbuffer_index_address]; + rdef_cbuffer_address.name_ptr = rdef_xe_transfer_address_name_ptr; + rdef_cbuffer_address.variable_count = 1; + rdef_cbuffer_address.variables_ptr = + uint32_t(rdef_constants_ptr + + sizeof(dxbc::RdefVariable) * rdef_constant_index_address); + rdef_cbuffer_address.size_vector_aligned_bytes = sizeof(uint32_t) * 4; + } + // xe_transfer_host_depth_address + if (cbuffer_index_host_depth_address != UINT32_MAX) { + dxbc::RdefCbuffer& rdef_cbuffer_host_depth_address = + rdef_cbuffers[cbuffer_index_host_depth_address]; + rdef_cbuffer_host_depth_address.name_ptr = + rdef_xe_transfer_host_depth_address_name_ptr; + rdef_cbuffer_host_depth_address.variable_count = 1; + rdef_cbuffer_host_depth_address.variables_ptr = uint32_t( + rdef_constants_ptr + + sizeof(dxbc::RdefVariable) * rdef_constant_index_host_depth_address); + rdef_cbuffer_host_depth_address.size_vector_aligned_bytes = + sizeof(uint32_t) * 4; + } + } + + // Bindings. + // - Texture2D/Texture2DMS xe_transfer_color + // - Texture2D/Texture2DMS xe_transfer_depth + // - Texture2D/Texture2DMS xe_transfer_stencil + // - Texture2D/Texture2DMS/Buffer xe_transfer_host_depth + // - Constant buffers + uint32_t rdef_srv_count = 0; + uint32_t srv_index_color = (rs & kTransferUsedRootParameterColorSRVBit) + ? rdef_srv_count++ + : UINT32_MAX; + uint32_t srv_index_depth = (rs & kTransferUsedRootParameterDepthSRVBit) + ? rdef_srv_count++ + : UINT32_MAX; + uint32_t srv_index_stencil = (rs & kTransferUsedRootParameterStencilSRVBit) + ? rdef_srv_count++ + : UINT32_MAX; + uint32_t srv_index_host_depth = + (rs & kTransferUsedRootParameterHostDepthSRVBit) ? rdef_srv_count++ + : UINT32_MAX; + uint32_t rdef_binding_count = rdef_srv_count + rdef_cbuffer_count; + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_xe_transfer_color_name_ptr = name_ptr; + if (srv_index_color != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_transfer_color"); + } + uint32_t rdef_xe_transfer_depth_name_ptr = name_ptr; + if (srv_index_depth != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_transfer_depth"); + } + uint32_t rdef_xe_transfer_stencil_name_ptr = name_ptr; + if (srv_index_stencil != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_transfer_stencil"); + } + uint32_t rdef_xe_transfer_host_depth_name_ptr = name_ptr; + if (srv_index_host_depth != UINT32_MAX) { + name_ptr += + dxbc::AppendAlignedString(built_shader_, "xe_transfer_host_depth"); + } + // Bindings. + uint32_t rdef_binding_position_dwords = uint32_t(built_shader_.size()); + built_shader_.resize(rdef_binding_position_dwords + + sizeof(dxbc::RdefInputBind) / sizeof(uint32_t) * + rdef_binding_count); + { + auto rdef_bindings = reinterpret_cast( + built_shader_.data() + rdef_binding_position_dwords); + uint32_t rdef_binding_index = 0; + // xe_transfer_color + if (srv_index_color != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_color = + rdef_bindings[rdef_binding_index++]; + rdef_binding_color.name_ptr = rdef_xe_transfer_color_name_ptr; + rdef_binding_color.type = dxbc::RdefInputType::kTexture; + rdef_binding_color.return_type = source_color_is_uint + ? dxbc::ResourceReturnType::kUInt + : dxbc::ResourceReturnType::kFloat; + if (key.source_msaa_samples != xenos::MsaaSamples::k1X) { + rdef_binding_color.dimension = dxbc::RdefDimension::kSRVTexture2DMS; + } else { + rdef_binding_color.dimension = dxbc::RdefDimension::kSRVTexture2D; + rdef_binding_color.sample_count = UINT32_MAX; + } + rdef_binding_color.bind_point = kTransferSRVRegisterColor; + rdef_binding_color.bind_count = 1; + rdef_binding_color.flags = (source_color_srv_component_count - 1) + << dxbc::kRdefInputFlagsComponentsShift; + rdef_binding_color.id = srv_index_color; + } + // xe_transfer_depth + if (srv_index_depth != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_depth = + rdef_bindings[rdef_binding_index++]; + rdef_binding_depth.name_ptr = rdef_xe_transfer_depth_name_ptr; + rdef_binding_depth.type = dxbc::RdefInputType::kTexture; + rdef_binding_depth.return_type = dxbc::ResourceReturnType::kFloat; + if (key.source_msaa_samples != xenos::MsaaSamples::k1X) { + rdef_binding_depth.dimension = dxbc::RdefDimension::kSRVTexture2DMS; + } else { + rdef_binding_depth.dimension = dxbc::RdefDimension::kSRVTexture2D; + rdef_binding_depth.sample_count = UINT32_MAX; + } + rdef_binding_depth.bind_point = kTransferSRVRegisterDepth; + rdef_binding_depth.bind_count = 1; + rdef_binding_depth.id = srv_index_depth; + } + // xe_transfer_stencil + if (srv_index_stencil != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_stencil = + rdef_bindings[rdef_binding_index++]; + rdef_binding_stencil.name_ptr = rdef_xe_transfer_stencil_name_ptr; + rdef_binding_stencil.type = dxbc::RdefInputType::kTexture; + rdef_binding_stencil.return_type = dxbc::ResourceReturnType::kUInt; + if (key.source_msaa_samples != xenos::MsaaSamples::k1X) { + rdef_binding_stencil.dimension = dxbc::RdefDimension::kSRVTexture2DMS; + } else { + rdef_binding_stencil.dimension = dxbc::RdefDimension::kSRVTexture2D; + rdef_binding_stencil.sample_count = UINT32_MAX; + } + rdef_binding_stencil.bind_point = kTransferSRVRegisterStencil; + rdef_binding_stencil.bind_count = 1; + rdef_binding_stencil.flags = dxbc::kRdefInputFlags2Component; + rdef_binding_stencil.id = srv_index_stencil; + } + // xe_transfer_host_depth + if (srv_index_host_depth != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_host_depth = + rdef_bindings[rdef_binding_index++]; + rdef_binding_host_depth.name_ptr = rdef_xe_transfer_host_depth_name_ptr; + rdef_binding_host_depth.type = dxbc::RdefInputType::kTexture; + if (key.host_depth_source_is_copy) { + // Float as uint. + rdef_binding_host_depth.return_type = dxbc::ResourceReturnType::kUInt; + rdef_binding_host_depth.dimension = dxbc::RdefDimension::kSRVBuffer; + rdef_binding_host_depth.sample_count = UINT32_MAX; + } else { + rdef_binding_host_depth.return_type = dxbc::ResourceReturnType::kFloat; + if (key.host_depth_source_msaa_samples != xenos::MsaaSamples::k1X) { + rdef_binding_host_depth.dimension = + dxbc::RdefDimension::kSRVTexture2DMS; + } else { + rdef_binding_host_depth.dimension = + dxbc::RdefDimension::kSRVTexture2D; + rdef_binding_host_depth.sample_count = UINT32_MAX; + } + } + rdef_binding_host_depth.bind_point = kTransferSRVRegisterHostDepth; + rdef_binding_host_depth.bind_count = 1; + rdef_binding_host_depth.id = srv_index_host_depth; + } + // xe_transfer_stencil_mask + if (cbuffer_index_stencil_mask != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_stencil_mask = + rdef_bindings[rdef_binding_index++]; + rdef_binding_stencil_mask.name_ptr = + rdef_xe_transfer_stencil_mask_name_ptr; + rdef_binding_stencil_mask.type = dxbc::RdefInputType::kCbuffer; + rdef_binding_stencil_mask.bind_point = kTransferCBVRegisterStencilMask; + rdef_binding_stencil_mask.bind_count = 1; + rdef_binding_stencil_mask.flags = dxbc::kRdefInputFlagUserPacked; + rdef_binding_stencil_mask.id = cbuffer_index_stencil_mask; + } + // xe_transfer_address + if (cbuffer_index_address != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_address = + rdef_bindings[rdef_binding_index++]; + rdef_binding_address.name_ptr = rdef_xe_transfer_address_name_ptr; + rdef_binding_address.type = dxbc::RdefInputType::kCbuffer; + rdef_binding_address.bind_point = kTransferCBVRegisterAddress; + rdef_binding_address.bind_count = 1; + rdef_binding_address.flags = dxbc::kRdefInputFlagUserPacked; + rdef_binding_address.id = cbuffer_index_address; + } + // xe_transfer_host_depth_address + if (cbuffer_index_host_depth_address != UINT32_MAX) { + dxbc::RdefInputBind& rdef_binding_host_depth_address = + rdef_bindings[rdef_binding_index++]; + rdef_binding_host_depth_address.name_ptr = + rdef_xe_transfer_host_depth_address_name_ptr; + rdef_binding_host_depth_address.type = dxbc::RdefInputType::kCbuffer; + rdef_binding_host_depth_address.bind_point = + kTransferCBVRegisterHostDepthAddress; + rdef_binding_host_depth_address.bind_count = 1; + rdef_binding_host_depth_address.flags = dxbc::kRdefInputFlagUserPacked; + rdef_binding_host_depth_address.id = cbuffer_index_host_depth_address; + } + } + + // Header. + { + auto& rdef_header = *reinterpret_cast( + built_shader_.data() + rdef_position_dwords); + rdef_header.cbuffer_count = rdef_cbuffer_count; + rdef_header.cbuffers_ptr = + uint32_t((rdef_cbuffer_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + rdef_header.input_bind_count = rdef_binding_count; + rdef_header.input_binds_ptr = + uint32_t((rdef_binding_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + rdef_header.shader_model = dxbc::RdefShaderModel::kPixelShader5_1; + rdef_header.compile_flags = + dxbc::kCompileFlagNoPreshader | dxbc::kCompileFlagPreferFlowControl | + dxbc::kCompileFlagIeeeStrictness | dxbc::kCompileFlagAllResourcesBound; + // Generator name is right after the header. + rdef_header.generator_name_ptr = sizeof(dxbc::RdefHeader); + rdef_header.fourcc = dxbc::RdefHeader::FourCC::k5_1; + rdef_header.InitializeSizes(); + } + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kResourceDefinition; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Input signature + // *************************************************************************** + + // Registers for accessing in the shader code - multiple inputs may be packed + // into the same register. + enum InputRegister : uint32_t { + kInputRegisterPosition, + kInputRegisterSampleIndex, + kInputRegisterCount, + }; + + // Position, and for multisampled, sample index. + uint32_t isgn_parameter_count = + 1 + uint32_t(key.dest_msaa_samples != xenos::MsaaSamples::k1X); + + // Reserve space for the header and the parameters. + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t isgn_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(isgn_position_dwords + + sizeof(dxbc::Signature) / sizeof(uint32_t) + + sizeof(dxbc::SignatureParameter) / sizeof(uint32_t) * + isgn_parameter_count); + + // Names (after the parameters). + name_ptr = uint32_t((built_shader_.size() - isgn_position_dwords) * + sizeof(uint32_t)); + uint32_t isgn_sv_position_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "SV_Position"); + uint32_t isgn_sv_sample_index_name_ptr = name_ptr; + if (key.dest_msaa_samples != xenos::MsaaSamples::k1X) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "SV_SampleIndex"); + } + + // Header and parameters. + { + // Header. + auto& isgn_header = *reinterpret_cast( + built_shader_.data() + isgn_position_dwords); + isgn_header.parameter_count = isgn_parameter_count; + isgn_header.parameter_info_ptr = sizeof(dxbc::Signature); + // Parameters. + auto isgn_parameters = reinterpret_cast( + built_shader_.data() + isgn_position_dwords + + sizeof(dxbc::Signature) / sizeof(uint32_t)); + uint32_t isgn_parameter_index = 0; + // SV_Position.xy + dxbc::SignatureParameter& isgn_sv_position = + isgn_parameters[isgn_parameter_index++]; + isgn_sv_position.semantic_name_ptr = isgn_sv_position_name_ptr; + isgn_sv_position.system_value = dxbc::Name::kPosition; + isgn_sv_position.component_type = + dxbc::SignatureRegisterComponentType::kFloat32; + isgn_sv_position.register_index = kInputRegisterPosition; + isgn_sv_position.mask = 0b1111; + isgn_sv_position.always_reads_mask = 0b0011; + // SV_SampleIndex + if (key.dest_msaa_samples != xenos::MsaaSamples::k1X) { + dxbc::SignatureParameter& isgn_sv_sample_index = + isgn_parameters[isgn_parameter_index++]; + isgn_sv_sample_index.semantic_name_ptr = isgn_sv_sample_index_name_ptr; + isgn_sv_sample_index.system_value = dxbc::Name::kSampleIndex; + isgn_sv_sample_index.component_type = + dxbc::SignatureRegisterComponentType::kUInt32; + isgn_sv_sample_index.register_index = kInputRegisterSampleIndex; + isgn_sv_sample_index.mask = 0b0001; + isgn_sv_sample_index.always_reads_mask = 0b0001; + } + } + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kInputSignature; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Output signature + // *************************************************************************** + + // Color or depth. + uint32_t osgn_parameter_count = 0; + uint32_t osgn_parameter_index_sv_target = + mode.output == TransferOutput::kColor ? osgn_parameter_count++ + : UINT32_MAX; + uint32_t osgn_parameter_index_sv_depth = mode.output == TransferOutput::kDepth + ? osgn_parameter_count++ + : UINT32_MAX; + uint32_t osgn_parameter_index_sv_stencil_ref = + shader_uses_stencil_reference_output ? osgn_parameter_count++ + : UINT32_MAX; + + // Reserve space for the header and the parameters. + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t osgn_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(osgn_position_dwords + + sizeof(dxbc::Signature) / sizeof(uint32_t) + + sizeof(dxbc::SignatureParameter) / sizeof(uint32_t) * + osgn_parameter_count); + + // Names (after the parameters). + name_ptr = uint32_t((built_shader_.size() - osgn_position_dwords) * + sizeof(uint32_t)); + uint32_t osgn_sv_target_name_ptr = name_ptr; + if (osgn_parameter_index_sv_target != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "SV_Target"); + } + uint32_t osgn_sv_depth_name_ptr = name_ptr; + if (osgn_parameter_index_sv_depth != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "SV_Depth"); + } + uint32_t osgn_sv_stencil_ref_name_ptr = name_ptr; + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX) { + name_ptr += dxbc::AppendAlignedString(built_shader_, "SV_StencilRef"); + } + + bool dest_color_is_uint; + if (mode.output == TransferOutput::kColor) { + GetColorOwnershipTransferDXGIFormat(dest_color_format, &dest_color_is_uint); + } else { + dest_color_is_uint = false; + } + + // Header and parameters. + { + // Header. + auto& osgn_header = *reinterpret_cast( + built_shader_.data() + osgn_position_dwords); + osgn_header.parameter_count = osgn_parameter_count; + osgn_header.parameter_info_ptr = sizeof(dxbc::Signature); + // Parameters. + auto osgn_parameters = reinterpret_cast( + built_shader_.data() + osgn_position_dwords + + sizeof(dxbc::Signature) / sizeof(uint32_t)); + // SV_Target + if (osgn_parameter_index_sv_target != UINT32_MAX) { + dxbc::SignatureParameter& osgn_sv_target = + osgn_parameters[osgn_parameter_index_sv_target]; + osgn_sv_target.semantic_name_ptr = osgn_sv_target_name_ptr; + osgn_sv_target.component_type = + dest_color_is_uint ? dxbc::SignatureRegisterComponentType::kUInt32 + : dxbc::SignatureRegisterComponentType::kFloat32; + osgn_sv_target.register_index = 0; + osgn_sv_target.mask = 0b1111; + } + // SV_Depth + if (osgn_parameter_index_sv_depth != UINT32_MAX) { + dxbc::SignatureParameter& osgn_sv_depth = + osgn_parameters[osgn_parameter_index_sv_depth]; + osgn_sv_depth.semantic_name_ptr = osgn_sv_depth_name_ptr; + osgn_sv_depth.component_type = + dxbc::SignatureRegisterComponentType::kFloat32; + osgn_sv_depth.register_index = UINT32_MAX; + osgn_sv_depth.mask = 0b0001; + osgn_sv_depth.never_writes_mask = 0b1110; + } + // SV_StencilRef + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX) { + dxbc::SignatureParameter& osgn_sv_stencil_ref = + osgn_parameters[osgn_parameter_index_sv_stencil_ref]; + osgn_sv_stencil_ref.semantic_name_ptr = osgn_sv_stencil_ref_name_ptr; + // Older versions of FXC incorrectly expect SV_StencilRef to be float, + // it's always uint in DXC and also in the latest versions of FXC. + osgn_sv_stencil_ref.component_type = + dxbc::SignatureRegisterComponentType::kUInt32; + osgn_sv_stencil_ref.register_index = UINT32_MAX; + osgn_sv_stencil_ref.mask = 0b0001; + osgn_sv_stencil_ref.never_writes_mask = 0b1110; + } + } + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kOutputSignature; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Shader program + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t shex_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(shex_position_dwords); + + built_shader_.push_back( + dxbc::VersionToken(dxbc::ProgramType::kPixelShader, 5, 1)); + // Reserve space for the length token. + built_shader_.push_back(0); + + dxbc::Statistics stat; + std::memset(&stat, 0, sizeof(dxbc::Statistics)); + dxbc::Assembler a(built_shader_, stat); + + a.OpDclGlobalFlags(dxbc::kGlobalFlagAllResourcesBound); + if (cbuffer_index_stencil_mask != UINT32_MAX) { + a.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_stencil_mask, + kTransferCBVRegisterStencilMask, + kTransferCBVRegisterStencilMask), + 1); + } + if (cbuffer_index_address != UINT32_MAX) { + a.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_address, + kTransferCBVRegisterAddress, kTransferCBVRegisterAddress), + 1); + } + if (cbuffer_index_host_depth_address != UINT32_MAX) { + a.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_host_depth_address, + kTransferCBVRegisterHostDepthAddress, + kTransferCBVRegisterHostDepthAddress), + 1); + } + if (srv_index_color != UINT32_MAX) { + a.OpDclResource( + key.source_msaa_samples != xenos::MsaaSamples::k1X + ? dxbc::ResourceDimension::kTexture2DMS + : dxbc::ResourceDimension::kTexture2D, + dxbc::ResourceReturnTypeX4Token(source_color_is_uint + ? dxbc::ResourceReturnType::kUInt + : dxbc::ResourceReturnType::kFloat), + dxbc::Src::T(dxbc::Src::Dcl, srv_index_color, kTransferSRVRegisterColor, + kTransferSRVRegisterColor)); + } + if (srv_index_depth != UINT32_MAX) { + a.OpDclResource( + key.source_msaa_samples != xenos::MsaaSamples::k1X + ? dxbc::ResourceDimension::kTexture2DMS + : dxbc::ResourceDimension::kTexture2D, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kFloat), + dxbc::Src::T(dxbc::Src::Dcl, srv_index_depth, kTransferSRVRegisterDepth, + kTransferSRVRegisterDepth)); + } + if (srv_index_stencil != UINT32_MAX) { + a.OpDclResource( + key.source_msaa_samples != xenos::MsaaSamples::k1X + ? dxbc::ResourceDimension::kTexture2DMS + : dxbc::ResourceDimension::kTexture2D, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kUInt), + dxbc::Src::T(dxbc::Src::Dcl, srv_index_stencil, + kTransferSRVRegisterStencil, kTransferSRVRegisterStencil)); + } + if (srv_index_host_depth != UINT32_MAX) { + a.OpDclResource( + key.host_depth_source_is_copy + ? dxbc::ResourceDimension::kBuffer + : (key.host_depth_source_msaa_samples != xenos::MsaaSamples::k1X + ? dxbc::ResourceDimension::kTexture2DMS + : dxbc::ResourceDimension::kTexture2D), + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kFloat), + dxbc::Src::T(dxbc::Src::Dcl, srv_index_host_depth, + kTransferSRVRegisterHostDepth, + kTransferSRVRegisterHostDepth)); + } + a.OpDclInputPSSIV(dxbc::InterpolationMode::kLinearNoPerspective, + dxbc::Dest::V(kInputRegisterPosition, 0b0011), + dxbc::Name::kPosition); + if (key.dest_msaa_samples != xenos::MsaaSamples::k1X) { + a.OpDclInputPSSGV(dxbc::Dest::V(kInputRegisterSampleIndex, 0b0001), + dxbc::Name::kSampleIndex); + } + if (osgn_parameter_index_sv_target != UINT32_MAX) { + a.OpDclOutput(dxbc::Dest::O(0)); + } + if (osgn_parameter_index_sv_depth != UINT32_MAX) { + a.OpDclOutput(dxbc::Dest::ODepth()); + } + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX) { + a.OpDclOutput(dxbc::Dest::OStencilRef()); + } + // r0:r2 are involved at least in common addressing code. Texture loads + // usually can overwrite some of the addressing temps as they are only needed + // for the coordinates for that load. Currently 3 temps are enough. + a.OpDclTemps(3); + + uint32_t tile_width_samples_scaled = + xenos::kEdramTileWidthSamples * resolution_scale_; + uint32_t tile_height_samples_scaled = + xenos::kEdramTileHeightSamples * resolution_scale_; + + // Split the destination pixel index into 32bpp tile in r0.z and + // 32bpp-tile-relative pixel index in r0.xy. + // r0.xy = pixel XY as uint + a.OpFToU(dxbc::Dest::R(0, 0b0011), dxbc::Src::V(kInputRegisterPosition)); + uint32_t dest_sample_width_log2 = + uint32_t(dest_is_64bpp) + + uint32_t(key.dest_msaa_samples >= xenos::MsaaSamples::k4X); + uint32_t dest_sample_height_log2 = + uint32_t(key.dest_msaa_samples >= xenos::MsaaSamples::k2X); + if (resolution_scale_ == 3) { + // 3x - divide by 240x48 >> dest_sample_width/height_log2. + static_assert(xenos::kEdramTileWidthSamples * 3 == (15 << 4), + "Assuming the EDRAM tile width * 3 in samples is 15 * 16"); + uint32_t dest_tile_width_pixels_div15_log2 = 4 - dest_sample_width_log2; + static_assert(xenos::kEdramTileHeightSamples * 3 == (3 << 4), + "Assuming the EDRAM tile height * 3 in samples is 3 * 16"); + uint32_t dest_tile_height_pixels_div3_log2 = 4 - dest_sample_height_log2; + // r0.zw = upper 32 bits in the division process of pixel XY by pixel count + // in a 32bpp tile + a.OpUMul(dxbc::Dest::R(0, 0b1100), dxbc::Dest::Null(), + dxbc::Src::R(0, 0b0100 << 4), + dxbc::Src::LU(0, 0, draw_util::kDivideScale15, + draw_util::kDivideScale3)); + // r0.zw = 32bpp tile XY index + a.OpUShR( + dxbc::Dest::R(0, 0b1100), dxbc::Src::R(0), + dxbc::Src::LU( + 0, 0, + draw_util::kDivideUpperShift15 + dest_tile_width_pixels_div15_log2, + draw_util::kDivideUpperShift3 + dest_tile_height_pixels_div3_log2)); + // r0.xy = destination pixel XY index within the 32bpp tile + a.OpIMAd(dxbc::Dest::R(0, 0b0011), dxbc::Src::R(0, 0b1110), + dxbc::Src::LI(-(15 << dest_tile_width_pixels_div15_log2), + -(3 << dest_tile_height_pixels_div3_log2), 0, 0), + dxbc::Src::R(0, 0b0100)); + } else { + assert_true(resolution_scale_ <= 2); + // 1x or 2x - divide by 80x16 * resolution_scale * + // dest_sample_width/height_log2. + static_assert(xenos::kEdramTileWidthSamples == (5 << 4), + "Assuming the EDRAM tile width in samples is 5 * 16"); + uint32_t dest_tile_width_pixels_div5_log2 = 4 - dest_sample_width_log2; + static_assert(xenos::kEdramTileHeightSamples == (1 << 4), + "Assuming 4 is the log2 of the EDRAM tile height in samples"); + uint32_t dest_tile_height_pixels_log2 = 4 - dest_sample_height_log2; + if (resolution_scale_ == 2) { + ++dest_tile_width_pixels_div5_log2; + ++dest_tile_height_pixels_log2; + } + // r0.z = upper 32 bits in the division process of pixel X by pixel count in + // a 32bpp tile + a.OpUMul(dxbc::Dest::R(0, 0b0100), dxbc::Dest::Null(), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(draw_util::kDivideScale5)); + // r0.zw = 32bpp tile XY index + a.OpUShR(dxbc::Dest::R(0, 0b1100), dxbc::Src::R(0, 0b0110 << 4), + dxbc::Src::LU(0, 0, + draw_util::kDivideUpperShift5 + + dest_tile_width_pixels_div5_log2, + dest_tile_height_pixels_log2)); + // r0.x = destination pixel X index within the 32bpp tile + a.OpIMAd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::LI(-(5 << dest_tile_width_pixels_div5_log2)), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + // r0.y = destination pixel Y index within the 32bpp tile + a.OpAnd(dxbc::Dest::R(0, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU((1 << dest_tile_height_pixels_log2) - 1)); + } + // r1.x = destination pitch in 32bpp tiles + a.OpUBFE(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::LU(0), + dxbc::Src::CB(cbuffer_index_address, kTransferCBVRegisterAddress, 0, + dxbc::Src::kXXXX)); + // r0.z = 32bpp tile index relative to the destination base + // r0.w = free + // r1.x = free + a.OpUMAd(dxbc::Dest::R(0, 0b0100), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::R(0, dxbc::Src::kZZZZ)); + + // Now the tile index doesn't have any dependencies on the destination. The + // dword index within the source tile, however, is calculated from both the + // source and the destination pixel size, sample count and color vs. depth. + + // Source can be 64bpp or 32bpp - depth if only depth is available, color in + // all other cases. + + // Load the source to r1 (or low to r0, high to r1 if need 64bpp color as the + // result, as the address is loaded to r1). + + // Source pixel and sample index within the 32bpp tile. + // X to r1.x (or keep r0.x if not modifying). + // Y to r1.y (or keep r0.y if not modifying). + // Sample index to r1.z (or use v# if not modifying); r1.z will also be set + // to 0 before sampling for the LOD of the single-sampled source (needs to + // be in the register). + // If 64bpp -> 32bpp, also the needed half in r0.w. + + dxbc::Src dest_sample( + dxbc::Src::V(kInputRegisterSampleIndex, dxbc::Src::kXXXX)); + dxbc::Src source_sample(dest_sample); + uint32_t source_tile_pixel_x_reg = 0; + uint32_t source_tile_pixel_y_reg = 0; + + // First sample bit at 4x - horizontal sample. + // Second sample bit at 4x - vertical sample. + // At 2x, the vertical sample is either the first or the second bit + // depending on whether 2x is emulated as 4x. + + if (!source_is_64bpp && dest_is_64bpp) { + // 32bpp -> 64bpp, need two samples of the source. + if (key.source_msaa_samples >= xenos::MsaaSamples::k4X) { + // 32bpp -> 64bpp, 4x ->. + // Source has 32bpp halves in two adjacent samples. + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // 32bpp -> 64bpp, 4x -> 4x. + // 1 destination horizontal sample = 2 source horizontal samples. + // D p0,0 s0,0 = S p0,0 s0,0 | S p0,0 s1,0 + // D p0,0 s1,0 = S p1,0 s0,0 | S p1,0 s1,0 + // D p0,0 s0,1 = S p0,0 s0,1 | S p0,0 s1,1 + // D p0,0 s1,1 = S p1,0 s0,1 | S p1,0 s1,1 + // Thus destination horizontal sample -> source horizontal pixel, + // vertical samples are 1:1. + a.OpAnd(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(0b10)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::V(kInputRegisterSampleIndex, dxbc::Src::kXXXX)); + source_tile_pixel_x_reg = 1; + } else if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { + // 32bpp -> 64bpp, 4x -> 2x. + // 1 destination horizontal pixel = 2 source horizontal samples. + // D p0,0 s0 = S p0,0 s0,0 | S p0,0 s1,0 + // D p0,0 s1 = S p0,0 s0,1 | S p0,0 s1,1 + // D p1,0 s0 = S p1,0 s0,0 | S p1,0 s1,0 + // D p1,0 s1 = S p1,0 s0,1 | S p1,0 s1,1 + // Pixel index can be reused. Sample 0 should become samples 01, + // sample 1 or 3 should become samples 23. + if (msaa_2x_supported_) { + a.OpIShL(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(1)); + } else { + a.OpAnd(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(0b10)); + } + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + } else { + // 32bpp -> 64bpp, 4x -> 1x. + // 1 destination horizontal pixel = 2 source horizontal samples. + // D p0,0 = S p0,0 s0,0 | S p0,0 s1,0 + // D p0,1 = S p0,0 s0,1 | S p0,0 s1,1 + // Horizontal pixel index can be reused. Vertical pixel 1 should + // become sample 2. + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), dxbc::Src::LU(0)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + a.OpUShR(dxbc::Dest::R(1, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + source_tile_pixel_y_reg = 1; + } + } else { + // 32bpp -> 64bpp, 1x/2x ->. + // Source has 32bpp halves in two adjacent pixels. + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // 32bpp -> 64bpp, 1x/2x -> 4x. + // The X part. + // 1 destination horizontal sample = 2 source horizontal pixels. + a.OpIShL(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(2)); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::V(kInputRegisterSampleIndex, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + source_tile_pixel_x_reg = 1; + // Y is handled by common code. + } else { + // 32bpp -> 64bpp, 1x/2x -> 1x/2x. + // The X part. + // 1 destination horizontal pixel = 2 source horizontal pixels. + a.OpIShL(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + source_tile_pixel_x_reg = 1; + // Y is handled by common code. + } + } + } else if (source_is_64bpp && !dest_is_64bpp) { + // 64bpp -> 32bpp, also the half to r0.w. + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // 64bpp -> 32bpp, -> 4x. + // The needed half is in the destination horizontal sample index. + if (key.source_msaa_samples >= xenos::MsaaSamples::k4X) { + // 64bpp -> 32bpp, 4x -> 4x. + // D p0,0 s0,0 = S s0,0 low + // D p0,0 s1,0 = S s0,0 high + // D p1,0 s0,0 = S s1,0 low + // D p1,0 s1,0 = S s1,0 high + // Vertical pixel and sample (second bit) addressing is the same. + // However, 1 horizontal destination pixel = 1 horizontal source sample. + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(0), + dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + // 2 destination horizontal samples = 1 source horizontal sample, thus + // 2 destination horizontal pixels = 1 source horizontal pixel. + a.OpUShR(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + source_tile_pixel_x_reg = 1; + } else { + // 64bpp -> 32bpp, 1x/2x -> 4x. + // 2 destination horizontal samples = 1 source horizontal pixel, thus + // 1 destination horizontal pixel = 1 source horizontal pixel. Can reuse + // horizontal pixel index. + // Y is handled by common code. + } + // Half in r0.w from the destination horizontal sample index. + a.OpAnd(dxbc::Dest::R(0, 0b1000), dest_sample, dxbc::Src::LU(1)); + } else { + // 64bpp -> 32bpp, -> 1x/2x. + // The needed half is in the destination horizontal pixel index. + if (key.source_msaa_samples >= xenos::MsaaSamples::k4X) { + // 64bpp -> 32bpp, 4x -> 1x/2x. + // (Destination horizontal pixel >> 1) & 1 = source horizontal sample + // (first bit). + a.OpUBFE(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { + // 64bpp -> 32bpp, 4x -> 2x. + // Destination vertical samples (first or second bit, depending on + // support) = source vertical samples (second bit). + if (msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), + dxbc::Src::LU(1), dest_sample, source_sample); + } else { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), + dxbc::Src::LU(0), source_sample, dest_sample); + } + } else { + // 64bpp -> 32bpp, 4x -> 1x. + // 1 destination vertical pixel = 1 source vertical sample. + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), source_sample); + a.OpUShR(dxbc::Dest::R(1, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + source_tile_pixel_y_reg = 1; + } + // 2 destination horizontal pixels = 1 source horizontal sample. + // 4 destination horizontal pixels = 1 source horizontal pixel. + a.OpUShR(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(2)); + source_tile_pixel_x_reg = 1; + } else { + // 64bpp -> 32bpp, 1x/2x -> 1x/2x. + // The X part. + // 2 destination horizontal pixels = 1 destination source pixel. + a.OpUShR(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + source_tile_pixel_x_reg = 1; + // Y is handled by common code. + } + // Half in r0.w from the destination horizontal pixel index. + a.OpAnd(dxbc::Dest::R(0, 0b1000), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + } + } else { + // Same bit count. + if (key.source_msaa_samples != key.dest_msaa_samples) { + if (key.source_msaa_samples >= xenos::MsaaSamples::k4X) { + // Same BPP, 4x -> 1x/2x. + if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { + // Same BPP, 4x -> 2x. + // Horizontal pixels to samples. Vertical sample (first or second bit, + // depending on support) to second sample bit. + if (msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(31), + dxbc::Src::LU(1), dest_sample, + dxbc::Src::R(0, dxbc::Src::kXXXX)); + } else { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), + dxbc::Src::LU(0), dxbc::Src::R(0, dxbc::Src::kXXXX), + dest_sample); + } + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + a.OpUShR(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + source_tile_pixel_x_reg = 1; + } else { + // Same BPP, 4x -> 1x. + // Pixels to samples. + a.OpAnd(dxbc::Dest::R(1, 0b0100), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), source_sample); + a.OpUShR(dxbc::Dest::R(1, 0b0011), dxbc::Src::R(0), dxbc::Src::LU(1)); + source_tile_pixel_x_reg = 1; + source_tile_pixel_y_reg = 1; + } + } else { + // Same BPP, 1x/2x -> 1x/2x/4x (as long as they're different). + // Only the X part - Y is handled by common code. + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // Horizontal samples to pixels. + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); + source_tile_pixel_x_reg = 1; + } + } + } + } + // Common source Y and sample index for 1x/2x AA sources, independent of bits + // per sample. + if (key.source_msaa_samples < xenos::MsaaSamples::k4X && + key.source_msaa_samples != key.dest_msaa_samples) { + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // 1x/2x -> 4x. + if (key.source_msaa_samples == xenos::MsaaSamples::k2X) { + // 2x -> 4x. + // Vertical samples (second bit) of 4x destination to vertical sample + // (01 or 03, depending on support) of 2x source. + a.OpUShR(dxbc::Dest::R(1, 0b0100), dest_sample, dxbc::Src::LU(1)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + if (!msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + source_sample, source_sample); + } + } else { + // 1x -> 4x. + // Vertical samples (second bit) to Y pixels. + a.OpUShR(dxbc::Dest::R(1, 0b0010), dest_sample, dxbc::Src::LU(1)); + a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + source_tile_pixel_y_reg = 1; + } + } else { + // 1x/2x -> different 1x/2x. + if (key.source_msaa_samples == xenos::MsaaSamples::k2X) { + // 2x -> 1x. + // Vertical pixels of 2x destination to vertical samples (01 or 03, + // depending on support) of 1x source. + a.OpAnd(dxbc::Dest::R(1, 0b0100), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + if (!msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(1), dxbc::Src::LU(1), + source_sample, source_sample); + } + a.OpUShR(dxbc::Dest::R(1, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + source_tile_pixel_y_reg = 1; + } else { + // 1x -> 2x. + // Vertical samples (first or second bit, depending on support) of 2x + // destination to vertical pixels of 1x source. + if (!msaa_2x_supported_) { + a.OpUShR(dxbc::Dest::R(1, 0b0010), dest_sample, dxbc::Src::LU(1)); + } + a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + msaa_2x_supported_ ? dest_sample + : dxbc::Src::R(1, dxbc::Src::kYYYY)); + source_tile_pixel_y_reg = 1; + } + } + } + + uint32_t source_pixel_width_dwords_log2 = + uint32_t(key.source_msaa_samples >= xenos::MsaaSamples::k4X) + + uint32_t(source_is_64bpp); + + if (source_is_color != dest_is_color) { + // Copying between color and depth / stencil - swap 40-32bpp-sample columns + // in the pixel index within the source 32bpp tile using r1.w as temporary. + uint32_t source_32bpp_tile_half_pixels = + tile_width_samples_scaled >> (1 + source_pixel_width_dwords_log2); + a.OpULT(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(source_tile_pixel_x_reg, dxbc::Src::kXXXX), + dxbc::Src::LU(source_32bpp_tile_half_pixels)); + a.OpMovC(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LI(int32_t(source_32bpp_tile_half_pixels)), + dxbc::Src::LI(-int32_t(source_32bpp_tile_half_pixels))); + a.OpIAdd(dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(source_tile_pixel_x_reg, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + source_tile_pixel_x_reg = 1; + // r1.w = free + } + + // Current register allocation: + // r0.xy = pixel index within the destination 32bpp tile + // r0.z = 32bpp tile index relative to the destination base + // r0.w for 64bpp -> 32bpp - needed 32bpp half index of 64bpp data + // r1.xy = pixel index within the source 32bpp tile + // r1.z for 2x/4x -> = sample index within the source pixel + + // Apply the source 32bpp tile index. + // r1.w = destination to source EDRAM tile adjustment + a.OpIBFE(dxbc::Dest::R(1, 0b1000), dxbc::Src::LU(xenos::kEdramBaseTilesBits), + dxbc::Src::LU(xenos::kEdramPitchTilesBits * 2), + dxbc::Src::CB(cbuffer_index_address, kTransferCBVRegisterAddress, 0, + dxbc::Src::kXXXX)); + // r1.w = 32bpp tile index within the source + a.OpIAdd(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + // r2.x = source pitch in 32bpp tiles + a.OpUBFE(dxbc::Dest::R(2, 0b0001), dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::CB(cbuffer_index_address, kTransferCBVRegisterAddress, 0, + dxbc::Src::kXXXX)); + // r1.w = source tile row + // r2.x = source 32bpp tile within the row + a.OpUDiv(dxbc::Dest::R(1, 0b1000), dxbc::Dest::R(2, 0b0001), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(2, dxbc::Src::kXXXX)); + // r1.x = pixel X within the source texture + // r2.x = free + a.OpUMAd(dxbc::Dest::R(1, 0b0001), + dxbc::Src::LU(tile_width_samples_scaled >> + source_pixel_width_dwords_log2), + dxbc::Src::R(2, dxbc::Src::kXXXX), + dxbc::Src::R(source_tile_pixel_x_reg, dxbc::Src::kXXXX)); + // r1.y = pixel Y within the source texture + // r1.w = free + a.OpUMAd(dxbc::Dest::R(1, 0b0010), + dxbc::Src::LU( + tile_height_samples_scaled >> + uint32_t(key.source_msaa_samples >= xenos::MsaaSamples::k2X)), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(source_tile_pixel_y_reg, dxbc::Src::kYYYY)); + + // Load the source to r1, or, for 32bpp | 32bpp -> 64bpp, the first dword to + // r0 since addressing will not be needed anymore for color, and the second + // dword to r1. + // Depth will be loaded to w before loading stencil (so it doesn't overwrite + // the coordinates needed for stencil loading). + // Stencil will be loaded to x. + // Color will be loaded to x...w. + uint32_t source_color_srv_component_mask = + (1 << source_color_srv_component_count) - 1; + bool source_load_is_two_dwords = !source_is_64bpp && dest_is_64bpp; + if (key.source_msaa_samples != xenos::MsaaSamples::k1X) { + for (uint32_t i = 0; i <= uint32_t(source_load_is_two_dwords); ++i) { + uint32_t source_load_register = source_load_is_two_dwords ? i : 1; + if (srv_index_depth != UINT32_MAX) { + a.OpLdMS(dxbc::Dest::R(source_load_register, 0b1000), dxbc::Src::R(1), + 0b0011, + dxbc::Src::T(srv_index_depth, kTransferSRVRegisterDepth, + dxbc::Src::kXXXX), + source_sample); + } + if (srv_index_stencil != UINT32_MAX) { + a.OpLdMS(dxbc::Dest::R(source_load_register, 0b0001), dxbc::Src::R(1), + 0b0011, + dxbc::Src::T(srv_index_stencil, kTransferSRVRegisterStencil, + dxbc::Src::kYYYY), + source_sample); + } else if (srv_index_color != UINT32_MAX) { + a.OpLdMS(dxbc::Dest::R(source_load_register, + source_color_srv_component_mask), + dxbc::Src::R(1), 0b0011, + dxbc::Src::T(srv_index_color, kTransferSRVRegisterColor), + source_sample); + } + if (source_load_is_two_dwords && !i) { + // Go to the next sample or pixel along X if need to load two dwords. + if (key.source_msaa_samples >= xenos::MsaaSamples::k4X) { + a.OpOr(dxbc::Dest::R(1, 0b0100), source_sample, dxbc::Src::LU(1)); + source_sample = dxbc::Src::R(1, dxbc::Src::kZZZZ); + } else { + a.OpOr(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + } + } + } + } else { + // Write zero to the LOD index in r1.z. + a.OpMov(dxbc::Dest::R(1, 0b0100), dxbc::Src::LU(0)); + dxbc::Src source_coordinates(dxbc::Src::R(1, 0b10000100)); + for (uint32_t i = 0; i <= uint32_t(source_load_is_two_dwords); ++i) { + uint32_t source_load_register = source_load_is_two_dwords ? i : 1; + if (srv_index_depth != UINT32_MAX) { + a.OpLd(dxbc::Dest::R(source_load_register, 0b1000), source_coordinates, + 0b1011, + dxbc::Src::T(srv_index_depth, kTransferSRVRegisterDepth, + dxbc::Src::kXXXX)); + } + if (srv_index_stencil != UINT32_MAX) { + a.OpLd(dxbc::Dest::R(source_load_register, 0b0001), source_coordinates, + 0b1011, + dxbc::Src::T(srv_index_stencil, kTransferSRVRegisterStencil, + dxbc::Src::kYYYY)); + } else if (srv_index_color != UINT32_MAX) { + a.OpLd(dxbc::Dest::R(source_load_register, + source_color_srv_component_mask), + source_coordinates, 0b1011, + dxbc::Src::T(srv_index_color, kTransferSRVRegisterColor)); + } + if (source_load_is_two_dwords && !i) { + // Go to the next pixel along X if need to load two dwords. + a.OpOr(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + } + } + } + // Pick the needed 32bpp half of the 64bpp color based on r0.w. + if (source_is_64bpp && !dest_is_64bpp) { + uint32_t source_color_half_component_count = + source_color_format_component_count >> 1; + uint32_t color_high_dword_swizzle = + (source_color_half_component_count * 0b01010101) & + ~((uint32_t(1) << (source_color_half_component_count * 2)) - 1); + for (uint32_t i = 0; i < source_color_half_component_count; ++i) { + color_high_dword_swizzle |= (source_color_half_component_count + i) + << (i * 2); + } + a.OpMovC(dxbc::Dest::R(1, (1 << source_color_format_component_count) - 1), + dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::R(1, color_high_dword_swizzle), dxbc::Src::R(1)); + } + + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX && + srv_index_stencil != UINT32_MAX) { + // For the depth -> depth case, write the stencil loaded to r1.x directly to + // the output. + assert_true(mode.output == TransferOutput::kDepth); + a.OpMov(dxbc::Dest::OStencilRef(), dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + + if (dest_is_64bpp) { + // Handle construction of 64bpp color, either from two 32-bit samples in r0 + // and r1, or from one 64bpp sample in r1. Using r2.x as temporary when + // needed. + // If color_packed_in_r0x_and_r1x, use the generic path for combining two + // 32-bit samples - as raw in r0.x and r1.x - into the destination. + bool color_packed_in_r0x_and_r1x = false; + if (source_is_color) { + switch (source_color_format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + color_packed_in_r0x_and_r1x = true; + for (uint32_t i = 0; i < 2; ++i) { + a.OpMAd(dxbc::Dest::R(i), dxbc::Src::R(i), dxbc::Src::LF(255.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(i), dxbc::Src::R(i)); + for (uint32_t j = 1; j < 4; ++j) { + a.OpBFI(dxbc::Dest::R(i, 0b0001), dxbc::Src::LU(8), + dxbc::Src::LU(j * 8), dxbc::Src::R(i).Select(j), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + color_packed_in_r0x_and_r1x = true; + for (uint32_t i = 0; i < 2; ++i) { + a.OpMAd(dxbc::Dest::R(i), dxbc::Src::R(i), + dxbc::Src::LF(1023.0f, 1023.0f, 1023.0f, 3.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(i), dxbc::Src::R(i)); + for (uint32_t j = 1; j < 4; ++j) { + a.OpBFI(dxbc::Dest::R(i, 0b0001), dxbc::Src::LU(j == 3 ? 2 : 10), + dxbc::Src::LU(j * 10), dxbc::Src::R(i).Select(j), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: + color_packed_in_r0x_and_r1x = true; + for (uint32_t i = 0; i < 2; ++i) { + // Float16 has a wider range for both color and alpha, also NaNs - + // clamp and convert. + for (uint32_t j = 0; j < 3; ++j) { + DxbcShaderTranslator::UnclampedFloat32To7e3(a, i, j, i, j, 2, 0); + if (j) { + a.OpBFI(dxbc::Dest::R(i, 0b0001), dxbc::Src::LU(10), + dxbc::Src::LU(j * 10), dxbc::Src::R(i).Select(j), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } + // Saturate and convert the alpha. + a.OpMov(dxbc::Dest::R(i, 0b1000), dxbc::Src::R(i, dxbc::Src::kWWWW), + true); + a.OpMAd(dxbc::Dest::R(i, 0b1000), dxbc::Src::R(i, dxbc::Src::kWWWW), + dxbc::Src::LF(3.0f), dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(i, 0b1000), + dxbc::Src::R(i, dxbc::Src::kWWWW)); + a.OpBFI(dxbc::Dest::R(i, 0b0001), dxbc::Src::LU(2), + dxbc::Src::LU(30), dxbc::Src::R(i, dxbc::Src::kWWWW), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + break; + // All 64bpp formats, and all 16 bits per component formats, are + // represented as integers in ownership transfer for safe handling of + // NaNs and -32768 / -32767. + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + if (dest_color_format == + xenos::ColorRenderTargetFormat::k_32_32_FLOAT) { + for (uint32_t i = 0; i < 2; ++i) { + a.OpBFI(dxbc::Dest::O(0, 1 << i), dxbc::Src::LU(16), + dxbc::Src::LU(16), dxbc::Src::R(i, dxbc::Src::kYYYY), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } else { + a.OpMov(dxbc::Dest::O(0, 0b0011), dxbc::Src::R(0)); + a.OpMov(dxbc::Dest::O(0, 0b1100), dxbc::Src::R(1, 0b0100 << 4)); + } + break; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + if (dest_color_format == + xenos::ColorRenderTargetFormat::k_32_32_FLOAT) { + a.OpBFI(dxbc::Dest::O(0, 0b0011), dxbc::Src::LU(16), + dxbc::Src::LU(16), dxbc::Src::R(1, 0b1101), + dxbc::Src::R(1, 0b1000)); + } else { + a.OpMov(dxbc::Dest::O(0), dxbc::Src::R(1)); + } + break; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + color_packed_in_r0x_and_r1x = true; + break; + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + if (dest_color_format == + xenos::ColorRenderTargetFormat::k_32_32_FLOAT) { + a.OpMov(dxbc::Dest::O(0, 0b0011), dxbc::Src::R(1)); + } else { + a.OpUBFE(dxbc::Dest::O(0), dxbc::Src::LU(16), + dxbc::Src::LU(0, 16, 0, 16), dxbc::Src::R(1, 0b01010000)); + } + break; + } + } else { + assert_not_zero(rs & kTransferUsedRootParameterDepthSRVBit); + color_packed_in_r0x_and_r1x = true; + for (uint32_t i = 0; i < 2; ++i) { + switch (source_depth_format) { + case xenos::DepthRenderTargetFormat::kD24S8: + // Round to the nearest even integer. This seems to be the correct, + // adding +0.5 and rounding towards zero results in red instead of + // black in GTA IV and Halo 3 clear shaders. + a.OpMul(dxbc::Dest::R(i, 0b1000), dxbc::Src::R(i, dxbc::Src::kWWWW), + dxbc::Src::LF(float(0xFFFFFF))); + a.OpRoundNE(dxbc::Dest::R(i, 0b1000), + dxbc::Src::R(i, dxbc::Src::kWWWW)); + a.OpFToU(dxbc::Dest::R(i, 0b1000), + dxbc::Src::R(i, dxbc::Src::kWWWW)); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + // Convert using r1.y as temporary. + DxbcShaderTranslator::PreClampedDepthTo20e4(a, i, 3, i, 3, 1, 1, + true); + break; + } + // Merge depth and stencil into r0/r1.x. + a.OpBFI(dxbc::Dest::R(i, 0b0001), dxbc::Src::LU(24), dxbc::Src::LU(8), + dxbc::Src::R(i, dxbc::Src::kWWWW), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } + if (color_packed_in_r0x_and_r1x) { + if (dest_color_format == xenos::ColorRenderTargetFormat::k_32_32_FLOAT) { + a.OpMov(dxbc::Dest::O(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpMov(dxbc::Dest::O(0, 0b0010), dxbc::Src::R(1, dxbc::Src::kXXXX)); + } else { + for (uint32_t i = 0; i < 2; ++i) { + a.OpUBFE(dxbc::Dest::O(0, 0b11 << (i * 2)), dxbc::Src::LU(16), + dxbc::Src::LU(0, 16, 0, 16), + dxbc::Src::R(i, dxbc::Src::kXXXX)); + } + } + } + } else { + // Handle 32bpp color. If color_packed_in_r1x is true, a raw 32bpp color + // value was written, and common handling will be done. + bool color_packed_in_r1x = false; + bool depth_loaded_in_guest_format = false; + if (source_is_color) { + switch (source_color_format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + if (dest_is_stencil_bit) { + a.OpMAd(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LF(255.0f), dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } else if (dest_is_color && + (dest_color_format == + xenos::ColorRenderTargetFormat::k_8_8_8_8 || + dest_color_format == + xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA)) { + // Same format - passthrough. + a.OpMov(dxbc::Dest::O(0), dxbc::Src::R(1)); + } else if (mode.output == TransferOutput::kDepth) { + // When need only depth, not stencil, skip the red component. + a.OpMAd(dxbc::Dest::R( + 1, osgn_parameter_index_sv_stencil_ref != UINT32_MAX + ? 0b1111 + : 0b1110), + dxbc::Src::R(1), dxbc::Src::LF(255.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1, 0b1110), dxbc::Src::R(1)); + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX) { + // Write the red component to the stencil reference. + a.OpFToU(dxbc::Dest::OStencilRef(), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + // Put depth in 0:23 of r1.w. + // r1.y = 0xGGBB0000. + a.OpBFI(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(8), + dxbc::Src::LU(8), dxbc::Src::R(1, dxbc::Src::kZZZZ), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + // r1.w = 0xGGBBAA00. + a.OpBFI(dxbc::Dest::R(1, 0b1000), dxbc::Src::LU(8), + dxbc::Src::LU(16), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + } else { + color_packed_in_r1x = true; + a.OpMAd(dxbc::Dest::R(1), dxbc::Src::R(1), dxbc::Src::LF(255.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1), dxbc::Src::R(1)); + for (uint32_t i = 1; i < 4; ++i) { + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(8), + dxbc::Src::LU(i * 8), dxbc::Src::R(1).Select(i), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + if (dest_is_stencil_bit) { + a.OpMAd(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LF(1023.0f), dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } else if (dest_is_color && + (dest_color_format == + xenos::ColorRenderTargetFormat::k_2_10_10_10 || + dest_color_format == xenos::ColorRenderTargetFormat:: + k_2_10_10_10_AS_10_10_10_10)) { + a.OpMov(dxbc::Dest::O(0), dxbc::Src::R(1)); + } else { + color_packed_in_r1x = true; + a.OpMAd(dxbc::Dest::R(1), dxbc::Src::R(1), + dxbc::Src::LF(1023.0f, 1023.0f, 1023.0f, 3.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1), dxbc::Src::R(1)); + for (uint32_t i = 1; i < 4; ++i) { + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(i == 3 ? 2 : 10), + dxbc::Src::LU(i * 10), dxbc::Src::R(1).Select(i), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: + if (dest_is_stencil_bit) { + DxbcShaderTranslator::UnclampedFloat32To7e3(a, 1, 0, 1, 0, 2, 0); + } else if (dest_is_color && + (dest_color_format == + xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT || + dest_color_format == + xenos::ColorRenderTargetFormat:: + k_2_10_10_10_FLOAT_AS_16_16_16_16)) { + a.OpMov(dxbc::Dest::O(0), dxbc::Src::R(1)); + } else { + color_packed_in_r1x = true; + // Float16 has a wider range for both color and alpha, also NaNs - + // clamp and convert. + for (uint32_t i = 0; i < 3; ++i) { + DxbcShaderTranslator::UnclampedFloat32To7e3(a, 1, i, 1, i, 2, 0); + if (i) { + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(10), + dxbc::Src::LU(i * 10), dxbc::Src::R(1).Select(i), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + } + // Saturate and convert the alpha. + a.OpMov(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + true); + a.OpMAd(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LF(3.0f), dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(2), + dxbc::Src::LU(30), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + break; + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + // All 16 bits per component formats are represented as integers in + // ownership transfer for safe handling of NaNs and -32768 / -32767. + if (dest_is_stencil_bit) { + // High bits are not important for discarding, as only one bit is + // checked - already loaded to red. + } else if (dest_is_color && + (dest_color_format == + xenos::ColorRenderTargetFormat::k_16_16 || + dest_color_format == + xenos::ColorRenderTargetFormat::k_16_16_FLOAT)) { + a.OpMov(dxbc::Dest::O(0, 0b0011), dxbc::Src::R(1)); + } else { + color_packed_in_r1x = true; + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(16), + dxbc::Src::LU(16), dxbc::Src::R(1, dxbc::Src::kYYYY), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + break; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + color_packed_in_r1x = true; + break; + } + } else if (rs & kTransferUsedRootParameterDepthSRVBit) { + if (dest_is_color || dest_depth_format != source_depth_format) { + // Need to reinterpret the depth value as color or as a different depth + // format. Convert the depth within r1.w. + depth_loaded_in_guest_format = true; + switch (source_depth_format) { + case xenos::DepthRenderTargetFormat::kD24S8: + // Round to the nearest even integer. This seems to be the correct, + // adding +0.5 and rounding towards zero results in red instead of + // black in GTA IV and Halo 3 clear shaders. + a.OpMul(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LF(float(0xFFFFFF))); + a.OpRoundNE(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpFToU(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + // Convert using r1.y as temporary. + DxbcShaderTranslator::PreClampedDepthTo20e4(a, 1, 3, 1, 3, 1, 1, + true); + break; + } + if (dest_is_color) { + // Merge depth and stencil into r1.x for reinterpretation as color. + color_packed_in_r1x = true; + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(24), dxbc::Src::LU(8), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + } + } + switch (mode.output) { + case TransferOutput::kColor: + // Unless a special path was taken, unpack the raw 32bpp value into the + // 32bpp color output. Any register can be used as temporary if needed - + // this is the end of the shader. + if (color_packed_in_r1x) { + switch (dest_color_format) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + a.OpUBFE(dxbc::Dest::R(1), dxbc::Src::LU(8), + dxbc::Src::LU(0, 8, 16, 24), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + a.OpUToF(dxbc::Dest::R(1), dxbc::Src::R(1)); + a.OpMul(dxbc::Dest::O(0), dxbc::Src::R(1), + dxbc::Src::LF(1.0f / 255.0f)); + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + a.OpUBFE(dxbc::Dest::R(1), dxbc::Src::LU(10, 10, 10, 2), + dxbc::Src::LU(0, 10, 20, 30), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + a.OpUToF(dxbc::Dest::R(1), dxbc::Src::R(1)); + a.OpMul(dxbc::Dest::O(0), dxbc::Src::R(1), + dxbc::Src::LF(1.0f / 1023.0f, 1.0f / 1023.0f, + 1.0f / 1023.0f, 1.0f / 3.0f)); + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat:: + k_2_10_10_10_FLOAT_AS_16_16_16_16: + // Color using r1.yz as temporary. + for (uint32_t i = 0; i < 3; ++i) { + DxbcShaderTranslator::Float7e3To32(a, dxbc::Dest::O(0, 1 << i), + 1, 0, i * 10, 1, 1, 1, 2); + } + // Alpha. + a.OpUBFE(dxbc::Dest::R(1, 0b1000), dxbc::Src::LU(2), + dxbc::Src::LU(30), dxbc::Src::R(1, dxbc::Src::kXXXX)); + a.OpUToF(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpMul(dxbc::Dest::O(0, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LF(1.0f / 3.0f)); + break; + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + // All 16 bits per component formats are represented as integers + // in ownership transfer for safe handling of NaNs and + // -32768 / -32767. + a.OpUBFE(dxbc::Dest::O(0, 0b0011), dxbc::Src::LU(16), + dxbc::Src::LU(0, 16, 0, 0), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + break; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + // Already as a 32-bit value. + a.OpMov(dxbc::Dest::O(0, 0b0001), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + break; + default: + // A 64bpp format (handled separately) or an invalid one. + assert_unhandled_case(dest_color_format); + } + } + break; + case TransferOutput::kDepth: + if (source_is_color || depth_loaded_in_guest_format) { + if (color_packed_in_r1x) { + // Extract the depth bits to r1.w. + a.OpUBFE(dxbc::Dest::R(1, 0b1000), dxbc::Src::LU(24), + dxbc::Src::LU(8), dxbc::Src::R(1, dxbc::Src::kXXXX)); + if (osgn_parameter_index_sv_stencil_ref != UINT32_MAX) { + // Extract the stencil bits to the stencil reference. + // The depth -> depth case is handled earlier, not long after + // loading the stencil, for simplicity. + a.OpUBFE(dxbc::Dest::OStencilRef(), dxbc::Src::LU(8), + dxbc::Src::LU(0), dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + } + // r1.w contains the depth in the guest format. If a host depth source + // is available, need to check if it's up to date - if it is, the host + // precision value needs to be written. Otherwise, the new guest value + // needs to be converted to the host format. Using `if` here because + // it's likely that the values will either be the same - if not + // modified - or different - if cleared or totally overwritten - in + // large amounts of samples, usually whole waves, at once. + if (rs & kTransferUsedRootParameterHostDepthSRVBit) { + // Load the host float32 depth to r0.x, check if, when converted to + // the guest format, it's the same as the guest source, thus up to + // date, and if it is, write host float32 depth to r1.w, otherwise + // do the guest -> host conversion on the `else` path. + + // Current register allocation: + // r0.xy = pixel index within the destination 32bpp tile + // r0.z = 32bpp tile index relative to the destination base + // r1.w = depth in guest format + + if (key.host_depth_source_is_copy) { + // Get the address in the EDRAM scratch buffer and load from + // there. + // The beginning of the buffer is (0, 0) of the destination. + // 40-sample columns are not swapped for addressing simplicity + // (because this is used for depth -> depth transfers, where + // swapping isn't needed). + // Convert samples to pixels. + assert_true(key.host_depth_source_msaa_samples == + xenos::MsaaSamples::k1X); + if (key.dest_msaa_samples >= xenos::MsaaSamples::k2X) { + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // Horizontal sample index in bit 0. + a.OpBFI(dxbc::Dest::R(0, 0b0001), dxbc::Src::LU(31), + dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kXXXX), + dest_sample); + } + // Vertical sample index in bit 0 for true 2x or in bit 1 for + // 4x or for 2x emulated as 4x. + if (key.dest_msaa_samples == xenos::MsaaSamples::k2X && + msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kYYYY), + dest_sample); + } else { + // Using r0.w as a temporary. + a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, + dxbc::Src::LU(1)); + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } + } + // Combine the tile sample index and the tile index into buffer + // address to r0.x. + a.OpUMAd(dxbc::Dest::R(0, 0b0001), + dxbc::Src::LU(tile_width_samples_scaled), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpUMAd(dxbc::Dest::R(0, 0b0001), + dxbc::Src::LU(tile_width_samples_scaled * + tile_height_samples_scaled), + dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + // Load from the buffer. + a.OpLd(dxbc::Dest::R(0, 0b0001), + dxbc::Src::R(0, dxbc::Src::kXXXX), 0b0001, + dxbc::Src::T(srv_index_host_depth, + kTransferSRVRegisterHostDepth, + dxbc::Src::kXXXX)); + } else { + // Adjust the tile index from the destination to the host depth + // source. + // r0.w = destination to host depth source EDRAM tile adjustment + a.OpIBFE(dxbc::Dest::R(0, 0b1000), + dxbc::Src::LU(xenos::kEdramBaseTilesBits), + dxbc::Src::LU(xenos::kEdramPitchTilesBits * 2), + dxbc::Src::CB(cbuffer_index_host_depth_address, + kTransferCBVRegisterHostDepthAddress, 0, + dxbc::Src::kXXXX)); + // r0.z = tile index relative to the host depth source base + // r0.w = free + a.OpIAdd(dxbc::Dest::R(0, 0b0100), + dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + // Convert position and sample index from within the destination + // tile to within the host depth source tile, like for the guest + // render target, but for 32bpp -> 32bpp only. + dxbc::Src host_depth_source_sample(dest_sample); + if (key.host_depth_source_msaa_samples != key.dest_msaa_samples) { + if (key.host_depth_source_msaa_samples >= + xenos::MsaaSamples::k4X) { + // 4x -> 1x/2x. + if (key.dest_msaa_samples == xenos::MsaaSamples::k2X) { + // 4x -> 2x. + // Horizontal pixels to samples. Vertical sample (first or + // second bit, depending on support) to second sample bit. + if (msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(31), + dxbc::Src::LU(1), dest_sample, + dxbc::Src::R(0, dxbc::Src::kXXXX)); + } else { + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), + dxbc::Src::LU(0), + dxbc::Src::R(0, dxbc::Src::kXXXX), dest_sample); + } + host_depth_source_sample = + dxbc::Src::R(0, dxbc::Src::kWWWW); + a.OpUShR(dxbc::Dest::R(0, 0b0001), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + } else { + // 4x -> 1x. + // Pixels to samples. + a.OpAnd(dxbc::Dest::R(0, 0b1000), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + host_depth_source_sample = + dxbc::Src::R(0, dxbc::Src::kWWWW); + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), + dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kYYYY), + host_depth_source_sample); + a.OpUShR(dxbc::Dest::R(0, 0b0011), dxbc::Src::R(0), + dxbc::Src::LU(1)); + } + } else { + // 1x/2x -> 1x/2x/4x (as long as they're different). + // Only the X part - Y is handled by common code. + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // Horizontal samples to pixels. + a.OpBFI(dxbc::Dest::R(0, 0b0001), dxbc::Src::LU(31), + dxbc::Src::LU(1), dxbc::Src::R(0, dxbc::Src::kXXXX), + dest_sample); + } + } + // Host depth source Y and sample index for 1x/2x AA sources. + if (key.host_depth_source_msaa_samples < + xenos::MsaaSamples::k4X) { + if (key.dest_msaa_samples >= xenos::MsaaSamples::k4X) { + // 1x/2x -> 4x. + if (key.host_depth_source_msaa_samples == + xenos::MsaaSamples::k2X) { + // 2x -> 4x. + // Vertical samples (second bit) of 4x destination to + // vertical sample (01 or 03, depending on support) of 2x + // source. + a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, + dxbc::Src::LU(1)); + host_depth_source_sample = + dxbc::Src::R(0, dxbc::Src::kWWWW); + if (!msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), + dxbc::Src::LU(1), host_depth_source_sample, + host_depth_source_sample); + } + } else { + // 1x -> 4x. + // Vertical samples (second bit) to Y pixels, using r0.w + // (not needed without source MSAA) as a temporary. + a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, + dxbc::Src::LU(1)); + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } + } else { + // 1x/2x -> different 1x/2x. + if (key.host_depth_source_msaa_samples == + xenos::MsaaSamples::k2X) { + // 2x -> 1x. + // Vertical pixels of 2x destination to vertical samples + // (01 or 03, depending on support) of 1x source. + a.OpAnd(dxbc::Dest::R(0, 0b1000), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + host_depth_source_sample = + dxbc::Src::R(0, dxbc::Src::kWWWW); + if (!msaa_2x_supported_) { + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), + dxbc::Src::LU(1), host_depth_source_sample, + host_depth_source_sample); + } + a.OpUShR(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(1)); + } else { + // 1x -> 2x. + // Vertical samples (first or second bit, depending on + // support) of 2x destination to vertical pixels of 1x + // source. + // Using r0.w (not needed without source MSAA) as a + // temporary. + if (!msaa_2x_supported_) { + a.OpUShR(dxbc::Dest::R(0, 0b1000), dest_sample, + dxbc::Src::LU(1)); + } + a.OpBFI(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(31), + dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kYYYY), + msaa_2x_supported_ + ? dest_sample + : dxbc::Src::R(0, dxbc::Src::kWWWW)); + } + } + } + } + // r1.x = host depth source pitch in tiles + a.OpUBFE(dxbc::Dest::R(1, 0b0001), + dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::CB(cbuffer_index_host_depth_address, + kTransferCBVRegisterHostDepthAddress, 0, + dxbc::Src::kXXXX)); + // r0.z = host depth source tile row + // r1.x = host depth source tile within the row + a.OpUDiv(dxbc::Dest::R(0, 0b0100), dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + // r0.x = pixel X within the host depth source texture + // r1.x = free + a.OpUMAd( + dxbc::Dest::R(0, 0b0001), + dxbc::Src::LU(tile_width_samples_scaled >> + uint32_t(key.host_depth_source_msaa_samples >= + xenos::MsaaSamples::k4X)), + dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + // r0.y = pixel Y within the host depth source texture + // r0.z = free + a.OpUMAd( + dxbc::Dest::R(0, 0b0010), + dxbc::Src::LU(tile_height_samples_scaled >> + uint32_t(key.host_depth_source_msaa_samples >= + xenos::MsaaSamples::k2X)), + dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + // Load from the host depth texture. + if (key.host_depth_source_msaa_samples != + xenos::MsaaSamples::k1X) { + a.OpLdMS(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0), 0b0011, + dxbc::Src::T(srv_index_host_depth, + kTransferSRVRegisterHostDepth, + dxbc::Src::kXXXX), + host_depth_source_sample); + } else { + // Write zero to the LOD index in r0.z. + a.OpMov(dxbc::Dest::R(0, 0b0100), dxbc::Src::LU(0)); + a.OpLd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, 0b10000100), + 0b1011, + dxbc::Src::T(srv_index_host_depth, + kTransferSRVRegisterHostDepth, + dxbc::Src::kXXXX)); + } + } + // Convert the host depth value in r0.x to the guest format in r0.y + // using r0.z as a temporary and check if it matches the value in + // the currently owning guest render target. + switch (dest_depth_format) { + case xenos::DepthRenderTargetFormat::kD24S8: + // Round to the nearest even integer. This seems to be the + // correct, adding +0.5 and rounding towards zero results in red + // instead of black in GTA IV and Halo 3 clear shaders. + a.OpMul(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LF(float(0xFFFFFF))); + a.OpRoundNE(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + a.OpFToU(dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + DxbcShaderTranslator::PreClampedDepthTo20e4(a, 0, 1, 0, 0, 0, 2, + true); + break; + } + a.OpIEq(dxbc::Dest::R(0, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpIf(true, dxbc::Src::R(0, dxbc::Src::kYYYY)); + // If the host depth is up to date, write it to oDepth at the host + // precision instead of converting the guest depth. + a.OpMov(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpElse(); + } + // Convert using r0.x as a temporary. + switch (dest_depth_format) { + case xenos::DepthRenderTargetFormat::kD24S8: + // Multiplying by 1.0 / 0xFFFFFF produces an incorrect result (for + // 0xC00000, for instance - which is 2_10_10_10 clear to 0001) - + // rescale from 0...0xFFFFFF to 0...0x1000000 doing what true + // float division followed by multiplication does (on x86-64 MSVC + // with default SSE rounding) - values starting from 0x800000 + // become bigger by 1; then accurately bias the result's exponent. + a.OpUShR(dxbc::Dest::R(0, 0b0001), + dxbc::Src::R(1, dxbc::Src::kWWWW), dxbc::Src::LU(23)); + a.OpIAdd(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(0, dxbc::Src::kXXXX)); + a.OpUToF(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpMul(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LF(1.0f / float(1 << 24))); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + DxbcShaderTranslator::Depth20e4To32(a, dxbc::Dest::R(1, 0b1000), + 1, 3, 0, 1, 3, 0, 0, true); + break; + } + // Host depth is different, or not available - convert the guest depth + // to the destination format. + if (rs & kTransferUsedRootParameterHostDepthSRVBit) { + // Close the conditional for the host / guest depth. + a.OpEndIf(); + } + } + a.OpMov(dxbc::Dest::ODepth(), dxbc::Src::R(1, dxbc::Src::kWWWW)); + break; + case TransferOutput::kStencilBit: + // Discard the sample if the needed stencil bit is not set. + assert_true(cbuffer_index_stencil_mask != UINT32_MAX); + a.OpAnd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::CB(cbuffer_index_stencil_mask, + kTransferCBVRegisterStencilMask, 0, + dxbc::Src::kXXXX)); + a.OpDiscard(false, dxbc::Src::R(0, dxbc::Src::kXXXX)); + break; + } + } + + if (dest_is_color) { + // Fill the unused components of the color result. + uint32_t dest_color_component_count = + xenos::GetColorRenderTargetFormatComponentCount(dest_color_format); + uint32_t dest_color_unwritten_mask = + 0b1111 & ~uint32_t((1 << dest_color_component_count) - 1); + if (dest_color_component_count < 4) { + a.OpMov(dxbc::Dest::O(0, dest_color_unwritten_mask), dxbc::Src::LU(0)); + } + } + + a.OpRet(); + + // Write the shader program length in dwords. + built_shader_[shex_position_dwords + 1] = + uint32_t(built_shader_.size()) - shex_position_dwords; + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kShaderEx; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Shader feature info + // *************************************************************************** + + if (shader_uses_stencil_reference_output) { + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t sfi0_position_dwords = + blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(sfi0_position_dwords + + sizeof(dxbc::ShaderFeatureInfo) / sizeof(uint32_t)); + auto& shader_feature_info = *reinterpret_cast( + built_shader_.data() + sfi0_position_dwords); + shader_feature_info.feature_flags[0] |= dxbc::kShaderFeature0_StencilRef; + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kShaderFeatureInfo; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + } + + // *************************************************************************** + // Statistics + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t stat_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(stat_position_dwords + + sizeof(dxbc::Statistics) / sizeof(uint32_t)); + std::memcpy(built_shader_.data() + stat_position_dwords, &stat, + sizeof(dxbc::Statistics)); + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kStatistics; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Container header + // *************************************************************************** + + uint32_t built_shader_size_bytes = + uint32_t(built_shader_.size() * sizeof(uint32_t)); + { + auto& container_header = + *reinterpret_cast(built_shader_.data()); + container_header.InitializeIdentification(); + container_header.size_bytes = built_shader_size_bytes; + container_header.blob_count = blob_count; + CalculateDXBCChecksum( + reinterpret_cast(built_shader_.data()), + static_cast(built_shader_size_bytes), + reinterpret_cast(&container_header.hash)); + } + + // *************************************************************************** + // Pipeline + // *************************************************************************** + + ID3D12PipelineState* const* pipelines; + ID3D12Device* device = + command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); + D3D12_INPUT_ELEMENT_DESC pipeline_input_element_desc; + pipeline_input_element_desc.SemanticName = "POSITION"; + pipeline_input_element_desc.SemanticIndex = 0; + pipeline_input_element_desc.Format = DXGI_FORMAT_R32G32_FLOAT; + pipeline_input_element_desc.InputSlot = 0; + pipeline_input_element_desc.AlignedByteOffset = 0; + pipeline_input_element_desc.InputSlotClass = + D3D12_INPUT_CLASSIFICATION_PER_VERTEX_DATA; + pipeline_input_element_desc.InstanceDataStepRate = 0; + D3D12_GRAPHICS_PIPELINE_STATE_DESC pipeline_desc = {}; + pipeline_desc.pRootSignature = transfer_root_signatures_[size_t( + use_stencil_reference_output_ ? mode.root_signature_with_stencil_ref + : mode.root_signature_no_stencil_ref)]; + pipeline_desc.VS.pShaderBytecode = passthrough_position_xy_vs; + pipeline_desc.VS.BytecodeLength = sizeof(passthrough_position_xy_vs); + pipeline_desc.PS.pShaderBytecode = built_shader_.data(); + pipeline_desc.PS.BytecodeLength = built_shader_size_bytes; + if (key.dest_msaa_samples == xenos::MsaaSamples::k2X && !msaa_2x_supported_) { + // Using sample 0 as 0 and 3 as 1 for 2x instead. + pipeline_desc.SampleMask = 0b1001; + pipeline_desc.SampleDesc.Count = 4; + } else { + pipeline_desc.SampleMask = UINT_MAX; + pipeline_desc.SampleDesc.Count = UINT(1) << UINT(key.dest_msaa_samples); + } + pipeline_desc.RasterizerState.FillMode = D3D12_FILL_MODE_SOLID; + pipeline_desc.RasterizerState.CullMode = D3D12_CULL_MODE_NONE; + pipeline_desc.RasterizerState.DepthClipEnable = TRUE; + pipeline_desc.InputLayout.pInputElementDescs = &pipeline_input_element_desc; + pipeline_desc.InputLayout.NumElements = 1; + pipeline_desc.PrimitiveTopologyType = D3D12_PRIMITIVE_TOPOLOGY_TYPE_TRIANGLE; + if (dest_is_stencil_bit) { + pipeline_desc.DepthStencilState.StencilEnable = TRUE; + pipeline_desc.DepthStencilState.FrontFace.StencilFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.FrontFace.StencilDepthFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.FrontFace.StencilPassOp = + D3D12_STENCIL_OP_REPLACE; + pipeline_desc.DepthStencilState.FrontFace.StencilFunc = + D3D12_COMPARISON_FUNC_ALWAYS; + pipeline_desc.DepthStencilState.BackFace.StencilFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.BackFace.StencilDepthFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.BackFace.StencilPassOp = + D3D12_STENCIL_OP_REPLACE; + pipeline_desc.DepthStencilState.BackFace.StencilFunc = + D3D12_COMPARISON_FUNC_ALWAYS; + pipeline_desc.DSVFormat = GetDepthDSVDXGIFormat(dest_depth_format); + // Even if creation fails, still store the null pointers not to try to + // create again. + std::array& stencil_bit_pipelines = + transfer_stencil_bit_pipelines_ + .emplace(std::piecewise_construct, std::make_tuple(key), + std::make_tuple()) + .first->second; + bool stencil_pipelines_created = true; + for (uint32_t i = 0; i < 8; ++i) { + pipeline_desc.DepthStencilState.StencilWriteMask = UINT8(1) << i; + if (SUCCEEDED(device->CreateGraphicsPipelineState( + &pipeline_desc, IID_PPV_ARGS(&stencil_bit_pipelines[i])))) { + continue; + } + stencil_pipelines_created = false; + for (uint32_t j = 0; j < i; ++j) { + stencil_bit_pipelines[j]->Release(); + stencil_bit_pipelines[j] = nullptr; + } + break; + } + pipelines = + stencil_pipelines_created ? stencil_bit_pipelines.data() : nullptr; + } else { + if (dest_is_color) { + pipeline_desc.BlendState.RenderTarget[0].RenderTargetWriteMask = + D3D12_COLOR_WRITE_ENABLE_ALL; + pipeline_desc.NumRenderTargets = 1; + pipeline_desc.RTVFormats[0] = + GetColorOwnershipTransferDXGIFormat(dest_color_format); + } else { + pipeline_desc.DepthStencilState.DepthEnable = TRUE; + pipeline_desc.DepthStencilState.DepthWriteMask = + D3D12_DEPTH_WRITE_MASK_ALL; + pipeline_desc.DepthStencilState.DepthFunc = + cvars::depth_transfer_not_equal_test ? D3D12_COMPARISON_FUNC_NOT_EQUAL + : D3D12_COMPARISON_FUNC_ALWAYS; + if (use_stencil_reference_output_) { + pipeline_desc.DepthStencilState.StencilEnable = TRUE; + pipeline_desc.DepthStencilState.StencilWriteMask = UINT8_MAX; + pipeline_desc.DepthStencilState.FrontFace.StencilFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.FrontFace.StencilDepthFailOp = + cvars::depth_transfer_not_equal_test ? D3D12_STENCIL_OP_REPLACE + : D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.FrontFace.StencilPassOp = + D3D12_STENCIL_OP_REPLACE; + // Using ALWAYS, not NOT_EQUAL, so depth writing is unaffected by + // stencil being different. + pipeline_desc.DepthStencilState.FrontFace.StencilFunc = + D3D12_COMPARISON_FUNC_ALWAYS; + pipeline_desc.DepthStencilState.BackFace.StencilFailOp = + D3D12_STENCIL_OP_KEEP; + pipeline_desc.DepthStencilState.BackFace.StencilDepthFailOp = + D3D12_STENCIL_OP_REPLACE; + pipeline_desc.DepthStencilState.BackFace.StencilPassOp = + D3D12_STENCIL_OP_REPLACE; + pipeline_desc.DepthStencilState.BackFace.StencilFunc = + D3D12_COMPARISON_FUNC_ALWAYS; + } + pipeline_desc.DSVFormat = GetDepthDSVDXGIFormat(dest_depth_format); + } + ID3D12PipelineState* pipeline; + if (FAILED(device->CreateGraphicsPipelineState(&pipeline_desc, + IID_PPV_ARGS(&pipeline)))) { + pipeline = nullptr; + } + // Even if creation fails, still store the null pointer not to try to create + // again. + // Return a pointer to the persistent location. + ID3D12PipelineState*& inserted_pipeline = + transfer_pipelines_.emplace(key, pipeline).first->second; + pipelines = inserted_pipeline ? &inserted_pipeline : nullptr; + } + // TODO(Triang3l): Pipeline state name debug names (lots of variables - but + // not very important since everything can be derived from the bindings and + // outputs in a debugger). + + if (!pipelines) { + // Stencil bit copying uses only the stencil SRV for depth / stencil source, + // can't use srv_index_depth for checking. + const char* source_format_name = + (rs & kTransferUsedRootParameterColorSRVBit) + ? xenos::GetColorRenderTargetFormatName(source_color_format) + : xenos::GetDepthRenderTargetFormatName(source_depth_format); + const char* dest_format_name = + mode.output == TransferOutput::kColor + ? xenos::GetColorRenderTargetFormatName(dest_color_format) + : xenos::GetDepthRenderTargetFormatName(dest_depth_format); + if (srv_index_host_depth != UINT32_MAX) { + XELOGE( + "D3D12RenderTargetCache: Failed to create a render target ownership " + "transfer pipeline for {}-sample {} + {}-sample host depth{} -> " + "{}-sample {} for mode {}", + uint32_t(1) << uint32_t(key.source_msaa_samples), source_format_name, + uint32_t(1) << uint32_t(key.host_depth_source_msaa_samples), + key.host_depth_source_is_copy ? " copy" : "", + uint32_t(1) << uint32_t(key.dest_msaa_samples), dest_format_name, + uint32_t(key.mode)); + } else { + XELOGE( + "D3D12RenderTargetCache: Failed to create a render target ownership " + "transfer pipeline for {}-sample {} -> {}-sample {} for mode {}", + uint32_t(1) << uint32_t(key.source_msaa_samples), source_format_name, + uint32_t(1) << uint32_t(key.dest_msaa_samples), dest_format_name, + uint32_t(key.mode)); + } + } + return pipelines; +} + +void D3D12RenderTargetCache::PerformTransfersAndResolveClears( + uint32_t render_target_count, RenderTarget* const* render_targets, + const std::vector* render_target_transfers, + const uint64_t* render_target_resolve_clear_values, + const Transfer::Rectangle* resolve_clear_rectangle) { + assert_true(GetPath() == Path::kHostRenderTargets); + + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + ID3D12Device* device = provider.GetDevice(); + uint64_t current_submission = command_processor_.GetCurrentSubmission(); + DeferredCommandList& command_list = + command_processor_.GetDeferredCommandList(); + + D3D12_RECT clear_rect; + if (resolve_clear_rectangle) { + // Assuming the rectangle is already clamped by the setup function from the + // common render target cache. + clear_rect.left = + LONG(resolve_clear_rectangle->x_pixels * resolution_scale_); + clear_rect.top = + LONG(resolve_clear_rectangle->y_pixels * resolution_scale_); + clear_rect.right = LONG((resolve_clear_rectangle->x_pixels + + resolve_clear_rectangle->width_pixels) * + resolution_scale_); + clear_rect.bottom = LONG((resolve_clear_rectangle->y_pixels + + resolve_clear_rectangle->height_pixels) * + resolution_scale_); + } + + // Do host depth storing for the depth destination (assuming there can be only + // one depth destination) where depth destination == host depth source. + bool host_depth_store_set_up = false; + for (uint32_t i = 0; i < render_target_count; ++i) { + RenderTarget* dest_rt = render_targets[i]; + if (!dest_rt) { + continue; + } + auto& dest_d3d12_rt = *static_cast(dest_rt); + RenderTargetKey dest_rt_key = dest_d3d12_rt.key(); + if (!dest_rt_key.is_depth) { + continue; + } + const std::vector& depth_transfers = render_target_transfers[i]; + for (const Transfer& transfer : depth_transfers) { + if (transfer.host_depth_source != dest_rt) { + continue; + } + if (!host_depth_store_set_up) { + // Bindings. + // 0 - source. + // 1 - EDRAM if bindful. + ui::d3d12::util::DescriptorCpuGpuHandlePair + host_depth_store_descriptors[2]; + if (!command_processor_.RequestOneUseSingleViewDescriptors( + 1 + uint32_t(!bindless_resources_used_), + host_depth_store_descriptors)) { + continue; + } + command_list.D3DSetComputeRootSignature( + host_depth_store_root_signature_); + // Destination (EDRAM uint4 buffer). + if (bindless_resources_used_) { + command_list.D3DSetComputeRootDescriptorTable( + kHostDepthStoreRootParameterDest, + command_processor_.GetEdramUintPow2BindlessUAVHandlePair(4) + .second); + } else { + const ui::d3d12::util::DescriptorCpuGpuHandlePair& + host_depth_store_descriptor_dest = + host_depth_store_descriptors[1]; + WriteEdramUintPow2UAVDescriptor( + host_depth_store_descriptor_dest.first, 4); + command_list.D3DSetComputeRootDescriptorTable( + kHostDepthStoreRootParameterDest, + host_depth_store_descriptor_dest.second); + } + // Depth source texture. + const ui::d3d12::util::DescriptorCpuGpuHandlePair& + host_depth_store_descriptor_source = + host_depth_store_descriptors[0]; + device->CopyDescriptorsSimple( + 1, host_depth_store_descriptor_source.first, + dest_d3d12_rt.descriptor_srv().GetHandle(), + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); + command_list.D3DSetComputeRootDescriptorTable( + kHostDepthStoreRootParameterSource, + host_depth_store_descriptor_source.second); + // Render target constant. + HostDepthStoreRenderTargetConstant + host_depth_store_render_target_constant; + host_depth_store_render_target_constant.pitch_tiles = + dest_rt_key.pitch_tiles_at_32bpp; + host_depth_store_render_target_constant.resolution_scale = + resolution_scale_; + host_depth_store_render_target_constant.second_sample_index = + (dest_rt_key.msaa_samples == xenos::MsaaSamples::k2X && + !msaa_2x_supported_) + ? 3 + : 1; + command_list.D3DSetComputeRoot32BitConstants( + kHostDepthStoreRootParameterRenderTargetConstant, + sizeof(host_depth_store_render_target_constant) / sizeof(uint32_t), + &host_depth_store_render_target_constant, 0); + // Barriers - don't need to try to combine them with the rest of + // render target transfer barriers now - if this happens, after host + // depth storing, NON_PIXEL_SHADER_RESOURCE -> DEPTH_WRITE will be done + // anyway even in the best case, so it's not possible to have all the + // barriers in one place here. + TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), + dest_d3d12_rt.SetResourceState( + D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); + // Pipeline. + command_processor_.SetExternalPipeline( + host_depth_store_pipelines_[size_t(dest_rt_key.msaa_samples)]); + host_depth_store_set_up = true; + } + Transfer::Rectangle + transfer_rectangles[Transfer::kMaxRectanglesWithCutout]; + uint32_t transfer_rectangle_count = transfer.GetRectangles( + dest_rt_key.base_tiles, dest_rt_key.pitch_tiles_at_32bpp, + dest_rt_key.msaa_samples, false, transfer_rectangles, + resolve_clear_rectangle); + assert_not_zero(transfer_rectangle_count); + HostDepthStoreRectangleConstant host_depth_store_rectangle_constant; + // 1 thread group = 64x8 host samples. + uint32_t pixel_size_x = + resolution_scale_ + << uint32_t(dest_rt_key.msaa_samples >= xenos::MsaaSamples::k4X); + uint32_t pixel_size_y = + resolution_scale_ + << uint32_t(dest_rt_key.msaa_samples >= xenos::MsaaSamples::k2X); + for (uint32_t j = 0; j < transfer_rectangle_count; ++j) { + const Transfer::Rectangle& transfer_rectangle = transfer_rectangles[j]; + // 8 pixels is the resolve granularity, both clearing and tile size are + // aligned to 8. + assert_zero(transfer_rectangle.x_pixels & 7); + assert_zero(transfer_rectangle.y_pixels & 7); + assert_zero(transfer_rectangle.width_pixels & 7); + assert_zero(transfer_rectangle.height_pixels & 7); + assert_not_zero(transfer_rectangle.width_pixels); + host_depth_store_rectangle_constant.x_pixels_div_8 = + transfer_rectangle.x_pixels >> 3; + host_depth_store_rectangle_constant.y_pixels_div_8 = + transfer_rectangle.y_pixels >> 3; + host_depth_store_rectangle_constant.width_pixels_div_8_minus_1 = + (transfer_rectangle.width_pixels >> 3) - 1; + command_list.D3DSetComputeRoot32BitConstants( + kHostDepthStoreRootParameterRectangleConstant, + sizeof(host_depth_store_rectangle_constant) / sizeof(uint32_t), + &host_depth_store_rectangle_constant, 0); + command_processor_.SubmitBarriers(); + command_list.D3DDispatch( + (transfer_rectangle.width_pixels * pixel_size_x + 63) >> 6, + (transfer_rectangle.height_pixels * pixel_size_y) >> 3, 1); + MarkEdramBufferModified(); + } + } + break; + } + + // Try to insert as many barriers as possible in one place, hoping that in the + // best case (no cross-copying between current render targets), barriers will + // need to be only inserted here, not between transfers. In case of + // cross-copying, if the destination use is going to happen before the source + // use, choose the destination state, otherwise the source state - to match + // the order in which transfers will actually happen (otherwise there will be + // just a useless switch back and forth). + for (uint32_t i = 0; i < render_target_count; ++i) { + RenderTarget* dest_rt = render_targets[i]; + if (!dest_rt) { + continue; + } + auto& dest_d3d12_rt = *static_cast(dest_rt); + const std::vector& dest_transfers = render_target_transfers[i]; + if (dest_transfers.empty()) { + continue; + } + // Transition the sources, only if not going to be used as destinations + // earlier. + for (const Transfer& transfer : render_target_transfers[i]) { + bool source_previously_used_as_dest = false; + bool host_depth_source_previously_used_as_dest = false; + for (uint32_t j = 0; j < i; ++j) { + if (render_target_transfers[j].empty()) { + continue; + } + const RenderTarget* previous_rt = render_targets[j]; + if (transfer.source == previous_rt) { + source_previously_used_as_dest = true; + } + if (transfer.host_depth_source == previous_rt) { + host_depth_source_previously_used_as_dest = true; + } + } + if (!source_previously_used_as_dest) { + auto& source_d3d12_rt = + *static_cast(transfer.source); + command_processor_.PushTransitionBarrier( + source_d3d12_rt.resource(), + source_d3d12_rt.SetResourceState( + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + } + // transfer.host_depth_source == dest_rt means the EDRAM buffer will be + // used instead, no need to transition. + if (transfer.host_depth_source && transfer.host_depth_source != dest_rt && + !host_depth_source_previously_used_as_dest) { + auto& host_depth_source_d3d12_rt = + *static_cast(transfer.host_depth_source); + command_processor_.PushTransitionBarrier( + host_depth_source_d3d12_rt.resource(), + host_depth_source_d3d12_rt.SetResourceState( + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + } + } + // Transition the destination, only if not going to be used as a source + // earlier. + bool dest_used_previously_as_source = false; + for (uint32_t j = 0; j < i; ++j) { + for (const Transfer& previous_transfer : render_target_transfers[j]) { + if (previous_transfer.source == dest_rt || + previous_transfer.host_depth_source == dest_rt) { + dest_used_previously_as_source = true; + break; + } + } + } + if (!dest_used_previously_as_source) { + D3D12_RESOURCE_STATES dest_state = + dest_d3d12_rt.key().is_depth ? D3D12_RESOURCE_STATE_DEPTH_WRITE + : D3D12_RESOURCE_STATE_RENDER_TARGET; + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), dest_d3d12_rt.SetResourceState(dest_state), + dest_state); + } + } + if (host_depth_store_set_up) { + // Will be reading copied host depth from the EDRAM buffer. + TransitionEdramBuffer(D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + } + + // Copy source descriptors to the shader-visible heap. + // Clear previously set shader-visible descriptor indices. + for (uint32_t i = 0; i < render_target_count; ++i) { + RenderTarget* dest_rt = render_targets[i]; + if (!dest_rt) { + continue; + } + for (const Transfer& transfer : render_target_transfers[i]) { + assert_not_null(transfer.source); + auto& source_d3d12_rt = *static_cast(transfer.source); + source_d3d12_rt.SetTemporarySRVDescriptorIndex(UINT32_MAX); + source_d3d12_rt.SetTemporarySRVDescriptorIndexStencil(UINT32_MAX); + auto* host_depth_source_d3d12_rt = + static_cast(transfer.host_depth_source); + if (host_depth_source_d3d12_rt) { + host_depth_source_d3d12_rt->SetTemporarySRVDescriptorIndex(UINT32_MAX); + host_depth_source_d3d12_rt->SetTemporarySRVDescriptorIndexStencil( + UINT32_MAX); + } + } + } + current_temporary_descriptors_cpu_.clear(); + uint32_t host_depth_copy_srv_index; + if (host_depth_store_set_up && !bindless_resources_used_) { + host_depth_copy_srv_index = + uint32_t(current_temporary_descriptors_cpu_.size()); + current_temporary_descriptors_cpu_.push_back(provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32UintSRV))); + } else { + host_depth_copy_srv_index = UINT32_MAX; + } + for (uint32_t i = 0; i < render_target_count; ++i) { + RenderTarget* dest_rt = render_targets[i]; + if (!dest_rt) { + continue; + } + bool dest_is_depth = dest_rt->key().is_depth; + for (const Transfer& transfer : render_target_transfers[i]) { + assert_not_null(transfer.source); + auto& source_d3d12_rt = *static_cast(transfer.source); + if (source_d3d12_rt.temporary_srv_descriptor_index() == UINT32_MAX) { + source_d3d12_rt.SetTemporarySRVDescriptorIndex( + uint32_t(current_temporary_descriptors_cpu_.size())); + current_temporary_descriptors_cpu_.push_back( + source_d3d12_rt.descriptor_srv().GetHandle()); + } + if (source_d3d12_rt.key().is_depth && + source_d3d12_rt.temporary_srv_descriptor_index_stencil() == + UINT32_MAX) { + source_d3d12_rt.SetTemporarySRVDescriptorIndexStencil( + uint32_t(current_temporary_descriptors_cpu_.size())); + current_temporary_descriptors_cpu_.push_back( + source_d3d12_rt.descriptor_srv_stencil().GetHandle()); + } + bool source_is_depth = source_d3d12_rt.key().is_depth; + auto* host_depth_source_d3d12_rt = + static_cast(transfer.host_depth_source); + // The host_depth_source_d3d12_rt == dest_rt case would use the EDRAM + // buffer instead. + if (host_depth_source_d3d12_rt && host_depth_source_d3d12_rt != dest_rt && + host_depth_source_d3d12_rt->temporary_srv_descriptor_index() == + UINT32_MAX) { + host_depth_source_d3d12_rt->SetTemporarySRVDescriptorIndex( + uint32_t(current_temporary_descriptors_cpu_.size())); + current_temporary_descriptors_cpu_.push_back( + host_depth_source_d3d12_rt->descriptor_srv().GetHandle()); + } + } + } + uint32_t descriptor_count = + uint32_t(current_temporary_descriptors_cpu_.size()); + current_temporary_descriptors_gpu_.resize(descriptor_count); + if (!command_processor_.RequestOneUseSingleViewDescriptors( + descriptor_count, current_temporary_descriptors_gpu_.data())) { + return; + } + for (uint32_t i = 0; i < descriptor_count; ++i) { + device->CopyDescriptorsSimple(1, + current_temporary_descriptors_gpu_[i].first, + current_temporary_descriptors_cpu_[i], + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); + } + + // Perform the transfers. + + bool transfer_viewport_set = false; + float pixels_to_ndc = + (2.0f / float(D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION)) * resolution_scale_; + + TransferRootSignatureIndex last_transfer_root_signature_index = + TransferRootSignatureIndex::kCount; + uint32_t transfer_root_parameters_set = 0; + uint32_t last_descriptor_index_color = UINT32_MAX; + uint32_t last_descriptor_index_depth = UINT32_MAX; + uint32_t last_descriptor_index_stencil = UINT32_MAX; + uint32_t last_descriptor_index_host_depth_non_copy = UINT32_MAX; + bool last_descriptor_host_depth_is_copy = false; + TransferAddressConstant last_address_constant; + TransferAddressConstant last_host_depth_address_constant; + + for (uint32_t i = 0; i < render_target_count; ++i) { + RenderTarget* dest_rt = render_targets[i]; + if (!dest_rt) { + continue; + } + auto& dest_d3d12_rt = *static_cast(dest_rt); + RenderTargetKey dest_rt_key = dest_d3d12_rt.key(); + + const std::vector& current_transfers = render_target_transfers[i]; + if (!current_transfers.empty()) { + are_current_command_list_render_targets_valid_ = false; + if (dest_rt_key.is_depth) { + // Late barrier in case there was cross-copying that prevented merging + // of barriers. + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), + dest_d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_DEPTH_WRITE), + D3D12_RESOURCE_STATE_DEPTH_WRITE); + command_list.D3DOMSetRenderTargets( + 0, nullptr, FALSE, &dest_d3d12_rt.descriptor_draw().GetHandle()); + if (!use_stencil_reference_output_) { + command_processor_.SetStencilReference(UINT8_MAX); + } + } else { + // Late barrier in case there was cross-copying that prevented merging + // of barriers. + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), + dest_d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_RENDER_TARGET), + D3D12_RESOURCE_STATE_RENDER_TARGET); + command_list.D3DOMSetRenderTargets( + 1, + &(dest_d3d12_rt.descriptor_load_separate().IsValid() + ? dest_d3d12_rt.descriptor_load_separate().GetHandle() + : dest_d3d12_rt.descriptor_draw().GetHandle()), + FALSE, nullptr); + } + + uint32_t dest_pitch_tiles = dest_rt_key.GetPitchTiles(); + bool dest_is_64bpp = dest_rt_key.Is64bpp(); + + // Gather shader keys and sort to reduce pipeline state and binding + // switches. Also gather stencil rectangles to clear if needed. + bool need_stencil_bit_draws = + dest_rt_key.is_depth && !use_stencil_reference_output_; + current_transfer_invocations_.clear(); + current_transfer_invocations_.reserve( + current_transfers.size() << uint32_t(need_stencil_bit_draws)); + uint32_t rt_sort_index = 0; + TransferShaderKey new_transfer_shader_key; + new_transfer_shader_key.dest_msaa_samples = dest_rt_key.msaa_samples; + new_transfer_shader_key.dest_host_relevant_format = + dest_rt_key.host_relevant_format; + uint32_t stencil_clear_rectangle_count = 0; + for (uint32_t j = 0; j <= uint32_t(need_stencil_bit_draws); ++j) { + // j == 0 - color or depth. + // j == 1 - stencil bits. + // Stencil bit writing always requires a different root signature, + // handle these separately. Stencil never has a host depth source. + // Clear previously set sort indices. + for (const Transfer& transfer : current_transfers) { + auto* host_depth_source_d3d12_rt = + static_cast(transfer.host_depth_source); + if (host_depth_source_d3d12_rt) { + host_depth_source_d3d12_rt->SetTemporarySortIndex(UINT32_MAX); + } + assert_not_null(transfer.source); + auto& source_d3d12_rt = + *static_cast(transfer.source); + source_d3d12_rt.SetTemporarySortIndex(UINT32_MAX); + } + for (const Transfer& transfer : current_transfers) { + assert_not_null(transfer.source); + auto& source_d3d12_rt = + *static_cast(transfer.source); + D3D12RenderTarget* host_depth_source_d3d12_rt = + j ? nullptr + : static_cast(transfer.host_depth_source); + if (host_depth_source_d3d12_rt && + host_depth_source_d3d12_rt->temporary_sort_index() == + UINT32_MAX) { + host_depth_source_d3d12_rt->SetTemporarySortIndex(rt_sort_index++); + } + if (source_d3d12_rt.temporary_sort_index() == UINT32_MAX) { + source_d3d12_rt.SetTemporarySortIndex(rt_sort_index++); + } + RenderTargetKey source_rt_key = source_d3d12_rt.key(); + new_transfer_shader_key.source_msaa_samples = + source_rt_key.msaa_samples; + new_transfer_shader_key.source_host_relevant_format = + source_rt_key.host_relevant_format; + bool host_depth_source_is_copy = + host_depth_source_d3d12_rt == &dest_d3d12_rt; + new_transfer_shader_key.host_depth_source_is_copy = + host_depth_source_is_copy; + // The host depth copy buffer has only raw samples. + new_transfer_shader_key.host_depth_source_msaa_samples = + (host_depth_source_d3d12_rt && !host_depth_source_is_copy) + ? host_depth_source_d3d12_rt->key().msaa_samples + : xenos::MsaaSamples::k1X; + if (j) { + new_transfer_shader_key.mode = + source_rt_key.is_depth ? TransferMode::kDepthToStencilBit + : TransferMode::kColorToStencilBit; + stencil_clear_rectangle_count += + transfer.GetRectangles(dest_rt_key.base_tiles, dest_pitch_tiles, + dest_rt_key.msaa_samples, dest_is_64bpp, + nullptr, resolve_clear_rectangle); + } else { + if (dest_rt_key.is_depth) { + if (host_depth_source_d3d12_rt) { + new_transfer_shader_key.mode = + source_rt_key.is_depth + ? TransferMode::kDepthAndHostDepthToDepth + : TransferMode::kColorAndHostDepthToDepth; + } else { + new_transfer_shader_key.mode = + source_rt_key.is_depth ? TransferMode::kDepthToDepth + : TransferMode::kColorToDepth; + } + } else { + new_transfer_shader_key.mode = source_rt_key.is_depth + ? TransferMode::kDepthToColor + : TransferMode::kColorToColor; + } + } + current_transfer_invocations_.emplace_back(transfer, + new_transfer_shader_key); + if (j) { + current_transfer_invocations_.back().transfer.host_depth_source = + nullptr; + } + } + } + std::sort(current_transfer_invocations_.begin(), + current_transfer_invocations_.end()); + + // Clear the stencil to 0 where it will be loaded - will be setting the + // bits that need to be 1 by discarding samples. Clearing everything here + // to reduce context switches internally in the driver if clear causes + // them. + if (stencil_clear_rectangle_count) { + command_processor_.SubmitBarriers(); + D3D12_RECT* stencil_clear_rect_write_ptr = + command_list.ClearDepthStencilViewAllocatedRects( + dest_d3d12_rt.descriptor_draw().GetHandle(), + D3D12_CLEAR_FLAG_STENCIL, 0.0f, 0, + stencil_clear_rectangle_count); + assert_not_null(stencil_clear_rect_write_ptr); + for (const Transfer& transfer : current_transfers) { + Transfer::Rectangle transfer_stencil_clear_rectangles + [Transfer::kMaxRectanglesWithCutout]; + uint32_t transfer_stencil_clear_rectangle_count = + transfer.GetRectangles(dest_rt_key.base_tiles, dest_pitch_tiles, + dest_rt_key.msaa_samples, dest_is_64bpp, + transfer_stencil_clear_rectangles, + resolve_clear_rectangle); + for (uint32_t j = 0; j < transfer_stencil_clear_rectangle_count; + ++j) { + const Transfer::Rectangle& stencil_clear_rectangle = + transfer_stencil_clear_rectangles[j]; + stencil_clear_rect_write_ptr->left = + LONG(stencil_clear_rectangle.x_pixels * resolution_scale_); + stencil_clear_rect_write_ptr->top = + LONG(stencil_clear_rectangle.y_pixels * resolution_scale_); + stencil_clear_rect_write_ptr->right = + LONG((stencil_clear_rectangle.x_pixels + + stencil_clear_rectangle.width_pixels) * + resolution_scale_); + stencil_clear_rect_write_ptr->bottom = + LONG((stencil_clear_rectangle.y_pixels + + stencil_clear_rectangle.height_pixels) * + resolution_scale_); + ++stencil_clear_rect_write_ptr; + } + } + } + + // Perform the transfers for the render target. + + if (!transfer_viewport_set) { + transfer_viewport_set = true; + // Will be passing NDC directly, set the viewport to the maximum host + // render target size for simplicity. Using a power-of-two scale for + // exact pixel coordinates. + D3D12_VIEWPORT transfer_viewport; + transfer_viewport.TopLeftX = 0.0f; + transfer_viewport.TopLeftY = 0.0f; + transfer_viewport.Width = float(D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION); + transfer_viewport.Height = float(D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION); + transfer_viewport.MinDepth = 0.0f; + transfer_viewport.MaxDepth = 1.0f; + command_processor_.SetViewport(transfer_viewport); + // TODO(Triang3l): Reduce scissor to the smallest transfer region for + // more tiling friendliness. + D3D12_RECT transfer_scissor; + transfer_scissor.left = 0; + transfer_scissor.top = 0; + transfer_scissor.right = LONG(D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION); + transfer_scissor.bottom = LONG(D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION); + command_processor_.SetScissorRect(transfer_scissor); + } + + for (auto it = current_transfer_invocations_.cbegin(); + it != current_transfer_invocations_.cend(); ++it) { + const TransferInvocation& transfer_invocation_first = *it; + // Will be merging transfers from the same source into one mesh. + auto it_merged_first = it, it_merged_last = it; + uint32_t transfer_rectangle_count = + transfer_invocation_first.transfer.GetRectangles( + dest_rt_key.base_tiles, dest_pitch_tiles, + dest_rt_key.msaa_samples, dest_is_64bpp, nullptr, + resolve_clear_rectangle); + for (auto it_merge = std::next(it_merged_first); + it_merge != current_transfer_invocations_.cend(); ++it_merge) { + if (!transfer_invocation_first.CanBeMergedIntoOneDraw(*it_merge)) { + break; + } + transfer_rectangle_count += it_merge->transfer.GetRectangles( + dest_rt_key.base_tiles, dest_pitch_tiles, + dest_rt_key.msaa_samples, dest_is_64bpp, nullptr, + resolve_clear_rectangle); + it_merged_last = it_merge; + } + assert_not_zero(transfer_rectangle_count); + // Skip the merged transfers in the subsequent iterations. + it = it_merged_last; + + assert_not_null(it->transfer.source); + auto& source_d3d12_rt = + *static_cast(it->transfer.source); + auto* host_depth_source_d3d12_rt = + static_cast(it->transfer.host_depth_source); + TransferShaderKey transfer_shader_key = it->shader_key; + const TransferModeInfo& transfer_mode_info = + kTransferModes[size_t(transfer_shader_key.mode)]; + TransferRootSignatureIndex transfer_root_signature_index = + use_stencil_reference_output_ + ? transfer_mode_info.root_signature_with_stencil_ref + : transfer_mode_info.root_signature_no_stencil_ref; + uint32_t transfer_root_parameters_used = + kTransferUsedRootParameters[size_t(transfer_root_signature_index)]; + bool is_stencil_bit = + (transfer_root_parameters_used & + kTransferUsedRootParameterStencilMaskConstantBit) != 0; + + // Late barriers in case there was cross-copying that prevented merging + // of barriers. + command_processor_.PushTransitionBarrier( + source_d3d12_rt.resource(), + source_d3d12_rt.SetResourceState( + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + if (host_depth_source_d3d12_rt) { + if (transfer_shader_key.host_depth_source_is_copy) { + // Reading copied host depth from the EDRAM buffer. + TransitionEdramBuffer(D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + } else { + // Reading host depth from the texture. + command_processor_.PushTransitionBarrier( + host_depth_source_d3d12_rt->resource(), + host_depth_source_d3d12_rt->SetResourceState( + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_PIXEL_SHADER_RESOURCE); + } + } + + uint32_t transfer_vertex_count = 6 * transfer_rectangle_count; + D3D12_VERTEX_BUFFER_VIEW transfer_rectangle_buffer_view; + transfer_rectangle_buffer_view.StrideInBytes = sizeof(float) * 2; + transfer_rectangle_buffer_view.SizeInBytes = + transfer_rectangle_buffer_view.StrideInBytes * + transfer_vertex_count; + float* transfer_rectangle_write_ptr = + reinterpret_cast(transfer_vertex_buffer_pool_->Request( + current_submission, transfer_rectangle_buffer_view.SizeInBytes, + sizeof(float), nullptr, nullptr, + &transfer_rectangle_buffer_view.BufferLocation)); + if (!transfer_rectangle_write_ptr) { + continue; + } + for (auto it_merged = it_merged_first; it_merged <= it_merged_last; + ++it_merged) { + Transfer::Rectangle transfer_invocation_rectangles + [Transfer::kMaxRectanglesWithCutout]; + uint32_t transfer_invocation_rectangle_count = + it_merged->transfer.GetRectangles( + dest_rt_key.base_tiles, dest_pitch_tiles, + dest_rt_key.msaa_samples, dest_is_64bpp, + transfer_invocation_rectangles, resolve_clear_rectangle); + assert_not_zero(transfer_invocation_rectangle_count); + for (uint32_t j = 0; j < transfer_invocation_rectangle_count; ++j) { + const Transfer::Rectangle& transfer_rectangle = + transfer_invocation_rectangles[j]; + float transfer_rectangle_x0 = + -1.0f + transfer_rectangle.x_pixels * pixels_to_ndc; + float transfer_rectangle_y0 = + 1.0f - transfer_rectangle.y_pixels * pixels_to_ndc; + float transfer_rectangle_x1 = + transfer_rectangle_x0 + + transfer_rectangle.width_pixels * pixels_to_ndc; + float transfer_rectangle_y1 = + transfer_rectangle_y0 - + transfer_rectangle.height_pixels * pixels_to_ndc; + // O-* + // |/ + // * + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x0; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y0; + // *-O + // |/ + // * + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x1; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y0; + // *-* + // |/ + // O + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x0; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y1; + // * + // /| + // O-* + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x0; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y1; + // O + // /| + // *-* + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x1; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y0; + // * + // /| + // *-O + *(transfer_rectangle_write_ptr++) = transfer_rectangle_x1; + *(transfer_rectangle_write_ptr++) = transfer_rectangle_y1; + } + } + command_processor_.SetPrimitiveTopology( + D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST); + command_list.D3DIASetVertexBuffers(0, 1, + &transfer_rectangle_buffer_view); + + ID3D12PipelineState* const* transfer_pipelines = + GetOrCreateTransferPipelines(transfer_shader_key); + if (!transfer_pipelines) { + continue; + } + if (last_transfer_root_signature_index != + transfer_root_signature_index) { + last_transfer_root_signature_index = transfer_root_signature_index; + command_processor_.SetExternalGraphicsRootSignature( + transfer_root_signatures_[size_t(transfer_root_signature_index)]); + transfer_root_parameters_set = 0; + } + + // Invalidate outdated bindings. + if (transfer_root_parameters_used & + kTransferUsedRootParameterColorSRVBit) { + uint32_t descriptor_index_color = + source_d3d12_rt.temporary_srv_descriptor_index(); + assert_true(descriptor_index_color != UINT32_MAX); + if (last_descriptor_index_color != descriptor_index_color) { + last_descriptor_index_color = descriptor_index_color; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterColorSRVBit; + } + } + if (transfer_root_parameters_used & + kTransferUsedRootParameterDepthSRVBit) { + uint32_t descriptor_index_depth = + source_d3d12_rt.temporary_srv_descriptor_index(); + assert_true(descriptor_index_depth != UINT32_MAX); + if (last_descriptor_index_depth != descriptor_index_depth) { + last_descriptor_index_depth = descriptor_index_depth; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterDepthSRVBit; + } + } + if (transfer_root_parameters_used & + kTransferUsedRootParameterStencilSRVBit) { + uint32_t descriptor_index_stencil = + source_d3d12_rt.temporary_srv_descriptor_index_stencil(); + assert_true(descriptor_index_stencil != UINT32_MAX); + if (last_descriptor_index_stencil != descriptor_index_stencil) { + last_descriptor_index_stencil = descriptor_index_stencil; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterStencilSRVBit; + } + } + if (transfer_root_parameters_used & + kTransferUsedRootParameterHostDepthSRVBit) { + if (transfer_shader_key.host_depth_source_is_copy) { + if (!last_descriptor_host_depth_is_copy) { + last_descriptor_host_depth_is_copy = true; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterHostDepthSRVBit; + } + } else { + assert_not_null(host_depth_source_d3d12_rt); + uint32_t descriptor_index_host_depth = + host_depth_source_d3d12_rt->temporary_srv_descriptor_index(); + assert_true(descriptor_index_host_depth != UINT32_MAX); + if (last_descriptor_host_depth_is_copy || + last_descriptor_index_host_depth_non_copy != + descriptor_index_host_depth) { + transfer_root_parameters_set &= + ~kTransferUsedRootParameterHostDepthSRVBit; + } + last_descriptor_host_depth_is_copy = false; + last_descriptor_index_host_depth_non_copy = + descriptor_index_host_depth; + } + } + if (transfer_root_parameters_used & + kTransferUsedRootParameterAddressConstantBit) { + RenderTargetKey source_rt_key = source_d3d12_rt.key(); + TransferAddressConstant address_constant; + address_constant.dest_pitch = dest_pitch_tiles; + address_constant.source_pitch = source_rt_key.GetPitchTiles(); + address_constant.source_to_dest = int32_t(dest_rt_key.base_tiles) - + int32_t(source_rt_key.base_tiles); + if (last_address_constant != address_constant) { + last_address_constant = address_constant; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterAddressConstantBit; + } + } + if (transfer_root_parameters_used & + kTransferUsedRootParameterHostDepthAddressConstantBit) { + assert_not_null(host_depth_source_d3d12_rt); + TransferAddressConstant host_depth_address_constant; + host_depth_address_constant.dest_pitch = dest_pitch_tiles; + host_depth_address_constant.source_pitch = + host_depth_source_d3d12_rt->key().GetPitchTiles(); + host_depth_address_constant.source_to_dest = + int32_t(dest_rt_key.base_tiles) - + int32_t(host_depth_source_d3d12_rt->key().base_tiles); + if (last_host_depth_address_constant != host_depth_address_constant) { + last_host_depth_address_constant = host_depth_address_constant; + transfer_root_parameters_set &= + ~kTransferUsedRootParameterHostDepthAddressConstantBit; + } + } + + // Apply the new bindings. + uint32_t transfer_root_parameters_unset = + transfer_root_parameters_used & ~transfer_root_parameters_set; + if (transfer_root_parameters_unset & + kTransferUsedRootParameterHostDepthAddressConstantBit) { + command_list.D3DSetGraphicsRoot32BitConstants( + xe::bit_count( + transfer_root_parameters_used & + (kTransferUsedRootParameterHostDepthAddressConstantBit - 1)), + sizeof(last_host_depth_address_constant) / sizeof(uint32_t), + &last_host_depth_address_constant, 0); + transfer_root_parameters_set |= + kTransferUsedRootParameterHostDepthAddressConstantBit; + } + if (transfer_root_parameters_unset & + kTransferUsedRootParameterHostDepthSRVBit) { + D3D12_GPU_DESCRIPTOR_HANDLE descriptor_gpu_handle; + if (last_descriptor_host_depth_is_copy) { + if (bindless_resources_used_) { + descriptor_gpu_handle = + command_processor_ + .GetSystemBindlessViewHandlePair( + D3D12CommandProcessor::SystemBindlessView :: + kEdramR32UintSRV) + .second; + } else { + assert_true(host_depth_copy_srv_index != UINT32_MAX); + descriptor_gpu_handle = + current_temporary_descriptors_gpu_[host_depth_copy_srv_index] + .second; + } + } else { + assert_true(last_descriptor_index_host_depth_non_copy != + UINT32_MAX); + descriptor_gpu_handle = + current_temporary_descriptors_gpu_ + [last_descriptor_index_host_depth_non_copy] + .second; + } + command_list.D3DSetGraphicsRootDescriptorTable( + xe::bit_count(transfer_root_parameters_used & + (kTransferUsedRootParameterHostDepthSRVBit - 1)), + descriptor_gpu_handle); + transfer_root_parameters_set |= + kTransferUsedRootParameterHostDepthSRVBit; + } + if (transfer_root_parameters_unset & + kTransferUsedRootParameterAddressConstantBit) { + command_list.D3DSetGraphicsRoot32BitConstants( + xe::bit_count(transfer_root_parameters_used & + (kTransferUsedRootParameterAddressConstantBit - 1)), + sizeof(last_address_constant) / sizeof(uint32_t), + &last_address_constant, 0); + transfer_root_parameters_set |= + kTransferUsedRootParameterAddressConstantBit; + } + if (transfer_root_parameters_unset & + kTransferUsedRootParameterStencilSRVBit) { + assert_true(last_descriptor_index_stencil != UINT32_MAX); + command_list.D3DSetGraphicsRootDescriptorTable( + xe::bit_count(transfer_root_parameters_used & + (kTransferUsedRootParameterStencilSRVBit - 1)), + current_temporary_descriptors_gpu_[last_descriptor_index_stencil] + .second); + transfer_root_parameters_set |= + kTransferUsedRootParameterStencilSRVBit; + } + if (transfer_root_parameters_unset & + kTransferUsedRootParameterDepthSRVBit) { + assert_true(last_descriptor_index_depth != UINT32_MAX); + command_list.D3DSetGraphicsRootDescriptorTable( + xe::bit_count(transfer_root_parameters_used & + (kTransferUsedRootParameterDepthSRVBit - 1)), + current_temporary_descriptors_gpu_[last_descriptor_index_depth] + .second); + transfer_root_parameters_set |= kTransferUsedRootParameterDepthSRVBit; + } + if (transfer_root_parameters_unset & + kTransferUsedRootParameterColorSRVBit) { + assert_true(last_descriptor_index_color != UINT32_MAX); + command_list.D3DSetGraphicsRootDescriptorTable( + xe::bit_count(transfer_root_parameters_used & + (kTransferUsedRootParameterColorSRVBit - 1)), + current_temporary_descriptors_gpu_[last_descriptor_index_color] + .second); + transfer_root_parameters_set |= kTransferUsedRootParameterColorSRVBit; + } + + // Draw the transfer rectangles. + command_processor_.SubmitBarriers(); + for (uint32_t j = 0; j <= uint32_t(is_stencil_bit) * 7; ++j) { + if (is_stencil_bit) { + uint32_t transfer_stencil_bit = uint32_t(1) << j; + command_list.D3DSetGraphicsRoot32BitConstants( + xe::bit_count( + transfer_root_parameters_used & + (kTransferUsedRootParameterStencilMaskConstantBit - 1)), + sizeof(transfer_stencil_bit) / sizeof(uint32_t), + &transfer_stencil_bit, 0); + } + command_processor_.SetExternalPipeline(transfer_pipelines[j]); + command_list.D3DDrawInstanced(transfer_vertex_count, 1, 0, 0); + } + } + } + + if (render_target_resolve_clear_values && resolve_clear_rectangle) { + uint64_t clear_value = render_target_resolve_clear_values[i]; + if (dest_rt_key.is_depth) { + uint32_t depth_guest_clear_value = + (uint32_t(clear_value) >> 8) & 0xFFFFFF; + float depth_host_clear_value = 0.0f; + switch (dest_rt_key.GetDepthFormat()) { + case xenos::DepthRenderTargetFormat::kD24S8: + depth_host_clear_value = + xenos::UNorm24To32(depth_guest_clear_value); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + // Taking [0, 2) -> [0, 1) remapping into account. + depth_host_clear_value = + xenos::Float20e4To32(depth_guest_clear_value) * 0.5f; + break; + } + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), + dest_d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_DEPTH_WRITE), + D3D12_RESOURCE_STATE_DEPTH_WRITE); + command_processor_.SubmitBarriers(); + command_list.D3DClearDepthStencilView( + dest_d3d12_rt.descriptor_draw().GetHandle(), + D3D12_CLEAR_FLAG_DEPTH | D3D12_CLEAR_FLAG_STENCIL, + depth_host_clear_value, UINT(clear_value) & 0xFF, 1, &clear_rect); + } else { + float color_clear_value[4] = {}; + bool clear_via_drawing = false; + switch (dest_rt_key.GetColorFormat()) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + for (uint32_t j = 0; j < 4; ++j) { + color_clear_value[j] = + ((clear_value >> (j * 8)) & 0xFF) * (1.0f / 0xFF); + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + for (uint32_t j = 0; j < 3; ++j) { + color_clear_value[j] = + ((clear_value >> (j * 10)) & 0x3FF) * (1.0f / 0x3FF); + } + color_clear_value[3] = ((clear_value >> 30) & 0x3) * (1.0f / 0x3); + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat:: + k_2_10_10_10_FLOAT_AS_16_16_16_16: + for (uint32_t j = 0; j < 3; ++j) { + color_clear_value[j] = + xenos::Float7e3To32((clear_value >> (j * 10)) & 0x3FF); + } + color_clear_value[3] = ((clear_value >> 30) & 0x3) * (1.0f / 0x3); + break; + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + // Using uint for loading both. Disregarding the current -32...32 + // vs. -1...1 settings for consistency with color clear via depth + // aliasing. + for (uint32_t j = 0; j < 2; ++j) { + color_clear_value[j] = float((clear_value >> (j * 16)) & 0xFFFF); + } + break; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + // Using uint for loading both. Disregarding the current -32...32 + // vs. -1...1 settings for consistency with color clear via depth + // aliasing. + for (uint32_t j = 0; j < 4; ++j) { + color_clear_value[j] = float((clear_value >> (j * 16)) & 0xFFFF); + } + break; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + // Using uint for proper denormal and NaN handling. + color_clear_value[0] = float(uint32_t(clear_value)); + // Numbers > 2^24 can't be represented with a step of 1 as floats, + // need to clear by drawing a uint rectangle. + if (uint64_t(color_clear_value[0]) != uint32_t(clear_value)) { + clear_via_drawing = true; + } + break; + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + // Using uint for proper denormal and NaN handling. + color_clear_value[0] = float(uint32_t(clear_value)); + color_clear_value[1] = float(uint32_t(clear_value >> 32)); + // Numbers > 2^24 can't be represented with a step of 1 as floats, + // need to clear by drawing a uint rectangle. + if (uint64_t(color_clear_value[0]) != uint32_t(clear_value) || + uint64_t(color_clear_value[1]) != uint32_t(clear_value >> 32)) { + clear_via_drawing = true; + } + break; + } + command_processor_.PushTransitionBarrier( + dest_d3d12_rt.resource(), + dest_d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_RENDER_TARGET), + D3D12_RESOURCE_STATE_RENDER_TARGET); + if (clear_via_drawing) { + command_list.D3DOMSetRenderTargets( + 1, + &(dest_d3d12_rt.descriptor_load_separate().IsValid() + ? dest_d3d12_rt.descriptor_load_separate().GetHandle() + : dest_d3d12_rt.descriptor_draw().GetHandle()), + FALSE, nullptr); + are_current_command_list_render_targets_valid_ = true; + D3D12_VIEWPORT clear_viewport; + clear_viewport.TopLeftX = float(clear_rect.left); + clear_viewport.TopLeftY = float(clear_rect.top); + clear_viewport.Width = float(clear_rect.right - clear_rect.left); + clear_viewport.Height = float(clear_rect.bottom - clear_rect.top); + clear_viewport.MinDepth = 0.0f; + clear_viewport.MaxDepth = 1.0f; + command_processor_.SetViewport(clear_viewport); + command_processor_.SetScissorRect(clear_rect); + command_processor_.SetExternalGraphicsRootSignature( + uint32_rtv_clear_root_signature_); + uint32_t clear_via_drawing_value[2] = {uint32_t(clear_value), + uint32_t(clear_value >> 32)}; + command_list.D3DSetGraphicsRoot32BitConstants( + 0, 2, clear_via_drawing_value, 0); + command_processor_.SetExternalPipeline( + uint32_rtv_clear_pipelines_[size_t( + dest_rt_key.GetColorFormat() == + xenos::ColorRenderTargetFormat::k_32_32_FLOAT)] + [size_t(dest_rt_key.msaa_samples)]); + command_processor_.SetPrimitiveTopology( + D3D_PRIMITIVE_TOPOLOGY_TRIANGLELIST); + command_list.D3DDrawInstanced(3, 1, 0, 0); + } else { + command_processor_.SubmitBarriers(); + command_list.D3DClearRenderTargetView( + dest_d3d12_rt.descriptor_load_separate().IsValid() + ? dest_d3d12_rt.descriptor_load_separate().GetHandle() + : dest_d3d12_rt.descriptor_draw().GetHandle(), + color_clear_value, 1, &clear_rect); + } + } + } + } +} + +void D3D12RenderTargetCache::SetCommandListRenderTargets( + RenderTarget* const* depth_and_color_render_targets) { + assert_true(GetPath() == Path::kHostRenderTargets); + + // Ensure the render targets are in the needed resource state. + if (depth_and_color_render_targets[0]) { + auto& d3d12_rt = + *static_cast(depth_and_color_render_targets[0]); + command_processor_.PushTransitionBarrier( + d3d12_rt.resource(), + d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_DEPTH_WRITE), + D3D12_RESOURCE_STATE_DEPTH_WRITE); + } + for (uint32_t i = 0; i < xenos::kMaxColorRenderTargets; ++i) { + RenderTarget* render_target = depth_and_color_render_targets[1 + i]; + if (!render_target) { + continue; + } + auto& d3d12_rt = *static_cast(render_target); + command_processor_.PushTransitionBarrier( + d3d12_rt.resource(), + d3d12_rt.SetResourceState(D3D12_RESOURCE_STATE_RENDER_TARGET), + D3D12_RESOURCE_STATE_RENDER_TARGET); + } + + // Bind the render targets. + if (are_current_command_list_render_targets_valid_ && + std::memcmp(current_command_list_render_targets_, + depth_and_color_render_targets, + sizeof(current_command_list_render_targets_))) { + are_current_command_list_render_targets_valid_ = false; + } + uint32_t render_targets_are_srgb; + if (gamma_render_target_as_srgb_) { + render_targets_are_srgb = last_update_accumulated_color_targets_are_gamma(); + if (are_current_command_list_render_targets_srgb_ != + render_targets_are_srgb) { + are_current_command_list_render_targets_srgb_ = render_targets_are_srgb; + are_current_command_list_render_targets_valid_ = false; + } + } else { + render_targets_are_srgb = 0; + } + if (!are_current_command_list_render_targets_valid_) { + std::memcpy(current_command_list_render_targets_, + depth_and_color_render_targets, + sizeof(current_command_list_render_targets_)); + D3D12_CPU_DESCRIPTOR_HANDLE dsv_handle; + if (depth_and_color_render_targets[0]) { + dsv_handle = static_cast( + depth_and_color_render_targets[0]) + ->descriptor_draw() + .GetHandle(); + } + D3D12_CPU_DESCRIPTOR_HANDLE rtv_handles[xenos::kMaxColorRenderTargets]; + uint32_t rtv_count = 0; + for (uint32_t i = 0; i < xenos::kMaxColorRenderTargets; ++i) { + const RenderTarget* render_target = depth_and_color_render_targets[1 + i]; + if (!render_target) { + continue; + } + // Fill the gaps with a null descriptor. + while (rtv_count < i) { + rtv_handles[rtv_count++] = + render_target->key().msaa_samples != xenos::MsaaSamples::k1X + ? null_rtv_descriptor_ms_.GetHandle() + : null_rtv_descriptor_ss_.GetHandle(); + } + auto& d3d12_rt = *static_cast(render_target); + rtv_handles[rtv_count++] = + (render_targets_are_srgb & (uint32_t(1) << i)) + ? d3d12_rt.descriptor_draw_srgb().GetHandle() + : d3d12_rt.descriptor_draw().GetHandle(); + } + command_processor_.GetDeferredCommandList().D3DOMSetRenderTargets( + rtv_count, rtv_handles, FALSE, + depth_and_color_render_targets[0] ? &dsv_handle : nullptr); + are_current_command_list_render_targets_valid_ = true; + } +} + +ID3D12PipelineState* D3D12RenderTargetCache::GetOrCreateDumpPipeline( + DumpPipelineKey key) { + auto pipeline_it = dump_pipelines_.find(key); + if (pipeline_it != dump_pipelines_.end()) { + return pipeline_it->second; + } + + // Because of built_shader_.resize(), pointers can't be kept persistently + // here! Resizing also zeroes the memory. + + built_shader_.clear(); + + // RDEF, ISGN, OSGN, SHEX, STAT. + constexpr uint32_t kBlobCount = 5; + + // Allocate space for the container header and the blob offsets. + built_shader_.resize(sizeof(dxbc::ContainerHeader) / sizeof(uint32_t) + + kBlobCount); + uint32_t blob_offset_position_dwords = + sizeof(dxbc::ContainerHeader) / sizeof(uint32_t); + uint32_t blob_position_dwords = uint32_t(built_shader_.size()); + constexpr uint32_t kBlobHeaderSizeDwords = + sizeof(dxbc::BlobHeader) / sizeof(uint32_t); + + uint32_t name_ptr; + + // *************************************************************************** + // Resource definition + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t rdef_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + // Not needed, as the next operation done is resize, to allocate the space for + // both the blob header and the resource definition header. + // built_shader_.resize(rdef_position_dwords); + + // Allocate space for the RDEF header. + built_shader_.resize(rdef_position_dwords + + sizeof(dxbc::RdefHeader) / sizeof(uint32_t)); + // Generator name. + dxbc::AppendAlignedString(built_shader_, "Xenia"); + + // Constant types - uint (aka "dword" when it's scalar) only. + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_dword_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "dword"); + // Types. + uint32_t rdef_type_uint_position_dwords = uint32_t(built_shader_.size()); + uint32_t rdef_type_uint_ptr = + uint32_t((rdef_type_uint_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + built_shader_.resize(rdef_type_uint_position_dwords + + sizeof(dxbc::RdefType) / sizeof(uint32_t)); + { + auto& rdef_type_uint = *reinterpret_cast( + built_shader_.data() + rdef_type_uint_position_dwords); + rdef_type_uint.variable_class = dxbc::RdefVariableClass::kScalar; + rdef_type_uint.variable_type = dxbc::RdefVariableType::kUInt; + rdef_type_uint.row_count = 1; + rdef_type_uint.column_count = 1; + rdef_type_uint.name_ptr = rdef_dword_name_ptr; + } + + // Constants: + // - uint xe_edram_dump_offsets + // - uint xe_edram_dump_pitches + enum Constant : uint32_t { + kConstantOffsets, + kConstantPitches, + kConstantCount, + }; + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_xe_edram_dump_offsets_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_edram_dump_offsets"); + uint32_t rdef_xe_edram_dump_pitches_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_edram_dump_pitches"); + // Constants. + uint32_t rdef_constants_position_dwords = uint32_t(built_shader_.size()); + uint32_t rdef_constants_ptr = + uint32_t((rdef_constants_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + built_shader_.resize(rdef_constants_position_dwords + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t) * + kConstantCount); + { + auto rdef_constants = reinterpret_cast( + built_shader_.data() + rdef_constants_position_dwords); + // uint xe_edram_dump_offsets + dxbc::RdefVariable& rdef_constant_offsets = + rdef_constants[kConstantOffsets]; + rdef_constant_offsets.name_ptr = rdef_xe_edram_dump_offsets_name_ptr; + rdef_constant_offsets.size_bytes = sizeof(uint32_t); + rdef_constant_offsets.flags = dxbc::kRdefVariableFlagUsed; + rdef_constant_offsets.type_ptr = rdef_type_uint_ptr; + rdef_constant_offsets.start_texture = UINT32_MAX; + rdef_constant_offsets.start_sampler = UINT32_MAX; + // uint xe_edram_dump_pitches + dxbc::RdefVariable& rdef_constant_pitches = + rdef_constants[kConstantPitches]; + rdef_constant_pitches.name_ptr = rdef_xe_edram_dump_pitches_name_ptr; + rdef_constant_pitches.size_bytes = sizeof(uint32_t); + rdef_constant_pitches.flags = dxbc::kRdefVariableFlagUsed; + rdef_constant_pitches.type_ptr = rdef_type_uint_ptr; + rdef_constant_pitches.start_texture = UINT32_MAX; + rdef_constant_pitches.start_sampler = UINT32_MAX; + } + + // Constant buffers: + // - xe_edram_dump_offsets : b0 { uint xe_edram_dump_offsets; } + // - xe_edram_dump_pitches : b1 { uint xe_edram_dump_pitches; } + // Reusing the constant names for constant buffers. + uint32_t rdef_cbuffer_position_dwords = uint32_t(built_shader_.size()); + built_shader_.resize(rdef_cbuffer_position_dwords + + sizeof(dxbc::RdefCbuffer) / sizeof(uint32_t) * + kDumpCbufferCount); + { + auto rdef_cbuffers = reinterpret_cast( + built_shader_.data() + rdef_cbuffer_position_dwords); + // xe_edram_dump_offsets + dxbc::RdefCbuffer& rdef_cbuffer_offsets = + rdef_cbuffers[kDumpCbufferOffsets]; + rdef_cbuffer_offsets.name_ptr = rdef_xe_edram_dump_offsets_name_ptr; + rdef_cbuffer_offsets.variable_count = 1; + rdef_cbuffer_offsets.variables_ptr = uint32_t( + rdef_constants_ptr + sizeof(dxbc::RdefVariable) * kConstantOffsets); + rdef_cbuffer_offsets.size_vector_aligned_bytes = sizeof(uint32_t) * 4; + // xe_edram_dump_pitches + dxbc::RdefCbuffer& rdef_cbuffer_pitches = + rdef_cbuffers[kDumpCbufferPitches]; + rdef_cbuffer_pitches.name_ptr = rdef_xe_edram_dump_pitches_name_ptr; + rdef_cbuffer_pitches.variable_count = 1; + rdef_cbuffer_pitches.variables_ptr = uint32_t( + rdef_constants_ptr + sizeof(dxbc::RdefVariable) * kConstantPitches); + rdef_cbuffer_pitches.size_vector_aligned_bytes = sizeof(uint32_t) * 4; + } + + // Bindings. + // - Texture2D/Texture2DMS xe_edram_dump_source : t0 + // - Optionally, Texture2D/Texture2DMS xe_edram_dump_stencil : t1 + // - RWBuffer xe_edram : u0 + // - Constant buffers + uint32_t rdef_binding_count = 1 + key.is_depth + 1 + kDumpCbufferCount; + // Names. + name_ptr = uint32_t((built_shader_.size() - rdef_position_dwords) * + sizeof(uint32_t)); + uint32_t rdef_xe_edram_dump_source_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_edram_dump_source"); + uint32_t rdef_xe_edram_dump_stencil_name_ptr = name_ptr; + if (key.is_depth) { + name_ptr += + dxbc::AppendAlignedString(built_shader_, "xe_edram_dump_stencil"); + } + uint32_t rdef_xe_edram_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(built_shader_, "xe_edram"); + // Bindings. + uint32_t rdef_binding_position_dwords = uint32_t(built_shader_.size()); + built_shader_.resize(rdef_binding_position_dwords + + sizeof(dxbc::RdefInputBind) / sizeof(uint32_t) * + rdef_binding_count); + bool source_is_uint; + if (key.is_depth) { + source_is_uint = false; + } else { + GetColorOwnershipTransferDXGIFormat(key.GetColorFormat(), &source_is_uint); + } + dxbc::ResourceReturnType source_return_type = + source_is_uint ? dxbc::ResourceReturnType::kUInt + : dxbc::ResourceReturnType::kFloat; + uint32_t source_component_count = + key.is_depth ? 1 + : xenos::GetColorRenderTargetFormatComponentCount( + key.GetColorFormat()); + bool format_is_64bpp = !key.is_depth && xenos::IsColorRenderTargetFormat64bpp( + key.GetColorFormat()); + { + auto rdef_bindings = reinterpret_cast( + built_shader_.data() + rdef_binding_position_dwords); + uint32_t rdef_binding_index = 0; + // xe_edram_dump_source + dxbc::RdefInputBind& rdef_binding_source = + rdef_bindings[rdef_binding_index++]; + rdef_binding_source.name_ptr = rdef_xe_edram_dump_source_name_ptr; + rdef_binding_source.type = dxbc::RdefInputType::kTexture; + rdef_binding_source.return_type = source_return_type; + if (key.msaa_samples != xenos::MsaaSamples::k1X) { + rdef_binding_source.dimension = dxbc::RdefDimension::kSRVTexture2DMS; + // Sample count is dynamic on Shader Model 5. + } else { + rdef_binding_source.dimension = dxbc::RdefDimension::kSRVTexture2D; + rdef_binding_source.sample_count = UINT32_MAX; + } + rdef_binding_source.bind_count = 1; + rdef_binding_source.flags = (source_component_count - 1) + << dxbc::kRdefInputFlagsComponentsShift; + // xe_edram_dump_stencil + if (key.is_depth) { + dxbc::RdefInputBind& rdef_binding_stencil = + rdef_bindings[rdef_binding_index++]; + rdef_binding_stencil.name_ptr = rdef_xe_edram_dump_stencil_name_ptr; + rdef_binding_stencil.type = dxbc::RdefInputType::kTexture; + rdef_binding_stencil.return_type = dxbc::ResourceReturnType::kUInt; + rdef_binding_stencil.dimension = rdef_binding_source.dimension; + rdef_binding_stencil.sample_count = rdef_binding_source.sample_count; + rdef_binding_stencil.bind_point = 1; + rdef_binding_stencil.bind_count = 1; + rdef_binding_stencil.flags = dxbc::kRdefInputFlags2Component; + rdef_binding_stencil.id = 1; + } + // xe_edram + dxbc::RdefInputBind& rdef_binding_edram = + rdef_bindings[rdef_binding_index++]; + rdef_binding_edram.name_ptr = rdef_xe_edram_name_ptr; + rdef_binding_edram.type = dxbc::RdefInputType::kUAVRWTyped; + rdef_binding_edram.return_type = dxbc::ResourceReturnType::kUInt; + rdef_binding_edram.dimension = dxbc::RdefDimension::kUAVBuffer; + rdef_binding_edram.sample_count = UINT32_MAX; + rdef_binding_edram.bind_count = 1; + rdef_binding_edram.flags = + format_is_64bpp ? dxbc::kRdefInputFlags2Component : 0; + // xe_edram_dump_offsets + dxbc::RdefInputBind& rdef_binding_offsets = + rdef_bindings[rdef_binding_index++]; + rdef_binding_offsets.name_ptr = rdef_xe_edram_dump_offsets_name_ptr; + rdef_binding_offsets.type = dxbc::RdefInputType::kCbuffer; + rdef_binding_offsets.bind_point = kDumpCbufferOffsets; + rdef_binding_offsets.bind_count = 1; + rdef_binding_offsets.flags = dxbc::kRdefInputFlagUserPacked; + rdef_binding_offsets.id = kDumpCbufferOffsets; + // xe_edram_dump_pitches + dxbc::RdefInputBind& rdef_binding_pitches = + rdef_bindings[rdef_binding_index++]; + rdef_binding_pitches.name_ptr = rdef_xe_edram_dump_pitches_name_ptr; + rdef_binding_pitches.type = dxbc::RdefInputType::kCbuffer; + rdef_binding_pitches.bind_point = kDumpCbufferPitches; + rdef_binding_pitches.bind_count = 1; + rdef_binding_pitches.flags = dxbc::kRdefInputFlagUserPacked; + rdef_binding_pitches.id = kDumpCbufferPitches; + } + + // Header. + { + auto& rdef_header = *reinterpret_cast( + built_shader_.data() + rdef_position_dwords); + rdef_header.cbuffer_count = kDumpCbufferCount; + rdef_header.cbuffers_ptr = + uint32_t((rdef_cbuffer_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + rdef_header.input_bind_count = rdef_binding_count; + rdef_header.input_binds_ptr = + uint32_t((rdef_binding_position_dwords - rdef_position_dwords) * + sizeof(uint32_t)); + rdef_header.shader_model = dxbc::RdefShaderModel::kComputeShader5_1; + rdef_header.compile_flags = + dxbc::kCompileFlagNoPreshader | dxbc::kCompileFlagPreferFlowControl | + dxbc::kCompileFlagIeeeStrictness | dxbc::kCompileFlagAllResourcesBound; + // Generator name is right after the header. + rdef_header.generator_name_ptr = sizeof(dxbc::RdefHeader); + rdef_header.fourcc = dxbc::RdefHeader::FourCC::k5_1; + rdef_header.InitializeSizes(); + } + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kResourceDefinition; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Input and output signatures (empty) + // *************************************************************************** + + for (uint32_t i = 0; i < 2; ++i) { + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t signature_position_dwords = + blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(signature_position_dwords + + sizeof(dxbc::Signature) / sizeof(uint32_t)); + { + auto& signature = *reinterpret_cast( + built_shader_.data() + signature_position_dwords); + // Empty - just set parameter pointer to the end. + signature.parameter_info_ptr = sizeof(dxbc::Signature); + } + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = i ? dxbc::BlobHeader::FourCC::kOutputSignature + : dxbc::BlobHeader::FourCC::kInputSignature; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + } + + // *************************************************************************** + // Shader program + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t shex_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(shex_position_dwords); + + built_shader_.push_back( + dxbc::VersionToken(dxbc::ProgramType::kComputeShader, 5, 1)); + // Reserve space for the length token. + built_shader_.push_back(0); + + dxbc::Statistics stat; + std::memset(&stat, 0, sizeof(dxbc::Statistics)); + dxbc::Assembler a(built_shader_, stat); + + a.OpDclGlobalFlags(dxbc::kGlobalFlagAllResourcesBound); + a.OpDclConstantBuffer(dxbc::Src::CB(dxbc::Src::Dcl, kDumpCbufferOffsets, + kDumpCbufferOffsets, kDumpCbufferOffsets), + 1); + a.OpDclConstantBuffer(dxbc::Src::CB(dxbc::Src::Dcl, kDumpCbufferPitches, + kDumpCbufferPitches, kDumpCbufferPitches), + 1); + // Source texture. + dxbc::ResourceDimension source_dimension = + key.msaa_samples != xenos::MsaaSamples::k1X + ? dxbc::ResourceDimension::kTexture2DMS + : dxbc::ResourceDimension::kTexture2D; + a.OpDclResource(source_dimension, + dxbc::ResourceReturnTypeX4Token( + source_is_uint ? dxbc::ResourceReturnType::kUInt + : dxbc::ResourceReturnType::kFloat), + dxbc::Src::T(dxbc::Src::Dcl, 0, 0, 0)); + // Source stencil texture. + if (key.is_depth) { + a.OpDclResource( + source_dimension, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kUInt), + dxbc::Src::T(dxbc::Src::Dcl, 1, 1, 1)); + } + // EDRAM buffer. + a.OpDclUnorderedAccessViewTyped( + dxbc::ResourceDimension::kBuffer, 0, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kUInt), + dxbc::Src::U(dxbc::Src::Dcl, 0, 0, 0)); + a.OpDclInput(dxbc::Dest::VThreadGroupID(0b0011)); + a.OpDclInput(dxbc::Dest::VThreadIDInGroup(0b0011)); + // r0 - address + // r1 - addressing scratch, then data + // r2 may also be used as temporary for format conversion, allocated when + // needed. + size_t temp_count_position_dwords = a.OpDclTemps(2); + // The Direct3D 11 thread group size limit is 1024 - thus can't use 80x16 + // which is 1280. + // 1 32bpp color group = 40x16 32bpp samples (one tile in two groups). + // 1 64bpp color group = 40x16 64bpp samples (one tile in one group). + // 1 depth group = 40x16 32bpp depth samples (one tile in two groups), but + // two 40-sample tile halves are swapped as opposed to color (using + // vThreadGroupID.x & 1 to know which half-tile the group is for). + a.OpDclThreadGroup(40, 16, 1); + + // Calculate the linear 32bpp tile index relative to the base of the source + // texture into r0.x. For 64bpp, it's even for the left 40 samples in a 80x16 + // region, and odd for the right 40 samples (no matter what render target base + // & 1 is). + + // r0.x = dump rectangle pitch in tiles + a.OpUBFE(dxbc::Dest::R(0, 0b0001), dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::CB(kDumpCbufferPitches, kDumpCbufferPitches, 0, + dxbc::Src::kXXXX)); + if (!format_is_64bpp) { + // r0.y for 32bpp = tile index from half-tile index + a.OpUShR(dxbc::Dest::R(0, 0b0010), + dxbc::Src::VThreadGroupID(dxbc::Src::kXXXX), dxbc::Src::LU(1)); + } + // r0.x = tile index relative to the dispatch start + // r0.y = free + a.OpUMAd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::VThreadGroupID(dxbc::Src::kYYYY), + format_is_64bpp ? dxbc::Src::VThreadGroupID(dxbc::Src::kXXXX) + : dxbc::Src::R(0, dxbc::Src::kYYYY)); + // r0.y = dispatch start tile relative to the source texture start tile + a.OpUBFE(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(xenos::kEdramBaseTilesBits), + dxbc::Src::LU(0), + dxbc::Src::CB(kDumpCbufferOffsets, kDumpCbufferOffsets, 0, + dxbc::Src::kXXXX)); + // r0.x = linear tile index relative to the source start + // r0.y = free + a.OpIAdd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + + // Calculate the source texture coordinates to r0.yz, and the sample index + // into r0.w (r0.w will also be used later to hold 0 for the LOD index). + + // r0.y = source texture pitch in 32bpp tiles (always even for 64bpp) + a.OpUBFE(dxbc::Dest::R(0, 0b0010), dxbc::Src::LU(xenos::kEdramPitchTilesBits), + dxbc::Src::LU(0), + dxbc::Src::CB(kDumpCbufferPitches, kDumpCbufferPitches, 0, + dxbc::Src::kXXXX)); + // r0.y = 32bpp tile index relative to the start of the source row + // r0.z = source texture tile row index + a.OpUDiv(dxbc::Dest::R(0, 0b0100), dxbc::Dest::R(0, 0b0010), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + // For simplicity (not caring about sample count) and for a more coherent + // texture access pattern, for depth, 40-sample column swapping will be done + // for the destination. + // r0.yz = source tile pixel address + if (key.msaa_samples >= xenos::MsaaSamples::k4X) { + // r1.xy for 4x MSAA = pixel index in the group + a.OpUShR(dxbc::Dest::R(1, 0b0011), dxbc::Src::VThreadIDInGroup(), + dxbc::Src::LU(1)); + // r1.xy = free + a.OpUMAd( + dxbc::Dest::R(0, 0b0110), dxbc::Src::R(0), + dxbc::Src::LU( + 0, xenos::kEdramTileWidthSamples >> (1 + uint32_t(format_is_64bpp)), + xenos::kEdramTileHeightSamples >> 1, 0), + dxbc::Src::R(1, 0b0100 << 2)); + } else if (key.msaa_samples == xenos::MsaaSamples::k2X) { + a.OpUMAd(dxbc::Dest::R(0, 0b0010), dxbc::Src::R(0, dxbc::Src::kYYYY), + dxbc::Src::LU(xenos::kEdramTileWidthSamples >> + uint32_t(format_is_64bpp)), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kXXXX)); + // r0.w for 4x MSAA = pixel Y in the group + a.OpUShR(dxbc::Dest::R(0, 0b1000), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kYYYY), dxbc::Src::LU(1)); + // r0.w = free + a.OpUMAd(dxbc::Dest::R(0, 0b0100), dxbc::Src::R(0, dxbc::Src::kZZZZ), + dxbc::Src::LU(xenos::kEdramTileHeightSamples >> 1), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } else { + a.OpUMAd(dxbc::Dest::R(0, 0b0110), dxbc::Src::R(0), + dxbc::Src::LU( + 0, xenos::kEdramTileWidthSamples >> uint32_t(format_is_64bpp), + xenos::kEdramTileHeightSamples, 0), + dxbc::Src::VThreadIDInGroup(0b0100 << 2)); + } + // For 32bpp, store the half-tile index in r1.x, and apply the half-tile index + // to the source texture pixel position. + if (!format_is_64bpp) { + // r1.x for 32bpp = half-tile + a.OpAnd(dxbc::Dest::R(1, 0b0001), + dxbc::Src::VThreadGroupID(dxbc::Src::kXXXX), dxbc::Src::LU(1)); + a.OpUMAd(dxbc::Dest::R(0, 0b0010), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LU( + xenos::kEdramTileWidthSamples >> + (1 + uint32_t(key.msaa_samples >= xenos::MsaaSamples::k4X))), + dxbc::Src::R(0, dxbc::Src::kYYYY)); + } + if (key.msaa_samples != xenos::MsaaSamples::k1X) { + // Sample index. + // For 4x, bit 0 for horizontal, bit 1 for vertical. + // For 2x, only vertical - but 0 or 1 for true 2x MSAA or 0 or 3 for 2x MSAA + // via two samples of 4x. + // r0.w = vertical sample index + a.OpAnd(dxbc::Dest::R(0, 0b1000), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kYYYY), dxbc::Src::LU(1)); + if (key.msaa_samples >= xenos::MsaaSamples::k4X) { + // r0.w = 4x MSAA sample index + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(31), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kXXXX)); + } else if (!msaa_2x_supported_) { + // r0.w = source sample 0 or 3 for 2x MSAA emulated via 4x + a.OpBFI(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(0, dxbc::Src::kWWWW), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } + } + + // Calculate the EDRAM address into r0.x (in buffer texels - uints for 32bpp + // or uint2s for 64bpp). + // r1.x for 32bpp is occupied - contains the half-tile index. + + if (format_is_64bpp) { + // In 64bpp formats, Xenia lays out 80 samples linearly in a single 64bpp + // 80x16 pair of tiles. Extract the parity, relative to the beginning of the + // render target, of the current thread group within a pair of tiles to + // r1.x. + // r1.x for 64bpp = current 32bpp half of a 80x16-sample tile pair + a.OpAnd(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + // Align the 32bpp tile index in r0.x to tile pairs relative to the + // beginning of the render target. + // r0.x = origin 32bpp tile of the 64bpp pair of tiles relative to the + // beginning of the render target + a.OpAnd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::LU(~uint32_t(1))); + } + // Go from the render target-relative 32bpp tiles to EDRAM 32bpp tiles by + // adding the difference between the two. + // r1.y = texture tiles to EDRAM tiles + a.OpUBFE(dxbc::Dest::R(1, 0b0010), dxbc::Src::LU(xenos::kEdramBaseTilesBits), + dxbc::Src::LU(xenos::kEdramBaseTilesBits), + dxbc::Src::CB(kDumpCbufferOffsets, kDumpCbufferOffsets, 0, + dxbc::Src::kXXXX)); + // r0.x = global EDRAM tile index + // r1.y = free + a.OpIAdd(dxbc::Dest::R(0, 0b0001), dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + // r1.y = address within the thread group in buffer texels + a.OpUMAd(dxbc::Dest::R(1, 0b0010), + dxbc::Src::LU(xenos::kEdramTileWidthSamples), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kYYYY), + dxbc::Src::VThreadIDInGroup(dxbc::Src::kXXXX)); + // Add the offset of the 40x16-sample half within the 80x16-sample region from + // r1.x (calculated differently for 32bpp and 64bpp, but to r1.x in both + // cases). + // For 32bpp color, because thread groups are for half-tiles. + // For depth, to swap 40-sample halves. + // For 64bpp color, to go to the right half if needed. + if (key.is_depth) { + // Flip vThreadGroupID.x & 1 in r1.x. + a.OpXOr(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + } + // r1.y = address within the 80x16-sample region in buffer texels + // r1.x = free + a.OpUMAd(dxbc::Dest::R(1, 0b0010), + dxbc::Src::LU(xenos::kEdramTileWidthSamples >> 1), + dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + // Merge the offset and the tile into r0.x to get the EDRAM buffer address. + // r0.x = EDRAM buffer texel address + // r1.y = free + a.OpUMAd(dxbc::Dest::R(0, 0b0001), + dxbc::Src::LU((xenos::kEdramTileWidthSamples * + xenos::kEdramTileHeightSamples) >> + uint32_t(format_is_64bpp)), + dxbc::Src::R(0, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + + if (resolution_scale_ > 1) { + // Apply the resolution scale to the destination sample and the source pixel + // coordinates. + // With resolution scaling, host pixels are within samples in the EDRAM + // buffer (because sample count is not known when data is in it), but + // samples are within host pixels in the render target textures (for native + // MSAA to work). + a.OpUMul(dxbc::Dest::Null(), dxbc::Dest::R(0, 0b0111), dxbc::Src::R(0), + dxbc::Src::LU(resolution_scale_ * resolution_scale_, + resolution_scale_, resolution_scale_, 0)); + } + + if (key.msaa_samples == xenos::MsaaSamples::k1X) { + // r0.w = LOD index 0 for the single-sampled load instruction. + a.OpMov(dxbc::Dest::R(0, 0b1000), dxbc::Src::LU(0)); + } + + dxbc::Src source_address_src(dxbc::Src::R(0, 0b11001001)); + for (uint32_t y = 0; y < resolution_scale_; ++y) { + if (y) { + // Go to the next row of host pixels. + a.OpIAdd(dxbc::Dest::R(0, 0b0111), dxbc::Src::R(0), + dxbc::Src::LI(1, -int32_t(resolution_scale_ - 1), 1, 0)); + } + + for (uint32_t x = 0; x < resolution_scale_; ++x) { + if (x) { + // Go to the next host pixel. + a.OpIAdd(dxbc::Dest::R(0, 0b0011), dxbc::Src::R(0), dxbc::Src::LU(1)); + } + + // Load the source to r1. + if (key.msaa_samples != xenos::MsaaSamples::k1X) { + a.OpLdMS(dxbc::Dest::R(1, (1 << source_component_count) - 1), + source_address_src, 0b0011, dxbc::Src::T(0, 0), + dxbc::Src::R(0, dxbc::Src::kWWWW)); + } else { + a.OpLd(dxbc::Dest::R(1, (1 << source_component_count) - 1), + source_address_src, 0b1011, dxbc::Src::T(0, 0)); + } + if (key.is_depth) { + if (key.msaa_samples != xenos::MsaaSamples::k1X) { + a.OpLdMS(dxbc::Dest::R(1, 0b0010), source_address_src, 0b0011, + dxbc::Src::T(1, 1), dxbc::Src::R(0, dxbc::Src::kWWWW)); + } else { + a.OpLd(dxbc::Dest::R(1, 0b0010), source_address_src, 0b1011, + dxbc::Src::T(1, 1)); + } + } + + // Pack to the needed format, writing the result to r1.x for 32bpp or + // r1.xy for 64bpp. + if (key.is_depth) { + switch (key.GetDepthFormat()) { + case xenos::DepthRenderTargetFormat::kD24S8: + // Round to the nearest even integer. This seems to be the correct, + // adding +0.5 and rounding towards zero results in red instead of + // black in GTA IV and Halo 3 clear shaders. + a.OpMul(dxbc::Dest::R(1, 0b0001), dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::LF(float(0xFFFFFF))); + a.OpRoundNE(dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + a.OpFToU(dxbc::Dest::R(1, 0b0001), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + break; + case xenos::DepthRenderTargetFormat::kD24FS8: + // Convert to [0, 2) float24 from [0, 1) float32, using r1.z as + // temporary. + DxbcShaderTranslator::PreClampedDepthTo20e4(a, 1, 0, 1, 0, 1, 2, + true); + break; + } + // Combine 24-bit depth and stencil into r1.x. + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(24), dxbc::Src::LU(8), + dxbc::Src::R(1, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kYYYY)); + } else { + switch (key.GetColorFormat()) { + case xenos::ColorRenderTargetFormat::k_8_8_8_8: + case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + if (!source_is_uint) { + a.OpMAd(dxbc::Dest::R(1), dxbc::Src::R(1), dxbc::Src::LF(255.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1), dxbc::Src::R(1)); + } + for (uint32_t i = 1; i < 4; ++i) { + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(8), + dxbc::Src::LU(i * 8), dxbc::Src::R(1).Select(i), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10: + case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + if (!source_is_uint) { + a.OpMAd(dxbc::Dest::R(1), dxbc::Src::R(1), + dxbc::Src::LF(1023.0f, 1023.0f, 1023.0f, 3.0f), + dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1), dxbc::Src::R(1)); + } + for (uint32_t i = 1; i < 4; ++i) { + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(i == 3 ? 2 : 10), + dxbc::Src::LU(i * 10), dxbc::Src::R(1).Select(i), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + break; + case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case xenos::ColorRenderTargetFormat:: + k_2_10_10_10_FLOAT_AS_16_16_16_16: + // Float16 has a wider range for both color and alpha, also NaNs. + // Color - clamp and convert. + stat.temp_register_count = + std::max(stat.temp_register_count, uint32_t(3)); + // Convert red in r1.x to the result register r1.x - the same, but + // UnclampedFloat32To7e3 allows that - using r2.x as a temporary. + DxbcShaderTranslator::UnclampedFloat32To7e3(a, 1, 0, 1, 0, 2, 0); + for (uint32_t i = 1; i < 3; ++i) { + // Convert green and blue to a temporary register r2.x using r2.y + // as an internal temporary, then insert them into the result in + // r1.x. + DxbcShaderTranslator::UnclampedFloat32To7e3(a, 2, 0, 1, i, 2, 1); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(10), + dxbc::Src::LU(i * 10), dxbc::Src::R(2, dxbc::Src::kXXXX), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + } + // Alpha - saturate and convert. + a.OpMov(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + true); + a.OpMAd(dxbc::Dest::R(1, 0b1000), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::LF(3.0f), dxbc::Src::LF(0.5f)); + a.OpFToU(dxbc::Dest::R(1, 0b1000), + dxbc::Src::R(1, dxbc::Src::kWWWW)); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(2), + dxbc::Src::LU(30), dxbc::Src::R(1, dxbc::Src::kWWWW), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + break; + case xenos::ColorRenderTargetFormat::k_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: + assert_true(source_is_uint); + a.OpBFI(dxbc::Dest::R(1, 0b0001), dxbc::Src::LU(16), + dxbc::Src::LU(16), dxbc::Src::R(1, dxbc::Src::kYYYY), + dxbc::Src::R(1, dxbc::Src::kXXXX)); + break; + case xenos::ColorRenderTargetFormat::k_16_16_16_16: + case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + assert_true(source_is_uint); + a.OpBFI(dxbc::Dest::R(1, 0b0011), dxbc::Src::LU(16), + dxbc::Src::LU(16), dxbc::Src::R(1, 0b1101), + dxbc::Src::R(1, 0b1000)); + break; + case xenos::ColorRenderTargetFormat::k_32_FLOAT: + case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: + assert_true(source_is_uint); + // Already has the needed representation. + break; + } + } + + // Write the sample. + a.OpStoreUAVTyped( + dxbc::Dest::U(0, 0), dxbc::Src::R(0, dxbc::Src::kXXXX), 1, + dxbc::Src::R(1, format_is_64bpp ? 0b0100 : dxbc::Src::kXXXX)); + } + } + + a.OpRet(); + + // Update the temporary register count in the declaration if allocated any + // addition temps. + built_shader_[temp_count_position_dwords] = stat.temp_register_count; + + // Write the shader program length in dwords. + built_shader_[shex_position_dwords + 1] = + uint32_t(built_shader_.size()) - shex_position_dwords; + + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kShaderEx; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Statistics + // *************************************************************************** + + built_shader_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + uint32_t stat_position_dwords = blob_position_dwords + kBlobHeaderSizeDwords; + built_shader_.resize(stat_position_dwords + + sizeof(dxbc::Statistics) / sizeof(uint32_t)); + std::memcpy(built_shader_.data() + stat_position_dwords, &stat, + sizeof(dxbc::Statistics)); + { + auto& blob_header = *reinterpret_cast( + built_shader_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kStatistics; + blob_position_dwords = uint32_t(built_shader_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + built_shader_[blob_offset_position_dwords++]; + } + + // *************************************************************************** + // Container header + // *************************************************************************** + + uint32_t built_shader_size_bytes = + uint32_t(built_shader_.size() * sizeof(uint32_t)); + { + auto& container_header = + *reinterpret_cast(built_shader_.data()); + container_header.InitializeIdentification(); + container_header.size_bytes = built_shader_size_bytes; + container_header.blob_count = kBlobCount; + CalculateDXBCChecksum( + reinterpret_cast(built_shader_.data()), + static_cast(built_shader_size_bytes), + reinterpret_cast(&container_header.hash)); + } + + // *************************************************************************** + // Pipeline + // *************************************************************************** + ID3D12PipelineState* pipeline = ui::d3d12::util::CreateComputePipeline( + command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(), + built_shader_.data(), built_shader_size_bytes, + key.is_depth ? dump_root_signature_depth_ : dump_root_signature_color_); + const char* format_name = + key.is_depth + ? xenos::GetDepthRenderTargetFormatName(key.GetDepthFormat()) + : xenos::GetColorRenderTargetFormatName(key.GetColorFormat()); + if (pipeline) { + std::u16string pipeline_name = + xe::to_utf16(fmt::format("RT Dump {} {}xMSAA", format_name, + uint32_t(1) << uint32_t(key.msaa_samples))); + pipeline->SetName(reinterpret_cast(pipeline_name.c_str())); + } else { + XELOGE( + "D3D12RenderTargetCache: Failed to create a render target dumping " + "pipeline for {}-sample render targets with format {}", + uint32_t(1) << uint32_t(key.msaa_samples), format_name); + } + // Even if creation fails, still store the null pointer not to try to create + // again. + dump_pipelines_.emplace(key, pipeline); + return pipeline; +} + +void D3D12RenderTargetCache::DumpRenderTargets(uint32_t dump_base, + uint32_t dump_row_length_used, + uint32_t dump_rows, + uint32_t dump_pitch) { + assert_true(GetPath() == Path::kHostRenderTargets); + + GetResolveCopyRectanglesToDump(dump_base, dump_row_length_used, dump_rows, + dump_pitch, dump_rectangles_); + if (dump_rectangles_.empty()) { + return; + } + + // Clear previously set temporary indices. + for (const ResolveCopyDumpRectangle& rectangle : dump_rectangles_) { + auto& d3d12_rt = *static_cast(rectangle.render_target); + d3d12_rt.SetTemporarySortIndex(UINT32_MAX); + d3d12_rt.SetTemporarySRVDescriptorIndex(UINT32_MAX); + d3d12_rt.SetTemporarySRVDescriptorIndexStencil(UINT32_MAX); + } + // Gather all needed barriers and info needed to create descriptors and to + // sort the invocations. + TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); + dump_invocations_.clear(); + dump_invocations_.reserve(dump_rectangles_.size()); + current_temporary_descriptors_cpu_.clear(); + bool any_sources_32bpp_64bpp[2] = {}; + uint32_t rt_sort_index = 0; + for (const ResolveCopyDumpRectangle& rectangle : dump_rectangles_) { + auto& d3d12_rt = *static_cast(rectangle.render_target); + command_processor_.PushTransitionBarrier( + d3d12_rt.resource(), + d3d12_rt.SetResourceState( + D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE), + D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); + if (d3d12_rt.temporary_sort_index() == UINT32_MAX) { + d3d12_rt.SetTemporarySortIndex(rt_sort_index++); + } + if (d3d12_rt.temporary_srv_descriptor_index() == UINT32_MAX) { + d3d12_rt.SetTemporarySRVDescriptorIndex( + uint32_t(current_temporary_descriptors_cpu_.size())); + current_temporary_descriptors_cpu_.push_back( + d3d12_rt.descriptor_srv().GetHandle()); + } + RenderTargetKey rt_key = d3d12_rt.key(); + if (rt_key.is_depth && + d3d12_rt.temporary_srv_descriptor_index_stencil() == UINT32_MAX) { + d3d12_rt.SetTemporarySRVDescriptorIndexStencil( + uint32_t(current_temporary_descriptors_cpu_.size())); + current_temporary_descriptors_cpu_.push_back( + d3d12_rt.descriptor_srv_stencil().GetHandle()); + } + any_sources_32bpp_64bpp[size_t(rt_key.Is64bpp())] = true; + DumpPipelineKey pipeline_key; + pipeline_key.msaa_samples = rt_key.msaa_samples; + pipeline_key.host_relevant_format = rt_key.host_relevant_format; + pipeline_key.is_depth = rt_key.is_depth; + dump_invocations_.emplace_back(rectangle, pipeline_key); + } + // 32bpp and 64bpp. + size_t edram_uav_indices[2] = {SIZE_MAX, SIZE_MAX}; + const ui::d3d12::D3D12Provider& provider = + command_processor_.GetD3D12Context().GetD3D12Provider(); + if (!bindless_resources_used_) { + if (any_sources_32bpp_64bpp[0]) { + edram_uav_indices[0] = current_temporary_descriptors_cpu_.size(); + current_temporary_descriptors_cpu_.push_back( + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32UintUAV))); + } + if (any_sources_32bpp_64bpp[1]) { + edram_uav_indices[1] = current_temporary_descriptors_cpu_.size(); + current_temporary_descriptors_cpu_.push_back( + provider.OffsetViewDescriptor( + edram_buffer_descriptor_heap_start_, + uint32_t(EdramBufferDescriptorIndex::kR32G32UintUAV))); + } + } + + // Copy source descriptors to a shader-visible heap. + ID3D12Device* device = provider.GetDevice(); + uint32_t descriptor_count = + uint32_t(current_temporary_descriptors_cpu_.size()); + current_temporary_descriptors_gpu_.resize(descriptor_count); + if (!command_processor_.RequestOneUseSingleViewDescriptors( + descriptor_count, current_temporary_descriptors_gpu_.data())) { + return; + } + for (uint32_t i = 0; i < descriptor_count; ++i) { + device->CopyDescriptorsSimple(1, + current_temporary_descriptors_gpu_[i].first, + current_temporary_descriptors_cpu_[i], + D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); + } + + // Sort the invocations to reduce context and binding switches. + std::sort(dump_invocations_.begin(), dump_invocations_.end()); + + // Dump the render targets. + DeferredCommandList& command_list = + command_processor_.GetDeferredCommandList(); + ID3D12RootSignature* last_root_signature = nullptr; + uint32_t root_parameters_set = 0; + uint32_t last_descriptor_index_source = UINT32_MAX; + uint32_t last_descriptor_index_stencil = UINT32_MAX; + bool last_edram_uav_is_64bpp = false; + DumpOffsets last_offsets; + DumpPitches last_pitches; + for (const DumpInvocation& invocation : dump_invocations_) { + const ResolveCopyDumpRectangle& rectangle = invocation.rectangle; + auto& d3d12_rt = *static_cast(rectangle.render_target); + RenderTargetKey rt_key = d3d12_rt.key(); + DumpPipelineKey pipeline_key = invocation.pipeline_key; + ID3D12PipelineState* pipeline = GetOrCreateDumpPipeline(pipeline_key); + if (!pipeline) { + continue; + } + command_processor_.SetExternalPipeline(pipeline); + + ID3D12RootSignature* root_signature = pipeline_key.is_depth + ? dump_root_signature_depth_ + : dump_root_signature_color_; + if (last_root_signature != root_signature) { + last_root_signature = root_signature; + command_list.D3DSetComputeRootSignature(root_signature); + root_parameters_set = 0; + } + + DumpRootParameter root_parameter_edram = pipeline_key.is_depth + ? kDumpRootParameterDepthEdram + : kDumpRootParameterColorEdram; + uint32_t root_parameter_edram_bit = uint32_t(1) << root_parameter_edram; + bool format_is_64bpp = rt_key.Is64bpp(); + if (last_edram_uav_is_64bpp != format_is_64bpp) { + last_edram_uav_is_64bpp = format_is_64bpp; + root_parameters_set &= ~root_parameter_edram_bit; + } + if (!(root_parameters_set & root_parameter_edram_bit)) { + D3D12_GPU_DESCRIPTOR_HANDLE descriptor_handle_edram; + if (bindless_resources_used_) { + descriptor_handle_edram = command_processor_ + .GetEdramUintPow2BindlessUAVHandlePair( + 2 + uint32_t(last_edram_uav_is_64bpp)) + .second; + } else { + assert_true(edram_uav_indices[size_t(last_edram_uav_is_64bpp)] != + SIZE_MAX); + descriptor_handle_edram = + current_temporary_descriptors_gpu_[edram_uav_indices[size_t( + last_edram_uav_is_64bpp)]] + .second; + } + command_list.D3DSetComputeRootDescriptorTable(root_parameter_edram, + descriptor_handle_edram); + root_parameters_set |= root_parameter_edram_bit; + } + + DumpRootParameter root_parameter_pitches = + pipeline_key.is_depth ? kDumpRootParameterDepthPitches + : kDumpRootParameterColorPitches; + uint32_t root_parameter_pitches_bit = uint32_t(1) << root_parameter_pitches; + DumpPitches pitches; + pitches.source_pitch = rt_key.GetPitchTiles(); + pitches.dest_pitch = dump_pitch; + if (last_pitches != pitches) { + last_pitches = pitches; + root_parameters_set &= ~root_parameter_pitches_bit; + } + if (!(root_parameters_set & root_parameter_pitches_bit)) { + command_list.D3DSetComputeRoot32BitConstants( + root_parameter_pitches, sizeof(last_pitches) / sizeof(uint32_t), + &last_pitches, 0); + root_parameters_set |= root_parameter_pitches_bit; + } + + if (pipeline_key.is_depth) { + constexpr uint32_t kDumpRootParameterDepthStencilBit = + uint32_t(1) << kDumpRootParameterDepthStencil; + uint32_t descriptor_index_stencil = + d3d12_rt.temporary_srv_descriptor_index_stencil(); + assert_true(descriptor_index_stencil != UINT32_MAX); + if (last_descriptor_index_stencil != descriptor_index_stencil) { + last_descriptor_index_stencil = descriptor_index_stencil; + root_parameters_set &= ~kDumpRootParameterDepthStencilBit; + } + if (!(root_parameters_set & kDumpRootParameterDepthStencilBit)) { + command_list.D3DSetComputeRootDescriptorTable( + kDumpRootParameterDepthStencil, + current_temporary_descriptors_gpu_[last_descriptor_index_stencil] + .second); + root_parameters_set |= kDumpRootParameterDepthStencilBit; + } + } + + constexpr uint32_t kDumpRootParameterSourceBit = + uint32_t(1) << kDumpRootParameterSource; + uint32_t descriptor_index_source = + d3d12_rt.temporary_srv_descriptor_index(); + assert_true(descriptor_index_source != UINT32_MAX); + if (last_descriptor_index_source != descriptor_index_source) { + last_descriptor_index_source = descriptor_index_source; + root_parameters_set &= ~kDumpRootParameterSourceBit; + } + if (!(root_parameters_set & kDumpRootParameterSourceBit)) { + command_list.D3DSetComputeRootDescriptorTable( + kDumpRootParameterSource, + current_temporary_descriptors_gpu_[last_descriptor_index_source] + .second); + root_parameters_set |= kDumpRootParameterSourceBit; + } + + constexpr uint32_t kDumpRootParameterOffsetsBit = + uint32_t(1) << kDumpRootParameterOffsets; + DumpOffsets offsets; + offsets.source_base_tiles = rt_key.base_tiles; + ResolveCopyDumpRectangle::Dispatch + dispatches[ResolveCopyDumpRectangle::kMaxDispatches]; + uint32_t dispatch_count = + rectangle.GetDispatches(dump_pitch, dump_row_length_used, dispatches); + for (uint32_t i = 0; i < dispatch_count; ++i) { + const ResolveCopyDumpRectangle::Dispatch& dispatch = dispatches[i]; + offsets.first_group_tile_source_relative = + dump_base + dispatch.offset - rt_key.base_tiles; + if (last_offsets != offsets) { + last_offsets = offsets; + root_parameters_set &= ~kDumpRootParameterOffsetsBit; + } + if (!(root_parameters_set & kDumpRootParameterOffsetsBit)) { + command_list.D3DSetComputeRoot32BitConstants( + kDumpRootParameterOffsets, sizeof(last_offsets) / sizeof(uint32_t), + &last_offsets, 0); + root_parameters_set |= kDumpRootParameterOffsetsBit; + } + command_processor_.SubmitBarriers(); + // 32bpp groups are for half-tiles because 80x16 is over the group + // size limit. + command_list.D3DDispatch( + dispatch.width_tiles << uint32_t(!format_is_64bpp), + dispatch.height_tiles, 1); + } + MarkEdramBufferModified(); + } +} + +} // namespace d3d12 +} // namespace gpu +} // namespace xe diff --git a/src/xenia/gpu/d3d12/d3d12_render_target_cache.h b/src/xenia/gpu/d3d12/d3d12_render_target_cache.h new file mode 100644 index 000000000..efc86db64 --- /dev/null +++ b/src/xenia/gpu/d3d12/d3d12_render_target_cache.h @@ -0,0 +1,841 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_GPU_D3D12_D3D12_RENDER_TARGET_CACHE_H_ +#define XENIA_GPU_D3D12_D3D12_RENDER_TARGET_CACHE_H_ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/gpu/d3d12/d3d12_shared_memory.h" +#include "xenia/gpu/d3d12/texture_cache.h" +#include "xenia/gpu/draw_util.h" +#include "xenia/gpu/render_target_cache.h" +#include "xenia/gpu/trace_writer.h" +#include "xenia/gpu/xenos.h" +#include "xenia/memory.h" +#include "xenia/ui/d3d12/d3d12_cpu_descriptor_pool.h" +#include "xenia/ui/d3d12/d3d12_provider.h" +#include "xenia/ui/d3d12/d3d12_upload_buffer_pool.h" +#include "xenia/ui/d3d12/d3d12_util.h" + +namespace xe { +namespace gpu { +namespace d3d12 { + +class D3D12CommandProcessor; + +class D3D12RenderTargetCache final : public RenderTargetCache { + public: + D3D12RenderTargetCache(const RegisterFile& register_file, + D3D12CommandProcessor& command_processor, + TraceWriter& trace_writer, + bool bindless_resources_used) + : RenderTargetCache(register_file), + command_processor_(command_processor), + trace_writer_(trace_writer), + bindless_resources_used_(bindless_resources_used) {} + ~D3D12RenderTargetCache() override; + + bool Initialize(); + void Shutdown(bool from_destructor = false); + + void CompletedSubmissionUpdated(); + void BeginSubmission(); + + Path GetPath() const override { return path_; } + + uint32_t GetResolutionScale() const override { return resolution_scale_; } + + bool Update(bool is_rasterization_done, + uint32_t shader_writes_color_targets) override; + + void InvalidateCommandListRenderTargets() { + are_current_command_list_render_targets_valid_ = false; + } + + bool msaa_2x_supported() const { return msaa_2x_supported_; } + + void WriteEdramRawSRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle); + void WriteEdramRawUAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle); + void WriteEdramUintPow2SRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle, + uint32_t element_size_bytes_pow2); + void WriteEdramUintPow2UAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle, + uint32_t element_size_bytes_pow2); + + // Performs the resolve to a shared memory area according to the current + // register values, and also clears the render targets if needed. Must be in a + // frame for calling. + bool Resolve(const Memory& memory, D3D12SharedMemory& shared_memory, + TextureCache& texture_cache, uint32_t& written_address_out, + uint32_t& written_length_out); + + // Returns true if any downloads were submitted to the command processor. + bool InitializeTraceSubmitDownloads(); + void InitializeTraceCompleteDownloads(); + void RestoreEdramSnapshot(const void* snapshot); + + // For host render targets. + + bool gamma_render_target_as_srgb() const { + return gamma_render_target_as_srgb_; + } + + // Using R16G16[B16A16]_SNORM, which are -1...1, not the needed -32...32. + // Persistent data doesn't depend on this, so can be overriden by per-game + // configuration. + bool IsFixed16TruncatedToMinus1To1() const { + return GetPath() == Path::kHostRenderTargets && + !cvars::snorm16_render_target_full_range; + } + + DepthFloat24Conversion depth_float24_conversion() const { + return depth_float24_conversion_; + } + + DXGI_FORMAT GetColorResourceDXGIFormat( + xenos::ColorRenderTargetFormat format) const; + DXGI_FORMAT GetColorDrawDXGIFormat( + xenos::ColorRenderTargetFormat format) const; + DXGI_FORMAT GetColorOwnershipTransferDXGIFormat( + xenos::ColorRenderTargetFormat format, + bool* is_integer_out = nullptr) const; + static DXGI_FORMAT GetDepthResourceDXGIFormat( + xenos::DepthRenderTargetFormat format); + static DXGI_FORMAT GetDepthDSVDXGIFormat( + xenos::DepthRenderTargetFormat format); + static DXGI_FORMAT GetDepthSRVDepthDXGIFormat( + xenos::DepthRenderTargetFormat format); + static DXGI_FORMAT GetDepthSRVStencilDXGIFormat( + xenos::DepthRenderTargetFormat format); + + protected: + class D3D12RenderTarget final : public RenderTarget { + public: + // descriptor_draw_srgb is only used for k_8_8_8_8 render targets when host + // sRGB (gamma_render_target_as_srgb) is used. descriptor_load is present + // when the DXGI formats are different for drawing and bit-exact loading + // (for NaN pattern preservation across EDRAM tile ownership transfers in + // floating-point formats, and to distinguish between two -1 representations + // in snorm formats). + D3D12RenderTarget( + RenderTargetKey key, D3D12RenderTargetCache& render_target_cache, + ID3D12Resource* resource, + ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_draw, + ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_draw_srgb, + ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& + descriptor_load_separate, + ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_srv, + ui::d3d12::D3D12CpuDescriptorPool::Descriptor&& descriptor_srv_stencil, + D3D12_RESOURCE_STATES resource_state) + : RenderTarget(key), + render_target_cache_(render_target_cache), + resource_(resource), + descriptor_draw_(std::move(descriptor_draw)), + descriptor_draw_srgb_(std::move(descriptor_draw_srgb)), + descriptor_load_separate_(std::move(descriptor_load_separate)), + descriptor_srv_(std::move(descriptor_srv)), + descriptor_srv_stencil_(std::move(descriptor_srv_stencil)), + resource_state_(resource_state) { + resource_->AddRef(); + } + + ID3D12Resource* resource() const { return resource_.Get(); } + const ui::d3d12::D3D12CpuDescriptorPool::Descriptor& descriptor_draw() + const { + return descriptor_draw_; + } + const ui::d3d12::D3D12CpuDescriptorPool::Descriptor& descriptor_draw_srgb() + const { + return descriptor_draw_srgb_; + } + const ui::d3d12::D3D12CpuDescriptorPool::Descriptor& descriptor_srv() + const { + return descriptor_srv_; + } + const ui::d3d12::D3D12CpuDescriptorPool::Descriptor& + descriptor_srv_stencil() const { + return descriptor_srv_stencil_; + } + const ui::d3d12::D3D12CpuDescriptorPool::Descriptor& + descriptor_load_separate() const { + return descriptor_load_separate_; + } + + D3D12_RESOURCE_STATES SetResourceState(D3D12_RESOURCE_STATES new_state) { + D3D12_RESOURCE_STATES old_state = resource_state_; + resource_state_ = new_state; + return old_state; + } + + uint32_t temporary_srv_descriptor_index() const { + return temporary_srv_descriptor_index_; + } + void SetTemporarySRVDescriptorIndex(uint32_t index) { + temporary_srv_descriptor_index_ = index; + } + uint32_t temporary_srv_descriptor_index_stencil() const { + return temporary_srv_descriptor_index_stencil_; + } + void SetTemporarySRVDescriptorIndexStencil(uint32_t index) { + temporary_srv_descriptor_index_stencil_ = index; + } + uint32_t temporary_sort_index() const { return temporary_sort_index_; } + void SetTemporarySortIndex(uint32_t index) { + temporary_sort_index_ = index; + } + + private: + D3D12RenderTargetCache& render_target_cache_; + Microsoft::WRL::ComPtr resource_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_draw_srgb_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_load_separate_; + // Texture SRV non-shader-visible descriptors, to prepare shader-visible + // descriptors faster, by copying rather than by creating every time. + // TODO(Triang3l): With bindless resources, persistently store them in the + // heap. + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_srv_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor descriptor_srv_stencil_; + D3D12_RESOURCE_STATES resource_state_; + // Temporary storage for indices in operations like transfers and dumps. + uint32_t temporary_srv_descriptor_index_ = UINT32_MAX; + uint32_t temporary_srv_descriptor_index_stencil_ = UINT32_MAX; + uint32_t temporary_sort_index_ = 0; + }; + + uint32_t GetMaxRenderTargetWidth() const override { + return D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION; + } + uint32_t GetMaxRenderTargetHeight() const override { + return D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION; + } + + xenos::ColorRenderTargetFormat GetHostRelevantColorFormat( + xenos::ColorRenderTargetFormat format) const override; + + RenderTarget* CreateRenderTarget(RenderTargetKey key) override; + + bool IsHostDepthEncodingDifferent( + xenos::DepthRenderTargetFormat format) const override; + + void RequestPixelShaderInterlockBarrier() override; + + private: + enum class EdramBufferModificationStatus { + // No uncommitted ROV/UAV writes. + kUnmodified, + // Need to commit before the next ROV usage with overlap. + kAsROV, + // Need to commit before any next ROV usage. + kAsUAV, + }; + void TransitionEdramBuffer(D3D12_RESOURCE_STATES new_state); + void MarkEdramBufferModified( + EdramBufferModificationStatus modification_status = + EdramBufferModificationStatus::kAsUAV); + void CommitEdramBufferUAVWrites(EdramBufferModificationStatus commit_status = + EdramBufferModificationStatus::kAsROV); + + D3D12CommandProcessor& command_processor_; + TraceWriter& trace_writer_; + bool bindless_resources_used_; + + Path path_ = Path::kHostRenderTargets; + uint32_t resolution_scale_ = 1; + + // For host render targets, an EDRAM-sized scratch buffer for: + // - Guest render target data copied from host render targets during copying + // in resolves and in frame trace creation. + // - Host float32 depth in ownership transfers when the host depth texture and + // the destination are the same. + // For rasterizer-ordered view, the buffer containing the EDRAM data. + // (Note that if a hybrid RTV / DSV + ROV approach to color render targets is + // added, which is, however, unlikely as it would have very complicated + // interaction with depth / stencil testing, host depth will need to be + // copied to a different buffer - the same range may have ROV-owned color and + // host float32 depth at the same time). + ID3D12Resource* edram_buffer_ = nullptr; + D3D12_RESOURCE_STATES edram_buffer_state_; + EdramBufferModificationStatus edram_buffer_modification_status_ = + EdramBufferModificationStatus::kUnmodified; + + // Non-shader-visible descriptor heap containing pre-created SRV and UAV + // descriptors of the EDRAM buffer, for faster binding (by copying rather + // than creation). + enum class EdramBufferDescriptorIndex : uint32_t { + kRawSRV, + kR32UintSRV, + kR32G32UintSRV, + kR32G32B32A32UintSRV, + kRawUAV, + kR32UintUAV, + kR32G32UintUAV, + kR32G32B32A32UintUAV, + + kCount, + }; + ID3D12DescriptorHeap* edram_buffer_descriptor_heap_ = nullptr; + D3D12_CPU_DESCRIPTOR_HANDLE edram_buffer_descriptor_heap_start_; + + // Resolve copying root signature and pipelines. + // Parameter 0 - draw_util::ResolveCopyShaderConstants or its ::DestRelative. + // Parameter 1 - destination (shared memory or a part of it). + // Parameter 2 - source (EDRAM). + ID3D12RootSignature* resolve_copy_root_signature_ = nullptr; + static const std::pair + kResolveCopyShaders[size_t(draw_util::ResolveCopyShaderIndex::kCount)]; + ID3D12PipelineState* resolve_copy_pipelines_[size_t( + draw_util::ResolveCopyShaderIndex::kCount)] = {}; + + // For traces. + ID3D12Resource* edram_snapshot_download_buffer_ = nullptr; + std::unique_ptr + edram_snapshot_restore_pool_; + + // For host render targets. + + enum TransferCBVRegister : uint32_t { + kTransferCBVRegisterStencilMask, + kTransferCBVRegisterAddress, + kTransferCBVRegisterHostDepthAddress, + }; + enum TransferSRVRegister : uint32_t { + kTransferSRVRegisterColor, + kTransferSRVRegisterDepth, + kTransferSRVRegisterStencil, + kTransferSRVRegisterHostDepth, + kTransferSRVRegisterCount, + }; + enum TransferUsedRootParameter : uint32_t { + // Changed 8 times per transfer. + kTransferUsedRootParameterStencilMaskConstant, + kTransferUsedRootParameterColorSRV, + // Mutually exclusive with ColorSRV. + kTransferUsedRootParameterDepthSRV, + // Mutually exclusive with ColorSRV. + kTransferUsedRootParameterStencilSRV, + // May happen to be the same for different sources. + kTransferUsedRootParameterAddressConstant, + kTransferUsedRootParameterHostDepthSRV, + kTransferUsedRootParameterHostDepthAddressConstant, + kTransferUsedRootParameterCount, + + kTransferUsedRootParameterStencilMaskConstantBit = + uint32_t(1) << kTransferUsedRootParameterStencilMaskConstant, + kTransferUsedRootParameterColorSRVBit = + uint32_t(1) << kTransferUsedRootParameterColorSRV, + kTransferUsedRootParameterDepthSRVBit = + uint32_t(1) << kTransferUsedRootParameterDepthSRV, + kTransferUsedRootParameterStencilSRVBit = + uint32_t(1) << kTransferUsedRootParameterStencilSRV, + kTransferUsedRootParameterAddressConstantBit = + uint32_t(1) << kTransferUsedRootParameterAddressConstant, + kTransferUsedRootParameterHostDepthSRVBit = + uint32_t(1) << kTransferUsedRootParameterHostDepthSRV, + kTransferUsedRootParameterHostDepthAddressConstantBit = + uint32_t(1) << kTransferUsedRootParameterHostDepthAddressConstant, + + kTransferUsedRootParametersDescriptorMask = + kTransferUsedRootParameterColorSRVBit | + kTransferUsedRootParameterDepthSRVBit | + kTransferUsedRootParameterStencilSRVBit | + kTransferUsedRootParameterHostDepthSRVBit, + }; + enum class TransferRootSignatureIndex { + kColor, + kDepth, + kDepthStencil, + kColorToStencilBit, + kStencilToStencilBit, + kColorAndHostDepth, + kDepthAndHostDepth, + kDepthStencilAndHostDepth, + kCount, + }; + static const uint32_t + kTransferUsedRootParameters[size_t(TransferRootSignatureIndex::kCount)]; + enum class TransferMode : uint32_t { + // 1 SRV (color texture), source constant. + kColorToDepth, + // 1 SRV (color texture), source constant. + kColorToColor, + + // 1 or 2 SRVs (depth texture, stencil texture if SV_StencilRef is + // supported), source constant. + kDepthToDepth, + // 2 SRVs (depth texture, stencil texture), source constant. + kDepthToColor, + + // 1 SRV (color texture), mask constant (most frequently changed, 8 times + // per transfer), source constant. + kColorToStencilBit, + // 1 SRV (stencil texture), mask constant, source constant. + kDepthToStencilBit, + + // Two-source modes, using the host depth if it, when converted to the guest + // format, matches what's in the owner source (not modified, keep host + // precision), or the guest data otherwise (significantly modified, possibly + // cleared). Stencil for SV_StencilRef is always taken from the guest + // source. + + // 2 SRVs (color texture, host depth texture or buffer), source constant, + // host depth source constant. + kColorAndHostDepthToDepth, + // When using different source and destination depth formats. 2 or 3 SRVs + // (depth texture, stencil texture if SV_StencilRef is supported, host depth + // texture or buffer), source constant, host depth source constant. + kDepthAndHostDepthToDepth, + + kCount, + }; + enum class TransferOutput { + kColor, + kDepth, + // With this output, kTransferCBVRegisterStencilMask is used. + kStencilBit, + }; + struct TransferModeInfo { + TransferOutput output; + TransferRootSignatureIndex root_signature_no_stencil_ref; + TransferRootSignatureIndex root_signature_with_stencil_ref; + }; + static const TransferModeInfo kTransferModes[size_t(TransferMode::kCount)]; + + union TransferShaderKey { + struct { + xenos::MsaaSamples dest_msaa_samples : xenos::kMsaaSamplesBits; + uint32_t dest_host_relevant_format : xenos::kRenderTargetFormatBits; + xenos::MsaaSamples source_msaa_samples : xenos::kMsaaSamplesBits; + // Always 1x when host_depth_source_is_copy is true not to create the same + // pipeline for different MSAA sample counts as it doesn't matter in this + // case. + xenos::MsaaSamples host_depth_source_msaa_samples + : xenos::kMsaaSamplesBits; + uint32_t source_host_relevant_format : xenos::kRenderTargetFormatBits; + // If host depth is also fetched, whether it's pre-copied to the EDRAM + // buffer (but since it's just a scratch buffer, with tiles laid out + // linearly with the same pitch as in the original render target; also no + // swapping of 40-sample columns as opposed to the host render target - + // this is done only for the color source). + uint32_t host_depth_source_is_copy : 1; + + // Last bits because this affects the root signature - after sorting, only + // change it as fewer times as possible. Depth buffers have an additional + // depth SRV. + static_assert(size_t(TransferMode::kCount) <= (size_t(1) << 3)); + TransferMode mode : 3; + }; + uint32_t key = 0; + struct Hasher { + size_t operator()(const TransferShaderKey& key) const { + return std::hash{}(key.key); + } + }; + bool operator==(const TransferShaderKey& other_key) const { + return key == other_key.key; + } + bool operator!=(const TransferShaderKey& other_key) const { + return !(*this == other_key); + } + bool operator<(const TransferShaderKey& other_key) const { + return key < other_key.key; + } + }; + + union TransferAddressConstant { + struct { + // All in tiles. + uint32_t dest_pitch : xenos::kEdramPitchTilesBits; + uint32_t source_pitch : xenos::kEdramPitchTilesBits; + // Safe to use 12 bits for signed difference - no ownership transfer can + // ever occur between render targets with EDRAM base >= 2048 as this would + // result in 0-length spans. 10 + 10 + 12 is exactly 32, any more bits, + // and more root 32-bit constants will be used. + // Destination base in tiles minus source base in tiles (not vice versa + // because this is a transform of the coordinate system, not addresses + // themselves). + // 0 for host_depth_source_is_copy (ignored in this case anyway as + // destination == source anyway). + int32_t source_to_dest : xenos::kEdramBaseTilesBits; + }; + uint32_t constant = 0; + bool operator==(const TransferAddressConstant& other_constant) const { + return constant == other_constant.constant; + } + bool operator!=(const TransferAddressConstant& other_constant) const { + return !(*this == other_constant); + } + }; + static_assert(sizeof(TransferAddressConstant) == sizeof(uint32_t)); + + struct TransferInvocation { + Transfer transfer; + TransferShaderKey shader_key; + TransferInvocation(const Transfer& transfer, + const TransferShaderKey& shader_key) + : transfer(transfer), shader_key(shader_key) {} + bool operator<(const TransferInvocation& other_invocation) { + // TODO(Triang3l): See if it may be better to sort by the source in the + // first place, especially when reading the same data multiple times (like + // to write the stencil bits after depth) for better read locality. + // Sort by the shader key primarily to reduce pipeline state (context) + // switches. + if (shader_key != other_invocation.shader_key) { + return shader_key < other_invocation.shader_key; + } + // Host depth render targets are changed rarely if they exist, won't save + // many binding changes, ignore them for simplicity (their existence is + // caught by the shader key change). + assert_not_null(transfer.source); + assert_not_null(other_invocation.transfer.source); + uint32_t source_index = + static_cast(transfer.source) + ->temporary_sort_index(); + uint32_t other_source_index = static_cast( + other_invocation.transfer.source) + ->temporary_sort_index(); + if (source_index != other_source_index) { + return source_index < other_source_index; + } + return transfer.start_tiles < other_invocation.transfer.start_tiles; + } + bool CanBeMergedIntoOneDraw( + const TransferInvocation& other_invocation) const { + return shader_key == other_invocation.shader_key && + transfer.AreSourcesSame(other_invocation.transfer); + } + }; + + union HostDepthStoreRectangleConstant { + struct { + // - 1 because the maximum is 0x1FFF / 8, not 0x2000 / 8. + uint32_t x_pixels_div_8 : xenos::kResolveSizeBits - 1 - + xenos::kResolveAlignmentPixelsLog2; + uint32_t y_pixels_div_8 : xenos::kResolveSizeBits - 1 - + xenos::kResolveAlignmentPixelsLog2; + uint32_t width_pixels_div_8_minus_1 : xenos::kResolveSizeBits - 1 - + xenos::kResolveAlignmentPixelsLog2; + }; + uint32_t constant = 0; + }; + static_assert(sizeof(HostDepthStoreRectangleConstant) == sizeof(uint32_t)); + + union HostDepthStoreRenderTargetConstant { + struct { + uint32_t pitch_tiles : xenos::kEdramPitchTilesBits; + // 1 to 3. + uint32_t resolution_scale : 2; + // For native 2x MSAA vs. 2x over 4x. + uint32_t second_sample_index : 2; + }; + uint32_t constant = 0; + }; + static_assert(sizeof(HostDepthStoreRenderTargetConstant) == sizeof(uint32_t)); + + enum { + kHostDepthStoreRootParameterRectangleConstant, + kHostDepthStoreRootParameterRenderTargetConstant, + kHostDepthStoreRootParameterSource, + kHostDepthStoreRootParameterDest, + kHostDepthStoreRootParameterCount, + }; + + union DumpPipelineKey { + struct { + xenos::MsaaSamples msaa_samples : 2; + uint32_t host_relevant_format : 4; + // Last bit because this affects the root signature - after sorting, only + // change it at most once. Depth buffers have an additional stencil SRV. + uint32_t is_depth : 1; + }; + uint32_t key = 0; + struct Hasher { + size_t operator()(const DumpPipelineKey& key) const { + return std::hash{}(key.key); + } + }; + bool operator==(const DumpPipelineKey& other_key) const { + return key == other_key.key; + } + bool operator!=(const DumpPipelineKey& other_key) const { + return !(*this == other_key); + } + bool operator<(const DumpPipelineKey& other_key) const { + return key < other_key.key; + } + + xenos::ColorRenderTargetFormat GetColorFormat() const { + assert_false(is_depth); + return xenos::ColorRenderTargetFormat(host_relevant_format); + } + xenos::DepthRenderTargetFormat GetDepthFormat() const { + assert_true(is_depth); + return xenos::DepthRenderTargetFormat(host_relevant_format); + } + }; + + union DumpOffsets { + struct { + // Absolute index of the first thread group's tile within the source + // texture. + uint32_t first_group_tile_source_relative : xenos::kEdramBaseTilesBits; + uint32_t source_base_tiles : xenos::kEdramBaseTilesBits; + }; + uint32_t offsets = 0; + bool operator==(const DumpOffsets& other_offsets) const { + return offsets == other_offsets.offsets; + } + bool operator!=(const DumpOffsets& other_offsets) const { + return !(*this == other_offsets); + } + }; + static_assert(sizeof(DumpOffsets) == sizeof(uint32_t)); + + union DumpPitches { + struct { + // Both in tiles. + uint32_t source_pitch : xenos::kEdramPitchTilesBits; + uint32_t dest_pitch : xenos::kEdramPitchTilesBits; + }; + uint32_t pitches = 0; + bool operator==(const DumpPitches& other_pitches) const { + return pitches == other_pitches.pitches; + } + bool operator!=(const DumpPitches& other_pitches) const { + return !(*this == other_pitches); + } + }; + static_assert(sizeof(DumpPitches) == sizeof(uint32_t)); + + enum DumpCbuffer : uint32_t { + kDumpCbufferOffsets, + kDumpCbufferPitches, + kDumpCbufferCount, + }; + + enum DumpRootParameter : uint32_t { + // May be changed multiple times for the same source. + kDumpRootParameterOffsets, + // One resolve may need multiple sources. + kDumpRootParameterSource, + + // May be different for different sources. + kDumpRootParameterColorPitches = kDumpRootParameterSource + 1, + // Only changed between 32bpp and 64bpp. + kDumpRootParameterColorEdram, + + kDumpRootParameterColorCount, + + // Same change frequency than the source (though currently the command + // processor can't contiguously allocate multiple descriptors with bindless, + // when such functionality is added, switch to one root signature). + kDumpRootParameterDepthStencil = kDumpRootParameterSource + 1, + kDumpRootParameterDepthPitches, + kDumpRootParameterDepthEdram, + + kDumpRootParameterDepthCount, + }; + + struct DumpInvocation { + ResolveCopyDumpRectangle rectangle; + DumpPipelineKey pipeline_key; + DumpInvocation(const ResolveCopyDumpRectangle& rectangle, + const DumpPipelineKey& pipeline_key) + : rectangle(rectangle), pipeline_key(pipeline_key) {} + bool operator<(const DumpInvocation& other_invocation) { + // Sort by the pipeline key primarily to reduce pipeline state (context) + // switches. + if (pipeline_key != other_invocation.pipeline_key) { + return pipeline_key < other_invocation.pipeline_key; + } + assert_not_null(rectangle.render_target); + uint32_t render_target_index = + static_cast(rectangle.render_target) + ->temporary_sort_index(); + const ResolveCopyDumpRectangle& other_rectangle = + other_invocation.rectangle; + uint32_t other_render_target_index = + static_cast(other_rectangle.render_target) + ->temporary_sort_index(); + if (render_target_index != other_render_target_index) { + return render_target_index < other_render_target_index; + } + if (rectangle.row_first != other_rectangle.row_first) { + return rectangle.row_first < other_rectangle.row_first; + } + return rectangle.row_first_start < other_rectangle.row_first_start; + } + }; + + // Returns: + // - A pointer to 1 pipeline for writing color or depth (or stencil via + // SV_StencilRef). + // - A pointer to 8 pipelines for writing stencil by discarding samples + // depending on whether they have one bit set, from 1 << 0 to 1 << 7. + // - Null if failed to create. + ID3D12PipelineState* const* GetOrCreateTransferPipelines( + TransferShaderKey key); + + static TransferMode GetTransferMode(bool dest_is_stencil_bit, + bool dest_is_depth, bool source_is_depth, + bool source_has_host_depth) { + assert_true(dest_is_depth || + (!dest_is_stencil_bit && !source_has_host_depth)); + if (dest_is_stencil_bit) { + return source_is_depth ? TransferMode::kDepthToStencilBit + : TransferMode::kColorToStencilBit; + } + if (dest_is_depth) { + if (source_is_depth) { + return source_has_host_depth ? TransferMode::kDepthAndHostDepthToDepth + : TransferMode::kDepthToDepth; + } + return source_has_host_depth ? TransferMode::kColorAndHostDepthToDepth + : TransferMode::kColorToDepth; + } + return source_is_depth ? TransferMode::kDepthToColor + : TransferMode::kColorToColor; + } + + // Do ownership transfers for render targets - each render target / vector may + // be null / empty in case there's nothing to do for them. + // resolve_clear_rectangle is expected to be provided by + // PrepareHostRenderTargetsResolveClear which should do all the needed size + // bound checks. + void PerformTransfersAndResolveClears( + uint32_t render_target_count, RenderTarget* const* render_targets, + const std::vector* render_target_transfers, + const uint64_t* render_target_resolve_clear_values = nullptr, + const Transfer::Rectangle* resolve_clear_rectangle = nullptr); + + // Accepts an array of (1 + xenos::kMaxColorRenderTargets) render targets, + // first depth, then color. + void SetCommandListRenderTargets( + RenderTarget* const* depth_and_color_render_targets); + + ID3D12PipelineState* GetOrCreateDumpPipeline(DumpPipelineKey key); + + // Writes contents of host render targets within rectangles from + // ResolveInfo::GetCopyEdramTileSpan to edram_buffer_. + void DumpRenderTargets(uint32_t dump_base, uint32_t dump_row_length_used, + uint32_t dump_rows, uint32_t dump_pitch); + + bool use_stencil_reference_output_ = false; + + bool gamma_render_target_as_srgb_ = false; + + DepthFloat24Conversion depth_float24_conversion_ = + DepthFloat24Conversion::kOnCopy; + + bool msaa_2x_supported_ = false; + + std::shared_ptr descriptor_pool_color_; + std::shared_ptr descriptor_pool_depth_; + std::shared_ptr descriptor_pool_srv_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor null_rtv_descriptor_ss_; + ui::d3d12::D3D12CpuDescriptorPool::Descriptor null_rtv_descriptor_ms_; + + // Possible tile ownership transfer paths: + // - To color: + // - From color: 1 SRV (color). + // - From depth: 2 SRVs (depth, stencil). + // - To depth / stencil (with SV_StencilRef): + // - From color: 1 SRV (color). + // - From depth: 2 SRVs (depth, stencil). + // - From color and float32 depth: 2 SRVs (color with stencil, depth). + // - Different depth buffer: depth SRV is a texture. + // - Same depth buffer: depth SRV is a buffer (pre-copied). + // - To depth (no SV_StencilRef): + // - From color: 1 SRV (color). + // - From depth: 1 SRV (depth). + // - From color and float32 depth: 2 SRVs (color, depth). + // - Different depth buffer: depth SRV is a texture. + // - Same depth buffer: depth SRV is a buffer (pre-copied). + // - To stencil (no SV_StencilRef): + // - From color: 1 SRV (color). + // - From depth: 1 SRV (stencil). + + const RenderTarget* const* + current_command_list_render_targets_[1 + xenos::kMaxColorRenderTargets]; + uint32_t are_current_command_list_render_targets_srgb_ = 0; + bool are_current_command_list_render_targets_valid_ = false; + + // Temporary storage for descriptors used in PerformTransfersAndResolveClears + // and DumpRenderTargets. + std::vector current_temporary_descriptors_cpu_; + std::vector + current_temporary_descriptors_gpu_; + + ID3D12RootSignature* host_depth_store_root_signature_ = nullptr; + ID3D12PipelineState* + host_depth_store_pipelines_[size_t(xenos::MsaaSamples::k4X) + 1] = {}; + + std::unique_ptr + transfer_vertex_buffer_pool_; + + ID3D12RootSignature* transfer_root_signatures_[size_t( + TransferRootSignatureIndex::kCount)] = {}; + std::unordered_map + transfer_pipelines_; + std::unordered_map, + TransferShaderKey::Hasher> + transfer_stencil_bit_pipelines_; + + // Temporary storage for PerformTransfersAndResolveClears. + std::vector current_transfer_invocations_; + + // Temporary storage for DumpRenderTargets. + std::vector dump_rectangles_; + std::vector dump_invocations_; + + ID3D12RootSignature* dump_root_signature_color_ = nullptr; + ID3D12RootSignature* dump_root_signature_depth_ = nullptr; + // Compute pipelines for copying host render target contents to the EDRAM + // buffer. May be null if failed to create. + std::unordered_map + dump_pipelines_; + + // Parameter 0 - 2 root constants (red, green). + ID3D12RootSignature* uint32_rtv_clear_root_signature_ = nullptr; + // [32 or 32_32][MSAA samples]. + ID3D12PipelineState* + uint32_rtv_clear_pipelines_[2][size_t(xenos::MsaaSamples::k4X) + 1] = {}; + + std::vector clear_transfers_[2]; + + // Temporary storage for DXBC building. + std::vector built_shader_; + + // For rasterizer-ordered view (pixel shader interlock). + + static const std::pair kResolveROVClear32bppShaders[3]; + static const std::pair kResolveROVClear64bppShaders[3]; + + ID3D12RootSignature* resolve_rov_clear_root_signature_ = nullptr; + // Clearing 32bpp color or depth. + ID3D12PipelineState* resolve_rov_clear_32bpp_pipeline_ = nullptr; + // Clearing 64bpp color. + ID3D12PipelineState* resolve_rov_clear_64bpp_pipeline_ = nullptr; +}; + +} // namespace d3d12 +} // namespace gpu +} // namespace xe + +#endif // XENIA_GPU_D3D12_D3D12_RENDER_TARGET_CACHE_H_ diff --git a/src/xenia/gpu/d3d12/d3d12_shared_memory.cc b/src/xenia/gpu/d3d12/d3d12_shared_memory.cc index 4681d85ff..fd521da54 100644 --- a/src/xenia/gpu/d3d12/d3d12_shared_memory.cc +++ b/src/xenia/gpu/d3d12/d3d12_shared_memory.cc @@ -192,6 +192,11 @@ void D3D12SharedMemory::CompletedSubmissionUpdated() { upload_buffer_pool_->Reclaim(command_processor_.GetCompletedSubmission()); } +void D3D12SharedMemory::BeginSubmission() { + // ExecuteCommandLists is a full UAV barrier. + buffer_uav_writes_commit_needed_ = false; +} + void D3D12SharedMemory::CommitUAVWritesAndTransitionBuffer( D3D12_RESOURCE_STATES new_state) { if (buffer_state_ == new_state) { @@ -421,7 +426,7 @@ bool D3D12SharedMemory::UploadRanges( return false; } MakeRangeValid(upload_range_start << page_size_log2(), - uint32_t(upload_buffer_size), false); + uint32_t(upload_buffer_size), false, false); std::memcpy( upload_buffer_mapping, memory().TranslatePhysical(upload_range_start << page_size_log2()), diff --git a/src/xenia/gpu/d3d12/d3d12_shared_memory.h b/src/xenia/gpu/d3d12/d3d12_shared_memory.h index dc918bb11..dfd1e52c2 100644 --- a/src/xenia/gpu/d3d12/d3d12_shared_memory.h +++ b/src/xenia/gpu/d3d12/d3d12_shared_memory.h @@ -43,6 +43,7 @@ class D3D12SharedMemory : public SharedMemory { } void CompletedSubmissionUpdated(); + void BeginSubmission(); // RequestRange may transition the buffer to copy destination - call it before // UseForReading or UseForWriting. diff --git a/src/xenia/gpu/d3d12/deferred_command_list.cc b/src/xenia/gpu/d3d12/deferred_command_list.cc index e618931d4..581d1b71a 100644 --- a/src/xenia/gpu/d3d12/deferred_command_list.cc +++ b/src/xenia/gpu/d3d12/deferred_command_list.cc @@ -40,6 +40,23 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list, stream += kCommandHeaderSizeElements; stream_remaining -= kCommandHeaderSizeElements; switch (header.command) { + case Command::kD3DClearDepthStencilView: { + auto& args = + *reinterpret_cast(stream); + command_list->ClearDepthStencilView( + args.depth_stencil_view, args.clear_flags, args.depth, args.stencil, + args.num_rects, + args.num_rects ? reinterpret_cast(&args + 1) + : nullptr); + } break; + case Command::kD3DClearRenderTargetView: { + auto& args = + *reinterpret_cast(stream); + command_list->ClearRenderTargetView( + args.render_target_view, args.color_rgba, args.num_rects, + args.num_rects ? reinterpret_cast(&args + 1) + : nullptr); + } break; case Command::kD3DClearUnorderedAccessViewUint: { auto& args = *reinterpret_cast(stream); @@ -64,11 +81,12 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list, auto& args = *reinterpret_cast(stream); command_list->CopyTextureRegion(&args.dst, 0, 0, 0, &args.src, nullptr); } break; - case Command::kCopyTextureRegion: { + case Command::kD3DCopyTextureRegion: { auto& args = - *reinterpret_cast(stream); - command_list->CopyTextureRegion(&args.dst, args.dst_x, args.dst_y, - args.dst_z, &args.src, &args.src_box); + *reinterpret_cast(stream); + command_list->CopyTextureRegion( + &args.dst, args.dst_x, args.dst_y, args.dst_z, &args.src, + args.has_src_box ? &args.src_box : nullptr); } break; case Command::kD3DDispatch: { if (current_pipeline_state != nullptr) { @@ -107,6 +125,17 @@ void DeferredCommandList::Execute(ID3D12GraphicsCommandList* command_list, command_list->IASetPrimitiveTopology( *reinterpret_cast(stream)); } break; + case Command::kD3DIASetVertexBuffers: { + static_assert(alignof(D3D12_VERTEX_BUFFER_VIEW) <= alignof(uintmax_t)); + auto& args = + *reinterpret_cast(stream); + command_list->IASetVertexBuffers( + args.start_slot, args.num_views, + reinterpret_cast( + reinterpret_cast(stream) + + xe::align(sizeof(D3DIASetVertexBuffersHeader), + alignof(D3D12_VERTEX_BUFFER_VIEW)))); + } break; case Command::kD3DOMSetBlendFactor: { command_list->OMSetBlendFactor(reinterpret_cast(stream)); } break; diff --git a/src/xenia/gpu/d3d12/deferred_command_list.h b/src/xenia/gpu/d3d12/deferred_command_list.h index e8060371c..a21d0c3c4 100644 --- a/src/xenia/gpu/d3d12/deferred_command_list.h +++ b/src/xenia/gpu/d3d12/deferred_command_list.h @@ -15,6 +15,7 @@ #include #include +#include "xenia/base/assert.h" #include "xenia/base/math.h" #include "xenia/ui/d3d12/d3d12_api.h" @@ -33,6 +34,47 @@ class DeferredCommandList { void Execute(ID3D12GraphicsCommandList* command_list, ID3D12GraphicsCommandList1* command_list_1); + D3D12_RECT* ClearDepthStencilViewAllocatedRects( + D3D12_CPU_DESCRIPTOR_HANDLE depth_stencil_view, + D3D12_CLEAR_FLAGS clear_flags, FLOAT depth, UINT8 stencil, + UINT num_rects) { + auto args = reinterpret_cast(WriteCommand( + Command::kD3DClearDepthStencilView, + sizeof(ClearDepthStencilViewHeader) + num_rects * sizeof(D3D12_RECT))); + args->depth_stencil_view = depth_stencil_view; + args->clear_flags = clear_flags; + args->depth = depth; + args->stencil = stencil; + args->num_rects = num_rects; + return num_rects ? reinterpret_cast(args + 1) : nullptr; + } + + void D3DClearDepthStencilView(D3D12_CPU_DESCRIPTOR_HANDLE depth_stencil_view, + D3D12_CLEAR_FLAGS clear_flags, FLOAT depth, + UINT8 stencil, UINT num_rects, + const D3D12_RECT* rects) { + D3D12_RECT* allocated_rects = ClearDepthStencilViewAllocatedRects( + depth_stencil_view, clear_flags, depth, stencil, num_rects); + if (num_rects) { + assert_not_null(allocated_rects); + std::memcpy(allocated_rects, rects, num_rects * sizeof(D3D12_RECT)); + } + } + + void D3DClearRenderTargetView(D3D12_CPU_DESCRIPTOR_HANDLE render_target_view, + const FLOAT color_rgba[4], UINT num_rects, + const D3D12_RECT* rects) { + auto args = reinterpret_cast(WriteCommand( + Command::kD3DClearRenderTargetView, + sizeof(ClearRenderTargetViewHeader) + num_rects * sizeof(D3D12_RECT))); + args->render_target_view = render_target_view; + std::memcpy(args->color_rgba, color_rgba, 4 * sizeof(FLOAT)); + args->num_rects = num_rects; + if (num_rects != 0) { + std::memcpy(args + 1, rects, num_rects * sizeof(D3D12_RECT)); + } + } + void D3DClearUnorderedAccessViewUint( D3D12_GPU_DESCRIPTOR_HANDLE view_gpu_handle_in_current_heap, D3D12_CPU_DESCRIPTOR_HANDLE view_cpu_handle, ID3D12Resource* resource, @@ -79,18 +121,25 @@ class DeferredCommandList { std::memcpy(&args.src, &src, sizeof(D3D12_TEXTURE_COPY_LOCATION)); } - void CopyTextureRegion(const D3D12_TEXTURE_COPY_LOCATION& dst, UINT dst_x, - UINT dst_y, UINT dst_z, - const D3D12_TEXTURE_COPY_LOCATION& src, - const D3D12_BOX& src_box) { - auto& args = *reinterpret_cast(WriteCommand( - Command::kCopyTextureRegion, sizeof(CopyTextureRegionArguments))); - std::memcpy(&args.dst, &dst, sizeof(D3D12_TEXTURE_COPY_LOCATION)); + void D3DCopyTextureRegion(const D3D12_TEXTURE_COPY_LOCATION* dst, UINT dst_x, + UINT dst_y, UINT dst_z, + const D3D12_TEXTURE_COPY_LOCATION* src, + const D3D12_BOX* src_box) { + assert_not_null(dst); + assert_not_null(src); + auto& args = *reinterpret_cast(WriteCommand( + Command::kD3DCopyTextureRegion, sizeof(D3DCopyTextureRegionArguments))); + std::memcpy(&args.dst, dst, sizeof(D3D12_TEXTURE_COPY_LOCATION)); args.dst_x = dst_x; args.dst_y = dst_y; args.dst_z = dst_z; - std::memcpy(&args.src, &src, sizeof(D3D12_TEXTURE_COPY_LOCATION)); - args.src_box = src_box; + std::memcpy(&args.src, src, sizeof(D3D12_TEXTURE_COPY_LOCATION)); + if (src_box) { + args.has_src_box = true; + args.src_box = *src_box; + } else { + args.has_src_box = false; + } } void D3DDispatch(UINT thread_group_count_x, UINT thread_group_count_y, @@ -147,6 +196,23 @@ class DeferredCommandList { arg = primitive_topology; } + void D3DIASetVertexBuffers(UINT start_slot, UINT num_views, + const D3D12_VERTEX_BUFFER_VIEW* views) { + if (num_views == 0) { + return; + } + static_assert(alignof(D3D12_VERTEX_BUFFER_VIEW) <= alignof(uintmax_t)); + const size_t header_size = xe::align(sizeof(D3DIASetVertexBuffersHeader), + alignof(D3D12_VERTEX_BUFFER_VIEW)); + auto args = reinterpret_cast(WriteCommand( + Command::kD3DIASetVertexBuffers, + header_size + num_views * sizeof(D3D12_VERTEX_BUFFER_VIEW))); + args->start_slot = start_slot; + args->num_views = num_views; + std::memcpy(reinterpret_cast(args) + header_size, views, + sizeof(D3D12_VERTEX_BUFFER_VIEW) * num_views); + } + void D3DOMSetBlendFactor(const FLOAT blend_factor[4]) { auto args = reinterpret_cast( WriteCommand(Command::kD3DOMSetBlendFactor, 4 * sizeof(FLOAT))); @@ -333,16 +399,19 @@ class DeferredCommandList { private: enum class Command { + kD3DClearDepthStencilView, + kD3DClearRenderTargetView, kD3DClearUnorderedAccessViewUint, kD3DCopyBufferRegion, kD3DCopyResource, kCopyTexture, - kCopyTextureRegion, + kD3DCopyTextureRegion, kD3DDispatch, kD3DDrawIndexedInstanced, kD3DDrawInstanced, kD3DIASetIndexBuffer, kD3DIASetPrimitiveTopology, + kD3DIASetVertexBuffers, kD3DOMSetBlendFactor, kD3DOMSetRenderTargets, kD3DOMSetStencilRef, @@ -370,12 +439,26 @@ class DeferredCommandList { static constexpr size_t kCommandHeaderSizeElements = (sizeof(CommandHeader) + sizeof(uintmax_t) - 1) / sizeof(uintmax_t); + struct ClearDepthStencilViewHeader { + D3D12_CPU_DESCRIPTOR_HANDLE depth_stencil_view; + D3D12_CLEAR_FLAGS clear_flags; + FLOAT depth; + UINT8 stencil; + UINT num_rects; + }; + + struct ClearRenderTargetViewHeader { + D3D12_CPU_DESCRIPTOR_HANDLE render_target_view; + FLOAT color_rgba[4]; + UINT num_rects; + }; + struct ClearUnorderedAccessViewHeader { D3D12_GPU_DESCRIPTOR_HANDLE view_gpu_handle_in_current_heap; D3D12_CPU_DESCRIPTOR_HANDLE view_cpu_handle; ID3D12Resource* resource; union { - float values_float[4]; + FLOAT values_float[4]; UINT values_uint[4]; }; UINT num_rects; @@ -399,13 +482,14 @@ class DeferredCommandList { D3D12_TEXTURE_COPY_LOCATION src; }; - struct CopyTextureRegionArguments { + struct D3DCopyTextureRegionArguments { D3D12_TEXTURE_COPY_LOCATION dst; UINT dst_x; UINT dst_y; UINT dst_z; D3D12_TEXTURE_COPY_LOCATION src; D3D12_BOX src_box; + bool has_src_box; }; struct D3DDispatchArguments { @@ -429,6 +513,11 @@ class DeferredCommandList { UINT start_instance_location; }; + struct D3DIASetVertexBuffersHeader { + UINT start_slot; + UINT num_views; + }; + struct D3DOMSetRenderTargetsArguments { uint8_t num_render_target_descriptors; bool rts_single_handle_to_descriptor_range; diff --git a/src/xenia/gpu/d3d12/pipeline_cache.cc b/src/xenia/gpu/d3d12/pipeline_cache.cc index cbaa5c02c..365e16ed3 100644 --- a/src/xenia/gpu/d3d12/pipeline_cache.cc +++ b/src/xenia/gpu/d3d12/pipeline_cache.cc @@ -33,6 +33,7 @@ #include "xenia/base/string_buffer.h" #include "xenia/base/xxhash.h" #include "xenia/gpu/d3d12/d3d12_command_processor.h" +#include "xenia/gpu/d3d12/d3d12_render_target_cache.h" #include "xenia/gpu/draw_util.h" #include "xenia/gpu/gpu_flags.h" #include "xenia/ui/d3d12/d3d12_util.h" @@ -74,24 +75,27 @@ namespace d3d12 { #include "xenia/gpu/d3d12/shaders/dxbc/primitive_rectangle_list_gs.h" #include "xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h" -PipelineCache::PipelineCache( - D3D12CommandProcessor& command_processor, const RegisterFile& register_file, - bool bindless_resources_used, bool edram_rov_used, - flags::DepthFloat24Conversion depth_float24_conversion, - uint32_t resolution_scale) +PipelineCache::PipelineCache(D3D12CommandProcessor& command_processor, + const RegisterFile& register_file, + const D3D12RenderTargetCache& render_target_cache, + bool bindless_resources_used) : command_processor_(command_processor), register_file_(register_file), - bindless_resources_used_(bindless_resources_used), - edram_rov_used_(edram_rov_used), - depth_float24_conversion_(depth_float24_conversion), - resolution_scale_(resolution_scale) { + render_target_cache_(render_target_cache), + bindless_resources_used_(bindless_resources_used) { auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); + bool edram_rov_used = render_target_cache.GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; + shader_translator_ = std::make_unique( - provider.GetAdapterVendorID(), bindless_resources_used_, edram_rov_used_, + provider.GetAdapterVendorID(), bindless_resources_used_, edram_rov_used, + render_target_cache_.gamma_render_target_as_srgb(), + render_target_cache_.msaa_2x_supported(), + render_target_cache_.GetResolutionScale(), provider.GetGraphicsAnalysis() != nullptr); - if (edram_rov_used_) { + if (edram_rov_used) { depth_only_pixel_shader_ = std::move(shader_translator_->CreateDepthOnlyPixelShader()); } @@ -264,6 +268,9 @@ void PipelineCache::InitializeShaderStorage( } } + bool edram_rov_used = render_target_cache_.GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; + // Initialize the pipeline storage stream - read pipeline descriptions and // collect used shader modifications to translate. std::vector pipeline_stored_descriptions; @@ -272,7 +279,7 @@ void PipelineCache::InitializeShaderStorage( auto pipeline_storage_file_path = shader_storage_shareable_root / fmt::format("{:08X}.{}.d3d12.xpso", title_id, - edram_rov_used_ ? "rov" : "rtv"); + edram_rov_used ? "rov" : "rtv"); pipeline_storage_file_ = xe::filesystem::OpenFile(pipeline_storage_file_path, "a+b"); if (!pipeline_storage_file_) { @@ -287,7 +294,7 @@ void PipelineCache::InitializeShaderStorage( const uint32_t pipeline_storage_magic = 0x53504558; // 'DXRO' or 'DXRT'. const uint32_t pipeline_storage_magic_api = - edram_rov_used_ ? 0x4F525844 : 0x54525844; + edram_rov_used ? 0x4F525844 : 0x54525844; const uint32_t pipeline_storage_version_swapped = xe::byte_swap(std::max(PipelineDescription::kVersion, DxbcShaderTranslator::Modification::kVersion)); @@ -406,7 +413,10 @@ void PipelineCache::InitializeShaderStorage( StringBuffer ucode_disasm_buffer; DxbcShaderTranslator translator( provider.GetAdapterVendorID(), bindless_resources_used_, - edram_rov_used_, provider.GetGraphicsAnalysis() != nullptr); + edram_rov_used, render_target_cache_.gamma_render_target_as_srgb(), + render_target_cache_.msaa_2x_supported(), + render_target_cache_.GetResolutionScale(), + provider.GetGraphicsAnalysis() != nullptr); // If needed and possible, create objects needed for DXIL conversion and // disassembly on this thread. IDxbcConverter* dxbc_converter = nullptr; @@ -656,7 +666,7 @@ void PipelineCache::InitializeShaderStorage( vertex_shader, pixel_shader, DxbcShaderTranslator::Modification( pipeline_description.vertex_shader_modification) - .host_vertex_shader_type != + .vertex.host_vertex_shader_type != Shader::HostVertexShaderType::kVertex); if (!pipeline_runtime_description.root_signature) { continue; @@ -866,31 +876,33 @@ bool PipelineCache::GetCurrentShaderModification( return false; } modification_out = DxbcShaderTranslator::Modification( - shader_translator_->GetDefaultModification( - xenos::ShaderType::kVertex, + shader_translator_->GetDefaultVertexShaderModification( shader.GetDynamicAddressableRegisterCount( sq_program_cntl.vs_num_reg), host_vertex_shader_type)); } else { assert_true(shader.type() == xenos::ShaderType::kPixel); DxbcShaderTranslator::Modification pixel_shader_modification( - shader_translator_->GetDefaultModification( - xenos::ShaderType::kPixel, + shader_translator_->GetDefaultPixelShaderModification( shader.GetDynamicAddressableRegisterCount( sq_program_cntl.ps_num_reg))); - if (!edram_rov_used_) { + if (render_target_cache_.GetPath() == + RenderTargetCache::Path::kHostRenderTargets) { using DepthStencilMode = DxbcShaderTranslator::Modification::DepthStencilMode; - if ((depth_float24_conversion_ == - flags::DepthFloat24Conversion::kOnOutputTruncating || - depth_float24_conversion_ == - flags::DepthFloat24Conversion::kOnOutputRounding) && + RenderTargetCache::DepthFloat24Conversion depth_float24_conversion = + render_target_cache_.depth_float24_conversion(); + if ((depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating || + depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding) && draw_util::GetDepthControlForCurrentEdramMode(regs).z_enable && regs.Get().depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { - pixel_shader_modification.depth_stencil_mode = - depth_float24_conversion_ == - flags::DepthFloat24Conversion::kOnOutputTruncating + pixel_shader_modification.pixel.depth_stencil_mode = + depth_float24_conversion == + RenderTargetCache::DepthFloat24Conversion:: + kOnOutputTruncating ? DepthStencilMode::kFloat24Truncating : DepthStencilMode::kFloat24Rounding; } else { @@ -898,10 +910,10 @@ bool PipelineCache::GetCurrentShaderModification( (!shader.writes_color_target(0) || !draw_util::DoesCoverageDependOnAlpha( regs.Get()))) { - pixel_shader_modification.depth_stencil_mode = + pixel_shader_modification.pixel.depth_stencil_mode = DepthStencilMode::kEarlyHint; } else { - pixel_shader_modification.depth_stencil_mode = + pixel_shader_modification.pixel.depth_stencil_mode = DepthStencilMode::kNoModifiers; } } @@ -991,7 +1003,8 @@ bool PipelineCache::ConfigurePipeline( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, - const RenderTargetCache::PipelineRenderTarget render_targets[5], + uint32_t bound_depth_and_color_render_target_bits, + const uint32_t* bound_depth_and_color_render_target_formats, void** pipeline_handle_out, ID3D12RootSignature** root_signature_out) { #if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES SCOPE_profile_cpu_f("gpu"); @@ -1001,9 +1014,10 @@ bool PipelineCache::ConfigurePipeline( assert_not_null(root_signature_out); PipelineRuntimeDescription runtime_description; - if (!GetCurrentStateDescription(vertex_shader, pixel_shader, primitive_type, - index_format, render_targets, - runtime_description)) { + if (!GetCurrentStateDescription( + vertex_shader, pixel_shader, primitive_type, index_format, + bound_depth_and_color_render_target_bits, + bound_depth_and_color_render_target_formats, runtime_description)) { return false; } PipelineDescription& description = runtime_description.description; @@ -1132,7 +1146,7 @@ bool PipelineCache::TranslateAnalyzedShader( const char* host_shader_type; if (shader.type() == xenos::ShaderType::kVertex) { DxbcShaderTranslator::Modification modification(translation.modification()); - switch (modification.host_vertex_shader_type) { + switch (modification.vertex.host_vertex_shader_type) { case Shader::HostVertexShaderType::kLineDomainCPIndexed: host_shader_type = "control-point-indexed line domain"; break; @@ -1158,8 +1172,8 @@ bool PipelineCache::TranslateAnalyzedShader( host_shader_type = "pixel"; } XELOGGPU("Generated {} shader ({}b) - hash {:016X}:\n{}\n", host_shader_type, - shader.ucode_dword_count() * 4, shader.ucode_data_hash(), - shader.ucode_disassembly().c_str()); + shader.ucode_dword_count() * sizeof(uint32_t), + shader.ucode_data_hash(), shader.ucode_disassembly().c_str()); // Set up texture and sampler binding layouts. if (shader.EnterBindingLayoutUserUIDSetup()) { @@ -1299,9 +1313,11 @@ bool PipelineCache::TranslateAnalyzedShader( // Dump shader files if desired. if (!cvars::dump_shaders.empty()) { + bool edram_rov_used = render_target_cache_.GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; translation.Dump(cvars::dump_shaders, (shader.type() == xenos::ShaderType::kPixel) - ? (edram_rov_used_ ? "d3d12_rov" : "d3d12_rtv") + ? (edram_rov_used ? "d3d12_rov" : "d3d12_rtv") : "d3d12"); } @@ -1312,7 +1328,8 @@ bool PipelineCache::GetCurrentStateDescription( D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, - const RenderTargetCache::PipelineRenderTarget render_targets[5], + uint32_t bound_depth_and_color_render_target_bits, + const uint32_t* bound_depth_and_color_render_target_formats, PipelineRuntimeDescription& runtime_description_out) { PipelineDescription& description_out = runtime_description_out.description; @@ -1324,7 +1341,8 @@ bool PipelineCache::GetCurrentStateDescription( bool tessellated = DxbcShaderTranslator::Modification(vertex_shader->modification()) - .host_vertex_shader_type != Shader::HostVertexShaderType::kVertex; + .vertex.host_vertex_shader_type != + Shader::HostVertexShaderType::kVertex; bool primitive_polygonal = xenos::IsPrimitivePolygonal(tessellated, primitive_type); bool rasterization_enabled = @@ -1341,6 +1359,9 @@ bool PipelineCache::GetCurrentStateDescription( } } + bool edram_rov_used = render_target_cache_.GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; + // Root signature. runtime_description_out.root_signature = command_processor_.GetRootSignature( static_cast(&vertex_shader->shader()), @@ -1465,7 +1486,7 @@ bool PipelineCache::GetCurrentStateDescription( xenos::PolygonType::kTriangles) { description_out.fill_mode_wireframe = 1; } - if (!edram_rov_used_ && pa_su_sc_mode_cntl.poly_offset_front_enable) { + if (!edram_rov_used && pa_su_sc_mode_cntl.poly_offset_front_enable) { poly_offset = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_OFFSET].f32; poly_offset_scale = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_SCALE].f32; } @@ -1478,7 +1499,7 @@ bool PipelineCache::GetCurrentStateDescription( } // Prefer front depth bias because in general, front faces are the ones // that are rendered (except for shadow volumes). - if (!edram_rov_used_ && pa_su_sc_mode_cntl.poly_offset_back_enable && + if (!edram_rov_used && pa_su_sc_mode_cntl.poly_offset_back_enable && poly_offset == 0.0f && poly_offset_scale == 0.0f) { poly_offset = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_OFFSET].f32; poly_offset_scale = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_BACK_SCALE].f32; @@ -1491,12 +1512,12 @@ bool PipelineCache::GetCurrentStateDescription( // Filled front faces only, without culling. cull_front = false; cull_back = false; - if (!edram_rov_used_ && pa_su_sc_mode_cntl.poly_offset_para_enable) { + if (!edram_rov_used && pa_su_sc_mode_cntl.poly_offset_para_enable) { poly_offset = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_OFFSET].f32; poly_offset_scale = regs[XE_GPU_REG_PA_SU_POLY_OFFSET_FRONT_SCALE].f32; } } - if (!edram_rov_used_) { + if (!edram_rov_used) { // Conversion based on the calculations in Call of Duty 4 and the values it // writes to the registers, and also on: // https://github.com/mesa3d/mesa/blob/54ad9b444c8e73da498211870e785239ad3ff1aa/src/gallium/drivers/radeonsi/si_state.c#L943 @@ -1529,13 +1550,11 @@ bool PipelineCache::GetCurrentStateDescription( description_out.fill_mode_wireframe = 1; } description_out.depth_clip = !regs.Get().clip_disable; - if (edram_rov_used_) { - description_out.rov_msaa = regs.Get().msaa_samples != - xenos::MsaaSamples::k1X; - } else { + bool depth_stencil_bound_and_used = false; + if (!edram_rov_used) { // Depth/stencil. No stencil, always passing depth test and no depth writing // means depth disabled. - if (render_targets[4].format != DXGI_FORMAT_UNKNOWN) { + if (bound_depth_and_color_render_target_bits & 1) { auto rb_depthcontrol = draw_util::GetDepthControlForCurrentEdramMode(regs); if (rb_depthcontrol.z_enable) { @@ -1586,8 +1605,9 @@ bool PipelineCache::GetCurrentStateDescription( // If not binding the DSV, ignore the format in the hash. if (description_out.depth_func != xenos::CompareFunction::kAlways || description_out.depth_write || description_out.stencil_enable) { - description_out.depth_format = - regs.Get().depth_format; + description_out.depth_format = xenos::DepthRenderTargetFormat( + bound_depth_and_color_render_target_formats[0]); + depth_stencil_bound_and_used = true; } } else { description_out.depth_func = xenos::CompareFunction::kAlways; @@ -1646,21 +1666,34 @@ bool PipelineCache::GetCurrentStateDescription( /* 15 */ PipelineBlendFactor::kInvBlendFactor, /* 16 */ PipelineBlendFactor::kSrcAlphaSat, }; + // While it's okay to specify fewer render targets in the pipeline state + // (even fewer than written by the shader) than actually bound to the + // command list (though this kind of truncation may only happen at the end - + // DXGI_FORMAT_UNKNOWN *requires* a null RTV descriptor to be bound), not + // doing that because sample counts of all render targets bound via + // OMSetRenderTargets, even those beyond NumRenderTargets, apparently must + // have their sample count matching the one set in the pipeline - however if + // we set NumRenderTargets to 0 and also disable depth / stencil, the sample + // count must be set to 1 - while the command list may still have + // multisampled render targets bound (happens in Halo 3 main menu). + // TODO(Triang3l): Investigate interaction of OMSetRenderTargets with + // non-null depth and DSVFormat DXGI_FORMAT_UNKNOWN in the same case. for (uint32_t i = 0; i < 4; ++i) { - if (render_targets[i].format == DXGI_FORMAT_UNKNOWN) { - break; + if (!(bound_depth_and_color_render_target_bits & + (uint32_t(1) << (1 + i)))) { + continue; } PipelineRenderTarget& rt = description_out.render_targets[i]; rt.used = 1; - uint32_t guest_rt_index = render_targets[i].guest_render_target; auto color_info = regs.Get( - reg::RB_COLOR_INFO::rt_register_indices[guest_rt_index]); - rt.format = - RenderTargetCache::GetBaseColorFormat(color_info.color_format); - rt.write_mask = (color_mask >> (guest_rt_index * 4)) & 0xF; + reg::RB_COLOR_INFO::rt_register_indices[i]); + rt.format = xenos::ColorRenderTargetFormat( + bound_depth_and_color_render_target_formats[1 + i]); + // TODO(Triang3l): Normalize unused bits of the color write mask. + rt.write_mask = (color_mask >> (i * 4)) & 0xF; if (rt.write_mask) { auto blendcontrol = regs.Get( - reg::RB_BLENDCONTROL::rt_register_indices[guest_rt_index]); + reg::RB_BLENDCONTROL::rt_register_indices[i]); rt.src_blend = kBlendFactorMap[uint32_t(blendcontrol.color_srcblend)]; rt.dest_blend = kBlendFactorMap[uint32_t(blendcontrol.color_destblend)]; rt.blend_op = blendcontrol.color_comb_fcn; @@ -1679,6 +1712,27 @@ bool PipelineCache::GetCurrentStateDescription( } } } + xenos::MsaaSamples host_msaa_samples = + regs.Get().msaa_samples; + if (edram_rov_used) { + if (host_msaa_samples == xenos::MsaaSamples::k2X) { + // 2 is not supported in ForcedSampleCount on Nvidia. + host_msaa_samples = xenos::MsaaSamples::k4X; + } + } else { + if (!(bound_depth_and_color_render_target_bits & ~uint32_t(1)) && + !depth_stencil_bound_and_used) { + // Direct3D 12 requires the sample count to be 1 when no color or depth / + // stencil render targets are bound. + // FIXME(Triang3l): Use ForcedSampleCount or some other fallback for + // sample counting when needed, though with 2x it will be as incorrect as + // with 1x / 4x anyway; or bind a dummy depth / stencil buffer if really + // needed. + host_msaa_samples = xenos::MsaaSamples::k1X; + } + // TODO(Triang3l): 4x MSAA fallback when 2x isn't supported. + } + description_out.host_msaa_samples = host_msaa_samples; return true; } @@ -1699,6 +1753,9 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( D3D12_GRAPHICS_PIPELINE_STATE_DESC state_desc; std::memset(&state_desc, 0, sizeof(state_desc)); + bool edram_rov_used = render_target_cache_.GetPath() == + RenderTargetCache::Path::kPixelShaderInterlock; + // Root signature. state_desc.pRootSignature = runtime_description.root_signature; @@ -1726,7 +1783,7 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( Shader::HostVertexShaderType host_vertex_shader_type = DxbcShaderTranslator::Modification( runtime_description.vertex_shader->modification()) - .host_vertex_shader_type; + .vertex.host_vertex_shader_type; if (host_vertex_shader_type == Shader::HostVertexShaderType::kVertex) { state_desc.VS.pShaderBytecode = runtime_description.vertex_shader->translated_binary().data(); @@ -1844,19 +1901,19 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( runtime_description.pixel_shader->translated_binary().data(); state_desc.PS.BytecodeLength = runtime_description.pixel_shader->translated_binary().size(); - } else if (edram_rov_used_) { + } else if (edram_rov_used) { state_desc.PS.pShaderBytecode = depth_only_pixel_shader_.data(); state_desc.PS.BytecodeLength = depth_only_pixel_shader_.size(); } else { if ((description.depth_func != xenos::CompareFunction::kAlways || description.depth_write) && description.depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { - switch (depth_float24_conversion_) { - case flags::DepthFloat24Conversion::kOnOutputTruncating: + switch (render_target_cache_.depth_float24_conversion()) { + case RenderTargetCache::DepthFloat24Conversion::kOnOutputTruncating: state_desc.PS.pShaderBytecode = float24_truncate_ps; state_desc.PS.BytecodeLength = sizeof(float24_truncate_ps); break; - case flags::DepthFloat24Conversion::kOnOutputRounding: + case RenderTargetCache::DepthFloat24Conversion::kOnOutputRounding: state_desc.PS.pShaderBytecode = float24_round_ps; state_desc.PS.BytecodeLength = sizeof(float24_round_ps); break; @@ -1867,7 +1924,6 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( } // Rasterizer state. - state_desc.SampleMask = UINT_MAX; state_desc.RasterizerState.FillMode = description.fill_mode_wireframe ? D3D12_FILL_MODE_WIREFRAME : D3D12_FILL_MODE_SOLID; @@ -1890,21 +1946,47 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( state_desc.RasterizerState.DepthBias = description.depth_bias; state_desc.RasterizerState.DepthBiasClamp = 0.0f; state_desc.RasterizerState.SlopeScaledDepthBias = - description.depth_bias_slope_scaled * float(resolution_scale_); + description.depth_bias_slope_scaled * + float(render_target_cache_.GetResolutionScale()); state_desc.RasterizerState.DepthClipEnable = description.depth_clip ? TRUE : FALSE; - if (edram_rov_used_) { + uint32_t msaa_sample_count = uint32_t(1) + << uint32_t(description.host_msaa_samples); + if (edram_rov_used) { // Only 1, 4, 8 and (not on all GPUs) 16 are allowed, using sample 0 as 0 // and 3 as 1 for 2x instead (not exactly the same sample positions, but // still top-left and bottom-right - however, this can be adjusted with // programmable sample positions). - state_desc.RasterizerState.ForcedSampleCount = description.rov_msaa ? 4 : 1; + assert_true(msaa_sample_count == 1 || msaa_sample_count == 4); + if (msaa_sample_count != 1 && msaa_sample_count != 4) { + return nullptr; + } + state_desc.RasterizerState.ForcedSampleCount = + uint32_t(1) << uint32_t(description.host_msaa_samples); } - // Sample description. - state_desc.SampleDesc.Count = 1; + // Sample mask and description. + state_desc.SampleMask = UINT_MAX; + // TODO(Triang3l): 4x MSAA fallback when 2x isn't supported without ROV. + if (edram_rov_used) { + state_desc.SampleDesc.Count = 1; + } else { + assert_true(msaa_sample_count <= 4); + if (msaa_sample_count > 4) { + return nullptr; + } + if (msaa_sample_count == 2 && !render_target_cache_.msaa_2x_supported()) { + // Using sample 0 as 0 and 3 as 1 for 2x instead (not exactly the same + // sample positions, but still top-left and bottom-right - however, this + // can be adjusted with programmable sample positions). + state_desc.SampleMask = 0b1001; + state_desc.SampleDesc.Count = 4; + } else { + state_desc.SampleDesc.Count = msaa_sample_count; + } + } - if (!edram_rov_used_) { + if (!edram_rov_used) { // Depth/stencil. if (description.depth_func != xenos::CompareFunction::kAlways || description.depth_write) { @@ -1952,8 +2034,8 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( } if (state_desc.DepthStencilState.DepthEnable || state_desc.DepthStencilState.StencilEnable) { - state_desc.DSVFormat = - RenderTargetCache::GetDepthDXGIFormat(description.depth_format); + state_desc.DSVFormat = D3D12RenderTargetCache::GetDepthDSVDXGIFormat( + description.depth_format); } // Render targets and blending. @@ -1971,14 +2053,17 @@ ID3D12PipelineState* PipelineCache::CreateD3D12Pipeline( D3D12_BLEND_OP_ADD, D3D12_BLEND_OP_SUBTRACT, D3D12_BLEND_OP_MIN, D3D12_BLEND_OP_MAX, D3D12_BLEND_OP_REV_SUBTRACT, }; - for (uint32_t i = 0; i < 4; ++i) { + for (uint32_t i = 0; i < xenos::kMaxColorRenderTargets; ++i) { const PipelineRenderTarget& rt = description.render_targets[i]; if (!rt.used) { - break; + // Null RTV descriptors can be used for slots with DXGI_FORMAT_UNKNOWN + // in the pipeline state. + state_desc.RTVFormats[i] = DXGI_FORMAT_UNKNOWN; + continue; } - ++state_desc.NumRenderTargets; + state_desc.NumRenderTargets = i + 1; state_desc.RTVFormats[i] = - RenderTargetCache::GetColorDXGIFormat(rt.format); + render_target_cache_.GetColorDrawDXGIFormat(rt.format); if (state_desc.RTVFormats[i] == DXGI_FORMAT_UNKNOWN) { assert_always(); return nullptr; diff --git a/src/xenia/gpu/d3d12/pipeline_cache.h b/src/xenia/gpu/d3d12/pipeline_cache.h index 67ba0a993..cd14bf5a0 100644 --- a/src/xenia/gpu/d3d12/pipeline_cache.h +++ b/src/xenia/gpu/d3d12/pipeline_cache.h @@ -25,8 +25,8 @@ #include "xenia/base/platform.h" #include "xenia/base/string_buffer.h" #include "xenia/base/threading.h" +#include "xenia/gpu/d3d12/d3d12_render_target_cache.h" #include "xenia/gpu/d3d12/d3d12_shader.h" -#include "xenia/gpu/d3d12/render_target_cache.h" #include "xenia/gpu/dxbc_shader_translator.h" #include "xenia/gpu/gpu_flags.h" #include "xenia/gpu/register_file.h" @@ -44,10 +44,9 @@ class PipelineCache { static constexpr size_t kLayoutUIDEmpty = 0; PipelineCache(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, bool bindless_resources_used, - bool edram_rov_used, - flags::DepthFloat24Conversion depth_float24_conversion, - uint32_t resolution_scale); + const RegisterFile& register_file, + const D3D12RenderTargetCache& render_target_cache, + bool bindless_resources_used); ~PipelineCache(); bool Initialize(); @@ -80,7 +79,8 @@ class PipelineCache { D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, - const RenderTargetCache::PipelineRenderTarget render_targets[5], + uint32_t bound_depth_and_color_render_target_bits, + const uint32_t* bound_depth_and_color_render_targets_formats, void** pipeline_handle_out, ID3D12RootSignature** root_signature_out); // Returns a pipeline with deferred creation by its handle. May return nullptr @@ -192,12 +192,12 @@ class PipelineCache { PipelineCullMode cull_mode : 2; // 9 uint32_t front_counter_clockwise : 1; // 10 uint32_t depth_clip : 1; // 11 - uint32_t rov_msaa : 1; // 12 - xenos::DepthRenderTargetFormat depth_format : 1; // 13 - xenos::CompareFunction depth_func : 3; // 16 - uint32_t depth_write : 1; // 17 - uint32_t stencil_enable : 1; // 18 - uint32_t stencil_read_mask : 8; // 26 + xenos::MsaaSamples host_msaa_samples : 2; // 13 + xenos::DepthRenderTargetFormat depth_format : 1; // 14 + xenos::CompareFunction depth_func : 3; // 17 + uint32_t depth_write : 1; // 18 + uint32_t stencil_enable : 1; // 19 + uint32_t stencil_read_mask : 8; // 27 uint32_t stencil_write_mask : 8; // 8 xenos::StencilOp stencil_front_fail_op : 3; // 11 @@ -209,9 +209,9 @@ class PipelineCache { xenos::StencilOp stencil_back_pass_op : 3; // 29 xenos::CompareFunction stencil_back_func : 3; // 32 - PipelineRenderTarget render_targets[4]; + PipelineRenderTarget render_targets[xenos::kMaxColorRenderTargets]; - static constexpr uint32_t kVersion = 0x20201219; + static constexpr uint32_t kVersion = 0x20210425; }); XEPACKEDSTRUCT(PipelineStoredDescription, { @@ -247,7 +247,8 @@ class PipelineCache { D3D12Shader::D3D12Translation* vertex_shader, D3D12Shader::D3D12Translation* pixel_shader, xenos::PrimitiveType primitive_type, xenos::IndexFormat index_format, - const RenderTargetCache::PipelineRenderTarget render_targets[5], + uint32_t bound_depth_and_color_render_target_bits, + const uint32_t* bound_depth_and_color_render_target_formats, PipelineRuntimeDescription& runtime_description_out); ID3D12PipelineState* CreateD3D12Pipeline( @@ -255,11 +256,8 @@ class PipelineCache { D3D12CommandProcessor& command_processor_; const RegisterFile& register_file_; + const D3D12RenderTargetCache& render_target_cache_; bool bindless_resources_used_; - bool edram_rov_used_; - // 20e4 depth conversion mode to use for non-ROV output. - flags::DepthFloat24Conversion depth_float24_conversion_; - uint32_t resolution_scale_; // Temporary storage for AnalyzeUcode calls on the processor thread. StringBuffer ucode_disasm_buffer_; diff --git a/src/xenia/gpu/d3d12/render_target_cache.cc b/src/xenia/gpu/d3d12/render_target_cache.cc deleted file mode 100644 index 989e20a64..000000000 --- a/src/xenia/gpu/d3d12/render_target_cache.cc +++ /dev/null @@ -1,2190 +0,0 @@ -/** - ****************************************************************************** - * Xenia : Xbox 360 Emulator Research Project * - ****************************************************************************** - * Copyright 2018 Ben Vanik. All rights reserved. * - * Released under the BSD license - see LICENSE in the root for more details. * - ****************************************************************************** - */ - -#include "xenia/gpu/d3d12/render_target_cache.h" - -#include -#include -#include - -#include "xenia/base/assert.h" -#include "xenia/base/cvar.h" -#include "xenia/base/logging.h" -#include "xenia/base/math.h" -#include "xenia/base/memory.h" -#include "xenia/base/profiling.h" -#include "xenia/base/string.h" -#include "xenia/gpu/d3d12/d3d12_command_processor.h" -#include "xenia/gpu/draw_util.h" -#include "xenia/gpu/gpu_flags.h" -#include "xenia/gpu/texture_info.h" -#include "xenia/gpu/texture_util.h" -#include "xenia/ui/d3d12/d3d12_util.h" - -DEFINE_bool(d3d12_16bit_rtv_full_range, true, - "Use full -32...32 range for RG16 and RGBA16 render targets " - "(at the expense of blending correctness) without ROV.", - "D3D12"); - -namespace xe { -namespace gpu { -namespace d3d12 { - -// Generated with `xb buildhlsl`. -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_color_7e3_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_unorm_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_color_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_color_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h" -#include "xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h" - -const RenderTargetCache::EdramLoadStoreModeInfo - RenderTargetCache::edram_load_store_mode_info_[size_t( - RenderTargetCache::EdramLoadStoreMode::kCount)] = { - {edram_load_color_32bpp_cs, sizeof(edram_load_color_32bpp_cs), - L"EDRAM Load 32bpp Color", edram_store_color_32bpp_cs, - sizeof(edram_store_color_32bpp_cs), L"EDRAM Store 32bpp Color"}, - {edram_load_color_64bpp_cs, sizeof(edram_load_color_64bpp_cs), - L"EDRAM Load 64bpp Color", edram_store_color_64bpp_cs, - sizeof(edram_store_color_64bpp_cs), L"EDRAM Store 64bpp Color"}, - {edram_load_color_7e3_cs, sizeof(edram_load_color_7e3_cs), - L"EDRAM Load 7e3 Color", edram_store_color_7e3_cs, - sizeof(edram_store_color_7e3_cs), L"EDRAM Store 7e3 Color"}, - {edram_load_depth_unorm_cs, sizeof(edram_load_depth_unorm_cs), - L"EDRAM Load UNorm Depth", edram_store_depth_unorm_cs, - sizeof(edram_store_depth_unorm_cs), L"EDRAM Store UNorm Depth"}, - {edram_load_depth_float_cs, sizeof(edram_load_depth_float_cs), - L"EDRAM Load Float Depth", edram_store_depth_float_cs, - sizeof(edram_store_depth_float_cs), L"EDRAM Store Float Depth"}, - {edram_load_depth_float24and32_cs, - sizeof(edram_load_depth_float24and32_cs), - L"EDRAM Load 24-bit & 32-bit Float Depth", - edram_store_depth_float24and32_cs, - sizeof(edram_store_depth_float24and32_cs), - L"EDRAM Store 24-bit & 32-bit Float Depth"}, -}; - -const std::pair - RenderTargetCache::resolve_copy_shaders_[size_t( - draw_util::ResolveCopyShaderIndex::kCount)] = { - {resolve_fast_32bpp_1x2xmsaa_cs, - sizeof(resolve_fast_32bpp_1x2xmsaa_cs)}, - {resolve_fast_32bpp_4xmsaa_cs, sizeof(resolve_fast_32bpp_4xmsaa_cs)}, - {resolve_fast_32bpp_2xres_cs, sizeof(resolve_fast_32bpp_2xres_cs)}, - {resolve_fast_64bpp_1x2xmsaa_cs, - sizeof(resolve_fast_64bpp_1x2xmsaa_cs)}, - {resolve_fast_64bpp_4xmsaa_cs, sizeof(resolve_fast_64bpp_4xmsaa_cs)}, - {resolve_fast_64bpp_2xres_cs, sizeof(resolve_fast_64bpp_2xres_cs)}, - {resolve_full_8bpp_cs, sizeof(resolve_full_8bpp_cs)}, - {resolve_full_8bpp_2xres_cs, sizeof(resolve_full_8bpp_2xres_cs)}, - {resolve_full_16bpp_cs, sizeof(resolve_full_16bpp_cs)}, - {resolve_full_16bpp_2xres_cs, sizeof(resolve_full_16bpp_2xres_cs)}, - {resolve_full_32bpp_cs, sizeof(resolve_full_32bpp_cs)}, - {resolve_full_32bpp_2xres_cs, sizeof(resolve_full_32bpp_2xres_cs)}, - {resolve_full_64bpp_cs, sizeof(resolve_full_64bpp_cs)}, - {resolve_full_64bpp_2xres_cs, sizeof(resolve_full_64bpp_2xres_cs)}, - {resolve_full_128bpp_cs, sizeof(resolve_full_128bpp_cs)}, - {resolve_full_128bpp_2xres_cs, sizeof(resolve_full_128bpp_2xres_cs)}, -}; - -RenderTargetCache::RenderTargetCache(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, - TraceWriter& trace_writer, - bool bindless_resources_used, - bool edram_rov_used) - : command_processor_(command_processor), - register_file_(register_file), - trace_writer_(trace_writer), - bindless_resources_used_(bindless_resources_used), - edram_rov_used_(edram_rov_used) {} - -RenderTargetCache::~RenderTargetCache() { Shutdown(); } - -bool RenderTargetCache::Initialize(const TextureCache& texture_cache) { - depth_float24_conversion_ = flags::GetDepthFloat24Conversion(); - - // EDRAM buffer size depends on this. - resolution_scale_2x_ = texture_cache.IsResolutionScale2X(); - assert_false(resolution_scale_2x_ && !edram_rov_used_); - - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - - uint32_t edram_buffer_size = GetEdramBufferSize(); - - // Create the buffer for reinterpreting EDRAM contents. - D3D12_RESOURCE_DESC edram_buffer_desc; - ui::d3d12::util::FillBufferResourceDesc( - edram_buffer_desc, edram_buffer_size, - D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS); - // The first operation will likely be drawing with ROV or a load without ROV. - edram_buffer_state_ = edram_rov_used_ - ? D3D12_RESOURCE_STATE_UNORDERED_ACCESS - : D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE; - // Request zeroed (though no guarantee) when not using ROV so the host 32-bit - // depth buffer will be initialized to deterministic values (because it's - // involved in comparison with converted 24-bit values - whether the 32-bit - // value is up to date is determined by whether it's equal to the 24-bit - // value in the main EDRAM buffer when converted to 24-bit). - if (FAILED(device->CreateCommittedResource( - &ui::d3d12::util::kHeapPropertiesDefault, - edram_rov_used_ ? provider.GetHeapFlagCreateNotZeroed() - : D3D12_HEAP_FLAG_NONE, - &edram_buffer_desc, edram_buffer_state_, nullptr, - IID_PPV_ARGS(&edram_buffer_)))) { - XELOGE("Failed to create the EDRAM buffer"); - Shutdown(); - return false; - } - edram_buffer_modified_ = false; - - // Create non-shader-visible descriptors of the EDRAM buffer for copying. - D3D12_DESCRIPTOR_HEAP_DESC edram_buffer_descriptor_heap_desc; - edram_buffer_descriptor_heap_desc.Type = - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV; - edram_buffer_descriptor_heap_desc.NumDescriptors = - uint32_t(EdramBufferDescriptorIndex::kCount); - edram_buffer_descriptor_heap_desc.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE; - edram_buffer_descriptor_heap_desc.NodeMask = 0; - if (FAILED(device->CreateDescriptorHeap( - &edram_buffer_descriptor_heap_desc, - IID_PPV_ARGS(&edram_buffer_descriptor_heap_)))) { - XELOGE("Failed to create the descriptor heap for EDRAM buffer views"); - Shutdown(); - return false; - } - edram_buffer_descriptor_heap_start_ = - edram_buffer_descriptor_heap_->GetCPUDescriptorHandleForHeapStart(); - ui::d3d12::util::CreateBufferRawSRV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kRawSRV)), - edram_buffer_, edram_buffer_size); - ui::d3d12::util::CreateBufferTypedSRV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32UintSRV)), - edram_buffer_, DXGI_FORMAT_R32_UINT, edram_buffer_size >> 2); - ui::d3d12::util::CreateBufferTypedSRV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32G32UintSRV)), - edram_buffer_, DXGI_FORMAT_R32G32_UINT, edram_buffer_size >> 3); - ui::d3d12::util::CreateBufferTypedSRV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32G32B32A32UintSRV)), - edram_buffer_, DXGI_FORMAT_R32G32B32A32_UINT, edram_buffer_size >> 4); - ui::d3d12::util::CreateBufferRawUAV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kRawUAV)), - edram_buffer_, edram_buffer_size); - ui::d3d12::util::CreateBufferTypedUAV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32UintUAV)), - edram_buffer_, DXGI_FORMAT_R32_UINT, edram_buffer_size >> 2); - ui::d3d12::util::CreateBufferTypedUAV( - device, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32G32B32A32UintUAV)), - edram_buffer_, DXGI_FORMAT_R32G32B32A32_UINT, edram_buffer_size >> 4); - - if (!edram_rov_used_) { - // Create the root signature for EDRAM buffer load/store. - D3D12_ROOT_PARAMETER load_store_root_parameters[3]; - // Parameter 0 is constants (changed for each render target binding). - load_store_root_parameters[0].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; - load_store_root_parameters[0].Constants.ShaderRegister = 0; - load_store_root_parameters[0].Constants.RegisterSpace = 0; - load_store_root_parameters[0].Constants.Num32BitValues = - sizeof(EdramLoadStoreRootConstants) / sizeof(uint32_t); - load_store_root_parameters[0].ShaderVisibility = - D3D12_SHADER_VISIBILITY_ALL; - // Parameter 1 is the destination. - D3D12_DESCRIPTOR_RANGE load_store_root_dest_range; - load_store_root_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; - load_store_root_dest_range.NumDescriptors = 1; - load_store_root_dest_range.BaseShaderRegister = 0; - load_store_root_dest_range.RegisterSpace = 0; - load_store_root_dest_range.OffsetInDescriptorsFromTableStart = 0; - load_store_root_parameters[1].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; - load_store_root_parameters[1].DescriptorTable.NumDescriptorRanges = 1; - load_store_root_parameters[1].DescriptorTable.pDescriptorRanges = - &load_store_root_dest_range; - load_store_root_parameters[1].ShaderVisibility = - D3D12_SHADER_VISIBILITY_ALL; - // Parameter 2 is the source. - D3D12_DESCRIPTOR_RANGE load_store_root_source_range; - load_store_root_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; - load_store_root_source_range.NumDescriptors = 1; - load_store_root_source_range.BaseShaderRegister = 0; - load_store_root_source_range.RegisterSpace = 0; - load_store_root_source_range.OffsetInDescriptorsFromTableStart = 0; - load_store_root_parameters[2].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; - load_store_root_parameters[2].DescriptorTable.NumDescriptorRanges = 1; - load_store_root_parameters[2].DescriptorTable.pDescriptorRanges = - &load_store_root_source_range; - load_store_root_parameters[2].ShaderVisibility = - D3D12_SHADER_VISIBILITY_ALL; - D3D12_ROOT_SIGNATURE_DESC load_store_root_desc; - load_store_root_desc.NumParameters = - UINT(xe::countof(load_store_root_parameters)); - load_store_root_desc.pParameters = load_store_root_parameters; - load_store_root_desc.NumStaticSamplers = 0; - load_store_root_desc.pStaticSamplers = nullptr; - load_store_root_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; - - edram_load_store_root_signature_ = - ui::d3d12::util::CreateRootSignature(provider, load_store_root_desc); - if (edram_load_store_root_signature_ == nullptr) { - XELOGE("Failed to create the EDRAM load/store root signature"); - Shutdown(); - return false; - } - - // Create the EDRAM load/store pipelines. - for (uint32_t i = 0; i < uint32_t(EdramLoadStoreMode::kCount); ++i) { - const EdramLoadStoreModeInfo& mode_info = edram_load_store_mode_info_[i]; - edram_load_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( - device, mode_info.load_shader, mode_info.load_shader_size, - edram_load_store_root_signature_); - edram_store_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( - device, mode_info.store_shader, mode_info.store_shader_size, - edram_load_store_root_signature_); - if (edram_load_pipelines_[i] == nullptr || - edram_store_pipelines_[i] == nullptr) { - XELOGE("Failed to create the EDRAM load/store pipelines for mode {}", - i); - Shutdown(); - return false; - } - edram_load_pipelines_[i]->SetName(mode_info.load_pipeline_name); - edram_store_pipelines_[i]->SetName(mode_info.store_pipeline_name); - } - } - - // Create the resolve root signatures and pipelines. - D3D12_ROOT_PARAMETER resolve_root_parameters[3]; - - // Copying root signature. - // Parameter 0 is constants. - resolve_root_parameters[0].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_32BIT_CONSTANTS; - resolve_root_parameters[0].Constants.ShaderRegister = 0; - resolve_root_parameters[0].Constants.RegisterSpace = 0; - // Binding all of the shared memory at 1x resolution, portions with scaled - // resolution. - resolve_root_parameters[0].Constants.Num32BitValues = - (resolution_scale_2x_ - ? sizeof(draw_util::ResolveCopyShaderConstants::DestRelative) - : sizeof(draw_util::ResolveCopyShaderConstants)) / - sizeof(uint32_t); - resolve_root_parameters[0].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; - // Parameter 1 is the destination (shared memory for copying, EDRAM for - // clearing). - D3D12_DESCRIPTOR_RANGE resolve_dest_range; - resolve_dest_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_UAV; - resolve_dest_range.NumDescriptors = 1; - resolve_dest_range.BaseShaderRegister = 0; - resolve_dest_range.RegisterSpace = 0; - resolve_dest_range.OffsetInDescriptorsFromTableStart = 0; - resolve_root_parameters[1].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; - resolve_root_parameters[1].DescriptorTable.NumDescriptorRanges = 1; - resolve_root_parameters[1].DescriptorTable.pDescriptorRanges = - &resolve_dest_range; - resolve_root_parameters[1].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; - // Parameter 2 is the source, if exists (EDRAM for copying). - D3D12_DESCRIPTOR_RANGE resolve_source_range; - resolve_source_range.RangeType = D3D12_DESCRIPTOR_RANGE_TYPE_SRV; - resolve_source_range.NumDescriptors = 1; - resolve_source_range.BaseShaderRegister = 0; - resolve_source_range.RegisterSpace = 0; - resolve_source_range.OffsetInDescriptorsFromTableStart = 0; - resolve_root_parameters[2].ParameterType = - D3D12_ROOT_PARAMETER_TYPE_DESCRIPTOR_TABLE; - resolve_root_parameters[2].DescriptorTable.NumDescriptorRanges = 1; - resolve_root_parameters[2].DescriptorTable.pDescriptorRanges = - &resolve_source_range; - resolve_root_parameters[2].ShaderVisibility = D3D12_SHADER_VISIBILITY_ALL; - D3D12_ROOT_SIGNATURE_DESC resolve_root_signature_desc; - resolve_root_signature_desc.NumParameters = 3; - resolve_root_signature_desc.pParameters = resolve_root_parameters; - resolve_root_signature_desc.NumStaticSamplers = 0; - resolve_root_signature_desc.pStaticSamplers = nullptr; - resolve_root_signature_desc.Flags = D3D12_ROOT_SIGNATURE_FLAG_NONE; - resolve_copy_root_signature_ = ui::d3d12::util::CreateRootSignature( - provider, resolve_root_signature_desc); - if (resolve_copy_root_signature_ == nullptr) { - XELOGE("Failed to create the resolve copy root signature"); - Shutdown(); - return false; - } - - // Clearing root signature. - resolve_root_parameters[0].Constants.Num32BitValues = - sizeof(draw_util::ResolveClearShaderConstants) / sizeof(uint32_t); - resolve_root_signature_desc.NumParameters = 2; - resolve_clear_root_signature_ = ui::d3d12::util::CreateRootSignature( - provider, resolve_root_signature_desc); - if (resolve_clear_root_signature_ == nullptr) { - XELOGE("Failed to create the resolve clear root signature"); - Shutdown(); - return false; - } - - // Copying pipelines. - uint32_t resolution_scale = resolution_scale_2x_ ? 2 : 1; - for (size_t i = 0; i < size_t(draw_util::ResolveCopyShaderIndex::kCount); - ++i) { - // Somewhat verification whether resolve_copy_shaders_ is up to date. - assert_not_null(resolve_copy_shaders_[i].first); - const draw_util::ResolveCopyShaderInfo& resolve_copy_shader_info = - draw_util::resolve_copy_shader_info[i]; - if (resolve_copy_shader_info.resolution_scale != resolution_scale) { - continue; - } - const auto& resolve_copy_shader = resolve_copy_shaders_[i]; - ID3D12PipelineState* resolve_copy_pipeline = - ui::d3d12::util::CreateComputePipeline( - device, resolve_copy_shader.first, resolve_copy_shader.second, - resolve_copy_root_signature_); - if (resolve_copy_pipeline == nullptr) { - XELOGE("Failed to create {} resolve copy pipeline", - resolve_copy_shader_info.debug_name); - } - resolve_copy_pipeline->SetName(reinterpret_cast( - xe::to_utf16(resolve_copy_shader_info.debug_name).c_str())); - resolve_copy_pipelines_[i] = resolve_copy_pipeline; - } - - // Clearing pipelines. - resolve_clear_32bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( - device, - resolution_scale_2x_ ? resolve_clear_32bpp_2xres_cs - : resolve_clear_32bpp_cs, - resolution_scale_2x_ ? sizeof(resolve_clear_32bpp_2xres_cs) - : sizeof(resolve_clear_32bpp_cs), - resolve_clear_root_signature_); - if (resolve_clear_32bpp_pipeline_ == nullptr) { - XELOGE("Failed to create the 32bpp resolve clear pipeline"); - Shutdown(); - return false; - } - resolve_clear_32bpp_pipeline_->SetName(L"Resolve Clear 32bpp"); - resolve_clear_64bpp_pipeline_ = ui::d3d12::util::CreateComputePipeline( - device, - resolution_scale_2x_ ? resolve_clear_64bpp_2xres_cs - : resolve_clear_64bpp_cs, - resolution_scale_2x_ ? sizeof(resolve_clear_64bpp_2xres_cs) - : sizeof(resolve_clear_64bpp_cs), - resolve_clear_root_signature_); - if (resolve_clear_64bpp_pipeline_ == nullptr) { - XELOGE("Failed to create the 64bpp resolve clear pipeline"); - Shutdown(); - return false; - } - resolve_clear_64bpp_pipeline_->SetName(L"Resolve Clear 64bpp"); - if (!edram_rov_used_ && - depth_float24_conversion_ == flags::DepthFloat24Conversion::kOnCopy) { - assert_false(resolution_scale_2x_); - resolve_clear_depth_24_32_pipeline_ = - ui::d3d12::util::CreateComputePipeline( - device, resolve_clear_depth_24_32_cs, - sizeof(resolve_clear_depth_24_32_cs), - resolve_clear_root_signature_); - if (resolve_clear_depth_24_32_pipeline_ == nullptr) { - XELOGE( - "Failed to create the 24-bit and 32-bit depth resolve clear pipeline " - "state"); - Shutdown(); - return false; - } - resolve_clear_depth_24_32_pipeline_->SetName( - L"Resolve Clear 24-bit & 32-bit Depth"); - } - - ClearBindings(); - - return true; -} - -void RenderTargetCache::Shutdown() { - ClearCache(); - - edram_snapshot_restore_pool_.reset(); - ui::d3d12::util::ReleaseAndNull(edram_snapshot_download_buffer_); - ui::d3d12::util::ReleaseAndNull(resolve_clear_depth_24_32_pipeline_); - ui::d3d12::util::ReleaseAndNull(resolve_clear_64bpp_pipeline_); - ui::d3d12::util::ReleaseAndNull(resolve_clear_32bpp_pipeline_); - ui::d3d12::util::ReleaseAndNull(resolve_clear_root_signature_); - for (size_t i = 0; i < xe::countof(resolve_copy_pipelines_); ++i) { - ui::d3d12::util::ReleaseAndNull(resolve_copy_pipelines_[i]); - } - ui::d3d12::util::ReleaseAndNull(resolve_copy_root_signature_); - for (uint32_t i = 0; i < uint32_t(EdramLoadStoreMode::kCount); ++i) { - ui::d3d12::util::ReleaseAndNull(edram_store_pipelines_[i]); - ui::d3d12::util::ReleaseAndNull(edram_load_pipelines_[i]); - } - ui::d3d12::util::ReleaseAndNull(edram_load_store_root_signature_); - ui::d3d12::util::ReleaseAndNull(edram_buffer_descriptor_heap_); - ui::d3d12::util::ReleaseAndNull(edram_buffer_); -} - -void RenderTargetCache::ClearCache() { - for (auto render_target_pair : render_targets_) { - RenderTarget* render_target = render_target_pair.second; - render_target->resource->Release(); - delete render_target; - } - render_targets_.clear(); - COUNT_profile_set("gpu/render_target_cache/render_targets", 0); - - while (descriptor_heaps_depth_ != nullptr) { - auto heap = descriptor_heaps_depth_; - heap->heap->Release(); - descriptor_heaps_depth_ = heap->previous; - delete heap; - } - while (descriptor_heaps_color_ != nullptr) { - auto heap = descriptor_heaps_color_; - heap->heap->Release(); - descriptor_heaps_color_ = heap->previous; - delete heap; - } - -#if 0 - for (uint32_t i = 0; i < xe::countof(heaps_); ++i) { - if (heaps_[i] != nullptr) { - heaps_[i]->Release(); - heaps_[i] = nullptr; - } - } -#endif - - edram_snapshot_restore_pool_.reset(); -} - -void RenderTargetCache::CompletedSubmissionUpdated() { - if (edram_snapshot_restore_pool_) { - edram_snapshot_restore_pool_->Reclaim( - command_processor_.GetCompletedSubmission()); - } -} - -void RenderTargetCache::BeginSubmission() { - // With the ROV, a submission does not always end in a resolve (for example, - // when memexport readback happens) or something else that would surely submit - // the UAV barrier, so we need to preserve the `current_` variables. - // - // With RTVs, simply going to a different command list doesn't have to cause - // storing the render targets to the EDRAM buffer, however, the new command - // list doesn't have the needed RTVs/DSV bound yet. - // - // Just make sure they are bound to the new command list. - apply_to_command_list_ = true; -} - -void RenderTargetCache::EndFrame() { - // May be clearing the cache after this. - FlushAndUnbindRenderTargets(); -} - -bool RenderTargetCache::UpdateRenderTargets( - uint32_t shader_writes_color_targets) { - // There are two kinds of render target binding updates in this implementation - // in case something has been changed - full and partial. - // - // For the RTV/DSV path, a full update involves flushing all the currently - // bound render targets that have been modified to the EDRAM buffer, - // allocating all the newly bound render targets in the heaps, loading them - // from the EDRAM buffer and binding them. - // - // For the ROV path, a full update places a UAV barrier because across draws, - // pixels with different SV_Positions or different sample counts (thus without - // interlocking between each other) may access the same data now. Not having - // the barriers causes visual glitches in many games, such as Halo 3 where the - // right side of the menu and shadow maps get corrupted (at least on Nvidia). - // - // ("Bound" here means ever used since the last full update - and in this case - // it's bound to the Direct3D 12 command list in the RTV/DSV path.) - // - // However, Banjo-Kazooie interleaves color/depth and depth-only writes every - // draw call, and doing a full update whenever the color mask is changed is - // too expensive. So, we shouldn't do a full update if the game only toggles - // color writes and depth testing. Instead, we're only adding or re-enabling - // render targets if color writes are being enabled (adding involves loading - // the contents from the EDRAM, while re-enabling does nothing on the D3D - // side). - // - // There are cases when simply toggling render targets may still require EDRAM - // stores and thus a full update. Here's an example situation: - // Draw 1: - // - 32bpp RT0 0-10 MB - // - 32bpp RT1 3-10 MB - // - 1280x720 viewport - // Draw 2: - // - 32bpp RT0 0-10 MB - // - Inactive RT1 - // - 1280x1440 viewport - // Draw 3: - // - 32bpp RT0 0-10 MB - // - 32bpp RT1 3-10 MB - // - 1280x720 viewport - // In this case, before draw 2, RT1 must be written to the EDRAM buffer, and - // RT0 must be loaded, and also before draw 3 RT1 must receive the changes - // made to the lower part of RT0. So, before draws 2 and 3, full updates must - // be done. - // - // Direct3D 12 also requires all render targets to have the same size, so the - // height is calculated from the EDRAM space available to the last render - // target available in it. However, to make toggling render targets like in - // the Banjo-Kazooie case possible, the height may be decreased only in full - // updates. - // TODO(Triang3l): Check if it's safe to calculate the smallest EDRAM region - // without aliasing and use it for the height. This won't work if games - // actually alias active render targets for some reason. - // - // To summarize, a full update happens if: - // - Starting a new frame. - // - Drawing after resolving. - // - Surface pitch changed. - // - Sample count changed. - // - Render target is disabled and another render target got more space than - // is currently available in the textures (RTV/DSV only). - // - EDRAM base of a currently used RT changed. - // - Format of a currently used RT changed (RTV/DSV) or pixel size of a - // currently used RT changed (ROV). - // - Current viewport contains unsaved data from previously used render - // targets. - // - New render target overlaps unsaved data from other bound render targets. - // - // "Previously used" and "new" in the last 2 conditions is important so if the - // game has render targets aliased in the same draw call, there won't be a - // full update every draw. - // - // A partial update happens if: - // - New render target is added, but doesn't overlap unsaved data from other - // currently or previously used render targets, and it doesn't require a - // bigger size. - - const auto& regs = register_file_; - -#if XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES - SCOPE_profile_cpu_f("gpu"); -#endif // XE_UI_D3D12_FINE_GRAINED_DRAW_SCOPES - - auto rb_surface_info = regs.Get(); - uint32_t surface_pitch = std::min(rb_surface_info.surface_pitch, 2560u); - if (surface_pitch == 0) { - // TODO(Triang3l): Do something if a memexport-only draw has 0 surface - // pitch (never seen in any game so far, not sure if even legal). - return false; - } - uint32_t msaa_samples_x = - rb_surface_info.msaa_samples >= xenos::MsaaSamples::k4X ? 2 : 1; - uint32_t msaa_samples_y = - rb_surface_info.msaa_samples >= xenos::MsaaSamples::k2X ? 2 : 1; - - // Extract color/depth info in a unified way. - bool enabled[5]; - uint32_t edram_bases[5]; - uint32_t formats[5]; - bool formats_are_64bpp[5]; - uint32_t color_mask = - command_processor_.GetCurrentColorMask(shader_writes_color_targets); - for (uint32_t i = 0; i < 4; ++i) { - enabled[i] = (color_mask & (0xF << (i * 4))) != 0; - auto color_info = regs.Get( - reg::RB_COLOR_INFO::rt_register_indices[i]); - edram_bases[i] = std::min(color_info.color_base, 2048u); - formats[i] = uint32_t(GetBaseColorFormat(color_info.color_format)); - formats_are_64bpp[i] = xenos::IsColorRenderTargetFormat64bpp( - xenos::ColorRenderTargetFormat(formats[i])); - } - auto rb_depthcontrol = draw_util::GetDepthControlForCurrentEdramMode(regs); - auto rb_depth_info = regs.Get(); - // 0x1 = stencil test, 0x2 = depth test. - enabled[4] = rb_depthcontrol.stencil_enable || rb_depthcontrol.z_enable; - edram_bases[4] = std::min(rb_depth_info.depth_base, 2048u); - formats[4] = uint32_t(rb_depth_info.depth_format); - formats_are_64bpp[4] = false; - // Don't mark depth regions as dirty if not writing the depth. - // TODO(Triang3l): Make a common function for checking if stencil writing is - // really done? - bool depth_readonly = - !rb_depthcontrol.stencil_enable && !rb_depthcontrol.z_write_enable; - - bool full_update = false; - - // Check the following full update conditions: - // - Starting a new frame. - // - Drawing after resolving. - // - Surface pitch changed. - // - Sample count changed. - // Draws are skipped if the surface pitch is 0, so a full update can be forced - // in the beginning of the frame or after resolves by setting the current - // pitch to 0. - if (current_surface_pitch_ != surface_pitch || - current_msaa_samples_ != rb_surface_info.msaa_samples) { - full_update = true; - } - - // Get the maximum height of each render target in EDRAM rows to help - // clamp the dirty region heights. - uint32_t edram_row_tiles_32bpp = (surface_pitch * msaa_samples_x + 79) / 80; - uint32_t edram_row_tiles[5]; - uint32_t edram_max_rows = UINT32_MAX; - for (uint32_t i = 0; i < 5; ++i) { - edram_row_tiles[i] = edram_row_tiles_32bpp * (formats_are_64bpp[i] ? 2 : 1); - if (enabled[i]) { - // Direct3D 12 doesn't allow render targets with different sizes, so - // calculate the height from the render target closest to the end of - // EDRAM. - edram_max_rows = std::min(edram_max_rows, - (2048 - edram_bases[i]) / edram_row_tiles[i]); - } - } - if (edram_max_rows == UINT32_MAX) { - // No render targets needed - likely a memexport-only draw, just keep using - // the current state (or 0 if nothing bound yet, but nothing will be bound - // anyway so it won't matter). - edram_max_rows = current_edram_max_rows_; - } else { - if (edram_max_rows == 0) { - // Some render target is totally in the end of EDRAM - can't create - // textures with 0 height. - return false; - } - } - // Don't create render targets larger than x2560. - edram_max_rows = std::min(edram_max_rows, 160u * msaa_samples_y); - // Check the following full update conditions: - // - Render target is disabled and another render target got more space than - // is currently available in the textures (RTV/DSV only). - if (!edram_rov_used_ && edram_max_rows > current_edram_max_rows_) { - full_update = true; - } - - // Get EDRAM usage of the current draw so dirty regions can be calculated. - // See D3D12CommandProcessor::UpdateFixedFunctionState for more info. - int32_t window_offset_y = - regs.Get().window_y_offset; - auto pa_cl_vte_cntl = regs.Get(); - float viewport_scale_y = pa_cl_vte_cntl.vport_y_scale_ena - ? regs[XE_GPU_REG_PA_CL_VPORT_YSCALE].f32 - : 1280.0f; - float viewport_offset_y = pa_cl_vte_cntl.vport_y_offset_ena - ? regs[XE_GPU_REG_PA_CL_VPORT_YOFFSET].f32 - : std::abs(viewport_scale_y); - if (regs.Get().vtx_window_offset_enable) { - viewport_offset_y += float(window_offset_y); - } - uint32_t viewport_bottom = uint32_t(std::max( - 0.0f, std::ceil(viewport_offset_y + std::abs(viewport_scale_y)))); - uint32_t scissor_bottom = regs.Get().br_y; - if (!regs.Get().window_offset_disable) { - scissor_bottom = std::max(int32_t(scissor_bottom) + window_offset_y, 0); - } - uint32_t dirty_bottom = - std::min(std::min(viewport_bottom, scissor_bottom), 2560u); - uint32_t edram_dirty_rows = - std::min((dirty_bottom * msaa_samples_y + 15) >> 4, edram_max_rows); - - // Check the following full update conditions: - // - EDRAM base of a currently used RT changed. - // - Format of a currently used RT changed (RTV/DSV) or pixel size of a - // currently used RT changed (ROV). - // Also build a list of render targets to attach in a partial update. - uint32_t render_targets_to_attach = 0; - if (!full_update) { - for (uint32_t i = 0; i < 5; ++i) { - if (!enabled[i]) { - continue; - } - const RenderTargetBinding& binding = current_bindings_[i]; - if (binding.is_bound) { - if (binding.edram_base != edram_bases[i]) { - full_update = true; - break; - } - if (edram_rov_used_) { - if (i != 4) { - full_update |= xenos::IsColorRenderTargetFormat64bpp( - binding.color_format) != formats_are_64bpp[i]; - } - } else { - full_update |= binding.format != formats[i]; - } - if (full_update) { - break; - } - } else { - render_targets_to_attach |= 1 << i; - } - } - } - - // Check the following full update conditions here: - // - Current viewport contains unsaved data from previously used render - // targets. - // - New render target overlaps unsaved data from other bound render - // targets. - if (!full_update) { - for (uint32_t i = 0; i < 5; ++i) { - const RenderTargetBinding& binding_1 = current_bindings_[i]; - uint32_t edram_dirty_rows_1; - if (binding_1.is_bound) { - if (enabled[i]) { - continue; - } - // Checking if now overlapping a previously used render target. - // binding_1 is the previously used render target. - edram_dirty_rows_1 = binding_1.edram_dirty_rows; - } else { - if (!(render_targets_to_attach & (1 << i))) { - continue; - } - // Checking if the new render target is overlapping any bound one. - // binding_1 is the new render target. - edram_dirty_rows_1 = edram_dirty_rows; - } - for (uint32_t j = 0; j < 5; ++j) { - const RenderTargetBinding& binding_2 = current_bindings_[j]; - if (!binding_2.is_bound) { - continue; - } - uint32_t edram_dirty_rows_2; - if (binding_1.is_bound) { - if (!enabled[j]) { - continue; - } - // Checking if now overlapping a previously used render target. - // binding_2 is a currently used render target. - edram_dirty_rows_2 = edram_dirty_rows; - } else { - // Checking if the new render target is overlapping any bound one. - // binding_2 is another bound render target. - edram_dirty_rows_2 = binding_2.edram_dirty_rows; - } - // Do a full update if there is overlap. - if (edram_bases[i] < - edram_bases[j] + edram_dirty_rows_2 * edram_row_tiles[j] && - edram_bases[j] < - edram_bases[i] + edram_dirty_rows_1 * edram_row_tiles[i]) { - full_update = true; - break; - } - } - if (full_update) { - break; - } - } - } - - bool sample_positions_set = false; - - // Need to change the bindings. - if (full_update || render_targets_to_attach) { -#if 0 - uint32_t heap_usage[5] = {}; -#endif - if (full_update) { - if (edram_rov_used_) { - // Place a UAV barrier because across draws, pixels with different - // SV_Positions or different sample counts (thus without interlocking - // between each other) may access the same data now. - CommitEdramBufferUAVWrites(false); - } else { - // Export the currently bound render targets before we ruin the - // bindings. - StoreRenderTargetsToEdram(); - } - - ClearBindings(); - current_surface_pitch_ = surface_pitch; - current_msaa_samples_ = rb_surface_info.msaa_samples; - if (!edram_rov_used_) { - current_edram_max_rows_ = edram_max_rows; - } - - // If updating fully, need to reattach all the render targets and allocate - // from scratch. - for (uint32_t i = 0; i < 5; ++i) { - if (enabled[i]) { - render_targets_to_attach |= 1 << i; - } - } - } else { -#if 0 - if (!edram_rov_used_) { - // If updating partially, only need to attach new render targets. - for (uint32_t i = 0; i < 5; ++i) { - const RenderTargetBinding& binding = current_bindings_[i]; - if (!binding.is_bound) { - continue; - } - const RenderTarget* render_target = binding.render_target; - if (render_target != nullptr) { - // There are no holes between 4 MB pages in each heap. - heap_usage[render_target->heap_page_first / kHeap4MBPages] += - render_target->heap_page_count; - } - } - } -#endif - } - XELOGGPU("RT Cache: {} update - pitch {}, samples {}, RTs to attach {}", - full_update ? "Full" : "Partial", surface_pitch, - rb_surface_info.msaa_samples, render_targets_to_attach); - -#if 0 - auto device = - command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); -#endif - - // Allocate new render targets and add them to the bindings list. - for (uint32_t i = 0; i < 5; ++i) { - if (!(render_targets_to_attach & (1 << i))) { - continue; - } - RenderTargetBinding& binding = current_bindings_[i]; - binding.is_bound = true; - binding.edram_base = edram_bases[i]; - binding.edram_dirty_rows = 0; - binding.format = formats[i]; - binding.render_target = nullptr; - - if (!edram_rov_used_) { - RenderTargetKey key; - key.width_ss_div_80 = edram_row_tiles_32bpp; - key.height_ss_div_16 = current_edram_max_rows_; - key.is_depth = i == 4 ? 1 : 0; - key.format = formats[i]; - - D3D12_RESOURCE_DESC resource_desc; - if (!GetResourceDesc(key, resource_desc)) { - // Invalid format. - continue; - } - -#if 0 - // Calculate the number of 4 MB pages of the heaps this RT will use. - D3D12_RESOURCE_ALLOCATION_INFO allocation_info = - device->GetResourceAllocationInfo(0, 1, &resource_desc); - if (allocation_info.SizeInBytes == 0 || - allocation_info.SizeInBytes > (kHeap4MBPages << 22)) { - assert_always(); - continue; - } - uint32_t heap_page_count = - (uint32_t(allocation_info.SizeInBytes) + ((4 << 20) - 1)) >> 22; - - // Find the heap page range for this render target. - uint32_t heap_page_first = UINT32_MAX; - for (uint32_t j = 0; j < 5; ++j) { - if (heap_usage[j] + heap_page_count <= kHeap4MBPages) { - heap_page_first = j * kHeap4MBPages + heap_usage[j]; - break; - } - } - if (heap_page_first == UINT32_MAX) { - assert_always(); - continue; - } - - // Get the render target. - binding.render_target = FindOrCreateRenderTarget(key, heap_page_first); - if (binding.render_target == nullptr) { - continue; - } - heap_usage[heap_page_first / kHeap4MBPages] += heap_page_count; - - // Inform Direct3D that we're reusing the heap for this render target. - command_processor_.PushAliasingBarrier(nullptr, - binding.render_target->resource); -#else - // If multiple render targets have the same format, assign different - // instance numbers to them. - uint32_t instance = 0; - if (i != 4) { - for (uint32_t j = 0; j < i; ++j) { - const RenderTargetBinding& other_binding = current_bindings_[j]; - if (other_binding.is_bound && - other_binding.render_target != nullptr && - other_binding.format == formats[i]) { - ++instance; - } - } - } - binding.render_target = FindOrCreateRenderTarget(key, instance); -#endif - } - } - - if (!edram_rov_used_) { - // Sample positions when loading depth must match sample positions when - // drawing. - command_processor_.SetSamplePositions(current_msaa_samples_); - sample_positions_set = true; - - // Load the contents of the new render targets from the EDRAM buffer (will - // change the state of the render targets to copy destination). - RenderTarget* load_render_targets[5]; - uint32_t load_edram_bases[5]; - uint32_t load_render_target_count = 0; - for (uint32_t i = 0; i < 5; ++i) { - if (!(render_targets_to_attach & (1 << i))) { - continue; - } - RenderTarget* render_target = current_bindings_[i].render_target; - if (render_target == nullptr) { - continue; - } - load_render_targets[load_render_target_count] = render_target; - load_edram_bases[load_render_target_count] = edram_bases[i]; - ++load_render_target_count; - } - if (load_render_target_count != 0) { - LoadRenderTargetsFromEdram(load_render_target_count, - load_render_targets, load_edram_bases); - } - - // Transition the render targets to the appropriate state if needed, - // compress the list of the render target because null RTV descriptors are - // broken in Direct3D 12 and update the list of the render targets to bind - // to the command list. - uint32_t rtv_count = 0; - for (uint32_t i = 0; i < 4; ++i) { - const RenderTargetBinding& binding = current_bindings_[i]; - if (!binding.is_bound) { - continue; - } - RenderTarget* render_target = binding.render_target; - if (render_target == nullptr) { - continue; - } - XELOGGPU("RT Color {}: base {}, format {}", i, edram_bases[i], - formats[i]); - command_processor_.PushTransitionBarrier( - render_target->resource, render_target->state, - D3D12_RESOURCE_STATE_RENDER_TARGET); - render_target->state = D3D12_RESOURCE_STATE_RENDER_TARGET; - current_pipeline_render_targets_[rtv_count].guest_render_target = i; - current_pipeline_render_targets_[rtv_count].format = - GetColorDXGIFormat(xenos::ColorRenderTargetFormat(formats[i])); - ++rtv_count; - } - for (uint32_t i = rtv_count; i < 4; ++i) { - current_pipeline_render_targets_[i].guest_render_target = i; - current_pipeline_render_targets_[i].format = DXGI_FORMAT_UNKNOWN; - } - const RenderTargetBinding& depth_binding = current_bindings_[4]; - RenderTarget* depth_render_target = depth_binding.render_target; - current_pipeline_render_targets_[4].guest_render_target = 4; - if (depth_binding.is_bound && depth_render_target != nullptr) { - XELOGGPU("RT Depth: base {}, format {}", edram_bases[4], formats[4]); - command_processor_.PushTransitionBarrier( - depth_render_target->resource, depth_render_target->state, - D3D12_RESOURCE_STATE_DEPTH_WRITE); - depth_render_target->state = D3D12_RESOURCE_STATE_DEPTH_WRITE; - current_pipeline_render_targets_[4].format = - GetDepthDXGIFormat(xenos::DepthRenderTargetFormat(formats[4])); - } else { - current_pipeline_render_targets_[4].format = DXGI_FORMAT_UNKNOWN; - } - command_processor_.SubmitBarriers(); - apply_to_command_list_ = true; - } - } - - // Bind the render targets to the command list, either in case of an update or - // if asked to externally. - if (!edram_rov_used_ && apply_to_command_list_) { - apply_to_command_list_ = false; - if (!sample_positions_set) { - command_processor_.SetSamplePositions(current_msaa_samples_); - } - D3D12_CPU_DESCRIPTOR_HANDLE rtv_handles[4]; - uint32_t rtv_count; - for (rtv_count = 0; rtv_count < 4; ++rtv_count) { - const PipelineRenderTarget& pipeline_render_target = - current_pipeline_render_targets_[rtv_count]; - if (pipeline_render_target.format == DXGI_FORMAT_UNKNOWN) { - break; - } - const RenderTargetBinding& binding = - current_bindings_[pipeline_render_target.guest_render_target]; - rtv_handles[rtv_count] = binding.render_target->handle; - } - const RenderTargetBinding& depth_binding = current_bindings_[4]; - const D3D12_CPU_DESCRIPTOR_HANDLE* dsv_handle = - current_pipeline_render_targets_[4].format != DXGI_FORMAT_UNKNOWN - ? &depth_binding.render_target->handle - : nullptr; - command_processor_.GetDeferredCommandList().D3DOMSetRenderTargets( - rtv_count, rtv_handles, FALSE, dsv_handle); - } - - // Update the dirty regions. - for (uint32_t i = 0; i < 5; ++i) { - if (!enabled[i] || (i == 4 && depth_readonly)) { - continue; - } - RenderTargetBinding& binding = current_bindings_[i]; - if (!edram_rov_used_ && binding.render_target == nullptr) { - // Nothing to store to the EDRAM buffer if there was an error. - continue; - } - binding.edram_dirty_rows = - std::max(binding.edram_dirty_rows, edram_dirty_rows); - } - - if (edram_rov_used_) { - // The buffer will be used for ROV drawing now. - TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - edram_buffer_modified_ = true; - } - - return true; -} - -bool RenderTargetCache::Resolve(const Memory& memory, - D3D12SharedMemory& shared_memory, - TextureCache& texture_cache, - uint32_t& written_address_out, - uint32_t& written_length_out) { - written_address_out = 0; - written_length_out = 0; - - uint32_t resolution_scale = resolution_scale_2x_ ? 2 : 1; - draw_util::ResolveInfo resolve_info; - if (!draw_util::GetResolveInfo( - register_file_, memory, trace_writer_, resolution_scale, - !edram_rov_used_ && !cvars::d3d12_16bit_rtv_full_range, - resolve_info)) { - return false; - } - - // Nothing to copy/clear. - if (!resolve_info.address.width_div_8 || !resolve_info.address.height_div_8) { - return true; - } - - if (!edram_rov_used_) { - // Save the currently bound render targets to the EDRAM buffer that will be - // used as the resolve source and clear bindings to allow render target - // resources to be reused as source textures for format conversion, - // resolving samples, to let format conversion bind other render targets, - // and so after a clear new data will be loaded. - StoreRenderTargetsToEdram(); - ClearBindings(); - } - - auto& command_list = command_processor_.GetDeferredCommandList(); - - // Copying. - bool copied = false; - if (resolve_info.copy_dest_length) { - draw_util::ResolveCopyShaderConstants copy_shader_constants; - uint32_t copy_group_count_x, copy_group_count_y; - draw_util::ResolveCopyShaderIndex copy_shader = - resolve_info.GetCopyShader(resolution_scale, copy_shader_constants, - copy_group_count_x, copy_group_count_y); - assert_true(copy_group_count_x && copy_group_count_y); - if (copy_shader != draw_util::ResolveCopyShaderIndex::kUnknown) { - const draw_util::ResolveCopyShaderInfo& copy_shader_info = - draw_util::resolve_copy_shader_info[size_t(copy_shader)]; - - // Make sure we have the memory to write to. - bool copy_dest_resident; - if (resolution_scale_2x_) { - copy_dest_resident = texture_cache.EnsureScaledResolveBufferResident( - resolve_info.copy_dest_base, resolve_info.copy_dest_length); - } else { - copy_dest_resident = shared_memory.RequestRange( - resolve_info.copy_dest_base, resolve_info.copy_dest_length); - } - if (copy_dest_resident) { - // Write the descriptors and transition the resources. - // Full shared memory without resolution scaling, range of the scaled - // resolve buffer with scaling because only 128 R32 elements can be - // addressed on Nvidia. - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_dest; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_source; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors[2]; - if (command_processor_.RequestOneUseSingleViewDescriptors( - bindless_resources_used_ ? (resolution_scale_2x_ ? 1 : 0) : 2, - descriptors)) { - if (bindless_resources_used_) { - if (resolution_scale_2x_) { - descriptor_dest = descriptors[0]; - } else { - descriptor_dest = - command_processor_ - .GetSharedMemoryUintPow2BindlessUAVHandlePair( - copy_shader_info.dest_bpe_log2); - } - if (copy_shader_info.source_is_raw) { - descriptor_source = - command_processor_.GetSystemBindlessViewHandlePair( - D3D12CommandProcessor::SystemBindlessView::kEdramRawSRV); - } else { - descriptor_source = - command_processor_.GetEdramUintPow2BindlessSRVHandlePair( - copy_shader_info.source_bpe_log2); - } - } else { - descriptor_dest = descriptors[0]; - if (!resolution_scale_2x_) { - shared_memory.WriteUintPow2UAVDescriptor( - descriptor_dest.first, copy_shader_info.dest_bpe_log2); - } - descriptor_source = descriptors[1]; - if (copy_shader_info.source_is_raw) { - WriteEdramRawSRVDescriptor(descriptor_source.first); - } else { - WriteEdramUintPow2SRVDescriptor(descriptor_source.first, - copy_shader_info.source_bpe_log2); - } - } - if (resolution_scale_2x_) { - texture_cache.CreateScaledResolveBufferUintPow2UAV( - descriptor_dest.first, resolve_info.copy_dest_base, - resolve_info.copy_dest_length, copy_shader_info.dest_bpe_log2); - texture_cache.UseScaledResolveBufferForWriting(); - } else { - shared_memory.UseForWriting(); - } - TransitionEdramBuffer(D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); - - // Submit the resolve. - command_list.D3DSetComputeRootSignature(resolve_copy_root_signature_); - command_list.D3DSetComputeRootDescriptorTable( - 2, descriptor_source.second); - command_list.D3DSetComputeRootDescriptorTable(1, - descriptor_dest.second); - if (resolution_scale_2x_) { - command_list.D3DSetComputeRoot32BitConstants( - 0, - sizeof(copy_shader_constants.dest_relative) / sizeof(uint32_t), - ©_shader_constants.dest_relative, 0); - } else { - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(copy_shader_constants) / sizeof(uint32_t), - ©_shader_constants, 0); - } - command_processor_.SetComputePipeline( - resolve_copy_pipelines_[size_t(copy_shader)]); - command_processor_.SubmitBarriers(); - command_list.D3DDispatch(copy_group_count_x, copy_group_count_y, 1); - - // Order the resolve with other work using the destination as a UAV. - if (resolution_scale_2x_) { - texture_cache.MarkScaledResolveBufferUAVWritesCommitNeeded(); - } else { - shared_memory.MarkUAVWritesCommitNeeded(); - } - - // Invalidate textures and mark the range as scaled if needed. - texture_cache.MarkRangeAsResolved(resolve_info.copy_dest_base, - resolve_info.copy_dest_length); - written_address_out = resolve_info.copy_dest_base; - written_length_out = resolve_info.copy_dest_length; - copied = true; - } - } else { - XELOGE("Failed to obtain the resolve destination memory region"); - } - } - } else { - copied = true; - } - - // Clearing. - bool cleared = false; - bool clear_depth = resolve_info.IsClearingDepth(); - bool clear_color = resolve_info.IsClearingColor(); - if (clear_depth || clear_color) { - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_edram; - bool descriptor_edram_obtained; - if (bindless_resources_used_) { - descriptor_edram = command_processor_.GetSystemBindlessViewHandlePair( - D3D12CommandProcessor::SystemBindlessView::kEdramR32G32B32A32UintUAV); - descriptor_edram_obtained = true; - } else { - descriptor_edram_obtained = - command_processor_.RequestOneUseSingleViewDescriptors( - 1, &descriptor_edram); - if (descriptor_edram_obtained) { - WriteEdramUintPow2UAVDescriptor(descriptor_edram.first, 4); - } - } - if (descriptor_edram_obtained) { - TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - // Should be safe to only commit once (if was UAV previously - if nothing - // to copy for some reason, for instance), overlap of the depth and the - // color ranges is highly unlikely. - CommitEdramBufferUAVWrites(false); - command_list.D3DSetComputeRootSignature(resolve_clear_root_signature_); - command_list.D3DSetComputeRootDescriptorTable(1, descriptor_edram.second); - std::pair clear_group_count = - resolve_info.GetClearShaderGroupCount(); - assert_true(clear_group_count.first && clear_group_count.second); - if (clear_depth) { - // Also clear the host 32-bit floating-point depth used for loaing and - // storing 24-bit floating-point depth at full precision. - bool clear_float32_depth = !edram_rov_used_ && - depth_float24_conversion_ == - flags::DepthFloat24Conversion::kOnCopy && - xenos::DepthRenderTargetFormat( - resolve_info.depth_edram_info.format) == - xenos::DepthRenderTargetFormat::kD24FS8; - draw_util::ResolveClearShaderConstants depth_clear_constants; - resolve_info.GetDepthClearShaderConstants(clear_float32_depth, - depth_clear_constants); - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(depth_clear_constants) / sizeof(uint32_t), - &depth_clear_constants, 0); - command_processor_.SetComputePipeline( - clear_float32_depth ? resolve_clear_depth_24_32_pipeline_ - : resolve_clear_32bpp_pipeline_); - command_processor_.SubmitBarriers(); - command_list.D3DDispatch(clear_group_count.first, - clear_group_count.second, 1); - } - if (clear_color) { - draw_util::ResolveClearShaderConstants color_clear_constants; - resolve_info.GetColorClearShaderConstants(color_clear_constants); - if (clear_depth) { - // Non-RT-specific constants have already been set. - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(color_clear_constants.rt_specific) / sizeof(uint32_t), - &color_clear_constants.rt_specific, - offsetof(draw_util::ResolveClearShaderConstants, rt_specific) / - sizeof(uint32_t)); - } else { - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(color_clear_constants) / sizeof(uint32_t), - &color_clear_constants, 0); - } - command_processor_.SetComputePipeline( - resolve_info.color_edram_info.format_is_64bpp - ? resolve_clear_64bpp_pipeline_ - : resolve_clear_32bpp_pipeline_); - command_processor_.SubmitBarriers(); - command_list.D3DDispatch(clear_group_count.first, - clear_group_count.second, 1); - } - assert_true(edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - edram_buffer_modified_ = true; - cleared = true; - } - } else { - cleared = true; - } - - return copied && cleared; -} - -void RenderTargetCache::FlushAndUnbindRenderTargets() { - if (edram_rov_used_) { - return; - } - StoreRenderTargetsToEdram(); - ClearBindings(); -} - -void RenderTargetCache::WriteEdramRawSRVDescriptor( - D3D12_CPU_DESCRIPTOR_HANDLE handle) { - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - device->CopyDescriptorsSimple( - 1, handle, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kRawSRV)), - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); -} - -void RenderTargetCache::WriteEdramRawUAVDescriptor( - D3D12_CPU_DESCRIPTOR_HANDLE handle) { - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - device->CopyDescriptorsSimple( - 1, handle, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kRawUAV)), - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); -} - -void RenderTargetCache::WriteEdramUintPow2SRVDescriptor( - D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { - EdramBufferDescriptorIndex descriptor_index; - switch (element_size_bytes_pow2) { - case 2: - descriptor_index = EdramBufferDescriptorIndex::kR32UintSRV; - break; - case 3: - descriptor_index = EdramBufferDescriptorIndex::kR32G32UintSRV; - break; - case 4: - descriptor_index = EdramBufferDescriptorIndex::kR32G32B32A32UintSRV; - break; - default: - assert_unhandled_case(element_size_bytes_pow2); - return; - } - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - device->CopyDescriptorsSimple( - 1, handle, - provider.OffsetViewDescriptor(edram_buffer_descriptor_heap_start_, - uint32_t(descriptor_index)), - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); -} - -void RenderTargetCache::WriteEdramUintPow2UAVDescriptor( - D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { - EdramBufferDescriptorIndex descriptor_index; - switch (element_size_bytes_pow2) { - case 2: - descriptor_index = EdramBufferDescriptorIndex::kR32UintUAV; - break; - // 3 is not needed currently. - case 4: - descriptor_index = EdramBufferDescriptorIndex::kR32G32B32A32UintUAV; - break; - default: - assert_unhandled_case(element_size_bytes_pow2); - return; - } - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - device->CopyDescriptorsSimple( - 1, handle, - provider.OffsetViewDescriptor(edram_buffer_descriptor_heap_start_, - uint32_t(descriptor_index)), - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); -} - -xenos::ColorRenderTargetFormat RenderTargetCache::GetBaseColorFormat( - xenos::ColorRenderTargetFormat format) { - switch (format) { - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: - return xenos::ColorRenderTargetFormat::k_8_8_8_8; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: - return xenos::ColorRenderTargetFormat::k_2_10_10_10; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: - return xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT; - default: - return format; - } -} - -DXGI_FORMAT RenderTargetCache::GetColorDXGIFormat( - xenos::ColorRenderTargetFormat format) { - switch (format) { - case xenos::ColorRenderTargetFormat::k_8_8_8_8: - case xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA: - return DXGI_FORMAT_R8G8B8A8_UNORM; - case xenos::ColorRenderTargetFormat::k_2_10_10_10: - case xenos::ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: - return DXGI_FORMAT_R10G10B10A2_UNORM; - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT: - case xenos::ColorRenderTargetFormat::k_16_16_16_16_FLOAT: - case xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: - return DXGI_FORMAT_R16G16B16A16_FLOAT; - case xenos::ColorRenderTargetFormat::k_16_16: - return DXGI_FORMAT_R16G16_SNORM; - case xenos::ColorRenderTargetFormat::k_16_16_16_16: - return DXGI_FORMAT_R16G16B16A16_SNORM; - case xenos::ColorRenderTargetFormat::k_16_16_FLOAT: - return DXGI_FORMAT_R16G16_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_FLOAT: - return DXGI_FORMAT_R32_FLOAT; - case xenos::ColorRenderTargetFormat::k_32_32_FLOAT: - return DXGI_FORMAT_R32G32_FLOAT; - default: - break; - } - return DXGI_FORMAT_UNKNOWN; -} - -bool RenderTargetCache::InitializeTraceSubmitDownloads() { - if (resolution_scale_2x_) { - // No 1:1 mapping. - return false; - } - if (!edram_snapshot_download_buffer_) { - D3D12_RESOURCE_DESC edram_snapshot_download_buffer_desc; - ui::d3d12::util::FillBufferResourceDesc(edram_snapshot_download_buffer_desc, - xenos::kEdramSizeBytes, - D3D12_RESOURCE_FLAG_NONE); - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - if (FAILED(device->CreateCommittedResource( - &ui::d3d12::util::kHeapPropertiesReadback, - provider.GetHeapFlagCreateNotZeroed(), - &edram_snapshot_download_buffer_desc, - D3D12_RESOURCE_STATE_COPY_DEST, nullptr, - IID_PPV_ARGS(&edram_snapshot_download_buffer_)))) { - XELOGE("Failed to create a EDRAM snapshot download buffer"); - return false; - } - } - auto& command_list = command_processor_.GetDeferredCommandList(); - TransitionEdramBuffer(D3D12_RESOURCE_STATE_COPY_SOURCE); - command_processor_.SubmitBarriers(); - command_list.D3DCopyBufferRegion(edram_snapshot_download_buffer_, 0, - edram_buffer_, 0, xenos::kEdramSizeBytes); - return true; -} - -void RenderTargetCache::InitializeTraceCompleteDownloads() { - if (!edram_snapshot_download_buffer_) { - return; - } - void* download_mapping; - if (SUCCEEDED(edram_snapshot_download_buffer_->Map(0, nullptr, - &download_mapping))) { - trace_writer_.WriteEdramSnapshot(download_mapping); - D3D12_RANGE download_write_range = {}; - edram_snapshot_download_buffer_->Unmap(0, &download_write_range); - } else { - XELOGE("Failed to map the EDRAM snapshot download buffer"); - } - edram_snapshot_download_buffer_->Release(); - edram_snapshot_download_buffer_ = nullptr; -} - -void RenderTargetCache::RestoreEdramSnapshot(const void* snapshot) { - if (resolution_scale_2x_) { - // No 1:1 mapping. - return; - } - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - if (!edram_snapshot_restore_pool_) { - edram_snapshot_restore_pool_ = - std::make_unique( - provider, xenos::kEdramSizeBytes); - } - ID3D12Resource* upload_buffer; - size_t upload_buffer_offset; - void* upload_buffer_mapping = edram_snapshot_restore_pool_->Request( - command_processor_.GetCurrentSubmission(), xenos::kEdramSizeBytes, 1, - &upload_buffer, &upload_buffer_offset, nullptr); - if (!upload_buffer_mapping) { - XELOGE("Failed to get a buffer for restoring a EDRAM snapshot"); - return; - } - std::memcpy(upload_buffer_mapping, snapshot, xenos::kEdramSizeBytes); - auto& command_list = command_processor_.GetDeferredCommandList(); - TransitionEdramBuffer(D3D12_RESOURCE_STATE_COPY_DEST); - command_processor_.SubmitBarriers(); - command_list.D3DCopyBufferRegion(edram_buffer_, 0, upload_buffer, - UINT64(upload_buffer_offset), - xenos::kEdramSizeBytes); - if (!edram_rov_used_) { - // Clear and ignore the old 32-bit float depth - the non-ROV path is - // inaccurate anyway, and this is backend-specific, not a part of a guest - // trace. - bool edram_shader_visible_r32_uav_obtained; - ui::d3d12::util::DescriptorCPUGPUHandlePair edram_shader_visible_r32_uav; - if (bindless_resources_used_) { - edram_shader_visible_r32_uav_obtained = true; - edram_shader_visible_r32_uav = - command_processor_.GetSystemBindlessViewHandlePair( - D3D12CommandProcessor::SystemBindlessView::kEdramR32UintUAV); - } else { - edram_shader_visible_r32_uav_obtained = - command_processor_.RequestOneUseSingleViewDescriptors( - 1, &edram_shader_visible_r32_uav); - if (edram_shader_visible_r32_uav_obtained) { - WriteEdramUintPow2UAVDescriptor(edram_shader_visible_r32_uav.first, 2); - } - } - if (edram_shader_visible_r32_uav_obtained) { - UINT clear_value[4] = {0, 0, 0, 0}; - D3D12_RECT clear_rect; - clear_rect.left = xenos::kEdramSizeBytes >> 2; - clear_rect.top = 0; - clear_rect.right = (xenos::kEdramSizeBytes >> 2) << 1; - clear_rect.bottom = 1; - TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - command_processor_.SubmitBarriers(); - // ClearUnorderedAccessView takes a shader-visible GPU descriptor and a - // non-shader-visible CPU descriptor. - command_list.D3DClearUnorderedAccessViewUint( - edram_shader_visible_r32_uav.second, - provider.OffsetViewDescriptor( - edram_buffer_descriptor_heap_start_, - uint32_t(EdramBufferDescriptorIndex::kR32UintUAV)), - edram_buffer_, clear_value, 1, &clear_rect); - } - } -} - -uint32_t RenderTargetCache::GetEdramBufferSize() const { - uint32_t size = xenos::kEdramSizeBytes; - if (!edram_rov_used_ && - depth_float24_conversion_ == flags::DepthFloat24Conversion::kOnCopy) { - // Two 10 MB pages, one containing color and integer depth data, another - // with 32-bit float depth when 20e4 depth is used to allow for multipass - // drawing without precision loss in case of EDRAM store/load. - size *= 2; - } - if (resolution_scale_2x_) { - size *= 4; - } - return size; -} - -void RenderTargetCache::TransitionEdramBuffer(D3D12_RESOURCE_STATES new_state) { - command_processor_.PushTransitionBarrier(edram_buffer_, edram_buffer_state_, - new_state); - edram_buffer_state_ = new_state; - if (new_state != D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { - edram_buffer_modified_ = false; - } -} - -void RenderTargetCache::CommitEdramBufferUAVWrites(bool force) { - if ((edram_buffer_modified_ || force) && - edram_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { - command_processor_.PushUAVBarrier(edram_buffer_); - } - edram_buffer_modified_ = false; -} - -void RenderTargetCache::ClearBindings() { - current_surface_pitch_ = 0; - current_msaa_samples_ = xenos::MsaaSamples::k1X; - current_edram_max_rows_ = 0; - std::memset(current_bindings_, 0, sizeof(current_bindings_)); - apply_to_command_list_ = true; -} - -#if 0 -bool RenderTargetCache::MakeHeapResident(uint32_t heap_index) { - if (heap_index >= 5) { - assert_always(); - return false; - } - if (heaps_[heap_index] != nullptr) { - return true; - } - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - D3D12_HEAP_DESC heap_desc = {}; - heap_desc.SizeInBytes = kHeap4MBPages << 22; - heap_desc.Properties.Type = D3D12_HEAP_TYPE_DEFAULT; - // TODO(Triang3l): If real MSAA is added, alignment must be 4 MB. - heap_desc.Alignment = 0; - heap_desc.Flags = D3D12_HEAP_FLAG_ALLOW_ONLY_RT_DS_TEXTURES | - provider.GetHeapFlagCreateNotZeroed(); - if (FAILED( - device->CreateHeap(&heap_desc, IID_PPV_ARGS(&heaps_[heap_index])))) { - XELOGE("Failed to create a {} MB heap for render targets", - kHeap4MBPages * 4); - return false; - } - return true; -} -#endif - -bool RenderTargetCache::EnsureRTVHeapAvailable(bool is_depth) { - auto& heap = is_depth ? descriptor_heaps_depth_ : descriptor_heaps_color_; - if (heap != nullptr && - heap->descriptors_used < kRenderTargetDescriptorHeapSize) { - return true; - } - auto device = - command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); - D3D12_DESCRIPTOR_HEAP_DESC heap_desc; - heap_desc.Type = is_depth ? D3D12_DESCRIPTOR_HEAP_TYPE_DSV - : D3D12_DESCRIPTOR_HEAP_TYPE_RTV; - heap_desc.NumDescriptors = kRenderTargetDescriptorHeapSize; - heap_desc.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE; - heap_desc.NodeMask = 0; - ID3D12DescriptorHeap* new_d3d_heap; - if (FAILED(device->CreateDescriptorHeap(&heap_desc, - IID_PPV_ARGS(&new_d3d_heap)))) { - XELOGE("Failed to create a heap for {} {} buffer descriptors", - kRenderTargetDescriptorHeapSize, is_depth ? "depth" : "color"); - return false; - } - RenderTargetDescriptorHeap* new_heap = new RenderTargetDescriptorHeap; - new_heap->heap = new_d3d_heap; - new_heap->start_handle = new_d3d_heap->GetCPUDescriptorHandleForHeapStart(); - new_heap->descriptors_used = 0; - new_heap->previous = heap; - heap = new_heap; - return true; -} - -bool RenderTargetCache::GetResourceDesc(RenderTargetKey key, - D3D12_RESOURCE_DESC& desc) { - if (key.width_ss_div_80 == 0 || key.height_ss_div_16 == 0) { - return false; - } - DXGI_FORMAT dxgi_format = - key.is_depth - ? GetDepthDXGIFormat(xenos::DepthRenderTargetFormat(key.format)) - : GetColorDXGIFormat(xenos::ColorRenderTargetFormat(key.format)); - if (dxgi_format == DXGI_FORMAT_UNKNOWN) { - return false; - } - desc.Dimension = D3D12_RESOURCE_DIMENSION_TEXTURE2D; - // TODO(Triang3l): If real MSAA is added, alignment must be 4 MB. - desc.Alignment = 0; - desc.Width = key.width_ss_div_80 * 80; - desc.Height = key.height_ss_div_16 * 16; - desc.DepthOrArraySize = 1; - desc.MipLevels = 1; - desc.Format = dxgi_format; - desc.SampleDesc.Count = 1; - desc.SampleDesc.Quality = 0; - desc.Layout = D3D12_TEXTURE_LAYOUT_UNKNOWN; - desc.Flags = key.is_depth ? D3D12_RESOURCE_FLAG_ALLOW_DEPTH_STENCIL - : D3D12_RESOURCE_FLAG_ALLOW_RENDER_TARGET; - return true; -} - -RenderTargetCache::RenderTarget* RenderTargetCache::FindOrCreateRenderTarget( -#if 0 - RenderTargetKey key, uint32_t heap_page_first -#else - RenderTargetKey key, uint32_t instance -#endif -) { -#if 0 - assert_true(heap_page_first < kHeap4MBPages * 5); -#endif - - // Try to find an existing render target. - auto found_range = render_targets_.equal_range(key.value); - for (auto iter = found_range.first; iter != found_range.second; ++iter) { - RenderTarget* found_render_target = iter->second; -#if 0 - if (found_render_target->heap_page_first == heap_page_first) { - return found_render_target; - } -#else - if (found_render_target->instance == instance) { - return found_render_target; - } -#endif - } - - D3D12_RESOURCE_DESC resource_desc; - if (!GetResourceDesc(key, resource_desc)) { - return nullptr; - } - - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); - -#if 0 - // Get the number of heap pages needed for the render target. - D3D12_RESOURCE_ALLOCATION_INFO allocation_info = - device->GetResourceAllocationInfo(0, 1, &resource_desc); - uint32_t heap_page_count = - (uint32_t(allocation_info.SizeInBytes) + ((4 << 20) - 1)) >> 22; - if (heap_page_count == 0 || - (heap_page_first % kHeap4MBPages) + heap_page_count > kHeap4MBPages) { - assert_always(); - return nullptr; - } -#endif - - // Ensure we can create a new descriptor in the render target heap. - if (!EnsureRTVHeapAvailable(key.is_depth)) { - return nullptr; - } - -#if 0 - // Create the memory heap if it doesn't exist yet. - uint32_t heap_index = heap_page_first / kHeap4MBPages; - if (!MakeHeapResident(heap_index)) { - return nullptr; - } -#endif - - // The first action likely to be done is EDRAM buffer load. - D3D12_RESOURCE_STATES state = D3D12_RESOURCE_STATE_COPY_DEST; - ID3D12Resource* resource; -#if 0 - if (FAILED(device->CreatePlacedResource( - heaps_[heap_index], (heap_page_first % kHeap4MBPages) << 22, - &resource_desc, state, nullptr, IID_PPV_ARGS(&resource)))) { - XELOGE( - "Failed to create a placed resource for {}x{} {} render target with " - "format {} at heap 4 MB pages {}:{}", - uint32_t(resource_desc.Width), resource_desc.Height, - key.is_depth ? "depth" : "color", key.format, heap_page_first, - heap_page_first + heap_page_count - 1); - return nullptr; - } -#else - if (FAILED(device->CreateCommittedResource( - &ui::d3d12::util::kHeapPropertiesDefault, - provider.GetHeapFlagCreateNotZeroed(), &resource_desc, state, nullptr, - IID_PPV_ARGS(&resource)))) { - XELOGE( - "Failed to create a committed resource for {}x{} {} render target with " - "format {}", - uint32_t(resource_desc.Width), resource_desc.Height, - key.is_depth ? "depth" : "color", key.format); - return nullptr; - } -#endif - - // Create the descriptor for the render target. - D3D12_CPU_DESCRIPTOR_HANDLE descriptor_handle; - if (key.is_depth) { - descriptor_handle = - provider.OffsetDSVDescriptor(descriptor_heaps_depth_->start_handle, - descriptor_heaps_depth_->descriptors_used); - D3D12_DEPTH_STENCIL_VIEW_DESC dsv_desc; - dsv_desc.Format = resource_desc.Format; - dsv_desc.ViewDimension = D3D12_DSV_DIMENSION_TEXTURE2D; - dsv_desc.Flags = D3D12_DSV_FLAG_NONE; - dsv_desc.Texture2D.MipSlice = 0; - device->CreateDepthStencilView(resource, &dsv_desc, descriptor_handle); - ++descriptor_heaps_depth_->descriptors_used; - } else { - descriptor_handle = - provider.OffsetRTVDescriptor(descriptor_heaps_color_->start_handle, - descriptor_heaps_color_->descriptors_used); - D3D12_RENDER_TARGET_VIEW_DESC rtv_desc; - rtv_desc.Format = resource_desc.Format; - rtv_desc.ViewDimension = D3D12_RTV_DIMENSION_TEXTURE2D; - rtv_desc.Texture2D.MipSlice = 0; - rtv_desc.Texture2D.PlaneSlice = 0; - device->CreateRenderTargetView(resource, &rtv_desc, descriptor_handle); - ++descriptor_heaps_color_->descriptors_used; - } - - // Get the layout for copying to the EDRAM buffer. - RenderTarget* render_target = new RenderTarget; - render_target->resource = resource; - render_target->state = state; - render_target->handle = descriptor_handle; - render_target->key = key; -#if 0 - render_target->heap_page_first = heap_page_first; - render_target->heap_page_count = heap_page_count; -#else - render_target->instance = instance; -#endif - UINT64 copy_buffer_size; - device->GetCopyableFootprints(&resource_desc, 0, key.is_depth ? 2 : 1, 0, - render_target->footprints, nullptr, nullptr, - ©_buffer_size); - render_target->copy_buffer_size = uint32_t(copy_buffer_size); - render_targets_.emplace(key.value, render_target); - COUNT_profile_set("gpu/render_target_cache/render_targets", - render_targets_.size()); -#if 0 - XELOGGPU( - "Created {}x{} {} render target with format {} at heap 4 MB pages {}:{}", - uint32_t(resource_desc.Width), resource_desc.Height, - key.is_depth ? "depth" : "color", key.format, heap_page_first, - heap_page_first + heap_page_count - 1); -#else - XELOGGPU("Created {}x{} {} render target with format {}", - uint32_t(resource_desc.Width), resource_desc.Height, - key.is_depth ? "depth" : "color", key.format); -#endif - return render_target; -} - -RenderTargetCache::EdramLoadStoreMode RenderTargetCache::GetLoadStoreMode( - bool is_depth, uint32_t format) const { - if (is_depth) { - if (xenos::DepthRenderTargetFormat(format) == - xenos::DepthRenderTargetFormat::kD24FS8) { - return depth_float24_conversion_ == flags::DepthFloat24Conversion::kOnCopy - ? EdramLoadStoreMode::kDepthFloat24And32 - : EdramLoadStoreMode::kDepthFloat; - } - return EdramLoadStoreMode::kDepthUnorm; - } - xenos::ColorRenderTargetFormat color_format = - xenos::ColorRenderTargetFormat(format); - if (color_format == xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT || - color_format == - xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16) { - return EdramLoadStoreMode::kColor7e3; - } - return xenos::IsColorRenderTargetFormat64bpp(color_format) - ? EdramLoadStoreMode::kColor64bpp - : EdramLoadStoreMode::kColor32bpp; -} - -void RenderTargetCache::StoreRenderTargetsToEdram() { - if (edram_rov_used_) { - return; - } - - auto& command_list = command_processor_.GetDeferredCommandList(); - - // Extract only the render targets that need to be stored, transition them to - // copy sources and calculate copy buffer size. - uint32_t store_bindings[5]; - uint32_t store_binding_count = 0; - uint32_t copy_buffer_size = 0; - for (uint32_t i = 0; i < 5; ++i) { - const RenderTargetBinding& binding = current_bindings_[i]; - RenderTarget* render_target = binding.render_target; - if (!binding.is_bound || render_target == nullptr || - binding.edram_dirty_rows < 0) { - continue; - } - store_bindings[store_binding_count++] = i; - copy_buffer_size = - std::max(copy_buffer_size, render_target->copy_buffer_size); - } - if (store_binding_count == 0) { - return; - } - - // Allocate descriptors for the buffers. - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_edram; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_source; - if (bindless_resources_used_) { - if (!command_processor_.RequestOneUseSingleViewDescriptors( - 1, &descriptor_source)) { - return; - } - descriptor_edram = command_processor_.GetSystemBindlessViewHandlePair( - D3D12CommandProcessor::SystemBindlessView::kEdramRawUAV); - } else { - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors[2]; - if (!command_processor_.RequestOneUseSingleViewDescriptors(2, - descriptors)) { - return; - } - descriptor_edram = descriptors[0]; - WriteEdramRawUAVDescriptor(descriptor_edram.first); - descriptor_source = descriptors[1]; - } - - // Get the buffer for copying. - D3D12_RESOURCE_STATES copy_buffer_state = D3D12_RESOURCE_STATE_COPY_DEST; - ID3D12Resource* copy_buffer = command_processor_.RequestScratchGPUBuffer( - copy_buffer_size, copy_buffer_state); - if (copy_buffer == nullptr) { - return; - } - - // Transition the render targets that need to be stored to copy sources and - // the EDRAM buffer to a UAV. - for (uint32_t i = 0; i < store_binding_count; ++i) { - RenderTarget* render_target = - current_bindings_[store_bindings[i]].render_target; - command_processor_.PushTransitionBarrier(render_target->resource, - render_target->state, - D3D12_RESOURCE_STATE_COPY_SOURCE); - render_target->state = D3D12_RESOURCE_STATE_COPY_SOURCE; - } - TransitionEdramBuffer(D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - - // Set up the bindings. - auto device = - command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); - command_list.D3DSetComputeRootSignature(edram_load_store_root_signature_); - ui::d3d12::util::CreateBufferRawSRV(device, descriptor_source.first, - copy_buffer, copy_buffer_size); - command_list.D3DSetComputeRootDescriptorTable(2, descriptor_source.second); - command_list.D3DSetComputeRootDescriptorTable(1, descriptor_edram.second); - - // Sort the bindings in ascending order of EDRAM base so data in the render - // targets placed farther in EDRAM isn't lost in case of overlap. - std::sort(store_bindings, store_bindings + store_binding_count, - [this](uint32_t a, uint32_t b) { - uint32_t base_a = current_bindings_[a].edram_base; - uint32_t base_b = current_bindings_[b].edram_base; - if (base_a == base_b) { - // If EDRAM bases are the same (not really a valid usage, but - // happens in Banjo-Tooie - in case color writing was enabled - // for invalid render targets in some draw call), treat the - // render targets with the lowest index as more important (it's - // the primary one after all, while the rest are additional). - // Depth buffer has lower priority, otherwise the Xbox Live - // Arcade logo disappears. - return a > b; - } - return base_a < base_b; - }); - - // Calculate the dispatch width. - uint32_t surface_pitch_ss = - current_surface_pitch_ * - (current_msaa_samples_ >= xenos::MsaaSamples::k4X ? 2 : 1); - uint32_t surface_pitch_tiles = (surface_pitch_ss + 79) / 80; - assert_true(surface_pitch_tiles != 0); - - // Store each render target. - for (uint32_t i = 0; i < store_binding_count; ++i) { - const RenderTargetBinding& binding = current_bindings_[store_bindings[i]]; - const RenderTarget* render_target = binding.render_target; - bool is_64bpp = false; - - // Transition the copy buffer to copy destination. - command_processor_.PushTransitionBarrier(copy_buffer, copy_buffer_state, - D3D12_RESOURCE_STATE_COPY_DEST); - copy_buffer_state = D3D12_RESOURCE_STATE_COPY_DEST; - command_processor_.SubmitBarriers(); - - // Copy from the render target planes and set up the layout. - D3D12_TEXTURE_COPY_LOCATION location_source, location_dest; - location_source.pResource = render_target->resource; - location_source.Type = D3D12_TEXTURE_COPY_TYPE_SUBRESOURCE_INDEX; - location_source.SubresourceIndex = 0; - location_dest.pResource = copy_buffer; - location_dest.Type = D3D12_TEXTURE_COPY_TYPE_PLACED_FOOTPRINT; - location_dest.PlacedFootprint = render_target->footprints[0]; - // TODO(Triang3l): Box for color render targets. - command_list.CopyTexture(location_dest, location_source); - EdramLoadStoreRootConstants root_constants; - uint32_t rt_pitch_tiles = surface_pitch_tiles; - if (!render_target->key.is_depth && - xenos::IsColorRenderTargetFormat64bpp( - xenos::ColorRenderTargetFormat(render_target->key.format))) { - rt_pitch_tiles *= 2; - } - // TODO(Triang3l): log2(sample count, resolution scale). - root_constants.base_samples_2x_depth_pitch = - binding.edram_base | (rt_pitch_tiles << 16); - root_constants.rt_color_depth_offset = - uint32_t(location_dest.PlacedFootprint.Offset); - root_constants.rt_color_depth_pitch = - location_dest.PlacedFootprint.Footprint.RowPitch; - if (render_target->key.is_depth) { - root_constants.base_samples_2x_depth_pitch |= 1 << 15; - location_source.SubresourceIndex = 1; - location_dest.PlacedFootprint = render_target->footprints[1]; - command_list.CopyTexture(location_dest, location_source); - root_constants.rt_stencil_offset = - uint32_t(location_dest.PlacedFootprint.Offset); - root_constants.rt_stencil_pitch = - location_dest.PlacedFootprint.Footprint.RowPitch; - } - - // Transition the copy buffer to SRV. - command_processor_.PushTransitionBarrier( - copy_buffer, copy_buffer_state, - D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); - copy_buffer_state = D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE; - command_processor_.SubmitBarriers(); - - // Store the data. - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(root_constants) / sizeof(uint32_t), &root_constants, 0); - EdramLoadStoreMode mode = GetLoadStoreMode(render_target->key.is_depth, - render_target->key.format); - command_processor_.SetComputePipeline(edram_store_pipelines_[size_t(mode)]); - // 1 group per 80x16 samples. - command_list.D3DDispatch(surface_pitch_tiles, binding.edram_dirty_rows, 1); - - // Commit the UAV write. - CommitEdramBufferUAVWrites(true); - } - - command_processor_.ReleaseScratchGPUBuffer(copy_buffer, copy_buffer_state); -} - -void RenderTargetCache::LoadRenderTargetsFromEdram( - uint32_t render_target_count, RenderTarget* const* render_targets, - const uint32_t* edram_bases) { - assert_true(render_target_count <= 5); - if (render_target_count == 0 || render_target_count > 5) { - return; - } - - auto& command_list = command_processor_.GetDeferredCommandList(); - - // Allocate descriptors for the buffers. - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_dest, descriptor_edram; - if (bindless_resources_used_) { - if (!command_processor_.RequestOneUseSingleViewDescriptors( - 1, &descriptor_dest)) { - return; - } - descriptor_edram = command_processor_.GetSystemBindlessViewHandlePair( - D3D12CommandProcessor::SystemBindlessView::kEdramRawSRV); - } else { - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors[2]; - if (!command_processor_.RequestOneUseSingleViewDescriptors(2, - descriptors)) { - return; - } - descriptor_dest = descriptors[0]; - descriptor_edram = descriptors[1]; - WriteEdramRawSRVDescriptor(descriptor_edram.first); - } - - // Get the buffer for copying. - uint32_t copy_buffer_size = 0; - for (uint32_t i = 0; i < render_target_count; ++i) { - copy_buffer_size = - std::max(copy_buffer_size, render_targets[i]->copy_buffer_size); - } - D3D12_RESOURCE_STATES copy_buffer_state = - D3D12_RESOURCE_STATE_UNORDERED_ACCESS; - ID3D12Resource* copy_buffer = command_processor_.RequestScratchGPUBuffer( - copy_buffer_size, copy_buffer_state); - if (copy_buffer == nullptr) { - return; - } - - // Transition the render targets to copy destinations and the EDRAM buffer to - // a SRV. - for (uint32_t i = 0; i < render_target_count; ++i) { - RenderTarget* render_target = render_targets[i]; - command_processor_.PushTransitionBarrier(render_target->resource, - render_target->state, - D3D12_RESOURCE_STATE_COPY_DEST); - render_target->state = D3D12_RESOURCE_STATE_COPY_DEST; - } - TransitionEdramBuffer(D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); - - // Set up the bindings. - auto device = - command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(); - command_list.D3DSetComputeRootSignature(edram_load_store_root_signature_); - command_list.D3DSetComputeRootDescriptorTable(2, descriptor_edram.second); - ui::d3d12::util::CreateBufferRawUAV(device, descriptor_dest.first, - copy_buffer, copy_buffer_size); - command_list.D3DSetComputeRootDescriptorTable(1, descriptor_dest.second); - - // Load each render target. - for (uint32_t i = 0; i < render_target_count; ++i) { - if (edram_bases[i] >= 2048) { - // Something is wrong with the load. - continue; - } - const RenderTarget* render_target = render_targets[i]; - - // Get the number of EDRAM tiles per row. - uint32_t edram_pitch_tiles = render_target->key.width_ss_div_80; - if (!render_target->key.is_depth && - xenos::IsColorRenderTargetFormat64bpp( - xenos::ColorRenderTargetFormat(render_target->key.format))) { - edram_pitch_tiles *= 2; - } - // Clamp the height if somehow requested a render target that is too large. - uint32_t edram_rows = - std::min(render_target->key.height_ss_div_16, - (2048u - edram_bases[i]) / edram_pitch_tiles); - if (edram_rows == 0) { - continue; - } - - // Transition the copy buffer back to UAV if it's not the first load. - command_processor_.PushTransitionBarrier( - copy_buffer, copy_buffer_state, D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - copy_buffer_state = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; - - // Load the data. - command_processor_.SubmitBarriers(); - EdramLoadStoreRootConstants root_constants; - // TODO(Triang3l): log2(sample count, resolution scale). - root_constants.base_samples_2x_depth_pitch = - edram_bases[i] | (edram_pitch_tiles << 16); - root_constants.rt_color_depth_offset = - uint32_t(render_target->footprints[0].Offset); - root_constants.rt_color_depth_pitch = - render_target->footprints[0].Footprint.RowPitch; - if (render_target->key.is_depth) { - root_constants.base_samples_2x_depth_pitch |= 1 << 15; - root_constants.rt_stencil_offset = - uint32_t(render_target->footprints[1].Offset); - root_constants.rt_stencil_pitch = - render_target->footprints[1].Footprint.RowPitch; - } - command_list.D3DSetComputeRoot32BitConstants( - 0, sizeof(root_constants) / sizeof(uint32_t), &root_constants, 0); - EdramLoadStoreMode mode = GetLoadStoreMode(render_target->key.is_depth, - render_target->key.format); - command_processor_.SetComputePipeline(edram_load_pipelines_[size_t(mode)]); - // 1 group per 80x16 samples. - command_list.D3DDispatch(render_target->key.width_ss_div_80, edram_rows, 1); - - // Commit the UAV write and transition the copy buffer to copy source now. - command_processor_.PushUAVBarrier(copy_buffer); - command_processor_.PushTransitionBarrier(copy_buffer, copy_buffer_state, - D3D12_RESOURCE_STATE_COPY_SOURCE); - copy_buffer_state = D3D12_RESOURCE_STATE_COPY_SOURCE; - - // Copy to the render target planes. - command_processor_.SubmitBarriers(); - D3D12_TEXTURE_COPY_LOCATION location_source, location_dest; - location_source.pResource = copy_buffer; - location_source.Type = D3D12_TEXTURE_COPY_TYPE_PLACED_FOOTPRINT; - location_source.PlacedFootprint = render_target->footprints[0]; - location_dest.pResource = render_target->resource; - location_dest.Type = D3D12_TEXTURE_COPY_TYPE_SUBRESOURCE_INDEX; - location_dest.SubresourceIndex = 0; - command_list.CopyTexture(location_dest, location_source); - if (render_target->key.is_depth) { - location_source.PlacedFootprint = render_target->footprints[1]; - location_dest.SubresourceIndex = 1; - command_list.CopyTexture(location_dest, location_source); - } - } - - command_processor_.ReleaseScratchGPUBuffer(copy_buffer, copy_buffer_state); -} - -} // namespace d3d12 -} // namespace gpu -} // namespace xe diff --git a/src/xenia/gpu/d3d12/render_target_cache.h b/src/xenia/gpu/d3d12/render_target_cache.h deleted file mode 100644 index 3bb0af399..000000000 --- a/src/xenia/gpu/d3d12/render_target_cache.h +++ /dev/null @@ -1,574 +0,0 @@ -/** - ****************************************************************************** - * Xenia : Xbox 360 Emulator Research Project * - ****************************************************************************** - * Copyright 2018 Ben Vanik. All rights reserved. * - * Released under the BSD license - see LICENSE in the root for more details. * - ****************************************************************************** - */ - -#ifndef XENIA_GPU_D3D12_RENDER_TARGET_CACHE_H_ -#define XENIA_GPU_D3D12_RENDER_TARGET_CACHE_H_ - -#include -#include - -#include "xenia/base/cvar.h" -#include "xenia/gpu/d3d12/d3d12_shader.h" -#include "xenia/gpu/d3d12/d3d12_shared_memory.h" -#include "xenia/gpu/d3d12/texture_cache.h" -#include "xenia/gpu/draw_util.h" -#include "xenia/gpu/gpu_flags.h" -#include "xenia/gpu/register_file.h" -#include "xenia/gpu/trace_writer.h" -#include "xenia/gpu/xenos.h" -#include "xenia/memory.h" -#include "xenia/ui/d3d12/d3d12_api.h" -#include "xenia/ui/d3d12/d3d12_upload_buffer_pool.h" - -DECLARE_bool(d3d12_16bit_rtv_full_range); - -namespace xe { -namespace gpu { -namespace d3d12 { - -class D3D12CommandProcessor; - -// ============================================================================= -// How EDRAM is used by Xenos: -// (Copied from the old version of the render target cache, so implementation -// info may differ from the way EDRAM is emulated now.) -// ============================================================================= -// -// On the 360 the render target is an opaque block of memory in EDRAM that's -// only accessible via resolves. We use this to our advantage to simulate -// something like it as best we can by having a shared backing memory with -// a multitude of views for each tile location in EDRAM. -// -// This allows us to have the same base address write to the same memory -// regardless of framebuffer format. Resolving then uses whatever format the -// resolve requests straight from the backing memory. -// -// EDRAM is a beast and we only approximate it as best we can. Basically, -// the 10MiB of EDRAM is composed of 2048 5120b tiles. Each tile is 80x16px. -// +-----+-----+-----+--- -// |tile0|tile1|tile2|... 2048 times -// +-----+-----+-----+--- -// Operations dealing with EDRAM deal in tile offsets, so base 0x100 is tile -// offset 256, 256*5120=1310720b into the buffer. All rendering operations are -// aligned to tiles so trying to draw at 256px wide will have a real width of -// 320px by rounding up to the next tile. -// -// MSAA and other settings will modify the exact pixel sizes, like 4X makes -// each tile effectively 40x8px / 2X makes each tile 80x8px, but they are still -// all 5120b. As we try to emulate this we adjust our viewport when rendering to -// stretch pixels as needed. -// -// It appears that games also take advantage of MSAA stretching tiles when doing -// clears. Games will clear a view with 1/2X pitch/height and 4X MSAA and then -// later draw to that view with 1X pitch/height and 1X MSAA. -// -// The good news is that games cannot read EDRAM directly but must use a copy -// operation to get the data out. That gives us a chance to do whatever we -// need to (re-tile, etc) only when requested. -// -// To approximate the tiled EDRAM layout we use a single large chunk of memory. -// From this memory we create many VkImages (and VkImageViews) of various -// formats and dimensions as requested by the game. These are used as -// attachments during rendering and as sources during copies. They are also -// heavily aliased - lots of images will reference the same locations in the -// underlying EDRAM buffer. The only requirement is that there are no hazards -// with specific tiles (reading/writing the same tile through different images) -// and otherwise it should be ok *fingers crossed*. -// -// One complication is the copy/resolve process itself: we need to give back -// the data asked for in the format desired and where it goes is arbitrary -// (any address in physical memory). If the game is good we get resolves of -// EDRAM into fixed base addresses with scissored regions. If the game is bad -// we are broken. -// -// Resolves from EDRAM result in tiled textures - that's texture tiles, not -// EDRAM tiles. If we wanted to ensure byte-for-byte correctness we'd need to -// then tile the images as we wrote them out. For now, we just attempt to -// get the (X, Y) in linear space and do that. This really comes into play -// when multiple resolves write to the same texture or memory aliased by -// multiple textures - which is common due to predicated tiling. The examples -// below demonstrate what this looks like, but the important thing is that -// we are aware of partial textures and overlapping regions. -// -// Example with multiple render targets: -// Two color targets of 256x256px tightly packed in EDRAM: -// color target 0: base 0x0, pitch 320, scissor 0,0, 256x256 -// starts at tile 0, buffer offset 0 -// contains 64 tiles (320/80)*(256/16) -// color target 1: base 0x40, pitch 320, scissor 256,0, 256x256 -// starts at tile 64 (after color target 0), buffer offset 327680b -// contains 64 tiles -// In EDRAM each set of 64 tiles is contiguous: -// +------+------+ +------+------+------+ -// |ct0.0 |ct0.1 |...|ct0.63|ct1.0 |ct1.1 |... -// +------+------+ +------+------+------+ -// To render into these, we setup two VkImages: -// image 0: bound to buffer offset 0, 320x256x4=327680b -// image 1: bound to buffer offset 327680b, 320x256x4=327680b -// So when we render to them: -// +------+-+ scissored to 256x256, actually 320x256 -// | . | | <- . appears at some untiled offset in the buffer, but -// | | | consistent if aliased with the same format -// +------+-+ -// In theory, this gives us proper aliasing in most cases. -// -// Example with horizontal predicated tiling: -// Trying to render 1024x576 @4X MSAA, splitting into two regions -// horizontally: -// +----------+ -// | 1024x288 | -// +----------+ -// | 1024x288 | -// +----------+ -// EDRAM configured for 1056x288px with tile size 2112x567px (4X MSAA): -// color target 0: base 0x0, pitch 1080, 26x36 tiles -// First render (top): -// window offset 0,0 -// scissor 0,0, 1024x288 -// First resolve (top): -// RB_COPY_DEST_BASE 0x1F45D000 -// RB_COPY_DEST_PITCH pitch=1024, height=576 -// vertices: 0,0, 1024,0, 1024,288 -// Second render (bottom): -// window offset 0,-288 -// scissor 0,288, 1024x288 -// Second resolve (bottom): -// RB_COPY_DEST_BASE 0x1F57D000 (+1179648b) -// RB_COPY_DEST_PITCH pitch=1024, height=576 -// (exactly 1024x288*4b after first resolve) -// vertices: 0,288, 1024,288, 1024,576 -// Resolving here is easy as the textures are contiguous in memory. We can -// snoop in the first resolve with the dest height to know the total size, -// and in the second resolve see that it overlaps and place it in the -// existing target. -// -// Example with vertical predicated tiling: -// Trying to render 1280x720 @2X MSAA, splitting into two regions -// vertically: -// +-----+-----+ -// | 640 | 640 | -// | x | x | -// | 720 | 720 | -// +-----+-----+ -// EDRAM configured for 640x736px with tile size 640x1472px (2X MSAA): -// color target 0: base 0x0, pitch 640, 8x92 tiles -// First render (left): -// window offset 0,0 -// scissor 0,0, 640x720 -// First resolve (left): -// RB_COPY_DEST_BASE 0x1BC6D000 -// RB_COPY_DEST_PITCH pitch=1280, height=720 -// vertices: 0,0, 640,0, 640,720 -// Second render (right): -// window offset -640,0 -// scissor 640,0, 640x720 -// Second resolve (right): -// RB_COPY_DEST_BASE 0x1BC81000 (+81920b) -// RB_COPY_DEST_PITCH pitch=1280, height=720 -// vertices: 640,0, 1280,0, 1280,720 -// Resolving here is much more difficult as resolves are tiled and the right -// half of the texture is 81920b away: -// 81920/4bpp=20480px, /32 (texture tile size)=640px -// We know the texture size with the first resolve and with the second we -// must check for overlap then compute the offset (in both X and Y). -// -// ============================================================================= -// Surface size: -// ============================================================================= -// -// XGSurfaceSize code in game executables calculates the size in tiles in the -// following order: -// 1) If MSAA is >=2x, multiply the height by 2. -// 2) If MSAA is 4x, multiply the width by 2. -// 3) 80x16-align multisampled width and height. -// 4) Multiply width*height by 4 or 8 depending on the pixel format. -// 5) Divide the byte size by 5120. -// This means that when working with EDRAM surface sizes we should assume that a -// multisampled surface is the same as a single-sampled surface with 2x height -// and width - however, format size doesn't effect the dimensions. Surface pitch -// in the surface info register is single-sampled. -// -// ============================================================================= -// Rasterizer-ordered view usage: -// ============================================================================= -// -// There is a separate output merger emulation path currently in development, -// using rasterizer-ordered views for writing directly to the 10 MB EDRAM buffer -// instead of the host output merger for render target output. -// -// The convential method of implementing Xenos render targets via host render -// targets has various flaws that may be impossible to fix: -// - k_16_16 and k_16_16_16_16 have -32...32 range on Xenos, but there's no -// equivalent format on PC APIs. They may be emulated using snorm16 (by -// dividing shader color output by 32) or float32, however, blending behaves -// incorrectly for both. In the former case, multiplicative blending may not -// work correctly - 1 becomes 1/32, and instead of 1 * 1 = 1, you get -// 1/32 * 1/32 = 1/1024. For 32-bit floats, additive blending result may go up -// to infinity. -// - k_2_10_10_10_FLOAT has similar blending issues, though less prominent, when -// emulated via float16 render targets. In addition to a greater range for -// RGB (values can go up to 65504 and infinity rather than 31.875), alpha is -// represented totally differently - in k_2_10_10_10_FLOAT, it may have only -// 4 values, and adding, for example, 0.1 to 0.333 will still result in 0.333, -// while with float16, it will be increasing, and the limit is infinity. -// - Due to simultaneously bound host render targets being independent from each -// other, and because the height is unknown (and the viewport and scissor are -// not always present - D3DPT_RECTLIST is used very commonly, especially for -// clearing (Direct3D 9 Clear is implemented this way on the Xbox 360) and -// copying, and it's usually drawn without a viewport and with the scissor of -// the maximum possible size), there may be cases of simultaneously bound -// render targets overlapping each other in the EDRAM in a way that is -// difficult to resolve, and stores/loads may destroy data. -// -// ============================================================================= -// 2x width and height scaling implementation: -// ============================================================================= -// -// For ease of mapping EDRAM addresses, host pixels (top-left, top-right, -// bottom-left, bottom-right) within EACH GUEST SAMPLE are stored consecutively, -// this means that the address of each sample with 4x resolution enabled is 4x -// the address of it without increased resolution - and you only need to add -// (uint(SV_Position.y) * 2u + uint(SV_Position.x)) to the dword/qword index to -// get each of the 4 host pixels for each sample. -class RenderTargetCache { - public: - // Direct3D 12 debug layer is giving errors that contradict each other when - // you use null RTV descriptors - if you set a valid format in RTVFormats in - // the pipeline state, it says that null descriptors can only be used if the - // format in the pipeline state is DXGI_FORMAT_UNKNOWN, however, if - // DXGI_FORMAT_UNKNOWN is set, it complains that the format in the pipeline - // state doesn't match the RTV format. So we have to make render target - // bindings consecutive and remap the output indices in pixel shaders. - struct PipelineRenderTarget { - uint32_t guest_render_target; - DXGI_FORMAT format; - }; - - RenderTargetCache(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, - TraceWriter& trace_writer, bool bindless_resources_used, - bool edram_rov_used); - ~RenderTargetCache(); - - bool Initialize(const TextureCache& texture_cache); - void Shutdown(); - void ClearCache(); - - flags::DepthFloat24Conversion depth_float24_conversion() const { - return depth_float24_conversion_; - } - - void CompletedSubmissionUpdated(); - void BeginSubmission(); - void EndFrame(); - // Called in the beginning of a draw call - may bind pipelines and change the - // view descriptor heap. - bool UpdateRenderTargets(uint32_t shader_writes_color_targets); - // Returns the host-to-guest mappings and host formats of currently bound - // render targets for pipeline creation and remapping in shaders. They are - // consecutive, and format DXGI_FORMAT_UNKNOWN terminates the list. Depth - // format is in the 5th render target. - const PipelineRenderTarget* GetCurrentPipelineRenderTargets() const { - return current_pipeline_render_targets_; - } - - // Performs the resolve to a shared memory area according to the current - // register values, and also clears the EDRAM buffer if needed. Must be in a - // frame for calling. - bool Resolve(const Memory& memory, D3D12SharedMemory& shared_memory, - TextureCache& texture_cache, uint32_t& written_address_out, - uint32_t& written_length_out); - - // Flushes the render targets to EDRAM and unbinds them, for instance, when - // the command processor takes over framebuffer bindings to draw something - // special. May change the CBV/SRV/UAV descriptor heap. - void FlushAndUnbindRenderTargets(); - void WriteEdramRawSRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle); - void WriteEdramRawUAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle); - void WriteEdramUintPow2SRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle, - uint32_t element_size_bytes_pow2); - void WriteEdramUintPow2UAVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle, - uint32_t element_size_bytes_pow2); - - // Totally necessary to rely on the base format - Too Human switches between - // 2_10_10_10_FLOAT and 2_10_10_10_FLOAT_AS_16_16_16_16 every draw. - static xenos::ColorRenderTargetFormat GetBaseColorFormat( - xenos::ColorRenderTargetFormat format); - static DXGI_FORMAT GetColorDXGIFormat(xenos::ColorRenderTargetFormat format); - // Nvidia may have higher performance with 24-bit depth, AMD should have no - // performance difference, but with EDRAM loads/stores less conversion should - // be performed by the shaders if D24S8 is emulated as D24_UNORM_S8_UINT, and - // it's probably more accurate. - static DXGI_FORMAT GetDepthDXGIFormat(xenos::DepthRenderTargetFormat format) { - return format == xenos::DepthRenderTargetFormat::kD24FS8 - ? DXGI_FORMAT_D32_FLOAT_S8X24_UINT - : DXGI_FORMAT_D24_UNORM_S8_UINT; - } - - // Returns true if any downloads were submitted to the command processor. - bool InitializeTraceSubmitDownloads(); - void InitializeTraceCompleteDownloads(); - void RestoreEdramSnapshot(const void* snapshot); - - private: - enum class EdramLoadStoreMode { - kColor32bpp, - kColor64bpp, - kColor7e3, - kDepthUnorm, - kDepthFloat, - kDepthFloat24And32, - - kCount - }; - - struct EdramLoadStoreModeInfo { - const void* load_shader; - size_t load_shader_size; - const WCHAR* load_pipeline_name; - - const void* store_shader; - size_t store_shader_size; - const WCHAR* store_pipeline_name; - }; - - union RenderTargetKey { - struct { - // Supersampled (_ss - scaled 2x if needed) dimensions, divided by 80x16. - // The limit is 2560x2560 without AA, 2560x5120 with 2x AA, and 5120x5120 - // with 4x AA, and twice as much (up to 10240x10240) with 2x resolution - // scaling. - uint32_t width_ss_div_80 : 8; // 8 - uint32_t height_ss_div_16 : 10; // 18 - uint32_t is_depth : 1; // 19 - uint32_t format : 4; // 23 - }; - uint32_t value; - - // Clearing the unused bits. - RenderTargetKey() : value(0) {} - RenderTargetKey(const RenderTargetKey& key) : value(key.value) {} - RenderTargetKey& operator=(const RenderTargetKey& key) { - value = key.value; - return *this; - } - bool operator==(const RenderTargetKey& key) const { - return value == key.value; - } - bool operator!=(const RenderTargetKey& key) const { - return value != key.value; - } - }; - - struct RenderTarget { - ID3D12Resource* resource; - D3D12_RESOURCE_STATES state; - D3D12_CPU_DESCRIPTOR_HANDLE handle; - RenderTargetKey key; -#if 0 - // The first 4 MB page in the heaps. - uint32_t heap_page_first; - // The number of 4 MB pages this render target uses. - uint32_t heap_page_count; -#else - // Index of the render target when multiple render targets with the same key - // are bound simultaneously. - uint32_t instance; -#endif - // Color/depth and stencil layouts. - D3D12_PLACED_SUBRESOURCE_FOOTPRINT footprints[2]; - // Buffer size needed to copy the render target to the EDRAM buffer. - uint32_t copy_buffer_size; - }; - - struct RenderTargetBinding { - // Whether this render target has been used since the last full update. - bool is_bound; - uint32_t edram_base; - // How many 16-pixel rows has already been drawn to the render target since - // the last full update. - uint32_t edram_dirty_rows; - union { - uint32_t format; - xenos::ColorRenderTargetFormat color_format; - xenos::DepthRenderTargetFormat depth_format; - }; - RenderTarget* render_target; - }; - - uint32_t GetEdramBufferSize() const; - - void TransitionEdramBuffer(D3D12_RESOURCE_STATES new_state); - void CommitEdramBufferUAVWrites(bool force); - - void ClearBindings(); - -#if 0 - // Checks if the heap for the render target exists and tries to create it if - // it's not. - bool MakeHeapResident(uint32_t heap_index); -#endif - - // Creates a new RTV/DSV descriptor heap if needed to be able to allocate one - // descriptor in it. - bool EnsureRTVHeapAvailable(bool is_depth); - - // Returns true if a render target with such key can be created. - static bool GetResourceDesc(RenderTargetKey key, D3D12_RESOURCE_DESC& desc); - -#if 0 - RenderTarget* FindOrCreateRenderTarget(RenderTargetKey key, - uint32_t heap_page_first); -#else - RenderTarget* FindOrCreateRenderTarget(RenderTargetKey key, - uint32_t instance); -#endif - - EdramLoadStoreMode GetLoadStoreMode(bool is_depth, uint32_t format) const; - - // Must be in a frame to call. Stores the dirty areas of the currently bound - // render targets and marks them as clean. - void StoreRenderTargetsToEdram(); - - // Must be in a frame to call. Loads the render targets from the EDRAM buffer, - // filling all the rows the render target can hold. - void LoadRenderTargetsFromEdram(uint32_t render_target_count, - RenderTarget* const* render_targets, - const uint32_t* edram_bases); - - D3D12CommandProcessor& command_processor_; - const RegisterFile& register_file_; - TraceWriter& trace_writer_; - bool bindless_resources_used_; - bool edram_rov_used_; - - // 20e4 depth conversion mode to use for non-ROV output. - flags::DepthFloat24Conversion depth_float24_conversion_; - - // Whether 1 guest pixel is rendered as 2x2 host pixels (currently only - // supported with ROV). - bool resolution_scale_2x_ = false; - - // The EDRAM buffer allowing color and depth data to be reinterpreted. - ID3D12Resource* edram_buffer_ = nullptr; - D3D12_RESOURCE_STATES edram_buffer_state_; - // Whether there have been any outstanding UAV writes and a UAV barrier is - // needed before accessing the EDRAM buffer in an unordered way again. - bool edram_buffer_modified_ = false; - - // Non-shader-visible descriptor heap containing pre-created SRV and UAV - // descriptors of the EDRAM buffer, for faster binding (via copying rather - // than creation). - enum class EdramBufferDescriptorIndex : uint32_t { - kRawSRV, - kR32UintSRV, - kR32G32UintSRV, - kR32G32B32A32UintSRV, - kRawUAV, - kR32UintUAV, - kR32G32B32A32UintUAV, - - kCount, - }; - ID3D12DescriptorHeap* edram_buffer_descriptor_heap_ = nullptr; - D3D12_CPU_DESCRIPTOR_HANDLE edram_buffer_descriptor_heap_start_; - - // EDRAM root signatures. - ID3D12RootSignature* edram_load_store_root_signature_ = nullptr; - struct EdramLoadStoreRootConstants { - uint32_t rt_color_depth_offset; - uint32_t rt_color_depth_pitch; - uint32_t rt_stencil_offset; - uint32_t rt_stencil_pitch; - // 0:10 - EDRAM base in tiles. - // 11 - log2(vertical sample count), 0 for 1x AA, 1 for 2x/4x AA. - // 12 - log2(horizontal sample count), 0 for 1x/2x AA, 1 for 4x AA. - // 13 - whether 2x resolution scale is used. - // 14 - whether to apply the hack and duplicate the top/left - // half-row/half-column to reduce the impact of half-pixel offset with - // 2x resolution scale (obsolete since the move to the new resolve - // code). - // 15 - whether it's a depth render target. - // 16: - EDRAM pitch in tiles. - uint32_t base_samples_2x_depth_pitch; - }; - // EDRAM pipelines for the RTV/DSV path. - static const EdramLoadStoreModeInfo - edram_load_store_mode_info_[size_t(EdramLoadStoreMode::kCount)]; - ID3D12PipelineState* - edram_load_pipelines_[size_t(EdramLoadStoreMode::kCount)] = {}; - // Store pipelines are not created with ROV. - ID3D12PipelineState* - edram_store_pipelines_[size_t(EdramLoadStoreMode::kCount)] = {}; - - // Resolve root signatures and pipelines. - ID3D12RootSignature* resolve_copy_root_signature_ = nullptr; - static const std::pair - resolve_copy_shaders_[size_t(draw_util::ResolveCopyShaderIndex::kCount)]; - ID3D12PipelineState* resolve_copy_pipelines_[size_t( - draw_util::ResolveCopyShaderIndex::kCount)] = {}; - ID3D12RootSignature* resolve_clear_root_signature_ = nullptr; - // Clearing 32bpp color, depth with ROV, or unorm depth without ROV. - ID3D12PipelineState* resolve_clear_32bpp_pipeline_ = nullptr; - // Clearing 64bpp color. - ID3D12PipelineState* resolve_clear_64bpp_pipeline_ = nullptr; - // Clearing float depth without ROV, both the float24 and the host float32 - // versions. - ID3D12PipelineState* resolve_clear_depth_24_32_pipeline_ = nullptr; - - // FIXME(Triang3l): Investigate what's wrong with placed RTV/DSV aliasing on - // Nvidia Maxwell 1st generation and older. -#if 0 - // 48 MB heaps backing used render targets resources, created when needed. - // 24 MB proved to be not enough to store a single render target occupying the - // entire EDRAM - a 32-bit depth/stencil one - at some resolution. - // But we also need more than 32 MB to be able to resolve the entire EDRAM - // into a k_32_32_32_32_FLOAT texture. - // TODO(Triang3l): With 2x resolution scale, render targets can take 4x more - // memory - won't fit in this heap size. Resolution scale support was added - // when placed resources already have been disabled, however. - ID3D12Heap* heaps_[5] = {}; - static constexpr uint32_t kHeap4MBPages = 12; -#endif - - static constexpr uint32_t kRenderTargetDescriptorHeapSize = 2048; - // Descriptor heap, for linear allocation of heaps and descriptors. - struct RenderTargetDescriptorHeap { - ID3D12DescriptorHeap* heap; - D3D12_CPU_DESCRIPTOR_HANDLE start_handle; - // When descriptors_used is >= kRenderTargetDescriptorHeapSize, a new heap - // must be allocated and linked to the one that became full now. - uint32_t descriptors_used; - RenderTargetDescriptorHeap* previous; - }; - RenderTargetDescriptorHeap* descriptor_heaps_color_ = nullptr; - RenderTargetDescriptorHeap* descriptor_heaps_depth_ = nullptr; - - std::unordered_multimap render_targets_; - - uint32_t current_surface_pitch_ = 0; - xenos::MsaaSamples current_msaa_samples_ = xenos::MsaaSamples::k1X; - // current_edram_max_rows_ is for RTV/DSV only (render target texture size). - uint32_t current_edram_max_rows_ = 0; - RenderTargetBinding current_bindings_[5] = {}; - bool apply_to_command_list_ = true; - - PipelineRenderTarget current_pipeline_render_targets_[5]; - - // For traces only. - ID3D12Resource* edram_snapshot_download_buffer_ = nullptr; - std::unique_ptr - edram_snapshot_restore_pool_; -}; - -} // namespace d3d12 -} // namespace gpu -} // namespace xe - -#endif // XENIA_GPU_D3D12_RENDER_TARGET_CACHE_H_ diff --git a/src/xenia/gpu/d3d12/shaders/clear_uint2.ps.hlsl b/src/xenia/gpu/d3d12/shaders/clear_uint2.ps.hlsl new file mode 100644 index 000000000..df68b527f --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/clear_uint2.ps.hlsl @@ -0,0 +1,7 @@ +cbuffer XeClearConstants : register(b0) { + uint2 xe_clear_value; +}; + +uint2 main() : SV_Target { + return xe_clear_value; +} diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.cso index d70d8e09634defa8cb910957bf84f7678349dcc7..25b0ac45bce3e1d45fab544cef13910eca2cccbe 100644 GIT binary patch delta 959 zcmZY7L1@!p6bJD4t!n#m zw0s8-4&2yrJxm30;Gvg+2M;~$=%C_I5Dy}g^)~xB!$R1=>;3lvag|Bl5812RbSgEfA6Z|>TW4EFG zP%%`596AMzqwt{zJk^aafC*p{DWW2W)}Z2*#9|^grD`hCJSyL+r-2JVf9o)`(%m`< zTmi2STg+Pp1L@dLtcL;%W+rD_M#?E>UBh-B4N-AA>kbi*YH{{~ zpVP+mM)UEMV>@}n@^Z%1v{|5K{#rZMw}cN1Q%pOTHVxM?GG^g1?+;g)$=AYz!DUAK i`5Wy>04wkx;j=2E05J;kMeU&2F>;Za?`I<4gZ}}(p08a1 delta 1068 zcmajdKWGzC90%~|UKc@17IA2Xf`SDX2bYp1Lk0^DDK0LS792VV`u$yVCA}j4;CJud=e_rP@BX}s zwPHgflh=ncOUKNyi(~%nwNGysD77Sr=KiUMc)k_pOM05p7L88?oMB^hjMi;9? z$HjwcDt%hRKn1zQOFL2V?cR7h{aSS+68-{Y2q1fqKNy492xaX7G-S^_0}Q$GDzL8$ zC*^Yy3C}~LP%g@07hM2q=CxNPIAkpt9TkLGYc^#^G5Mk9oh~Uop=)VV^WSk#GXb zzICbn(r*FVzz~vS%AWcRx`m#ji?*)vzWClwS-ZeG(CfxcU;xMqIPCA^QBly1F<{h< z383b#IRT6VHM=6wjNJA{!Y`q>q5Dtz4my26KSOiSYn=)$u8`b;u0Wl-A^iIs&P#XN z3-IQFn&Z%Rmrlv5@1}Sy*KysD1Aa?P$g2N|Xvo9Lr5>LmN0k?zvO==0oDj?Mx1xzP z*&i4_7sR`oGj$`IyKm@4OP@6g4;j){*2?SVTu#52F$%OS$RnSs{m};g*1ch?RLqr% zSd$|;uWF~T0S}rpd1F@3n*}RdDrT%ldf{=&$eVg0ZDdVZ57b3jrqq+Nrk diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h index b3e54f890..0eba5bb1d 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: adaptive_quad.hs.hlsl const uint8_t adaptive_quad_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x69, 0x9E, 0x19, 0x65, 0x4D, 0x36, 0x4D, 0x06, - 0xF1, 0xC9, 0xBB, 0xA5, 0x8A, 0x00, 0x59, 0x9E, 0x01, 0x00, 0x00, 0x00, - 0x54, 0x0F, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xD4, 0x0A, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x00, 0x3C, 0x0B, 0x00, 0x00, - 0x00, 0x0C, 0x00, 0x00, 0xB8, 0x0E, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x94, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x00, 0x07, 0x5F, 0x8D, 0xF5, 0xF7, 0xDD, 0x8D, + 0x72, 0x63, 0x26, 0xF2, 0x5E, 0xEA, 0x5B, 0xC5, 0x01, 0x00, 0x00, 0x00, + 0x0C, 0x0F, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, + 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, + 0xB8, 0x0B, 0x00, 0x00, 0x70, 0x0E, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, + 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, + 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t adaptive_quad_hs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, + 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xC4, 0x05, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 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0x65, 0x64, 0x72, 0x61, 0x6D, - 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x75, 0x74, 0x69, 0x6F, 0x6E, 0x5F, - 0x73, 0x71, 0x75, 0x61, 0x72, 0x65, 0x5F, 0x73, 0x63, 0x61, 0x6C, 0x65, + 0x00, 0x00, 0x00, 0x00, 0xA3, 0x06, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x61, + 0x6C, 0x70, 0x68, 0x61, 0x5F, 0x74, 0x6F, 0x5F, 0x6D, 0x61, 0x73, 0x6B, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x70, 0x69, 0x74, 0x63, 0x68, 0x5F, 0x74, 0x69, 0x6C, 0x65, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x64, 0x65, 0x70, 0x74, 0x68, @@ -209,21 +200,24 @@ const uint8_t adaptive_quad_hs[] = { 0x73, 0x74, 0x65, 0x6E, 0x63, 0x69, 0x6C, 0x00, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x89, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, + 0x00, 0x00, 0x00, 0x00, 0x61, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x62, 0x61, 0x73, 0x65, 0x5F, 0x64, 0x77, 0x6F, 0x72, 0x64, 0x73, 0x5F, 0x73, 0x63, 0x61, 0x6C, - 0x65, 0x64, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, - 0x72, 0x74, 0x5F, 0x66, 0x6F, 0x72, 0x6D, 0x61, 0x74, 0x5F, 0x66, 0x6C, - 0x61, 0x67, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, - 0x5F, 0x72, 0x74, 0x5F, 0x63, 0x6C, 0x61, 0x6D, 0x70, 0x00, 0xAB, 0xAB, + 0x65, 0x64, 0x00, 0xAB, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x04, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x61, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, + 0x5F, 0x72, 0x74, 0x5F, 0x66, 0x6F, 0x72, 0x6D, 0x61, 0x74, 0x5F, 0x66, + 0x6C, 0x61, 0x67, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, + 0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x63, 0x6C, 0x61, 0x6D, 0x70, 0x00, 0xAB, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x04, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCB, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA3, 0x06, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x6B, 0x65, 0x65, 0x70, 0x5F, 0x6D, 0x61, 0x73, 0x6B, 0x00, 0xAB, 0xAB, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x07, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x62, 0x6C, 0x65, 0x6E, 0x64, 0x5F, 0x66, 0x61, 0x63, 0x74, 0x6F, 0x72, 0x73, 0x5F, 0x6F, 0x70, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt index 6e2b041b8..a9e8a8ece 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_quad_hs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.cso index edea0a673269d71459f2b9bdcc88ce5144be8dd5..6533ae2cab9106cc877ef0628394317900e9d296 100644 GIT binary patch delta 959 zcmZY7KWGzi6bJD4YyMs0zXXd{Ym2ceC`E`xNkI$MR*R6qickx}uhFAot_ju73OymdQK8au^? zO0%i+r_uEaSr?DCBJFG5cw4no`lUuzfC3a`53(w72Y48Tt8)(+?#2^XskZ}T`~_1Z z_o01IF;s*cItPrRaG?Xd(2dK$7%+(xQIpHSD%YwPfoni_YaCkc zZk+;FfKjA~G>>@HND*2?<(j$<{0?ltz!%wChyLhjCH@`*&Y`Ie4I@R2N_`0ZkIFSR z1KjP#C13-Hiwt>!Z$yPZ)P)~VDc!gY3@4CD<{Q{p=(V4xDYz)-3LLmtl9to delta 1068 zcmajdO=uHA6bJB`=3{qjDhU)4u#v4FsMJG1!33>{trhj6?WKjnc1;&rP2FuipkVRq zWIQEI4hkOPK|C~vf`T4B2%_<@ha4<;NN*mjRPc~PA^zVsE6En|!Q0vS?aZ6mo&7RY ziI0v?UmUyoa=E=@f4~nSP*Rz+306X-pANEq>XG1Fg7`UX`)gd zJ-~03XVOPij4C0wX=*1*f!!N_r(Z2^Mk6191TwM@`JFI?g+l1`j64Pmd+|JQunVWf zLmrK+LSs-WO5qfJ0#woI!7A{$7vBOCz&RvEgNmkFP*0dyNZS1XRbqjhoKZds?m2GH-tpFkN%6DXYX@hK?i#e=|@7n4BM zTXPDS0IE(!#^%K@e>CzKdL7!k(^t^BJ^CJMK`(SFG^j$V1zm@_b;J1gDcq0lwx{9t zo|==;W|z*2a^Nz5CN^;06vIK2Pl zBO!dN6+_cA)`G6(O>Iff-6lwz88fRHE0%V1QO~h8&V1s&5|7pKxBh)>7V=ghk2w|- ztBQIA3(!MjKC3TjStDm=3i(Czj+R?4=vhO{rS*&TLvkK2s^ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h index c5ffbac28..7b47ec1ba 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/adaptive_triangle_hs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: adaptive_triangle.hs.hlsl const uint8_t adaptive_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x4A, 0xA5, 0x71, 0xFF, 0xFC, 0xD0, 0xCA, 0x4B, - 0xFF, 0xC7, 0x98, 0x18, 0xA1, 0x7E, 0x33, 0xEC, 0x01, 0x00, 0x00, 0x00, - 0x94, 0x0E, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xD4, 0x0A, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x00, 0x3C, 0x0B, 0x00, 0x00, - 0xD0, 0x0B, 0x00, 0x00, 0xF8, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x94, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x9F, 0x1A, 0x51, 0xED, 0x0F, 0x8F, 0x2B, 0x1A, + 0xD0, 0x57, 0xA8, 0xBA, 0x59, 0x37, 0x51, 0x4C, 0x01, 0x00, 0x00, 0x00, + 0x4C, 0x0E, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, + 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, + 0x88, 0x0B, 0x00, 0x00, 0xB0, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, + 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, + 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t adaptive_triangle_hs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0xA3, 0x06, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x61, + 0x6C, 0x70, 0x68, 0x61, 0x5F, 0x74, 0x6F, 0x5F, 0x6D, 0x61, 0x73, 0x6B, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x70, 0x69, 0x74, 0x63, 0x68, 0x5F, 0x74, 0x69, 0x6C, 0x65, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x64, 0x65, 0x70, 0x74, 0x68, @@ -209,21 +200,24 @@ const uint8_t adaptive_triangle_hs[] = { 0x73, 0x74, 0x65, 0x6E, 0x63, 0x69, 0x6C, 0x00, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x04, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x89, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, + 0x00, 0x00, 0x00, 0x00, 0x61, 0x07, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x62, 0x61, 0x73, 0x65, 0x5F, 0x64, 0x77, 0x6F, 0x72, 0x64, 0x73, 0x5F, 0x73, 0x63, 0x61, 0x6C, - 0x65, 0x64, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 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// float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.cso new file mode 100644 index 0000000000000000000000000000000000000000..dec636afb51a9885815eea96e9dd373f985fc6e6 GIT binary patch literal 660 zcmZ>XaB`0Fcjgyde`(d;dl#SB$>0whGtfa+juw+2-8c0gwYhd72z Y0qREfEzBI4;plvrI4+u0^|;Id0K~LSRR910 literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h new file mode 100644 index 000000000..9993f15d1 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.h @@ -0,0 +1,59 @@ +// generated from `xb buildhlsl` +// source: clear_uint2.ps.hlsl +const uint8_t clear_uint2_ps[] = { + 0x44, 0x58, 0x42, 0x43, 0x5A, 0x4F, 0x43, 0x0F, 0x11, 0xAF, 0xD2, 0xAA, + 0xBD, 0xDE, 0xD1, 0xE4, 0x3E, 0x1F, 0x99, 0xF6, 0x01, 0x00, 0x00, 0x00, + 0x94, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x58, 0x01, 0x00, 0x00, 0x68, 0x01, 0x00, 0x00, 0x9C, 0x01, 0x00, 0x00, + 0xF8, 0x01, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x1C, 0x01, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, + 0xF4, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x58, 0x65, 0x43, 0x6C, 0x65, 0x61, 0x72, 0x43, + 0x6F, 0x6E, 0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, + 0x64, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x63, 0x6C, 0x65, 0x61, 0x72, + 0x5F, 0x76, 0x61, 0x6C, 0x75, 0x65, 0x00, 0x75, 0x69, 0x6E, 0x74, 0x32, + 0x00, 0xAB, 0xAB, 0xAB, 0x01, 0x00, 0x13, 0x00, 0x01, 0x00, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xC7, 0x00, 0x00, 0x00, 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, + 0x74, 0x20, 0x28, 0x52, 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, + 0x68, 0x61, 0x64, 0x65, 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, + 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x4F, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x0C, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x54, 0x61, 0x72, 0x67, 0x65, + 0x74, 0x00, 0xAB, 0xAB, 0x53, 0x48, 0x45, 0x58, 0x54, 0x00, 0x00, 0x00, + 0x51, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, + 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x07, 0x32, 0x20, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt new file mode 100644 index 000000000..53b861ce7 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/clear_uint2_ps.txt @@ -0,0 +1,41 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeClearConstants +// { +// +// uint2 xe_clear_value; // Offset: 0 Size: 8 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// XeClearConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Target 0 xy 0 TARGET uint xy +// +ps_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_output o0.xy +mov o0.xy, CB0[0][0].xyxx +ret +// Approximately 2 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_quad_hs.cso index f0d16f51ff190b1495204f827f5e6fc9d414c92d..0e745c6bf4c08ff1ce180f12f580c05de3726355 100644 GIT binary patch delta 959 zcmZY7O=uHQ5C`yi&DSP=WwE#wBd$fkB4R8`3tFtUS_&RSJSYg8ZCp%olTDjMRy%)#S4~|63Q&-J$eO?n;C2+A&VRsYFYdug{aqO6_nD?% zg$_W)P!V$I3{XemK^J(W7oPy*zywl6RSvB~#Vd)$L~KY^LPU$GJgW`?D?o4S2(;SU zIt5$>>PQhOuKF~!2(6>?OkDzg0(M^Dt!!;TKX zZua5=unELPhCIP%qQW2Q!B?o1Ui<)z0zE(U9jF8K)<|l~onm34acF1LGyGgYQxnk3 zTl6k80Ud8oD9YYdXa(At`(ElVXl=`c2)@{Qm&$YD^+24>aTc6n>wG%su%moEc#kdf zQ=yT*FF~FOEu1uQ%&ukREjM47w{iy3vF}(n1?J3j*0zkKQ^@2E+qpGNh1pDgn0Qpt z*&BXBnb4Z8$CHlj%o~=QHD+eb9If!OaKEI6cF7o~z?2SLBTYfjQD;tziJ?tR{SzxVD>Ew&dM z9-X>5@-)3Vw>31r`6j*{KQ-~=g&?AZlSF>BNo1>+C~$)48j^xUANz>XqqoM^s>7$n z-RgAayoP}aa-WxWqT)Ne@pk&P>TV?b9>@?t_8|8dgV+dV?Ey4o&x`{@ZoCfc@4_kh zSVY1r&?uCPa@a+m12uGxU=4V|jc1$_=@N2lF_H{s3`Hvcj2JNy&oIVbFwh9?qEV%g^| zwO{%jU>g`ha?IFMA3^ugb9BwtZQd8(+bL@o*a3Ro_!Src@&XR~`*>6obmJLd)Qw4? z=B_yjOaL{zBGJ73=8c4(LC2v-Px=}v@^%QYTN=_Qvo7ddgV zlS9CUH#k_ZrJK#rDhLIKEP{hz1_uYl2t^SpICRLS-}jP0F8#rem)|G9_se^i`x0M^ zPtM%EHvRk0Q17d`@9MC-JMk%<8el}Uc7iC3bsSlW5mk|g$fw7!9w)jzbN$9#c{0uh z%lFdf&xjq!y4c!^OsM%G*s8tq4_#Xa3Q&+e$g047AV$hBu#oKh2UNT9B#zYAfl2;^ z>DnD=KU54AA&1Tb6DWM>0f)Nr888VB=+NgPbXzEmYbw2sPmsSCgjpucqt zTIp_`1?~V7ND$3X8XCys@{*6ud2VsVDi}z|erP=qSTM7B+cMHlG3Oe#voK1<#hg1z zTvZb6Egw;)^+t1h+OeG#!}9XR{GwT)ZT>#f`9UWXGON0ywIHZ#Fvryg0EHP zGp9AoDkHnJv=`;T!HvJyuU7VAkq1TgN!6j1ZloCPL< znp2UnW%0uwi#&nef)1YaC3NwSzK7b-tGx;0Avt+PLnC(V)d=MJ4!v*Tt|r?hD9bT7E2*WF|WDalRvd$r}GCMwH315Z={> zsT)~)#n20uzHa325@f8bmD9})TVGl=@@$7QNjy|X;&uG3e}}DN!7diC#%5wu)lOjp z8Z?)4#=4#}^H#Q4Sheoy`TIp9XX^Qkku^n4sqvDSS5JzndS2AkQ5^D{dWn}_pBuU( F{Q=e$*kb?y diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h index cff94a84e..cfa83fc6b 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: continuous_triangle.hs.hlsl const uint8_t continuous_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x13, 0xAE, 0x2B, 0xF0, 0x37, 0xCB, 0xD1, 0x35, - 0xE7, 0x14, 0x02, 0x80, 0xD9, 0x0F, 0x18, 0x9A, 0x01, 0x00, 0x00, 0x00, - 0xD8, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xD4, 0x0A, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x00, 0x3C, 0x0B, 0x00, 0x00, - 0xD0, 0x0B, 0x00, 0x00, 0x3C, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x94, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xE9, 0xED, 0x28, 0x13, 0xAA, 0x4C, 0xDF, 0x10, + 0x2D, 0x74, 0xB1, 0x3C, 0xCF, 0x63, 0x60, 0x1D, 0x01, 0x00, 0x00, 0x00, + 0x90, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, + 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, + 0x88, 0x0B, 0x00, 0x00, 0xF4, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, + 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, + 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t continuous_triangle_hs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, + 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xC4, 0x05, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x06, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x27, 0x06, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x58, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x7C, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x8A, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xB7, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xD4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xAC, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xF8, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x07, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xD0, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x30, 0x07, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x51, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0C, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x29, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5F, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x37, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x6F, 0x07, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x47, 0x07, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x90, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x68, 0x07, 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0x72, 0x74, 0x5F, 0x62, 0x6C, 0x65, 0x6E, 0x64, 0x5F, 0x66, 0x61, 0x63, 0x74, 0x6F, 0x72, 0x73, 0x5F, 0x6F, 0x70, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.txt index 41a9814a7..7ab9d3556 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/continuous_triangle_hs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.cso index 8c0fcb04dff697c399b9f11ebbc6aa6b99155606..0a39cd14d7f6d0a15ddc108802ab90fd955f95f3 100644 GIT binary patch delta 959 zcmZY7O=uHQ5C`yiO|sd<53*QHr4iR+K@lMqr3EciTP=zQDLp6%n{8Z7aFb1&L{~jo zJO(tpg9i&uDR{6cR0Xl%As0cxLk=DlA{0NsgNK5->HobXkWB}M-T5&)nSI%xu}W-w z>e~6qUoY<7Urs+Cp8YuEtY02nXGEm$B~ox5LzcosHRLw(?JlB6dx&PHE?m4)9v@^w zB9o)ABaq6slN;3{2_~K zv(N#k7%D;zodfD9Jm>(FC-!=~;d*5Y-aU zt2^`_Gy$DxPbkUW4QK`0nfpQNZ)k1DgfPC?dY8&`;q^eA&2y$qvrT?UaoBObsXSn- z{B&@%@2kSI!NpT1j@h-0g5?&93s&AhI`$pwrogH)E1_zW{&&xil|{sU;uuMhwL delta 1068 zcmajdO=uHA6bJA(&BtbIDhU=6FqN$+DtgF4FhMI~YsG`2EkY}W?V2vMnz}KYK*53^ zC!?2y=|vFCO|StA3VIPdc#(L>AqNW{Qct~Dst6Vo^#8V5NwR- zfuXU}gS)Ogu|L0Ad-&~{`t$td3(o}+P46TMqD>*2-9(`sL?@6GCi>7rG%|E%c%d?| zTU@J*XZC9tC?nT-X*XY@ zosXHm1grx8w^+x#nrE?L0hfRplB0}1hr6TOzJxd6?h`itG4DJ4Bj&j$?3IQu7ENK< zrw(;q`Z-_=7(sGOI8*OH*U@uz!O_>eFTS^1)+w+I^m}m)7y|MF4(I#$R21~$9$?&y zDWK-9ISNbyHK!ucl>F+CMejo|LbsmuDRgq1zJ=zXr`i>oTp_&yU4puGBl!0@+?VdQ zN8ycaHAkSW4xNydz*+G~F5|i)`-7Gkm6hNvQI|c+v95q3hn0K2l0vejB*dcprD)>4 z>~#c~iGDM%I+IP)(HNxVl$X)g!X5_T!LW N)Z?P`;!yVw-ycH5+Cl&T diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h index 5b706b207..4fb6d55d8 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: discrete_quad.hs.hlsl const uint8_t discrete_quad_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x13, 0x5A, 0x9F, 0x73, 0xE2, 0xBD, 0xEE, 0x8B, - 0xF2, 0xAA, 0x09, 0xFB, 0x4D, 0x55, 0x4E, 0xAF, 0x01, 0x00, 0x00, 0x00, - 0x68, 0x0E, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xD4, 0x0A, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x00, 0x3C, 0x0B, 0x00, 0x00, - 0x00, 0x0C, 0x00, 0x00, 0xCC, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x94, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xE9, 0xAA, 0x77, 0x7A, 0x9F, 0x69, 0xA6, 0x25, + 0x54, 0xC9, 0x52, 0x6F, 0xAD, 0x4A, 0x1B, 0xAD, 0x01, 0x00, 0x00, 0x00, + 0x20, 0x0E, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, + 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, + 0xB8, 0x0B, 0x00, 0x00, 0x84, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, + 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, + 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t discrete_quad_hs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, + 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xC4, 0x05, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x06, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x27, 0x06, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x58, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x7C, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x8A, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xB7, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xD4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xAC, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xF8, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x07, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xD0, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x30, 0x07, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x51, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0C, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x29, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x5F, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x37, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x6F, 0x07, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x47, 0x07, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x90, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x07, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xD0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x8C, 0x07, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xF4, 0x07, 0x00, 0x00, 0xD8, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x08, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA1, 0x07, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xBC, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x38, 0x08, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x07, 0x00, 0x00, 0xDC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x65, 0x64, 0x72, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt index 0216c0b46..25ddfbd4d 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_quad_hs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.cso index 88ef251c8e650cb8c9b6d31ea94fe7ea192d1c01..e3f11cbfc76744cfd134745688cbc15bff203002 100644 GIT binary patch delta 959 zcmZY7F=!J}7zgn0HOb`?E99`4N)%&JP(+ADX+aCsMuQ+C(m_FcxyGX@UUF%3krO97 zbqLt-1_ukabZmxdK`4l15gZ&cI5;RoEV?*2bcmDw-%A3y>jxh%-!I?$^4{gXBvuj= z>AP2_5^4R`^7|iuAEYwd+VtQIBchdqL<-h%WHn0EK<*)z4`3Z6x|6EsJN0in224eYM5vhmFH4tfNMZ+>ln1| zZ_NO=fJvl?Jl6totqN_T@=RR^eg^g~@J_b2pkMo1iND5xlW1x|V@MI>Qtw0mpz@3@ z0Qda31Z)Gb$dFI)g{bg{dhiV@)sLTmF`(y%egTufWM?F`<(ZB~h$f-ElV0XmLUAn% zy}eJLK(o-v?u4rB-GZ(`dviZZ{S9sGn-Ikt+w4>MTzE5-Vhfxp8Mec3C^kFGca*1W zgI^4f4SZ90F}!raz+-kz-7#IKvS^ldq-{Mm9||lRg_33JIlEGHbjzL_rOJHK86_T5 zlk6=&uTI6=o$Wc>vKMvJE$OrKMwvGGOZCLi23{;oF|1PF&>dSZ80ANNI8tW@{}34o lZZbN=U#Z6eI0F9}ITvOWAVxvHt{xF*j9y~K_CjOOyQYh_P2DvgP-wxA zlkt==y$A}qh==A-P|;%#y+|$rb4bxc3Oxv-R`5_k(Er^}`+vdvqtzFI-YxXe~LYqW3dKpuWFm@4Hrxs%qqgTh)%ENKK zP@Ybo)G@1s+@q!KC^kjQH^qu)hPR!~-7H zR-rK{6{T>CJ_hRObYTT}+K+F53E(V}qCrJd`%ro$Iv7P*K4^a<=+0{s@Tcf^9zJyg zSONZTv4MG2-(u4SZUA*8MG1WhZ%40v1+T-sC#?Tt-Vb;a^Sl%G3sZ_}Ni6%=q3-9o z4r~DV4=QdY-Pi`j+;^_x8%V1-5|!KYj%&Kw3cIejiCiK|dY?#{8HB>i(LO zzywftD>61Gz6YY(Bj`A^`=l?RvxjsO>Oe2ID>SG=Y9G1*_3B3O?^Ad$-D}Uo>xXJi zKwBL;Bg(;R{E67cbw><_Y(6QeeezIGP!?nIL#Ze;(UOnyb@5Bq`8zS7jGPVQ zT`gONnQ?BLM&34-%-kYD+RoTn!&-KXoAYLlt#c-cd+I=}hQIaiuwBSIg*?_cOsuN< z32Z=v)?C(HGO||A&J^naZypviJCfyLw->&@Z!re Hy|<)4rbgU9 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h index 32e993e2a..93eae8911 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: discrete_triangle.hs.hlsl const uint8_t discrete_triangle_hs[] = { - 0x44, 0x58, 0x42, 0x43, 0x37, 0xB5, 0xEB, 0x11, 0x50, 0xF9, 0x9D, 0xDB, - 0xE4, 0xA5, 0xEF, 0xC0, 0x7B, 0xD3, 0xC4, 0xE4, 0x01, 0x00, 0x00, 0x00, - 0xD8, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, - 0xD4, 0x0A, 0x00, 0x00, 0x08, 0x0B, 0x00, 0x00, 0x3C, 0x0B, 0x00, 0x00, - 0xD0, 0x0B, 0x00, 0x00, 0x3C, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, - 0x94, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x1B, 0x44, 0x5F, 0x4E, 0x88, 0xBE, 0xE3, 0xF9, + 0x5D, 0x30, 0x47, 0xB3, 0x11, 0x54, 0x0C, 0x5E, 0x01, 0x00, 0x00, 0x00, + 0x90, 0x0D, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, + 0x8C, 0x0A, 0x00, 0x00, 0xC0, 0x0A, 0x00, 0x00, 0xF4, 0x0A, 0x00, 0x00, + 0x88, 0x0B, 0x00, 0x00, 0xF4, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, + 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x48, - 0x00, 0x05, 0x00, 0x00, 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, + 0x00, 0x05, 0x00, 0x00, 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t discrete_triangle_hs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, - 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x90, 0x00, 0x00, 0x00, 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x72, 0x00, 0xAB, 0xAB, 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, + 0x90, 0x00, 0x00, 0x00, 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xC4, 0x05, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x06, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x27, 0x06, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x58, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x7C, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x8A, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xB7, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xD4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 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0x6D, 0x5F, 0x72, 0x74, 0x5F, 0x62, 0x6C, 0x65, 0x6E, 0x64, 0x5F, 0x66, 0x61, 0x63, 0x74, 0x6F, 0x72, 0x73, 0x5F, 0x6F, 0x70, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.txt index 6e49c8714..c1241b5af 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/discrete_triangle_hs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.cso deleted file mode 100644 index 932bbf3824ccefe51ee6c269f0967f8d5296e172..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1824 zcmb_c&r1|>6o2cg>9&e!K`l~KmS{w%bczUbbu%!3jfS0ub!TKZR%e-+NC-r#Q-@C7 zq(gyGc#Do5xz_j#Z9eeZpD#+SyjyC1jS z&29f`dEfu(v-#*tcS1yrVw z;yZ!Z4_(hj8+I^p^f}&Xkj5m5B!_WTNgDbk#$!qr7||dLsy37ws~usJ*H64)Sb=A ziKSUQ_Bl-aEByD{BykVVIQM*rAvIw?DX;Ksa~lVJw7;bN_b|5y#KKb<>1vWt8|cr>KvkC=8snyc)xNf*~j`W>CAk z-kBKAD_)oSl;@eqalJ3`oDFpcbbXD?p;(RAm`3>(vyGnoiR#k)xeWsus-o|Qxl_0? zIr-h_!;$l#Jp+3t)^nJEt@==3yW-RqzdNySc!%%jxD7>dxz6faxq-6Hg_{d6;606{ Y|D9wNE}hW)zJ~pYY>gEC|69oU4>60}LI3~& diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.h deleted file mode 100644 index cbdd00ae4..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.h +++ /dev/null @@ -1,156 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_load_color_32bpp.cs.hlsl -const uint8_t edram_load_color_32bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xCF, 0xBC, 0x9B, 0xA9, 0x51, 0xA5, 0xEB, 0x05, - 0xB2, 0x26, 0xC0, 0xC7, 0x53, 0x7B, 0xC9, 0x12, 0x01, 0x00, 0x00, 0x00, - 0x20, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0x84, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.txt deleted file mode 100644 index a490b6e06..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_32bpp_cs.txt +++ /dev/null @@ -1,75 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 [unused] -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 [unused] -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 2 -dcl_thread_group 20, 16, 1 -ishl r0.x, vThreadIDInGroup.x, l(2) -and r0.yz, CB0[0][1].xxxx, l(0, 0x00008000, 2047, 0) -if_nz r0.y - ult r0.y, vThreadIDInGroup.x, l(10) - uge r0.w, vThreadIDInGroup.x, l(10) - and r0.yw, r0.yyyw, l(0, 40, 0, -40) - iadd r0.y, r0.w, r0.y - iadd r0.x, r0.y, r0.x -endif -ushr r0.y, CB0[0][1].x, l(16) -imad r0.y, vThreadGroupID.y, r0.y, r0.z -iadd r0.y, r0.y, vThreadGroupID.x -imul null, r0.z, vThreadIDInGroup.y, l(320) -imad r0.y, r0.y, l(5120), r0.z -ishl r0.x, r0.x, l(2) -iadd r0.x, r0.x, r0.y -ubfe r0.y, l(1), l(13), CB0[0][1].x -ishl r0.y, r0.y, l(1) -ishl r0.x, r0.x, r0.y -ld_raw r0.xyzw, r0.x, T0[0].xyzw -ishl r1.x, vThreadID.x, l(4) -imad r1.x, vThreadID.y, CB0[0][0].y, r1.x -iadd r1.x, r1.x, CB0[0][0].x -store_raw U0[0].xyzw, r1.x, r0.xyzw -ret -// Approximately 25 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.cso deleted file mode 100644 index d6d3f8ec6720633a816b1d6b7a04d2c8c2d656f6..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1652 zcmah}&ubG=5S}!xtuabzJxD0J8kH18lHyTB%?~TYNV^s4X-Tsi5=pXQcg3Dc!Glo6 zlQ;1o_>){cd-r6$dGz4Hiyr(3>i2E-rJKbh1Cx1gX1;IUn|YhU=FR-G&*`UM4r1@u zo}BspZEvd*6A|x-$PDZiXfiIc1ib|P4(EEISlXWwVcs-;;Fhb<*o>Yh=mTPli-imH zoq}cpJrA3NQa(Xvp(x|?!1zMWuzba44mv6CR~QsplP}D z(8I*h=WwS%8j?7QjNUvhE)@-RNVW0{{KwDK8gRHi@Ez31lwu4jllkPNY zj_ulYPs^+?YpZ3wtm%!aX*pWnZg-n4EOOb)Ik~Ohs<6it+PjgxzFORTgL|xD;vW%z zFekD5c*dpYSwaTFeo|iJ*_L*OWAwkG|4)v~Au;e&R_3R~w_0HFdK&PP^CiZbf#uxT zY3R`feIzdnU-t_SSPbBvp v&+y|cVZJDA=>(@Kat-6rH*Rdaz&1GV~ue#DLxK6Dn`zKhjG#? diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.h deleted file mode 100644 index 1cb25c8e5..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.h +++ /dev/null @@ -1,142 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_load_color_64bpp.cs.hlsl -const uint8_t edram_load_color_64bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x8C, 0xBE, 0x23, 0x8B, 0xC9, 0xFF, 0x01, 0xA7, - 0x51, 0x87, 0x1F, 0xED, 0xD1, 0x8A, 0x62, 0x4E, 0x01, 0x00, 0x00, 0x00, - 0x74, 0x06, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0xD8, 0x05, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.txt deleted file mode 100644 index 6715a4d24..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_64bpp_cs.txt +++ /dev/null @@ -1,68 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 [unused] -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 [unused] -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 2 -dcl_thread_group 40, 16, 1 -and r0.x, CB0[0][1].x, l(2047) -ushr r0.y, CB0[0][1].x, l(16) -imad r0.x, vThreadGroupID.y, r0.y, r0.x -ishl r0.y, vThreadGroupID.x, l(1) -iadd r0.x, r0.y, r0.x -imul null, r0.y, vThreadIDInGroup.y, l(640) -imad r0.x, r0.x, l(5120), r0.y -ishl r0.y, vThreadIDInGroup.x, l(4) -iadd r0.x, r0.y, r0.x -ubfe r0.y, l(1), l(13), CB0[0][1].x -ishl r0.y, r0.y, l(1) -ishl r0.x, r0.x, r0.y -ld_raw r0.xyzw, r0.x, T0[0].xyzw -ishl r1.x, vThreadID.x, l(4) -imad r1.x, vThreadID.y, CB0[0][0].y, r1.x -iadd r1.x, r1.x, CB0[0][0].x -store_raw U0[0].xyzw, r1.x, r0.xyzw -ret -// Approximately 18 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_7e3_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_color_7e3_cs.cso deleted file mode 100644 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z0>!LN8u{V%d3Cw5nyp7IaxS&K;eBTb{+!R=&-di(`K~YIHuN2IXJGLRVg;X-Ux23= ziwi{G^&E}G1;TrxSmQPHA32Q0r64>z=0*7}=#Shtg}&MBUcZC-U1AQiUJmp#2lYRR oqo}Q(UVRs~3N-sYa`na(|4AaZL0xV%>>>UcD1^QIe}tU>0517<`~Uy| diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.h deleted file mode 100644 index 34f44b18c..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.h +++ /dev/null @@ -1,296 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_load_depth_float24and32.cs.hlsl -const uint8_t edram_load_depth_float24and32_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF3, 0xA3, 0xA4, 0x14, 0x0A, 0x50, 0x56, 0x49, - 0x5D, 0x09, 0x6C, 0xBF, 0x33, 0xC9, 0xC1, 0x9A, 0x01, 0x00, 0x00, 0x00, - 0xAC, 0x0D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0x10, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.txt deleted file mode 100644 index 4ad3f4288..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float24and32_cs.txt +++ /dev/null @@ -1,117 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 7 -dcl_thread_group 20, 16, 1 -ishl r0.x, vThreadIDInGroup.x, l(2) -and r0.yz, CB0[0][1].xxxx, l(0, 0x00008000, 2047, 0) -if_nz r0.y - ult r0.y, vThreadIDInGroup.x, l(10) - uge r0.w, vThreadIDInGroup.x, l(10) - and r0.yw, r0.yyyw, l(0, 40, 0, -40) - iadd r0.y, r0.w, r0.y - iadd r0.x, r0.y, r0.x -endif -ushr r0.y, CB0[0][1].x, l(16) -imad r0.y, vThreadGroupID.y, r0.y, r0.z -iadd r0.y, r0.y, vThreadGroupID.x -imul null, r0.z, vThreadIDInGroup.y, l(320) -imad r0.y, r0.y, l(5120), r0.z -ishl r0.x, r0.x, l(2) -iadd r0.x, r0.x, r0.y -ubfe r0.y, l(1), l(13), CB0[0][1].x -ishl r0.y, r0.y, l(1) -ishl r0.x, r0.x, r0.y -ld_raw r1.xyzw, r0.x, T0[0].xyzw -ushr r2.xyzw, r1.xyzw, l(8, 8, 8, 8) -iadd r0.x, r0.x, l(0x00a00000) -ld_raw r0.xyzw, r0.x, T0[0].xyzw -ubfe r3.xyzw, l(20, 20, 20, 20), l(8, 8, 8, 8), r1.xyzw -ushr r4.xyzw, r2.xyzw, l(20, 20, 20, 20) -firstbit_hi r5.xyzw, r3.xyzw -iadd r5.xyzw, r5.xyzw, l(-11, -11, -11, -11) -movc r5.xyzw, r3.xyzw, r5.xyzw, l(21,21,21,21) -iadd r6.xyzw, -r5.xyzw, l(1, 1, 1, 1) -movc r6.xyzw, r4.xyzw, r4.xyzw, r6.xyzw -ishl r5.xyzw, r3.xyzw, r5.xyzw -and r5.xyzw, r5.xyzw, l(0x000fffff, 0x000fffff, 0x000fffff, 0x000fffff) -movc r3.xyzw, r4.xyzw, r3.xyzw, r5.xyzw -ishl r4.xyzw, r6.xyzw, l(23, 23, 23, 23) -iadd r4.xyzw, r4.xyzw, l(0x38000000, 0x38000000, 0x38000000, 0x38000000) -ishl r3.xyzw, r3.xyzw, l(3, 3, 3, 3) -iadd r3.xyzw, r4.xyzw, r3.xyzw -movc r3.xyzw, r2.xyzw, r3.xyzw, l(0,0,0,0) -iadd r4.xyzw, r0.xyzw, -r3.xyzw -uge r5.xyzw, l(0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff), r0.xyzw -and r0.xyzw, r0.xyzw, r5.xyzw -umin r0.xyzw, r0.xyzw, l(0x3ffffff8, 0x3ffffff8, 0x3ffffff8, 0x3ffffff8) -bfi r5.xyzw, l(23, 23, 23, 23), l(0, 0, 0, 0), r0.xyzw, l(0x00800000, 0x00800000, 0x00800000, 0x00800000) -ushr r6.xyzw, r0.xyzw, l(23, 23, 23, 23) -iadd r6.xyzw, -r6.xyzw, l(113, 113, 113, 113) -umin r6.xyzw, r6.xyzw, l(24, 24, 24, 24) -ushr r5.xyzw, r5.xyzw, r6.xyzw -ult r6.xyzw, r0.xyzw, l(0x38800000, 0x38800000, 0x38800000, 0x38800000) -iadd r0.xyzw, r0.xyzw, l(0xc8000000, 0xc8000000, 0xc8000000, 0xc8000000) -movc r0.xyzw, r6.xyzw, r5.xyzw, r0.xyzw -iadd r5.xyzw, r0.xyzw, l(3, 3, 3, 3) -ubfe r0.xyzw, l(1, 1, 1, 1), l(3, 3, 3, 3), r0.xyzw -iadd r0.xyzw, r0.xyzw, r5.xyzw -ubfe r0.xyzw, l(24, 24, 24, 24), l(3, 3, 3, 3), r0.xyzw -ieq r0.xyzw, r2.xyzw, r0.xyzw -and r0.xyzw, r0.xyzw, l(1, 1, 1, 1) -imad r0.xyzw, r4.xyzw, r0.xyzw, r3.xyzw -ishl r2.xy, vThreadID.xxxx, l(4, 2, 0, 0) -imad r2.xy, vThreadID.yyyy, CB0[0][0].ywyy, r2.xyxx -iadd r2.xy, r2.xyxx, CB0[0][0].xzxx -store_raw U0[0].xyzw, r2.x, r0.xyzw -and r0.x, r1.x, l(255) -bfi r0.yzw, l(0, 8, 8, 8), l(0, 8, 16, 24), r1.yyzw, l(0, 0, 0, 0) -iadd r0.xy, r0.zwzz, r0.xyxx -iadd r0.x, r0.y, r0.x -store_raw U0[0].x, r2.y, r0.x -ret -// Approximately 67 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_load_depth_float_cs.cso deleted file mode 100644 index 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0x45, - 0x01, 0xA5, 0xE1, 0x59, 0x91, 0xBD, 0xE5, 0x7F, 0x01, 0x00, 0x00, 0x00, - 0x74, 0x06, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0xD8, 0x05, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xCF, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x01, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_64bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_64bpp_cs.txt deleted file mode 100644 index d26a25128..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_64bpp_cs.txt +++ /dev/null @@ -1,68 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 [unused] -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 [unused] -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 2 -dcl_thread_group 40, 16, 1 -ishl r0.x, vThreadID.x, l(4) -imad r0.x, vThreadID.y, CB0[0][0].y, r0.x -iadd r0.x, r0.x, CB0[0][0].x -ld_raw r0.xyzw, r0.x, T0[0].xyzw -and r1.x, CB0[0][1].x, l(2047) -ushr r1.y, CB0[0][1].x, l(16) -imad r1.x, vThreadGroupID.y, r1.y, r1.x -ishl r1.y, vThreadGroupID.x, l(1) -iadd r1.x, r1.y, r1.x -imul null, r1.y, vThreadIDInGroup.y, l(640) -imad r1.x, r1.x, l(5120), r1.y -ishl r1.y, vThreadIDInGroup.x, l(4) -iadd r1.x, r1.y, r1.x -ubfe r1.y, l(1), l(13), CB0[0][1].x -ishl r1.y, r1.y, l(1) -ishl r1.x, r1.x, r1.y -store_raw U0[0].xyzw, r1.x, r0.xyzw -ret -// Approximately 18 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.cso deleted file mode 100644 index 20c0adafb4ea102bab104e808afbb33de27ab6c3..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 3616 zcmb7HL2p|{5FS4#cH)K-rA0+n1g3#1tq@8qL?u*}O_P{b3T=o(m7a{TUlb!J&$5l^ zh1MdR5aLvEK^#CLLW;QY3-|-{gphgx#Gxk+72+Dc@9mDWezF@e(s=jHe*4Yr>`dOv z%GR~z%a8x~^-Al->EtFwP^{~^Gt#FlF*07_@4a?D9r(50YcI5Doewn9P zI4NLM`O7&Sg8}J~DgHo?ApW=jJ25BWZUVO|Y!!u-a?!u7TCTA{pCt%vQxa)? z7;Q(G>9{T``!()U5nBBgtUc;wG}@Wpk;Q#x(e17l<4lj=U&Yu zqiw_4Zo@{7b?~)eOJg3GxL@w0WnzU%zRFq-V6%VfUigi9C+)sXa3t5rW#woItg(I} za@O~C4gghR1B0K0sQc)35>`mn5$wcJd20z z@8Gv!nynFUBZ~7R_wU^!~$oPy~qm4CM1owH&DQb(k#TYxvTeIj3#n2zc_op_8 zH|lTS>#+mZi?nSx-~YnKyso>u;XE);?=jXCae9ZWDL!jma;~<(;KB8l9Yxq<$@}&D z!S3O{V__|6Y}VStV3mJw{5n^h&&fU7V`ZAe7kkb2nC5gaZ^!*b9DB^ikvDk<>@kfenKSJ%j_d{H3d~@CfmQ-D z*atB6?-V}bzbpPdYaB^l?JbU!z>Mad!}+ec+GahIKLtE{jP=ZCA9KmaV9saCs2=;& zt&@v=7jq|iOfl?V3jLjTbG6xhV$>hsxf*w_VBfiM?D&K#VlU?z?;XnLz~HBcj^GEc zlNV(y&Dgk(+R11v%6S%ctYy{i$HQ*`^l<#{=lwhEAKlzzK6-GOeotw<#Oqn`FODS7NFR#T{kmtEf5jXiC&k}i0;3g; vp%iCKNe1 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.h deleted file mode 100644 index 4178289c9..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.h +++ /dev/null @@ -1,306 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_store_color_7e3.cs.hlsl -const uint8_t edram_store_color_7e3_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x37, 0xE8, 0xE1, 0xD6, 0x3C, 0x70, 0xAD, 0x17, - 0x02, 0x41, 0x0C, 0x60, 0xDB, 0xA6, 0xDB, 0xF4, 0x01, 0x00, 0x00, 0x00, - 0x20, 0x0E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0x84, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 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0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.txt deleted file mode 100644 index 9a97d5914..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_color_7e3_cs.txt +++ /dev/null @@ -1,123 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 [unused] -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 [unused] -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 5 -dcl_thread_group 40, 16, 1 -ishl r0.x, vThreadID.x, l(4) -imad r0.x, vThreadID.y, CB0[0][0].y, r0.x -iadd r0.x, r0.x, CB0[0][0].x -ld_raw r0.xyzw, r0.x, T0[0].xyzw -ushr r1.xyzw, r0.xyzw, l(16, 16, 16, 16) -f16tof32 r2.yw, r0.xxxy -f16tof32 r2.xz, r1.yyxy -uge r3.xyz, l(0x7fffffff, 0x7fffffff, 0x7fffffff, 0), r2.yzwy -and r2.yzw, r2.yyzw, r3.xxyz -umin r2.yzw, r2.yyzw, l(0, 0x41ff0000, 0x41ff0000, 0x41ff0000) -bfi r3.xyz, l(23, 23, 23, 0), l(0, 0, 0, 0), r2.yzwy, l(0x00800000, 0x00800000, 0x00800000, 0) -ushr r4.xyz, r2.yzwy, l(23, 23, 23, 0) -iadd r4.xyz, -r4.xyzx, l(125, 125, 125, 0) -umin r4.xyz, r4.xyzx, l(24, 24, 24, 0) -ushr r3.xyz, r3.xyzx, r4.xyzx -ult r4.xyz, r2.yzwy, l(0x3e800000, 0x3e800000, 0x3e800000, 0) -iadd r2.yzw, r2.yyzw, l(0, 0xc2000000, 0xc2000000, 0xc2000000) -movc r2.yzw, r4.xxyz, r3.xxyz, r2.yyzw -iadd r3.xyz, r2.yzwy, l(0x00007fff, 0x00007fff, 0x00007fff, 0) -ubfe r2.yzw, l(0, 1, 1, 1), l(0, 16, 16, 16), r2.yyzw -iadd r2.yzw, r2.yyzw, r3.xxyz -ubfe r2.yzw, l(0, 10, 10, 10), l(0, 16, 16, 16), r2.yyzw -imad r0.x, r2.z, l(1024), r2.y -imad r0.x, r2.w, l(0x00100000), r0.x -mov_sat r2.x, r2.x -mad r0.y, r2.x, l(3.000000), l(0.500000) -ftou r0.y, r0.y -imad r0.x, r0.y, l(0x40000000), r0.x -f16tof32 r2.yw, r0.zzzw -f16tof32 r2.xz, r1.wwzw -uge r1.xyz, l(0x7fffffff, 0x7fffffff, 0x7fffffff, 0), r2.yzwy -and r1.xyz, r2.yzwy, r1.xyzx -umin r1.xyz, r1.xyzx, l(0x41ff0000, 0x41ff0000, 0x41ff0000, 0) -bfi r2.yzw, l(0, 23, 23, 23), l(0, 0, 0, 0), r1.xxyz, l(0, 0x00800000, 0x00800000, 0x00800000) -ushr r3.xyz, r1.xyzx, l(23, 23, 23, 0) -iadd r3.xyz, -r3.xyzx, l(125, 125, 125, 0) -umin r3.xyz, r3.xyzx, l(24, 24, 24, 0) -ushr r2.yzw, r2.yyzw, r3.xxyz -ult r3.xyz, r1.xyzx, l(0x3e800000, 0x3e800000, 0x3e800000, 0) -iadd r1.xyz, r1.xyzx, l(0xc2000000, 0xc2000000, 0xc2000000, 0) -movc r1.xyz, r3.xyzx, r2.yzwy, r1.xyzx -iadd r2.yzw, r1.xxyz, l(0, 0x00007fff, 0x00007fff, 0x00007fff) -ubfe r1.xyz, l(1, 1, 1, 0), l(16, 16, 16, 0), r1.xyzx -iadd r1.xyz, r1.xyzx, r2.yzwy -ubfe r1.xyz, l(10, 10, 10, 0), l(16, 16, 16, 0), r1.xyzx -imad r0.z, r1.y, l(1024), r1.x -imad r0.z, r1.z, l(0x00100000), r0.z -mov_sat r2.x, r2.x -mad r0.w, r2.x, l(3.000000), l(0.500000) -ftou r0.w, r0.w -imad r0.y, r0.w, l(0x40000000), r0.z -ishl r0.z, vThreadIDInGroup.x, l(1) -and r1.xy, CB0[0][1].xxxx, l(0x00008000, 2047, 0, 0) -if_nz r1.x - ult r0.w, vThreadIDInGroup.x, l(20) - and r0.w, r0.w, l(40) - uge r1.x, vThreadIDInGroup.x, l(20) - and r1.x, r1.x, l(-40) - iadd r0.w, r0.w, r1.x - iadd r0.z, r0.w, r0.z -endif -ushr r0.w, CB0[0][1].x, l(16) -imad r0.w, vThreadGroupID.y, r0.w, r1.y -iadd r0.w, r0.w, vThreadGroupID.x -imul null, r1.x, vThreadIDInGroup.y, l(320) -imad r0.w, r0.w, l(5120), r1.x -ishl r0.z, r0.z, l(2) -iadd r0.z, r0.z, r0.w -ubfe r0.w, l(1), l(13), CB0[0][1].x -ishl r0.w, r0.w, l(1) -ishl r0.z, r0.z, r0.w -store_raw U0[0].xy, r0.z, r0.xyxx -ret -// Approximately 73 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.cso deleted file mode 100644 index 1dd12cb19ed6d6ff47944307e6569ccf24516077..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2660 zcmbtVO=}Zj5T0z?Xk*o?6-7kXPpYW2MNmX^wQW?WpQ%z$OH8&ll6GTu{Wxh*^dRC% z@F0Q;iqNaSLA)sl;!P0`o&>$GB)+6C ze?R~3xdB7jtA7T7o6zG4ASWZY|EAn zZK7@^xYzJT$SyGHC3qe<31%E6`<=Qs;Q8RWa9;^-L5yd|yc+mHzMP%(i(xkJM{!sV z{3yIs&IQuSlnw^5*JeGi%HrJ1;!y=e1K*^ zw(NtRn7MGrfa4tI!WDqyjOW7L1g`rZaP^^-V?P%b!?K?bO7Vmrj*mw{Ecq*8Igc?+ z0CC#L1rgQ#USzru9_-qpreIc zIgG;b*zG;F#XUTd8F4cc*?drT2gAuyp@^6Mz8(E?By;E(XH23z-t;?jczEnS7V#ub z{25xkFkcd9vBv3peN`WQpw%ip!P=&;HQH!+ME$q^8pwM3Se1cpN2<~_65BHYJ$LLO zj`#PMd&9p)-+5J@TKOot=yZ#CAFHvVg@SgN~SX~aImSbhM{ z+$rOizUI~v;dugT+S$M3Rd@Y5*1gW@MKxde&r_W0DCsw9#ZVn%{hFECZ}VM|9>(Ce zhxQeaHdEJ3c07>^%(HyjL?xW&sf~YrDhLT8JR4(qQp3#Rd1x@)vUbVyhl6-?9vkU zL2|stv!R_j;%(MGC`q`BN!G$zQ?4Tk4}N&ZJi5*qebTy5oRj0>L8{=c@XrvmR@&Rx z3w?3+$@NV!@wd!-mb}qIkC>^aMt^4E>^)@MUOqq{a3MK+jl0L-H79M_hw6COSp&u_RMK)z^D|n3g0u0v(>~wj(T5eO98hTx#g|ML9NNm(L-a1S_jc7}jq0r8bR&Jzk*o63?@tTnO3RBXcNL{ne*ce#Jb;On!V?hln-O8gzfO zK3dhrxFV0Gl`k#yWv%;AZf5kr=zY9z2lKyz)K(MtXBJrmuJ&bgtpw-PO!WC5V$9#t CxiDz} diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.h deleted file mode 100644 index c5a2d2118..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.h +++ /dev/null @@ -1,226 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_store_depth_float24and32.cs.hlsl -const uint8_t edram_store_depth_float24and32_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC6, 0x10, 0x80, 0x14, 0x97, 0x01, 0xE4, 0x46, - 0x76, 0xF1, 0x67, 0xD3, 0xDF, 0x50, 0x25, 0xF7, 0x01, 0x00, 0x00, 0x00, - 0x64, 0x0A, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.txt deleted file mode 100644 index 1a0cc82cc..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float24and32_cs.txt +++ /dev/null @@ -1,95 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 5 -dcl_thread_group 20, 16, 1 -ishl r0.xy, vThreadID.xxxx, l(4, 2, 0, 0) -imad r0.xy, vThreadID.yyyy, CB0[0][0].ywyy, r0.xyxx -iadd r0.xy, r0.xyxx, CB0[0][0].xzxx -ld_raw r1.xyzw, r0.x, T0[0].xyzw -uge r2.xyzw, l(0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff), r1.xyzw -and r2.xyzw, r1.xyzw, r2.xyzw -umin r2.xyzw, r2.xyzw, l(0x3ffffff8, 0x3ffffff8, 0x3ffffff8, 0x3ffffff8) -bfi r3.xyzw, l(23, 23, 23, 23), l(0, 0, 0, 0), r2.xyzw, l(0x00800000, 0x00800000, 0x00800000, 0x00800000) -ushr r4.xyzw, r2.xyzw, l(23, 23, 23, 23) -iadd r4.xyzw, -r4.xyzw, l(113, 113, 113, 113) -umin r4.xyzw, r4.xyzw, l(24, 24, 24, 24) -ushr r3.xyzw, r3.xyzw, r4.xyzw -ult r4.xyzw, r2.xyzw, l(0x38800000, 0x38800000, 0x38800000, 0x38800000) -iadd r2.xyzw, r2.xyzw, l(0xc8000000, 0xc8000000, 0xc8000000, 0xc8000000) -movc r2.xyzw, r4.xyzw, r3.xyzw, r2.xyzw -iadd r3.xyzw, r2.xyzw, l(3, 3, 3, 3) -ubfe r2.xyzw, l(1, 1, 1, 1), l(3, 3, 3, 3), r2.xyzw -iadd r2.xyzw, r2.xyzw, r3.xyzw -ushr r2.xyzw, r2.xyzw, l(3, 3, 3, 3) -ld_raw r0.x, r0.y, T0[0].xxxx -ushr r0.yzw, r0.xxxx, l(0, 8, 16, 24) -bfi r0.xyzw, l(24, 24, 24, 24), l(8, 8, 8, 8), r2.xyzw, r0.xyzw -ishl r2.x, vThreadIDInGroup.x, l(2) -and r2.yz, CB0[0][1].xxxx, l(0, 0x00008000, 2047, 0) -if_nz r2.y - ult r2.y, vThreadIDInGroup.x, l(10) - uge r2.w, vThreadIDInGroup.x, l(10) - and r2.yw, r2.yyyw, l(0, 40, 0, -40) - iadd r2.y, r2.w, r2.y - iadd r2.x, r2.y, r2.x -endif -ushr r2.y, CB0[0][1].x, l(16) -imad r2.y, vThreadGroupID.y, r2.y, r2.z -iadd r2.y, r2.y, vThreadGroupID.x -imul null, r2.z, vThreadIDInGroup.y, l(320) -imad r2.y, r2.y, l(5120), r2.z -ishl r2.x, r2.x, l(2) -iadd r2.x, r2.x, r2.y -ubfe r2.y, l(1), l(13), CB0[0][1].x -ishl r2.y, r2.y, l(1) -ishl r2.x, r2.x, r2.y -store_raw U0[0].xyzw, r2.x, r0.xyzw -iadd r0.x, r2.x, l(0x00a00000) -store_raw U0[0].xyzw, r0.x, r1.xyzw -ret -// Approximately 45 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.cso deleted file mode 100644 index b636e8d752c13074a4df604f5c44f04b355f32b7..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2600 zcmbtV&1)2A7=JQJRw4+JZ2=SwC4DmFqyA!gq$!upvv=joB zHmXfMegDJ6@ue5nrUxE8?h=u~qDU{~32=Y6$N=~#c&Sh1%Gh}6xg$bc4<1meC> zd6Z6n!nSSO*a7Nxfd>tL1=$ZKJp-=;7r>08WWQ7QH+VgGE!@8ZcOb^IW8Mz@pcYl; z{YF@+`Ee3PfgguAqiP_XOtm0RWF{D=%OpI?bQld6;-s>W#In51yqwbjlDLpc|Cppb zP+%O=&j)A)WXmDwiCGJG5jf6aEnFQq&Uh`{ec(2K0kZ9fJE|$?biEQ|k(K#oBZ&Qx z+osA4bfI32!Z@5w+`%h{+=mUb?Q~7?*w-N`3T!R#W;F$F_8*-A2Px>i-+gK-Sa8Q5o6nNGe?; zaeC&U=RTict=l2FH%|JHNZ&~Mi}%A3$NRWQdG=zuOlyiY_F$e{P$R~RQJs6KG$X88Xe#>l}9h2{v(+1`>xWzNj@!j!6zK66~d(oJR z<2TV}1#7}idCtzMUGX^fbJsSi^fpN^SITV!`(&}nl7ryh;iPi-blyGY`ovRN8AI> z(iZkXa=iB4&`urkHftZ0B;3UUYhler*O4v{et5_4{_93xuw#ovs6dSe#D@!$X&%!Itch2-ot?kR)UoU~~ls^eW} zJv-12X4HjRUGyg}Ab!S4hLT&=5wHaL}!Cv!3pU)xs{|~tZD$xJ{ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.h deleted file mode 100644 index 843cf9070..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.h +++ /dev/null @@ -1,221 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_store_depth_float.cs.hlsl -const uint8_t edram_store_depth_float_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF1, 0x72, 0x64, 0x54, 0x9D, 0xF6, 0x79, 0x48, - 0x2F, 0x8C, 0xD1, 0x59, 0x56, 0x1C, 0x90, 0x9A, 0x01, 0x00, 0x00, 0x00, - 0x28, 0x0A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0x8C, 0x09, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, -}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.txt deleted file mode 100644 index ef8dcdfe6..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_float_cs.txt +++ /dev/null @@ -1,93 +0,0 @@ -// -// Generated by Microsoft (R) HLSL Shader Compiler 10.1 -// -// -// Buffer Definitions: -// -// cbuffer XeEdramLoadStoreConstants -// { -// -// uint xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 4 -dcl_thread_group 20, 16, 1 -ishl r0.xy, vThreadID.xxxx, l(4, 2, 0, 0) -imad r0.xy, vThreadID.yyyy, CB0[0][0].ywyy, r0.xyxx -iadd r0.xy, r0.xyxx, CB0[0][0].xzxx -ld_raw r1.xyzw, r0.x, T0[0].xyzw -uge r2.xyzw, l(0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff), r1.xyzw -and r1.xyzw, r1.xyzw, r2.xyzw -umin r1.xyzw, r1.xyzw, l(0x3ffffff8, 0x3ffffff8, 0x3ffffff8, 0x3ffffff8) -bfi r2.xyzw, l(23, 23, 23, 23), l(0, 0, 0, 0), r1.xyzw, l(0x00800000, 0x00800000, 0x00800000, 0x00800000) -ushr r3.xyzw, r1.xyzw, l(23, 23, 23, 23) -iadd r3.xyzw, -r3.xyzw, l(113, 113, 113, 113) -umin r3.xyzw, r3.xyzw, l(24, 24, 24, 24) -ushr r2.xyzw, r2.xyzw, r3.xyzw -ult r3.xyzw, r1.xyzw, l(0x38800000, 0x38800000, 0x38800000, 0x38800000) -iadd r1.xyzw, r1.xyzw, l(0xc8000000, 0xc8000000, 0xc8000000, 0xc8000000) -movc r1.xyzw, r3.xyzw, r2.xyzw, r1.xyzw -iadd r2.xyzw, r1.xyzw, l(3, 3, 3, 3) -ubfe r1.xyzw, l(1, 1, 1, 1), l(3, 3, 3, 3), r1.xyzw -iadd r1.xyzw, r1.xyzw, r2.xyzw -ushr r1.xyzw, r1.xyzw, l(3, 3, 3, 3) -ld_raw r0.x, r0.y, T0[0].xxxx -ushr r0.yzw, r0.xxxx, l(0, 8, 16, 24) -bfi r0.xyzw, l(24, 24, 24, 24), l(8, 8, 8, 8), r1.xyzw, r0.xyzw -ishl r1.x, vThreadIDInGroup.x, l(2) -and r1.yz, CB0[0][1].xxxx, l(0, 0x00008000, 2047, 0) -if_nz r1.y - ult r1.y, vThreadIDInGroup.x, l(10) - uge r1.w, vThreadIDInGroup.x, l(10) - and r1.yw, r1.yyyw, l(0, 40, 0, -40) - iadd r1.y, r1.w, r1.y - iadd r1.x, r1.y, r1.x -endif -ushr r1.y, CB0[0][1].x, l(16) -imad r1.y, vThreadGroupID.y, r1.y, r1.z -iadd r1.y, r1.y, vThreadGroupID.x -imul null, r1.z, vThreadIDInGroup.y, l(320) -imad r1.y, r1.y, l(5120), r1.z -ishl r1.x, r1.x, l(2) -iadd r1.x, r1.x, r1.y -ubfe r1.y, l(1), l(13), CB0[0][1].x -ishl r1.y, r1.y, l(1) -ishl r1.x, r1.x, r1.y -store_raw U0[0].xyzw, r1.x, r0.xyzw -ret -// Approximately 43 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.cso deleted file mode 100644 index 7b5a10b1909828ff3a861e4299079eb1f4b47c68..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 1976 zcmbVNO=}Zj5T0!M8Pig&LMcV#C#{II#gmG}ri~S1YfUZnw4}+FMAB}^uGoW=qUb@y zlQ-!>MG<-})U$uUp2V9X9(wZ7i{M3{C%cnwLQ2Ge*~!j4^ZCxZ8J{0ZTw3|~U~BzN zYJKL{*S^i6t&oU(XcuXPya0}dMFzmiWQgKA(b&f=QcTgpxKe<0u7xQ}+qn0d9udA-DlCUNGj0Wm>s%X2~qtnVjjkcG)r= z`(8O~Nh4Fva$K3WCg_raN16@^d)aX_%dR6E8_df&4IoJjQt5}Ev;_)`L!x|u{(ypV z7J72IsT#_G7%a<)*^EI~&#)j2I>92{h3sZ_Kab9BY8(gWQnWXrZ= zFS@b8TSKwQR5}$)=QBC0981_sr9u%uMuyLi$o2HKDbAQgIbHXjo}8H9!LrZb#DBwn zw?jgAu*S*f!*r<FO4`HL7X@H;`id2$U){I8F5cXy)t#g2RYg8)kR6d zY}!~$rB=)`6!-2S-lGe?zAexnaRx9ITEji%#|d;yTEgsw_G!dCQ5Q1;{Y~f}HqgT- z^4izWb$Kz2I2=HOo{%s29$@zE8uy})*POIzAFAW*SVFdJ+mF<5Kl}ganeQ(ZKIUrx diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.h deleted file mode 100644 index 1dd92774f..000000000 --- a/src/xenia/gpu/d3d12/shaders/dxbc/edram_store_depth_unorm_cs.h +++ /dev/null @@ -1,169 +0,0 @@ -// generated from `xb buildhlsl` -// source: edram_store_depth_unorm.cs.hlsl -const uint8_t edram_store_depth_unorm_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x3B, 0x78, 0xC2, 0x7C, 0xB7, 0x9D, 0xA3, 0x4C, - 0x9D, 0x51, 0xF7, 0xDF, 0x18, 0xB4, 0x29, 0xB7, 0x01, 0x00, 0x00, 0x00, - 0xB8, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0x0C, 0x03, 0x00, 0x00, 0x1C, 0x03, 0x00, 0x00, 0x2C, 0x03, 0x00, 0x00, - 0x1C, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xD0, 0x02, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, - 0xA8, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, - 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 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xe_edram_rt_color_depth_offset;// Offset: 0 Size: 4 -// uint xe_edram_rt_color_depth_pitch;// Offset: 4 Size: 4 -// uint xe_edram_rt_stencil_offset; // Offset: 8 Size: 4 -// uint xe_edram_rt_stencil_pitch; // Offset: 12 Size: 4 -// uint xe_edram_base_samples_2x_depth_pitch;// Offset: 16 Size: 4 -// -// } -// -// -// Resource Bindings: -// -// Name Type Format Dim ID HLSL Bind Count -// ------------------------------ ---------- ------- ----------- ------- -------------- ------ -// xe_edram_load_store_source texture byte r/o T0 t0 1 -// xe_edram_load_store_dest UAV byte r/w U0 u0 1 -// XeEdramLoadStoreConstants cbuffer NA NA CB0 cb0 1 -// -// -// -// Input signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Input -// -// Output signature: -// -// Name Index Mask Register SysValue Format Used -// -------------------- ----- ------ -------- -------- ------- ------ -// no Output -cs_5_1 -dcl_globalFlags refactoringAllowed -dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 -dcl_resource_raw T0[0:0], space=0 -dcl_uav_raw U0[0:0], space=0 -dcl_input vThreadGroupID.xy -dcl_input vThreadIDInGroup.xy -dcl_input vThreadID.xy -dcl_temps 2 -dcl_thread_group 20, 16, 1 -ishl r0.xy, vThreadID.xxxx, l(4, 2, 0, 0) -imad r0.xy, vThreadID.yyyy, CB0[0][0].ywyy, r0.xyxx -iadd r0.xy, r0.xyxx, CB0[0][0].xzxx -ld_raw r1.xyzw, r0.x, T0[0].xyzw -ld_raw r0.x, r0.y, T0[0].xxxx -ushr r0.yzw, r0.xxxx, l(0, 8, 16, 24) -bfi r0.xyzw, l(24, 24, 24, 24), l(8, 8, 8, 8), r1.xyzw, r0.xyzw -ishl r1.x, vThreadIDInGroup.x, l(2) -and r1.yz, CB0[0][1].xxxx, l(0, 0x00008000, 2047, 0) -if_nz r1.y - ult r1.y, vThreadIDInGroup.x, l(10) - uge r1.w, vThreadIDInGroup.x, l(10) - and r1.yw, r1.yyyw, l(0, 40, 0, -40) - iadd r1.y, r1.w, r1.y - iadd r1.x, r1.y, r1.x -endif -ushr r1.y, CB0[0][1].x, l(16) -imad r1.y, vThreadGroupID.y, r1.y, r1.z -iadd r1.y, r1.y, vThreadGroupID.x -imul null, r1.z, vThreadIDInGroup.y, l(320) -imad r1.y, r1.y, l(5120), r1.z -ishl r1.x, r1.x, l(2) -iadd r1.x, r1.x, r1.y -ubfe r1.y, l(1), l(13), CB0[0][1].x -ishl r1.y, r1.y, l(1) -ishl r1.x, r1.x, r1.y -store_raw U0[0].xyzw, r1.x, r0.xyzw -ret -// Approximately 28 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.cso index a55fc73763fcd9af147e94f614da8a6dd3856f07..dc2c363abbcd945d854307bfc9517816aed8bb1d 100644 GIT binary patch delta 135 zcmbQiw}8*kCBn(s`Dx-Ce$O(2m3Nz8AJxtOz{tSBpuo<+zzU>IfOr8APhetTI0D2i z8x5y3aqeJdU)~SV9*i}U=RY*j1C|kgTrPXW+7J^`Z aY$co^gSmm2WAaBf^~oF91SVf$a{&N;E*w4p delta 125 zcmZ3$H-pd6CBn)1e&J^>uiJ+kKWr)hAz&HT diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h index b155ee5d0..13a643d2d 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: float24_round.ps.hlsl const uint8_t float24_round_ps[] = { - 0x44, 0x58, 0x42, 0x43, 0xDF, 0x71, 0xF3, 0x0A, 0x4A, 0xDB, 0xC3, 0x80, - 0x1E, 0xE4, 0x39, 0x21, 0x59, 0x07, 0x78, 0x97, 0x01, 0x00, 0x00, 0x00, - 0x18, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x43, 0xE5, 0x61, 0xEC, 0x0F, 0x49, 0x76, 0x10, + 0xA9, 0xDD, 0x83, 0xEB, 0xC5, 0x2D, 0x6F, 0xF0, 0x01, 0x00, 0x00, 0x00, + 0x20, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0xC4, 0x02, 0x00, 0x00, - 0x7C, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, + 0x84, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFF, 0xFF, 0x00, 0x05, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -60,97 +60,97 @@ const uint8_t float24_round_ps[] = { 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x01, 0x0E, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x44, 0x65, 0x70, 0x74, 0x68, 0x00, 0xAB, 0xAB, 0xAB, - 0x53, 0x48, 0x45, 0x58, 0xB0, 0x03, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, - 0xEC, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x64, 0x38, 0x00, 0x04, + 0x53, 0x48, 0x45, 0x58, 0xB8, 0x03, 0x00, 0x00, 0x51, 0x00, 0x00, 0x00, + 0xEE, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x64, 0x38, 0x00, 0x04, 0x42, 0x10, 0x10, 0x00, 0x12, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x65, 0x00, 0x00, 0x02, 0x01, 0xC0, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, - 0x02, 0x00, 0x00, 0x00, 0x36, 0x20, 0x08, 0x05, 0x12, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x38, 0x20, 0x08, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x10, 0x10, 0x00, 0x12, 0x00, 0x00, 0x00, - 0x50, 0x00, 0x10, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 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0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x08, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x38, 0x0F, 0x72, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, + 0x14, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x87, 0x00, 0x40, 0x05, 0x82, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x40, 0x07, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0xF5, 0xFF, 0xFF, 0xFF, 0x37, 0x00, 0x40, 0x09, 0x82, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x15, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x08, 0x08, 0x12, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x08, 0x09, 0x12, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x40, 0x07, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x40, 0x07, 0x82, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0xFF, 0xFF, 0x0F, 0x00, 0x37, 0x00, 0x10, 0x09, + 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x20, 0x07, + 0x42, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x20, 0x07, 0x42, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x80, 0x37, 0x29, 0x00, 0x10, 0x07, 0x22, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x10, 0x07, + 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x08, 0x08, 0x01, 0xC0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt index c9661e6ac..6ecef007a 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/float24_round_ps.txt @@ -41,7 +41,7 @@ dcl_globalFlags refactoringAllowed dcl_input_ps_siv linear noperspective sample v18.z, position dcl_output oDepth dcl_temps 2 -mov_sat [precise(x)] r0.x, v18.z +mul_sat [precise(x)] r0.x, v18.z, l(2.000000) uge [precise(y)] r0.y, l(0x7fffffff), r0.x and [precise(x)] r0.x, r0.x, r0.y umin [precise(x)] r0.x, r0.x, l(0x3ffffff8) @@ -66,7 +66,7 @@ ishl [precise(w)] r0.w, r0.y, r0.w and [precise(w)] r0.w, r0.w, l(0x000fffff) movc [precise(y)] r0.y, r0.z, r0.y, r0.w ishl [precise(z)] r0.z, r1.x, l(23) -iadd [precise(z)] r0.z, r0.z, l(0x38000000) +iadd [precise(z)] r0.z, r0.z, l(0x37800000) ishl [precise(y)] r0.y, r0.y, l(3) iadd [precise(y)] r0.y, r0.z, r0.y movc [precise(x)] oDepth, r0.x, r0.y, l(0) diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.cso b/src/xenia/gpu/d3d12/shaders/dxbc/float24_truncate_ps.cso index a22366f58ae8811c10d9b0abd7460227ca0c1f55..bf3336db653f24820f52a2985dff56ad91f4416b 100644 GIT binary patch delta 206 zcmeyvv4qpeCBn)1Qj5vg>kmrqG}f_QxFIHeoRNWnVF?QZ11pd=0pbNfJb{UU;S3OS zuxvD%$HZv@R1*jk_MLo_NnOT5frDL$K>)~SV9*i}U=RY*j1C|kgTrJI=57vdsO;p$ z%o<*-Fr`o>45C2Q77QG0j0H>#Tu@`6a`tvWx!@4TkSRd3cz_t>HV^>ECBn&hM_{Pzmyah8@F-n&o^ro=E+Yd2Lk$Z911pd=0pbNfJb{UU;S3Nz zVBTmnkBO59s3s67>^%7J^M@Au{FO?_+ zy8_;TZ(tGy8~K`1C^iufBZEK*{rqwh`>~j@$aW5l2V8)i0U2BFLEGzihg}h`B}A!W zRfN^rZ#r#}_fF5<6F8~mr4*H|&Fv)gypskBkTC^vj-kM@>brHP-E}U?2ASxoB9B!E zJ!>oqFd;1#$pt>o;XK<}&@MFcrdcz1Xw~buUDrFKe!p*(3Jn3#4wNP6jx|#Dh$f?v z2qJ$c2cy!$kB?CMhR<`EEv&>gK{P#2z9t;>D!Q*(#cz*})`-ICAXf~m3O(PCDN#r7 zs4k5w@jiU+a4$j~d;kYfbvC_wFv}hTyJ(L=uc~uq7`-g-D(@<1uj3k)owKhX<@e%q W8S?*fEIBBQ`H}A?=Z)F+Pxc4A%0le` literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h new file mode 100644 index 000000000..1a308e32c --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.h @@ -0,0 +1,67 @@ +// generated from `xb buildhlsl` +// source: fullscreen_tc.vs.hlsl +const uint8_t fullscreen_tc_vs[] = { + 0x44, 0x58, 0x42, 0x43, 0xC8, 0x08, 0xCC, 0x41, 0x31, 0xE3, 0x4F, 0xEB, + 0x8F, 0xB9, 0xCA, 0xA7, 0x9E, 0xCB, 0xE6, 0x3C, 0x01, 0x00, 0x00, 0x00, + 0xF0, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x2C, 0x01, 0x00, 0x00, + 0x54, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, + 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, + 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, + 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x56, + 0x65, 0x72, 0x74, 0x65, 0x78, 0x49, 0x44, 0x00, 0x4F, 0x53, 0x47, 0x4E, + 0x50, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0C, 0x00, 0x00, + 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x54, 0x45, 0x58, 0x43, 0x4F, 0x4F, 0x52, 0x44, 0x00, 0x53, 0x56, 0x5F, + 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, 0xAB, 0xAB, 0xAB, + 0x53, 0x48, 0x45, 0x58, 0x20, 0x01, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, + 0x48, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x60, 0x00, 0x00, 0x04, + 0x12, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x67, 0x00, 0x00, 0x04, 0xF2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x0A, 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x32, 0x00, 0x00, 0x0F, 0x32, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, + 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x08, 0xC2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x36, 0x00, 0x00, 0x05, + 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, + 0x94, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt new file mode 100644 index 000000000..5c052f2c8 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_tc_vs.txt @@ -0,0 +1,34 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_VertexID 0 x 0 VERTID uint x +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// TEXCOORD 0 xy 0 NONE float xy +// SV_Position 0 xyzw 1 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input_sgv v0.x, vertex_id +dcl_output o0.xy +dcl_output_siv o1.xyzw, position +dcl_temps 1 +ishl r0.y, v0.x, l(1) +mov r0.x, v0.x +and r0.xy, r0.xyxx, l(2, 2, 0, 0) +utof r0.xy, r0.xyxx +mad o1.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) +mov o1.zw, l(0,0,0,1.000000) +mov o0.xy, r0.xyxx +ret +// Approximately 8 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.cso index 8b13728d278ea5df6066cf0da746811827b725bd..123c02a0e3c44e4fd1b63d7f003c72ecfd8deb68 100644 GIT binary patch delta 302 zcmeysx`x%zCBn%$-~E;LJGT`@f)l$Z&Zyb9g^_`QVGR=l11pd=0pbNfd?0ZVV80Ob#Gk1CRt^2w-vm z(GB|{7{q2^FatXE5Y%iY2apIdXt1{f8Xg?t7%~MY%nrmL+dzN`h|$=SH#6xnGEH8| GJ^M@Au{FO?_+ zy8_;TZ(tGy8~K`1C^iufBZEK*{rqwh`>~j@$aW5l2V8)i0U2BFLEGzihg}h`B}A!W zRfN^rZ#r#}_fF5<6F8~mr4*H|&Fv)gypskBkTC^vj-kM@>brHP-E}U?2ASxoB9B!E zJ!>oqFd;1#$pt>o;XK<}&@MFcrdcz1Xw~buUDrFKe!p*(3Jn3#4wNP6jx|#Dh$f?v z2qJ$c2cy!$kB?CMhR<`EEv&>gK{P#2z9t;>D!Q*(#cz*})`-ICAXf~m3O(PCDN#r7 zs4k5w@jiU+a4$j~d;kYfbvC_wFv}hTyJ(L=uc~uq7`-g-D(@<1uj3k)owKhX<@e%q W8S?*fEIBBQ`H}A?=Z)F+Pxc4A%0le` diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h index dfea94521..ffd08d3aa 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: fullscreen.vs.hlsl const uint8_t fullscreen_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0xC8, 0x08, 0xCC, 0x41, 0x31, 0xE3, 0x4F, 0xEB, - 0x8F, 0xB9, 0xCA, 0xA7, 0x9E, 0xCB, 0xE6, 0x3C, 0x01, 0x00, 0x00, 0x00, - 0xF0, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x2C, 0x01, 0x00, 0x00, - 0x54, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x6F, 0x47, 0xEA, 0x2B, 0xEE, 0x46, 0xA8, 0x72, + 0x11, 0x91, 0x8B, 0x91, 0x98, 0x7C, 0xBE, 0xB4, 0x01, 0x00, 0x00, 0x00, + 0xAC, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00, 0x00, + 0x10, 0x02, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -19,49 +19,43 @@ const uint8_t fullscreen_vs[] = { 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, 0x53, 0x56, 0x5F, 0x56, 0x65, 0x72, 0x74, 0x65, 0x78, 0x49, 0x44, 0x00, 0x4F, 0x53, 0x47, 0x4E, - 0x50, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x0C, 0x00, 0x00, - 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x54, 0x45, 0x58, 0x43, 0x4F, 0x4F, 0x52, 0x44, 0x00, 0x53, 0x56, 0x5F, - 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, 0xAB, 0xAB, 0xAB, - 0x53, 0x48, 0x45, 0x58, 0x20, 0x01, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, - 0x48, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x60, 0x00, 0x00, 0x04, + 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x53, 0x56, 0x5F, 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, + 0x53, 0x48, 0x45, 0x58, 0x00, 0x01, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x60, 0x00, 0x00, 0x04, 0x12, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x65, 0x00, 0x00, 0x03, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x67, 0x00, 0x00, 0x04, 0xF2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x67, 0x00, 0x00, 0x04, 0xF2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x68, 0x00, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00, - 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x55, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x32, 0x00, 0x00, 0x0F, 0x32, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x32, 0x00, 0x00, 0x0F, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00, 0xC0, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x08, 0xC2, 0x20, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x08, 0xC2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x36, 0x00, 0x00, 0x05, - 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x3F, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt index 5c052f2c8..568c30dc5 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/fullscreen_vs.txt @@ -14,21 +14,18 @@ // // Name Index Mask Register SysValue Format Used // -------------------- ----- ------ -------- -------- ------- ------ -// TEXCOORD 0 xy 0 NONE float xy -// SV_Position 0 xyzw 1 POS float xyzw +// SV_Position 0 xyzw 0 POS float xyzw // vs_5_1 dcl_globalFlags refactoringAllowed dcl_input_sgv v0.x, vertex_id -dcl_output o0.xy -dcl_output_siv o1.xyzw, position +dcl_output_siv o0.xyzw, position dcl_temps 1 -ishl r0.y, v0.x, l(1) +ushr r0.y, v0.x, l(1) mov r0.x, v0.x -and r0.xy, r0.xyxx, l(2, 2, 0, 0) +and r0.xy, r0.xyxx, l(1, 1, 0, 0) utof r0.xy, r0.xyxx -mad o1.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000) -mov o1.zw, l(0,0,0,1.000000) -mov o0.xy, r0.xyxx +mad o0.xy, r0.xyxx, l(4.000000, 4.000000, 0.000000, 0.000000), l(-1.000000, -1.000000, 0.000000, 0.000000) +mov o0.zw, l(0,0,0,1.000000) ret -// Approximately 8 instruction slots used +// Approximately 7 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_1xmsaa_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..a278d8619cb56efda3608e2fab35d233bd033103 GIT binary patch literal 2404 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0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.txt new file mode 100644 index 000000000..cebf51288 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_2xmsaa_cs.txt @@ -0,0 +1,108 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeHostDepthStoreRectangleConstants +// { +// +// uint xe_host_depth_store_rectangle;// Offset: 0 Size: 4 +// +// } +// +// cbuffer XeHostDepthStoreRenderTargetConstants +// { +// +// uint xe_host_depth_store_render_target;// Offset: 0 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_host_depth_store_source texture float 2dMS T0 t0 1 +// xe_host_depth_store_dest UAV uint4 buf U0 u0 1 +// XeHostDepthStoreRectangleConstants cbuffer NA NA CB0 cb0 1 +// XeHostDepthStoreRenderTargetConstants cbuffer NA NA CB1 cb1 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_constantbuffer CB1[1:1][1], immediateIndexed, space=0 +dcl_resource_texture2dms(0) (float,float,float,float) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 5 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(2), l(10), CB1[1][0].x +ubfe r0.y, l(10), l(20), CB0[0][0].x +imul null, r0.y, r0.x, r0.y +ult r0.y, r0.y, vThreadID.x +if_nz r0.y + ret +endif +ushr r1.y, CB0[0][0].x, l(10) +mov r1.x, CB0[0][0].x +bfi r0.yz, l(0, 10, 10, 0), l(0, 3, 3, 0), r1.xxyx, l(0, 0, 0, 0) +ishl r1.x, vThreadID.x, l(3) +ushr r1.y, vThreadID.y, l(1) +imad r1.xy, r0.yzyy, r0.xxxx, r1.xyxx +and r2.y, vThreadID.y, l(1) +and r0.y, CB1[1][0].x, l(1023) +ishl r1.z, r1.y, l(1) +mov r2.x, l(0) +iadd r0.zw, r1.xxxz, r2.xxxy +imul null, r2.xz, r0.xxxx, l(80, 0, 16, 0) +udiv r3.xy, null, r0.zwzz, r2.xzxx +imad r0.x, r3.y, r0.y, r3.x +imad r0.yz, -r3.xxyx, r2.xxzx, r0.zzwz +imul null, r0.w, r2.z, r2.x +imad r0.y, r0.z, r2.x, r0.y +imad r0.x, r0.x, r0.w, r0.y +ushr r0.x, r0.x, l(2) +ubfe r0.y, l(2), l(12), CB1[1][0].x +movc r0.y, r2.y, r0.y, l(0) +mov r1.w, l(0) +ldms r2.x, r1.xyww, T0[0].xyzw, r0.y +iadd r3.xyzw, r1.xyxy, l(2, 0, 1, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y +mov r3.zw, l(0,0,0,0) +ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y +iadd r3.xyzw, r1.xyxy, l(4, 0, 3, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.w, r4.xyzw, T0[0].yzwx, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r0.z, r0.x, l(1) +mov r3.zw, l(0,0,0,0) +ldms r2.x, r3.xyzw, T0[0].xyzw, r0.y +iadd r3.xyzw, r1.xyxy, l(6, 0, 5, 0) +mov r4.xy, r3.zwzz +mov r4.zw, l(0,0,0,0) +ldms r2.y, r4.xyzw, T0[0].yxzw, r0.y +mov r3.zw, l(0,0,0,0) +ldms r2.z, r3.xyzw, T0[0].yzxw, r0.y +iadd r1.xy, r1.xyxx, l(7, 0, 0, 0) +mov r1.zw, l(0,0,0,0) +ldms r2.w, r1.xyzw, T0[0].yzwx, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw +ret +// Approximately 55 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/host_depth_store_4xmsaa_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..ab063be02b0302335d852d207deb3dac47467abd GIT binary patch literal 2536 zcmbtVJxo+V5Z-&h0SD?uln@Fz@h3nG0W=oI=mU-u69naeoQcT=xF=wcBX`e8VF;l# z#KIUFjTNyuOG_&&3kqXpVPT`OvY^n$h~Kxnb3C4y5S=)0c4xks`F3_al9|5#(t)90 zQ;TmmFSk5y`rNV67*R@ntyQWD_8j!3qtt8YCUgk?(d0mC5o`QYw*an$y$Fp|rTdwb zLZG1`d5XR!Xq(lOu=P;NM=0~zBMKE^@1Xp^hV`k8Z9`!6T55404=2(Ip*t8l8{BBb z4n{(>OI~(1U-Yv%Z_%I47X5s|%NFzZ3e(=6p`2IrRmK}cN|G6ACX9O1{^Y{Uyw{&! zC}QOo_kb+qyu#RIVaD@!P^D6d=OK?ZeBzcT4f)gmGvt3oCxmn2TtC>o%uDQE=PC$K zmAjuWVR?_xNj8D}TR$E;>+4giYje|ud@+C9PqdA;CkBVoLy7e4Bmjy2 z{N2U5c`UlSI=fY=bTxftxW=?qv?HN?dT=1KgvWFPuj)BC-lZ0t9gG>a_8--8>Nh2`6RiV=}3l|3FRRd?9lXv8&l zMH@pbw$fGRfvrNjXsgA>P?I>R(HE$}T*i*TvPMu&v-LZr1Rt|`9oCLuKGH*c%{JDe zDl24t2`!F7!Ks#b@(A~mbDT#_o^dbC8fZ@0`i^Uu>a&}ra$K{hfT2>N5mU=?x!W!6 z2$y@=8S!b#?8u=xFuN1r-($J0SH*R)sO6KgesGM3Iko^vr8q7=5Z0zrgkv;)0D+SU`qxhi@#7ITN)e8m%tI{N#$tNYYXcN*25i1U*=J`r+`-#@1MV+Ut$I?T=nm&OVn;5 zhd$u|uEecBNR&ZAuB(CrSB)#~;DqZ2X0!F_csXC*VG23qD|~ns$HgZk;o0dk2WArF z6Pz7!f14d=!Wqf`N5|dyEr45#@RHezUu<|z#O-HJ8n=%*eaGx6GAI5%rpJ26p1^ko e%HMtp>rv{V)lkkXaB_~h!*G0`^Y)pm53r~^n_vIW$iTqB!^FVA3ZzYdcmWV!0b&lIL;(;7xwyKe z0Qtzk2FPJ#{r4ZF3B(o_c2Nb<5IVu3)LKyJ?BU|@^~DmM}k0P+|Z(is?7 zJ}E%hAal%s!D9sFyFt|e#W)T@#h4s`icmmnBAovRVLv+cS3n literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h new file mode 100644 index 000000000..7f0493fd5 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.h @@ -0,0 +1,48 @@ +// generated from `xb buildhlsl` +// source: passthrough_position_xy.vs.hlsl +const uint8_t passthrough_position_xy_vs[] = { + 0x44, 0x58, 0x42, 0x43, 0x5C, 0xDC, 0x00, 0xC7, 0xBE, 0x43, 0xB7, 0x99, + 0xAB, 0xC0, 0x04, 0x27, 0x43, 0x37, 0xD7, 0xFF, 0x01, 0x00, 0x00, 0x00, + 0x0C, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0xA0, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0x08, 0x01, 0x00, 0x00, + 0x70, 0x01, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x64, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4D, 0x69, 0x63, 0x72, 0x6F, 0x73, 0x6F, 0x66, 0x74, 0x20, 0x28, 0x52, + 0x29, 0x20, 0x48, 0x4C, 0x53, 0x4C, 0x20, 0x53, 0x68, 0x61, 0x64, 0x65, + 0x72, 0x20, 0x43, 0x6F, 0x6D, 0x70, 0x69, 0x6C, 0x65, 0x72, 0x20, 0x31, + 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x2C, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x50, 0x4F, 0x53, 0x49, + 0x54, 0x49, 0x4F, 0x4E, 0x00, 0xAB, 0xAB, 0xAB, 0x4F, 0x53, 0x47, 0x4E, + 0x2C, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x53, 0x56, 0x5F, 0x50, 0x6F, 0x73, 0x69, 0x74, 0x69, 0x6F, 0x6E, 0x00, + 0x53, 0x48, 0x45, 0x58, 0x60, 0x00, 0x00, 0x00, 0x51, 0x00, 0x01, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x5F, 0x00, 0x00, 0x03, + 0x32, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x67, 0x00, 0x00, 0x04, + 0xF2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x32, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x46, 0x10, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, + 0xC2, 0x20, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0x3F, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, + 0x94, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt new file mode 100644 index 000000000..3037421c3 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/passthrough_position_xy_vs.txt @@ -0,0 +1,26 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// POSITION 0 xy 0 NONE float xy +// +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// SV_Position 0 xyzw 0 POS float xyzw +// +vs_5_1 +dcl_globalFlags refactoringAllowed +dcl_input v0.xy +dcl_output_siv o0.xyzw, position +mov o0.xy, v0.xyxx +mov o0.zw, l(0,0,0,1.000000) +ret +// Approximately 3 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.cso index 13cca4e6c777e64e1027f9828128f8b9a205ce69..ca4d5d8371d2a1058b4ac16918440c15e9a02cd4 100644 GIT binary patch delta 926 zcmZY7KWGzi6bJD4Yt7~ED43j~7TVxZ6e?0kL8v7eif!$nphyLW!sXf?MoqZdL^*Mh zP7VbPzrm$Lq+l zrmvr$`t;-Zhs!s{(sS=eem(qiab6J7Zjva1@htL@PSoflS~^OUfnS}Txp1jGF(`)1 z*A`EmK*bYegFkCWjz2{lX$|C+_m0QcfedOJw;A_=Xx&};4;Txf(XS9C0+>?DU;5*7 z&;ckn?LqoY7l39MJ>W+1Rp_z~E-syAF}G@zdYrKGZ+L{S48LvoyBjn6}WVis&0 zF93gsaTVAEV(`Pi!KXaK5ADJin5kjh0mgvAg^X`N6KJ+tQq$k*kVZ5K?d&w8@&2>W zD~I$xGz*<jCxeMeamW;*R_qnH8_)jN*zj@}=@X zY{;?bc+Z|9Z$(!JY+SSFSS80R-Cc2t7She%bC%>mbV&B8rg$Ys)v08&RkrBn-4)C6 zmaT=Gc9E)8LA@m8L2@v$foFt9c78c$TP4>j*u~p2q1A*f-)h66D(kA*i`C>;ZB)i| PleeL#g}qhKw~qY>aB{B4 delta 999 zcmZY7O-K}B7zglY+>e=AHrkyPKghKq5Ehf75UOo8p^w*ZPuw;Cch)C}yis0IhQI8Szogk{6Bw9=pjg4Npx>6ZDCEck^ zWP5aUlri>sS)Orgm`vR!F1!jQL7+jkisvSW2miS;?ahbQu$V97{HQ$tW6IkUI46dVA z16srESgQ?O1L_!DWlq)JKgifBGKkKrc5EHob%c=o-||O~g32A75=fn2;QU?l$R^SdLtio{25| zeiP}aEscxi=tF5ksPcuDh%AQX$Dxu;Vn^-@zmzB?{zlT$C()^loR8z-%v*+;b8eeP z!8Ybh_bx-$&e?gxns*nX|+Tr6!fcgnCA-s^?<<9@yn)v>m74Q-`F|dQWUU FbqE^YzCQo} diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h index de5761c47..83c1341cf 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: primitive_point_list.gs.hlsl const uint8_t primitive_point_list_gs[] = { - 0x44, 0x58, 0x42, 0x43, 0x16, 0x84, 0x10, 0x1C, 0xE9, 0xAD, 0x76, 0xF9, - 0x92, 0xF2, 0xD5, 0x65, 0x7C, 0x8A, 0x5F, 0xC5, 0x01, 0x00, 0x00, 0x00, - 0x20, 0x1E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x0A, 0x00, 0x00, 0x28, 0x0D, 0x00, 0x00, 0xAC, 0x0F, 0x00, 0x00, - 0x84, 0x1D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x0A, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xDA, 0xEE, 0xAF, 0xCE, 0x4F, 0x67, 0x31, 0x3B, + 0x54, 0xC9, 0x28, 0xF2, 0x80, 0xF9, 0x4B, 0x5C, 0x01, 0x00, 0x00, 0x00, + 0xD8, 0x1D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x88, 0x0A, 0x00, 0x00, 0xE0, 0x0C, 0x00, 0x00, 0x64, 0x0F, 0x00, 0x00, + 0x3C, 0x1D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x47, 0x00, 0x05, 0x00, 0x00, - 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t primitive_point_list_gs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, 0x72, 0x00, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 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a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt index 436c59923..21fecd733 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/primitive_point_list_gs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.cso index c8f520f73050a0b79e9d15cc75f8fa70cbb9c71f..fd2517300efc23e732b28051e165cb7a2fb9facd 100644 GIT binary patch delta 237 zcmdlY*dS=+65-@rv-fo7w3&~ji7GQNa5jNi z3=CFKJzP*)3rfo|Ft9rzsR0=Qk^=#teqJLe`x%!&gCkIkkzw;D);uOg^~s7H!ra_I W5q2O3x^?nGM(N1`972IfY^bFfgu2h6M$HP zW22D~6Xyn?Tp&W$RfPCg*AgoUJEG248$M+vI_)wff(p(khaMS8KoyHa0pGd;P3zd6CNJU diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h index 9fc8abf3a..6f0de93dd 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_clear_32bpp_2xres.cs.hlsl const uint8_t resolve_clear_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x29, 0x97, 0x80, 0x0E, 0x8F, 0x8B, 0xA6, 0x1C, - 0xAD, 0xBD, 0xEA, 0x8B, 0xC0, 0xFF, 0x8D, 0x0D, 0x01, 0x00, 0x00, 0x00, - 0xB4, 0x08, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x7C, 0xBD, 0xCB, 0x69, 0x96, 0x7C, 0x8E, 0x1C, + 0x6A, 0x5C, 0xA7, 0x02, 0x1F, 0xF8, 0x31, 0x12, 0x01, 0x00, 0x00, 0x00, + 0x80, 0x08, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x18, 0x08, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0xE4, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -52,7 +52,7 @@ const uint8_t resolve_clear_32bpp_2xres_cs[] = { 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, - 0xB0, 0x05, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x6C, 0x01, 0x00, 0x00, + 0x7C, 0x05, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x5F, 0x01, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x08, 0x00, 0x07, @@ -107,84 +107,80 @@ const uint8_t resolve_clear_32bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0xA6, 0x8A, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0xC2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, 0x22, 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0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xF6, 0x0F, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x06, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, + 0x27, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt index 0c9fb1b7e..d3b04ecc8 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_2xres_cs.txt @@ -58,13 +58,10 @@ mov r1.y, vThreadID.y iadd r0.xy, r0.xyxx, r1.xyxx ubfe r0.z, l(12), l(13), CB0[0][0].z and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) -udiv r0.w, null, r0.x, l(80) -ushr r1.z, r0.y, l(4) -imad r1.x, r1.z, r1.x, r0.w -iadd r0.z, r0.z, r1.x -ineg r2.x, r0.w -ineg r2.y, r1.z -imad r0.xy, r2.xyxx, l(80, 16, 0, 0), r0.xyxx +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx if_nz r1.y uge r0.w, r0.x, l(40) movc r0.w, r0.w, l(-40), l(40) @@ -83,4 +80,4 @@ store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xxxx ret -// Approximately 42 instruction slots used +// Approximately 39 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..5987ca312a1429f2c3ef38ef413aa0427373a1b1 GIT binary patch literal 2744 zcmdT_Jxo(k6h3{F0!8F6CWa8L_!D3-K#V5DkOwV@2_m$pbt(;ggqqT4+JX+o5TXuf zoSc-w!7$jx!NJ*RVsv42aBy25( z9sASAnO}DwzI;Es77d8Vo3Kbd2bov5C zXJ_mr_YQ-56`z1S046;G2Ne@%7X;y8Y8!rU^2dkhL)LWLN)@c4om;h18LL>5q!o8R zqjtVnO6N;ODHE#>`~lpi9U)Bx)QB}}nOEOBCoS(`pEk^!cF+G}_YV84;a_%DIWOd_ zbRo5x&aGIolFgTfq+Bisq!TqVl0RKToGJ_}Q%EnTviU_@GPmqP22S)>N%}xMt@Tf5 zGH7AZMYxn*DA+}Nu@vcz_eCbB5>t`HQaWQ5B2jz!W;Tb#;K1oYxtO>x&7P1bFMGZd zljF(P4I;A`jPHndqfr9aMH(g^4>&&hM`yX&2;GlCz3s?Y%>7KE?L+9t5+u*@8CuMk zWcqK2v=6D1HB9%6nz66RFhwxFf^;hMZKF1i8JNTsM#zIjC!Hr`!@AOkl?<4!z7M({ zwb!NOu#&(JXc6EQd$!)vwq(}wri60LEKgj%9R~M{~AfC>( z+MjxyY4e!EWNo}xlr50`-rAui4*j+~=W4)bmqoUL6-@*Ct+JPGG&|@j4O3g--NTZ* z$IYH`wT=jWVM}mKguJK#AZEX~L#4yZ1G4Sb-?tz{O+940$dFzD^ zXI+yULD-|uc(^EO!`yhLB%Pa{Th1Em(|SFJ^hI3EUZsYLjjoF}95`)riq~;lL}TfF z+BLxxvs=ldTE|&=0hpby$FOoKq~eA==geAql&%_seez;lt#@M}pf-fQQ72f~?YO4h>Ja^84u?2-Q0-Ve3|o4)}9 CNA@BB literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h similarity index 54% rename from src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.h rename to src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h index cd0de4852..34d1e4144 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` -// source: resolve_clear_depth_24_32.cs.hlsl -const uint8_t resolve_clear_depth_24_32_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x07, 0xF2, 0xAF, 0xF7, 0xC7, 0xFC, 0x03, 0x18, - 0x0E, 0xA2, 0x0C, 0xB9, 0x44, 0x18, 0x5E, 0x63, 0x01, 0x00, 0x00, 0x00, - 0xF4, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, +// source: resolve_clear_32bpp_3xres.cs.hlsl +const uint8_t resolve_clear_32bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x85, 0x58, 0x1C, 0x7C, 0x6F, 0xCB, 0xCA, 0x50, + 0xFD, 0x7E, 0x8B, 0xAA, 0xC5, 0x51, 0x80, 0x43, 0x01, 0x00, 0x00, 0x00, + 0xB8, 0x0A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x58, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0x1C, 0x0A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -52,7 +52,7 @@ const uint8_t resolve_clear_depth_24_32_cs[] = { 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, - 0xF0, 0x04, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x3C, 0x01, 0x00, 0x00, + 0xB4, 0x07, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0xED, 0x01, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x08, 0x00, 0x07, @@ -103,65 +103,124 @@ const uint8_t resolve_clear_depth_24_32_cs[] = { 0x42, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0xFF, 0x03, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x12, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 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0x09, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x0F, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, @@ -170,5 +229,5 @@ const uint8_t resolve_clear_depth_24_32_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt similarity index 60% rename from src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.txt rename to src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt index 431190734..d850ff911 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_3xres_cs.txt @@ -57,24 +57,42 @@ bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) mov r1.y, vThreadID.y iadd r0.xy, r0.xyxx, r1.xyxx ubfe r0.z, l(12), l(13), CB0[0][0].z -and r0.w, CB0[0][0].z, l(1023) -udiv r1.x, null, r0.x, l(80) -ushr r1.y, r0.y, l(4) -imad r0.w, r1.y, r0.w, r1.x +and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z iadd r0.z, r0.w, r0.z -ineg r2.xy, r1.xyxx -imad r0.xy, r2.xyxx, l(80, 16, 0, 0), r0.xyxx -uge r0.w, r0.x, l(40) -movc r0.w, r0.w, l(-40), l(40) -iadd r0.x, r0.w, r0.x +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx +if_nz r1.y + uge r0.w, r0.x, l(40) + movc r0.w, r0.w, l(-40), l(40) + iadd r0.x, r0.w, r0.x +endif imad r0.x, r0.y, l(80), r0.x imad r0.x, r0.z, l(1280), r0.x +imul null, r0.x, r0.x, l(9) ushr r0.x, r0.x, l(2) store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx iadd r0.y, r0.x, l(1) store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx -iadd r0.yz, r0.xxxx, l(0, 0x000a0000, 0x000a0001, 0) -store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].yyyy -store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].yyyy +iadd r1.xyzw, r0.xxxx, l(2, 3, 4, 5) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(6, 7, 8, 9) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(10, 11, 12, 13) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx +iadd r1.xyzw, r0.xxxx, l(14, 15, 16, 17) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xxxx +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xxxx ret -// Approximately 36 instruction slots used +// Approximately 54 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.cso index 2488d12ad4d2e625b0668af9486f36ce4b6986ba..e9ebc126e339a59049ef72fb3c2b246042c75792 100644 GIT binary patch delta 237 zcmZ3(|AWuSCBn)1(f8T~mWRt8nRNY{k{%U(m63sgp@N-(ffY!b0I>rT14951Cjjvs zwv9$cOq?Yw3=Dxl1+trSnIF)%p*2`C5v(jZY~1_sV1 zFpGh~3aW<-N^3!BIR*xHCnPl>BS3N>0MyTG1Z6+t5@>J)iZL>5-o%>5D5(f!GlLWX R0oW}-nhS_ICL6L>0|3jR9n1g# delta 281 zcmeytw}#)yCBn&h$%cl8=KU4x8275!P7|J$z{tSBu!fz1ffY!b0I>rT14951CjhYk z`$i)pCe9Ts3=Dxl1zMYPnIzt)Obbi7K_#F*j1VDCy01pszPX5bQ4FJPX9J&Ai diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h index 44b53d0e8..4eee48cc1 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_clear_32bpp.cs.hlsl const uint8_t resolve_clear_32bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xA4, 0xB0, 0x80, 0x80, 0x83, 0xBF, 0x78, 0xAE, - 0x01, 0xBD, 0x24, 0x3D, 0x96, 0x13, 0x9A, 0x60, 0x01, 0x00, 0x00, 0x00, - 0xAC, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xE2, 0xF7, 0x7D, 0xA0, 0x39, 0xC3, 0x76, 0xE2, + 0x34, 0x8A, 0xFA, 0x94, 0x67, 0x5A, 0x5B, 0xD5, 0x01, 0x00, 0x00, 0x00, + 0x78, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x10, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0xDC, 0x06, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -52,7 +52,7 @@ const uint8_t resolve_clear_32bpp_cs[] = { 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, - 0xA8, 0x04, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x2A, 0x01, 0x00, 0x00, + 0x74, 0x04, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x1D, 0x01, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x08, 0x00, 0x07, @@ -107,62 +107,58 @@ const uint8_t resolve_clear_32bpp_cs[] = { 0x01, 0x00, 0x00, 0x00, 0xA6, 0x8A, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0xC2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, 0x22, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x23, 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0x00, 0x00, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0x23, 0x00, 0x00, 0x09, + 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, + 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, + 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 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0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt index d8858b8f1..c6c8e99d1 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_32bpp_cs.txt @@ -58,13 +58,10 @@ mov r1.y, vThreadID.y iadd r0.xy, r0.xyxx, r1.xyxx ubfe r0.z, l(12), l(13), CB0[0][0].z and r1.xy, CB0[0][0].zzzz, l(1023, 4096, 0, 0) -udiv r0.w, null, r0.x, l(80) -ushr r1.z, r0.y, l(4) -imad r1.x, r1.z, r1.x, r0.w -iadd r0.z, r0.z, r1.x -ineg r2.x, r0.w -ineg r2.y, r1.z -imad r0.xy, r2.xyxx, l(80, 16, 0, 0), r0.xyxx +udiv r1.zw, null, r0.xxxy, l(0, 0, 80, 16) +imad r0.w, r1.w, r1.x, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.zwzz, l(80, 16, 0, 0), r0.xyxx if_nz r1.y uge r0.w, r0.x, l(40) movc r0.w, r0.w, l(-40), l(40) @@ -77,4 +74,4 @@ store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xxxx iadd r0.y, r0.x, l(1) store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xxxx ret -// Approximately 36 instruction slots used +// Approximately 33 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.cso index 1d5c50093649dbce00a13733d543d80ff1c6c5b4..82abb06d073a2c2faaad1c6e74cf0393143cac5b 100644 GIT binary patch delta 171 zcmew$d_maICBn)1(fe9`F|{rT14951Cjha@ zMnhvJ&NFNb41qxT&6{(X+L(m6jTi(NK)M(%Ffh0Q*$k7{vWidEVT}=0W?KX2O455lnX3=9E4oB+fj z8x4(_INz`_Fa!eScW=&RYGX3v5MmHu0O?}5z`(!-WP<>s15g)`4rO3qSAxn*A<3~! zmSl~W)Bsvz1QZ1t&EN)ArOd#CICMR@ZR))mb120$rhAO-=jB|w@Vh}nS{sBQ8? OM(N1~oI;a3I6VNGTp%R? diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h index 248c4e4b8..e04fba236 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_clear_64bpp_2xres.cs.hlsl const uint8_t resolve_clear_64bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x0F, 0x6E, 0x96, 0xF9, 0xF0, 0x73, 0xE3, 0xC4, - 0x64, 0x9A, 0x20, 0xBE, 0x24, 0xF0, 0x30, 0xC9, 0x01, 0x00, 0x00, 0x00, - 0xF0, 0x09, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xE2, 0xEF, 0x7D, 0x2F, 0x16, 0x26, 0x66, 0x0E, + 0xAB, 0xA1, 0x63, 0xFC, 0x2F, 0xF1, 0xDC, 0x3B, 0x01, 0x00, 0x00, 0x00, + 0xD0, 0x09, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x54, 0x09, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0x34, 0x09, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -52,7 +52,7 @@ const uint8_t resolve_clear_64bpp_2xres_cs[] = { 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, - 0xEC, 0x06, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0xBB, 0x01, 0x00, 0x00, + 0xCC, 0x06, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0xB3, 0x01, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x08, 0x00, 0x07, @@ -106,111 +106,109 @@ const uint8_t resolve_clear_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0xFF, 0x03, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x12, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x42, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x0C, - 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0xFF, 0x03, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0x32, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 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545129804..2b8731ef8 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_2xres_cs.txt @@ -58,13 +58,11 @@ mov r1.y, vThreadID.y iadd r0.xy, r0.xyxx, r1.xyxx ubfe r0.z, l(12), l(13), CB0[0][0].z and r0.w, CB0[0][0].z, l(1023) -udiv r1.x, null, r0.x, l(80) -ushr r1.y, r0.y, l(4) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) ishl r1.z, r1.x, l(1) imad r0.w, r1.y, r0.w, r1.z iadd r0.z, r0.w, r0.z -ineg r2.xy, r1.xyxx -imad r0.xy, r2.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx imad r0.x, r0.y, l(80), r0.x ishl r0.x, r0.x, l(1) imad r0.x, r0.z, l(1280), r0.x @@ -89,4 +87,4 @@ store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy store_uav_typed U0[0].xyzw, r0.wwww, CB0[0][0].xyxy store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy ret -// Approximately 48 instruction slots used +// Approximately 46 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..0dda8fd578a5fabeba4c2ef91aa6228c1ed3faed GIT binary patch literal 3600 zcmdT`J4{ny6h6I_0!8HI6CV^o0}KX;(Zm>Xk&0*#k@~=?RC)=RLQPwc(GcQ5jB#-C z6%&n17f0i&gQJU^gOj5JgNYM`6|~|DWe~{?~1M?0kPQ6JB^THS*_W zIQ#0u$8S$UB2u?oq#W`T*tSGQz~kUTjmT*H!ax{f`n?BZDCfYT@u^Rw?8B2~=6lX3RJM*Q^Qy*(pRt84Ml z)V5&bnItP&wwsfAl}-ac>jve=z1^_JtmQqS1Ev-w^_GnvA0dC3_}NzzypE!tV)e$; zjyFKcl}+- z+MKs~YH{DF(>?AqbM~d!y*9WqzQ)t@gFfh(!?HKyP>ig}eIe;tAs*t^Gf2$pqdNL1 zX0;I`i8dY>^*zDs^i@RtR8PMuxZ>;u=I36&MVgf#Ef~2JF*OF3x>U6$u`ba&#-=`& z?YacC!n9QmKlXRgEo((rfSowK*mVt17_nGe`-%dZiQt5;51m6h!jgi_C?t`bW9^3$KEa5)( z06V^EvJbq!g!|zC*@NIF@Szg!<1nxv0plHz<`V8B2J9{1W8hZs|NdU};**=W-go^e fuwDl1w~lW)iFbtG4}QB;hvByLul_*^+o1dl87fA# literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h new file mode 100644 index 000000000..65ae14da6 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.h @@ -0,0 +1,304 @@ +// generated from `xb buildhlsl` +// source: resolve_clear_64bpp_3xres.cs.hlsl +const uint8_t resolve_clear_64bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xAB, 0x6C, 0x04, 0x78, 0xA3, 0x68, 0x50, 0xF9, + 0x9D, 0x04, 0x6F, 0x9E, 0xB8, 0xBA, 0xD5, 0x90, 0x01, 0x00, 0x00, 0x00, + 0x10, 0x0E, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, + 0x74, 0x0D, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 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0x00, 0x00, + 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, + 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA6, 0x0A, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, + 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xF6, 0x0F, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x20, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, + 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA6, 0x0A, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF6, 0x0F, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x4A, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt new file mode 100644 index 000000000..f03943efb --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_3xres_cs.txt @@ -0,0 +1,118 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint2 xe_resolve_clear_value; // Offset: 0 Size: 8 +// uint xe_resolve_edram_info; // Offset: 8 Size: 4 +// uint xe_resolve_address_info; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 3 +dcl_thread_group 8, 8, 1 +ubfe r0.xy, l(2, 11, 0, 0), l(10, 7, 0, 0), CB0[0][0].zwzz +uge r0.xz, r0.xxxx, l(2, 0, 1, 0) +and r0.w, r0.x, l(1) +ishl r0.y, r0.y, r0.w +uge r0.y, vThreadID.x, r0.y +if_nz r0.y + ret +endif +ishl r1.x, vThreadID.x, l(3) +ushr r2.y, CB0[0][0].w, l(5) +movc r0.xy, r0.xzxx, l(4,4,0,0), l(3,3,0,0) +mov r2.x, CB0[0][0].w +bfi r0.xy, l(5, 2, 0, 0), r0.xyxx, r2.xyxx, l(0, 0, 0, 0) +mov r1.y, vThreadID.y +iadd r0.xy, r0.xyxx, r1.xyxx +ubfe r0.z, l(12), l(13), CB0[0][0].z +and r0.w, CB0[0][0].z, l(1023) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) +ishl r1.z, r1.x, l(1) +imad r0.w, r1.y, r0.w, r1.z +iadd r0.z, r0.w, r0.z +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, l(1) +imad r0.x, r0.z, l(1280), r0.x +imul null, r0.x, r0.x, l(9) +ushr r0.x, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.xxxx, CB0[0][0].xyxy +iadd r0.yz, r0.xxxx, l(0, 1, 3, 0) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +iadd r0.y, r0.x, l(2) +store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(4, 5, 6, 7) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(8, 9, 10, 11) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(12, 13, 14, 15) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(16, 17, 18, 19) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(20, 21, 22, 23) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(24, 25, 26, 27) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(28, 29, 30, 31) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +iadd r1.xyzw, r0.xxxx, l(32, 33, 34, 35) +store_uav_typed U0[0].xyzw, r1.xxxx, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.yyyy, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.zzzz, CB0[0][0].xyxy +store_uav_typed U0[0].xyzw, r1.wwww, CB0[0][0].xyxy +ret +// Approximately 74 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.cso index 0202e9add5efa47e8a7907ad59e6f056fb269dc8..6c24420a3b418b89e88479a305fc95caab553847 100644 GIT binary patch delta 171 zcmcb>zk%P-CBn&B%Qq}wnazZ`+HDV}=14DzWMp7q*uc)fzzU>IfY^bFfgu2h6M$G` zqoFYq=Nc9UhCraa_U2rsHYOo%BL)EmkS>M`3=D2SHpAq#tm2b(SYt$$85np$vLFDI vX>bJ6jGNc8_A|;W0-4MpaUcL|2GTr0478a6Xw&3}jM9?}*o7u{uzLUi>@OR_ delta 211 zcmdnMe}Ui7CBn)1lnX3=9E4oB+fo z8x4(_IM1*!Fa!eSjW_2qwK17-2r&pSfOIijU|`?^vO$2+0jLW|hcYm*D?#O@kmOh< zOR~mGY5=V<0*V5SW^jY5Qf6S_F`696BD{GDYX_q|kjuaf#2^5+1W5A&F$WL>wM~A= OC_OoVU1)L!y9WSV+8;gu diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h index 302558763..cec89a963 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_clear_64bpp.cs.hlsl const uint8_t resolve_clear_64bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xF1, 0xCB, 0x62, 0xC7, 0x61, 0xEF, 0x1C, 0x51, - 0x76, 0xE3, 0xBA, 0x6A, 0xC5, 0x94, 0x82, 0xC6, 0x01, 0x00, 0x00, 0x00, - 0xD0, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x2A, 0x4D, 0x56, 0x50, 0xA6, 0x3C, 0x90, 0x9D, + 0x2B, 0x86, 0xE0, 0x95, 0x6C, 0x1B, 0xA4, 0x59, 0x01, 0x00, 0x00, 0x00, + 0xB0, 0x07, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x40, 0x02, 0x00, 0x00, 0x50, 0x02, 0x00, 0x00, 0x60, 0x02, 0x00, 0x00, - 0x34, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, + 0x14, 0x07, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x04, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xDC, 0x01, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -52,7 +52,7 @@ const uint8_t resolve_clear_64bpp_cs[] = { 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, - 0xCC, 0x04, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x33, 0x01, 0x00, 0x00, + 0xAC, 0x04, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, 0x2B, 0x01, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0x08, 0x00, 0x07, @@ -106,66 +106,63 @@ const uint8_t resolve_clear_64bpp_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0xFF, 0x03, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x12, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x42, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x0C, - 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0xFF, 0x03, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0x32, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, - 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x0D, + 0x32, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x80, + 0x41, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x00, 0x05, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, - 0x62, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x0A, 0x62, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, + 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA6, 0x0A, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x0A, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA6, 0x0A, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x84, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt index 403e6a5ed..4bb271bfa 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_64bpp_cs.txt @@ -58,13 +58,11 @@ mov r1.y, vThreadID.y iadd r0.xy, r0.xyxx, r1.xyxx ubfe r0.z, l(12), l(13), CB0[0][0].z and r0.w, CB0[0][0].z, l(1023) -udiv r1.x, null, r0.x, l(80) -ushr r1.y, r0.y, l(4) +udiv r1.xy, null, r0.xyxx, l(80, 16, 0, 0) ishl r1.z, r1.x, l(1) imad r0.w, r1.y, r0.w, r1.z iadd r0.z, r0.w, r0.z -ineg r2.xy, r1.xyxx -imad r0.xy, r2.xyxx, l(80, 16, 0, 0), r0.xyxx +imad r0.xy, -r1.xyxx, l(80, 16, 0, 0), r0.xyxx imad r0.x, r0.y, l(80), r0.x ishl r0.x, r0.x, l(1) imad r0.x, r0.z, l(1280), r0.x @@ -76,4 +74,4 @@ iadd r0.y, r0.x, l(2) store_uav_typed U0[0].xyzw, r0.yyyy, CB0[0][0].xyxy store_uav_typed U0[0].xyzw, r0.zzzz, CB0[0][0].xyxy ret -// Approximately 35 instruction slots used +// Approximately 33 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_clear_depth_24_32_cs.cso deleted file mode 100644 index f3802078c176ce340f15f4101c67db547dea2eb5..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 2036 zcmah}Jxo(k6ux~eEfiFgm=Ff7iU}|nAVw2H$deYt1QA=rx>zdj5o$`GX$v|Uq7KA3 zIVpoN#-)Rv- z^Q;#-ptT>i3rcwmjcFy%E(FHq6b$#<{DcT&s3Q05Le;K0M z->hMJchre<5yMm}i4C6co_yPCu45jMtmcRZxELgL!X`GgKdEiR^!$VHoz!Q2+Ky=p z{yLmoav~xqf2!yFIVeA(_P^o!fwq zZ;~ovm>ws2Mb4pq<_+V=@3v{i%;kTf(>fO|&kYlwfPg>7`q@_>P{)u@YW2s{k2~$0 z)ST>%zbo1UutUM#F_%q^{l|xxT{Jm|=OQyzpE%cUFnOG~8_w3fJFm9CKF;ivkDqr% zjNB`ExMwd?ulR;^jsaW^`{Z2MC-LCy^7k$?V=Z2GEFdx$oQJ+UaP!Xh`j_0C)o1*H z(GtV@*gr)uG6VJ}zCMj%9BT=~NMFS8(Fuk#6dpMvhP}N4Z0G9jaUAxq}7)?K(W@KPssE}Y_U{! vv#2ry1MecB7)S*hi$H@TkY?H($-Y`Zav_k(4pzwkmIg8PfLM95tVA^cadsbM delta 205 zcmexiFvHN$CBn%$XQpw-BC#E9QrqHMMEh8x7#SECW=JqFumWilAU?swz;FYIUjXr+ zjfT6KIC(@F7y^Ov&YQn79b-1*5MmHu07^12Twq|30SEqAWm_ZctUq3=BMrpeor|fO4BH*;fllE(R)L2VxKaSpWk1K&&$P HuXr^8UOyg~ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h index 493978bcb..e9fe0b96e 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_fast_32bpp_1x2xmsaa.cs.hlsl const uint8_t resolve_fast_32bpp_1x2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x6C, 0x99, 0x33, 0x88, 0xA2, 0x16, 0xB8, 0x86, - 0x1A, 0xB6, 0x5E, 0x84, 0x15, 0x8E, 0x04, 0x5A, 0x01, 0x00, 0x00, 0x00, - 0x98, 0x18, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x5F, 0x6A, 0xA7, 0x7D, 0x06, 0x4B, 0xE7, 0x6C, + 0xBA, 0xBA, 0x26, 0x8A, 0x01, 0x35, 0xF1, 0xCB, 0x01, 0x00, 0x00, 0x00, + 0x78, 0x18, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xC8, 0x02, 0x00, 0x00, 0xD8, 0x02, 0x00, 0x00, 0xE8, 0x02, 0x00, 0x00, - 0xFC, 0x17, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, + 0xDC, 0x17, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -63,8 +63,8 @@ const uint8_t resolve_fast_32bpp_1x2xmsaa_cs[] = { 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x0C, 0x15, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x43, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0xEC, 0x14, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x3B, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -144,386 +144,383 @@ const uint8_t resolve_fast_32bpp_1x2xmsaa_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0xA2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x56, 0x0D, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x12, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0x32, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x0D, 0xA2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x56, 0x0D, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x04, 0x03, + 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x07, + 0x12, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 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0x00, - 0x04, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, - 0x94, 0x00, 0x00, 0x00, 0xA3, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x2F, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x04, 0x03, + 0x1A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, + 0x00, 0xFF, 0x00, 0xFF, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, + 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, + 0x1E, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, 0x1F, 0x00, 0x04, 0x03, + 0x2A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x8C, 0x00, 0x00, 0x11, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, + 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0xA1, 0x00, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x2E, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.txt index bfa08c9ec..420735e6b 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_1x2xmsaa_cs.txt @@ -76,12 +76,10 @@ ishl r1.yw, r2.xxxy, r1.yyyw ushr r4.x, r4.y, l(1) and r2.xy, r4.xyxx, l(1, 1, 0, 0) iadd r1.yw, r1.yyyw, r2.xxxy -udiv r2.x, null, r1.y, l(80) -ushr r2.y, r1.w, l(4) +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) imad r2.w, r2.y, r3.x, r2.x iadd r2.z, r2.w, r2.z -ineg r4.xy, r2.xyxx -imad r1.yw, r4.xxxy, l(0, 80, 0, 16), r1.yyyw +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw if_nz r3.y uge r2.x, r1.y, l(40) movc r2.x, r2.x, l(-40), l(40) @@ -208,4 +206,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw ret -// Approximately 163 instruction slots used +// Approximately 161 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.cso index 8dd3ca15bebfcbdcc783a4486cafc6450f8dde25..c89f6a230f50e9437201d9b59fa8cc0187e38730 100644 GIT binary patch delta 290 zcmX?NI>FS)CBn(MWAiIh)gpq-PVS*F`11pd=0pcDe28KC6yatHB zNNzN$W8!oWXJ7~fD!8zDC(|)zA#NiE0R|SJQicl*3~oR+(_}+-aaCmo2F@lR4`iSe zR0S81W(M*>G)RZs2QSDh5F2PtgChgOWPNr+O(&=rNEb+s(Sd~;%H(JU;t@jxWK@`1!MzNGB7$YFa!YUPzDBeC#aYd zk{ktYT zflUF50ZryH0*Zmma0AIrp2#LXS%h7J73|i@hV0^#H?WILj$xOOg_#3$xhT-_AeTW@ xPGr{>g!u;)CScW@&$8VkDbD}^ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h index 702377454..703596447 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_fast_32bpp_2xres.cs.hlsl const uint8_t resolve_fast_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x69, 0x36, 0x11, 0xED, 0x54, 0x87, 0x3E, 0x14, - 0x12, 0x3A, 0xF5, 0xA9, 0xBB, 0x29, 0xDE, 0x45, 0x01, 0x00, 0x00, 0x00, - 0xC4, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x88, 0xC1, 0xD7, 0x91, 0x71, 0x4D, 0xDE, 0x8D, + 0x7A, 0x95, 0xFC, 0xE0, 0x1D, 0xAA, 0x09, 0x54, 0x01, 0x00, 0x00, 0x00, + 0x90, 0x1A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, - 0x28, 0x1A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0xF4, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -58,8 +58,8 @@ const uint8_t resolve_fast_32bpp_2xres_cs[] = { 0x2E, 0x31, 0x00, 0xAB, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x74, 0x17, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0xDD, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x40, 0x17, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0xD0, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -139,437 +139,433 @@ const uint8_t resolve_fast_32bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt index 2fb78de9c..98cc63b6d 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_2xres_cs.txt @@ -75,20 +75,17 @@ ishl r2.xy, r2.xyxx, r4.zwzz ushr r4.x, r4.y, l(1) and r4.xy, r4.xyxx, l(1, 1, 0, 0) iadd r2.xy, r2.xyxx, r4.xyxx -udiv r1.w, null, r2.x, l(80) -ushr r2.z, r2.y, l(4) -imad r3.x, r2.z, r3.x, r1.w -iadd r2.w, r2.w, r3.x -ineg r4.x, r1.w -ineg r4.y, r2.z -imad r2.xy, r4.xyxx, l(80, 16, 0, 0), r2.xyxx +udiv r4.xy, null, r2.xyxx, l(80, 16, 0, 0) +imad r1.w, r4.y, r3.x, r4.x +iadd r1.w, r1.w, r2.w +imad r2.xy, -r4.xyxx, l(80, 16, 0, 0), r2.xyxx if_nz r3.y - uge r1.w, r2.x, l(40) - movc r1.w, r1.w, l(-40), l(40) - iadd r2.x, r1.w, r2.x + uge r2.z, r2.x, l(40) + movc r2.z, r2.z, l(-40), l(40) + iadd r2.x, r2.z, r2.x endif -imad r1.w, r2.y, l(80), r2.x -imad r1.w, r2.w, l(1280), r1.w +imad r2.x, r2.y, l(80), r2.x +imad r1.w, r1.w, l(1280), r2.x ld r2.xyzw, r1.wwww, T0[0].xyzw movc r1.y, r1.y, l(2), l(1) iadd r1.y, r1.y, r1.w @@ -235,4 +232,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.wwww, r4.xyzw ret -// Approximately 191 instruction slots used +// Approximately 188 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..0c2ddb6612ac7eb625b17b3a70490d0f68b32e2f GIT binary patch literal 9576 zcmb`NO^jAo8OP6@VFnnWbbw+d(Z0^uk&&l%Q=ns;U`3`(=!yU{6->*JnbDdU zn}$RavC*V4ZtRLQY;bA1aMiHrstckC>5?>tl`)1zS55K%JNNwG_q>;Pm|;2(Irp6V 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0x01, + 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, 0x05, 0x01, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x11, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt new file mode 100644 index 000000000..4e6016f8f --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_1x2xmsaa_cs.txt @@ -0,0 +1,308 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 9 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r2.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) +uge r1.w, l(3), r1.y +if_nz r1.w + mov r4.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yw, r2.wwww, l(0, 2, 0, 1) +and r1.yw, r1.yyyw, l(0, 1, 0, 1) +ishl r1.yw, r2.xxxy, r1.yyyw +ushr r4.x, r4.y, l(1) +and r2.xy, r4.xyxx, l(1, 1, 0, 0) +iadd r1.yw, r1.yyyw, r2.xxxy +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) +imad r2.w, r2.y, r3.x, r2.x +iadd r2.z, r2.w, r2.z +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw +if_nz r3.y + uge r2.x, r1.y, l(40) + movc r2.x, r2.x, l(-40), l(40) + iadd r1.y, r1.y, r2.x +endif +imad r1.y, r1.w, l(80), r1.y +imad r1.y, r2.z, l(1280), r1.y +imul null, r1.y, r1.y, l(9) +ushr r1.y, r1.y, l(1) +ld r2.xy, r1.yyyy, T0[0].xyzw +iadd r4.xyzw, r1.yyyy, l(1, 2, 3, 4) +ld r2.zw, r4.xxxx, T0[0].zwxy +ld r5.xy, r4.yyyy, T0[0].xywz +ld r5.zw, r4.zzzz, T0[0].zwxy +ld r4.xy, r4.wwww, T0[0].yxzw +iadd r6.xyzw, r1.yyyy, l(5, 6, 7, 8) +ld r4.zw, r6.xxxx, T0[0].zwxy +ld r7.xy, r6.yyyy, T0[0].xyzw +ld r7.zw, r6.zzzz, T0[0].zwxy +ld r1.yw, r6.wwww, T0[0].zxwy +if_nz r3.z + ubfe r3.x, l(4), l(25), CB0[0][0].x + switch r3.x + case l(0) + case l(1) + and r6.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.xyzw + iadd r2.xyzw, r6.xyzw, r8.xyzw + and r6.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw + iadd r5.xyzw, r6.xyzw, r8.xyzw + mov r4.xyzw, r4.yxzw + and r6.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r4.xyzw + iadd r4.xyzw, r6.yxzw, r8.yxzw + and r6.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r6.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r6.xyzw + ubfe r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw + iadd r7.xyzw, r6.xyzw, r8.xyzw + and r3.xy, r1.ywyy, l(0xff00ff00, 0xff00ff00, 0, 0) + bfi r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy, r3.xyxx + ubfe r6.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r1.ywyy + iadd r1.yw, r3.xxxy, r6.xxxy + break + case l(2) + case l(3) + case l(10) + case l(12) + and r6.xyzw, r2.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.xyzw + iadd r2.xyzw, r6.xyzw, r8.xyzw + and r6.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw + iadd r5.xyzw, r6.xyzw, r8.xyzw + mov r4.xyzw, r4.yxzw + and r6.xyzw, r4.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r4.xyzw + iadd r4.xyzw, r6.yxzw, r8.yxzw + and r6.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r6.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r6.xyzw + ubfe r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw + iadd r7.xyzw, r6.xyzw, r8.xyzw + and r3.xy, r1.ywyy, l(0xc00ffc00, 0xc00ffc00, 0, 0) + bfi r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy, r3.xyxx + ubfe r6.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r1.ywyy + iadd r1.yw, r3.xxxy, r6.xxxy + break + default + break + endswitch +endif +if_nz r3.w + if_z r0.w + mov r2.x, r2.y + mov r5.z, r5.x + mov r3.x, r5.w + else + mov r3.x, r5.z + mov r5.z, r2.w + endif + if_z vThreadID.y + mov r2.xyz, r5.zxyz + mov r4.xzw, r7.xxyz + endif + mov r2.w, r5.z + mov r5.z, r3.x +endif +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r3.xyzw +and r3.xyz, CB0[0][0].zwzz, l(7, 0x00003fff, 8, 0) +if_nz r3.z + ubfe r1.xz, l(3, 0, 14, 0), l(4, 0, 16, 0), CB0[0][0].zzwz + mov r3.w, r1.z + iadd r3.zw, r3.wwwy, l(0, 0, 31, 31) + ishr r6.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.z, r1.x, l(2) + ushr r3.zw, r3.zzzw, l(0, 0, 4, 5) + and r3.z, r3.z, l(2046) + imad r3.z, r1.z, r3.z, r6.x + imad r3.z, r3.z, r3.w, r6.y + ishl r3.w, r0.z, l(10) + and r3.w, r3.w, l(6144) + bfi r3.w, l(3), l(8), r0.w, r3.w + ishr r3.w, r3.w, l(6) + iadd r1.z, r1.z, r6.z + bfi r6.x, l(1), l(1), r1.z, l(0) + iadd r6.x, r6.x, r6.w + bfi r6.x, l(2), l(1), r6.x, l(0) + bfi r1.z, l(1), l(0), r1.z, r6.x + and r6.x, r3.w, l(112) + bfi r6.yz, l(0, 20, 20, 0), l(0, 10, 13, 0), r3.zzzz, l(0, 0, 0, 0) + imad r6.xy, r6.xxxx, l(2, 16, 0, 0), r6.yzyy + bfi r3.zw, l(0, 0, 4, 4), l(0, 0, 0, 3), r3.wwww, r6.xxxy + bfi r3.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r1.xxxx, r3.zzzw + ubfe r1.x, l(3), l(6), r3.z + and r6.x, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.x, r1.x, l(32), r1.z + imad r1.x, r6.x, l(4), r1.x + bfi r3.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r3.zzzw + bfi r1.x, l(9), l(3), r1.x, r3.w + bfi r1.x, l(6), l(0), r3.z, r1.x +else + ishr r6.xyzw, r0.xyzw, l(5, 5, 2, 3) + iadd r0.x, r3.y, l(31) + ushr r0.x, r0.x, l(5) + imad r0.x, r6.y, r0.x, r6.x + ishl r3.yz, r0.zzzz, l(0, 4, 7, 0) + and r3.yz, r3.yyzy, l(0, 224, 2048, 0) + bfi r0.y, l(3), l(2), r0.w, r3.y + ishl r1.z, r3.y, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.z + and r0.w, r0.w, l(480) + bfi r1.z, l(23), l(9), r0.x, r0.w + bfi r1.z, l(4), l(0), r0.y, r1.z + bfi r1.z, l(1), l(4), r0.z, r1.z + ishl r3.yw, r0.wwww, l(0, 3, 0, 2) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.yyyw + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r3.z, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r6.z, l(2) + iadd r0.y, r6.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.x, l(6), l(0), r1.z, r0.x +endif +imul null, r0.x, r1.x, l(9) +ushr r0.x, r0.x, l(3) +ieq r0.yzw, r3.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r3.xyzw, r4.yxzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.yxzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r3.yxzw, r6.yxzw +endif +if_nz r0.z + ushr r3.xyzw, r4.yxzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r3.yxzw +endif +if_nz r0.y + ishl r3.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r3.xyzw, r6.xyzw +endif +if_nz r0.z + ushr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r3.xyzw +endif +if_nz r0.y + ishl r0.yw, r1.yyyw, l(0, 8, 0, 8) + and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r1.xz, r1.yywy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0x00ff00ff, 0, 0x00ff00ff, 0) + iadd r1.yw, r0.yyyw, r1.xxxz +endif +if_nz r0.z + ushr r0.yz, r1.yywy, l(0, 16, 16, 0) + bfi r1.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r1.yyyw, r0.yyyz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r3.xxxx, r2.zwzz +store_uav_typed U0[0].xyzw, r3.yyyy, r5.xyxx +store_uav_typed U0[0].xyzw, r3.zzzz, r5.zwzz +store_uav_typed U0[0].xyzw, r3.wwww, r4.yxyy +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r2.xxxx, r4.zwzz +store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyxx +store_uav_typed U0[0].xyzw, r2.zzzz, r7.zwzz +store_uav_typed U0[0].xyzw, r2.wwww, r1.ywyy +ret +// Approximately 261 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..b50c24deeb9018e2724757da34c4fcfc34bbf795 GIT binary patch literal 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b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_3xres_4xmsaa_cs.txt @@ -0,0 +1,330 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 10 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(1, 0, 0, 1) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +ubfe r1.w, l(12), l(13), CB0[0][0].x +and r3.xyzw, CB0[0][0].xxzx, l(1023, 4096, 0x01000000, 0x40000000) +uge r2.z, l(3), r1.y +if_nz r2.z + mov r4.y, r1.y +else + ieq r2.z, r1.y, l(5) + if_nz r2.z + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) +ushr r4.x, r4.y, l(1) +bfi r2.xy, l(2, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +imad r3.x, r2.w, r3.x, r2.z +iadd r1.w, r1.w, r3.x +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx +if_nz r3.y + uge r2.z, r2.x, l(40) + movc r2.z, r2.z, l(-40), l(40) + iadd r2.x, r2.z, r2.x +endif +imad r2.x, r2.y, l(80), r2.x +imad r1.w, r1.w, l(1280), r2.x +imul null, r1.w, r1.w, l(9) +ushr r1.w, r1.w, l(1) +ine r2.xy, r1.yyyy, l(2, 3, 0, 0) +and r1.y, r2.y, r2.x +if_nz r1.y + ld r2.yz, r1.wwww, T0[0].wxyz + iadd r1.y, r1.w, l(1) + ld r2.xw, r1.yyyy, T0[0].yzwx + iadd r4.xyzw, r1.wwww, l(2, 3, 4, 9) + ld r5.xy, r4.xxxx, T0[0].xyzw + ld r5.zw, r4.yyyy, T0[0].zwxy + ld r6.x, r4.zzzz, T0[0].xyzw + ld r6.yz, r4.wwww, T0[0].zxyw + iadd r4.xyzw, r1.wwww, l(10, 11, 12, 13) + ld r3.xy, r4.xxxx, T0[0].xyzw + ld r7.yz, r4.yyyy, T0[0].zxyw + ld r4.xy, r4.zzzz, T0[0].xyzw + ld r4.w, r4.wwww, T0[0].zwyx + mov r6.w, r3.x + mov r7.x, r3.y + mov r7.w, r4.x + mov r4.zw, r4.yyyw +else + iadd r8.xyzw, r1.wwww, l(4, 5, 6, 7) + ld r2.y, r8.xxxx, T0[0].wyxz + ld r2.zw, r8.yyyy, T0[0].wzxy + ld r8.xy, r8.zzzz, T0[0].xyzw + ld r5.yz, r8.wwww, T0[0].zxyw + iadd r9.xyzw, r1.wwww, l(8, 13, 14, 15) + ld r8.zw, r9.xxxx, T0[0].zwxy + ld r6.y, r9.yyyy, T0[0].xyzw + ld r6.zw, r9.zzzz, T0[0].zwxy + ld r7.xy, r9.wwww, T0[0].xyzw + iadd r1.yw, r1.wwww, l(0, 16, 0, 17) + ld r7.zw, r1.yyyy, T0[0].zwxy + ld r4.zw, r1.wwww, T0[0].zwxy + mov r2.x, r8.x + mov r5.xw, r8.yyyz + mov r6.x, r8.w +endif +if_nz r3.z + ubfe r1.y, l(4), l(25), CB0[0][0].x + switch r1.y + case l(0) + case l(1) + and r8.xyzw, r2.yzwx, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r2.yzwx + iadd r2.xyzw, r8.wxyz, r9.wxyz + and r8.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r5.xyzw + iadd r5.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r6.xyzw + iadd r6.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + bfi r8.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw, r8.xyzw + ubfe r9.xyzw, l(8, 8, 8, 8), l(16, 16, 16, 16), r7.xyzw + iadd r7.xyzw, r8.xyzw, r9.xyzw + and r1.yw, r4.zzzw, l(0, 0xff00ff00, 0, 0xff00ff00) + bfi r1.yw, l(0, 8, 0, 8), l(0, 16, 0, 16), r4.zzzw, r1.yyyw + ubfe r3.xy, l(8, 8, 0, 0), l(16, 16, 0, 0), r4.zwzz + iadd r4.zw, r1.yyyw, r3.xxxy + break + case l(2) + case l(3) + case l(10) + case l(12) + and r8.xyzw, r2.yzwx, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r2.yzwx + iadd r2.xyzw, r8.wxyz, r9.wxyz + and r8.xyzw, r5.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r5.xyzw + iadd r5.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r6.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r6.xyzw + iadd r6.xyzw, r8.xyzw, r9.xyzw + and r8.xyzw, r7.xyzw, l(0xc00ffc00, 0xc00ffc00, 0xc00ffc00, 0xc00ffc00) + bfi r8.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw, r8.xyzw + ubfe r9.xyzw, l(10, 10, 10, 10), l(20, 20, 20, 20), r7.xyzw + iadd r7.xyzw, r8.xyzw, r9.xyzw + and r1.yw, r4.zzzw, l(0, 0xc00ffc00, 0, 0xc00ffc00) + bfi r1.yw, l(0, 10, 0, 10), l(0, 20, 0, 20), r4.zzzw, r1.yyyw + ubfe r3.xy, l(10, 10, 0, 0), l(20, 20, 0, 0), r4.zwzz + iadd r4.zw, r1.yyyw, r3.xxxy + break + default + break + endswitch +endif +if_nz r3.w + if_z r0.w + mov r2.y, r2.z + mov r5.z, r5.x + mov r1.y, r5.w + else + mov r1.y, r5.z + mov r5.z, r2.x + endif + if_z vThreadID.y + mov r2.yzw, r5.zzxy + mov r6.yzw, r7.xxyz + endif + mov r2.x, r5.z + mov r5.z, r1.y +endif +bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r1.xyzw +and r1.xyz, CB0[0][0].zwzz, l(7, 0x00003fff, 8, 0) +if_nz r1.z + ubfe r3.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + mov r1.w, r3.y + iadd r1.zw, r1.wwwy, l(0, 0, 31, 31) + ishr r8.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r3.y, r3.x, l(2) + ushr r1.zw, r1.zzzw, l(0, 0, 4, 5) + and r1.z, r1.z, l(2046) + imad r1.z, r3.y, r1.z, r8.x + imad r1.z, r1.z, r1.w, r8.y + ishl r1.w, r0.z, l(10) + and r1.w, r1.w, l(6144) + bfi r1.w, l(3), l(8), r0.w, r1.w + ishr r1.w, r1.w, l(6) + iadd r3.y, r3.y, r8.z + bfi r3.z, l(1), l(1), r3.y, l(0) + iadd r3.z, r3.z, r8.w + bfi r3.z, l(2), l(1), r3.z, l(0) + bfi r3.y, l(1), l(0), r3.y, r3.z + and r3.z, r1.w, l(112) + bfi r4.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r1.zzzz, l(0, 0, 0, 0) + imad r3.zw, r3.zzzz, l(0, 0, 2, 16), r4.xxxy + bfi r1.zw, l(0, 0, 4, 4), l(0, 0, 0, 3), r1.wwww, r3.zzzw + bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 8, 11), r3.xxxx, r1.zzzw + ubfe r3.x, l(3), l(6), r1.z + and r3.z, r3.y, l(6) + bfi r3.y, l(1), l(8), r3.y, l(0) + imad r3.x, r3.x, l(32), r3.y + imad r3.x, r3.z, l(4), r3.x + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 4, 7), r0.zzzz, r1.zzzw + bfi r1.w, l(9), l(3), r3.x, r1.w + bfi r1.z, l(6), l(0), r1.z, r1.w +else + ishr r3.xyzw, r0.xyzw, l(5, 5, 2, 3) + iadd r0.x, r1.y, l(31) + ushr r0.x, r0.x, l(5) + imad r0.x, r3.y, r0.x, r3.x + ishl r1.yw, r0.zzzz, l(0, 4, 0, 7) + and r1.yw, r1.yyyw, l(0, 224, 0, 2048) + bfi r0.y, l(3), l(2), r0.w, r1.y + ishl r1.y, r1.y, l(1) + bfi r0.w, l(3), l(3), r0.w, r1.y + and r0.w, r0.w, l(480) + bfi r1.y, l(23), l(9), r0.x, r0.w + bfi r1.y, l(4), l(0), r0.y, r1.y + bfi r1.y, l(1), l(4), r0.z, r1.y + ishl r3.xy, r0.wwww, l(3, 2, 0, 0) + bfi r0.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r0.xxxx, r3.xxxy + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r1.w, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r3.z, l(2) + iadd r0.y, r3.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.z, l(6), l(0), r1.y, r0.x +endif +imul null, r0.x, r1.z, l(9) +ushr r0.x, r0.x, l(3) +ieq r0.yzw, r1.xxxx, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r2.yzwx, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r2.yzwx, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r1.wxyz, r3.wxyz +endif +if_nz r0.z + ushr r1.xyzw, r2.yzwx, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.wxyz +endif +if_nz r0.y + ishl r1.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r1.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r1.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r1.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r1.xyzw +endif +if_nz r0.y + ishl r0.yw, r4.zzzw, l(0, 8, 0, 8) + and r0.yw, r0.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r1.xy, r4.zwzz, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.zw, r0.yyyw, r1.xxxy +endif +if_nz r0.z + ushr r0.yz, r4.zzwz, l(0, 16, 16, 0) + bfi r4.zw, l(0, 0, 16, 16), l(0, 0, 16, 16), r4.zzzw, r0.yyyz +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.yzyy +iadd r1.xyzw, r0.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r1.xxxx, r2.wxww +store_uav_typed U0[0].xyzw, r1.yyyy, r5.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.zwzz +store_uav_typed U0[0].xyzw, r1.wwww, r6.xyxx +iadd r1.xyzw, r0.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r1.xxxx, r6.zwzz +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zwzz +store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz +ret +// Approximately 283 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.cso index bd0cb3fc3b327b5d9a51c2afa0e037d6afed4172..de6fa7963262c97b8aec13d5d575e957be6643d5 100644 GIT binary patch delta 304 zcmX?MyujGdCBn)1%Cn~vHmv$AEMV0y|C_t4mXU#hVSywA11pd=0pb%(3=B7b_yrKN zY&6`>#3>@izz_(OZ{7Tr=`oY65rY5&P>#V3N;5eyFn|mJVTQ?HS=B{hDwrIAMgRpN zGKOr@ksv)F5tv>-1_tg!P;(eAFfg#OK+Fc|gn(oU0g_X4UoeQ6#_dG$TpnpDOnEy D1)n8# delta 344 zcmZ2re8Sk!CBn(sl{J{}vRrPZK(|oUgwLlr7#SECPDnB^umWil5SxjC;RX=D0Aihu zhP#_!n7#KL3pyn}LU|`^avKbv17y^Lmx)>NZm5{__Kqdj@n1Qqu zR9qRTMhM7876X|B;#)!0$T2Xm1MQi-ot<~`0X7a*4WNIGfN~(Wl<`B{0yKvQBnI-E i8%S>QT{dyXw#{GJ#DzrH0R`EC7zALRHJYp_Sq}j9ZYR|M diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h index ba07a14b6..7650a0dd7 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_fast_32bpp_4xmsaa.cs.hlsl const uint8_t resolve_fast_32bpp_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x45, 0x05, 0x53, 0x0E, 0xD3, 0x1E, 0x6D, 0x79, - 0x10, 0x8B, 0x12, 0x7A, 0x90, 0xF3, 0xCB, 0x08, 0x01, 0x00, 0x00, 0x00, - 0xC8, 0x19, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xD4, 0xE6, 0xE5, 0x90, 0xB0, 0xAA, 0xF3, 0x13, + 0x10, 0x3A, 0x8F, 0x1F, 0xFB, 0x0B, 0x76, 0x7D, 0x01, 0x00, 0x00, 0x00, + 0xA0, 0x19, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xC8, 0x02, 0x00, 0x00, 0xD8, 0x02, 0x00, 0x00, 0xE8, 0x02, 0x00, 0x00, - 0x2C, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, + 0x04, 0x19, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -63,8 +63,8 @@ const uint8_t resolve_fast_32bpp_4xmsaa_cs[] = { 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x3C, 0x16, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x8F, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x14, 0x16, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x85, 0x05, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -125,430 +125,427 @@ const uint8_t resolve_fast_32bpp_4xmsaa_cs[] = { 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x01, 0x36, 0x00, 0x00, 0x05, 0x22, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, - 0x15, 0x00, 0x00, 0x01, 0x29, 0x00, 0x00, 0x0A, 0x52, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, + 0x15, 0x00, 0x00, 0x01, 0x29, 0x00, 0x00, 0x0A, 0x32, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x8C, 0x00, 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0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0xF2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x02, 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0x94, 0x00, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x31, 0x00, 0x00, 0x00, 0x21, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt index ee23e589f..23bd105c5 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_32bpp_4xmsaa_cs.txt @@ -70,15 +70,13 @@ else mov r4.y, l(0) endif endif -ishl r2.xz, r2.xxyx, l(1, 0, 1, 0) +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) ushr r4.x, r4.y, l(1) -bfi r2.xz, l(4, 0, 1, 0), l(0, 0, 0, 0), r4.xxyx, r2.xxzx -udiv r2.w, null, r2.x, l(80) -ubfe r2.y, l(28), l(3), r2.y -imad r3.x, r2.y, r3.x, r2.w +bfi r2.xy, l(4, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +imad r3.x, r2.w, r3.x, r2.z iadd r1.w, r1.w, r3.x -ineg r4.xy, r2.wyww -imad r2.xy, r4.xyxx, l(80, 16, 0, 0), r2.xzxx +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx if_nz r3.y uge r2.z, r2.x, l(40) movc r2.z, r2.z, l(-40), l(40) @@ -219,4 +217,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw ret -// Approximately 174 instruction slots used +// Approximately 172 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.cso index 3bb9bcb3b3c48d45f663a8bf1623d5e894639711..1128cc9a416e413923d30c528b7b66dc396fc8e7 100644 GIT binary patch delta 204 zcmX@0w?NO(CBn(sNR|C{&V!%!KUS=+>#==2laYaeK|!2>ffY!b0PzVX28J6z`~rwu zHX80`;+!JPzz_(Of4ccA(=lc>ZX*T(2B0JZ!vzM0YpencAQPAz7#IS8v;Yu;!Q_u@ z@uJEM47`hgVjvZ4ECLOVK$>ZDDZ4l$FAI>#=)k}r38c9;&*Tv1Q=9>0vH>v&fOLR> U9uO-4F-V+eGNZWk#JNS7fgunm|910Nren-z96}5N3_wW+h6@Y~Qb0Dy1V#r2h5#TP%D}*`1eLc! zl4F_tkS$(S189vAP?QCz(haIgnSp_45mY4`3s7!zD7!c#FB{ZQb|9^_xspSePjMEI c2@(bYkewi)55$T<3=-#={7_7K@(HmB0Mqv)rT_o{ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h index e5f279b01..2ef6da648 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_1x2xmsaa_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_fast_64bpp_1x2xmsaa.cs.hlsl const uint8_t resolve_fast_64bpp_1x2xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x8F, 0xC7, 0x93, 0xCF, 0x70, 0x80, 0x5A, 0xC7, - 0x9F, 0xD9, 0x83, 0x95, 0x94, 0x04, 0x1A, 0x3A, 0x01, 0x00, 0x00, 0x00, - 0x40, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x32, 0x25, 0x07, 0xEB, 0x6C, 0xE0, 0xF9, 0x3F, + 0xF8, 0xA8, 0xAB, 0x7E, 0x8C, 0x3D, 0xE3, 0x99, 0x01, 0x00, 0x00, 0x00, + 0x20, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xC8, 0x02, 0x00, 0x00, 0xD8, 0x02, 0x00, 0x00, 0xE8, 0x02, 0x00, 0x00, - 0xA4, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, + 0x84, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -63,8 +63,8 @@ const uint8_t resolve_fast_64bpp_1x2xmsaa_cs[] = { 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0xB4, 0x13, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0xED, 0x04, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x94, 0x13, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0xE5, 0x04, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -144,357 +144,355 @@ const uint8_t resolve_fast_64bpp_1x2xmsaa_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0xA2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x56, 0x0D, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x12, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 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l(80) -ushr r2.y, r1.w, l(4) +udiv r2.xy, null, r1.ywyy, l(80, 16, 0, 0) ishl r2.w, r2.x, l(1) imad r2.w, r2.y, r3.x, r2.w iadd r2.z, r2.w, r2.z -ineg r4.xy, r2.xyxx -imad r1.yw, r4.xxxy, l(0, 80, 0, 16), r1.yyyw +imad r1.yw, -r2.xxxy, l(0, 80, 0, 16), r1.yyyw imad r1.y, r1.w, l(80), r1.y ishl r1.y, r1.y, l(1) imad r1.y, r2.z, l(1280), r1.y @@ -91,7 +89,7 @@ ld r2.xyzw, r1.yyyy, T0[0].xyzw iadd r1.y, r1.y, l(1) ld r4.xyzw, r1.yyyy, T0[0].xyzw if_nz r3.y - ubfe r1.y, l(6), l(7), CB0[0][0].z + ubfe r1.y, l(4), l(25), CB0[0][0].x ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) or r1.y, r1.w, r1.y if_nz r1.y @@ -199,4 +197,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw ret -// Approximately 154 instruction slots used +// Approximately 152 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_2xres_cs.cso index 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resolve_fast_64bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x87, 0x51, 0x89, 0x06, 0x85, 0xB3, 0xE0, 0x31, + 0xC6, 0xE6, 0xFE, 0x45, 0xBE, 0x60, 0x67, 0xDE, 0x01, 0x00, 0x00, 0x00, + 0x44, 0x2D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xA8, 0x2C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, + 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, + 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 0x65, + 0x52, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x43, 0x6F, 0x6E, 0x73, 0x74, + 0x61, 0x6E, 0x74, 0x73, 0x00, 0xAB, 0xAB, 0xAB, 0xD6, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt new file mode 100644 index 000000000..9afff9841 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_3xres_cs.txt @@ -0,0 +1,412 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 6 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].xxwz, l(1023, 0x40000000, 0x00003fff, 7) +ubfe r1.zw, l(0, 0, 12, 2), l(0, 0, 13, 10), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r3.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r3.y, l(2) + else + mov r3.y, l(0) + endif +endif +uge r0.yw, r1.wwww, l(0, 2, 0, 1) +and r0.yw, r0.yyyw, l(0, 1, 0, 1) +ishl r0.yw, r1.xxxy, r0.yyyw +ushr r3.x, r3.y, l(1) +and r1.xy, r3.xyxx, l(1, 1, 0, 0) +iadd r0.yw, r0.yyyw, r1.xxxy +udiv r1.xy, null, r0.ywyy, l(80, 16, 0, 0) +ishl r1.w, r1.x, l(1) +imad r1.w, r1.y, r2.x, r1.w +iadd r1.z, r1.w, r1.z +imad r0.yw, -r1.xxxy, l(0, 80, 0, 16), r0.yyyw +imad r0.y, r0.w, l(80), r0.y +ishl r0.y, r0.y, l(1) +imad r0.y, r1.z, l(1280), r0.y +imul null, r0.y, r0.y, l(9) +movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) +movc r1.xy, r2.yyyy, r1.xyxx, l(0,0,0,0) +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +and r0.xz, CB0[0][0].zzzz, l(8, 0, 0x01000000, 0) +if_nz r0.x + ubfe r2.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + iadd r0.xw, r2.yyyz, l(31, 0, 0, 31) + ishr r4.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.z, r2.x, l(2) + ushr r0.xw, r0.xxxw, l(4, 0, 0, 5) + and r0.x, r0.x, l(2046) + imad r0.x, r1.z, r0.x, r4.x + imad r0.x, r0.x, r0.w, r4.y + ishl r0.w, r3.z, l(11) + and r0.w, r0.w, l(0x00003000) + bfi r0.w, l(3), l(9), r3.w, r0.w + ishr r0.w, r0.w, l(6) + iadd r1.z, r1.z, r4.z + bfi r1.w, l(1), l(1), r1.z, l(0) + iadd r1.w, r1.w, r4.w + bfi r1.w, l(2), l(1), r1.w, l(0) + bfi r1.z, l(1), l(0), r1.z, r1.w + and r1.w, r0.w, l(240) + bfi r4.xy, l(19, 19, 0, 0), l(11, 14, 0, 0), r0.xxxx, l(0, 0, 0, 0) + imad r4.xy, r1.wwww, l(2, 16, 0, 0), r4.xyxx + bfi r0.xw, l(4, 0, 0, 4), l(0, 0, 0, 3), r0.wwww, r4.xxxy + bfi r0.xw, l(2, 0, 0, 2), l(9, 0, 0, 12), r2.xxxx, r0.xxxw + ubfe r1.w, l(3), l(6), r0.x + and r2.x, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.z, r1.w, l(32), r1.z + imad r1.z, r2.x, l(4), r1.z + bfi r0.xw, l(1, 0, 0, 1), l(4, 0, 0, 7), r3.zzzz, r0.xxxw + bfi r0.w, l(9), l(3), r1.z, r0.w + bfi r0.x, l(6), l(0), r0.x, r0.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r0.w, r2.z, l(31) + ushr r0.w, r0.w, l(5) + imad r0.w, r4.y, r0.w, r4.x + ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) + and r1.zw, r1.zzzw, l(0, 0, 448, 2048) + bfi r2.x, l(3), l(3), r3.w, r1.z + ishl r1.z, r1.z, l(1) + bfi r1.z, l(3), l(4), r3.w, r1.z + and r1.z, r1.z, l(992) + bfi r2.y, l(22), l(10), r0.w, r1.z + bfi r2.y, l(4), l(0), r2.x, r2.y + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r0.wwww, r3.xyxx + bfi r2.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r2.xxxx, r3.xxyx + bfi r2.xyz, l(1, 1, 1, 0), l(7, 4, 6, 0), r3.zzzz, r2.xyzx + bfi r0.w, l(12), l(0), r1.w, r2.x + and r1.z, r2.z, l(1792) + iadd r0.w, r0.w, r1.z + and r1.z, r4.z, l(2) + iadd r1.z, r4.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.w, r0.w, r1.z + bfi r0.x, l(6), l(0), r2.y, r0.w +endif +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 1, 0, 0) +imad r0.w, r1.y, l(3), r0.y +iadd r1.y, r1.x, r0.w +ld r1.yz, r1.yyyy, T0[0].zxyw +if_nz r0.z + ubfe r1.w, l(4), l(25), CB0[0][0].x + ieq r2.xy, r1.wwww, l(5, 7, 0, 0) + or r1.w, r2.y, r2.x + if_nz r1.w + bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy + endif +endif +ieq r1.w, r2.w, l(4) +if_nz r1.w + mov r1.yz, r1.zzyz + mov r2.x, l(2) +else + mov r2.x, r2.w +endif +ieq r2.xyz, r2.xxxx, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r2.xz, r1.yyzy, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxzx, r3.xxyx +endif +if_nz r2.y + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r1.yzyy +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +iadd r1.yz, r0.wwww, l(0, 1, 2, 0) +ld r2.xy, r1.yyyy, T0[0].xyzw +if_nz r0.z + ubfe r0.w, l(4), l(25), CB0[0][0].x + ieq r4.xy, r0.wwww, l(5, 7, 0, 0) + or r0.w, r4.y, r4.x + if_nz r0.w + bfi r2.xy, l(16, 16, 0, 0), l(0, 0, 0, 0), r2.yxyy, r2.xyxx + endif +endif +if_nz r1.w + mov r2.xy, r2.yxyy + mov r0.w, l(2) +else + mov r0.w, r2.w +endif +ieq r4.xyz, r0.wwww, l(1, 2, 3, 0) +or r4.xy, r4.yzyy, r4.xyxx +if_nz r4.x + ishl r4.xz, r2.xxyx, l(8, 0, 8, 0) + and r4.xz, r4.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r5.xy, r2.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r4.xzxx, r5.xyxx +endif +if_nz r4.y + ushr r4.xy, r2.xyxx, l(16, 16, 0, 0) + bfi r2.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r2.xyxx, r4.xyxx +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r2.xyxx +ld r1.yz, r1.zzzz, T0[0].zxyw +if_nz r0.z + ubfe r0.w, l(4), l(25), CB0[0][0].x + ieq r2.xy, r0.wwww, l(5, 7, 0, 0) + or r0.w, r2.y, r2.x + if_nz r0.w + bfi r1.yz, l(0, 16, 16, 0), l(0, 0, 0, 0), r1.zzyz, r1.yyzy + endif +endif +if_nz r1.w + mov r1.yz, r1.zzyz + mov r0.w, l(2) +else + mov r0.w, r2.w +endif +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r2.xz, r1.yyzy, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxzx, r4.xxyx +endif +if_nz r2.y + ushr r2.xy, r1.yzyy, l(16, 16, 0, 0) + bfi r1.yz, l(0, 16, 16, 0), l(0, 16, 16, 0), r1.yyzy, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r1.yzyy +iadd r0.w, r1.x, r0.y +iadd r1.xy, r0.wwww, l(3, 6, 0, 0) +ld r1.xz, r1.xxxx, T0[0].xzyw +if_nz r0.z + ubfe r0.w, l(4), l(25), CB0[0][0].x + ieq r2.xy, r0.wwww, l(5, 7, 0, 0) + or r0.w, r2.y, r2.x + if_nz r0.w + bfi r1.xz, l(16, 0, 16, 0), l(0, 0, 0, 0), r1.zzxz, r1.xxzx + endif +endif +if_nz r1.w + mov r1.xz, r1.zzxz + mov r0.w, l(2) +else + mov r0.w, r2.w +endif +ieq r2.xyz, r0.wwww, l(1, 2, 3, 0) +or r2.xy, r2.yzyy, r2.xyxx +if_nz r2.x + ishl r2.xz, r1.xxzx, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.xy, r1.xzxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.xz, r2.xxzx, r3.xxyx +endif +if_nz r2.y + ushr r2.xy, r1.xzxx, l(16, 16, 0, 0) + bfi r1.xz, l(16, 0, 16, 0), l(16, 0, 16, 0), r1.xxzx, r2.xxyx +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r1.xzxx +iadd r4.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r0.yw, r4.xxxx, T0[0].zxwy +if_nz r0.z + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) + or r1.x, r1.z, r1.x + if_nz r1.x + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r0.wwwy, r0.yyyw + endif +endif +if_nz r1.w + mov r0.yw, r0.wwwy + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r2.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xz, r2.yyzy, r2.xxyx +if_nz r1.x + ishl r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.xy, r0.ywyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r2.xxxy, r3.xxxy +endif +if_nz r1.z + ushr r1.xz, r0.yywy, l(16, 0, 16, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxz +endif +store_uav_typed U0[0].xyzw, r3.wwww, r0.ywyy +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r0.yw, r4.yyyy, T0[0].zxwy +if_nz r0.z + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xz, r1.xxxx, l(5, 0, 7, 0) + or r1.x, r1.z, r1.x + if_nz r1.x + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r0.wwwy, r0.yyyw + endif +endif +if_nz r1.w + mov r0.yw, r0.wwwy + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r2.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xz, r2.yyzy, r2.xxyx +if_nz r1.x + ishl r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r0.ywyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r2.xxxy, r4.xxxy +endif +if_nz r1.z + ushr r1.xz, r0.yywy, l(16, 0, 16, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxz +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r0.ywyy +ld r0.yw, r1.yyyy, T0[0].zxwy +if_nz r0.z + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) + or r1.x, r1.y, r1.x + if_nz r1.x + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r0.wwwy, r0.yyyw + endif +endif +if_nz r1.w + mov r0.yw, r0.wwwy + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yywy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r1.xxxz, r2.xxxy +endif +if_nz r1.y + ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r0.ywyy +ld r0.yw, r4.zzzz, T0[0].zxwy +if_nz r0.z + ubfe r1.x, l(4), l(25), CB0[0][0].x + ieq r1.xy, r1.xxxx, l(5, 7, 0, 0) + or r1.x, r1.y, r1.x + if_nz r1.x + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r0.wwwy, r0.yyyw + endif +endif +if_nz r1.w + mov r0.yw, r0.wwwy + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yywy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r1.xxxz, r2.xxxy +endif +if_nz r1.y + ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r0.ywyy +ld r0.yw, r4.wwww, T0[0].zxwy +if_nz r0.z + ubfe r0.z, l(4), l(25), CB0[0][0].x + ieq r1.xy, r0.zzzz, l(5, 7, 0, 0) + or r0.z, r1.y, r1.x + if_nz r0.z + bfi r0.yw, l(0, 16, 0, 16), l(0, 0, 0, 0), r0.wwwy, r0.yyyw + endif +endif +if_nz r1.w + mov r0.yw, r0.wwwy + mov r2.w, l(2) +endif +ieq r1.xyz, r2.wwww, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r1.xz, r0.yywy, l(8, 0, 8, 0) + and r1.xz, r1.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r2.xy, r0.ywyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r0.yw, r1.xxxz, r2.xxxy +endif +if_nz r1.y + ushr r1.xy, r0.ywyy, l(16, 16, 0, 0) + bfi r0.yw, l(0, 16, 0, 16), l(0, 16, 0, 16), r0.yyyw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r3.wwww, r0.ywyy +ret +// Approximately 365 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.cso index 4f2a6f8a97ce141327512ef8976b19437abbca16..731ea0b1c0c9d987e9d06623785afb8fd729f2b3 100644 GIT binary patch delta 360 zcmeyOw?og+CBn(svGt4Ig%uu5JFa!eSUvK`(^q5K3h(Uk>D97LirI{QU7(j-AFvH}ptm>jL6-*8c49q}5 zh>Rhdv?WLn3s3~6*N=gL`w-L|h6@Y~Y%CD7K{{a|0LT!SJdsY5PiGe-CpFB5Q!g&*Cd4>NaVyyn?uD)C2Et_(q8L`g@x@}`UAvDNu%Ts z1VpgY#!Arq0Ape0yxbl*u)Mi9^WMzOL*u)VY_&EvmzuB7ho9c=&+Yrn&DB$+0Gvz# zzTm37o(A6J^@;aMR~Pydz`oRfI|Kcp;{y~SH3TX{odPsrC_C`y%6W%Qff3RY$|gaz zO^qjCfzGshKv)yMq5cIJb>1okn$mX(6j{ z2o2UKvT;;BqW!#_pd<{}%WcSUe9o~?ETa`FCEs>6oo4G6h0Ei@^>BrnjZNL2nQ7ZH rk-ZB%yJJG1C$HF3^EDQTNTu>0f{UHwaDBXdEh%Y6e%)pJINAOKLBcXD diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h index a7feea550..6d8c4ce54 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_fast_64bpp_4xmsaa.cs.hlsl const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x2C, 0x50, 0xD7, 0xCD, 0x53, 0xE6, 0x04, 0x4D, - 0xF6, 0xAA, 0xDD, 0x19, 0xA8, 0x94, 0xCB, 0x0C, 0x01, 0x00, 0x00, 0x00, - 0x74, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x41, 0x85, 0xF4, 0x2E, 0xD0, 0xA8, 0x48, 0x02, + 0x8C, 0x83, 0x3F, 0xDB, 0x81, 0xC1, 0x88, 0x61, 0x01, 0x00, 0x00, 0x00, + 0x38, 0x17, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xC8, 0x02, 0x00, 0x00, 0xD8, 0x02, 0x00, 0x00, 0xE8, 0x02, 0x00, 0x00, - 0xD8, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, + 0x9C, 0x16, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -63,8 +63,8 @@ const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0xE8, 0x13, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0xFA, 0x04, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0xAC, 0x13, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0xEB, 0x04, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -125,47 +125,42 @@ const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x01, 0x36, 0x00, 0x00, 0x05, 0x22, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x01, - 0x15, 0x00, 0x00, 0x01, 0x29, 0x00, 0x00, 0x0A, 0x52, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, + 0x15, 0x00, 0x00, 0x01, 0x29, 0x00, 0x00, 0x0A, 0x32, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0x12, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x11, 0x52, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x8C, 0x00, 0x00, 0x11, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x06, 0x02, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, - 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, - 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x82, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x28, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, - 0x22, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x0C, 0x32, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, + 0xC2, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, + 0x06, 0x04, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, + 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x0D, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0xE6, 0x0A, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, + 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, + 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2D, 0x00, 0x00, 0x08, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, @@ -184,8 +179,8 @@ const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { 0xE6, 0x71, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x04, 0x03, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x0B, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x2A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x19, 0x00, 0x00, 0x00, 0x0A, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x0A, 0xA2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -489,8 +484,8 @@ const uint8_t resolve_fast_64bpp_4xmsaa_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0B, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, - 0x9C, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2F, 0x00, 0x00, 0x00, + 0x99, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x2D, 0x00, 0x00, 0x00, 0x1D, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt index 7a0ddf89f..b96eac0fe 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_fast_64bpp_4xmsaa_cs.txt @@ -70,20 +70,17 @@ else mov r4.y, l(0) endif endif -ishl r2.xz, r2.xxyx, l(1, 0, 1, 0) +ishl r2.xy, r2.xyxx, l(1, 1, 0, 0) ushr r4.x, r4.y, l(1) -bfi r2.xz, l(3, 0, 1, 0), l(0, 0, 0, 0), r4.xxyx, r2.xxzx -udiv r1.y, null, r2.x, l(80) -ubfe r2.y, l(28), l(3), r2.y -ishl r2.w, r1.y, l(1) -imad r2.w, r2.y, r3.x, r2.w -iadd r1.w, r1.w, r2.w -ineg r4.x, r1.y -ineg r4.y, r2.y -imad r2.xy, r4.xyxx, l(80, 16, 0, 0), r2.xzxx -imad r1.y, r2.y, l(80), r2.x -ishl r1.y, r1.y, l(1) -imad r1.y, r1.w, l(1280), r1.y +bfi r2.xy, l(3, 1, 0, 0), l(0, 0, 0, 0), r4.xyxx, r2.xyxx +udiv r2.zw, null, r2.xxxy, l(0, 0, 80, 16) +ishl r1.y, r2.z, l(1) +imad r1.y, r2.w, r3.x, r1.y +iadd r1.y, r1.y, r1.w +imad r2.xy, -r2.zwzz, l(80, 16, 0, 0), r2.xyxx +imad r1.w, r2.y, l(80), r2.x +ishl r1.w, r1.w, l(1) +imad r1.y, r1.y, l(1280), r1.w ushr r1.y, r1.y, l(1) ld r2.xy, r1.yyyy, T0[0].xywz iadd r4.xyz, r1.yyyy, l(2, 4, 6, 0) @@ -91,7 +88,7 @@ ld r2.zw, r4.xxxx, T0[0].zwyx ld r5.xy, r4.yyyy, T0[0].xywz ld r5.zw, r4.zzzz, T0[0].zwyx if_nz r3.y - ubfe r1.y, l(6), l(7), CB0[0][0].z + ubfe r1.y, l(4), l(25), CB0[0][0].x ieq r1.yw, r1.yyyy, l(0, 5, 0, 7) or r1.y, r1.w, r1.y if_nz r1.y @@ -201,4 +198,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r5.xywz ret -// Approximately 156 instruction slots used +// Approximately 153 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_2xres_cs.cso index 8d85ba7105fa7087cf73e47fb58063065a01bfe8..9a850d4011f23c3c3e7ac6e529046a0d7ea260c6 100644 GIT binary patch delta 261 zcmbO*o$1arCPSA9C+Db3ZvbVmRH{cb0- delta 295 zcmcaJjcLMkCPSA9C+E$Hm%sNNQ(p7gW%sPB3*IF$GB7Yq=w@JG1=1!!+{47cFb9a& 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E1)dOZj{pDw literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..5180162f1 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,5093 @@ +// generated from `xb buildhlsl` +// source: resolve_full_128bpp_from_32bpp_3xres.cs.hlsl +const uint8_t resolve_full_128bpp_from_32bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x5E, 0x42, 0x42, 0xC7, 0xB7, 0x58, 0xD2, 0xE9, + 0x0B, 0xAE, 0xA4, 0x75, 0xAE, 0x38, 0x08, 0xAC, 0x01, 0x00, 0x00, 0x00, + 0x8C, 0xEE, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xF0, 0xED, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 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0x00, 0x00, 0x00, 0x00, 0x00, + 0x4D, 0x01, 0x00, 0x00, 0x94, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.txt new file mode 100644 index 000000000..82ca421d6 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_32bpp_3xres_cs.txt @@ -0,0 +1,1913 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 26 +dcl_thread_group 8, 8, 1 +and r0.xyzw, CB0[0][0].zxwz, l(7, 0x40000000, 0x00003fff, 8) +ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) +movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +if_nz r0.w + ubfe r4.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + mov r4.z, r0.z + iadd r0.yw, r4.yyyz, l(0, 31, 0, 31) + ishr r5.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.z, r4.x, l(2) + ushr r0.yw, r0.yyyw, l(0, 4, 0, 5) + and r0.y, r0.y, l(2046) + imad r0.y, r1.z, r0.y, r5.x + imad r0.y, r0.y, r0.w, r5.y + ishl r0.w, r3.z, l(12) + and r0.w, r0.w, l(0x00006000) + bfi r0.w, l(3), l(10), r3.w, r0.w + ishr r0.w, r0.w, l(6) + iadd r1.z, r1.z, r5.z + bfi r1.w, l(1), l(1), r1.z, l(0) + iadd r1.w, r1.w, r5.w + bfi r1.w, l(2), l(1), r1.w, l(0) + bfi r1.z, l(1), l(0), r1.z, r1.w + bfi r4.yz, l(0, 18, 18, 0), l(0, 12, 15, 0), r0.yyyy, l(0, 0, 0, 0) + imad r0.yw, r0.wwww, l(0, 2, 0, 16), r4.yyyz + bfi r0.yw, l(0, 2, 0, 2), l(0, 10, 0, 13), r4.xxxx, r0.yyyw + bfi r1.w, l(1), l(4), r3.z, l(0) + ubfe r2.w, l(3), l(6), r0.y + and r4.x, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.z, r2.w, l(32), r1.z + imad r1.z, r4.x, l(4), r1.z + bfi r0.yw, l(0, 5, 0, 5), l(0, 0, 0, 3), r1.wwww, r0.yyyw + bfi r0.w, l(9), l(3), r1.z, r0.w + bfi r0.y, l(6), l(0), r0.y, r0.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r0.z, r0.z, l(31) + ushr r0.z, r0.z, l(5) + imad r0.z, r4.y, r0.z, r4.x + ishl r0.w, r3.z, l(7) + and r1.zw, r0.wwww, l(0, 0, 1792, 2048) + bfi r0.w, l(3), l(5), r3.w, r1.z + bfi r0.w, l(21), l(11), r0.z, r0.w + bfi r2.w, l(1), l(4), r3.z, l(0) + iadd r0.w, r0.w, r2.w + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r3.wwww, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r0.zzzz, r3.xyxx + imad r3.xy, r2.wwww, l(8, 4, 0, 0), r3.xyxx + bfi r0.z, l(12), l(0), r1.w, r3.x + and r1.z, r3.y, l(1792) + iadd r0.z, r0.z, r1.z + and r1.z, r4.z, l(2) + iadd r1.z, r4.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r0.z, r0.z, r1.z + bfi r0.y, l(6), l(0), r0.w, r0.z +endif +imul null, r0.y, r0.y, l(9) +ushr r0.y, r0.y, l(4) +bfi r0.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r0.zw, r0.zzzw, vThreadID.xxxy +and r1.zw, CB0[0][0].xxxz, l(0, 0, 1023, 0x01000000) +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r2.x, l(3), r2.y +if_nz r2.x + mov r4.y, r2.y +else + ieq r2.x, r2.y, l(5) + if_nz r2.x + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.yyyy, l(2, 0, 1, 0) +and r2.xz, r2.xxzx, l(1, 0, 1, 0) +ishl r0.zw, r0.zzzw, r2.xxxz +ushr r4.x, r4.y, l(1) +and r2.xz, r4.xxyx, l(1, 0, 1, 0) +iadd r0.zw, r0.zzzw, r2.xxxz +udiv r2.xz, null, r0.zzwz, l(80, 0, 16, 0) +movc r2.w, r3.z, l(1), l(0) +ishl r3.y, r2.x, r2.w +imad r1.z, r2.z, r1.z, r3.y +iadd r1.z, r1.z, r3.x +imad r0.zw, -r2.xxxz, l(0, 0, 80, 16), r0.zzzw +imad r0.z, r0.w, l(80), r0.z +ishl r0.z, r0.z, r2.w +imad r0.z, r1.z, l(1280), r0.z +imul null, r0.w, r0.z, l(36) +ld_raw r4.xyzw, r0.w, T0[0].wxyz +imad r2.xz, r0.zzzz, l(36, 0, 36, 0), l(16, 0, 20, 0) +ld_raw r5.x, r2.x, T0[0].xxxx +switch r3.w + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r3.x, r4.y + mov r3.yz, r9.xxyx + and r10.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r6.xyz, r10.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r3.x, r4.z + mov r3.yz, r9.xxwx + and r10.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r7.xyz, r10.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r4.w + and r3.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r10.xyzx, r9.xyzx + movc r8.xyz, r3.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r3.xy, r9.xwxx + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r0.w, r5.w + mul r5.w, r0.w, l(0.333333) + mov r6.w, r2.x + mov r7.w, r2.w + mov r8.w, r3.x + mov r4.w, r3.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r2.xw, r5.yyyx, l(16, 0, 0, 16) + itof r2.xw, r2.xxxw + mul r2.xw, r2.xxxw, l(0.000977, 0.000000, 0.000000, 0.000977) + max r5.xy, r2.xwxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.w, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.z, r2.y, l(4) +if_nz r1.z + mul r2.x, r0.w, l(0.500000) + imad r3.xy, r0.zzzz, l(36, 36, 0, 0), l(2880, 2896, 0, 0) + ld_raw r9.xyzw, r3.x, T0[0].wxyz + ld_raw r10.x, r3.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r3.x, r9.y + mov r3.yz, r14.xxyx + and r15.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r18.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r17.xyzx, r16.xyzx, r3.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r16.xyzx, r3.xyzx + movc r11.xyz, r15.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r14.zwzz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r2.w, r10.w + mul r10.w, r2.w, l(0.333333) + mov r11.w, r3.x + mov r12.w, r3.y + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.xy, r10.yxyy, l(16, 16, 0, 0) + itof r3.xy, r3.xyxx + mul r3.xy, r3.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r10.xy, r3.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r2.w, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r2.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r2.x, r0.w, l(0.250000) + imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r15.xxyx + and r16.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r19.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r18.xyzx, r17.xyzx, r3.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r17.xyzx, r3.xyzx + movc r12.xyz, r16.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r15.zwzz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r2.w, r11.w + mul r11.w, r2.w, l(0.333333) + mov r12.w, r3.x + mov r13.w, r3.y + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.xy, r11.yxyy, l(16, 16, 0, 0) + itof r3.xy, r3.xyxx + mul r3.xy, r3.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r11.xy, r3.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r2.w, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r2.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r3.x, r15.y + mov r3.yz, r19.xxyx + and r20.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r23.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r22.xyzx, r21.xyzx, r3.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r21.xyzx, r3.xyzx + movc r16.xyz, r20.xyzx, r3.xyzx, l(0,0,0,0) + utof r3.xy, r19.zwzz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r2.w, r9.w + mul r9.w, r2.w, l(0.333333) + mov r16.w, r3.x + mov r17.w, r3.y + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.xy, r9.yxyy, l(16, 16, 0, 0) + itof r3.xy, r3.xyxx + mul r3.xy, r3.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r9.xy, r3.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r2.w, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r2.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.x, r0.w +endif +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xzyw +mul r4.xyzw, r2.xxxx, r4.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xy, r8.yxyy + mov r4.xz, r4.zzxz + mov r9.xy, r5.zxzz +else + mov r9.xy, r5.xzxx +endif +if_nz r1.x + mov r6.xyzw, r7.xyzw + mov r9.zw, r5.yyyw + mov r4.xyzw, r9.xzyw +endif +if_nz r1.y + mov r6.xyzw, r4.xyzw + mov r7.xz, r9.xxyx + mov r7.yw, r5.yyyw +endif +ieq r2.x, r0.x, l(5) +if_nz r2.x + mov r6.xyzw, r6.wzyx + mov r7.xyzw, r7.wzyx + mov r4.xyzw, r4.wzyx + mov r5.xz, r5.wwyw + mov r5.yw, r9.yyyx + mov r2.w, l(2) +else + mov r5.xz, r9.xxyx + mov r2.w, r0.x +endif +ieq r3.x, r2.w, l(4) +if_nz r3.x + mov r6.xyzw, r6.yxwz + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r5.xyzw, r5.yxwz + mov r2.w, l(2) +endif +ieq r3.xyz, r2.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r9.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r9.xyzw, r10.xyzw + ishl r9.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r9.xyzw, r9.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r10.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r10.xyzw, r10.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r9.xyzw, r10.xyzw +endif +if_nz r3.y + ushr r9.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r9.xyzw + ushr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r9.xyzw + ushr r9.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r9.xyzw + ushr r9.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r9.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +store_uav_typed U0[0].xyzw, r6.yyyy, r4.xyzw +store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyzw +ld_raw r4.xyzw, r2.z, T0[0].wxyz +switch r3.w + case l(0) + case l(1) + ushr r10.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r10.x, r4.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r10.x, r4.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r4.wwww, l(0, 8, 16, 24) + mov r10.x, r4.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r4.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r10.x, r4.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r10.x, r4.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r4.wwww, l(0, 10, 20, 30) + mov r10.x, r4.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r4.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r3.x, r4.y + mov r3.yz, r10.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r5.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.zw, r10.zzzw + ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r3.x, r4.z + mov r3.yz, r10.xxwx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r13.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r12.xyzx, r11.xyzx, r3.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r11.xyzx, r3.xyzx + movc r7.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r10.x, r4.w + and r3.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r6.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r12.xyz, r6.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r6.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r12.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r11.xyzx, r6.xyzx, r10.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r10.xyzx, r6.xyzx + movc r9.xyz, r3.xyzx, r6.xyzx, l(0,0,0,0) + ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r3.xy, r10.xwxx + mov r10.x, r4.x + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r4.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r5.w, r2.z + mov r7.w, r2.w + mov r9.w, r3.x + mov r4.w, r3.y + break + case l(4) + ishl r10.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r11.xz, r10.xxyx + mov r11.yw, r4.yyyz + ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r10.zzwz + ishr r10.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r5.x, r4.y + f16tof32 r5.y, r10.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r10.y + f16tof32 r9.x, r4.w + f16tof32 r9.y, r10.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r10.w + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r5.x, r4.y + mov r5.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r9.x, r4.w + mov r9.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r1.z + mul r1.z, r0.w, l(0.500000) + imad r2.z, r0.z, l(36), l(2900) + ld_raw r10.xyzw, r2.z, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r14.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.zw, r14.zzzw + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r3.x, r10.z + mov r3.yz, r14.xxwx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r12.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.x, r10.w + and r3.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r6.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r16.xyz, r6.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r6.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r16.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r15.xyzx, r6.xyzx, r14.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r14.xyzx, r6.xyzx + movc r13.xyz, r3.xyzx, r6.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r3.xy, r14.xwxx + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r2.z + mov r12.w, r2.w + mov r13.w, r3.x + mov r10.w, r3.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r9.xyzw, r9.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r10.xyzw + uge r2.y, r2.y, l(6) + if_nz r2.y + mul r0.w, r0.w, l(0.250000) + imad r2.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 56, 2936, 0) + ld_raw r10.xyzw, r2.y, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r3.x, r10.y + mov r3.yz, r14.xxyx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r11.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + utof r2.yw, r14.zzzw + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r3.x, r10.z + mov r3.yz, r14.xxwx + and r6.xyz, r3.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r3.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r3.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r3.xyz, l(7, 7, 7, 0), r17.xyzx, r3.xyzx, l(0, 0, 0, 0) + and r3.xyz, r3.xyzx, l(127, 127, 127, 0) + movc r3.xyz, r16.xyzx, r15.xyzx, r3.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.xyz, r3.xyzx, l(16, 16, 16, 0) + iadd r3.xyz, r15.xyzx, r3.xyzx + movc r12.xyz, r6.xyzx, r3.xyzx, l(0,0,0,0) + mul r2.yw, r2.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r14.x, r10.w + and r3.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r6.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r16.xyz, r6.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r6.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r16.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r15.xyzx, r6.xyzx, r14.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r14.xyzx, r6.xyzx + movc r13.xyz, r3.xyzx, r6.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r3.xy, r14.xwxx + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r3.xy, r3.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r2.y + mov r12.w, r2.w + mov r13.w, r3.x + mov r10.w, r3.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r5.xyzw, r11.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r9.xyzw, r13.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + ld_raw r14.xyzw, r2.z, T0[0].wxyz + switch r3.w + case l(0) + case l(1) + ushr r17.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r17.x, r14.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r3.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r17.x, r14.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r14.wwww, l(0, 8, 16, 24) + mov r17.x, r14.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r17.x, r14.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r3.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r17.x, r14.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r14.wwww, l(0, 10, 20, 30) + mov r17.x, r14.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r6.x, r14.y + mov r6.yz, r17.xxyx + and r2.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r20.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r19.xyzx, r18.xyzx, r6.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r18.xyzx, r6.xyzx + movc r3.xyz, r2.yzwy, r6.xyzx, l(0,0,0,0) + utof r2.yz, r17.zzwz + ushr r17.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r6.x, r14.z + mov r6.yz, r17.xxwx + and r18.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r15.xyz, r18.xyzx, r6.xyzx, l(0,0,0,0) + mul r2.yz, r2.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r14.w + and r6.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r6.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r6.xy, r17.xwxx + mov r17.x, r14.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r6.xy, r6.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r3.w, r2.y + mov r15.w, r2.z + mov r16.w, r6.x + mov r14.w, r6.y + break + case l(4) + ishl r17.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r14.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r17.zzwz + ishr r17.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r3.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r3.x, r14.y + f16tof32 r3.y, r17.x + f16tof32 r15.x, r14.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r14.w + f16tof32 r16.y, r17.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r17.w + mov r3.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r3.x, r14.y + mov r3.yzw, l(0,0,0,0) + mov r15.x, r14.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r14.w + mov r16.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r3.xyzw, r11.xyzw + add r7.xyzw, r12.xyzw, r15.xyzw + add r9.xyzw, r13.xyzw, r16.xyzw + add r4.xyzw, r10.xyzw, r14.xyzw + else + mov r0.w, r1.z + endif +endif +mul r3.xyzw, r0.wwww, r5.xyzw +mul r5.xyzw, r0.wwww, r7.xzyw +mul r7.xyzw, r0.wwww, r9.xyzw +mul r4.xyzw, r0.wwww, r4.xyzw +if_nz r1.w + mov r3.xz, r3.zzxz + mov r5.xy, r5.yxyy + mov r7.xz, r7.zzxz + mov r4.xz, r4.zzxz +endif +movc r8.xyzw, r1.yyyy, r3.xyzw, r8.xzyw +movc r1.xyzw, r1.xxxx, r7.xyzw, r5.xzyw +if_nz r2.x + mov r8.xyzw, r8.wzyx + mov r3.xyzw, r3.wzyx + mov r1.xyzw, r1.wzyx + mov r7.xyzw, r7.wzyx + mov r4.yw, r4.wwwy + mov r4.xyzw, r4.yzwx + mov r0.x, l(2) +endif +ieq r0.z, r0.x, l(4) +if_nz r0.z + mov r8.xyzw, r8.yxwz + mov r3.xyzw, r3.yxwz + mov r1.xyzw, r1.yxwz + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r0.x, l(2) +endif +ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) +or r0.xz, r0.zzwz, r0.xxzx +if_nz r0.x + ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r8.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r2.xyzw, r5.xyzw + ishl r2.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r2.xyzw, r5.xyzw +endif +if_nz r0.z + ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) + bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw + ushr r2.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r2.xyzw + ushr r2.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw + ushr r2.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r2.xyzw + ushr r2.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r2.xyzw +endif +store_uav_typed U0[0].xyzw, r6.wwww, r8.xyzw +iadd r2.xyzw, r0.yyyy, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw +store_uav_typed U0[0].xyzw, r2.yyyy, r1.xyzw +store_uav_typed U0[0].xyzw, r2.zzzz, r7.xyzw +store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw +ret +// Approximately 1866 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.cso 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0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x15, 0x00, 0x00, 0x01, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF6, 0x0F, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, + 0x7D, 0x04, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00, 0x00, 0xAD, 0x00, 0x00, 0x00, + 0x6D, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x6F, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt new file mode 100644 index 000000000..aa21c0341 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_128bpp_from_64bpp_3xres_cs.txt @@ -0,0 +1,1196 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint4 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 10 +dcl_thread_group 8, 8, 1 +ushr r0.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r0.z, CB0[0][0].y +bfi r1.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r0.zxzz, l(0, 0, 0, 0) +iadd r1.xy, r1.xyxx, vThreadID.xyxx +and r2.xyzw, CB0[0][0].xxwz, l(1023, 0x40000000, 0x00003fff, 7) +ubfe r3.xyz, l(12, 2, 4, 0), l(13, 10, 25, 0), CB0[0][0].xxxx +uge r0.w, l(3), r0.y +if_nz r0.w + mov r4.y, r0.y +else + ieq r0.w, r0.y, l(5) + if_nz r0.w + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.zw, r3.yyyy, l(0, 0, 2, 1) +and r1.zw, r1.zzzw, l(0, 0, 1, 1) +ishl r1.xy, r1.xyxx, r1.zwzz +ushr r4.x, r4.y, l(1) +and r1.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r1.xy, r1.zwzz, r1.xyxx +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +ishl r0.w, r1.z, l(1) +imad r0.w, r1.w, r2.x, r0.w +iadd r0.w, r0.w, r3.x +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r1.x, r1.x, l(1) +imad r0.w, r0.w, l(1280), r1.x +imul null, r0.w, r0.w, l(9) +movc r1.xy, vThreadID.xyxx, l(0,0,0,0), l(1,1,0,0) +movc r1.xy, r2.yyyy, r1.xyxx, l(0,0,0,0) +bfi r4.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r0.zxxz, l(0, 0, 0, 0) +iadd r4.xyzw, r4.xyzw, vThreadID.xyyx +and r0.xz, CB0[0][0].zzzz, l(8, 0, 0x01000000, 0) +if_nz r0.x + ubfe r2.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + iadd r1.zw, r2.yyyz, l(0, 0, 31, 31) + ishr r5.xyzw, r4.zwzw, l(4, 5, 3, 3) + ishr r0.x, r2.x, l(2) + ushr r1.zw, r1.zzzw, l(0, 0, 4, 5) + and r1.z, r1.z, l(2046) + imad r1.z, r0.x, r1.z, r5.x + imad r1.z, r1.z, r1.w, r5.y + ishl r1.w, r4.z, l(12) + and r1.w, r1.w, l(0x00006000) + bfi r1.w, l(3), l(10), r4.w, r1.w + ishr r1.w, r1.w, l(6) + iadd r0.x, r0.x, r5.z + bfi r2.y, l(1), l(1), r0.x, l(0) + iadd r2.y, r2.y, r5.w + bfi r2.y, l(2), l(1), r2.y, l(0) + bfi r0.x, l(1), l(0), r0.x, r2.y + bfi r3.xy, l(18, 18, 0, 0), l(12, 15, 0, 0), r1.zzzz, l(0, 0, 0, 0) + imad r1.zw, r1.wwww, l(0, 0, 2, 16), r3.xxxy + bfi r1.zw, l(0, 0, 2, 2), l(0, 0, 10, 13), r2.xxxx, r1.zzzw + bfi r2.x, l(1), l(4), r4.z, l(0) + ubfe r2.y, l(3), l(6), r1.z + and r3.x, r0.x, l(6) + bfi r0.x, l(1), l(8), r0.x, l(0) + imad r0.x, r2.y, l(32), r0.x + imad r0.x, r3.x, l(4), r0.x + bfi r1.zw, l(0, 0, 5, 5), l(0, 0, 0, 3), r2.xxxx, r1.zzzw + bfi r0.x, l(9), l(3), r0.x, r1.w + bfi r0.x, l(6), l(0), r1.z, r0.x +else + ishr r5.xyzw, r4.xyzw, l(5, 5, 2, 3) + iadd r1.z, r2.z, l(31) + ushr r1.z, r1.z, l(5) + imad r1.z, r5.y, r1.z, r5.x + ishl r1.w, r4.z, l(7) + and r2.xy, r1.wwww, l(1792, 2048, 0, 0) + bfi r1.w, l(3), l(5), r4.w, r2.x + bfi r1.w, l(21), l(11), r1.z, r1.w + bfi r2.z, l(1), l(4), r4.z, l(0) + iadd r1.w, r1.w, r2.z + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r4.wwww, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.zzzz, r3.xyxx + imad r2.xz, r2.zzzz, l(8, 0, 4, 0), r3.xxyx + bfi r1.z, l(12), l(0), r2.y, r2.x + and r2.x, r2.z, l(1792) + iadd r1.z, r1.z, r2.x + and r2.x, r5.z, l(2) + iadd r2.x, r5.w, r2.x + bfi r2.x, l(2), l(6), r2.x, l(0) + iadd r1.z, r1.z, r2.x + bfi r0.x, l(6), l(0), r1.w, r1.z +endif +imul null, r0.x, r0.x, l(9) +ushr r0.xw, r0.xxxw, l(4, 0, 0, 1) +imad r1.y, r1.y, l(3), r0.w +iadd r1.z, r1.x, r1.y +ld r4.yw, r1.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r4.xz, r4.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xy, r4.ywyy, l(16, 16, 0, 0) + f16tof32 r4.xy, r4.wyww + f16tof32 r4.zw, r2.yyyx + break + default + mov r4.xz, l(0,0,0,0) + break +endswitch +ibfe r1.w, l(6), l(16), CB0[0][0].z +ishl r1.w, r1.w, l(23) +iadd r1.w, r1.w, l(0x3f800000) +uge r2.x, r0.y, l(4) +if_nz r2.x + mul r2.y, r1.w, l(0.500000) + iadd r2.z, r1.z, l(720) + ld r5.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r4.xyzw, r5.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r2.y, r1.w, l(0.250000) + iadd r3.xy, r1.zzzz, l(9, 729, 0, 0) + ld r5.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r5.yyyw, l(16, 0, 0, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.wwwx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r4.ywxz, r5.ywxz + ld r6.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r4.xyzw, r5.zxwy, r6.xyzw + endif +else + mov r2.y, r1.w +endif +mul r4.xyzw, r2.yyyy, r4.ywxz +if_nz r0.z + mov r4.xz, r4.zzxz +endif +ieq r1.z, r2.w, l(5) +if_nz r1.z + mov r4.yw, r4.wwwy + mov r4.xyzw, r4.yzwx + mov r2.y, l(2) +else + mov r2.y, r2.w +endif +ieq r2.z, r2.y, l(4) +if_nz r2.z + mov r4.xyzw, r4.yxwz + mov r2.y, l(2) +endif +ieq r3.xyw, r2.yyyy, l(1, 2, 0, 3) +or r2.yz, r3.yywy, r3.xxyx +if_nz r2.y + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r2.z + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r4.xyzw, r0.xxxx, l(1, 2, 3, 4) +iadd r2.yz, r1.yyyy, l(0, 1, 2, 0) +ld r5.yw, r2.yyyy, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r2.y, r1.w, l(0.500000) + iadd r3.x, r1.y, l(721) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r0.y, l(6) + if_nz r3.x + mul r2.y, r1.w, l(0.250000) + iadd r3.xy, r1.yyyy, l(10, 730, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.y, r1.w +endif +mul r5.xyzw, r2.yyyy, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +if_nz r1.z + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r2.y, l(2) +else + mov r2.y, r2.w +endif +ieq r3.x, r2.y, l(4) +if_nz r3.x + mov r5.xyzw, r5.yxwz + mov r2.y, l(2) +endif +ieq r3.xyw, r2.yyyy, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +ld r5.yw, r2.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r5.yywy, l(0, 16, 16, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r2.zzzy + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r2.y, r1.w, l(0.500000) + iadd r2.z, r1.y, l(722) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.z, r0.y, l(6) + if_nz r2.z + mul r2.y, r1.w, l(0.250000) + iadd r3.xy, r1.yyyy, l(11, 731, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.y, r1.w +endif +mul r5.xyzw, r2.yyyy, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +if_nz r1.z + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r1.y, l(2) +else + mov r1.y, r2.w +endif +ieq r2.y, r1.y, l(4) +if_nz r2.y + mov r5.xyzw, r5.yxwz + mov r1.y, l(2) +endif +ieq r3.xyw, r1.yyyy, l(1, 2, 0, 3) +or r2.yz, r3.yywy, r3.xxyx +if_nz r2.y + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r2.z + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r1.x, r1.x, r0.w +iadd r2.yz, r1.xxxx, l(0, 3, 6, 0) +ld r5.yw, r2.yyyy, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.y, r1.w, l(0.500000) + iadd r2.y, r1.x, l(723) + ld r6.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.y, r0.y, l(6) + if_nz r2.y + mul r1.y, r1.w, l(0.250000) + iadd r3.xy, r1.xxxx, l(12, 732, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r6.yyyw, l(16, 0, 0, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r1.y, r1.w +endif +mul r5.xyzw, r1.yyyy, r5.ywxz +if_nz r0.z + mov r5.xz, r5.zzxz +endif +if_nz r1.z + mov r5.yw, r5.wwwy + mov r5.xyzw, r5.yzwx + mov r1.y, l(2) +else + mov r1.y, r2.w +endif +ieq r2.y, r1.y, l(4) +if_nz r2.y + mov r5.xyzw, r5.yxwz + mov r1.y, l(2) +endif +ieq r3.xyw, r1.yyyy, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r6.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r6.xyzw +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw +iadd r5.xyzw, r0.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.y, r1.w, l(0.500000) + iadd r2.y, r0.w, l(724) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.y, r0.y, l(6) + if_nz r2.y + mul r1.y, r1.w, l(0.250000) + iadd r3.xy, r0.wwww, l(13, 733, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.y, r1.w +endif +mul r6.xyzw, r1.yyyy, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +if_nz r1.z + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.y, l(2) +else + mov r1.y, r2.w +endif +ieq r2.y, r1.y, l(4) +if_nz r2.y + mov r6.xyzw, r6.yxwz + mov r1.y, l(2) +endif +ieq r3.xyw, r1.yyyy, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.wwww, r6.xyzw +iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.yw, r5.yyyy, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.y, r1.w, l(0.500000) + iadd r2.y, r0.w, l(725) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.y, r0.y, l(6) + if_nz r2.y + mul r1.y, r1.w, l(0.250000) + iadd r3.xy, r0.wwww, l(14, 734, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.y, r1.w +endif +mul r6.xyzw, r1.yyyy, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +if_nz r1.z + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.y, l(2) +else + mov r1.y, r2.w +endif +ieq r2.y, r1.y, l(4) +if_nz r2.y + mov r6.xyzw, r6.yxwz + mov r1.y, l(2) +endif +ieq r3.xyw, r1.yyyy, l(1, 2, 0, 3) +or r3.xy, r3.ywyy, r3.xyxx +if_nz r3.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.xxxx, r6.xyzw +ld r6.yw, r2.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r6.yywy, l(0, 16, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzy + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.y, r1.w, l(0.500000) + iadd r2.y, r1.x, l(726) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r7.yywy, l(0, 16, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.zzzy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.y, r0.y, l(6) + if_nz r2.y + mul r1.y, r1.w, l(0.250000) + iadd r2.yz, r1.xxxx, l(0, 15, 735, 0) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r8.yywy, l(0, 16, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.y, r1.w +endif +mul r6.xyzw, r1.yyyy, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +if_nz r1.z + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r1.y, r1.x, l(4) +if_nz r1.y + mov r6.xyzw, r6.yxwz + mov r1.x, l(2) +endif +ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) +or r1.xy, r3.ywyy, r3.xyxx +if_nz r1.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r1.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.yyyy, r6.xyzw +ld r6.yw, r5.zzzz, T0[0].zxwy +switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r1.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.x, r1.w, l(0.500000) + iadd r1.y, r0.w, l(727) + ld r7.yw, r1.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r7.yywy, l(0, 16, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.zzzy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r1.y, r0.y, l(6) + if_nz r1.y + mul r1.x, r1.w, l(0.250000) + iadd r2.yz, r0.wwww, l(0, 16, 736, 0) + ld r7.yw, r2.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r3.z + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.yz, r8.yywy, l(0, 16, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.zzzy + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.x, r1.w +endif +mul r6.xyzw, r1.xxxx, r6.ywxz +if_nz r0.z + mov r6.xz, r6.zzxz +endif +if_nz r1.z + mov r6.yw, r6.wwwy + mov r6.xyzw, r6.yzwx + mov r1.x, l(2) +else + mov r1.x, r2.w +endif +ieq r1.y, r1.x, l(4) +if_nz r1.y + mov r6.xyzw, r6.yxwz + mov r1.x, l(2) +endif +ieq r3.xyw, r1.xxxx, l(1, 2, 0, 3) +or r1.xy, r3.ywyy, r3.xyxx +if_nz r1.x + ishl r7.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r6.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r6.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r1.y + ushr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + bfi r6.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r6.xyzw, r7.xyzw +endif +store_uav_typed U0[0].xyzw, r4.zzzz, r6.xyzw +ld r5.yw, r5.wwww, T0[0].zxwy +switch r3.z + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r1.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r1.x, r1.w, l(0.500000) + iadd r1.y, r0.w, l(728) + ld r6.yw, r1.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r0.y, r0.y, l(6) + if_nz r0.y + mul r1.w, r1.w, l(0.250000) + iadd r0.yw, r0.wwww, l(0, 17, 0, 737) + ld r6.yw, r0.yyyy, T0[0].zxwy + switch r3.z + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r0.wwww, T0[0].zxwy + switch r3.z + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r3.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r3.xyzw, r3.xyzw + mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r0.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r0.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + else + mov r1.w, r1.x + endif +endif +mul r3.xyzw, r1.wwww, r5.ywxz +if_nz r0.z + mov r3.xz, r3.zzxz +endif +if_nz r1.z + mov r3.yw, r3.wwwy + mov r3.xyzw, r3.yzwx + mov r2.w, l(2) +endif +ieq r0.y, r2.w, l(4) +if_nz r0.y + mov r3.xyzw, r3.yxwz + mov r2.w, l(2) +endif +ieq r0.yzw, r2.wwww, l(0, 1, 2, 3) +or r0.yz, r0.zzwz, r0.yyzy +if_nz r0.y + ishl r1.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r2.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r1.xyzw, r2.xyzw +endif +if_nz r0.z + ushr r1.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r4.wwww, r3.xyzw +ret +// Approximately 1149 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.cso index 01c144913cf75a5b0463f9a90c49c3777e9aaed7..f782839f317da32bea489742e397ee290d331ac1 100644 GIT binary patch delta 271 zcmcbxl4;ILCPSA9C+D>Aegif(o2gY{juSK!D*iAsFfh!S!oa`^q)mXhhY83B;x$0b zu+gxdiPL8y14AHCK6vv^CO&2}?n4X$3?N+$7Z@1WSRiaB2ao^+1OO=kAU0=U;A{f3 z7#OrB8}wE+a0HsgIC&?V z^5hl$JdvY|ds;cJ*GxgDeaTVh}fg9oPb7e*)r#Kn(Jl_~eOGq$gKQ Gi2wi@qAcbB delta 289 zcmbQUlIg-qCPSA9C+F;%H1)3C9WfUdKe>#Nfq~(|6b1%XAZ-G~JxmM?bAWga z5Swf?tY_kEn8?5o2$WCQypxHK*@>fxK>(-@2re)%Z~@sM6Br#B7y^KFC<6n#6I4tJ zNsa|5XU@RD3DV0r`6sJ7uN9C50w9`kvS6j~WCu0_OAVkygn%L-^)MA6F(s&&7DzQv zPMLv$#|X-H1IbNpWm9GayKM4WHZ;>WKV(zyl{^A8Qw(Gy5P*zm0pc$}ylArGlxhHi CVk))( diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h index b8d9baa32..778d1969e 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_full_16bpp_2xres.cs.hlsl const uint8_t resolve_full_16bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x6B, 0x7C, 0xEC, 0x79, 0x5B, 0x45, 0x67, 0xAC, - 0xF7, 0x8E, 0xC4, 0x37, 0x17, 0x17, 0xC9, 0xA6, 0x01, 0x00, 0x00, 0x00, - 0xD0, 0x94, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x66, 0x57, 0x8F, 0x30, 0x06, 0x06, 0x3C, 0x95, + 0x7A, 0x56, 0x41, 0x90, 0x29, 0x60, 0x78, 0xFC, 0x01, 0x00, 0x00, 0x00, + 0x9C, 0x94, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, - 0x34, 0x94, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x00, 0x94, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -58,8 +58,8 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x2E, 0x31, 0x00, 0xAB, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x80, 0x91, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x60, 0x24, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x4C, 0x91, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x53, 0x24, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -124,87 +124,51 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0xE6, 0x0A, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, - 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 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0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, @@ -213,502 +177,505 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 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0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, @@ -719,91 +686,88 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, 0x36, 0x00, 0x00, 0x05, + 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, + 0x06, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 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0x08, 0x00, 0x00, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -813,12 +777,12 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, - 0x52, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, + 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, @@ -826,167 +790,320 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xD6, 0x02, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 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0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -1039,18 +1156,495 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, - 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x0F, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 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0x09, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -1103,86 +1697,27 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, - 0x72, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, - 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, - 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8A, 0x00, 0x00, 0x0F, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xE8, 0xFF, 0xFF, 0xFF, - 0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x0B, 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, - 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x11, 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0x00, - 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, - 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, - 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 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0x00, + 0x1A, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x0F, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, @@ -1198,18 +1733,18 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, @@ -1217,696 +1752,128 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 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-1917,82 +1884,79 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, 0x36, 0x00, 0x00, 0x05, + 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, + 0x06, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xE2, 0x00, 0x10, 0x00, - 0x0A, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x86, 0x0D, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x06, 0x08, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, + 0x06, 0x08, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -2001,13 +1965,13 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 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0x10, 0x00, 0x00, 0x00, @@ -2015,291 +1979,385 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0xD6, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x0E, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x02, 0x00, 0x00, 0x01, - 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x86, 0x0D, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x29, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, + 0x0C, 0x00, 0x00, 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0x36, 0x00, 0x00, 0x05, + 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -2352,151 +2410,60 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x37, 0x00, 0x00, 0x0C, 0xD2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x56, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x56, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x46, 0x0E, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x80, 0x3F, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, @@ -2577,10 +2612,10 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, + 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x80, 0x3F, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x1C, 0x00, 0x00, 0x05, @@ -2597,52 +2632,46 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, - 0xF2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 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0x00, 0x3F, @@ -2654,10 +2683,10 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, + 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0xE2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x09, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x7C, 0x42, 0x00, 0x00, 0xF8, 0x41, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x1C, 0x00, 0x00, 0x05, @@ -2671,46 +2700,46 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, - 0x72, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, - 0x00, 0x00, 0x7C, 0x42, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, - 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x05, - 0x72, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x32, 0x00, 0x00, 0x0F, 0xE2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x06, 0x09, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x7C, 0x42, - 0x00, 0x00, 0xF8, 0x41, 0x02, 0x40, 0x00, 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0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x20, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x00, 0x07, 0x42, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x1A, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x2A, 0x00, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x36, 0x20, 0x00, 0x05, + 0x72, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x06, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0x72, 0x00, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x7C, 0x42, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, @@ -2722,10 +2751,10 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, + 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0xE2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x09, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0xF8, 0x41, 0x00, 0x00, 0x7C, 0x42, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x1C, 0x00, 0x00, 0x05, @@ -2739,86 +2768,92 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, - 0x72, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 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0x00, 0x03, 0x00, 0x00, 0x00, + 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, + 0xF2, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x06, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x1C, 0x00, 0x00, 0x05, @@ -2833,9 +2868,9 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x00, 0x00, 0x70, 0x41, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x3F, @@ -2852,328 +2887,289 @@ const uint8_t resolve_full_16bpp_2xres_cs[] = { 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x36, 0x20, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, - 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+imad r3.y, r1.w, r2.x, r3.y iadd r3.x, r3.y, r3.x -ineg r4.x, r0.w -ineg r4.y, r1.z -imad r1.xy, r4.xyxx, l(80, 16, 0, 0), r1.xyxx -imad r0.w, r1.y, l(80), r1.x -ishl r0.w, r0.w, r1.w +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w imad r0.w, r3.x, l(1280), r0.w ld r1.xyzw, r0.wwww, T0[0].xzyw if_nz r3.z @@ -1264,4 +1261,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r0.ywyy ret -// Approximately 1220 instruction slots used +// Approximately 1217 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_cs.cso index 1375c33008fd0f1d0f34a5c00a95d6b97b201112..1ed15926bcacc89f1c4c6fa91e63f7fef502a4fc 100644 GIT binary patch delta 354 zcmdn6m+8+QCL@;!C+EJ>6_KscyF0GN$)8fn)9qknU|^`3$H2e}q)mYM1QP?p4Iq92 z#1H0fG}^_)`C%3VLm*JWp3PsG4lx^X8!-rgl`~vmU~mJnfhrl892gh^fV2P*!+<#h z17{OZgmLmuHu-uG3#5_@NP{f10?7brWvD8UoD@_Jq=p%)1|%-Wz`zdE57GxShXtaa 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z^YOd;EwD7bYCX5R#&4Mql=Xc4-kq#R@q0wp^YMFkvL40n5n0d2@7>9I6u(8*ir=h- z2Yw$Jf0vw?Mj7chOIhoDT7U10Pp#*+;&*)DH+5=T3O`-eGsITnFX>+Ab{Jb}H?X zF+AW!*)d+)Q(oAQJ)9SrXOK_*u^VMo4|Juh%7e_5RlWm1;rUUnW4|p1@752`!r*hP z?BC~aR*;FhIk}HVf0Yhi^~!n1*h_&Abo5V7JN72r`^d+!e}T@VUnJ){EbM7u8=ff} z^ZZiAGq!{`ygm)quuql<%epZ2|!wVvA%e$>tU`2JJn_hlOXkAL^y|K0x< y+6Vvb74L{6A=&>E2LE@6|IaA$vlRRfOWm>TUr&YqDee9ygYzF5pc^J)^8XK+ttEp1 literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..aadf419bd --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,21222 @@ +// generated from `xb buildhlsl` +// source: resolve_full_16bpp_from_32bpp_3xres.cs.hlsl +const uint8_t resolve_full_16bpp_from_32bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xF2, 0x06, 0x38, 0x8B, 0xA7, 0xE2, 0xC5, 0x9A, + 0x22, 0x97, 0x1B, 0xC5, 0xA0, 0x3E, 0x36, 0xDB, 0x01, 0x00, 0x00, 0x00, + 0x98, 0xE2, 0x03, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xFC, 0xE1, 0x03, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xA3, 0x05, 0x00, 0x00, 0x43, 0x02, 0x00, 0x00, 0x98, 0x02, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt new file mode 100644 index 000000000..4936f3e5c --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_32bpp_3xres_cs.txt @@ -0,0 +1,8017 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 28 +dcl_thread_group 8, 8, 1 +ishl r0.x, vThreadID.x, l(2) +ushr r0.z, CB0[0][0].y, l(7) +bfi r0.z, l(11), l(3), r0.z, l(0) +uge r0.z, r0.x, r0.z +if_nz r0.z + ret +endif +and r1.xyzw, CB0[0][0].xzwz, l(0x40000000, 7, 0x00003fff, 8) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +if_nz r1.w + ubfe r4.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + mov r4.z, r1.z + iadd r1.xw, r4.yyyz, l(31, 0, 0, 31) + ishr r5.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r2.w, r4.x, l(2) + ushr r1.xw, r1.xxxw, l(4, 0, 0, 5) + and r1.x, r1.x, l(2046) + imad r1.x, r2.w, r1.x, r5.x + imad r1.x, r1.x, r1.w, r5.y + ishl r1.w, r3.z, l(9) + and r1.w, r1.w, l(3072) + bfi r1.w, l(3), l(7), r3.w, r1.w + ishr r1.w, r1.w, l(6) + iadd r2.w, r2.w, r5.z + bfi r4.y, l(1), l(1), r2.w, l(0) + iadd r4.y, r4.y, r5.w + bfi r4.y, l(2), l(1), r4.y, l(0) + bfi r2.w, l(1), l(0), r2.w, r4.y + and r4.y, r1.w, l(48) + bfi r4.zw, l(0, 0, 21, 21), l(0, 0, 9, 12), r1.xxxx, l(0, 0, 0, 0) + imad r4.yz, r4.yyyy, l(0, 2, 16, 0), r4.zzwz + bfi r1.xw, l(4, 0, 0, 4), l(0, 0, 0, 3), r1.wwww, r4.yyyz + bfi r1.xw, l(2, 0, 0, 2), l(7, 0, 0, 10), r4.xxxx, r1.xxxw + ubfe r4.x, l(3), l(6), r1.x + and r4.y, r2.w, l(6) + bfi r2.w, l(1), l(8), r2.w, l(0) + imad r2.w, r4.x, l(32), r2.w + imad r2.w, r4.y, l(4), r2.w + bfi r1.xw, l(1, 0, 0, 1), l(4, 0, 0, 7), r3.zzzz, r1.xxxw + bfi r1.w, l(9), l(3), r2.w, r1.w + bfi r1.x, l(6), l(0), r1.x, r1.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r1.z, r1.z, l(31) + ushr r1.z, r1.z, l(5) + imad r1.z, r4.y, r1.z, r4.x + ishl r3.xy, r3.zzzz, l(3, 7, 0, 0) + and r3.xy, r3.xyxx, l(112, 2048, 0, 0) + bfi r1.w, l(3), l(1), r3.w, r3.x + ishl r2.w, r3.x, l(1) + bfi r2.w, l(3), l(2), r3.w, r2.w + and r2.w, r2.w, l(224) + bfi r3.x, l(24), l(8), r1.z, r2.w + bfi r3.x, l(4), l(0), r1.w, r3.x + bfi r3.x, l(1), l(4), r3.z, r3.x + ishl r4.xy, r2.wwww, l(3, 2, 0, 0) + bfi r4.xy, l(24, 24, 0, 0), l(11, 10, 0, 0), r1.zzzz, r4.xyxx + bfi r1.zw, l(0, 0, 4, 4), l(0, 0, 3, 2), r1.wwww, r4.xxxy + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 7, 6), r3.zzzz, r1.zzzw + bfi r1.z, l(12), l(0), r3.y, r1.z + and r1.w, r1.w, l(1792) + iadd r1.z, r1.z, r1.w + and r1.w, r4.z, l(2) + iadd r1.w, r4.w, r1.w + bfi r1.w, l(2), l(6), r1.w, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.x, l(6), l(0), r3.x, r1.z +endif +imul null, r1.x, r1.x, l(9) +ushr r1.x, r1.x, l(3) +bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r1.zwzz +and r1.zw, CB0[0][0].xxxz, l(0, 0, 1023, 0x01000000) +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r2.x, l(3), r2.y +if_nz r2.x + mov r4.y, r2.y +else + ieq r2.x, r2.y, l(5) + if_nz r2.x + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.zw, r2.xxxz, l(0, 0, 1, 1) +ishl r0.xy, r0.xyxx, r2.zwzz +ushr r4.x, r4.y, l(1) +and r2.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r0.xy, r0.xyxx, r2.zwzz +udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) +movc r3.z, r3.w, l(1), l(0) +ishl r3.w, r2.z, r3.z +imad r1.z, r2.w, r1.z, r3.w +iadd r1.z, r1.z, r3.y +imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r3.z +imad r0.x, r1.z, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.y, T0[0].wxyz +imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) +ld_raw r5.x, r2.z, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r3.yz, r9.zzwz + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r10.xy, r9.xwxx + mov r9.x, r4.x + and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) + utof r0.y, r5.w + mul r5.w, r0.y, l(0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r9.x + mov r4.w, r9.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.y, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.y + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.y, l(6), l(16), CB0[0][0].z +ishl r0.y, r0.y, l(23) +iadd r0.y, r0.y, l(0x3f800000) +uge r2.z, r2.y, l(4) +if_nz r2.z + mul r3.y, r0.y, l(0.500000) + imad r3.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 2880, 2896) + ld_raw r9.xyzw, r3.z, T0[0].wxyz + ld_raw r10.x, r3.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + utof r3.zw, r14.zzzw + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r14.z, r10.w + mul r10.w, r14.z, l(0.333333) + mov r11.w, r3.z + mov r12.w, r3.w + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.zw, r10.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r10.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r3.z, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.z + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r3.z, r2.y, l(6) + if_nz r3.z + mul r3.y, r0.y, l(0.250000) + imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.zw, r15.zzzw + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r15.x, r11.w + mul r11.w, r15.x, l(0.333333) + mov r12.w, r3.z + mov r13.w, r3.w + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.zw, r11.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r11.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r3.z, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.z + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r16.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + utof r3.zw, r19.zzzw + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r19.z, r9.w + mul r9.w, r19.z, l(0.333333) + mov r16.w, r3.z + mov r17.w, r3.w + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.zw, r9.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r9.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r3.z, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r3.z + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r3.y, r0.y +endif +mul r6.xyzw, r3.yyyy, r6.xyzw +mul r7.xyzw, r3.yyyy, r7.xyzw +mul r8.xyzw, r3.yyyy, r8.xyzw +mul r4.xyzw, r3.yyyy, r4.xyzw +mul r5.xyzw, r3.yyyy, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r4.xz, r4.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.x, r11.w, l(0x00008000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.z, r11.w, l(0x00008000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.w, r11.w, l(0x00008000), r3.y + mov_sat r4.xyzw, r4.xyzw + mad r11.xyzw, r4.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r9.y, r11.w, l(0x00008000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(32), r11.x + imad r3.y, r11.z, l(1024), r3.y + imad r10.x, r11.w, l(0x00008000), r3.y + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.x, r3.w, l(2048), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.z, r3.w, l(2048), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.w, r3.w, l(2048), r3.y + mov_sat r4.xyz, r4.xyzx + mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.y, r3.w, l(2048), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r3.y + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.x, r3.w, l(1024), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.z, r3.w, l(1024), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.w, r3.w, l(1024), r3.y + mov_sat r4.xyz, r4.xyzx + mad r3.yzw, r4.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r9.y, r3.w, l(1024), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r3.y + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.x, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.z, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.w, r3.z, l(256), r3.y + mov_sat r4.xy, r4.xyxx + mad r3.yz, r4.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.y, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.x, r11.w, l(4096), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.z, r11.w, l(4096), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.w, r11.w, l(4096), r3.y + mov_sat r4.xyzw, r4.xyzw + mad r11.xyzw, r4.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r9.y, r11.w, l(4096), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(16), r11.x + imad r3.y, r11.z, l(256), r3.y + imad r10.x, r11.w, l(4096), r3.y + break + case l(24) + mov_sat r6.x, r6.x + mad r3.y, r6.x, l(65535.000000), l(0.500000) + ftou r9.x, r3.y + mov_sat r7.x, r7.x + mad r3.y, r7.x, l(65535.000000), l(0.500000) + ftou r9.z, r3.y + mov_sat r8.x, r8.x + mad r3.y, r8.x, l(65535.000000), l(0.500000) + ftou r9.w, r3.y + mov_sat r4.x, r4.x + mad r3.y, r4.x, l(65535.000000), l(0.500000) + ftou r9.y, r3.y + mov_sat r5.x, r5.x + mad r3.y, r5.x, l(65535.000000), l(0.500000) + ftou r10.x, r3.y + break + default + f32tof16 r9.x, r6.x + f32tof16 r9.z, r7.x + f32tof16 r9.w, r8.x + f32tof16 r9.y, r4.x + f32tof16 r10.x, r5.x + break +endswitch +ieq r1.y, r1.y, l(1) +if_nz r1.y + bfi r4.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.xzwy, l(0, 0, 0, 0) + ushr r5.xyzw, r9.xzwy, l(8, 8, 8, 8) + iadd r9.xyzw, r4.xwyz, r5.xwyz + bfi r3.y, l(8), l(8), r10.x, l(0) + ushr r3.z, r10.x, l(8) + iadd r10.x, r3.y, r3.z + mov r4.xy, r9.xwxx + mov r9.xy, r9.zyzz +else + mov r4.xy, r9.xwxx + mov r9.xy, r9.zyzz +endif +ld_raw r5.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r12.x, r5.y + mov r12.yz, r11.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r6.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r11.zzwz + ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r11.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r7.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r11.x, r5.w + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r8.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r4.zw, r11.xxxw + mov r11.x, r5.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r4.z + mov r5.w, r4.w + break + case l(4) + ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r11.zzwz + ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r5.y + f16tof32 r6.y, r11.x + f16tof32 r7.x, r5.z + f16tof32 r7.y, r11.y + f16tof32 r8.x, r5.w + f16tof32 r8.y, r11.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r11.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r5.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r5.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.w + mov r8.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.w, r0.y, l(0.500000) + imad r3.y, r0.x, l(36), l(2900) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r16.x, r11.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r16.x, r11.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r11.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.zw, r15.xxxw + mov r15.x, r11.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r4.z + mov r11.w, r4.w + break + case l(4) + ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r11.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r15.zzwz + ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r11.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r11.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r11.w + f16tof32 r14.y, r15.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r11.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r11.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.w + mov r14.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r12.xyzw + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r5.xyzw, r5.xyzw, r11.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.w, r0.y, l(0.250000) + imad r3.yz, r0.xxxx, l(0, 36, 36, 0), l(0, 56, 2936, 0) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r11.wwww, l(0, 8, 16, 24) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r15.x, r11.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r15.x, r11.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r11.wwww, l(0, 10, 20, 30) + mov r15.x, r11.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r16.x, r11.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.yw, r15.zzzw + ushr r15.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r16.x, r11.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r15.x, r11.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.zw, r15.xxxw + mov r15.x, r11.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r12.w, r3.y + mov r13.w, r3.w + mov r14.w, r4.z + mov r11.w, r4.w + break + case l(4) + ishl r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r11.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r15.zzwz + ishr r15.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r11.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r11.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r11.w + f16tof32 r14.y, r15.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r11.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r11.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.w + mov r14.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r3.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r4.zw, r19.xxxw + mov r19.x, r15.x + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r4.z + mov r15.w, r4.w + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r5.xyzw, r11.xyzw, r15.xyzw + endif +else + mov r2.w, r0.y +endif +mul r6.xyzw, r2.wwww, r6.xyzw +mul r7.xyzw, r2.wwww, r7.xyzw +mul r8.xyzw, r2.wwww, r8.xyzw +mul r5.xyzw, r2.wwww, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.y, r12.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.z, r12.w, l(0x00008000), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.w, r12.w, l(0x00008000), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r12.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r11.x, r12.w, l(0x00008000), r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.y, r3.w, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.z, r3.w, l(2048), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.w, r3.w, l(2048), r2.w + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.x, r3.w, l(2048), r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.y, r3.w, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.z, r3.w, l(1024), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.w, r3.w, l(1024), r2.w + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r11.x, r3.w, l(1024), r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.y, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.z, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.w, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.y, r12.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.z, r12.w, l(4096), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.w, r12.w, l(4096), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r12.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r11.x, r12.w, l(4096), r2.w + break + case l(24) + mov_sat r6.x, r6.x + mad r2.w, r6.x, l(65535.000000), l(0.500000) + ftou r11.y, r2.w + mov_sat r7.x, r7.x + mad r2.w, r7.x, l(65535.000000), l(0.500000) + ftou r11.z, r2.w + mov_sat r8.x, r8.x + mad r2.w, r8.x, l(65535.000000), l(0.500000) + ftou r11.w, r2.w + mov_sat r5.x, r5.x + mad r2.w, r5.x, l(65535.000000), l(0.500000) + ftou r11.x, r2.w + break + default + f32tof16 r11.y, r6.x + f32tof16 r11.z, r7.x + f32tof16 r11.w, r8.x + f32tof16 r11.x, r5.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yzwx, l(0, 0, 0, 0) + ushr r6.xyzw, r11.yzwx, l(8, 8, 8, 8) + iadd r11.xyzw, r5.wxyz, r6.wxyz + mov r9.zw, r11.yyyw + mov r10.y, r11.z +else + mov r9.zw, r11.yyyw + mov r10.y, r11.z +endif +if_nz r0.z + mov r4.x, r9.x + mov r9.y, r10.x + mov r10.y, r9.w +endif +if_nz r0.w + mov r4.xy, r9.yzyy + mov r9.x, r10.x +endif +imad r4.xyzw, r9.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) +imad r5.xyzw, r9.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +movc r0.z, r2.x, l(72), l(36) +imad r0.x, r0.x, l(36), r0.z +ld_raw r5.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r6.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r12.x, r5.y + mov r12.yz, r10.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r10.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r5.w + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r11.zw, r10.xxxw + mov r10.x, r5.x + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + mul r10.xy, r11.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r12.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx + ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r6.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) + utof r2.x, r6.w + mul r6.w, r2.x, l(0.333333) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r10.x + mov r5.w, r10.y + break + case l(4) + ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r10.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r10.zzwz + ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r6.y, r6.x, l(16) + ishr r3.yz, r6.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r6.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r5.w + f16tof32 r9.y, r10.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r10.w + ushr r2.x, r6.x, l(16) + f16tof32 r6.x, r6.x + f16tof32 r6.y, r2.x + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r5.w + mov r9.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.x, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + ld_raw r12.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r16.x, r10.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r16.x, r10.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r10.wwww, l(0, 8, 16, 24) + mov r16.x, r10.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r10.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r16.x, r10.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r16.x, r10.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r10.wwww, l(0, 10, 20, 30) + mov r16.x, r10.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r10.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r17.x, r10.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r3.yz, r16.zzwz + ushr r16.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r17.x, r10.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r16.x, r10.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r11.zw, r16.xxxw + mov r16.x, r10.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r10.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r3.w, r12.w + mul r12.w, r3.w, l(0.333333) + mov r13.w, r3.y + mov r14.w, r3.z + mov r15.w, r11.z + mov r10.w, r11.w + break + case l(4) + ishl r16.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r10.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r16.zzwz + ishr r16.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r10.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r10.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r10.w + f16tof32 r15.y, r16.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r16.w + ushr r3.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r3.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r10.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r10.w + mov r15.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.x, r0.y, l(0.250000) + iadd r10.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r10.x, T0[0].wxyz + ld_raw r13.x, r10.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r18.x, r12.y + mov r18.yz, r17.xxyx + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r3.yzwy, r18.xyzx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r10.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r3.w, r13.w + mul r13.w, r3.w, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r10.x + mov r12.w, r10.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r3.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r3.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r7.xyzw, r14.xyzw + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r9.xyzw, r16.xyzw + add r12.xyzw, r5.xyzw, r12.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + ld_raw r17.xyzw, r10.z, T0[0].wxyz + ld_raw r10.x, r10.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r10.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r10.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r22.x, r17.y + mov r22.yz, r21.xxyx + and r3.yzw, r22.xxyz, l(0, 1023, 1023, 1023) + and r23.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r18.xyz, r3.yzwy, r22.xyzx, l(0,0,0,0) + utof r3.yz, r21.zzwz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r22.x, r17.z + mov r22.yz, r21.xxwx + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r21.x, r17.w + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r11.zw, r21.xxxw + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r21.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r10.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r3.w, r10.w + mul r10.w, r3.w, l(0.333333) + mov r18.w, r3.y + mov r19.w, r3.z + mov r20.w, r11.z + mov r17.w, r11.w + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r3.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r14.xyzw, r18.xyzw + add r8.xyzw, r15.xyzw, r19.xyzw + add r9.xyzw, r16.xyzw, r20.xyzw + add r5.xyzw, r12.xyzw, r17.xyzw + add r6.xyzw, r10.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r9.xyzw, r2.xxxx, r9.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +mul r6.xyzw, r2.xxxx, r6.xyzw +if_nz r1.w + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r5.xz, r5.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.y, r13.w, l(0x00008000), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.z, r13.w, l(0x00008000), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.w, r13.w, l(0x00008000), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r10.x, r13.w, l(0x00008000), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r12.x, r13.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r2.x + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.z, r3.w, l(2048), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.w, r3.w, l(2048), r2.x + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r12.x, r3.w, l(2048), r2.x + break + case l(5) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r2.x + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.z, r3.w, l(1024), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.w, r3.w, l(1024), r2.x + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r12.x, r3.w, l(1024), r2.x + break + case l(10) + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.z, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.w, r3.z, l(256), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.x, r3.z, l(256), r3.y + break + case l(15) + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.y, r13.w, l(4096), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.z, r13.w, l(4096), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.w, r13.w, l(4096), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r10.x, r13.w, l(4096), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r12.x, r13.w, l(4096), r2.x + break + case l(24) + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r10.y, r2.x + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r10.z, r2.x + mov_sat r9.x, r9.x + mad r2.x, r9.x, l(65535.000000), l(0.500000) + ftou r10.w, r2.x + mov_sat r5.x, r5.x + mad r2.x, r5.x, l(65535.000000), l(0.500000) + ftou r10.x, r2.x + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r12.x, r2.x + break + default + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r10.x, r5.x + f32tof16 r12.x, r6.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.yzwx, l(0, 0, 0, 0) + ushr r6.xyzw, r10.yzwx, l(8, 8, 8, 8) + iadd r10.xyzw, r5.wxyz, r6.wxyz + bfi r2.x, l(8), l(8), r12.x, l(0) + ushr r3.y, r12.x, l(8) + iadd r12.x, r2.x, r3.y + mov r3.yz, r10.yywy + mov r11.y, r10.z +else + mov r3.yz, r10.yywy + mov r11.y, r10.z +endif +ld_raw r5.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r9.x, r5.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r9.x, r5.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r5.wwww, l(0, 8, 16, 24) + mov r9.x, r5.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r9.x, r5.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r9.x, r5.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r5.wwww, l(0, 10, 20, 30) + mov r9.x, r5.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r13.x, r5.y + mov r13.yz, r9.xxyx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r6.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r13.x, r5.z + mov r13.yz, r9.xxwx + and r14.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r17.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r16.xyzx, r15.xyzx, r13.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r15.xyzx, r13.xyzx + movc r7.xyz, r14.xyzx, r13.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r5.w + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r8.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r10.zw, r9.xxxw + mov r9.x, r5.x + and r13.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r16.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r15.xyzx, r14.xyzx, r9.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r14.xyzx, r9.xyzx + movc r5.xyz, r13.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.zwzz, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r6.w, r2.x + mov r7.w, r2.w + mov r8.w, r9.x + mov r5.w, r9.y + break + case l(4) + ishl r9.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r13.xz, r9.xxyx + mov r13.yw, r5.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r9.zzwz + ishr r9.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r5.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r5.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r5.w + f16tof32 r8.y, r9.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r9.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r5.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r5.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.w + mov r8.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.x, r0.y, l(0.500000) + iadd r2.w, r0.x, l(2900) + ld_raw r9.xyzw, r2.w, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r16.x, r9.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r16.x, r9.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r9.wwww, l(0, 8, 16, 24) + mov r16.x, r9.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r9.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r16.x, r9.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r16.x, r9.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r9.wwww, l(0, 10, 20, 30) + mov r16.x, r9.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r9.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r17.x, r9.y + mov r17.yz, r16.xxyx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + utof r10.zw, r16.zzzw + ushr r16.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r17.x, r9.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r16.x, r9.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r11.zw, r16.xxxw + mov r16.x, r9.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r9.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r13.w, r10.z + mov r14.w, r10.w + mov r15.w, r11.z + mov r9.w, r11.w + break + case l(4) + ishl r16.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r9.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r16.zzwz + ishr r16.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r9.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r9.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r9.w + f16tof32 r15.y, r16.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r13.x, r9.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r9.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r9.w + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r13.xyzw + add r7.xyzw, r7.xyzw, r14.xyzw + add r8.xyzw, r8.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r9.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r2.x, r0.y, l(0.250000) + iadd r9.xy, r0.xxxx, l(56, 2936, 0, 0) + ld_raw r13.xyzw, r9.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r13.yyyy, l(0, 8, 16, 24) + mov r17.x, r13.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r13.zzzz, l(0, 8, 16, 24) + mov r17.x, r13.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r13.wwww, l(0, 8, 16, 24) + mov r17.x, r13.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r13.yyyy, l(0, 10, 20, 30) + mov r17.x, r13.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r13.zzzz, l(0, 10, 20, 30) + mov r17.x, r13.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r13.wwww, l(0, 10, 20, 30) + mov r17.x, r13.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r13.yyyz, l(10, 20, 30, 30) + mov r18.x, r13.y + mov r18.yz, r17.xxyx + and r9.xzw, r18.xxyz, l(1023, 0, 1023, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r9.xzwx, r18.xyzx, l(0,0,0,0) + utof r9.xz, r17.zzwz + ushr r17.xyzw, r13.zwwz, l(10, 10, 20, 20) + mov r18.x, r13.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r17.x, r13.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r13.wxxx, l(30, 10, 20, 30) + utof r10.zw, r17.xxxw + mov r17.x, r13.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r13.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.w, r9.x + mov r15.w, r9.z + mov r16.w, r10.z + mov r13.w, r10.w + break + case l(4) + ishl r17.xyzw, r13.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r13.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.yz, r17.zzwz + ishr r17.xyzw, r13.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r13.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r13.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r13.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r13.w + f16tof32 r16.y, r17.z + f16tof32 r13.x, r13.x + f16tof32 r13.y, r17.w + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r13.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r13.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r13.w + mov r16.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r6.xyzw, r14.xyzw + add r15.xyzw, r7.xyzw, r15.xyzw + add r16.xyzw, r8.xyzw, r16.xyzw + add r13.xyzw, r5.xyzw, r13.xyzw + ld_raw r9.xyzw, r9.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r20.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r20.x, r9.y + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r20.x, r9.z + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r9.wwww, l(0, 8, 16, 24) + mov r20.x, r9.w + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r20.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r9.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r20.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r20.x, r9.y + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r20.x, r9.z + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r9.wwww, l(0, 10, 20, 30) + mov r20.x, r9.w + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r9.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r20.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r21.x, r9.y + mov r21.yz, r20.xxyx + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + utof r10.zw, r20.zzzw + ushr r20.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r21.x, r9.z + mov r21.yz, r20.xxwx + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r18.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r10.zw, r10.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r20.x, r9.w + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r19.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + ushr r20.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r11.zw, r20.xxxw + mov r20.x, r9.x + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r9.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r11.zw, r11.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r17.w, r10.z + mov r18.w, r10.w + mov r19.w, r11.z + mov r9.w, r11.w + break + case l(4) + ishl r20.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r21.xz, r20.xxyx + mov r21.yw, r9.yyyz + ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r20.zzwz + ishr r20.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r20.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r17.x, r9.y + f16tof32 r17.y, r20.x + f16tof32 r18.x, r9.z + f16tof32 r18.y, r20.y + f16tof32 r19.x, r9.w + f16tof32 r19.y, r20.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r20.w + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r17.x, r9.y + mov r17.yzw, l(0,0,0,0) + mov r18.x, r9.z + mov r18.yzw, l(0,0,0,0) + mov r19.x, r9.w + mov r19.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r14.xyzw, r17.xyzw + add r7.xyzw, r15.xyzw, r18.xyzw + add r8.xyzw, r16.xyzw, r19.xyzw + add r5.xyzw, r9.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r5.xyzw, r2.xxxx, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r5.xz, r5.zzxz +endif +switch r3.x + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.z, r13.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.w, r13.w, l(0x00008000), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.x, r13.w, l(0x00008000), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(32), r13.x + imad r2.x, r13.z, l(1024), r2.x + imad r9.y, r13.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r13.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.z, r13.z, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r13.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.w, r13.z, l(2048), r2.x + mov_sat r8.xyz, r8.xyzx + mad r13.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.x, r13.z, l(2048), r2.x + mov_sat r5.xyz, r5.xyzx + mad r13.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.y, r13.z, l(2048), r2.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r13.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.z, r13.z, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r13.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.w, r13.z, l(1024), r2.x + mov_sat r8.xyz, r8.xyzx + mad r13.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.x, r13.z, l(1024), r2.x + mov_sat r5.xyz, r5.xyzx + mad r13.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r13.xyz, r13.xyzx + imad r2.x, r13.y, l(32), r13.x + imad r9.y, r13.z, l(1024), r2.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mad r2.xw, r6.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.z, r2.w, l(256), r2.x + mov_sat r7.xy, r7.xyxx + mad r2.xw, r7.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.w, r2.w, l(256), r2.x + mov_sat r8.xy, r8.xyxx + mad r2.xw, r8.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.x, r2.w, l(256), r2.x + mov_sat r5.xy, r5.xyxx + mad r2.xw, r5.xxxy, l(255.000000, 0.000000, 0.000000, 255.000000), l(0.500000, 0.000000, 0.000000, 0.500000) + ftou r2.xw, r2.xxxw + imad r9.y, r2.w, l(256), r2.x + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.z, r13.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.w, r13.w, l(4096), r2.x + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.x, r13.w, l(4096), r2.x + mov_sat r5.xyzw, r5.xyzw + mad r13.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r2.x, r13.y, l(16), r13.x + imad r2.x, r13.z, l(256), r2.x + imad r9.y, r13.w, l(4096), r2.x + break + case l(24) + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r9.z, r2.x + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r9.w, r2.x + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r9.x, r2.x + mov_sat r5.x, r5.x + mad r2.x, r5.x, l(65535.000000), l(0.500000) + ftou r9.y, r2.x + break + default + f32tof16 r9.z, r6.x + f32tof16 r9.w, r7.x + f32tof16 r9.x, r8.x + f32tof16 r9.y, r5.x + break +endswitch +if_nz r1.y + bfi r5.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r9.zwxy, l(0, 0, 0, 0) + ushr r6.xyzw, r9.zwxy, l(8, 8, 8, 8) + iadd r9.xyzw, r5.zwxy, r6.zwxy + mov r10.y, r9.z + mov r12.y, r9.w +else + mov r10.y, r9.z + mov r12.y, r9.w +endif +if_nz r0.w + mov r3.yz, r10.xxyx + mov r11.y, r12.x +endif +imad r5.xyzw, r3.yzyy, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyxx +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +imad r5.xyzw, r12.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.xyxx +store_uav_typed U0[0].xyzw, r4.zzzz, r5.xyzw +imad r5.xzw, r9.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r9.xxxx +iadd r0.x, r0.z, r0.x +ld_raw r6.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r7.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r4.x, r6.y + mov r4.yz, r11.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r12.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r14.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r13.xyzx, r12.xyzx, r4.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r12.xyzx, r4.xyzx + movc r8.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r11.zzwz + ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r4.x, r6.z + mov r4.yz, r11.xxwx + and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r13.xyzx, r4.xyzx + movc r9.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r11.x, r6.w + and r4.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r14.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r13.xyzx, r12.xyzx, r11.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r10.xyz, r4.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r4.xy, r11.xwxx + mov r11.x, r6.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r6.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r11.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx + ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) + utof r2.x, r7.w + mul r7.w, r2.x, l(0.333333) + mov r8.w, r3.y + mov r9.w, r3.z + mov r10.w, r4.x + mov r6.w, r4.y + break + case l(4) + ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r6.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r11.zzwz + ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r8.x, r6.y + f16tof32 r8.y, r11.x + f16tof32 r9.x, r6.z + f16tof32 r9.y, r11.y + f16tof32 r10.x, r6.w + f16tof32 r10.y, r11.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r11.w + ushr r2.x, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r2.x + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.x, r6.y + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.z + mov r9.yzw, l(0,0,0,0) + mov r10.x, r6.w + mov r10.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.x, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r11.xyzw, r3.y, T0[0].wxyz + ld_raw r12.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r4.x, r11.y + mov r4.yz, r16.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r19.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r18.xyzx, r17.xyzx, r4.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r17.xyzx, r4.xyzx + movc r13.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r16.zzwz + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r4.x, r11.z + mov r4.yz, r16.xxwx + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r16.x, r11.w + and r4.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r4.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r4.xy, r16.xwxx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r3.w, r12.w + mul r12.w, r3.w, l(0.333333) + mov r13.w, r3.y + mov r14.w, r3.z + mov r15.w, r4.x + mov r11.w, r4.y + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + ushr r3.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r3.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r9.xyzw, r14.xyzw + add r10.xyzw, r10.xyzw, r15.xyzw + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.x, r0.y, l(0.250000) + iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r11.x, T0[0].wxyz + ld_raw r13.x, r11.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r4.x, r12.y + mov r4.yz, r17.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r14.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r4.x, r12.z + mov r4.yz, r17.xxwx + and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r19.xyzx, r4.xyzx + movc r15.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r4.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r4.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r4.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r3.w, r13.w + mul r13.w, r3.w, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r4.x + mov r12.w, r4.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r3.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r3.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r8.xyzw, r14.xyzw + add r15.xyzw, r9.xyzw, r15.xyzw + add r16.xyzw, r10.xyzw, r16.xyzw + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + ld_raw r17.xyzw, r11.z, T0[0].wxyz + ld_raw r11.x, r11.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r4.x, r17.y + mov r4.yz, r21.xxyx + and r3.yzw, r4.xxyz, l(0, 1023, 1023, 1023) + and r22.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r24.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r23.xyzx, r22.xyzx, r4.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r22.xyzx, r4.xyzx + movc r18.xyz, r3.yzwy, r4.xyzx, l(0,0,0,0) + utof r3.yz, r21.zzwz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r4.x, r17.z + mov r4.yz, r21.xxwx + and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r23.xyzx, r4.xyzx + movc r19.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r21.x, r17.w + and r4.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r20.xyz, r4.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r4.xy, r21.xwxx + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r3.w, r11.w + mul r11.w, r3.w, l(0.333333) + mov r18.w, r3.y + mov r19.w, r3.z + mov r20.w, r4.x + mov r17.w, r4.y + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r3.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r14.xyzw, r18.xyzw + add r9.xyzw, r15.xyzw, r19.xyzw + add r10.xyzw, r16.xyzw, r20.xyzw + add r6.xyzw, r12.xyzw, r17.xyzw + add r7.xyzw, r11.xyzw, r13.xyzw + endif +else + mov r2.x, r0.y +endif +mul r8.xyzw, r2.xxxx, r8.xyzw +mul r9.xyzw, r2.xxxx, r9.xyzw +mul r10.xyzw, r2.xxxx, r10.xyzw +mul r6.xyzw, r2.xxxx, r6.xyzw +mul r7.xyzw, r2.xxxx, r7.xyzw +if_nz r1.w + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r10.xz, r10.zzxz + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz +endif +switch r3.x + case l(3) + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.y, r12.w, l(0x00008000), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.x, r12.w, l(0x00008000), r2.x + mov_sat r10.xyzw, r10.xyzw + mad r12.xyzw, r10.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.z, r12.w, l(0x00008000), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r11.w, r12.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(32), r12.x + imad r2.x, r12.z, l(1024), r2.x + imad r4.y, r12.w, l(0x00008000), r2.x + break + case l(4) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.y, r3.w, l(2048), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.x, r3.w, l(2048), r2.x + mov_sat r10.xyz, r10.xyzx + mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.z, r3.w, l(2048), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.w, r3.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r4.y, r3.w, l(2048), r2.x + break + case l(5) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.y, r3.w, l(1024), r2.x + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.x, r3.w, l(1024), r2.x + mov_sat r10.xyz, r10.xyzx + mad r3.yzw, r10.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.z, r3.w, l(1024), r2.x + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r11.w, r3.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.x, r3.z, l(32), r3.y + imad r4.y, r3.w, l(1024), r2.x + break + case l(10) + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.y, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.x, r3.z, l(256), r3.y + mov_sat r10.xy, r10.xyxx + mad r3.yz, r10.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.z, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r11.w, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r4.y, r3.z, l(256), r3.y + break + case l(15) + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.y, r12.w, l(4096), r2.x + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.x, r12.w, l(4096), r2.x + mov_sat r10.xyzw, r10.xyzw + mad r12.xyzw, r10.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.z, r12.w, l(4096), r2.x + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r11.w, r12.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.x, r12.y, l(16), r12.x + imad r2.x, r12.z, l(256), r2.x + imad r4.y, r12.w, l(4096), r2.x + break + case l(24) + mov_sat r8.x, r8.x + mad r2.x, r8.x, l(65535.000000), l(0.500000) + ftou r11.y, r2.x + mov_sat r9.x, r9.x + mad r2.x, r9.x, l(65535.000000), l(0.500000) + ftou r11.x, r2.x + mov_sat r10.x, r10.x + mad r2.x, r10.x, l(65535.000000), l(0.500000) + ftou r11.z, r2.x + mov_sat r6.x, r6.x + mad r2.x, r6.x, l(65535.000000), l(0.500000) + ftou r11.w, r2.x + mov_sat r7.x, r7.x + mad r2.x, r7.x, l(65535.000000), l(0.500000) + ftou r4.y, r2.x + break + default + f32tof16 r11.y, r8.x + f32tof16 r11.x, r9.x + f32tof16 r11.z, r10.x + f32tof16 r11.w, r6.x + f32tof16 r4.y, r7.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r11.yxzw, l(0, 0, 0, 0) + ushr r7.xyzw, r11.yxzw, l(8, 8, 8, 8) + iadd r11.xyzw, r6.yxzw, r7.yxzw + bfi r2.x, l(8), l(8), r4.y, l(0) + ushr r3.y, r4.y, l(8) + iadd r4.y, r2.x, r3.y + mov r2.x, r11.y + mov r4.x, r11.z +else + mov r2.x, r11.y + mov r4.x, r11.z +endif +ld_raw r6.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r10.x, r6.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r10.x, r6.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r6.wwww, l(0, 8, 16, 24) + mov r10.x, r6.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r10.x, r6.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r10.x, r6.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r6.wwww, l(0, 10, 20, 30) + mov r10.x, r6.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r6.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r12.x, r6.y + mov r12.yz, r10.xxyx + and r3.yzw, r12.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r7.xyz, r3.yzwy, r12.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r12.x, r6.z + mov r12.yz, r10.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r6.w + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r9.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r12.xy, r10.xwxx + mov r10.x, r6.x + and r13.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r16.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r15.xyzx, r14.xyzx, r10.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r14.xyzx, r10.xyzx + movc r6.xyz, r13.xyzx, r10.xyzx, l(0,0,0,0) + mul r10.xy, r12.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r10.x + mov r6.w, r10.y + break + case l(4) + ishl r10.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r12.xz, r10.xxyx + mov r12.yw, r6.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r10.zzwz + ishr r10.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r6.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r6.w + f16tof32 r9.y, r10.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r10.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r6.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.w + mov r9.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.w, r0.y, l(0.500000) + iadd r3.y, r0.x, l(2900) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r16.xy, r15.xwxx + mov r15.x, r10.x + and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r18.xyzx, r15.xyzx + movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) + mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r15.x + mov r10.w, r15.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r9.xyzw, r14.xyzw + add r6.xyzw, r6.xyzw, r10.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.w, r0.y, l(0.250000) + iadd r3.yz, r0.xxxx, l(0, 56, 2936, 0) + ld_raw r10.xyzw, r3.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.yw, r15.zzzw + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yw, r3.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r16.xy, r15.xwxx + mov r15.x, r10.x + and r17.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r20.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r19.xyzx, r18.xyzx, r15.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r18.xyzx, r15.xyzx + movc r10.xyz, r17.xyzx, r15.xyzx, l(0,0,0,0) + mul r15.xy, r16.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r12.w, r3.y + mov r13.w, r3.w + mov r14.w, r15.x + mov r10.w, r15.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r14.xyzw, r9.xyzw, r14.xyzw + add r10.xyzw, r6.xyzw, r10.xyzw + ld_raw r15.xyzw, r3.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r12.xyzw, r16.xyzw + add r8.xyzw, r13.xyzw, r17.xyzw + add r9.xyzw, r14.xyzw, r18.xyzw + add r6.xyzw, r10.xyzw, r15.xyzw + endif +else + mov r2.w, r0.y +endif +mul r7.xyzw, r2.wwww, r7.xyzw +mul r8.xyzw, r2.wwww, r8.xyzw +mul r9.xyzw, r2.wwww, r9.xyzw +mul r6.xyzw, r2.wwww, r6.xyzw +if_nz r1.w + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.w, r12.w, l(0x00008000), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.x, r12.w, l(0x00008000), r2.w + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.y, r12.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(32), r12.x + imad r2.w, r12.z, l(1024), r2.w + imad r10.z, r12.w, l(0x00008000), r2.w + break + case l(4) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.w, r3.w, l(2048), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.x, r3.w, l(2048), r2.w + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.z, r3.w, l(2048), r2.w + break + case l(5) + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.w, r3.w, l(1024), r2.w + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.x, r3.w, l(1024), r2.w + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r2.w, r3.z, l(32), r3.y + imad r10.z, r3.w, l(1024), r2.w + break + case l(10) + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.w, r3.z, l(256), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.x, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.z, r3.z, l(256), r3.y + break + case l(15) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.w, r12.w, l(4096), r2.w + mov_sat r8.xyzw, r8.xyzw + mad r12.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.x, r12.w, l(4096), r2.w + mov_sat r9.xyzw, r9.xyzw + mad r12.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.y, r12.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r12.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r2.w, r12.y, l(16), r12.x + imad r2.w, r12.z, l(256), r2.w + imad r10.z, r12.w, l(4096), r2.w + break + case l(24) + mov_sat r7.x, r7.x + mad r2.w, r7.x, l(65535.000000), l(0.500000) + ftou r10.w, r2.w + mov_sat r8.x, r8.x + mad r2.w, r8.x, l(65535.000000), l(0.500000) + ftou r10.x, r2.w + mov_sat r9.x, r9.x + mad r2.w, r9.x, l(65535.000000), l(0.500000) + ftou r10.y, r2.w + mov_sat r6.x, r6.x + mad r2.w, r6.x, l(65535.000000), l(0.500000) + ftou r10.z, r2.w + break + default + f32tof16 r10.w, r7.x + f32tof16 r10.x, r8.x + f32tof16 r10.y, r9.x + f32tof16 r10.z, r6.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r10.wxyz, l(0, 0, 0, 0) + ushr r7.xyzw, r10.wxyz, l(8, 8, 8, 8) + iadd r10.xyzw, r6.yzwx, r7.yzwx + mov r11.y, r10.w +else + mov r11.y, r10.w +endif +if_nz r0.w + mov r2.x, r11.w + mov r11.x, r4.y + mov r4.x, r11.y +endif +imad r5.y, r11.x, l(0x00010000), r2.x +store_uav_typed U0[0].xyzw, r4.wwww, r5.xyzw +iadd r5.xyzw, r1.xxxx, l(5, 6, 7, 8) +imad r4.xyzw, r11.wyww, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r4.xyxx +store_uav_typed U0[0].xyzw, r5.xxxx, r4.xyzw +imad r4.xzw, r10.yyyy, l(0x00010000, 0, 0x00010000, 0x00010000), r10.xxxx +iadd r0.x, r0.z, r0.x +ld_raw r6.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r7.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r12.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r12.x, r6.y + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r8.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r12.x, r6.z + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r9.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r6.wwww, l(0, 8, 16, 24) + mov r12.x, r6.w + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r12.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r6.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.yzw, r7.xxxx, l(0, 8, 16, 24) + and r12.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r7.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r12.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r12.x, r6.y + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r8.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r12.x, r6.z + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r9.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r6.wwww, l(0, 10, 20, 30) + mov r12.x, r6.w + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r12.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r6.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r12.xyzw, r7.xyzw, l(1023, 1023, 1023, 3) + utof r12.xyzw, r12.xyzw + mul r7.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r12.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r13.x, r6.y + mov r13.yz, r12.xxyx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r13.xyxz, l(127, 127, 0, 127) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r15.xyz, r10.xywx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r10.xywx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r15.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r14.xyxz, r10.xyxw, r13.xyxz + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r13.xyxz, r10.xyxw + movc r8.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r12.zzwz + ushr r12.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r13.x, r6.z + mov r13.yz, r12.xxwx + and r10.xyw, r13.xyxz, l(1023, 1023, 0, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r9.xyz, r10.xywx, r13.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r12.x, r6.w + and r10.xyw, r12.xyxz, l(1023, 1023, 0, 1023) + and r13.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r15.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r14.xyzx, r13.xyzx, r12.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r11.xyz, r10.xywx, r12.xyzx, l(0,0,0,0) + ushr r12.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r10.xy, r12.xwxx + mov r12.x, r6.x + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r6.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r7.yzw, r7.xxxx, l(0, 10, 20, 30) + and r12.xyz, r7.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r7.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r7.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r15.xyzx, r7.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r14.xyzx, r13.xyzx, r15.xyzx + ishl r14.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r7.xyz, r12.xyzx, r13.xyzx, l(0,0,0,0) + utof r0.z, r7.w + mul r7.w, r0.z, l(0.333333) + mov r8.w, r3.y + mov r9.w, r3.z + mov r11.w, r10.x + mov r6.w, r10.y + break + case l(4) + ishl r12.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r13.xz, r12.xxyx + mov r13.yw, r6.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r12.zzwz + ishr r12.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r7.y, r7.x, l(16) + ishr r3.yz, r7.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r7.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + case l(6) + ushr r12.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r8.x, r6.y + f16tof32 r8.y, r12.x + f16tof32 r9.x, r6.z + f16tof32 r9.y, r12.y + f16tof32 r11.x, r6.w + f16tof32 r11.y, r12.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r12.w + ushr r0.z, r7.x, l(16) + f16tof32 r7.x, r7.x + f16tof32 r7.y, r0.z + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + break + default + mov r8.x, r6.y + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.z + mov r9.yzw, l(0,0,0,0) + mov r11.x, r6.w + mov r11.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + mov r7.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r0.z, r0.y, l(0.500000) + iadd r3.yz, r0.xxxx, l(0, 2880, 2896, 0) + ld_raw r12.xyzw, r3.y, T0[0].wxyz + ld_raw r13.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r18.x, r12.y + mov r18.yz, r17.xxyx + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r18.xyxz, l(127, 127, 0, 127) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r20.xyz, r10.xywx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r10.xywx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r19.xyxz, r10.xyxw, r18.xyxz + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r18.xyxz, r10.xyxw + movc r14.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r17.zzwz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r15.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r12.w + and r10.xyw, r17.xyxz, l(1023, 1023, 0, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r16.xyz, r10.xywx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r10.xy, r17.xwxx + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r2.x, r13.w + mul r13.w, r2.x, l(0.333333) + mov r14.w, r3.y + mov r15.w, r3.z + mov r16.w, r10.x + mov r12.w, r10.y + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r3.yz, r13.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r13.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r2.x, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r2.x + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r11.xyzw, r11.xyzw, r16.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + add r7.xyzw, r7.xyzw, r13.xyzw + uge r2.x, r2.y, l(6) + if_nz r2.x + mul r0.z, r0.y, l(0.250000) + iadd r12.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r13.xyzw, r12.x, T0[0].wxyz + ld_raw r14.x, r12.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r18.yzw, r13.yyyy, l(0, 8, 16, 24) + mov r18.x, r13.y + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r13.zzzz, l(0, 8, 16, 24) + mov r18.x, r13.z + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r13.wwww, l(0, 8, 16, 24) + mov r18.x, r13.w + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r13.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r18.yzw, r13.yyyy, l(0, 10, 20, 30) + mov r18.x, r13.y + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r13.zzzz, l(0, 10, 20, 30) + mov r18.x, r13.z + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r13.wwww, l(0, 10, 20, 30) + mov r18.x, r13.w + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r13.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r18.xyzw, r13.yyyz, l(10, 20, 30, 30) + mov r19.x, r13.y + mov r19.yz, r18.xxyx + and r3.yzw, r19.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r19.xyxz, l(127, 127, 0, 127) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r21.xyz, r10.xywx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r10.xywx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r21.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r20.xyxz, r10.xyxw, r19.xyxz + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r19.xyxz, r10.xyxw + movc r15.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r18.zzwz + ushr r18.xyzw, r13.zwwz, l(10, 10, 20, 20) + mov r19.x, r13.z + mov r19.yz, r18.xxwx + and r10.xyw, r19.xyxz, l(1023, 1023, 0, 1023) + and r20.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r22.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r21.xyzx, r20.xyzx, r19.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r16.xyz, r10.xywx, r19.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r18.x, r13.w + and r10.xyw, r18.xyxz, l(1023, 1023, 0, 1023) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r17.xyz, r10.xywx, r18.xyzx, l(0,0,0,0) + ushr r18.xyzw, r13.wxxx, l(30, 10, 20, 30) + utof r10.xy, r18.xwxx + mov r18.x, r13.x + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r13.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r21.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r20.xyzx, r19.xyzx, r21.xyzx + ishl r20.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r20.xyzx, r19.xyzx + movc r14.xyz, r18.xyzx, r19.xyzx, l(0,0,0,0) + utof r2.x, r14.w + mul r14.w, r2.x, l(0.333333) + mov r15.w, r3.y + mov r16.w, r3.z + mov r17.w, r10.x + mov r13.w, r10.y + break + case l(4) + ishl r18.xyzw, r13.yzwx, l(16, 16, 16, 16) + mov r19.xz, r18.xxyx + mov r19.yw, r13.yyyz + ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.yz, r18.zzwz + ishr r18.xyzw, r13.ywzx, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r14.y, r14.x, l(16) + ishr r3.yz, r14.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r14.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r18.xyzw, r13.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r13.y + f16tof32 r15.y, r18.x + f16tof32 r16.x, r13.z + f16tof32 r16.y, r18.y + f16tof32 r17.x, r13.w + f16tof32 r17.y, r18.z + f16tof32 r13.x, r13.x + f16tof32 r13.y, r18.w + ushr r2.x, r14.x, l(16) + f16tof32 r14.x, r14.x + f16tof32 r14.y, r2.x + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r13.y + mov r15.yzw, l(0,0,0,0) + mov r16.x, r13.z + mov r16.yzw, l(0,0,0,0) + mov r17.x, r13.w + mov r17.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r9.xyzw, r16.xyzw + add r17.xyzw, r11.xyzw, r17.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + add r14.xyzw, r7.xyzw, r14.xyzw + ld_raw r18.xyzw, r12.z, T0[0].wxyz + ld_raw r12.x, r12.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r22.yzw, r18.yyyy, l(0, 8, 16, 24) + mov r22.x, r18.y + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r19.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r22.yzw, r18.zzzz, l(0, 8, 16, 24) + mov r22.x, r18.z + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r20.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r22.yzw, r18.wwww, l(0, 8, 16, 24) + mov r22.x, r18.w + and r22.xyzw, r22.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r21.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r18.xxxx, l(0, 8, 16, 24) + and r22.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r18.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r22.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r22.xyzw, r22.xyzw + mul r12.xyzw, r22.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r22.yzw, r18.yyyy, l(0, 10, 20, 30) + mov r22.x, r18.y + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r19.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r22.yzw, r18.zzzz, l(0, 10, 20, 30) + mov r22.x, r18.z + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r20.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r22.yzw, r18.wwww, l(0, 10, 20, 30) + mov r22.x, r18.w + and r22.xyzw, r22.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r21.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r18.xxxx, l(0, 10, 20, 30) + and r22.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r18.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r22.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r22.xyzw, r22.xyzw + mul r12.xyzw, r22.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r22.xyzw, r18.yyyz, l(10, 20, 30, 30) + mov r23.x, r18.y + mov r23.yz, r22.xxyx + and r3.yzw, r23.xxyz, l(0, 1023, 1023, 1023) + and r10.xyw, r23.xyxz, l(127, 127, 0, 127) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx + firstbit_hi r25.xyz, r10.xywx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r10.xywx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r25.xyzx, r23.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r10.xyw, r24.xyxz, r10.xyxw, r23.xyxz + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyw, r10.xyxw, l(16, 16, 0, 16) + iadd r10.xyw, r23.xyxz, r10.xyxw + movc r19.xyz, r3.yzwy, r10.xywx, l(0,0,0,0) + utof r3.yz, r22.zzwz + ushr r22.xyzw, r18.zwwz, l(10, 10, 20, 20) + mov r23.x, r18.z + mov r23.yz, r22.xxwx + and r10.xyw, r23.xyxz, l(1023, 1023, 0, 1023) + and r24.xyz, r23.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r23.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r26.xyzx, r23.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r23.xyz, r25.xyzx, r24.xyzx, r23.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) + iadd r23.xyz, r24.xyzx, r23.xyzx + movc r20.xyz, r10.xywx, r23.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r22.x, r18.w + and r10.xyw, r22.xyxz, l(1023, 1023, 0, 1023) + and r23.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r25.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r24.xyzx, r23.xyzx, r22.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r21.xyz, r10.xywx, r22.xyzx, l(0,0,0,0) + ushr r22.xyzw, r18.wxxx, l(30, 10, 20, 30) + utof r10.xy, r22.xwxx + mov r22.x, r18.x + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r18.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r10.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r22.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r25.xyz, l(7, 7, 7, 0), r25.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r25.xyz, r25.xyzx, l(127, 127, 127, 0) + movc r23.xyz, r24.xyzx, r23.xyzx, r25.xyzx + ishl r24.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r23.xyz, r23.xyzx, l(16, 16, 16, 0) + iadd r23.xyz, r24.xyzx, r23.xyzx + movc r12.xyz, r22.xyzx, r23.xyzx, l(0,0,0,0) + utof r2.x, r12.w + mul r12.w, r2.x, l(0.333333) + mov r19.w, r3.y + mov r20.w, r3.z + mov r21.w, r10.x + mov r18.w, r10.y + break + case l(4) + ishl r22.xyzw, r18.yzwx, l(16, 16, 16, 16) + mov r23.xz, r22.xxyx + mov r23.yw, r18.yyyz + ishr r23.xyzw, r23.xyzw, l(16, 16, 16, 16) + itof r23.xyzw, r23.xyzw + mul r23.xyzw, r23.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r23.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r20.xy, r23.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.yz, r22.zzwz + ishr r22.xyzw, r18.ywzx, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r21.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r3.yz, r12.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r12.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r21.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r22.xyzw, r18.yzwx, l(16, 16, 16, 16) + f16tof32 r19.x, r18.y + f16tof32 r19.y, r22.x + f16tof32 r20.x, r18.z + f16tof32 r20.y, r22.y + f16tof32 r21.x, r18.w + f16tof32 r21.y, r22.z + f16tof32 r18.x, r18.x + f16tof32 r18.y, r22.w + ushr r2.x, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r2.x + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r21.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r19.x, r18.y + mov r19.yzw, l(0,0,0,0) + mov r20.x, r18.z + mov r20.yzw, l(0,0,0,0) + mov r21.x, r18.w + mov r21.yzw, l(0,0,0,0) + mov r18.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r8.xyzw, r15.xyzw, r19.xyzw + add r9.xyzw, r16.xyzw, r20.xyzw + add r11.xyzw, r17.xyzw, r21.xyzw + add r6.xyzw, r13.xyzw, r18.xyzw + add r7.xyzw, r12.xyzw, r14.xyzw + endif +else + mov r0.z, r0.y +endif +mul r8.xyzw, r0.zzzz, r8.xyzw +mul r9.xyzw, r0.zzzz, r9.xyzw +mul r11.xyzw, r0.zzzz, r11.xyzw +mul r6.xyzw, r0.zzzz, r6.xyzw +mul r7.xyzw, r0.zzzz, r7.xyzw +if_nz r1.w + mov r8.xz, r8.zzxz + mov r9.xz, r9.zzxz + mov r11.xz, r11.zzxz + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz +endif +switch r3.x + case l(3) + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.x, r13.w, l(0x00008000), r0.z + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.z, r13.w, l(0x00008000), r0.z + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.w, r13.w, l(0x00008000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r12.y, r13.w, l(0x00008000), r0.z + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(32), r13.x + imad r0.z, r13.z, l(1024), r0.z + imad r10.y, r13.w, l(0x00008000), r0.z + break + case l(4) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.x, r3.w, l(2048), r0.z + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.z, r3.w, l(2048), r0.z + mov_sat r11.xyz, r11.xyzx + mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.w, r3.w, l(2048), r0.z + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.y, r3.w, l(2048), r0.z + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 63.000000, 31.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r10.y, r3.w, l(2048), r0.z + break + case l(5) + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.x, r3.w, l(1024), r0.z + mov_sat r9.xyz, r9.xyzx + mad r3.yzw, r9.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.z, r3.w, l(1024), r0.z + mov_sat r11.xyz, r11.xyzx + mad r3.yzw, r11.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.w, r3.w, l(1024), r0.z + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r12.y, r3.w, l(1024), r0.z + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 31.000000, 31.000000, 63.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r0.z, r3.z, l(32), r3.y + imad r10.y, r3.w, l(1024), r0.z + break + case l(10) + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.x, r3.z, l(256), r3.y + mov_sat r9.xy, r9.xyxx + mad r3.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.z, r3.z, l(256), r3.y + mov_sat r11.xy, r11.xyxx + mad r3.yz, r11.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.w, r3.z, l(256), r3.y + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r12.y, r3.z, l(256), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r10.y, r3.z, l(256), r3.y + break + case l(15) + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.x, r13.w, l(4096), r0.z + mov_sat r9.xyzw, r9.xyzw + mad r13.xyzw, r9.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.z, r13.w, l(4096), r0.z + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.w, r13.w, l(4096), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r12.y, r13.w, l(4096), r0.z + mov_sat r7.xyzw, r7.xyzw + mad r13.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(16), r13.x + imad r0.z, r13.z, l(256), r0.z + imad r10.y, r13.w, l(4096), r0.z + break + case l(24) + mov_sat r8.x, r8.x + mad r0.z, r8.x, l(65535.000000), l(0.500000) + ftou r12.x, r0.z + mov_sat r9.x, r9.x + mad r0.z, r9.x, l(65535.000000), l(0.500000) + ftou r12.z, r0.z + mov_sat r11.x, r11.x + mad r0.z, r11.x, l(65535.000000), l(0.500000) + ftou r12.w, r0.z + mov_sat r6.x, r6.x + mad r0.z, r6.x, l(65535.000000), l(0.500000) + ftou r12.y, r0.z + mov_sat r7.x, r7.x + mad r0.z, r7.x, l(65535.000000), l(0.500000) + ftou r10.y, r0.z + break + default + f32tof16 r12.x, r8.x + f32tof16 r12.z, r9.x + f32tof16 r12.w, r11.x + f32tof16 r12.y, r6.x + f32tof16 r10.y, r7.x + break +endswitch +if_nz r1.y + bfi r6.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r12.xzwy, l(0, 0, 0, 0) + ushr r7.xyzw, r12.xzwy, l(8, 8, 8, 8) + iadd r12.xyzw, r6.xwyz, r7.xwyz + bfi r0.z, l(8), l(8), r10.y, l(0) + ushr r2.x, r10.y, l(8) + iadd r10.y, r0.z, r2.x + mov r0.z, r12.x + mov r10.x, r12.w + mov r12.xy, r12.zyzz +else + mov r0.z, r12.x + mov r10.x, r12.w + mov r12.xy, r12.zyzz +endif +ld_raw r6.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r6.yyyy, l(0, 8, 16, 24) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.zzzz, l(0, 8, 16, 24) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r6.wwww, l(0, 8, 16, 24) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r6.yyyy, l(0, 10, 20, 30) + mov r11.x, r6.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.zzzz, l(0, 10, 20, 30) + mov r11.x, r6.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r6.wwww, l(0, 10, 20, 30) + mov r11.x, r6.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r6.yyyz, l(10, 20, 30, 30) + mov r13.x, r6.y + mov r13.yz, r11.xxyx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r7.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) + utof r2.xw, r11.zzzw + ushr r11.xyzw, r6.zwwz, l(10, 10, 20, 20) + mov r13.x, r6.z + mov r13.yz, r11.xxwx + and r3.yzw, r13.xxyz, l(0, 1023, 1023, 1023) + and r14.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r16.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r13.xyz, r15.xyzx, r14.xyzx, r13.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r13.xyz, r13.xyzx, l(16, 16, 16, 0) + iadd r13.xyz, r14.xyzx, r13.xyzx + movc r8.xyz, r3.yzwy, r13.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r11.x, r6.w + and r3.yzw, r11.xxyz, l(0, 1023, 1023, 1023) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r9.xyz, r3.yzwy, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r6.wxxx, l(30, 10, 20, 30) + utof r3.yz, r11.xxwx + mov r11.x, r6.x + and r13.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r16.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r15.xyzx, r14.xyzx, r11.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r14.xyzx, r11.xyzx + movc r6.xyz, r13.xyzx, r11.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r7.w, r2.x + mov r8.w, r2.w + mov r9.w, r3.y + mov r6.w, r3.z + break + case l(4) + ishl r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + mov r13.xz, r11.xxyx + mov r13.yw, r6.yyyz + ishr r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.yz, r11.zzwz + ishr r11.xyzw, r6.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r6.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r6.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r6.y + f16tof32 r7.y, r11.x + f16tof32 r8.x, r6.z + f16tof32 r8.y, r11.y + f16tof32 r9.x, r6.w + f16tof32 r9.y, r11.z + f16tof32 r6.x, r6.x + f16tof32 r6.y, r11.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r6.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r6.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r6.w + mov r9.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r2.x, r0.y, l(0.500000) + iadd r2.z, r0.x, l(2900) + ld_raw r11.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r17.x, r11.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r2.zw, r16.zzzw + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + mul r2.zw, r2.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r16.x, r11.w + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r3.yz, r16.xxwx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r2.z + mov r14.w, r2.w + mov r15.w, r3.y + mov r11.w, r3.z + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r9.xyzw, r9.xyzw, r15.xyzw + add r6.xyzw, r6.xyzw, r11.xyzw + uge r2.y, r2.y, l(6) + if_nz r2.y + mul r0.y, r0.y, l(0.250000) + iadd r2.yz, r0.xxxx, l(0, 56, 2936, 0) + ld_raw r11.xyzw, r2.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r17.x, r11.y + mov r17.yz, r16.xxyx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r13.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + utof r2.yw, r16.zzzw + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r3.yzw, r17.xxyz, l(0, 1023, 1023, 1023) + and r18.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r20.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r19.xyzx, r18.xyzx, r17.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r14.xyz, r3.yzwy, r17.xyzx, l(0,0,0,0) + mul r2.yw, r2.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r16.x, r11.w + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r15.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r3.yz, r16.xxwx + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r13.w, r2.y + mov r14.w, r2.w + mov r15.w, r3.y + mov r11.w, r3.z + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r15.xyzw, r9.xyzw, r15.xyzw + add r11.xyzw, r6.xyzw, r11.xyzw + ld_raw r16.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r20.yzw, r16.yyyy, l(0, 8, 16, 24) + mov r20.x, r16.y + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r16.zzzz, l(0, 8, 16, 24) + mov r20.x, r16.z + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r20.yzw, r16.wwww, l(0, 8, 16, 24) + mov r20.x, r16.w + and r20.xyzw, r20.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r16.xxxx, l(0, 8, 16, 24) + and r20.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r20.xyzw, r20.xyzw + mul r16.xyzw, r20.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r20.yzw, r16.yyyy, l(0, 10, 20, 30) + mov r20.x, r16.y + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r17.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r16.zzzz, l(0, 10, 20, 30) + mov r20.x, r16.z + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r18.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r20.yzw, r16.wwww, l(0, 10, 20, 30) + mov r20.x, r16.w + and r20.xyzw, r20.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r19.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r16.xxxx, l(0, 10, 20, 30) + and r20.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r20.xyzw, r20.xyzw + mul r16.xyzw, r20.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r20.xyzw, r16.yyyz, l(10, 20, 30, 30) + mov r21.x, r16.y + mov r21.yz, r20.xxyx + and r2.yzw, r21.xxyz, l(0, 1023, 1023, 1023) + and r3.yzw, r21.xxyz, l(0, 127, 127, 127) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r23.xyz, r3.yzwy + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r3.yzwy, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r23.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r3.yzw, r22.xxyz, r3.yyzw, r21.xxyz + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r3.yzw, r3.yyzw, l(0, 16, 16, 16) + iadd r3.yzw, r21.xxyz, r3.yyzw + movc r17.xyz, r2.yzwy, r3.yzwy, l(0,0,0,0) + utof r2.yz, r20.zzwz + ushr r20.xyzw, r16.zwwz, l(10, 10, 20, 20) + mov r21.x, r16.z + mov r21.yz, r20.xxwx + and r3.yzw, r21.xxyz, l(0, 1023, 1023, 1023) + and r22.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r24.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r23.xyzx, r22.xyzx, r21.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r18.xyz, r3.yzwy, r21.xyzx, l(0,0,0,0) + mul r2.yz, r2.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r20.x, r16.w + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r19.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + ushr r20.xyzw, r16.wxxx, l(30, 10, 20, 30) + utof r3.yz, r20.xxwx + mov r20.x, r16.x + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r16.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.w, r2.y + mov r18.w, r2.z + mov r19.w, r3.y + mov r16.w, r3.z + break + case l(4) + ishl r20.xyzw, r16.yzwx, l(16, 16, 16, 16) + mov r21.xz, r20.xxyx + mov r21.yw, r16.yyyz + ishr r21.xyzw, r21.xyzw, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r18.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.yz, r20.zzwz + ishr r20.xyzw, r16.ywzx, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r19.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + break + case l(6) + ushr r20.xyzw, r16.yzwx, l(16, 16, 16, 16) + f16tof32 r17.x, r16.y + f16tof32 r17.y, r20.x + f16tof32 r18.x, r16.z + f16tof32 r18.y, r20.y + f16tof32 r19.x, r16.w + f16tof32 r19.y, r20.z + f16tof32 r16.x, r16.x + f16tof32 r16.y, r20.w + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + break + default + mov r17.x, r16.y + mov r17.yzw, l(0,0,0,0) + mov r18.x, r16.z + mov r18.yzw, l(0,0,0,0) + mov r19.x, r16.w + mov r19.yzw, l(0,0,0,0) + mov r16.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r9.xyzw, r15.xyzw, r19.xyzw + add r6.xyzw, r11.xyzw, r16.xyzw + else + mov r0.y, r2.x + endif +endif +mul r2.xyzw, r0.yyyy, r7.xyzw +mul r7.xyzw, r0.yyyy, r8.xyzw +mul r8.xyzw, r0.yyyy, r9.xyzw +mul r6.xyzw, r0.yyyy, r6.xyzw +if_nz r1.w + mov r2.xz, r2.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r6.xz, r6.zzxz +endif +switch r3.x + case l(3) + mov_sat r2.xyzw, r2.xyzw + mad r9.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(32), r9.x + imad r0.x, r9.z, l(1024), r0.x + imad r3.x, r9.w, l(0x00008000), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r9.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(32), r9.x + imad r0.x, r9.z, l(1024), r0.x + imad r3.z, r9.w, l(0x00008000), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(32), r9.x + imad r0.x, r9.z, l(1024), r0.x + imad r3.y, r9.w, l(0x00008000), r0.x + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(32), r9.x + imad r0.x, r9.z, l(1024), r0.x + imad r3.w, r9.w, l(0x00008000), r0.x + break + case l(4) + mov_sat r2.xyz, r2.xyzx + mad r9.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.x, r9.z, l(2048), r0.x + mov_sat r7.xyz, r7.xyzx + mad r9.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.z, r9.z, l(2048), r0.x + mov_sat r8.xyz, r8.xyzx + mad r9.xyz, r8.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.y, r9.z, l(2048), r0.x + mov_sat r6.xyz, r6.xyzx + mad r9.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.w, r9.z, l(2048), r0.x + break + case l(5) + mov_sat r2.xyz, r2.xyzx + mad r9.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.x, r9.z, l(1024), r0.x + mov_sat r7.xyz, r7.xyzx + mad r9.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.z, r9.z, l(1024), r0.x + mov_sat r8.xyz, r8.xyzx + mad r9.xyz, r8.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.y, r9.z, l(1024), r0.x + mov_sat r6.xyz, r6.xyzx + mad r9.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r9.xyz, r9.xyzx + imad r0.x, r9.y, l(32), r9.x + imad r3.w, r9.z, l(1024), r0.x + break + case l(10) + mov_sat r2.xy, r2.xyxx + mad r0.xy, r2.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r3.x, r0.y, l(256), r0.x + mov_sat r7.xy, r7.xyxx + mad r0.xy, r7.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r3.z, r0.y, l(256), r0.x + mov_sat r8.xy, r8.xyxx + mad r0.xy, r8.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r3.y, r0.y, l(256), r0.x + mov_sat r6.xy, r6.xyxx + mad r0.xy, r6.xyxx, l(255.000000, 255.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r3.w, r0.y, l(256), r0.x + break + case l(15) + mov_sat r2.xyzw, r2.xyzw + mad r9.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(16), r9.x + imad r0.x, r9.z, l(256), r0.x + imad r3.x, r9.w, l(4096), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r9.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(16), r9.x + imad r0.x, r9.z, l(256), r0.x + imad r3.z, r9.w, l(4096), r0.x + mov_sat r8.xyzw, r8.xyzw + mad r9.xyzw, r8.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(16), r9.x + imad r0.x, r9.z, l(256), r0.x + imad r3.y, r9.w, l(4096), r0.x + mov_sat r6.xyzw, r6.xyzw + mad r9.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(16), r9.x + imad r0.x, r9.z, l(256), r0.x + imad r3.w, r9.w, l(4096), r0.x + break + case l(24) + mov_sat r2.x, r2.x + mad r0.x, r2.x, l(65535.000000), l(0.500000) + ftou r3.x, r0.x + mov_sat r7.x, r7.x + mad r0.x, r7.x, l(65535.000000), l(0.500000) + ftou r3.z, r0.x + mov_sat r8.x, r8.x + mad r0.x, r8.x, l(65535.000000), l(0.500000) + ftou r3.y, r0.x + mov_sat r6.x, r6.x + mad r0.x, r6.x, l(65535.000000), l(0.500000) + ftou r3.w, r0.x + break + default + f32tof16 r3.x, r2.x + f32tof16 r3.z, r7.x + f32tof16 r3.y, r8.x + f32tof16 r3.w, r6.x + break +endswitch +if_nz r1.y + bfi r2.xyzw, l(8, 8, 8, 8), l(8, 8, 8, 8), r3.xzyw, l(0, 0, 0, 0) + ushr r6.xyzw, r3.xzyw, l(8, 8, 8, 8) + iadd r3.xyzw, r2.xzyw, r6.xzyw +endif +if_nz r0.w + mov r0.z, r12.y + mov r12.x, r10.y + mov r10.x, r3.x +endif +imad r4.y, r0.z, l(0x00010000), r10.z +store_uav_typed U0[0].xyzw, r5.yyyy, r4.xyzw +imad r0.xyzw, r10.xyxx, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.xyxx +store_uav_typed U0[0].xyzw, r5.zzzz, r0.xyzw +imad r0.xyzw, r3.zwzz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyxx +store_uav_typed U0[0].xyzw, r5.wwww, r0.xyzw +ret +// Approximately 7970 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.cso new file mode 100644 index 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mode 100644 index 000000000..78e1fc662 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.h @@ -0,0 +1,9787 @@ +// generated from `xb buildhlsl` +// source: resolve_full_16bpp_from_64bpp_3xres.cs.hlsl +const uint8_t resolve_full_16bpp_from_64bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x35, 0x50, 0xEE, 0x43, 0xAB, 0x7D, 0x61, 0x6D, + 0x67, 0x29, 0x2A, 0xFE, 0xA4, 0x94, 0xFE, 0xF3, 0x01, 0x00, 0x00, 0x00, + 0x90, 0xCA, 0x01, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xF4, 0xC9, 0x01, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, + 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, + 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x64, 0x65, 0x73, 0x74, 0x00, 0x58, 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a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt new file mode 100644 index 000000000..a7ddf1ebe --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_16bpp_from_64bpp_3xres_cs.txt @@ -0,0 +1,4993 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture uint2 buf T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 11 +dcl_thread_group 8, 8, 1 +ishl r0.xw, vThreadID.xxxx, l(2, 0, 0, 2) +ushr r1.x, CB0[0][0].y, l(7) +bfi r1.x, l(11), l(3), r1.x, l(0) +uge r1.x, r0.w, r1.x +if_nz r1.x + ret +endif +ushr r1.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r1.z, CB0[0][0].y +bfi r2.xy, l(5, 2, 0, 0), l(3, 3, 0, 0), r1.zxzz, l(0, 0, 0, 0) +mov r0.yz, vThreadID.yyyy +iadd r2.xy, r0.wzww, r2.xyxx +and r3.xyzw, CB0[0][0].xxwz, l(1023, 0x40000000, 0x00003fff, 7) +ubfe r4.xyzw, l(12, 2, 6, 4), l(13, 10, 7, 25), CB0[0][0].xxzx +uge r1.w, l(3), r1.y +if_nz r1.w + mov r5.y, r1.y +else + ieq r1.w, r1.y, l(5) + if_nz r1.w + mov r5.y, l(2) + else + mov r5.y, l(0) + endif +endif +uge r2.zw, r4.yyyy, l(0, 0, 2, 1) +and r5.zw, r2.zzzw, l(0, 0, 1, 1) +ishl r2.xy, r2.xyxx, r5.zwzz +ushr r5.x, r5.y, l(1) +and r5.xy, r5.xyxx, l(1, 1, 0, 0) +iadd r2.xy, r2.xyxx, r5.xyxx +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +ishl r1.w, r5.x, l(1) +imad r1.w, r5.y, r3.x, r1.w +iadd r1.w, r1.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r2.x, r2.x, l(1) +imad r1.w, r1.w, l(1280), r2.x +imul null, r1.w, r1.w, l(9) +ushr r1.w, r1.w, l(1) +movc r2.x, r2.z, l(18), l(9) +movc r2.yz, r0.wwzw, l(0,0,0,0), l(0,1,1,0) +movc r2.yz, r3.yyyy, r2.yyzy, l(0,0,0,0) +bfi r5.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) +iadd r0.xyzw, r0.xyzw, r5.xyzw +and r1.xz, CB0[0][0].zzzz, l(8, 0, 0x01000000, 0) +if_nz r1.x + ubfe r3.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + iadd r4.xy, r3.yzyy, l(31, 31, 0, 0) + ishr r5.xyzw, r0.zwzw, l(4, 5, 3, 3) + ishr r1.x, r3.x, l(2) + ushr r4.xy, r4.xyxx, l(4, 5, 0, 0) + and r2.w, r4.x, l(2046) + imad r2.w, r1.x, r2.w, r5.x + imad r2.w, r2.w, r4.y, r5.y + ishl r3.y, r0.z, l(9) + and r3.y, r3.y, l(3072) + bfi r3.y, l(3), l(7), r0.w, r3.y + ishr r3.y, r3.y, l(6) + iadd r1.x, r1.x, r5.z + bfi r4.x, l(1), l(1), r1.x, l(0) + iadd r4.x, r4.x, r5.w + bfi r4.x, l(2), l(1), r4.x, l(0) + bfi r1.x, l(1), l(0), r1.x, r4.x + and r4.x, r3.y, l(48) + bfi r5.xy, l(21, 21, 0, 0), l(9, 12, 0, 0), r2.wwww, l(0, 0, 0, 0) + imad r4.xy, r4.xxxx, l(2, 16, 0, 0), r5.xyxx + bfi r4.xy, l(4, 4, 0, 0), l(0, 3, 0, 0), r3.yyyy, r4.xyxx + bfi r3.xy, l(2, 2, 0, 0), l(7, 10, 0, 0), r3.xxxx, r4.xyxx + ubfe r2.w, l(3), l(6), r3.x + and r4.x, r1.x, l(6) + bfi r1.x, l(1), l(8), r1.x, l(0) + imad r1.x, r2.w, l(32), r1.x + imad r1.x, r4.x, l(4), r1.x + bfi r3.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r0.zzzz, r3.xyxx + bfi r1.x, l(9), l(3), r1.x, r3.y + bfi r1.x, l(6), l(0), r3.x, r1.x +else + ishr r5.xyzw, r0.xyzw, l(5, 5, 2, 3) + iadd r0.x, r3.z, l(31) + ushr r0.x, r0.x, l(5) + imad r0.x, r5.y, r0.x, r5.x + ishl r3.xy, r0.zzzz, l(3, 7, 0, 0) + and r3.xy, r3.xyxx, l(112, 2048, 0, 0) + bfi r0.y, l(3), l(1), r0.w, r3.x + ishl r2.w, r3.x, l(1) + bfi r0.w, l(3), l(2), r0.w, r2.w + and r0.w, r0.w, l(224) + bfi r2.w, l(24), l(8), r0.x, r0.w + bfi r2.w, l(4), l(0), r0.y, r2.w + bfi r2.w, l(1), l(4), r0.z, r2.w + ishl r3.xz, r0.wwww, l(3, 0, 2, 0) + bfi r0.xw, l(24, 0, 0, 24), l(11, 0, 0, 10), r0.xxxx, r3.xxxz + bfi r0.xy, l(4, 4, 0, 0), l(3, 2, 0, 0), r0.yyyy, r0.xwxx + bfi r0.xy, l(1, 1, 0, 0), l(7, 6, 0, 0), r0.zzzz, r0.xyxx + bfi r0.x, l(12), l(0), r3.y, r0.x + and r0.y, r0.y, l(1792) + iadd r0.x, r0.x, r0.y + and r0.y, r5.z, l(2) + iadd r0.y, r5.w, r0.y + bfi r0.y, l(2), l(6), r0.y, l(0) + iadd r0.x, r0.x, r0.y + bfi r1.x, l(6), l(0), r2.w, r0.x +endif +imul null, r0.x, r1.x, l(9) +ushr r0.x, r0.x, l(3) +imad r0.y, r2.z, l(3), r1.w +iadd r0.z, r2.y, r0.y +ld r5.yw, r0.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r1.x, r1.y, l(4) +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.z, l(720) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r0.zzzz, l(9, 729, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +iadd r3.xy, r0.yyyy, l(1, 2, 0, 0) +ld r6.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(721) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.z, r0.w, l(0.250000) + iadd r3.xz, r0.yyyy, l(10, 0, 730, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.z, r0.w +endif +mul r6.xyzw, r0.zzzz, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(1024), r0.z + imad r0.z, r7.w, l(0x00008000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r0.z, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(2048), r0.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r0.z, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(1024), r0.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r0.z, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(256), r7.x + imad r0.z, r7.z, l(0x00010000), r0.z + imad r4.x, r7.w, l(0x01000000), r0.z + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(16), r7.x + imad r0.z, r7.z, l(256), r0.z + imad r0.z, r7.w, l(4096), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.x, r0.z, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r3.xz, r6.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r3.xz, r3.xxzx + imad r4.x, r3.z, l(0x00010000), r3.x + break + default + f32tof16 r0.z, r5.x + f32tof16 r2.w, r6.x + imad r4.x, r2.w, l(0x00010000), r0.z + break +endswitch +ld r5.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(722) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.z, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(11, 731, 0, 0) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r0.z, r0.w +endif +mul r5.xyzw, r0.zzzz, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +iadd r0.y, r1.w, r2.y +iadd r3.xy, r0.yyyy, l(3, 6, 0, 0) +ld r6.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.z, r0.w, l(0.500000) + iadd r2.w, r0.y, l(723) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.z, r0.w, l(0.250000) + iadd r3.xz, r0.yyyy, l(12, 0, 732, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.z, r0.w +endif +mul r6.xyzw, r0.zzzz, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(1024), r0.z + imad r0.z, r7.w, l(0x00008000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r0.z, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(2048), r0.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r0.z, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r0.z, r7.y, l(32), r7.x + imad r0.z, r7.z, l(1024), r0.z + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r0.z, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(256), r7.x + imad r0.z, r7.z, l(0x00010000), r0.z + imad r4.y, r7.w, l(0x01000000), r0.z + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.z, r7.y, l(16), r7.x + imad r0.z, r7.z, l(256), r0.z + imad r0.z, r7.w, l(4096), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r0.z, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r3.xz, r6.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r3.xz, r3.xxzx + imad r4.y, r3.z, l(0x00010000), r3.x + break + default + f32tof16 r0.z, r5.x + f32tof16 r2.w, r6.x + imad r4.y, r2.w, l(0x00010000), r0.z + break +endswitch +ieq r0.z, r3.w, l(1) +if_nz r0.z + ishl r3.xz, r4.xxyx, l(8, 0, 8, 0) + and r3.xz, r3.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r3.xzxx, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx +iadd r5.xyzw, r1.wwww, l(4, 5, 7, 8) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(724) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xz, r1.wwww, l(13, 0, 733, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +ld r7.yw, r5.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(725) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xz, r1.wwww, l(14, 0, 734, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xw, r8.yyyw, l(16, 0, 0, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r9.yywy, l(16, 0, 16, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.zzzx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r3.z, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r2.w, r3.z, l(32), r3.x + imad r2.w, r3.w, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r3.x, r3.z, l(32), r3.x + ishl r3.z, r3.w, l(27) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r3.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r2.w, r3.z, l(32), r3.x + imad r2.w, r3.w, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r3.xzw, r7.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r3.xzw, r3.xxzw + imad r3.x, r3.z, l(32), r3.x + ishl r3.z, r3.w, l(26) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r4.x, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r3.z, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r3.z + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r3.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r3.xz, r3.xxzx + imad r4.x, r3.z, l(0x00010000), r3.x + break + default + f32tof16 r2.w, r6.x + f32tof16 r3.x, r7.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +ld r3.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r5.x, r0.y, l(726) + ld r6.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r5.x, r1.y, l(6) + if_nz r5.x + mul r2.w, r0.w, l(0.250000) + iadd r5.xy, r0.yyyy, l(15, 735, 0, 0) + ld r6.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.w, r0.w +endif +mul r3.xyzw, r2.wwww, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +ld r6.yw, r5.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r2.w, r1.w, l(727) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.y, r0.w, l(0.250000) + iadd r5.xy, r1.wwww, l(16, 736, 0, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r0.y, r0.w +endif +mul r6.xyzw, r0.yyyy, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(32), r7.x + imad r0.y, r7.z, l(1024), r0.y + imad r0.y, r7.w, l(0x00008000), r0.y + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r5.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(32), r5.x + imad r0.y, r5.z, l(2048), r0.y + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r2.w, r5.y, l(32), r5.x + ishl r5.x, r5.z, l(27) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r0.y, r5.y, l(32), r5.x + imad r0.y, r5.z, l(1024), r0.y + mov_sat r6.xyz, r6.xyzx + mad r5.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r2.w, r5.y, l(32), r5.x + ishl r5.x, r5.z, l(26) + imad r2.w, r2.w, l(0x00010000), r5.x + iadd r4.y, r0.y, r2.w + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r6.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(256), r7.x + imad r0.y, r7.z, l(0x00010000), r0.y + imad r4.y, r7.w, l(0x01000000), r0.y + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r0.y, r7.y, l(16), r7.x + imad r0.y, r7.z, l(256), r0.y + imad r0.y, r7.w, l(4096), r0.y + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.y, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.y + iadd r4.y, r0.y, r2.w + break + case l(24) + mov_sat r6.z, r3.x + mov_sat r6.x, r6.x + mad r3.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r4.y, r3.z, l(0x00010000), r3.y + break + default + f32tof16 r0.y, r3.x + f32tof16 r2.w, r6.x + imad r4.y, r2.w, l(0x00010000), r0.y + break +endswitch +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +if_nz r0.z + ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.xyxx, r6.xyxx +endif +store_uav_typed U0[0].xyzw, r3.xxxx, r4.xyxx +ld r5.yw, r5.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r0.y, r0.w, l(0.500000) + iadd r2.w, r1.w, l(728) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r0.y, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(17, 737, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r0.y, r0.w +endif +mul r5.xyzw, r0.yyyy, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +iadd r0.y, r1.w, r2.x +imad r1.w, r2.z, l(3), r0.y +iadd r2.w, r2.y, r1.w +ld r6.yw, r2.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r3.x, r0.w, l(0.500000) + iadd r4.x, r2.w, l(720) + ld r7.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r3.x, r0.w, l(0.250000) + iadd r4.xy, r2.wwww, l(9, 729, 0, 0) + ld r7.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r3.x, r0.w +endif +mul r6.xyzw, r3.xxxx, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.x, r7.y, l(32), r7.x + imad r3.x, r7.z, l(1024), r3.x + ishl r7.x, r7.w, l(31) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.x, r7.y, l(32), r7.x + ishl r7.x, r7.z, l(27) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.x, r7.y, l(32), r7.x + ishl r7.x, r7.z, l(26) + imad r3.x, r3.x, l(0x00010000), r7.x + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r4.x, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.x, r7.y, l(16), r7.x + imad r3.x, r7.z, l(256), r3.x + ishl r5.y, r7.w, l(28) + imad r3.x, r3.x, l(0x00010000), r5.y + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.x, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r6.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r5.xy, r1.wwww, l(1, 2, 0, 0) +ld r6.yw, r5.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(721) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r5.xz, r1.wwww, l(10, 0, 730, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xw, r7.yyyw, l(16, 0, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.wwwx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r5.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +ld r5.yw, r5.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r7.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(722) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r7.xy, r1.wwww, l(11, 731, 0, 0) + ld r8.yw, r7.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r7.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r5.ywxz, r8.ywxz + ld r7.yw, r7.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r9.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.xyzw, r8.zxwy + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.x, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(2048), r1.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.x, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r5.xxxy + mad r7.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.y, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.x, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(24) + mov_sat r5.z, r6.x + mov_sat r5.x, r5.x + mad r5.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.y, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r1.w, r6.x + f32tof16 r2.w, r5.x + imad r4.y, r2.w, l(0x00010000), r1.w + break +endswitch +if_nz r0.z + ishl r5.xy, r4.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r4.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.xy, r5.zwzz, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.yyyy, r4.xyxx +iadd r1.w, r2.y, r0.y +iadd r3.xy, r1.wwww, l(3, 6, 0, 0) +ld r5.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(723) + ld r6.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(12, 732, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r7.yw, r6.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(724) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r4.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r0.yyyy, l(13, 733, 0, 0) + ld r8.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r9.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r4.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r6.x, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r6.x, r8.z, l(27) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r6.x, r8.z, l(26) + imad r3.x, r3.x, l(0x00010000), r6.x + iadd r4.x, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r4.x, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r5.y, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r5.y + iadd r4.x, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r5.yz, r7.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r4.x, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r7.x + imad r4.x, r3.x, l(0x00010000), r2.w + break +endswitch +ld r5.yw, r6.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(725) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r6.xy, r0.yyyy, l(14, 734, 0, 0) + ld r7.yw, r6.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r6.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +ld r7.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(726) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r1.wwww, l(15, 735, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + imad r1.w, r8.w, l(0x00008000), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + ishl r3.x, r8.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(2048), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.x, r8.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.x, r8.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r4.y, r8.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(16), r8.x + imad r1.w, r8.z, l(256), r1.w + imad r1.w, r8.w, l(4096), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + ishl r3.x, r8.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.x + iadd r4.y, r1.w, r2.w + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r3.xy, r3.xyxx + imad r4.y, r3.y, l(0x00010000), r3.x + break + default + f32tof16 r1.w, r5.x + f32tof16 r2.w, r7.x + imad r4.y, r2.w, l(0x00010000), r1.w + break +endswitch +if_nz r0.z + ishl r3.xy, r4.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r3.xyxx, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.zzzz, r4.xyxx +ld r5.yw, r6.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r3.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(727) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r5.xyzw, r1.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +ld r6.yw, r6.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(728) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(17, 737, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r6.xyzw, r1.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + ishl r3.z, r7.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(2048), r1.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.z, r7.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + ishl r3.z, r7.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r3.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + ishl r3.z, r7.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r4.xy, r6.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r3.x, r4.y, l(0x00010000), r4.x + break + default + f32tof16 r1.w, r5.x + f32tof16 r2.w, r6.x + imad r3.x, r2.w, l(0x00010000), r1.w + break +endswitch +iadd r0.y, r2.x, r0.y +imad r1.w, r2.z, l(3), r0.y +iadd r2.w, r2.y, r1.w +ld r5.yw, r2.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r3.z, r0.w, l(0.500000) + iadd r4.x, r2.w, l(720) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r3.z, r0.w, l(0.250000) + iadd r4.xy, r2.wwww, l(9, 729, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r5.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r3.z, r0.w +endif +mul r5.xyzw, r3.zzzz, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +iadd r4.xy, r1.wwww, l(1, 2, 0, 0) +ld r6.yw, r4.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.z, r1.w, l(721) + ld r7.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.z, r1.y, l(6) + if_nz r3.z + mul r2.w, r0.w, l(0.250000) + iadd r7.xy, r1.wwww, l(10, 730, 0, 0) + ld r8.yw, r7.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r7.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r6.ywxz, r8.ywxz + ld r7.yw, r7.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r9.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r9.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.xyzw, r8.zxwy + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.z, r7.y, l(32), r7.x + imad r3.z, r7.z, l(1024), r3.z + ishl r4.x, r7.w, l(31) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.z, r7.y, l(32), r7.x + ishl r4.x, r7.z, l(27) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r6.xyz, r6.xyzx + mad r7.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r3.z, r7.y, l(32), r7.x + ishl r4.x, r7.z, l(26) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r6.xxxy + mad r7.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r3.y, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.z, r7.y, l(16), r7.x + imad r3.z, r7.z, l(256), r3.z + ishl r4.x, r7.w, l(28) + imad r3.z, r3.z, l(0x00010000), r4.x + iadd r3.y, r2.w, r3.z + break + case l(24) + mov_sat r6.z, r5.x + mov_sat r6.x, r6.x + mad r5.yz, r6.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r5.yz, r5.yyzy + imad r3.y, r5.z, l(0x00010000), r5.y + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.z, r6.x + imad r3.y, r3.z, l(0x00010000), r2.w + break +endswitch +if_nz r0.z + ishl r5.xy, r3.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r3.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r5.zwzz, r5.xyxx +endif +store_uav_typed U0[0].xyzw, r3.wwww, r3.xyxx +ld r3.yw, r4.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r5.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r5.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r4.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r4.x, r1.w, l(722) + ld r5.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r4.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r5.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r2.w, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(11, 731, 0, 0) + ld r5.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r3.ywxz, r5.ywxz + ld r6.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r5.zxwy, r6.xyzw + endif +else + mov r2.w, r0.w +endif +mul r3.xyzw, r2.wwww, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +iadd r1.w, r2.y, r0.y +iadd r4.xy, r1.wwww, l(3, 6, 0, 0) +ld r5.yw, r4.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xy, r5.ywyy, l(16, 16, 0, 0) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.yyyx + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r4.x, r1.w, l(723) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r7.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r7.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r6.xyzw + uge r4.x, r1.y, l(6) + if_nz r4.x + mul r2.w, r0.w, l(0.250000) + iadd r6.xy, r1.wwww, l(12, 732, 0, 0) + ld r7.yw, r6.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r6.yw, r6.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r8.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r6.xyzw, r7.zxwy + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + imad r2.w, r7.w, l(0x00008000), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r4.x, r7.y, l(32), r7.x + imad r4.x, r7.z, l(1024), r4.x + ishl r6.z, r7.w, l(31) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(2048), r2.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r4.x, r7.y, l(32), r7.x + ishl r6.z, r7.z, l(27) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r7.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r2.w, r7.y, l(32), r7.x + imad r2.w, r7.z, l(1024), r2.w + mov_sat r5.xyz, r5.xyzx + mad r7.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r7.xyz, r7.xyzx + imad r4.x, r7.y, l(32), r7.x + ishl r6.z, r7.z, l(26) + imad r4.x, r4.x, l(0x00010000), r6.z + iadd r6.x, r2.w, r4.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r5.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(256), r7.x + imad r2.w, r7.z, l(0x00010000), r2.w + imad r6.x, r7.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.w, r7.y, l(16), r7.x + imad r2.w, r7.z, l(256), r2.w + imad r2.w, r7.w, l(4096), r2.w + mov_sat r5.xyzw, r5.xyzw + mad r7.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r3.y, r7.y, l(16), r7.x + imad r3.y, r7.z, l(256), r3.y + ishl r3.z, r7.w, l(28) + imad r3.y, r3.y, l(0x00010000), r3.z + iadd r6.x, r2.w, r3.y + break + case l(24) + mov_sat r5.z, r3.x + mov_sat r5.x, r5.x + mad r3.yz, r5.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r6.x, r3.z, l(0x00010000), r3.y + break + default + f32tof16 r2.w, r3.x + f32tof16 r3.x, r5.x + imad r6.x, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r3.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r5.yw, r3.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r5.xz, r5.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r5.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r5.yyyw, l(0, 0, 16, 16) + f16tof32 r5.xy, r5.wyww + f16tof32 r5.zw, r6.wwwz + break + default + mov r5.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(724) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r6.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r6.zw, r0.yyyy, l(0, 0, 13, 733) + ld r7.yw, r6.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r8.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r8.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r5.ywxz, r7.ywxz + ld r8.yw, r6.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r5.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r5.xyzw, r2.wwww, r5.ywxz +if_nz r1.z + mov r5.xz, r5.zzxz +endif +ld r7.yw, r3.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(725) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(14, 734, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r6.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r6.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.w, r0.w +endif +mul r7.xyzw, r2.wwww, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + imad r2.w, r8.w, l(0x00008000), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(32), r8.x + imad r3.x, r8.z, l(1024), r3.x + ishl r3.y, r8.w, l(31) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(4) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(2048), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r3.y, r8.z, l(27) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(5) + mov_sat r5.xyz, r5.xyzx + mad r8.xyz, r5.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r3.x, r8.y, l(32), r8.x + ishl r3.y, r8.z, l(26) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(10) + mov_sat r5.xy, r5.xyxx + mov_sat r5.zw, r7.xxxy + mad r8.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(256), r8.x + imad r2.w, r8.z, l(0x00010000), r2.w + imad r6.y, r8.w, l(0x01000000), r2.w + break + case l(15) + mov_sat r5.xyzw, r5.xyzw + mad r8.xyzw, r5.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + imad r2.w, r8.w, l(4096), r2.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r3.x, r8.y, l(16), r8.x + imad r3.x, r8.z, l(256), r3.x + ishl r3.y, r8.w, l(28) + imad r3.x, r3.x, l(0x00010000), r3.y + iadd r6.y, r2.w, r3.x + break + case l(24) + mov_sat r7.z, r5.x + mov_sat r7.x, r7.x + mad r3.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r3.xy, r3.xyxx + imad r6.y, r3.y, l(0x00010000), r3.x + break + default + f32tof16 r2.w, r5.x + f32tof16 r3.x, r7.x + imad r6.y, r3.x, l(0x00010000), r2.w + break +endswitch +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +if_nz r0.z + ishl r3.xy, r6.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r3.xyxx, r6.zwzz +endif +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyxx +ld r6.yw, r4.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.w, r0.w, l(0.500000) + iadd r3.x, r1.w, l(726) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r2.w, r0.w, l(0.250000) + iadd r3.xy, r1.wwww, l(15, 735, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +ld r7.yw, r3.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(727) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r8.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r8.yywy, l(16, 0, 16, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.zzzx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r9.ywyy, l(16, 16, 0, 0) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r3.yyyx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r1.w, r0.w +endif +mul r7.xyzw, r1.wwww, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + imad r1.w, r8.w, l(0x00008000), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(32), r8.x + imad r2.w, r8.z, l(1024), r2.w + ishl r3.z, r8.w, l(31) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(2048), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.z, r8.z, l(27) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r8.xyz, r6.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r1.w, r8.y, l(32), r8.x + imad r1.w, r8.z, l(1024), r1.w + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.w, r8.y, l(32), r8.x + ishl r3.z, r8.z, l(26) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(256), r8.x + imad r1.w, r8.z, l(0x00010000), r1.w + imad r3.x, r8.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r1.w, r8.y, l(16), r8.x + imad r1.w, r8.z, l(256), r1.w + imad r1.w, r8.w, l(4096), r1.w + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.w, r8.y, l(16), r8.x + imad r2.w, r8.z, l(256), r2.w + ishl r3.z, r8.w, l(28) + imad r2.w, r2.w, l(0x00010000), r3.z + iadd r3.x, r1.w, r2.w + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r4.xy, r7.zxzz, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r3.x, r4.y, l(0x00010000), r4.x + break + default + f32tof16 r1.w, r6.x + f32tof16 r2.w, r7.x + imad r3.x, r2.w, l(0x00010000), r1.w + break +endswitch +ld r6.yw, r3.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r3.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r2.w, r0.y, l(728) + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r1.w, r0.w, l(0.250000) + iadd r3.zw, r0.yyyy, l(0, 0, 17, 737) + ld r7.yw, r3.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r3.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r1.w, r0.w +endif +mul r6.xyzw, r1.wwww, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +iadd r0.y, r2.x, r0.y +imad r1.w, r2.z, l(3), r0.y +iadd r2.x, r2.y, r1.w +ld r7.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.z, r0.w, l(0.500000) + iadd r2.w, r2.x, l(720) + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r2.z, r0.w, l(0.250000) + iadd r2.xw, r2.xxxx, l(9, 0, 0, 729) + ld r8.yw, r2.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r3.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r9.yyyw, l(16, 0, 0, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwx + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.z, r0.w +endif +mul r7.xyzw, r2.zzzz, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(32), r8.x + imad r2.x, r8.z, l(1024), r2.x + imad r2.x, r8.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(32), r8.x + imad r2.z, r8.z, l(1024), r2.z + ishl r2.w, r8.w, l(31) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(4) + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(27) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(5) + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(26) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(10) + mov_sat r6.xy, r6.xyxx + mov_sat r6.zw, r7.xxxy + mad r8.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(256), r8.x + imad r2.x, r8.z, l(0x00010000), r2.x + imad r3.y, r8.w, l(0x01000000), r2.x + break + case l(15) + mov_sat r6.xyzw, r6.xyzw + mad r8.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(16), r8.x + imad r2.x, r8.z, l(256), r2.x + imad r2.x, r8.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(16), r8.x + imad r2.z, r8.z, l(256), r2.z + ishl r2.w, r8.w, l(28) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r3.y, r2.z, r2.x + break + case l(24) + mov_sat r7.z, r6.x + mov_sat r7.x, r7.x + mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r3.y, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r2.x, r6.x + f32tof16 r2.z, r7.x + imad r3.y, r2.z, l(0x00010000), r2.x + break +endswitch +if_nz r0.z + ishl r2.xz, r3.xxyx, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r2.xzxx, r3.zwzz +endif +store_uav_typed U0[0].xyzw, r5.yyyy, r3.xyxx +iadd r2.xz, r1.wwww, l(1, 0, 2, 0) +ld r3.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xw, r3.yyyw, l(16, 0, 0, 16) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.wwwx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.w, r1.w, l(721) + ld r6.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r4.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r2.w, r1.y, l(6) + if_nz r2.w + mul r2.x, r0.w, l(0.250000) + iadd r4.xy, r1.wwww, l(10, 730, 0, 0) + ld r6.yw, r4.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +ld r6.yw, r2.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r6.yywy, l(16, 0, 16, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.zzzx + break + default + mov r6.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r1.w, l(722) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r7.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r1.wwww, l(0, 0, 11, 731) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r6.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.x, r0.w +endif +mul r6.xyzw, r2.xxxx, r6.ywxz +if_nz r1.z + mov r6.xz, r6.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.x, r7.y, l(32), r7.x + imad r2.x, r7.z, l(1024), r2.x + ishl r2.z, r7.w, l(31) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(32), r2.x + imad r1.w, r2.w, l(2048), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + ishl r2.z, r2.w, l(27) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r1.w, r2.z, l(32), r2.x + imad r1.w, r2.w, l(1024), r1.w + mov_sat r6.xyz, r6.xyzx + mad r2.xzw, r6.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + ishl r2.z, r2.w, l(26) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r6.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r6.xyzw, r6.xyzw + mad r7.xyzw, r6.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.x, r7.y, l(16), r7.x + imad r2.x, r7.z, l(256), r2.x + ishl r2.z, r7.w, l(28) + imad r2.x, r2.x, l(0x00010000), r2.z + iadd r4.x, r1.w, r2.x + break + case l(24) + mov_sat r6.z, r3.x + mov_sat r6.x, r6.x + mad r2.xz, r6.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r4.x, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r1.w, r3.x + f32tof16 r2.x, r6.x + imad r4.x, r2.x, l(0x00010000), r1.w + break +endswitch +iadd r1.w, r2.y, r0.y +iadd r2.xy, r1.wwww, l(3, 6, 0, 0) +ld r3.yw, r2.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r3.yywy, l(16, 0, 16, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.zzzx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r1.w, l(723) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r6.yyyw, l(0, 0, 16, 16) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r2.wwwz + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r1.wwww, l(0, 0, 12, 732) + ld r6.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +iadd r6.xyzw, r0.yyyy, l(4, 5, 7, 8) +ld r7.yw, r6.xxxx, T0[0].zxwy +switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r0.y, l(724) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r8.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r0.yyyy, l(0, 0, 13, 733) + ld r8.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r8.xyzw, r7.ywxz, r8.ywxz + ld r9.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r9.xz, r9.yywy, l(16, 0, 16, 0) + ishr r10.xyzw, r9.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r9.yyyw, l(0, 0, 16, 16) + f16tof32 r9.xy, r9.wyww + f16tof32 r9.zw, r2.wwwz + break + default + mov r9.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r8.zxwy, r9.xyzw + endif +else + mov r2.x, r0.w +endif +mul r7.xyzw, r2.xxxx, r7.ywxz +if_nz r1.z + mov r7.xz, r7.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r8.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(32), r8.x + imad r2.x, r8.z, l(1024), r2.x + imad r2.x, r8.w, l(0x00008000), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(32), r8.x + imad r2.z, r8.z, l(1024), r2.z + ishl r2.w, r8.w, l(31) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 63.000000, 31.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(2048), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(27) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r2.xzw, r3.xxyz, l(31.000000, 0.000000, 31.000000, 63.000000), l(0.500000, 0.000000, 0.500000, 0.500000) + ftou r2.xzw, r2.xxzw + imad r2.x, r2.z, l(32), r2.x + imad r2.x, r2.w, l(1024), r2.x + mov_sat r7.xyz, r7.xyzx + mad r8.xyz, r7.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r8.xyz, r8.xyzx + imad r2.z, r8.y, l(32), r8.x + ishl r2.w, r8.z, l(26) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r7.xxxy + mad r8.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(256), r8.x + imad r2.x, r8.z, l(0x00010000), r2.x + imad r4.y, r8.w, l(0x01000000), r2.x + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r8.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.x, r8.y, l(16), r8.x + imad r2.x, r8.z, l(256), r2.x + imad r2.x, r8.w, l(4096), r2.x + mov_sat r7.xyzw, r7.xyzw + mad r8.xyzw, r7.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r8.xyzw, r8.xyzw + imad r2.z, r8.y, l(16), r8.x + imad r2.z, r8.z, l(256), r2.z + ishl r2.w, r8.w, l(28) + imad r2.z, r2.z, l(0x00010000), r2.w + iadd r4.y, r2.z, r2.x + break + case l(24) + mov_sat r7.z, r3.x + mov_sat r7.x, r7.x + mad r2.xz, r7.zzxz, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r2.xz, r2.xxzx + imad r4.y, r2.z, l(0x00010000), r2.x + break + default + f32tof16 r2.x, r3.x + f32tof16 r2.z, r7.x + imad r4.y, r2.z, l(0x00010000), r2.x + break +endswitch +if_nz r0.z + ishl r2.xz, r4.xxyx, l(8, 0, 8, 0) + and r2.xz, r2.xxzx, l(0xff00ff00, 0, 0xff00ff00, 0) + ushr r3.xy, r4.xyxx, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r2.xzxx, r3.xyxx +endif +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyxx +ld r3.yw, r6.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.xz, r3.yywy, l(16, 0, 16, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r2.zzzx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r2.x, r0.w, l(0.500000) + iadd r2.z, r0.y, l(725) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r7.yyyw, l(0, 0, 16, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r2.wwwz + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r7.xyzw + uge r2.z, r1.y, l(6) + if_nz r2.z + mul r2.x, r0.w, l(0.250000) + iadd r2.zw, r0.yyyy, l(0, 0, 14, 734) + ld r7.yw, r2.zzzz, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r4.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r3.ywxz, r7.ywxz + ld r8.yw, r2.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r2.zw, r8.yyyw, l(0, 0, 16, 16) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r2.wwwz + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r2.x, r0.w +endif +mul r3.xyzw, r2.xxxx, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +ld r2.yw, r2.yyyy, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r4.xy, r2.ywyy, l(16, 16, 0, 0) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r4.yyyx + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r4.x, r0.w, l(0.500000) + iadd r4.y, r1.w, l(726) + ld r7.yw, r4.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r7.ywyy, l(16, 16, 0, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.yyyx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r7.xyzw + uge r4.y, r1.y, l(6) + if_nz r4.y + mul r4.x, r0.w, l(0.250000) + iadd r5.xy, r1.wwww, l(15, 735, 0, 0) + ld r7.yw, r5.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r5.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r2.ywxz, r7.ywxz + ld r8.yw, r5.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r8.xz, r8.yywy, l(16, 0, 16, 0) + ishr r9.xyzw, r8.xyzw, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r8.ywyy, l(16, 16, 0, 0) + f16tof32 r8.xy, r8.wyww + f16tof32 r8.zw, r5.yyyx + break + default + mov r8.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r7.zxwy, r8.xyzw + endif +else + mov r4.x, r0.w +endif +mul r2.xyzw, r2.ywxz, r4.xxxx +if_nz r1.z + mov r2.xz, r2.zzxz +endif +switch r4.z + case l(3) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(32), r7.x + imad r1.w, r7.z, l(1024), r1.w + imad r1.w, r7.w, l(0x00008000), r1.w + mov_sat r2.xyzw, r2.xyzw + mad r7.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r5.x, r7.y, l(32), r7.x + imad r5.x, r7.z, l(1024), r5.x + ishl r5.y, r7.w, l(31) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(4) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r1.w, r5.y, l(32), r5.x + imad r1.w, r5.z, l(2048), r1.w + mov_sat r2.xyz, r2.xyzx + mad r5.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r5.x, r5.y, l(32), r5.x + ishl r5.y, r5.z, l(27) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(5) + mov_sat r3.xyz, r3.xyzx + mad r5.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r1.w, r5.y, l(32), r5.x + imad r1.w, r5.z, l(1024), r1.w + mov_sat r2.xyz, r2.xyzx + mad r5.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r5.xyz, r5.xyzx + imad r5.x, r5.y, l(32), r5.x + ishl r5.y, r5.z, l(26) + imad r5.x, r5.x, l(0x00010000), r5.y + iadd r4.x, r1.w, r5.x + break + case l(10) + mov_sat r3.xy, r3.xyxx + mov_sat r3.zw, r2.xxxy + mad r7.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(256), r7.x + imad r1.w, r7.z, l(0x00010000), r1.w + imad r4.x, r7.w, l(0x01000000), r1.w + break + case l(15) + mov_sat r3.xyzw, r3.xyzw + mad r7.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r1.w, r7.y, l(16), r7.x + imad r1.w, r7.z, l(256), r1.w + imad r1.w, r7.w, l(4096), r1.w + mov_sat r2.xyzw, r2.xyzw + mad r7.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r7.xyzw, r7.xyzw + imad r2.y, r7.y, l(16), r7.x + imad r2.y, r7.z, l(256), r2.y + ishl r2.w, r7.w, l(28) + imad r2.y, r2.y, l(0x00010000), r2.w + iadd r4.x, r1.w, r2.y + break + case l(24) + mov_sat r2.z, r3.x + mov_sat r2.x, r2.x + mad r2.yz, r2.zzxz, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r2.yz, r2.yyzy + imad r4.x, r2.z, l(0x00010000), r2.y + break + default + f32tof16 r1.w, r3.x + f32tof16 r2.x, r2.x + imad r4.x, r2.x, l(0x00010000), r1.w + break +endswitch +ld r2.yw, r6.zzzz, T0[0].zxwy +switch r4.w + case l(5) + ishl r2.xz, r2.yywy, l(16, 0, 16, 0) + ishr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + itof r3.xyzw, r3.xyzw + mul r3.xyzw, r3.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r2.xyzw, r3.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xy, r2.ywyy, l(16, 16, 0, 0) + f16tof32 r2.xy, r2.wyww + f16tof32 r2.zw, r3.yyyx + break + default + mov r2.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.w, r0.w, l(0.500000) + iadd r3.x, r0.y, l(727) + ld r3.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r2.xyzw, r3.xyzw + uge r3.x, r1.y, l(6) + if_nz r3.x + mul r1.w, r0.w, l(0.250000) + iadd r3.xy, r0.yyyy, l(16, 736, 0, 0) + ld r7.yw, r3.xxxx, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r3.xz, r7.yywy, l(16, 0, 16, 0) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r3.zzzx + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r7.xyzw, r2.ywxz, r7.ywxz + ld r3.yw, r3.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break + endswitch + add r2.xyzw, r3.xyzw, r7.zxwy + endif +else + mov r1.w, r0.w +endif +mul r2.xyzw, r1.wwww, r2.ywxz +if_nz r1.z + mov r2.xz, r2.zzxz +endif +ld r3.yw, r6.wwww, T0[0].zxwy +switch r4.w + case l(5) + ishl r3.xz, r3.yywy, l(16, 0, 16, 0) + ishr r6.xyzw, r3.xyzw, l(16, 16, 16, 16) + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r3.xyzw, r6.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r3.ywyy, l(16, 16, 0, 0) + f16tof32 r3.xy, r3.wyww + f16tof32 r3.zw, r5.yyyx + break + default + mov r3.xz, l(0,0,0,0) + break +endswitch +if_nz r1.x + mul r1.x, r0.w, l(0.500000) + iadd r1.w, r0.y, l(728) + ld r6.yw, r1.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r3.xyzw, r6.xyzw + uge r1.y, r1.y, l(6) + if_nz r1.y + mul r0.w, r0.w, l(0.250000) + iadd r1.yw, r0.yyyy, l(0, 17, 0, 737) + ld r6.yw, r1.yyyy, T0[0].zxwy + switch r4.w + case l(5) + ishl r6.xz, r6.yywy, l(16, 0, 16, 0) + ishr r7.xyzw, r6.xyzw, l(16, 16, 16, 16) + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r5.xy, r6.ywyy, l(16, 16, 0, 0) + f16tof32 r6.xy, r6.wyww + f16tof32 r6.zw, r5.yyyx + break + default + mov r6.xz, l(0,0,0,0) + break + endswitch + add r6.xyzw, r3.ywxz, r6.ywxz + ld r7.yw, r1.wwww, T0[0].zxwy + switch r4.w + case l(5) + ishl r7.xz, r7.yywy, l(16, 0, 16, 0) + ishr r8.xyzw, r7.xyzw, l(16, 16, 16, 16) + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.zxwy, l(-1.000000, -1.000000, -1.000000, -1.000000) + break + case l(7) + ushr r1.yw, r7.yyyw, l(0, 16, 0, 16) + f16tof32 r7.xy, r7.wyww + f16tof32 r7.zw, r1.wwwy + break + default + mov r7.xz, l(0,0,0,0) + break + endswitch + add r3.xyzw, r6.zxwy, r7.xyzw + else + mov r0.w, r1.x + endif +endif +mul r3.xyzw, r0.wwww, r3.ywxz +if_nz r1.z + mov r3.xz, r3.zzxz +endif +switch r4.z + case l(3) + mov_sat r2.xyzw, r2.xyzw + mad r1.xyzw, r2.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.y, r1.y, l(32), r1.x + imad r0.y, r1.z, l(1024), r0.y + imad r0.y, r1.w, l(0x00008000), r0.y + mov_sat r3.xyzw, r3.xyzw + mad r1.xyzw, r3.xyzw, l(31.000000, 31.000000, 31.000000, 1.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(32), r1.x + imad r0.w, r1.z, l(1024), r0.w + ishl r1.x, r1.w, l(31) + imad r0.w, r0.w, l(0x00010000), r1.x + iadd r4.y, r0.w, r0.y + break + case l(4) + mov_sat r2.xyz, r2.xyzx + mad r1.xyz, r2.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.y, r1.y, l(32), r1.x + imad r0.y, r1.z, l(2048), r0.y + mov_sat r3.xyz, r3.xyzx + mad r1.xyz, r3.xyzx, l(31.000000, 63.000000, 31.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + ishl r1.x, r1.z, l(27) + imad r0.w, r0.w, l(0x00010000), r1.x + iadd r4.y, r0.w, r0.y + break + case l(5) + mov_sat r2.xyz, r2.xyzx + mad r1.xyz, r2.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.y, r1.y, l(32), r1.x + imad r0.y, r1.z, l(1024), r0.y + mov_sat r3.xyz, r3.xyzx + mad r1.xyz, r3.xyzx, l(31.000000, 31.000000, 63.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r1.xyz, r1.xyzx + imad r0.w, r1.y, l(32), r1.x + ishl r1.x, r1.z, l(26) + imad r0.w, r0.w, l(0x00010000), r1.x + iadd r4.y, r0.w, r0.y + break + case l(10) + mov_sat r2.xy, r2.xyxx + mov_sat r2.zw, r3.xxxy + mad r1.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.y, r1.y, l(256), r1.x + imad r0.y, r1.z, l(0x00010000), r0.y + imad r4.y, r1.w, l(0x01000000), r0.y + break + case l(15) + mov_sat r2.xyzw, r2.xyzw + mad r1.xyzw, r2.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.y, r1.y, l(16), r1.x + imad r0.y, r1.z, l(256), r0.y + imad r0.y, r1.w, l(4096), r0.y + mov_sat r3.xyzw, r3.xyzw + mad r1.xyzw, r3.xyzw, l(15.000000, 15.000000, 15.000000, 15.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r1.xyzw, r1.xyzw + imad r0.w, r1.y, l(16), r1.x + imad r0.w, r1.z, l(256), r0.w + ishl r1.x, r1.w, l(28) + imad r0.w, r0.w, l(0x00010000), r1.x + iadd r4.y, r0.w, r0.y + break + case l(24) + mov_sat r3.z, r2.x + mov_sat r3.x, r3.x + mad r0.yw, r3.zzzx, l(0.000000, 65535.000000, 0.000000, 65535.000000), l(0.000000, 0.500000, 0.000000, 0.500000) + ftou r0.yw, r0.yyyw + imad r4.y, r0.w, l(0x00010000), r0.y + break + default + f32tof16 r0.y, r2.x + f32tof16 r0.w, r3.x + imad r4.y, r0.w, l(0x00010000), r0.y + break +endswitch +if_nz r0.z + ishl r0.yz, r4.xxyx, l(0, 8, 8, 0) + and r0.yz, r0.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r1.xy, r4.xyxx, l(8, 8, 0, 0) + and r1.xy, r1.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r0.yzyy, r1.xyxx +endif +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyxx +ret +// Approximately 4946 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.cso index fc4c31c21492ace1e32a6fc23356374c151f6188..8bbd1fad595f9da1657b51968c0a4efb4c8270c3 100644 GIT binary patch delta 261 zcmbQRis{ZuCPSA9Cuf@&NrB2|F`570WdHsz@PLnzfq~)96b1%XAZ-G~JxmM?bAWga z5Ibx%tY_lvnaIEp2$WCWypxHK*@*iPg8&0a7sCYx1~wK5o5=wr0099&N&tw>85lU5 zK&;7}Z0fRFP+eAFIR*x0psW&*%?wm&HQATVSQIG2YXnvGj7y-w5h%krc_*7Ps}M+Z z@-Ya<-s9y|d1PFjE PZw2CqK)hsf;*@Ft%X=xP diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h index 0f932bda0..717895323 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_full_32bpp_2xres.cs.hlsl const uint8_t resolve_full_32bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x25, 0xF3, 0xD8, 0xB1, 0x8C, 0x00, 0x03, 0x88, - 0x16, 0x13, 0x87, 0x5C, 0x7E, 0x19, 0x7C, 0xAA, 0x01, 0x00, 0x00, 0x00, - 0x10, 0x95, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x3C, 0x5C, 0x19, 0x10, 0x79, 0xE6, 0x5C, 0x69, + 0xFF, 0xEC, 0x6B, 0xFB, 0xFF, 0x10, 0xE0, 0x0E, 0x01, 0x00, 0x00, 0x00, + 0xDC, 0x94, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, - 0x74, 0x94, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x40, 0x94, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -58,8 +58,8 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x2E, 0x31, 0x00, 0xAB, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0xC0, 0x91, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x70, 0x24, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x8C, 0x91, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x63, 0x24, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -124,87 +124,51 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0xE6, 0x0A, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, - 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 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0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, + 0x12, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x2D, 0x00, 0x00, 0x08, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x06, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x86, 0x7D, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4C, 0x00, 0x00, 0x03, + 0x3A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x03, + 0x01, 0x40, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, @@ -213,502 +177,505 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 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-719,91 +686,88 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, 0x36, 0x00, 0x00, 0x05, + 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, + 0x06, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xE2, 0x00, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -813,12 +777,12 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, - 0x52, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, + 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, @@ -826,167 +790,320 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xD6, 0x02, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x04, 0x00, 0x00, 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0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, + 0x0A, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -1039,18 +1156,495 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 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uint8_t resolve_full_32bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, - 0x72, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, - 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, - 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x8A, 0x00, 0x00, 0x0F, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xE8, 0xFF, 0xFF, 0xFF, - 0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x0B, 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, - 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x11, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, - 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, - 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, - 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0xD6, 0x0F, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x06, 0x0C, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x3A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, + 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x06, 0x02, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xAB, 0xAA, 0xAA, 0x3E, + 0x00, 0x00, 0x00, 0x00, 0xAB, 0xAA, 0xAA, 0x3E, 0x00, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x1A, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x0F, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, @@ -1198,18 +1733,18 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, @@ -1217,696 +1752,128 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, - 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, 0xD2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x56, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x56, 0x02, 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0x0A, + 0x32, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0x92, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0xF6, 0x0B, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, @@ -1917,82 +1884,79 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x06, 0x08, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, + 0x06, 0x08, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -2001,13 +1965,13 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -2015,291 +1979,385 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 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0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -2352,151 +2410,60 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x37, 0x00, 0x00, 0x0C, 0xD2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x56, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x56, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0xD6, 0x0F, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x1E, 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0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x0A, 0x92, 0x00, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0xF6, 0x0B, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, @@ -2507,231 +2474,290 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x04, 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0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x05, @@ -2802,383 +2828,353 @@ const uint8_t resolve_full_32bpp_2xres_cs[] = { 0x08, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x36, 0x20, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, - 0x06, 0x00, 0x00, 0x00, 0x06, 0x02, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x36, 0x20, 0x00, 0x05, 0x22, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 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r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r3.y, r1.w, r2.x, r3.y iadd r3.x, r3.y, r3.x -ineg r4.x, r0.w -ineg r4.y, r1.z -imad r1.xy, r4.xyxx, l(80, 16, 0, 0), r1.xyxx -imad r0.w, r1.y, l(80), r1.x -ishl r0.w, r0.w, r1.w +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w imad r0.w, r3.x, l(1280), r0.w ld r1.xyzw, r0.wwww, T0[0].xzyw if_nz r3.z @@ -1279,4 +1276,4 @@ if_nz r0.z endif store_uav_typed U0[0].xyzw, r0.xxxx, r1.zywx ret -// Approximately 1235 instruction slots used +// Approximately 1232 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_cs.cso index 8cc560c8b8f342498dc812db8079e423b6fee0fb..4fe38a35cda858a0eeb4229663c8ae4fab491516 100644 GIT binary patch delta 327 zcmbQUhv~&`CPSA9C+Ae}i4!i?2WNiN=w-~VG)`w^U|@JLmw|y5NSgrh2_^=H8$kR5 zh{m2$Y|``76^QW+QGR1_7{Yh6@Y~Za_9rAp?^G1496i764)xFlS)k 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+++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,10934 @@ +// generated from `xb buildhlsl` +// source: resolve_full_32bpp_from_32bpp_3xres.cs.hlsl +const uint8_t resolve_full_32bpp_from_32bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xAE, 0xF8, 0xF4, 0x3E, 0xF0, 0xD7, 0x88, 0xF7, + 0x5E, 0x93, 0xA6, 0x34, 0x8B, 0xE8, 0x2A, 0x7A, 0x01, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x02, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xB4, 0xFF, 0x01, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 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0x00, 0x07, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xE6, 0x0A, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x26, 0x0A, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, + 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xA6, 0x0A, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x0A, 0x10, 0x00, + 0x08, 0x00, 0x00, 0x00, 0xA4, 0x00, 0x00, 0x08, 0xF2, 0xE0, 0x21, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF6, 0x0F, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x36, 0x0F, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x3E, 0x00, 0x00, 0x01, 0x53, 0x54, 0x41, 0x54, 0x94, 0x00, 0x00, 0x00, + 0x1B, 0x10, 0x00, 0x00, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xCF, 0x01, 0x00, 0x00, 0xFD, 0x02, 0x00, 0x00, + 0x7C, 0x02, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x00, 0x32, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xF6, 0x02, 0x00, 0x00, 0x23, 0x01, 0x00, 0x00, + 0x3A, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt new file mode 100644 index 000000000..aaa9f8170 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_32bpp_3xres_cs.txt @@ -0,0 +1,4170 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 28 +dcl_thread_group 8, 8, 1 +ishl r0.x, vThreadID.x, l(1) +ushr r0.z, CB0[0][0].y, l(7) +bfi r0.z, l(11), l(3), r0.z, l(0) +uge r0.z, r0.x, r0.z +if_nz r0.z + ret +endif +and r1.xyzw, CB0[0][0].xzwz, l(0x40000000, 7, 0x00003fff, 8) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +if_nz r1.w + ubfe r4.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + mov r4.z, r1.z + iadd r1.xw, r4.yyyz, l(31, 0, 0, 31) + ishr r5.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r2.w, r4.x, l(2) + ushr r1.xw, r1.xxxw, l(4, 0, 0, 5) + and r1.x, r1.x, l(2046) + imad r1.x, r2.w, r1.x, r5.x + imad r1.x, r1.x, r1.w, r5.y + ishl r1.w, r3.z, l(10) + and r1.w, r1.w, l(6144) + bfi r1.w, l(3), l(8), r3.w, r1.w + ishr r1.w, r1.w, l(6) + iadd r2.w, r2.w, r5.z + bfi r4.y, l(1), l(1), r2.w, l(0) + iadd r4.y, r4.y, r5.w + bfi r4.y, l(2), l(1), r4.y, l(0) + bfi r2.w, l(1), l(0), r2.w, r4.y + and r4.y, r1.w, l(112) + bfi r4.zw, l(0, 0, 20, 20), l(0, 0, 10, 13), r1.xxxx, l(0, 0, 0, 0) + imad r4.yz, r4.yyyy, l(0, 2, 16, 0), r4.zzwz + bfi r1.xw, l(4, 0, 0, 4), l(0, 0, 0, 3), r1.wwww, r4.yyyz + bfi r1.xw, l(2, 0, 0, 2), l(8, 0, 0, 11), r4.xxxx, r1.xxxw + ubfe r4.x, l(3), l(6), r1.x + and r4.y, r2.w, l(6) + bfi r2.w, l(1), l(8), r2.w, l(0) + imad r2.w, r4.x, l(32), r2.w + imad r2.w, r4.y, l(4), r2.w + bfi r1.xw, l(1, 0, 0, 1), l(4, 0, 0, 7), r3.zzzz, r1.xxxw + bfi r1.w, l(9), l(3), r2.w, r1.w + bfi r1.x, l(6), l(0), r1.x, r1.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r1.z, r1.z, l(31) + ushr r1.z, r1.z, l(5) + imad r1.z, r4.y, r1.z, r4.x + ishl r3.xy, r3.zzzz, l(4, 7, 0, 0) + and r3.xy, r3.xyxx, l(224, 2048, 0, 0) + bfi r1.w, l(3), l(2), r3.w, r3.x + ishl r2.w, r3.x, l(1) + bfi r2.w, l(3), l(3), r3.w, r2.w + and r2.w, r2.w, l(480) + bfi r3.x, l(23), l(9), r1.z, r2.w + bfi r3.x, l(4), l(0), r1.w, r3.x + bfi r3.x, l(1), l(4), r3.z, r3.x + ishl r4.xy, r2.wwww, l(3, 2, 0, 0) + bfi r4.xy, l(23, 23, 0, 0), l(12, 11, 0, 0), r1.zzzz, r4.xyxx + bfi r1.zw, l(0, 0, 4, 4), l(0, 0, 3, 2), r1.wwww, r4.xxxy + bfi r1.zw, l(0, 0, 1, 1), l(0, 0, 7, 6), r3.zzzz, r1.zzzw + bfi r1.z, l(12), l(0), r3.y, r1.z + and r1.w, r1.w, l(1792) + iadd r1.z, r1.z, r1.w + and r1.w, r4.z, l(2) + iadd r1.w, r4.w, r1.w + bfi r1.w, l(2), l(6), r1.w, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.x, l(6), l(0), r3.x, r1.z +endif +imul null, r1.x, r1.x, l(9) +ushr r1.x, r1.x, l(3) +bfi r1.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r1.zwzz +and r1.zw, CB0[0][0].xxxz, l(0, 0, 1023, 0x01000000) +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r2.x, l(3), r2.y +if_nz r2.x + mov r4.y, r2.y +else + ieq r2.x, r2.y, l(5) + if_nz r2.x + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.zw, r2.xxxz, l(0, 0, 1, 1) +ishl r0.xy, r0.xyxx, r2.zwzz +ushr r4.x, r4.y, l(1) +and r2.zw, r4.xxxy, l(0, 0, 1, 1) +iadd r0.xy, r0.xyxx, r2.zwzz +udiv r2.zw, null, r0.xxxy, l(0, 0, 80, 16) +movc r3.z, r3.w, l(1), l(0) +ishl r3.w, r2.z, r3.z +imad r1.z, r2.w, r1.z, r3.w +iadd r1.z, r1.z, r3.y +imad r0.xy, -r2.zwzz, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r3.z +imad r0.x, r1.z, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.y, T0[0].wxyz +imad r2.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 16, 20) +ld_raw r5.x, r2.z, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r3.yz, r9.zzwz + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r7.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r10.xy, r9.xwxx + mov r9.x, r4.x + and r11.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r11.xyzx, r9.xyzx, l(0,0,0,0) + mul r9.xy, r10.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r13.xyz, l(7, 7, 7, 0), r13.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r13.xyz, r13.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r12.xyzx, r11.xyzx, r13.xyzx + ishl r12.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r12.xyzx, r11.xyzx + movc r5.xyz, r10.xyzx, r11.xyzx, l(0,0,0,0) + utof r0.y, r5.w + mul r5.w, r0.y, l(0.333333) + mov r6.w, r3.y + mov r7.w, r3.z + mov r8.w, r9.x + mov r4.w, r9.y + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r3.yz, r5.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r5.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.y, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.y + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.y, l(6), l(16), CB0[0][0].z +ishl r0.y, r0.y, l(23) +iadd r0.y, r0.y, l(0x3f800000) +uge r2.z, r2.y, l(4) +if_nz r2.z + mul r3.y, r0.y, l(0.500000) + imad r3.zw, r0.xxxx, l(0, 0, 36, 36), l(0, 0, 2880, 2896) + ld_raw r9.xyzw, r3.z, T0[0].wxyz + ld_raw r10.x, r3.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + utof r3.zw, r14.zzzw + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r14.z, r10.w + mul r10.w, r14.z, l(0.333333) + mov r11.w, r3.z + mov r12.w, r3.w + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.zw, r10.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r10.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r3.z, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.z + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r3.z, r2.y, l(6) + if_nz r3.z + mul r3.y, r0.y, l(0.250000) + imad r9.xyzw, r0.xxxx, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r12.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.zw, r15.zzzw + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r15.x, r11.w + mul r11.w, r15.x, l(0.333333) + mov r12.w, r3.z + mov r13.w, r3.w + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.zw, r11.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r11.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r3.z, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.z + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r16.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + utof r3.zw, r19.zzzw + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r19.z, r9.w + mul r9.w, r19.z, l(0.333333) + mov r16.w, r3.z + mov r17.w, r3.w + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.zw, r9.yyyx, l(0, 0, 16, 16) + itof r3.zw, r3.zzzw + mul r3.zw, r3.zzzw, l(0.000000, 0.000000, 0.000977, 0.000977) + max r9.xy, r3.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r3.z, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r3.z + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r3.y, r0.y +endif +mul r6.xyzw, r3.yyyy, r6.xyzw +mul r7.xyzw, r3.yyyy, r7.xyzw +mul r8.xyzw, r3.yyyy, r8.xyzw +mul r4.xyzw, r3.yyyy, r4.xyzw +mul r5.xyzw, r3.yyyy, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r4.zzxz + mov r5.xz, r5.zzxz +else + mov r9.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r3.y, r10.y, l(256), r10.x + imad r3.y, r10.z, l(0x00010000), r3.y + imad r10.x, r10.w, l(0x01000000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.y, r11.w, l(0x01000000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.z, r11.w, l(0x01000000), r3.y + mov r9.yw, r4.yyyw + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r10.w, r11.w, l(0x01000000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(256), r11.x + imad r3.y, r11.z, l(0x00010000), r3.y + imad r5.x, r11.w, l(0x01000000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r3.y, r10.y, l(1024), r10.x + imad r3.y, r10.z, l(0x00100000), r3.y + imad r10.x, r10.w, l(0x40000000), r3.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.y, r11.w, l(0x40000000), r3.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.z, r11.w, l(0x40000000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.yw, r4.yyyw + mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r10.w, r11.w, l(0x40000000), r3.y + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r3.y, r11.y, l(1024), r11.x + imad r3.y, r11.z, l(0x00100000), r3.y + imad r5.x, r11.w, l(0x40000000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.x, r3.w, l(0x00400000), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.y, r3.w, l(0x00400000), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.z, r3.w, l(0x00400000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r3.yzw, r4.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r10.w, r3.w, l(0x00400000), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 2047.000000, 2047.000000, 1023.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(2048), r3.y + imad r5.x, r3.w, l(0x00400000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r3.yzw, r6.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.x, r3.w, l(0x00200000), r3.y + mov_sat r7.xyz, r7.xyzx + mad r3.yzw, r7.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.y, r3.w, l(0x00200000), r3.y + mov_sat r8.xyz, r8.xyzx + mad r3.yzw, r8.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.z, r3.w, l(0x00200000), r3.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r3.yzw, r4.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r10.w, r3.w, l(0x00200000), r3.y + mov_sat r5.xyz, r5.xyzx + mad r3.yzw, r5.xxyz, l(0.000000, 1023.000000, 2047.000000, 2047.000000), l(0.000000, 0.500000, 0.500000, 0.500000) + ftou r3.yzw, r3.yyzw + imad r3.y, r3.z, l(1024), r3.y + imad r5.x, r3.w, l(0x00200000), r3.y + mov r9.xyzw, r10.wyxz + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r3.yz, r6.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.z, r3.z, l(0x00010000), r3.y + mov_sat r7.xy, r7.xyxx + mad r3.yz, r7.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.y, r3.z, l(0x00010000), r3.y + mov_sat r8.xy, r8.xyxx + mad r3.yz, r8.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.w, r3.z, l(0x00010000), r3.y + mov_sat r4.x, r9.x + mov_sat r4.y, r4.y + mad r3.yz, r4.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r9.x, r3.z, l(0x00010000), r3.y + mov_sat r5.xy, r5.xyxx + mad r3.yz, r5.xxyx, l(0.000000, 65535.000000, 65535.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) + ftou r3.yz, r3.yyzy + imad r5.x, r3.z, l(0x00010000), r3.y + break + case l(31) + f32tof16 r10.x, r6.x + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r11.x, r6.y + f32tof16 r11.y, r7.y + f32tof16 r11.z, r8.y + f32tof16 r11.w, r4.y + imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz + f32tof16 r3.yz, r5.xxyx + imad r5.x, r3.z, l(0x00010000), r3.y + break + default + mov r9.z, r6.x + mov r9.y, r7.x + mov r9.w, r8.x + break +endswitch +ieq r3.yzw, r1.yyyy, l(0, 1, 2, 3) +or r3.yz, r3.zzwz, r3.yyzy +if_nz r3.y + ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r9.xyzw, r4.wyxz, r6.wyxz + ishl r1.y, r5.x, l(8) + and r1.y, r1.y, l(0xff00ff00) + ushr r3.w, r5.x, l(8) + and r3.w, r3.w, l(0x00ff00ff) + iadd r5.x, r1.y, r3.w +endif +if_nz r3.z + ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) + bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz + ushr r1.y, r5.x, l(16) + bfi r5.x, l(16), l(16), r5.x, r1.y + mov r5.yz, r9.xxwx +else + mov r5.yz, r9.xxwx +endif +if_nz r0.z + mov r9.z, r9.y + mov r5.y, r5.x +endif +if_nz r0.w + mov r9.yz, r5.xxyx +endif +store_uav_typed U0[0].xyzw, r1.xxxx, r9.zyzz +ld_raw r4.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r6.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + utof r9.xy, r9.zwzz + ushr r10.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r11.x, r4.z + mov r11.yz, r10.xxwx + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r7.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mov r10.x, r4.w + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r8.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r9.zw, r10.xxxw + mov r10.x, r4.x + and r11.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r14.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r13.xyzx, r12.xyzx, r10.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r12.xyzx, r10.xyzx + movc r4.xyz, r11.xyzx, r10.xyzx, l(0,0,0,0) + mul r9.xyzw, r9.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r6.w, r9.x + mov r7.w, r9.y + mov r8.w, r9.z + mov r4.w, r9.w + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r1.y, r0.y, l(0.500000) + imad r2.w, r0.x, l(36), l(2900) + ld_raw r9.xyzw, r2.w, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r13.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r13.x, r9.y + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r13.x, r9.z + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r9.wwww, l(0, 8, 16, 24) + mov r13.x, r9.w + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r13.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r13.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r13.x, r9.y + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r10.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r13.x, r9.z + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r9.wwww, l(0, 10, 20, 30) + mov r13.x, r9.w + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r13.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r13.xyzw, r13.xyzw + mul r9.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r13.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r14.x, r9.y + mov r14.yz, r13.xxyx + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r10.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + utof r13.xy, r13.zwzz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r11.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r12.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r13.zw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r13.xyzw, r13.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r10.w, r13.x + mov r11.w, r13.y + mov r12.w, r13.z + mov r9.w, r13.w + break + case l(4) + ishl r13.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r14.xz, r13.xxyx + mov r14.yw, r9.yyyz + ishr r14.xyzw, r14.xyzw, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r13.zzwz + ishr r13.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r13.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r13.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r13.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r13.x + f16tof32 r11.x, r9.z + f16tof32 r11.y, r13.y + f16tof32 r12.x, r9.w + f16tof32 r12.y, r13.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r13.w + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r11.x, r9.z + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.w + mov r12.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r11.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r1.y, r0.y, l(0.250000) + imad r9.xy, r0.xxxx, l(36, 36, 0, 0), l(56, 2936, 0, 0) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r15.x, r10.y + mov r15.yz, r14.xxyx + and r9.xzw, r15.xxyz, l(1023, 0, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r9.xzwx, r15.xyzx, l(0,0,0,0) + utof r9.xz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r15.x, r10.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xz, r9.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r14.x, r10.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r10.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r10.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.w, r9.x + mov r12.w, r9.z + mov r13.w, r14.x + mov r10.w, r14.y + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r6.xyzw, r11.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + ld_raw r9.xyzw, r9.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r17.x, r9.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r17.x, r9.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r9.wwww, l(0, 8, 16, 24) + mov r17.x, r9.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r9.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r17.x, r9.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r17.x, r9.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r9.wwww, l(0, 10, 20, 30) + mov r17.x, r9.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r9.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r18.x, r9.y + mov r18.yz, r17.xxyx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + utof r17.xy, r17.zwzz + ushr r18.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r19.x, r9.z + mov r19.yz, r18.xxwx + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r15.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + mov r18.x, r9.w + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r16.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + ushr r18.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r17.zw, r18.xxxw + mov r18.x, r9.x + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r9.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r17.xyzw, r17.xyzw, l(0.333333, 0.333333, 0.333333, 0.333333) + mov r14.w, r17.x + mov r15.w, r17.y + mov r16.w, r17.z + mov r9.w, r17.w + break + case l(4) + ishl r17.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r9.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r17.zzwz + ishr r17.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r9.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r9.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r9.w + f16tof32 r16.y, r17.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r17.w + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r14.x, r9.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r9.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r9.w + mov r16.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r11.xyzw, r14.xyzw + add r7.xyzw, r12.xyzw, r15.xyzw + add r8.xyzw, r13.xyzw, r16.xyzw + add r4.xyzw, r9.xyzw, r10.xyzw + endif +else + mov r1.y, r0.y +endif +mul r6.xyzw, r1.yyyy, r6.xyzw +mul r7.xyzw, r1.yyyy, r7.xyzw +mul r8.xyzw, r1.yyyy, r8.xyzw +mul r4.xyzw, r1.yyyy, r4.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r9.xz, r4.zzxz +else + mov r9.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r1.y, r10.y, l(256), r10.x + imad r1.y, r10.z, l(0x00010000), r1.y + imad r10.x, r10.w, l(0x01000000), r1.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.y, r11.w, l(0x01000000), r1.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.z, r11.w, l(0x01000000), r1.y + mov r9.yw, r4.yyyw + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(256), r11.x + imad r1.y, r11.z, l(0x00010000), r1.y + imad r10.w, r11.w, l(0x01000000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(7) + case l(54) + mov_sat r6.xyzw, r6.xyzw + mad r10.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r1.y, r10.y, l(1024), r10.x + imad r1.y, r10.z, l(0x00100000), r1.y + imad r10.x, r10.w, l(0x40000000), r1.y + mov_sat r7.xyzw, r7.xyzw + mad r11.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.y, r11.w, l(0x40000000), r1.y + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.z, r11.w, l(0x40000000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.yw, r4.yyyw + mad r11.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r1.y, r11.y, l(1024), r11.x + imad r1.y, r11.z, l(0x00100000), r1.y + imad r10.w, r11.w, l(0x40000000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(16) + case l(55) + mov_sat r6.xyz, r6.xyzx + mad r10.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r10.xyz, r10.xyzx + imad r1.y, r10.y, l(2048), r10.x + imad r10.x, r10.z, l(0x00400000), r1.y + mov_sat r7.xyz, r7.xyzx + mad r11.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.y, r11.z, l(0x00400000), r1.y + mov_sat r8.xyz, r8.xyzx + mad r11.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.z, r11.z, l(0x00400000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r11.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(2048), r11.x + imad r10.w, r11.z, l(0x00400000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(17) + case l(56) + mov_sat r6.xyz, r6.xyzx + mad r10.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r10.xyz, r10.xyzx + imad r1.y, r10.y, l(1024), r10.x + imad r10.x, r10.z, l(0x00200000), r1.y + mov_sat r7.xyz, r7.xyzx + mad r11.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.y, r11.z, l(0x00200000), r1.y + mov_sat r8.xyz, r8.xyzx + mad r11.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.z, r11.z, l(0x00200000), r1.y + mov_sat r4.xz, r9.xxzx + mov_sat r4.y, r4.y + mad r11.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r11.xyz, r11.xyzx + imad r1.y, r11.y, l(1024), r11.x + imad r10.w, r11.z, l(0x00200000), r1.y + mov r9.xyzw, r10.wyxz + break + case l(25) + mov_sat r6.xy, r6.xyxx + mad r4.zw, r6.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.z, r4.w, l(0x00010000), r4.z + mov_sat r7.xy, r7.xyxx + mad r4.zw, r7.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.y, r4.w, l(0x00010000), r4.z + mov_sat r8.xy, r8.xyxx + mad r4.zw, r8.xxxy, l(0.000000, 0.000000, 65535.000000, 65535.000000), l(0.000000, 0.000000, 0.500000, 0.500000) + ftou r4.zw, r4.zzzw + imad r9.w, r4.w, l(0x00010000), r4.z + mov_sat r4.x, r9.x + mov_sat r4.y, r4.y + mad r4.xz, r4.xxyx, l(65535.000000, 0.000000, 65535.000000, 0.000000), l(0.500000, 0.000000, 0.500000, 0.000000) + ftou r4.xz, r4.xxzx + imad r9.x, r4.z, l(0x00010000), r4.x + break + case l(31) + f32tof16 r10.x, r6.x + f32tof16 r10.y, r7.x + f32tof16 r10.z, r8.x + f32tof16 r10.w, r9.x + f32tof16 r11.x, r6.y + f32tof16 r11.y, r7.y + f32tof16 r11.z, r8.y + f32tof16 r11.w, r4.y + imad r9.xyzw, r11.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r10.wyxz + break + default + mov r9.z, r6.x + mov r9.y, r7.x + mov r9.w, r8.x + break +endswitch +if_nz r3.y + ishl r4.xyzw, r9.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r9.zywx, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r9.xyzw, r4.wyxz, r6.wyxz +endif +if_nz r3.z + ushr r4.xyzw, r9.zywx, l(16, 16, 16, 16) + bfi r9.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r9.xyzw, r4.wyxz + mov r5.w, r9.z + mov r9.xzw, r9.xxyw +else + mov r5.w, r9.z + mov r9.xzw, r9.xxyw +endif +if_nz r0.z + mov r9.z, r9.w +endif +if_nz r0.w + mov r5.z, r5.w +endif +iadd r4.xyzw, r1.xxxx, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.zyzz +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xwxx +store_uav_typed U0[0].xyzw, r4.zzzz, r9.zwzz +movc r0.z, r2.x, l(72), l(36) +imad r0.x, r0.x, l(36), r0.z +ld_raw r5.xyzw, r0.x, T0[0].wxyz +iadd r2.xw, r0.xxxx, l(16, 0, 0, 20) +ld_raw r6.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r11.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r5.wwww, l(0, 8, 16, 24) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.yzw, r6.xxxx, l(0, 8, 16, 24) + and r11.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r11.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r11.x, r5.y + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r7.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r11.x, r5.z + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r8.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r5.wwww, l(0, 10, 20, 30) + mov r11.x, r5.w + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r5.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyzw, r6.xyzw, l(1023, 1023, 1023, 3) + utof r11.xyzw, r11.xyzw + mul r6.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r11.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r4.x, r5.y + mov r4.yz, r11.xxyx + and r12.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r15.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r14.xyzx, r13.xyzx, r4.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r13.xyzx, r4.xyzx + movc r7.xyz, r12.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r11.zwzz + ushr r11.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r12.x, r5.z + mov r12.yz, r11.xxwx + and r13.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r14.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r15.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r16.xyz, r14.xyzx + iadd r16.xyz, r16.xyzx, l(-24, -24, -24, 0) + movc r16.xyz, r14.xyzx, r16.xyzx, l(8,8,8,0) + iadd r17.xyz, -r16.xyzx, l(1, 1, 1, 0) + movc r17.xyz, r15.xyzx, r15.xyzx, r17.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r16.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r15.xyzx, r14.xyzx, r12.xyzx + ishl r14.xyz, r17.xyzx, l(23, 23, 23, 0) + iadd r14.xyz, r14.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r14.xyzx, r12.xyzx + movc r8.xyz, r13.xyzx, r12.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r11.x, r5.w + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r10.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + ushr r11.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r9.yw, r11.xxxw + mov r11.x, r5.x + and r12.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r11.xyz, l(7, 7, 7, 0), r15.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r11.xyz, r11.xyzx, l(127, 127, 127, 0) + movc r11.xyz, r14.xyzx, r13.xyzx, r11.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r11.xyz, r11.xyzx, l(16, 16, 16, 0) + iadd r11.xyz, r13.xyzx, r11.xyzx + movc r5.xyz, r12.xyzx, r11.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r6.yzw, r6.xxxx, l(0, 10, 20, 30) + and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r12.xyz, r13.xyzx, r12.xyzx, r14.xyzx + ishl r13.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r12.xyz, r12.xyzx, l(16, 16, 16, 0) + iadd r12.xyz, r13.xyzx, r12.xyzx + movc r6.xyz, r11.xyzx, r12.xyzx, l(0,0,0,0) + utof r0.z, r6.w + mul r6.w, r0.z, l(0.333333) + mov r7.w, r4.x + mov r8.w, r4.y + mov r10.w, r9.y + mov r5.w, r9.w + break + case l(4) + ishl r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r12.xz, r11.xxyx + mov r12.yw, r5.yyyz + ishr r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r12.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r12.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r11.zzwz + ishr r11.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r6.y, r6.x, l(16) + ishr r4.xy, r6.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r6.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + case l(6) + ushr r11.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r11.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r11.y + f16tof32 r10.x, r5.w + f16tof32 r10.y, r11.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r11.w + ushr r0.z, r6.x, l(16) + f16tof32 r6.x, r6.x + f16tof32 r6.y, r0.z + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + mov r6.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r10.x, r5.w + mov r10.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + mov r6.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r0.z, r0.y, l(0.500000) + iadd r4.xy, r0.xxxx, l(2880, 2896, 0, 0) + ld_raw r11.xyzw, r4.x, T0[0].wxyz + ld_raw r12.x, r4.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r16.yzw, r11.yyyy, l(0, 8, 16, 24) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.zzzz, l(0, 8, 16, 24) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r16.yzw, r11.wwww, l(0, 8, 16, 24) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r16.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r16.yzw, r11.yyyy, l(0, 10, 20, 30) + mov r16.x, r11.y + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r13.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.zzzz, l(0, 10, 20, 30) + mov r16.x, r11.z + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r14.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r16.yzw, r11.wwww, l(0, 10, 20, 30) + mov r16.x, r11.w + and r16.xyzw, r16.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r15.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r11.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r16.xyzw, r16.xyzw + mul r12.xyzw, r16.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r16.xyzw, r11.yyyz, l(10, 20, 30, 30) + mov r4.x, r11.y + mov r4.yz, r16.xxyx + and r17.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r20.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r19.xyzx, r18.xyzx, r4.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r18.xyzx, r4.xyzx + movc r13.xyz, r17.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r16.zwzz + ushr r16.xyzw, r11.zwwz, l(10, 10, 20, 20) + mov r17.x, r11.z + mov r17.yz, r16.xxwx + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r14.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r16.x, r11.w + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r15.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + ushr r16.xyzw, r11.wxxx, l(30, 10, 20, 30) + utof r9.yw, r16.xxxw + mov r16.x, r11.x + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r11.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r16.xyz, r12.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r12.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r12.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r19.xyzx, r12.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r18.xyzx, r17.xyzx, r19.xyzx + ishl r18.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r18.xyzx, r17.xyzx + movc r12.xyz, r16.xyzx, r17.xyzx, l(0,0,0,0) + utof r1.y, r12.w + mul r12.w, r1.y, l(0.333333) + mov r13.w, r4.x + mov r14.w, r4.y + mov r15.w, r9.y + mov r11.w, r9.w + break + case l(4) + ishl r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + mov r17.xz, r16.xxyx + mov r17.yw, r11.yyyz + ishr r17.xyzw, r17.xyzw, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.yz, r16.zzwz + ishr r16.xyzw, r11.ywzx, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r11.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r12.y, r12.x, l(16) + ishr r4.xy, r12.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r12.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + case l(6) + ushr r16.xyzw, r11.yzwx, l(16, 16, 16, 16) + f16tof32 r13.x, r11.y + f16tof32 r13.y, r16.x + f16tof32 r14.x, r11.z + f16tof32 r14.y, r16.y + f16tof32 r15.x, r11.w + f16tof32 r15.y, r16.z + f16tof32 r11.x, r11.x + f16tof32 r11.y, r16.w + ushr r1.y, r12.x, l(16) + f16tof32 r12.x, r12.x + f16tof32 r12.y, r1.y + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + break + default + mov r13.x, r11.y + mov r13.yzw, l(0,0,0,0) + mov r14.x, r11.z + mov r14.yzw, l(0,0,0,0) + mov r15.x, r11.w + mov r15.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r13.xyzw + add r8.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r5.xyzw, r11.xyzw + add r6.xyzw, r6.xyzw, r12.xyzw + uge r1.y, r2.y, l(6) + if_nz r1.y + mul r0.z, r0.y, l(0.250000) + iadd r11.xyzw, r0.xxxx, l(36, 52, 2916, 2932) + ld_raw r12.xyzw, r11.x, T0[0].wxyz + ld_raw r13.x, r11.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r12.yyyy, l(0, 8, 16, 24) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.zzzz, l(0, 8, 16, 24) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r12.wwww, l(0, 8, 16, 24) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.yzw, r12.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.yzw, r13.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r12.yyyy, l(0, 10, 20, 30) + mov r17.x, r12.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.zzzz, l(0, 10, 20, 30) + mov r17.x, r12.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r12.wwww, l(0, 10, 20, 30) + mov r17.x, r12.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r12.yzw, r12.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r12.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r12.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r13.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r13.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r12.yyyz, l(10, 20, 30, 30) + mov r4.x, r12.y + mov r4.yz, r17.xxyx + and r18.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r21.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r20.xyzx, r19.xyzx, r4.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r19.xyzx, r4.xyzx + movc r14.xyz, r18.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r17.zwzz + ushr r17.xyzw, r12.zwwz, l(10, 10, 20, 20) + mov r18.x, r12.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r17.x, r12.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r12.wxxx, l(30, 10, 20, 30) + utof r9.yw, r17.xxxw + mov r17.x, r12.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r12.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r13.yzw, r13.xxxx, l(0, 10, 20, 30) + and r17.xyz, r13.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r13.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r13.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r20.xyzx, r13.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r19.xyzx, r18.xyzx, r20.xyzx + ishl r19.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r13.xyz, r17.xyzx, r18.xyzx, l(0,0,0,0) + utof r1.y, r13.w + mul r13.w, r1.y, l(0.333333) + mov r14.w, r4.x + mov r15.w, r4.y + mov r16.w, r9.y + mov r12.w, r9.w + break + case l(4) + ishl r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r12.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.yz, r17.zzwz + ishr r17.xyzw, r12.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r13.y, r13.x, l(16) + ishr r4.xy, r13.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r13.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r12.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r12.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r12.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r12.w + f16tof32 r16.y, r17.z + f16tof32 r12.x, r12.x + f16tof32 r12.y, r17.w + ushr r1.y, r13.x, l(16) + f16tof32 r13.x, r13.x + f16tof32 r13.y, r1.y + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + break + default + mov r14.x, r12.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r12.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r12.w + mov r16.yzw, l(0,0,0,0) + mov r12.yzw, l(0,0,0,0) + mov r13.yzw, l(0,0,0,0) + break + endswitch + add r14.xyzw, r7.xyzw, r14.xyzw + add r15.xyzw, r8.xyzw, r15.xyzw + add r16.xyzw, r10.xyzw, r16.xyzw + add r12.xyzw, r5.xyzw, r12.xyzw + add r13.xyzw, r6.xyzw, r13.xyzw + ld_raw r17.xyzw, r11.z, T0[0].wxyz + ld_raw r11.x, r11.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r21.yzw, r17.yyyy, l(0, 8, 16, 24) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.zzzz, l(0, 8, 16, 24) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r21.yzw, r17.wwww, l(0, 8, 16, 24) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r17.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r21.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r21.yzw, r17.yyyy, l(0, 10, 20, 30) + mov r21.x, r17.y + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r18.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.zzzz, l(0, 10, 20, 30) + mov r21.x, r17.z + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r19.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r21.yzw, r17.wwww, l(0, 10, 20, 30) + mov r21.x, r17.w + and r21.xyzw, r21.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r20.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r17.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r17.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r21.xyzw, r21.xyzw + mul r11.xyzw, r21.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r21.xyzw, r17.yyyz, l(10, 20, 30, 30) + mov r4.x, r17.y + mov r4.yz, r21.xxyx + and r22.xyz, r4.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r4.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r4.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r4.xyz, l(7, 7, 7, 0), r25.xyzx, r4.xyzx, l(0, 0, 0, 0) + and r4.xyz, r4.xyzx, l(127, 127, 127, 0) + movc r4.xyz, r24.xyzx, r23.xyzx, r4.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r4.xyz, r4.xyzx, l(16, 16, 16, 0) + iadd r4.xyz, r23.xyzx, r4.xyzx + movc r18.xyz, r22.xyzx, r4.xyzx, l(0,0,0,0) + utof r4.xy, r21.zwzz + ushr r21.xyzw, r17.zwwz, l(10, 10, 20, 20) + mov r22.x, r17.z + mov r22.yz, r21.xxwx + and r23.xyz, r22.xyzx, l(1023, 1023, 1023, 0) + and r24.xyz, r22.xyzx, l(127, 127, 127, 0) + ubfe r25.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r22.xyzx + firstbit_hi r26.xyz, r24.xyzx + iadd r26.xyz, r26.xyzx, l(-24, -24, -24, 0) + movc r26.xyz, r24.xyzx, r26.xyzx, l(8,8,8,0) + iadd r27.xyz, -r26.xyzx, l(1, 1, 1, 0) + movc r27.xyz, r25.xyzx, r25.xyzx, r27.xyzx + bfi r22.xyz, l(7, 7, 7, 0), r26.xyzx, r22.xyzx, l(0, 0, 0, 0) + and r22.xyz, r22.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r25.xyzx, r24.xyzx, r22.xyzx + ishl r24.xyz, r27.xyzx, l(23, 23, 23, 0) + iadd r24.xyz, r24.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r24.xyzx, r22.xyzx + movc r19.xyz, r23.xyzx, r22.xyzx, l(0,0,0,0) + mul r4.xy, r4.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + mov r21.x, r17.w + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r20.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + ushr r21.xyzw, r17.wxxx, l(30, 10, 20, 30) + utof r9.yw, r21.xxxw + mov r21.x, r17.x + and r22.xyz, r21.xyzx, l(1023, 1023, 1023, 0) + and r23.xyz, r21.xyzx, l(127, 127, 127, 0) + ubfe r24.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r21.xyzx + firstbit_hi r25.xyz, r23.xyzx + iadd r25.xyz, r25.xyzx, l(-24, -24, -24, 0) + movc r25.xyz, r23.xyzx, r25.xyzx, l(8,8,8,0) + iadd r26.xyz, -r25.xyzx, l(1, 1, 1, 0) + movc r26.xyz, r24.xyzx, r24.xyzx, r26.xyzx + bfi r21.xyz, l(7, 7, 7, 0), r25.xyzx, r21.xyzx, l(0, 0, 0, 0) + and r21.xyz, r21.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r24.xyzx, r23.xyzx, r21.xyzx + ishl r23.xyz, r26.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r23.xyzx, r21.xyzx + movc r17.xyz, r22.xyzx, r21.xyzx, l(0,0,0,0) + mul r9.yw, r9.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r21.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r24.xyz, l(7, 7, 7, 0), r24.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r24.xyz, r24.xyzx, l(127, 127, 127, 0) + movc r22.xyz, r23.xyzx, r22.xyzx, r24.xyzx + ishl r23.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r23.xyz, r23.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r22.xyz, r22.xyzx, l(16, 16, 16, 0) + iadd r22.xyz, r23.xyzx, r22.xyzx + movc r11.xyz, r21.xyzx, r22.xyzx, l(0,0,0,0) + utof r1.y, r11.w + mul r11.w, r1.y, l(0.333333) + mov r18.w, r4.x + mov r19.w, r4.y + mov r20.w, r9.y + mov r17.w, r9.w + break + case l(4) + ishl r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + mov r22.xz, r21.xxyx + mov r22.yw, r17.yyyz + ishr r22.xyzw, r22.xyzw, l(16, 16, 16, 16) + itof r22.xyzw, r22.xyzw + mul r22.xyzw, r22.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r22.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r19.xy, r22.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r17.yz, r21.zzwz + ishr r21.xyzw, r17.ywzx, l(16, 16, 16, 16) + itof r21.xyzw, r21.xyzw + mul r21.xyzw, r21.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r20.xy, r21.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r21.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r4.xy, r11.yxyy, l(16, 16, 0, 0) + itof r4.xy, r4.xyxx + mul r4.xy, r4.xyxx, l(0.000977, 0.000977, 0.000000, 0.000000) + max r11.xy, r4.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r21.xyzw, r17.yzwx, l(16, 16, 16, 16) + f16tof32 r18.x, r17.y + f16tof32 r18.y, r21.x + f16tof32 r19.x, r17.z + f16tof32 r19.y, r21.y + f16tof32 r20.x, r17.w + f16tof32 r20.y, r21.z + f16tof32 r17.x, r17.x + f16tof32 r17.y, r21.w + ushr r1.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r1.y + mov r18.zw, l(0,0,0,0) + mov r19.zw, l(0,0,0,0) + mov r20.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r18.x, r17.y + mov r18.yzw, l(0,0,0,0) + mov r19.x, r17.z + mov r19.yzw, l(0,0,0,0) + mov r20.x, r17.w + mov r20.yzw, l(0,0,0,0) + mov r17.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r14.xyzw, r18.xyzw + add r8.xyzw, r15.xyzw, r19.xyzw + add r10.xyzw, r16.xyzw, r20.xyzw + add r5.xyzw, r12.xyzw, r17.xyzw + add r6.xyzw, r11.xyzw, r13.xyzw + endif +else + mov r0.z, r0.y +endif +mul r7.xyzw, r0.zzzz, r7.xyzw +mul r8.xyzw, r0.zzzz, r8.xyzw +mul r10.xyzw, r0.zzzz, r10.xyzw +mul r5.xyzw, r0.zzzz, r5.xyzw +mul r6.xyzw, r0.zzzz, r6.xyzw +if_nz r1.w + mov r7.xz, r7.zzxz + mov r8.xz, r8.zzxz + mov r10.xz, r10.zzxz + mov r11.xz, r5.zzxz + mov r6.xz, r6.zzxz +else + mov r11.xz, r5.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r0.z, r12.y, l(256), r12.x + imad r0.z, r12.z, l(0x00010000), r0.z + imad r12.x, r12.w, l(0x01000000), r0.z + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.y, r13.w, l(0x01000000), r0.z + mov_sat r10.xyzw, r10.xyzw + mad r13.xyzw, r10.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.z, r13.w, l(0x01000000), r0.z + mov r11.yw, r5.yyyw + mov_sat r11.xyzw, r11.xyzw + mad r13.xyzw, r11.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r12.w, r13.w, l(0x01000000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(256), r13.x + imad r0.z, r13.z, l(0x00010000), r0.z + imad r6.x, r13.w, l(0x01000000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(7) + case l(54) + mov_sat r7.xyzw, r7.xyzw + mad r12.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r12.xyzw, r12.xyzw + imad r0.z, r12.y, l(1024), r12.x + imad r0.z, r12.z, l(0x00100000), r0.z + imad r12.x, r12.w, l(0x40000000), r0.z + mov_sat r8.xyzw, r8.xyzw + mad r13.xyzw, r8.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.y, r13.w, l(0x40000000), r0.z + mov_sat r10.xyzw, r10.xyzw + mad r13.xyzw, r10.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.z, r13.w, l(0x40000000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.yw, r5.yyyw + mad r13.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r12.w, r13.w, l(0x40000000), r0.z + mov_sat r6.xyzw, r6.xyzw + mad r13.xyzw, r6.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r13.xyzw, r13.xyzw + imad r0.z, r13.y, l(1024), r13.x + imad r0.z, r13.z, l(0x00100000), r0.z + imad r6.x, r13.w, l(0x40000000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(16) + case l(55) + mov_sat r7.xyz, r7.xyzx + mad r4.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.x, r4.z, l(0x00400000), r0.z + mov_sat r8.xyz, r8.xyzx + mad r4.xyz, r8.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.y, r4.z, l(0x00400000), r0.z + mov_sat r10.xyz, r10.xyzx + mad r4.xyz, r10.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.z, r4.z, l(0x00400000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.y, r5.y + mad r4.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r12.w, r4.z, l(0x00400000), r0.z + mov_sat r6.xyz, r6.xyzx + mad r4.xyz, r6.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(2048), r4.x + imad r6.x, r4.z, l(0x00400000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(17) + case l(56) + mov_sat r7.xyz, r7.xyzx + mad r4.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.x, r4.z, l(0x00200000), r0.z + mov_sat r8.xyz, r8.xyzx + mad r4.xyz, r8.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.y, r4.z, l(0x00200000), r0.z + mov_sat r10.xyz, r10.xyzx + mad r4.xyz, r10.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.z, r4.z, l(0x00200000), r0.z + mov_sat r5.xz, r11.xxzx + mov_sat r5.y, r5.y + mad r4.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r12.w, r4.z, l(0x00200000), r0.z + mov_sat r6.xyz, r6.xyzx + mad r4.xyz, r6.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r4.xyz, r4.xyzx + imad r0.z, r4.y, l(1024), r4.x + imad r6.x, r4.z, l(0x00200000), r0.z + mov r11.xyzw, r12.wyxz + break + case l(25) + mov_sat r7.xy, r7.xyxx + mad r4.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.z, r4.y, l(0x00010000), r4.x + mov_sat r8.xy, r8.xyxx + mad r4.xy, r8.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.y, r4.y, l(0x00010000), r4.x + mov_sat r10.xy, r10.xyxx + mad r4.xy, r10.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.w, r4.y, l(0x00010000), r4.x + mov_sat r5.x, r11.x + mov_sat r5.y, r5.y + mad r4.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r11.x, r4.y, l(0x00010000), r4.x + mov_sat r6.xy, r6.xyxx + mad r4.xy, r6.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r4.xy, r4.xyxx + imad r6.x, r4.y, l(0x00010000), r4.x + break + case l(31) + f32tof16 r12.x, r7.x + f32tof16 r12.y, r8.x + f32tof16 r12.z, r10.x + f32tof16 r12.w, r11.x + f32tof16 r13.x, r7.y + f32tof16 r13.y, r8.y + f32tof16 r13.z, r10.y + f32tof16 r13.w, r5.y + imad r11.xyzw, r13.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r12.wyxz + f32tof16 r0.z, r6.x + f32tof16 r1.y, r6.y + imad r6.x, r1.y, l(0x00010000), r0.z + break + default + mov r11.z, r7.x + mov r11.y, r8.x + mov r11.w, r10.x + break +endswitch +if_nz r3.y + ishl r5.xyzw, r11.zywx, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r11.zywx, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r11.xyzw, r5.wyxz, r7.wyxz + ishl r0.z, r6.x, l(8) + and r0.z, r0.z, l(0xff00ff00) + ushr r1.y, r6.x, l(8) + and r1.y, r1.y, l(0x00ff00ff) + iadd r6.x, r0.z, r1.y +endif +if_nz r3.z + ushr r5.xyzw, r11.zywx, l(16, 16, 16, 16) + bfi r11.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r11.xyzw, r5.wyxz + ushr r0.z, r6.x, l(16) + bfi r6.x, l(16), l(16), r6.x, r0.z + mov r9.z, r11.z + mov r11.zw, r11.yyyw + mov r6.z, r11.x +else + mov r9.z, r11.z + mov r11.zw, r11.yyyw + mov r6.z, r11.x +endif +if_nz r0.w + mov r9.z, r6.z + mov r11.z, r6.x +endif +store_uav_typed U0[0].xyzw, r4.wwww, r9.xzxx +ld_raw r4.xyzw, r2.w, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r5.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r12.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r13.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r14.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r15.xyz, r13.xyzx + iadd r15.xyz, r15.xyzx, l(-24, -24, -24, 0) + movc r15.xyz, r13.xyzx, r15.xyzx, l(8,8,8,0) + iadd r16.xyz, -r15.xyzx, l(1, 1, 1, 0) + movc r16.xyz, r14.xyzx, r14.xyzx, r16.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r15.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r14.xyzx, r13.xyzx, r10.xyzx + ishl r13.xyz, r16.xyzx, l(23, 23, 23, 0) + iadd r13.xyz, r13.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r13.xyzx, r10.xyzx + movc r7.xyz, r12.xyzx, r10.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r4.w + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r8.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r6.yw, r9.xxxw + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r14.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r13.xyzx, r12.xyzx, r9.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r12.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r5.w, r2.x + mov r7.w, r2.w + mov r8.w, r6.y + mov r4.w, r6.w + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r5.x, r4.y + f16tof32 r5.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + mov r5.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + break + default + mov r5.x, r4.y + mov r5.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.z + mul r0.z, r0.y, l(0.500000) + iadd r1.y, r0.x, l(2900) + ld_raw r9.xyzw, r1.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r2.xzw, r15.xxyz, l(1023, 0, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r10.xyz, r2.xzwx, r15.xyzx, l(0,0,0,0) + utof r2.xz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r2.xz, r2.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r6.yw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r10.w, r2.x + mov r12.w, r2.z + mov r13.w, r6.y + mov r9.w, r6.w + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r5.xyzw, r10.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + uge r1.y, r2.y, l(6) + if_nz r1.y + mul r0.y, r0.y, l(0.250000) + iadd r2.xy, r0.xxxx, l(56, 2936, 0, 0) + ld_raw r9.xyzw, r2.x, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r2.xzw, r15.xxyz, l(1023, 0, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r10.xyz, r2.xzwx, r15.xyzx, l(0,0,0,0) + utof r2.xz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r2.xz, r2.xxzx, l(0.333333, 0.000000, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r6.yw, r14.xxxw + mov r14.x, r9.x + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r9.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r10.w, r2.x + mov r12.w, r2.z + mov r13.w, r6.y + mov r9.w, r6.w + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r10.x, r9.y + f16tof32 r10.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + mov r10.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r10.x, r9.y + mov r10.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r10.xyzw, r5.xyzw, r10.xyzw + add r12.xyzw, r7.xyzw, r12.xyzw + add r13.xyzw, r8.xyzw, r13.xyzw + add r9.xyzw, r4.xyzw, r9.xyzw + ld_raw r2.xyzw, r2.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r17.yzw, r2.yyyy, l(0, 8, 16, 24) + mov r17.x, r2.y + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r2.zzzz, l(0, 8, 16, 24) + mov r17.x, r2.z + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r17.yzw, r2.wwww, l(0, 8, 16, 24) + mov r17.x, r2.w + and r17.xyzw, r17.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.yzw, r2.xxxx, l(0, 8, 16, 24) + and r17.xyzw, r2.xyzw, l(255, 255, 255, 255) + utof r17.xyzw, r17.xyzw + mul r2.xyzw, r17.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r17.yzw, r2.yyyy, l(0, 10, 20, 30) + mov r17.x, r2.y + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r14.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r2.zzzz, l(0, 10, 20, 30) + mov r17.x, r2.z + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r15.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r17.yzw, r2.wwww, l(0, 10, 20, 30) + mov r17.x, r2.w + and r17.xyzw, r17.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r16.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r2.yzw, r2.xxxx, l(0, 10, 20, 30) + and r17.xyzw, r2.xyzw, l(1023, 1023, 1023, 3) + utof r17.xyzw, r17.xyzw + mul r2.xyzw, r17.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r17.xyzw, r2.yyyz, l(10, 20, 30, 30) + mov r18.x, r2.y + mov r18.yz, r17.xxyx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r14.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + utof r1.yz, r17.zzwz + ushr r17.xyzw, r2.zwwz, l(10, 10, 20, 20) + mov r18.x, r2.z + mov r18.yz, r17.xxwx + and r19.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r20.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r21.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r22.xyz, r20.xyzx + iadd r22.xyz, r22.xyzx, l(-24, -24, -24, 0) + movc r22.xyz, r20.xyzx, r22.xyzx, l(8,8,8,0) + iadd r23.xyz, -r22.xyzx, l(1, 1, 1, 0) + movc r23.xyz, r21.xyzx, r21.xyzx, r23.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r22.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r21.xyzx, r20.xyzx, r18.xyzx + ishl r20.xyz, r23.xyzx, l(23, 23, 23, 0) + iadd r20.xyz, r20.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r20.xyzx, r18.xyzx + movc r15.xyz, r19.xyzx, r18.xyzx, l(0,0,0,0) + mul r1.yz, r1.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r17.x, r2.w + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r16.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + ushr r17.xyzw, r2.wxxx, l(30, 10, 20, 30) + utof r6.yw, r17.xxxw + mov r17.x, r2.x + and r18.xyz, r17.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r17.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r17.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r17.xyz, l(7, 7, 7, 0), r21.xyzx, r17.xyzx, l(0, 0, 0, 0) + and r17.xyz, r17.xyzx, l(127, 127, 127, 0) + movc r17.xyz, r20.xyzx, r19.xyzx, r17.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r17.xyz, r17.xyzx, l(16, 16, 16, 0) + iadd r17.xyz, r19.xyzx, r17.xyzx + movc r2.xyz, r18.xyzx, r17.xyzx, l(0,0,0,0) + mul r6.yw, r6.yyyw, l(0.000000, 0.333333, 0.000000, 0.333333) + mov r14.w, r1.y + mov r15.w, r1.z + mov r16.w, r6.y + mov r2.w, r6.w + break + case l(4) + ishl r17.xyzw, r2.yzwx, l(16, 16, 16, 16) + mov r18.xz, r17.xxyx + mov r18.yw, r2.yyyz + ishr r18.xyzw, r18.xyzw, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r2.yz, r17.zzwz + ishr r17.xyzw, r2.ywzx, l(16, 16, 16, 16) + itof r17.xyzw, r17.xyzw + mul r17.xyzw, r17.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r17.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r2.xy, r17.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r2.zw, l(0,0,0,0) + break + case l(6) + ushr r17.xyzw, r2.yzwx, l(16, 16, 16, 16) + f16tof32 r14.x, r2.y + f16tof32 r14.y, r17.x + f16tof32 r15.x, r2.z + f16tof32 r15.y, r17.y + f16tof32 r16.x, r2.w + f16tof32 r16.y, r17.z + f16tof32 r2.x, r2.x + f16tof32 r2.y, r17.w + mov r14.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r2.zw, l(0,0,0,0) + break + default + mov r14.x, r2.y + mov r14.yzw, l(0,0,0,0) + mov r15.x, r2.z + mov r15.yzw, l(0,0,0,0) + mov r16.x, r2.w + mov r16.yzw, l(0,0,0,0) + mov r2.yzw, l(0,0,0,0) + break + endswitch + add r5.xyzw, r10.xyzw, r14.xyzw + add r7.xyzw, r12.xyzw, r15.xyzw + add r8.xyzw, r13.xyzw, r16.xyzw + add r4.xyzw, r2.xyzw, r9.xyzw + else + mov r0.y, r0.z + endif +endif +mul r2.xyzw, r0.yyyy, r5.xyzw +mul r5.xyzw, r0.yyyy, r7.xyzw +mul r7.xyzw, r0.yyyy, r8.xyzw +mul r4.xyzw, r0.yyyy, r4.xyzw +if_nz r1.w + mov r2.xz, r2.zzxz + mov r5.xz, r5.zzxz + mov r7.xz, r7.zzxz + mov r8.xz, r4.zzxz +else + mov r8.xz, r4.xxzx +endif +switch r3.x + case l(6) + case l(14) + case l(50) + mov_sat r2.xyzw, r2.xyzw + mad r9.xyzw, r2.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(256), r9.x + imad r0.x, r9.z, l(0x00010000), r0.x + imad r9.x, r9.w, l(0x01000000), r0.x + mov_sat r5.xyzw, r5.xyzw + mad r10.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.y, r10.w, l(0x01000000), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r10.xyzw, r7.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.z, r10.w, l(0x01000000), r0.x + mov r8.yw, r4.yyyw + mov_sat r8.xyzw, r8.xyzw + mad r10.xyzw, r8.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(256), r10.x + imad r0.x, r10.z, l(0x00010000), r0.x + imad r9.w, r10.w, l(0x01000000), r0.x + mov r8.xyzw, r9.wyxz + break + case l(7) + case l(54) + mov_sat r2.xyzw, r2.xyzw + mad r9.xyzw, r2.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r9.xyzw, r9.xyzw + imad r0.x, r9.y, l(1024), r9.x + imad r0.x, r9.z, l(0x00100000), r0.x + imad r9.x, r9.w, l(0x40000000), r0.x + mov_sat r5.xyzw, r5.xyzw + mad r10.xyzw, r5.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.y, r10.w, l(0x40000000), r0.x + mov_sat r7.xyzw, r7.xyzw + mad r10.xyzw, r7.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.z, r10.w, l(0x40000000), r0.x + mov_sat r4.xz, r8.xxzx + mov_sat r4.yw, r4.yyyw + mad r10.xyzw, r4.xyzw, l(1023.000000, 1023.000000, 1023.000000, 3.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r10.xyzw, r10.xyzw + imad r0.x, r10.y, l(1024), r10.x + imad r0.x, r10.z, l(0x00100000), r0.x + imad r9.w, r10.w, l(0x40000000), r0.x + mov r8.xyzw, r9.wyxz + break + case l(16) + case l(55) + mov_sat r2.xyz, r2.xyzx + mad r0.xyz, r2.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.x, r0.z, l(0x00400000), r0.x + mov_sat r5.xyz, r5.xyzx + mad r0.xyz, r5.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.y, r0.z, l(0x00400000), r0.x + mov_sat r7.xyz, r7.xyzx + mad r0.xyz, r7.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.z, r0.z, l(0x00400000), r0.x + mov_sat r4.xz, r8.xxzx + mov_sat r4.y, r4.y + mad r0.xyz, r4.xyzx, l(2047.000000, 2047.000000, 1023.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(2048), r0.x + imad r9.w, r0.z, l(0x00400000), r0.x + mov r8.xyzw, r9.wyxz + break + case l(17) + case l(56) + mov_sat r2.xyz, r2.xyzx + mad r0.xyz, r2.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.x, r0.z, l(0x00200000), r0.x + mov_sat r5.xyz, r5.xyzx + mad r0.xyz, r5.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.y, r0.z, l(0x00200000), r0.x + mov_sat r7.xyz, r7.xyzx + mad r0.xyz, r7.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.z, r0.z, l(0x00200000), r0.x + mov_sat r4.xz, r8.xxzx + mov_sat r4.y, r4.y + mad r0.xyz, r4.xyzx, l(1023.000000, 2047.000000, 2047.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) + ftou r0.xyz, r0.xyzx + imad r0.x, r0.y, l(1024), r0.x + imad r9.w, r0.z, l(0x00200000), r0.x + mov r8.xyzw, r9.wyxz + break + case l(25) + mov_sat r2.xy, r2.xyxx + mad r0.xy, r2.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r8.z, r0.y, l(0x00010000), r0.x + mov_sat r5.xy, r5.xyxx + mad r0.xy, r5.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r8.y, r0.y, l(0x00010000), r0.x + mov_sat r7.xy, r7.xyxx + mad r0.xy, r7.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r8.w, r0.y, l(0x00010000), r0.x + mov_sat r4.x, r8.x + mov_sat r4.y, r4.y + mad r0.xy, r4.xyxx, l(65535.000000, 65535.000000, 0.000000, 0.000000), l(0.500000, 0.500000, 0.000000, 0.000000) + ftou r0.xy, r0.xyxx + imad r8.x, r0.y, l(0x00010000), r0.x + break + case l(31) + f32tof16 r9.x, r2.x + f32tof16 r9.y, r5.x + f32tof16 r9.z, r7.x + f32tof16 r9.w, r8.x + f32tof16 r10.x, r2.y + f32tof16 r10.y, r5.y + f32tof16 r10.z, r7.y + f32tof16 r10.w, r4.y + imad r8.xyzw, r10.wyxz, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r9.wyxz + break + default + mov r8.z, r2.x + mov r8.y, r5.x + mov r8.w, r7.x + break +endswitch +if_nz r3.y + ishl r2.xyzw, r8.zywx, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r8.zywx, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r8.xyzw, r2.wyxz, r4.wyxz +endif +if_nz r3.z + ushr r2.xyzw, r8.zywx, l(16, 16, 16, 16) + bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.wyxz +endif +if_nz r0.w + mov r11.w, r8.z +endif +iadd r0.xyzw, r1.xxxx, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r0.xxxx, r11.zwzz +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +store_uav_typed U0[0].xyzw, r0.zzzz, r8.zyzz +store_uav_typed U0[0].xyzw, r0.wwww, r8.wxww +ret +// Approximately 4123 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_32bpp_from_64bpp_3xres_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..95cb499767f8b6b3e350e834d4dfd408b2ef0497 GIT binary patch literal 62348 zcmeI5Ppl=!b>92d6GzmLG|8tplL$%lJTIAeMu{N}0!=^&Qh7+zGN9PckLEyL38F|r z3~W&tGFDa*@dg0`S;&G2l0}@&fS8T447~6r#w@(a##Um+e-p+Cv@#6i85m^Yg!z8e z^>v@y(|zyl`{sc&o~c21byuA_ea`vLsj9AeJ@G3Eb=>(n&ArsF^A`19kYIeg)#UOdn>bbqR2N5|)MEFOF5c^dtF z)qVWqFZ?~q{)UbpugBk2{-h4lf6^hc<|8`b^MR7Ga!r}jZ|Q>jb#(8!!61h>htofQ z?JL(`d-IK7`jywd^5z@=?E2SUYeLDZuf6$J^X1nLTY~4`_~x5$ef67fz1e*K``?Fu zkweU$F*D`wR_4^9&u`Xy>*M@?tK535qWeqHJuW`$_&qBo*m50R(C)QYuYdKIzw-Jw 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+++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_full_64bpp_2xres.cs.hlsl const uint8_t resolve_full_64bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0xCE, 0xD6, 0x54, 0xAB, 0xA8, 0xDE, 0x3D, 0xE6, - 0x8A, 0xF7, 0x00, 0xDE, 0x52, 0x8A, 0x83, 0xB8, 0x01, 0x00, 0x00, 0x00, - 0xD4, 0x8A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0xED, 0xB0, 0xDE, 0x9E, 0xD6, 0x32, 0x33, 0x33, + 0xBF, 0x5C, 0xBF, 0x79, 0x7C, 0x14, 0xA6, 0xBA, 0x01, 0x00, 0x00, 0x00, + 0xA0, 0x8A, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, - 0x38, 0x8A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x04, 0x8A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -58,8 +58,8 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x2E, 0x31, 0x00, 0xAB, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x84, 0x87, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0xE1, 0x21, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x50, 0x87, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0xD4, 0x21, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -124,87 +124,51 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0xE6, 0x0A, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, - 0x42, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x2A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x29, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, - 0x3A, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x22, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, - 0x12, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x05, 0x22, 0x00, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x23, 0x00, 0x00, 0x0C, 0x32, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x1A, 0x00, 0x10, 0x00, 0x01, 0x00, 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0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, @@ -213,502 +177,505 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x01, 0x00, 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0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, + 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, + 0x32, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0x92, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0xF6, 0x0B, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, @@ -719,91 +686,88 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x01, 0x00, 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0x00, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -813,12 +777,12 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, - 0x52, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, + 0x52, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, @@ -826,167 +790,320 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0xD6, 0x02, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, - 0x52, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x02, 0x10, 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0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, + 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -1039,75 +1156,16 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x0C, - 0x72, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 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0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x0F, 0x10, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x00, + 0x56, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x06, 0x0C, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, + 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, @@ -1160,151 +1218,60 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x0C, 0x72, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, + 0x37, 0x00, 0x00, 0x0C, 0xD2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x56, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x56, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0xD6, 0x0F, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x06, 0x0C, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x3A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 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0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, @@ -1315,94 +1282,91 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, - 0xE2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, + 0x01, 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0x06, 0x00, 0x00, 0x03, + 0x01, 0x40, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x86, 0x0D, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x06, 0x08, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, @@ -1411,317 +1375,224 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x0E, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 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0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x46, 0x02, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, + 0x46, 0x02, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -1738,175 +1609,271 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 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0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0x92, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0xF6, 0x0B, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, @@ -1917,82 +1884,79 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x11, 0x00, 0x00, 0x00, 0x06, 0x01, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xA2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, - 0x06, 0x08, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, + 0x06, 0x08, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -2001,13 +1965,13 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, 0x52, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0xA6, 0x0B, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, @@ -2015,322 +1979,416 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x46, 0x0E, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 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0x00, 0x14, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x11, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x12, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x13, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0x72, 0x00, 0x10, 0x00, @@ -2338,165 +2396,74 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0x72, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, - 0x11, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x12, 0x00, 0x00, 0x00, 0x46, 0x02, 0x10, 0x00, 0x11, 0x00, 0x00, 0x00, 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0x00, + 0x04, 0x00, 0x00, 0x00, 0xF6, 0x0B, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0xC2, 0x00, 0x10, 0x00, @@ -2507,460 +2474,489 @@ const uint8_t resolve_full_64bpp_2xres_cs[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, 0x62, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x01, 0x0A, 0x00, 0x00, 0x01, - 0x36, 0x00, 0x00, 0x05, 0x12, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x08, - 0xE2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 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a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_2xres_cs.txt @@ -67,17 +67,14 @@ ishl r1.xy, r1.xyxx, r1.zwzz ushr r4.x, r4.y, l(1) and r1.zw, r4.xxxy, l(0, 0, 1, 1) iadd r1.xy, r1.zwzz, r1.xyxx -udiv r0.w, null, r1.x, l(80) -ushr r1.z, r1.y, l(4) -movc r1.w, r3.z, l(1), l(0) -ishl r3.y, r0.w, r1.w -imad r2.y, r1.z, r2.y, r3.y +udiv r1.zw, null, r1.xxxy, l(0, 0, 80, 16) +movc r0.w, r3.z, l(1), l(0) +ishl r3.y, r1.z, r0.w +imad r2.y, r1.w, r2.y, r3.y iadd r2.y, r2.y, r3.x -ineg r3.x, r0.w -ineg r3.y, r1.z -imad r1.xy, r3.xyxx, l(80, 16, 0, 0), r1.xyxx -imad r0.w, r1.y, l(80), r1.x -ishl r0.w, r0.w, r1.w +imad r1.xy, -r1.zwzz, l(80, 16, 0, 0), r1.xyxx +imad r1.x, r1.y, l(80), r1.x +ishl r0.w, r1.x, r0.w imad r0.w, r2.y, l(1280), r0.w ld r1.xyzw, r0.wwww, T0[0].xzyw if_nz r3.z @@ -1194,4 +1191,4 @@ if_nz r0.w endif store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw ret -// Approximately 1150 instruction slots used +// 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b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h new file mode 100644 index 000000000..eb48301e4 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.h @@ -0,0 +1,5170 @@ +// generated from `xb buildhlsl` +// source: resolve_full_64bpp_from_32bpp_3xres.cs.hlsl +const uint8_t resolve_full_64bpp_from_32bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xDD, 0x0B, 0x22, 0xBE, 0xB4, 0x0B, 0x0A, 0xEF, + 0x50, 0x1A, 0xBC, 0xC9, 0xCA, 0x61, 0x32, 0xB3, 0x01, 0x00, 0x00, 0x00, + 0x24, 0xF2, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0x88, 0xF1, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 0x6F, 0x6C, 0x76, 0x65, 0x5F, 0x73, + 0x6F, 0x75, 0x72, 0x63, 0x65, 0x00, 0x78, 0x65, 0x5F, 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0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt new file mode 100644 index 000000000..d677bd974 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_32bpp_3xres_cs.txt @@ -0,0 +1,1959 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 26 +dcl_thread_group 8, 8, 1 +and r0.xyzw, CB0[0][0].zxwz, l(7, 0x40000000, 0x00003fff, 8) +ieq r1.xy, vThreadID.xyxx, l(0, 0, 0, 0) +movc r1.xy, r0.yyyy, r1.xyxx, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r3.xyzw, vThreadID.xyyx +if_nz r0.w + ubfe r4.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + mov r4.z, r0.z + iadd r0.yw, r4.yyyz, l(0, 31, 0, 31) + ishr r5.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.z, r4.x, l(2) + ushr r0.yw, r0.yyyw, l(0, 4, 0, 5) + and r0.y, r0.y, l(2046) + imad r0.y, r1.z, r0.y, r5.x + imad r0.y, r0.y, r0.w, r5.y + ishl r0.w, r3.z, l(11) + and r0.w, r0.w, l(0x00003000) + bfi r0.w, l(3), l(9), r3.w, r0.w + ishr r0.w, r0.w, l(6) + iadd r1.z, r1.z, r5.z + bfi r1.w, l(1), l(1), r1.z, l(0) + iadd r1.w, r1.w, r5.w + bfi r1.w, l(2), l(1), r1.w, l(0) + bfi r1.z, l(1), l(0), r1.z, r1.w + and r1.w, r0.w, l(240) + bfi r4.yz, l(0, 19, 19, 0), l(0, 11, 14, 0), r0.yyyy, l(0, 0, 0, 0) + imad r4.yz, r1.wwww, l(0, 2, 16, 0), r4.yyzy + bfi r0.yw, l(0, 4, 0, 4), l(0, 0, 0, 3), r0.wwww, r4.yyyz + bfi r0.yw, l(0, 2, 0, 2), l(0, 9, 0, 12), r4.xxxx, r0.yyyw + ubfe r1.w, l(3), l(6), r0.y + and r2.w, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.z, r1.w, l(32), r1.z + imad r1.z, r2.w, l(4), r1.z + bfi r0.yw, l(0, 1, 0, 1), l(0, 4, 0, 7), r3.zzzz, r0.yyyw + bfi r0.w, l(9), l(3), r1.z, r0.w + bfi r0.y, l(6), l(0), r0.y, r0.w +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r0.z, r0.z, l(31) + ushr r0.z, r0.z, l(5) + imad r0.z, r4.y, r0.z, r4.x + ishl r1.zw, r3.zzzz, l(0, 0, 5, 7) + and r1.zw, r1.zzzw, l(0, 0, 448, 2048) + bfi r0.w, l(3), l(3), r3.w, r1.z + ishl r1.z, r1.z, l(1) + bfi r1.z, l(3), l(4), r3.w, r1.z + and r1.z, r1.z, l(992) + bfi r2.w, l(22), l(10), r0.z, r1.z + bfi r2.w, l(4), l(0), r0.w, r2.w + bfi r2.w, l(1), l(4), r3.z, r2.w + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r3.xy, l(22, 22, 0, 0), l(13, 12, 0, 0), r0.zzzz, r3.xyxx + bfi r0.zw, l(0, 0, 4, 4), l(0, 0, 3, 2), r0.wwww, r3.xxxy + bfi r0.zw, l(0, 0, 1, 1), l(0, 0, 7, 6), r3.zzzz, r0.zzzw + bfi r0.z, l(12), l(0), r1.w, r0.z + and r0.w, r0.w, l(1792) + iadd r0.z, r0.z, r0.w + and r0.w, r4.z, l(2) + iadd r0.w, r4.w, r0.w + bfi r0.w, l(2), l(6), r0.w, l(0) + iadd r0.z, r0.z, r0.w + bfi r0.y, l(6), l(0), r2.w, r0.z +endif +imul null, r0.y, r0.y, l(9) +ushr r0.y, r0.y, l(3) +bfi r0.zw, l(0, 0, 5, 2), l(0, 0, 3, 3), r2.zzzx, l(0, 0, 0, 0) +iadd r0.zw, r0.zzzw, vThreadID.xxxy +and r1.zw, CB0[0][0].xxxz, l(0, 0, 1023, 0x01000000) +ubfe r3.xyzw, l(6, 12, 2, 1), l(7, 13, 10, 29), CB0[0][0].zxxx +uge r2.x, l(3), r2.y +if_nz r2.x + mov r4.y, r2.y +else + ieq r2.x, r2.y, l(5) + if_nz r2.x + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r2.xz, r3.zzzz, l(2, 0, 1, 0) +and r2.xz, r2.xxzx, l(1, 0, 1, 0) +ishl r0.zw, r0.zzzw, r2.xxxz +ushr r4.x, r4.y, l(1) +and r2.xz, r4.xxyx, l(1, 0, 1, 0) +iadd r0.zw, r0.zzzw, r2.xxxz +udiv r2.xz, null, r0.zzwz, l(80, 0, 16, 0) +movc r2.w, r3.w, l(1), l(0) +ishl r3.z, r2.x, r2.w +imad r1.z, r2.z, r1.z, r3.z +iadd r1.z, r1.z, r3.y +imad r0.zw, -r2.xxxz, l(0, 0, 80, 16), r0.zzzw +imad r0.z, r0.w, l(80), r0.z +ishl r0.z, r0.z, r2.w +imad r0.z, r1.z, l(1280), r0.z +imul null, r0.w, r0.z, l(36) +ubfe r1.z, l(4), l(25), CB0[0][0].x +ld_raw r4.xyzw, r0.w, T0[0].wxyz +imad r2.xz, r0.zzzz, l(36, 0, 36, 0), l(16, 0, 20, 0) +ld_raw r5.x, r2.x, T0[0].xxxx +switch r1.z + case l(0) + case l(1) + ushr r9.yzw, r4.yyyy, l(0, 8, 16, 24) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.zzzz, l(0, 8, 16, 24) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r4.wwww, l(0, 8, 16, 24) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r4.yzw, r4.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r4.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r9.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r9.yzw, r4.yyyy, l(0, 10, 20, 30) + mov r9.x, r4.y + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r6.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.zzzz, l(0, 10, 20, 30) + mov r9.x, r4.z + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r4.wwww, l(0, 10, 20, 30) + mov r9.x, r4.w + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r4.yzw, r4.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r4.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r4.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r9.xyzw, r9.xyzw + mul r5.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r9.xyzw, r4.yyyz, l(10, 20, 30, 30) + mov r10.x, r4.y + mov r10.yz, r9.xxyx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r6.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + utof r2.xw, r9.zzzw + ushr r9.xyzw, r4.zwwz, l(10, 10, 20, 20) + mov r10.x, r4.z + mov r10.yz, r9.xxwx + and r3.yzw, r10.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r7.xyz, r3.yzwy, r10.xyzx, l(0,0,0,0) + mul r2.xw, r2.xxxw, l(0.333333, 0.000000, 0.000000, 0.333333) + mov r9.x, r4.w + and r3.yzw, r9.xxyz, l(0, 1023, 1023, 1023) + and r10.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r12.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r11.xyzx, r10.xyzx, r9.xyzx + ishl r10.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r10.xyz, r10.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r10.xyzx, r9.xyzx + movc r8.xyz, r3.yzwy, r9.xyzx, l(0,0,0,0) + ushr r9.xyzw, r4.wxxx, l(30, 10, 20, 30) + utof r3.yz, r9.xxwx + mov r9.x, r4.x + and r10.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r9.xyz, l(7, 7, 7, 0), r13.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r9.xyz, r9.xyzx, l(127, 127, 127, 0) + movc r9.xyz, r12.xyzx, r11.xyzx, r9.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r9.xyz, r9.xyzx, l(16, 16, 16, 0) + iadd r9.xyz, r11.xyzx, r9.xyzx + movc r4.xyz, r10.xyzx, r9.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r9.xyz, r5.xyzx, l(1023, 1023, 1023, 0) + and r10.xyz, r5.xyzx, l(127, 127, 127, 0) + ubfe r11.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r5.xyzx + firstbit_hi r12.xyz, r10.xyzx + iadd r12.xyz, r12.xyzx, l(-24, -24, -24, 0) + movc r12.xyz, r10.xyzx, r12.xyzx, l(8,8,8,0) + iadd r13.xyz, -r12.xyzx, l(1, 1, 1, 0) + movc r13.xyz, r11.xyzx, r11.xyzx, r13.xyzx + bfi r12.xyz, l(7, 7, 7, 0), r12.xyzx, r5.xyzx, l(0, 0, 0, 0) + and r12.xyz, r12.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r11.xyzx, r10.xyzx, r12.xyzx + ishl r11.xyz, r13.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r9.xyzx, r10.xyzx, l(0,0,0,0) + utof r0.w, r5.w + mul r5.w, r0.w, l(0.333333) + mov r6.w, r2.x + mov r7.w, r2.w + mov r8.w, r3.y + mov r4.w, r3.z + break + case l(4) + ishl r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + mov r10.xz, r9.xxyx + mov r10.yw, r4.yyyz + ishr r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r7.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r4.yz, r9.zzwz + ishr r9.xyzw, r4.ywzx, l(16, 16, 16, 16) + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xy, r9.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r4.xy, r9.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r5.y, r5.x, l(16) + ishr r2.xw, r5.yyyx, l(16, 0, 0, 16) + itof r2.xw, r2.xxxw + mul r2.xw, r2.xxxw, l(0.000977, 0.000000, 0.000000, 0.000977) + max r5.xy, r2.xwxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r9.xyzw, r4.yzwx, l(16, 16, 16, 16) + f16tof32 r6.x, r4.y + f16tof32 r6.y, r9.x + f16tof32 r7.x, r4.z + f16tof32 r7.y, r9.y + f16tof32 r8.x, r4.w + f16tof32 r8.y, r9.z + f16tof32 r4.x, r4.x + f16tof32 r4.y, r9.w + ushr r0.w, r5.x, l(16) + f16tof32 r5.x, r5.x + f16tof32 r5.y, r0.w + mov r6.zw, l(0,0,0,0) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r4.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r6.x, r4.y + mov r6.yzw, l(0,0,0,0) + mov r7.x, r4.z + mov r7.yzw, l(0,0,0,0) + mov r8.x, r4.w + mov r8.yzw, l(0,0,0,0) + mov r4.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +ibfe r0.w, l(6), l(16), CB0[0][0].z +ishl r0.w, r0.w, l(23) +iadd r0.w, r0.w, l(0x3f800000) +uge r2.x, r2.y, l(4) +if_nz r2.x + mul r2.w, r0.w, l(0.500000) + imad r3.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 2880, 2896, 0) + ld_raw r9.xyzw, r3.y, T0[0].wxyz + ld_raw r10.x, r3.z, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r9.yyyy, l(0, 8, 16, 24) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.zzzz, l(0, 8, 16, 24) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r9.wwww, l(0, 8, 16, 24) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r9.yyyy, l(0, 10, 20, 30) + mov r14.x, r9.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.zzzz, l(0, 10, 20, 30) + mov r14.x, r9.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r9.wwww, l(0, 10, 20, 30) + mov r14.x, r9.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r9.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r9.yyyz, l(10, 20, 30, 30) + mov r15.x, r9.y + mov r15.yz, r14.xxyx + and r3.yzw, r15.xxyz, l(0, 1023, 1023, 1023) + and r16.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r18.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r17.xyzx, r16.xyzx, r15.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r16.xyzx, r15.xyzx + movc r11.xyz, r3.yzwy, r15.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r9.zwwz, l(10, 10, 20, 20) + mov r15.x, r9.z + mov r15.yz, r14.xxwx + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r12.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r9.w + and r15.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r18.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r17.xyzx, r16.xyzx, r14.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r16.xyzx, r14.xyzx + movc r13.xyz, r15.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r9.wxxx, l(30, 10, 20, 30) + utof r15.xy, r14.xwxx + mov r14.x, r9.x + and r16.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r19.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r18.xyzx, r17.xyzx, r14.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r17.xyzx, r14.xyzx + movc r9.xyz, r16.xyzx, r14.xyzx, l(0,0,0,0) + mul r14.xy, r15.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r10.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r10.w + mul r10.w, r3.w, l(0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r14.x + mov r9.w, r14.y + break + case l(4) + ishl r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r9.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r9.yz, r14.zzwz + ishr r14.xyzw, r9.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r9.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r10.y, r10.x, l(16) + ishr r3.yz, r10.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r10.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r9.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r9.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r9.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r9.w + f16tof32 r13.y, r14.z + f16tof32 r9.x, r9.x + f16tof32 r9.y, r14.w + ushr r3.y, r10.x, l(16) + f16tof32 r10.x, r10.x + f16tof32 r10.y, r3.y + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r9.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r9.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r9.w + mov r13.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r6.xyzw, r11.xyzw + add r7.xyzw, r7.xyzw, r12.xyzw + add r8.xyzw, r8.xyzw, r13.xyzw + add r4.xyzw, r4.xyzw, r9.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r3.y, r2.y, l(6) + if_nz r3.y + mul r2.w, r0.w, l(0.250000) + imad r9.xyzw, r0.zzzz, l(36, 36, 36, 36), l(36, 52, 2916, 2932) + ld_raw r10.xyzw, r9.x, T0[0].wxyz + ld_raw r11.x, r9.y, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r15.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r10.wwww, l(0, 8, 16, 24) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.yzw, r11.xxxx, l(0, 8, 16, 24) + and r15.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r15.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r15.x, r10.y + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r12.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r15.x, r10.z + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r13.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r10.wwww, l(0, 10, 20, 30) + mov r15.x, r10.w + and r15.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r14.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r10.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyzw, r11.xyzw, l(1023, 1023, 1023, 3) + utof r15.xyzw, r15.xyzw + mul r11.xyzw, r15.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r15.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r16.x, r10.y + mov r16.yz, r15.xxyx + and r3.yzw, r16.xxyz, l(0, 1023, 1023, 1023) + and r17.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r19.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r18.xyzx, r17.xyzx, r16.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r12.xyz, r3.yzwy, r16.xyzx, l(0,0,0,0) + utof r3.yz, r15.zzwz + ushr r15.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r16.x, r10.z + mov r16.yz, r15.xxwx + and r17.xyz, r16.xyzx, l(1023, 1023, 1023, 0) + and r18.xyz, r16.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r16.xyzx + firstbit_hi r20.xyz, r18.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r18.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r16.xyz, l(7, 7, 7, 0), r20.xyzx, r16.xyzx, l(0, 0, 0, 0) + and r16.xyz, r16.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r19.xyzx, r18.xyzx, r16.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r18.xyzx, r16.xyzx + movc r13.xyz, r17.xyzx, r16.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.x, r10.w + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r14.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + ushr r15.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r9.xy, r15.xwxx + mov r15.x, r10.x + and r16.xyz, r15.xyzx, l(1023, 1023, 1023, 0) + and r17.xyz, r15.xyzx, l(127, 127, 127, 0) + ubfe r18.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r15.xyzx + firstbit_hi r19.xyz, r17.xyzx + iadd r19.xyz, r19.xyzx, l(-24, -24, -24, 0) + movc r19.xyz, r17.xyzx, r19.xyzx, l(8,8,8,0) + iadd r20.xyz, -r19.xyzx, l(1, 1, 1, 0) + movc r20.xyz, r18.xyzx, r18.xyzx, r20.xyzx + bfi r15.xyz, l(7, 7, 7, 0), r19.xyzx, r15.xyzx, l(0, 0, 0, 0) + and r15.xyz, r15.xyzx, l(127, 127, 127, 0) + movc r15.xyz, r18.xyzx, r17.xyzx, r15.xyzx + ishl r17.xyz, r20.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r15.xyz, r15.xyzx, l(16, 16, 16, 0) + iadd r15.xyz, r17.xyzx, r15.xyzx + movc r10.xyz, r16.xyzx, r15.xyzx, l(0,0,0,0) + mul r9.xy, r9.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r11.yzw, r11.xxxx, l(0, 10, 20, 30) + and r15.xyz, r11.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r11.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r11.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r18.xyzx, r11.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r16.xyz, r17.xyzx, r16.xyzx, r18.xyzx + ishl r17.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r17.xyz, r17.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r16.xyz, r16.xyzx, l(16, 16, 16, 0) + iadd r16.xyz, r17.xyzx, r16.xyzx + movc r11.xyz, r15.xyzx, r16.xyzx, l(0,0,0,0) + utof r3.w, r11.w + mul r11.w, r3.w, l(0.333333) + mov r12.w, r3.y + mov r13.w, r3.z + mov r14.w, r9.x + mov r10.w, r9.y + break + case l(4) + ishl r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r16.xz, r15.xxyx + mov r16.yw, r10.yyyz + ishr r16.xyzw, r16.xyzw, l(16, 16, 16, 16) + itof r16.xyzw, r16.xyzw + mul r16.xyzw, r16.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xy, r16.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r13.xy, r16.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r15.zzwz + ishr r15.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r14.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r11.y, r11.x, l(16) + ishr r3.yz, r11.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r11.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + case l(6) + ushr r15.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r12.x, r10.y + f16tof32 r12.y, r15.x + f16tof32 r13.x, r10.z + f16tof32 r13.y, r15.y + f16tof32 r14.x, r10.w + f16tof32 r14.y, r15.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r15.w + ushr r3.y, r11.x, l(16) + f16tof32 r11.x, r11.x + f16tof32 r11.y, r3.y + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + mov r11.zw, l(0,0,0,0) + break + default + mov r12.x, r10.y + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.z + mov r13.yzw, l(0,0,0,0) + mov r14.x, r10.w + mov r14.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + mov r11.yzw, l(0,0,0,0) + break + endswitch + add r12.xyzw, r6.xyzw, r12.xyzw + add r13.xyzw, r7.xyzw, r13.xyzw + add r14.xyzw, r8.xyzw, r14.xyzw + add r10.xyzw, r4.xyzw, r10.xyzw + add r11.xyzw, r5.xyzw, r11.xyzw + ld_raw r15.xyzw, r9.z, T0[0].wxyz + ld_raw r9.x, r9.w, T0[0].xxxx + switch r1.z + case l(0) + case l(1) + ushr r19.yzw, r15.yyyy, l(0, 8, 16, 24) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.zzzz, l(0, 8, 16, 24) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r19.yzw, r15.wwww, l(0, 8, 16, 24) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r15.yzw, r15.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r15.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.yzw, r9.xxxx, l(0, 8, 16, 24) + and r19.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r19.yzw, r15.yyyy, l(0, 10, 20, 30) + mov r19.x, r15.y + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r16.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.zzzz, l(0, 10, 20, 30) + mov r19.x, r15.z + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r17.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r19.yzw, r15.wwww, l(0, 10, 20, 30) + mov r19.x, r15.w + and r19.xyzw, r19.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r18.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r15.yzw, r15.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r15.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r15.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r19.xyzw, r9.xyzw, l(1023, 1023, 1023, 3) + utof r19.xyzw, r19.xyzw + mul r9.xyzw, r19.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r19.xyzw, r15.yyyz, l(10, 20, 30, 30) + mov r20.x, r15.y + mov r20.yz, r19.xxyx + and r3.yzw, r20.xxyz, l(0, 1023, 1023, 1023) + and r21.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r23.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r22.xyzx, r21.xyzx, r20.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r21.xyzx, r20.xyzx + movc r16.xyz, r3.yzwy, r20.xyzx, l(0,0,0,0) + utof r3.yz, r19.zzwz + ushr r19.xyzw, r15.zwwz, l(10, 10, 20, 20) + mov r20.x, r15.z + mov r20.yz, r19.xxwx + and r21.xyz, r20.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r20.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r20.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r20.xyz, l(7, 7, 7, 0), r24.xyzx, r20.xyzx, l(0, 0, 0, 0) + and r20.xyz, r20.xyzx, l(127, 127, 127, 0) + movc r20.xyz, r23.xyzx, r22.xyzx, r20.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r20.xyz, r20.xyzx, l(16, 16, 16, 0) + iadd r20.xyz, r22.xyzx, r20.xyzx + movc r17.xyz, r21.xyzx, r20.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r19.x, r15.w + and r20.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r23.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r22.xyzx, r21.xyzx, r19.xyzx + ishl r21.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r21.xyz, r21.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r21.xyzx, r19.xyzx + movc r18.xyz, r20.xyzx, r19.xyzx, l(0,0,0,0) + ushr r19.xyzw, r15.wxxx, l(30, 10, 20, 30) + utof r20.xy, r19.xwxx + mov r19.x, r15.x + and r21.xyz, r19.xyzx, l(1023, 1023, 1023, 0) + and r22.xyz, r19.xyzx, l(127, 127, 127, 0) + ubfe r23.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r19.xyzx + firstbit_hi r24.xyz, r22.xyzx + iadd r24.xyz, r24.xyzx, l(-24, -24, -24, 0) + movc r24.xyz, r22.xyzx, r24.xyzx, l(8,8,8,0) + iadd r25.xyz, -r24.xyzx, l(1, 1, 1, 0) + movc r25.xyz, r23.xyzx, r23.xyzx, r25.xyzx + bfi r19.xyz, l(7, 7, 7, 0), r24.xyzx, r19.xyzx, l(0, 0, 0, 0) + and r19.xyz, r19.xyzx, l(127, 127, 127, 0) + movc r19.xyz, r23.xyzx, r22.xyzx, r19.xyzx + ishl r22.xyz, r25.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r19.xyz, r19.xyzx, l(16, 16, 16, 0) + iadd r19.xyz, r22.xyzx, r19.xyzx + movc r15.xyz, r21.xyzx, r19.xyzx, l(0,0,0,0) + mul r19.xy, r20.xyxx, l(0.333333, 0.333333, 0.000000, 0.000000) + ushr r9.yzw, r9.xxxx, l(0, 10, 20, 30) + and r20.xyz, r9.xyzx, l(1023, 1023, 1023, 0) + and r21.xyz, r9.xyzx, l(127, 127, 127, 0) + ubfe r22.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r9.xyzx + firstbit_hi r23.xyz, r21.xyzx + iadd r23.xyz, r23.xyzx, l(-24, -24, -24, 0) + movc r23.xyz, r21.xyzx, r23.xyzx, l(8,8,8,0) + iadd r24.xyz, -r23.xyzx, l(1, 1, 1, 0) + movc r24.xyz, r22.xyzx, r22.xyzx, r24.xyzx + bfi r23.xyz, l(7, 7, 7, 0), r23.xyzx, r9.xyzx, l(0, 0, 0, 0) + and r23.xyz, r23.xyzx, l(127, 127, 127, 0) + movc r21.xyz, r22.xyzx, r21.xyzx, r23.xyzx + ishl r22.xyz, r24.xyzx, l(23, 23, 23, 0) + iadd r22.xyz, r22.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r21.xyz, r21.xyzx, l(16, 16, 16, 0) + iadd r21.xyz, r22.xyzx, r21.xyzx + movc r9.xyz, r20.xyzx, r21.xyzx, l(0,0,0,0) + utof r3.w, r9.w + mul r9.w, r3.w, l(0.333333) + mov r16.w, r3.y + mov r17.w, r3.z + mov r18.w, r19.x + mov r15.w, r19.y + break + case l(4) + ishl r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + mov r20.xz, r19.xxyx + mov r20.yw, r15.yyyz + ishr r20.xyzw, r20.xyzw, l(16, 16, 16, 16) + itof r20.xyzw, r20.xyzw + mul r20.xyzw, r20.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r16.xy, r20.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r17.xy, r20.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.yz, r19.zzwz + ishr r19.xyzw, r15.ywzx, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r18.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r15.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + ishl r9.y, r9.x, l(16) + ishr r3.yz, r9.yyxy, l(0, 16, 16, 0) + itof r3.yz, r3.yyzy + mul r3.yz, r3.yyzy, l(0.000000, 0.000977, 0.000977, 0.000000) + max r9.xy, r3.yzyy, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + case l(6) + ushr r19.xyzw, r15.yzwx, l(16, 16, 16, 16) + f16tof32 r16.x, r15.y + f16tof32 r16.y, r19.x + f16tof32 r17.x, r15.z + f16tof32 r17.y, r19.y + f16tof32 r18.x, r15.w + f16tof32 r18.y, r19.z + f16tof32 r15.x, r15.x + f16tof32 r15.y, r19.w + ushr r3.y, r9.x, l(16) + f16tof32 r9.x, r9.x + f16tof32 r9.y, r3.y + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r18.zw, l(0,0,0,0) + mov r15.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + break + default + mov r16.x, r15.y + mov r16.yzw, l(0,0,0,0) + mov r17.x, r15.z + mov r17.yzw, l(0,0,0,0) + mov r18.x, r15.w + mov r18.yzw, l(0,0,0,0) + mov r15.yzw, l(0,0,0,0) + mov r9.yzw, l(0,0,0,0) + break + endswitch + add r6.xyzw, r12.xyzw, r16.xyzw + add r7.xyzw, r13.xyzw, r17.xyzw + add r8.xyzw, r14.xyzw, r18.xyzw + add r4.xyzw, r10.xyzw, r15.xyzw + add r5.xyzw, r9.xyzw, r11.xyzw + endif +else + mov r2.w, r0.w +endif +mul r6.xyzw, r2.wwww, r6.xyzw +mul r7.xyzw, r2.wwww, r7.xzwy +mul r8.xyzw, r2.wwww, r8.xyzw +mul r4.xyzw, r2.wwww, r4.xzwy +mul r5.xyzw, r2.wwww, r5.xyzw +if_nz r1.w + mov r6.xz, r6.zzxz + mov r9.xz, r7.yyxy + mov r8.xz, r8.zzxz + mov r10.xz, r4.yyxy + mov r5.xz, r5.zzxz +else + mov r9.xz, r7.xxyx + mov r10.xz, r4.xxyx +endif +switch r3.x + case l(26) + mov_sat r6.xyzw, r6.xyzw + mad r11.xyzw, r6.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r7.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + mov r9.yw, r7.wwwz + mov_sat r9.xyzw, r9.xyzw + mad r11.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r7.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz + mov_sat r8.xyzw, r8.xyzw + mad r11.xyzw, r8.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r4.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + mov r10.yw, r4.wwwz + mov_sat r10.xyzw, r10.xyzw + mad r11.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r4.zw, r11.yyyw, l(0, 0, 0x00010000, 0x00010000), r11.xxxz + mov_sat r5.xyzw, r5.xyzw + mad r11.xyzw, r5.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r11.xyzw, r11.xyzw + imad r5.xy, r11.ywyy, l(0x00010000, 0x00010000, 0, 0), r11.xzxx + break + case l(32) + f32tof16 r11.xy, r6.xzxx + f32tof16 r11.zw, r9.xxxz + f32tof16 r12.xy, r6.ywyy + f32tof16 r12.zw, r7.wwwz + imad r7.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw + f32tof16 r11.xy, r8.xzxx + f32tof16 r11.zw, r10.xxxz + f32tof16 r12.xy, r8.ywyy + f32tof16 r12.zw, r4.wwwz + imad r4.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r11.xyzw + f32tof16 r3.yz, r5.xxzx + f32tof16 r5.zw, r5.yyyw + imad r5.xy, r5.zwzz, l(0x00010000, 0x00010000, 0, 0), r3.yzyy + break + default + mov r7.xy, r6.xyxx + mov r7.z, r9.x + mov r4.xy, r8.xyxx + mov r4.z, r10.x + break +endswitch +ieq r2.w, r0.x, l(4) +if_nz r2.w + mov r7.xyzw, r7.yxwz + mov r4.xyzw, r4.yxwz + mov r5.xy, r5.yxyy + mov r3.y, l(2) +else + mov r3.y, r0.x +endif +ieq r3.yzw, r3.yyyy, l(0, 1, 2, 3) +or r3.yz, r3.zzwz, r3.yyzy +if_nz r3.y + ishl r6.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r7.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r7.xyzw, r6.xyzw, r8.xyzw + ishl r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r6.xyzw, r8.xyzw + ishl r3.yw, r5.xxxy, l(0, 8, 0, 8) + and r3.yw, r3.yyyw, l(0, 0xff00ff00, 0, 0xff00ff00) + ushr r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r3.ywyy, r5.zwzz +endif +if_nz r3.z + ushr r6.xyzw, r7.xyzw, l(16, 16, 16, 16) + bfi r7.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r7.xyzw, r6.xyzw + ushr r6.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r6.xyzw + ushr r3.yz, r5.xxyx, l(0, 16, 16, 0) + bfi r5.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r5.xyxx, r3.yzyy +endif +if_nz r1.x + mov r7.xy, r7.zwzz + mov r4.zw, r5.xxxy +endif +if_nz r1.y + mov r7.xy, r4.zwzz + mov r7.zw, r5.xxxy +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyxx +iadd r6.xyzw, r0.yyyy, l(1, 3, 4, 2) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.zwzz +store_uav_typed U0[0].xyzw, r6.yyyy, r4.zwzz +store_uav_typed U0[0].xyzw, r6.zzzz, r5.xyxx +ld_raw r5.xyzw, r2.z, T0[0].wxyz +switch r1.z + case l(0) + case l(1) + ushr r10.yzw, r5.yyyy, l(0, 8, 16, 24) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.zzzz, l(0, 8, 16, 24) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r5.wwww, l(0, 8, 16, 24) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.yzw, r5.xxxx, l(0, 8, 16, 24) + and r10.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r10.yzw, r5.yyyy, l(0, 10, 20, 30) + mov r10.x, r5.y + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.zzzz, l(0, 10, 20, 30) + mov r10.x, r5.z + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r5.wwww, l(0, 10, 20, 30) + mov r10.x, r5.w + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r5.yzw, r5.xxxx, l(0, 10, 20, 30) + and r10.xyzw, r5.xyzw, l(1023, 1023, 1023, 3) + utof r10.xyzw, r10.xyzw + mul r5.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r10.xyzw, r5.yyyz, l(10, 20, 30, 30) + mov r6.x, r5.y + mov r6.yz, r10.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r11.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r13.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r12.xyzx, r11.xyzx, r6.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r11.xyzx, r6.xyzx + movc r7.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r10.zzwz + ushr r10.xyzw, r5.zwwz, l(10, 10, 20, 20) + mov r6.x, r5.z + mov r6.yz, r10.xxwx + and r11.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r12.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r13.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r14.xyz, r12.xyzx + iadd r14.xyz, r14.xyzx, l(-24, -24, -24, 0) + movc r14.xyz, r12.xyzx, r14.xyzx, l(8,8,8,0) + iadd r15.xyz, -r14.xyzx, l(1, 1, 1, 0) + movc r15.xyz, r13.xyzx, r13.xyzx, r15.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r14.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r13.xyzx, r12.xyzx, r6.xyzx + ishl r12.xyz, r15.xyzx, l(23, 23, 23, 0) + iadd r12.xyz, r12.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r12.xyzx, r6.xyzx + movc r8.xyz, r11.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r10.x, r5.w + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r9.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + ushr r10.xyzw, r5.wxxx, l(30, 10, 20, 30) + utof r4.zw, r10.xxxw + mov r10.x, r5.x + and r6.xyz, r10.xyzx, l(1023, 1023, 1023, 0) + and r11.xyz, r10.xyzx, l(127, 127, 127, 0) + ubfe r12.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r10.xyzx + firstbit_hi r13.xyz, r11.xyzx + iadd r13.xyz, r13.xyzx, l(-24, -24, -24, 0) + movc r13.xyz, r11.xyzx, r13.xyzx, l(8,8,8,0) + iadd r14.xyz, -r13.xyzx, l(1, 1, 1, 0) + movc r14.xyz, r12.xyzx, r12.xyzx, r14.xyzx + bfi r10.xyz, l(7, 7, 7, 0), r13.xyzx, r10.xyzx, l(0, 0, 0, 0) + and r10.xyz, r10.xyzx, l(127, 127, 127, 0) + movc r10.xyz, r12.xyzx, r11.xyzx, r10.xyzx + ishl r11.xyz, r14.xyzx, l(23, 23, 23, 0) + iadd r11.xyz, r11.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r10.xyz, r10.xyzx, l(16, 16, 16, 0) + iadd r10.xyz, r11.xyzx, r10.xyzx + movc r5.xyz, r6.xyzx, r10.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r7.w, r3.y + mov r8.w, r3.z + mov r9.w, r4.z + mov r5.w, r4.w + break + case l(4) + ishl r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + mov r11.xz, r10.xxyx + mov r11.yw, r5.yyyz + ishr r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xy, r11.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r8.xy, r11.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r5.yz, r10.zzwz + ishr r10.xyzw, r5.ywzx, l(16, 16, 16, 16) + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xy, r10.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r5.xy, r10.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + case l(6) + ushr r10.xyzw, r5.yzwx, l(16, 16, 16, 16) + f16tof32 r7.x, r5.y + f16tof32 r7.y, r10.x + f16tof32 r8.x, r5.z + f16tof32 r8.y, r10.y + f16tof32 r9.x, r5.w + f16tof32 r9.y, r10.z + f16tof32 r5.x, r5.x + f16tof32 r5.y, r10.w + mov r7.zw, l(0,0,0,0) + mov r8.zw, l(0,0,0,0) + mov r9.zw, l(0,0,0,0) + mov r5.zw, l(0,0,0,0) + break + default + mov r7.x, r5.y + mov r7.yzw, l(0,0,0,0) + mov r8.x, r5.z + mov r8.yzw, l(0,0,0,0) + mov r9.x, r5.w + mov r9.yzw, l(0,0,0,0) + mov r5.yzw, l(0,0,0,0) + break +endswitch +if_nz r2.x + mul r2.x, r0.w, l(0.500000) + imad r2.z, r0.z, l(36), l(2900) + ld_raw r10.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r6.x, r10.y + mov r6.yz, r14.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r15.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r15.xyzx, r6.xyzx + movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r4.zw, r14.xxxw + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r4.z + mov r10.w, r4.w + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r7.xyzw, r11.xyzw + add r8.xyzw, r8.xyzw, r12.xyzw + add r9.xyzw, r9.xyzw, r13.xyzw + add r5.xyzw, r5.xyzw, r10.xyzw + uge r2.y, r2.y, l(6) + if_nz r2.y + mul r0.w, r0.w, l(0.250000) + imad r2.yz, r0.zzzz, l(0, 36, 36, 0), l(0, 56, 2936, 0) + ld_raw r10.xyzw, r2.y, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r14.yzw, r10.yyyy, l(0, 8, 16, 24) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.zzzz, l(0, 8, 16, 24) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r10.wwww, l(0, 8, 16, 24) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.yzw, r10.xxxx, l(0, 8, 16, 24) + and r14.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r14.yzw, r10.yyyy, l(0, 10, 20, 30) + mov r14.x, r10.y + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r11.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.zzzz, l(0, 10, 20, 30) + mov r14.x, r10.z + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r12.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r10.wwww, l(0, 10, 20, 30) + mov r14.x, r10.w + and r14.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r13.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r10.yzw, r10.xxxx, l(0, 10, 20, 30) + and r14.xyzw, r10.xyzw, l(1023, 1023, 1023, 3) + utof r14.xyzw, r14.xyzw + mul r10.xyzw, r14.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r14.xyzw, r10.yyyz, l(10, 20, 30, 30) + mov r6.x, r10.y + mov r6.yz, r14.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r15.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r17.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r16.xyzx, r15.xyzx, r6.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r15.xyzx, r6.xyzx + movc r11.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r3.yz, r14.zzwz + ushr r14.xyzw, r10.zwwz, l(10, 10, 20, 20) + mov r6.x, r10.z + mov r6.yz, r14.xxwx + and r15.xyz, r6.xyzx, l(1023, 1023, 1023, 0) + and r16.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r17.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r18.xyz, r16.xyzx + iadd r18.xyz, r18.xyzx, l(-24, -24, -24, 0) + movc r18.xyz, r16.xyzx, r18.xyzx, l(8,8,8,0) + iadd r19.xyz, -r18.xyzx, l(1, 1, 1, 0) + movc r19.xyz, r17.xyzx, r17.xyzx, r19.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r18.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r17.xyzx, r16.xyzx, r6.xyzx + ishl r16.xyz, r19.xyzx, l(23, 23, 23, 0) + iadd r16.xyz, r16.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r16.xyzx, r6.xyzx + movc r12.xyz, r15.xyzx, r6.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r14.x, r10.w + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r13.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + ushr r14.xyzw, r10.wxxx, l(30, 10, 20, 30) + utof r4.zw, r14.xxxw + mov r14.x, r10.x + and r6.xyz, r14.xyzx, l(1023, 1023, 1023, 0) + and r15.xyz, r14.xyzx, l(127, 127, 127, 0) + ubfe r16.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r14.xyzx + firstbit_hi r17.xyz, r15.xyzx + iadd r17.xyz, r17.xyzx, l(-24, -24, -24, 0) + movc r17.xyz, r15.xyzx, r17.xyzx, l(8,8,8,0) + iadd r18.xyz, -r17.xyzx, l(1, 1, 1, 0) + movc r18.xyz, r16.xyzx, r16.xyzx, r18.xyzx + bfi r14.xyz, l(7, 7, 7, 0), r17.xyzx, r14.xyzx, l(0, 0, 0, 0) + and r14.xyz, r14.xyzx, l(127, 127, 127, 0) + movc r14.xyz, r16.xyzx, r15.xyzx, r14.xyzx + ishl r15.xyz, r18.xyzx, l(23, 23, 23, 0) + iadd r15.xyz, r15.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r14.xyz, r14.xyzx, l(16, 16, 16, 0) + iadd r14.xyz, r15.xyzx, r14.xyzx + movc r10.xyz, r6.xyzx, r14.xyzx, l(0,0,0,0) + mul r4.zw, r4.zzzw, l(0.000000, 0.000000, 0.333333, 0.333333) + mov r11.w, r3.y + mov r12.w, r3.z + mov r13.w, r4.z + mov r10.w, r4.w + break + case l(4) + ishl r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + mov r15.xz, r14.xxyx + mov r15.yw, r10.yyyz + ishr r15.xyzw, r15.xyzw, l(16, 16, 16, 16) + itof r15.xyzw, r15.xyzw + mul r15.xyzw, r15.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xy, r15.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r12.xy, r15.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r10.yz, r14.zzwz + ishr r14.xyzw, r10.ywzx, l(16, 16, 16, 16) + itof r14.xyzw, r14.xyzw + mul r14.xyzw, r14.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r13.xy, r14.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r10.xy, r14.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + case l(6) + ushr r14.xyzw, r10.yzwx, l(16, 16, 16, 16) + f16tof32 r11.x, r10.y + f16tof32 r11.y, r14.x + f16tof32 r12.x, r10.z + f16tof32 r12.y, r14.y + f16tof32 r13.x, r10.w + f16tof32 r13.y, r14.z + f16tof32 r10.x, r10.x + f16tof32 r10.y, r14.w + mov r11.zw, l(0,0,0,0) + mov r12.zw, l(0,0,0,0) + mov r13.zw, l(0,0,0,0) + mov r10.zw, l(0,0,0,0) + break + default + mov r11.x, r10.y + mov r11.yzw, l(0,0,0,0) + mov r12.x, r10.z + mov r12.yzw, l(0,0,0,0) + mov r13.x, r10.w + mov r13.yzw, l(0,0,0,0) + mov r10.yzw, l(0,0,0,0) + break + endswitch + add r11.xyzw, r7.xyzw, r11.xyzw + add r12.xyzw, r8.xyzw, r12.xyzw + add r13.xyzw, r9.xyzw, r13.xyzw + add r10.xyzw, r5.xyzw, r10.xyzw + ld_raw r14.xyzw, r2.z, T0[0].wxyz + switch r1.z + case l(0) + case l(1) + ushr r18.yzw, r14.yyyy, l(0, 8, 16, 24) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.zzzz, l(0, 8, 16, 24) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r18.yzw, r14.wwww, l(0, 8, 16, 24) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r14.yzw, r14.xxxx, l(0, 8, 16, 24) + and r18.xyzw, r14.xyzw, l(255, 255, 255, 255) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + break + case l(2) + case l(10) + ushr r18.yzw, r14.yyyy, l(0, 10, 20, 30) + mov r18.x, r14.y + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r15.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.zzzz, l(0, 10, 20, 30) + mov r18.x, r14.z + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r16.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r18.yzw, r14.wwww, l(0, 10, 20, 30) + mov r18.x, r14.w + and r18.xyzw, r18.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r17.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + ushr r14.yzw, r14.xxxx, l(0, 10, 20, 30) + and r18.xyzw, r14.xyzw, l(1023, 1023, 1023, 3) + utof r18.xyzw, r18.xyzw + mul r14.xyzw, r18.xyzw, l(0.000978, 0.000978, 0.000978, 0.333333) + break + case l(3) + case l(12) + ushr r18.xyzw, r14.yyyz, l(10, 20, 30, 30) + mov r6.x, r14.y + mov r6.yz, r18.xxyx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r15.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + utof r2.yz, r18.zzwz + ushr r18.xyzw, r14.zwwz, l(10, 10, 20, 20) + mov r6.x, r14.z + mov r6.yz, r18.xxwx + and r3.yzw, r6.xxyz, l(0, 1023, 1023, 1023) + and r19.xyz, r6.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r6.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r6.xyz, l(7, 7, 7, 0), r21.xyzx, r6.xyzx, l(0, 0, 0, 0) + and r6.xyz, r6.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r20.xyzx, r19.xyzx, r6.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r19.xyzx, r6.xyzx + movc r16.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + mul r2.yz, r2.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r18.x, r14.w + and r3.yzw, r18.xxyz, l(0, 1023, 1023, 1023) + and r6.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r19.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r20.xyz, r6.xyzx + iadd r20.xyz, r20.xyzx, l(-24, -24, -24, 0) + movc r20.xyz, r6.xyzx, r20.xyzx, l(8,8,8,0) + iadd r21.xyz, -r20.xyzx, l(1, 1, 1, 0) + movc r21.xyz, r19.xyzx, r19.xyzx, r21.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r20.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r6.xyz, r19.xyzx, r6.xyzx, r18.xyzx + ishl r18.xyz, r21.xyzx, l(23, 23, 23, 0) + iadd r18.xyz, r18.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r6.xyz, r6.xyzx, l(16, 16, 16, 0) + iadd r6.xyz, r18.xyzx, r6.xyzx + movc r17.xyz, r3.yzwy, r6.xyzx, l(0,0,0,0) + ushr r18.xyzw, r14.wxxx, l(30, 10, 20, 30) + utof r3.yz, r18.xxwx + mov r18.x, r14.x + and r6.xyz, r18.xyzx, l(1023, 1023, 1023, 0) + and r19.xyz, r18.xyzx, l(127, 127, 127, 0) + ubfe r20.xyz, l(3, 3, 3, 0), l(7, 7, 7, 0), r18.xyzx + firstbit_hi r21.xyz, r19.xyzx + iadd r21.xyz, r21.xyzx, l(-24, -24, -24, 0) + movc r21.xyz, r19.xyzx, r21.xyzx, l(8,8,8,0) + iadd r22.xyz, -r21.xyzx, l(1, 1, 1, 0) + movc r22.xyz, r20.xyzx, r20.xyzx, r22.xyzx + bfi r18.xyz, l(7, 7, 7, 0), r21.xyzx, r18.xyzx, l(0, 0, 0, 0) + and r18.xyz, r18.xyzx, l(127, 127, 127, 0) + movc r18.xyz, r20.xyzx, r19.xyzx, r18.xyzx + ishl r19.xyz, r22.xyzx, l(23, 23, 23, 0) + iadd r19.xyz, r19.xyzx, l(0x3e000000, 0x3e000000, 0x3e000000, 0) + ishl r18.xyz, r18.xyzx, l(16, 16, 16, 0) + iadd r18.xyz, r19.xyzx, r18.xyzx + movc r14.xyz, r6.xyzx, r18.xyzx, l(0,0,0,0) + mul r3.yz, r3.yyzy, l(0.000000, 0.333333, 0.333333, 0.000000) + mov r15.w, r2.y + mov r16.w, r2.z + mov r17.w, r3.y + mov r14.w, r3.z + break + case l(4) + ishl r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + mov r19.xz, r18.xxyx + mov r19.yw, r14.yyyz + ishr r19.xyzw, r19.xyzw, l(16, 16, 16, 16) + itof r19.xyzw, r19.xyzw + mul r19.xyzw, r19.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r15.xy, r19.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r16.xy, r19.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r14.yz, r18.zzwz + ishr r18.xyzw, r14.ywzx, l(16, 16, 16, 16) + itof r18.xyzw, r18.xyzw + mul r18.xyzw, r18.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r17.xy, r18.xyxx, l(-1.000000, -1.000000, 0.000000, 0.000000) + max r14.xy, r18.zwzz, l(-1.000000, -1.000000, 0.000000, 0.000000) + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + case l(6) + ushr r18.xyzw, r14.yzwx, l(16, 16, 16, 16) + f16tof32 r15.x, r14.y + f16tof32 r15.y, r18.x + f16tof32 r16.x, r14.z + f16tof32 r16.y, r18.y + f16tof32 r17.x, r14.w + f16tof32 r17.y, r18.z + f16tof32 r14.x, r14.x + f16tof32 r14.y, r18.w + mov r15.zw, l(0,0,0,0) + mov r16.zw, l(0,0,0,0) + mov r17.zw, l(0,0,0,0) + mov r14.zw, l(0,0,0,0) + break + default + mov r15.x, r14.y + mov r15.yzw, l(0,0,0,0) + mov r16.x, r14.z + mov r16.yzw, l(0,0,0,0) + mov r17.x, r14.w + mov r17.yzw, l(0,0,0,0) + mov r14.yzw, l(0,0,0,0) + break + endswitch + add r7.xyzw, r11.xyzw, r15.xyzw + add r8.xyzw, r12.xyzw, r16.xyzw + add r9.xyzw, r13.xyzw, r17.xyzw + add r5.xyzw, r10.xyzw, r14.xyzw + else + mov r0.w, r2.x + endif +endif +mul r7.xyzw, r0.wwww, r7.xyzw +mul r8.xyzw, r0.wwww, r8.xzwy +mul r9.xyzw, r0.wwww, r9.xyzw +mul r5.xyzw, r0.wwww, r5.xzwy +if_nz r1.w + mov r7.xz, r7.zzxz + mov r10.xz, r8.yyxy + mov r9.xz, r9.zzxz + mov r11.xz, r5.yyxy +else + mov r10.xz, r8.xxyx + mov r11.xz, r5.xxyx +endif +switch r3.x + case l(26) + mov_sat r7.xyzw, r7.xyzw + mad r3.xyzw, r7.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r8.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx + mov r10.yw, r8.wwwz + mov_sat r10.xyzw, r10.xyzw + mad r3.xyzw, r10.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r8.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz + mov_sat r9.xyzw, r9.xyzw + mad r3.xyzw, r9.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r5.xy, r3.ywyy, l(0x00010000, 0x00010000, 0, 0), r3.xzxx + mov r11.yw, r5.wwwz + mov_sat r11.xyzw, r11.xyzw + mad r3.xyzw, r11.xyzw, l(65535.000000, 65535.000000, 65535.000000, 65535.000000), l(0.500000, 0.500000, 0.500000, 0.500000) + ftou r3.xyzw, r3.xyzw + imad r5.zw, r3.yyyw, l(0, 0, 0x00010000, 0x00010000), r3.xxxz + break + case l(32) + f32tof16 r3.xy, r7.xzxx + f32tof16 r3.zw, r10.xxxz + f32tof16 r12.xy, r7.ywyy + f32tof16 r12.zw, r8.wwwz + imad r8.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw + f32tof16 r3.xy, r9.xzxx + f32tof16 r3.zw, r11.xxxz + f32tof16 r12.xy, r9.ywyy + f32tof16 r12.zw, r5.wwwz + imad r5.xyzw, r12.xyzw, l(0x00010000, 0x00010000, 0x00010000, 0x00010000), r3.xyzw + break + default + mov r8.xy, r7.xyxx + mov r8.z, r10.x + mov r5.xy, r9.xyxx + mov r5.z, r11.x + break +endswitch +if_nz r2.w + mov r8.xyzw, r8.yxwz + mov r5.xyzw, r5.yxwz + mov r0.x, l(2) +endif +ieq r0.xzw, r0.xxxx, l(1, 0, 2, 3) +or r0.xz, r0.zzwz, r0.xxzx +if_nz r0.x + ishl r2.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r8.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r8.xyzw, r2.xyzw, r3.xyzw + ishl r2.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r3.xyzw, r5.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r5.xyzw, r2.xyzw, r3.xyzw +endif +if_nz r0.z + ushr r2.xyzw, r8.xyzw, l(16, 16, 16, 16) + bfi r8.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r8.xyzw, r2.xyzw + ushr r2.xyzw, r5.xyzw, l(16, 16, 16, 16) + bfi r5.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r5.xyzw, r2.xyzw +endif +if_nz r1.x + mov r8.zw, r5.xxxy +endif +if_nz r1.y + mov r4.xy, r8.xyxx +endif +store_uav_typed U0[0].xyzw, r6.wwww, r4.xyxx +iadd r1.xyzw, r0.yyyy, l(5, 6, 7, 8) +store_uav_typed U0[0].xyzw, r1.xxxx, r8.xyxx +store_uav_typed U0[0].xyzw, r1.yyyy, r8.zwzz +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx +store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz +ret +// Approximately 1912 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_64bpp_from_64bpp_3xres_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..929a3edef9d3af51b0da2edd12878ac2544858b3 GIT binary patch literal 29076 zcmeI4O^jVfR>$wFj@ypyd^upid^PUDOpHK@g#blpQsa1>87T~nJ#J+dC?v6?1ZC2p zZDwEtR<|%xW`qP9nFU!zQEQ~Igbf=|kXR1`G%z0!5XuT6hzMHq5BVAbGm*(*J#h#CmHk;!ae-(sUN5B`*nT1 zULR9?P#5s0xV=CduYB>svlmx> zWA%j#P3Sp);o_y{nG0uHf+tsAy?E)lS1(;`-hTUS_!l|E>_IbA`&MNRj`jRyefN6Y z{=53Uj_c9=kLdP^&yDy!Bqr$cMs#6y7tXIf_l0L)e)Ywb=KPmdR?lnn!_rL^SZ{s! zbD_fc=gyy(>Mph%LO)uY-uc?gmtJ_O`NfxCSY5fe^5Uh1kDqyD;nPo_eR|>SOV6FZ zu)6T%$`@XH`4v4p_UKPP*1Y|hvrm1NwF9)j)O$bs=}$d#>eZ(CWjWa&{9x1k+P-G= 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zHUY~fkT}pZE~r{7APurf8Kep-Ck2%QsbL1nfz&Wf4iuLbXMw2X1=$2L1!zlyBLlR!1Jwusg+Kr#Wdp=nKpZo9qJK32 DKH@76 delta 370 zcmcaHpRs2FqoGTLle4;-*}*lZqAmUiPUU>0t8U52z`(#0z`(!?q)mXhhlzn<4iK*a z;)0Ea^-P?5d>9x4f%5vBcQPGgR^n)45MTi5Vz|J-zy)Lj6*4e7FfafOVF+blU~ih7 z$S%yw0_2%9FmNgXRj^Fn$R=Me1Z071v4ZNC0?7dR%0N}fav<|S<}yQRkRCapxga$l z^&mMI4U*FUIv!a+$Za4okj*grfMyDTEaEW&3W6+f14&Mv$R;ibVu3_J&H#IDaw@y} qWE~Fx&(k4K>%c@4G`x5aqQ$+|7rlHnJC5p diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h index ff958416c..103a65fa2 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_2xres_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_full_8bpp_2xres.cs.hlsl const uint8_t resolve_full_8bpp_2xres_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x27, 0x26, 0x36, 0xC1, 0xAC, 0xCA, 0x5B, 0x38, - 0xFC, 0x11, 0x95, 0x09, 0xE2, 0x2D, 0x27, 0x39, 0x01, 0x00, 0x00, 0x00, - 0x0C, 0x50, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x3B, 0xD3, 0x1A, 0x04, 0x66, 0x76, 0xCE, 0x87, + 0xCB, 0xD4, 0x2B, 0xBF, 0x22, 0xE1, 0x34, 0x36, 0x01, 0x00, 0x00, 0x00, + 0xD8, 0x4F, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, - 0x70, 0x4F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x3C, 0x4F, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -58,8 +58,8 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x2E, 0x31, 0x00, 0xAB, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0xBC, 0x4C, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x2F, 0x13, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x88, 0x4C, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x22, 0x13, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -139,71 +139,88 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, - 0x05, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, 0x82, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, - 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, 0x32, 0x00, 0x10, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, + 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x37, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x2A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x29, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 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0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, @@ -214,10 +231,21 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, + 0x01, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, + 0x32, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x86, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, + 0xF2, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x06, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, @@ -225,306 +253,295 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x06, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 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0x0B, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, + 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, - 0x86, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, + 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, + 0x0B, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, + 0x86, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, + 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -535,9 +552,20 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, + 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x0B, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x06, 0x04, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, + 0x32, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, + 0x0B, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, @@ -546,303 +574,292 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, - 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x34, 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0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x86, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, + 0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x86, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -853,9 +870,20 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, + 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x06, 0x04, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, + 0x32, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x0A, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, @@ -864,289 +892,278 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x02, 0x40, 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0x36, 0x00, 0x00, 0x05, - 0x32, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x86, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, - 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, - 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, - 0xF2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x06, 0x04, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0x32, 0x00, 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0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, @@ -1157,10 +1174,21 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, + 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0xBF, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, + 0x00, 0x00, 0x80, 0xBF, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, + 0x01, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, + 0x32, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x86, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, + 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, + 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, + 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0xC2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, @@ -1168,545 +1196,513 @@ const uint8_t resolve_full_8bpp_2xres_cs[] = { 0x0A, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x2B, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x38, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, - 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, 0x00, 0x01, 0x80, 0x3A, - 0x00, 0x01, 0x80, 0x3A, 0x34, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x83, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, - 0x00, 0x00, 0x80, 0xBF, 0x00, 0x00, 0x80, 0xBF, 0x02, 0x00, 0x00, 0x01, - 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0xD6, 0x05, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0xC2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x06, 0x04, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, 0x32, 0x00, 0x10, 0x00, - 0x0B, 0x00, 0x00, 0x00, 0x86, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x37, 0x00, 0x00, 0x09, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x56, 0x05, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, - 0x83, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x36, 0x00, 0x00, 0x05, - 0x32, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0xD6, 0x05, 0x10, 0x00, - 0x0A, 0x00, 0x00, 0x00, 0x36, 0x00, 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r5.x -ineg r5.x, r1.w -ineg r5.y, r2.w -imad r2.xy, r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r1.w, r2.y, l(80), r2.x -ishl r1.w, r1.w, r4.y -imad r1.w, r4.x, l(1280), r1.w +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w iadd r2.x, r2.z, r4.z ishl r2.x, l(1), r2.x iadd r2.x, r1.w, r2.x @@ -714,4 +711,4 @@ endif ushr r0.x, r1.x, l(1) store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyxx ret -// Approximately 670 instruction slots used +// Approximately 667 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..6d4d4240f07972e5b45100187b49c6c5351f8f79 GIT binary patch literal 157800 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e{JjF{e|*Y-Q2sML|6l6+pPK%Fa^WMn+J6IH?-QZ` literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h new file mode 100644 index 000000000..ff45774cf --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.h @@ -0,0 +1,13154 @@ +// generated from `xb buildhlsl` +// source: resolve_full_8bpp_3xres.cs.hlsl +const uint8_t resolve_full_8bpp_3xres_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xC6, 0x1C, 0x94, 0xFB, 0x23, 0xB4, 0x50, 0x49, + 0xCC, 0x5F, 0x50, 0x11, 0x6E, 0xFA, 0xF1, 0x5A, 0x01, 0x00, 0x00, 0x00, + 0x68, 0x68, 0x02, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x8C, 0x02, 0x00, 0x00, 0x9C, 0x02, 0x00, 0x00, 0xAC, 0x02, 0x00, 0x00, + 0xCC, 0x67, 0x02, 0x00, 0x52, 0x44, 0x45, 0x46, 0x50, 0x02, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0x27, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD6, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x78, 0x65, 0x5F, 0x72, 0x65, 0x73, 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0x00, 0x00, 0x80, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x4A, 0x00, 0x00, 0x00, 0xE2, 0x01, 0x00, 0x00, 0x98, 0x01, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt new file mode 100644 index 000000000..b33802633 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_3xres_cs.txt @@ -0,0 +1,5395 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeResolveConstants +// { +// +// uint xe_resolve_edram_info; // Offset: 0 Size: 4 +// uint xe_resolve_address_info; // Offset: 4 Size: 4 +// uint xe_resolve_dest_info; // Offset: 8 Size: 4 +// uint xe_resolve_dest_pitch; // Offset: 12 Size: 4 +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_resolve_source texture byte r/o T0 t0 1 +// xe_resolve_dest UAV uint2 buf U0 u0 1 +// XeResolveConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][1], immediateIndexed, space=0 +dcl_resource_raw T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xy +dcl_temps 19 +dcl_thread_group 8, 8, 1 +ubfe r0.x, l(11), l(7), CB0[0][0].y +uge r0.x, vThreadID.x, r0.x +if_nz r0.x + ret +endif +ishl r0.x, vThreadID.x, l(3) +and r1.xyzw, CB0[0][0].xzwx, l(0x40000000, 8, 0x00003fff, 1023) +mov r0.y, vThreadID.y +ieq r0.zw, r0.xxxy, l(0, 0, 0, 0) +movc r0.zw, r1.xxxx, r0.zzzw, l(0,0,0,0) +ushr r2.xy, CB0[0][0].yyyy, l(5, 29, 0, 0) +mov r2.z, CB0[0][0].y +bfi r3.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r2.zxxz, l(0, 0, 0, 0) +iadd r3.xyzw, r0.xyyx, r3.xyzw +if_nz r1.y + ubfe r1.xy, l(3, 14, 0, 0), l(4, 16, 0, 0), CB0[0][0].zwzz + iadd r4.xy, r1.yzyy, l(31, 31, 0, 0) + ishr r5.xyzw, r3.zwzw, l(4, 5, 3, 3) + ishr r1.y, r1.x, l(2) + ushr r4.xy, r4.xyxx, l(4, 5, 0, 0) + and r2.w, r4.x, l(2046) + imad r2.w, r1.y, r2.w, r5.x + imad r2.w, r2.w, r4.y, r5.y + ishl r4.x, r3.z, l(8) + ishr r4.x, r4.x, l(6) + iadd r1.y, r1.y, r5.z + bfi r4.y, l(1), l(1), r1.y, l(0) + iadd r4.y, r4.y, r5.w + bfi r4.y, l(2), l(1), r4.y, l(0) + bfi r1.y, l(1), l(0), r1.y, r4.y + and r4.xy, r4.xxxx, l(16, 8, 0, 0) + bfi r4.zw, l(0, 0, 22, 22), l(0, 0, 8, 11), r2.wwww, l(0, 0, 0, 0) + imad r4.xz, r4.xxxx, l(2, 0, 16, 0), r4.zzwz + bfi r4.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r4.yyyy, r4.xzxx + bfi r4.xy, l(2, 2, 0, 0), l(6, 9, 0, 0), r1.xxxx, r4.xyxx + ubfe r1.x, l(3), l(6), r4.x + and r2.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r1.x, r1.x, l(32), r1.y + imad r1.x, r2.w, l(4), r1.x + bfi r4.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), r3.zzzz, r4.xyxx + bfi r1.x, l(9), l(3), r1.x, r4.y + bfi r1.x, l(6), l(0), r4.x, r1.x +else + ishr r4.xyzw, r3.xyzw, l(5, 5, 2, 3) + iadd r1.y, r1.z, l(31) + ushr r1.y, r1.y, l(5) + imad r1.y, r4.y, r1.y, r4.x + ishl r3.xy, r3.zzzz, l(2, 7, 0, 0) + ishl r1.z, r3.x, l(1) + and r1.z, r1.z, l(96) + bfi r2.w, l(25), l(7), r1.y, r1.z + and r3.xy, r3.xyxx, l(8, 2048, 0, 0) + iadd r2.w, r2.w, r3.x + bfi r2.w, l(1), l(4), r3.z, r2.w + ishl r4.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r4.xxyx + imad r1.yz, r3.xxxx, l(0, 8, 4, 0), r1.yyzy + bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), r3.zzzz, r1.yyzy + bfi r1.y, l(12), l(0), r3.y, r1.y + and r1.z, r1.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r4.z, l(2) + iadd r1.z, r4.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.w, r1.y +endif +imul null, r1.x, r1.x, l(9) +ushr r1.x, r1.x, l(3) +bfi r1.yz, l(0, 5, 2, 0), l(0, 3, 3, 0), r2.zzxz, l(0, 0, 0, 0) +iadd r0.xy, r0.xyxx, r1.yzyy +ubfe r3.xyzw, l(12, 2, 1, 4), l(13, 10, 29, 25), CB0[0][0].xxxx +uge r1.y, l(3), r2.y +if_nz r1.y + mov r4.y, r2.y +else + ieq r1.y, r2.y, l(5) + if_nz r1.y + mov r4.y, l(2) + else + mov r4.y, l(0) + endif +endif +uge r1.yz, r3.yyyy, l(0, 2, 1, 0) +and r1.yz, r1.yyzy, l(0, 1, 1, 0) +ishl r0.xy, r0.xyxx, r1.yzyy +ushr r4.x, r4.y, l(1) +and r2.xz, r4.xxyx, l(1, 0, 1, 0) +iadd r0.xy, r0.xyxx, r2.xzxx +udiv r2.xz, null, r0.xxyx, l(80, 0, 16, 0) +movc r1.z, r3.z, l(1), l(0) +ishl r2.w, r2.x, r1.z +imad r1.w, r2.z, r1.w, r2.w +iadd r1.w, r1.w, r3.x +imad r0.xy, -r2.xzxx, l(80, 16, 0, 0), r0.xyxx +imad r0.x, r0.y, l(80), r0.x +ishl r0.x, r0.x, r1.z +imad r0.x, r1.w, l(1280), r0.x +imul null, r0.y, r0.x, l(36) +and r1.w, CB0[0][0].z, l(0x01000000) +ine r2.x, r1.w, l(0) +ine r2.z, r3.z, l(0) +and r2.x, r2.x, r2.z +if_nz r2.x + imad r0.y, r0.x, l(36), l(4) +endif +if_z r2.z + ld_raw r4.xyzw, r0.y, T0[0].xyzw + iadd r3.xy, r0.yyyy, l(16, 32, 0, 0) + ld_raw r5.xyzw, r3.x, T0[0].xyzw + ld_raw r2.w, r3.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r3.x, r1.w, l(16), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r3.x, r2.w, r3.x + and r3.x, r3.x, l(255) + utof r3.x, r3.x + mul r2.w, r3.x, l(0.003922) + break + case l(2) + case l(10) + movc r3.x, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r4.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r3.x, r2.w, r3.x + and r3.x, r3.x, l(1023) + utof r3.x, r3.x + mul r2.w, r3.x, l(0.000978) + break + case l(3) + case l(12) + movc r3.x, r1.w, l(20), l(0) + ushr r6.xyzw, r4.xyzw, r3.xxxx + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r4.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r5.xyzw, r3.xxxx + and r7.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r10.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r9.xyzw, r8.xyzw, r6.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r8.xyzw, r6.xyzw + movc r5.xyzw, r7.xyzw, r6.xyzw, l(0,0,0,0) + ushr r3.x, r2.w, r3.x + and r6.xy, r3.xxxx, l(1023, 127, 0, 0) + ubfe r3.y, l(3), l(7), r3.x + firstbit_hi r6.z, r6.y + iadd r6.z, r6.z, l(-24) + movc r6.z, r6.y, r6.z, l(8) + iadd r6.w, -r6.z, l(1) + movc r6.w, r3.y, r3.y, r6.w + bfi r3.x, l(7), r6.z, r3.x, l(0) + and r3.x, r3.x, l(127) + movc r3.x, r3.y, r6.y, r3.x + ishl r3.y, r6.w, l(23) + iadd r3.y, r3.y, l(0x3e000000) + ishl r3.x, r3.x, l(16) + iadd r3.x, r3.y, r3.x + movc r2.w, r6.x, r3.x, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r3.x, l(16), l(0), r2.w + itof r3.x, r3.x + mul r3.x, r3.x, l(0.000977) + max r2.w, r3.x, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch +else + ld_raw r4.x, r0.y, T0[0].xxxx + iadd r6.xyzw, r0.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r6.x, T0[0].xxxx + ld_raw r4.z, r6.y, T0[0].xxxx + ld_raw r4.w, r6.z, T0[0].xxxx + ld_raw r5.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r0.yyyy, l(40, 48, 56, 64) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r2.w, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r3.x, l(16), l(0), r2.w + itof r3.x, r3.x + mul r3.x, r3.x, l(0.000977) + max r2.w, r3.x, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch +endif +ibfe r3.x, l(6), l(16), CB0[0][0].z +ishl r3.x, r3.x, l(23) +iadd r3.x, r3.x, l(0x3f800000) +uge r3.y, r2.y, l(4) +if_nz r3.y + mul r6.x, r3.x, l(0.500000) + ishl r6.y, l(2880), r3.z + iadd r6.y, r0.y, r6.y + if_z r2.z + ld_raw r7.xyzw, r6.y, T0[0].xyzw + iadd r6.zw, r6.yyyy, l(0, 0, 16, 32) + ld_raw r8.xyzw, r6.z, T0[0].xyzw + ld_raw r6.z, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r6.z, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r6.z, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r6.z, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r6.z, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r6.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r6.wwww + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r6.w, r6.z, r6.w + and r9.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r9.z, l(3), l(7), r6.w + firstbit_hi r9.w, r9.y + iadd r9.w, r9.w, l(-24) + movc r9.w, r9.y, r9.w, l(8) + iadd r10.x, -r9.w, l(1) + movc r10.x, r9.z, r9.z, r10.x + bfi r6.w, l(7), r9.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r9.z, r9.y, r6.w + ishl r9.y, r10.x, l(23) + iadd r9.y, r9.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r9.y, r6.w + movc r6.z, r9.x, r6.w, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r6.z + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r6.z, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.z, r6.z + break + default + break + endswitch + else + ld_raw r7.x, r6.y, T0[0].xxxx + iadd r9.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r6.z, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.z + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.z, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r6.z, r6.z + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r7.xyzw + add r5.xyzw, r5.xyzw, r8.xyzw + add r2.w, r2.w, r6.z + uge r6.y, r2.y, l(6) + if_nz r6.y + mul r6.x, r3.x, l(0.250000) + ishl r6.yz, l(0, 36, 2916, 0), r3.zzzz + iadd r6.yz, r0.yyyy, r6.yyzy + if_z r2.z + ld_raw r7.xyzw, r6.y, T0[0].xyzw + iadd r8.xy, r6.yyyy, l(16, 32, 0, 0) + ld_raw r9.xyzw, r8.x, T0[0].xyzw + ld_raw r0.y, r8.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r7.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r0.y, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r0.y, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r7.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r9.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r0.y, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r0.y, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r8.xyzw, r7.xyzw, r6.wwww + and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r11.xyzw, r8.xyzw + movc r7.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) + ushr r8.xyzw, r9.xyzw, r6.wwww + and r10.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r13.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r12.xyzw, r11.xyzw, r8.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r11.xyzw, r8.xyzw + movc r9.xyzw, r10.xyzw, r8.xyzw, l(0,0,0,0) + ushr r6.w, r0.y, r6.w + and r8.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r8.z, l(3), l(7), r6.w + firstbit_hi r8.w, r8.y + iadd r8.w, r8.w, l(-24) + movc r8.w, r8.y, r8.w, l(8) + iadd r10.x, -r8.w, l(1) + movc r10.x, r8.z, r8.z, r10.x + bfi r6.w, l(7), r8.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r8.z, r8.y, r6.w + ishl r8.y, r10.x, l(23) + iadd r8.y, r8.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r8.y, r6.w + movc r0.y, r8.x, r6.w, l(0) + break + case l(4) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r0.y + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r0.y, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + else + ld_raw r7.x, r6.y, T0[0].xxxx + iadd r8.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r7.y, r8.x, T0[0].xxxx + ld_raw r7.z, r8.y, T0[0].xxxx + ld_raw r7.w, r8.z, T0[0].xxxx + ld_raw r9.x, r8.w, T0[0].xxxx + iadd r8.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r9.y, r8.x, T0[0].xxxx + ld_raw r9.z, r8.y, T0[0].xxxx + ld_raw r9.w, r8.z, T0[0].xxxx + ld_raw r0.y, r8.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r0.y + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r0.y, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + endif + add r7.xyzw, r4.xyzw, r7.xyzw + add r8.xyzw, r5.xyzw, r9.xyzw + add r0.y, r0.y, r2.w + if_z r2.z + ld_raw r9.xyzw, r6.z, T0[0].xyzw + iadd r6.yw, r6.zzzz, l(0, 16, 0, 32) + ld_raw r10.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.w, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.w, r6.y, r6.w + and r6.w, r6.w, l(255) + utof r6.w, r6.w + mul r6.y, r6.w, l(0.003922) + break + case l(2) + case l(10) + movc r6.w, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.w, r6.y, r6.w + and r6.w, r6.w, l(1023) + utof r6.w, r6.w + mul r6.y, r6.w, l(0.000978) + break + case l(3) + case l(12) + movc r6.w, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.wwww + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r6.wwww + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r6.w, r6.y, r6.w + and r11.xy, r6.wwww, l(1023, 127, 0, 0) + ubfe r11.z, l(3), l(7), r6.w + firstbit_hi r11.w, r11.y + iadd r11.w, r11.w, l(-24) + movc r11.w, r11.y, r11.w, l(8) + iadd r12.x, -r11.w, l(1) + movc r12.x, r11.z, r11.z, r12.x + bfi r6.w, l(7), r11.w, r6.w, l(0) + and r6.w, r6.w, l(127) + movc r6.w, r11.z, r11.y, r6.w + ishl r11.y, r12.x, l(23) + iadd r11.y, r11.y, l(0x3e000000) + ishl r6.w, r6.w, l(16) + iadd r6.w, r11.y, r6.w + movc r6.y, r11.x, r6.w, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.w, l(16), l(0), r6.y + itof r6.w, r6.w + mul r6.w, r6.w, l(0.000977) + max r6.y, r6.w, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r9.x, r6.z, T0[0].xxxx + iadd r11.xyzw, r6.zzzz, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r6.zzzz, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r6.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r4.xyzw, r7.xyzw, r9.xyzw + add r5.xyzw, r8.xyzw, r10.xyzw + add r2.w, r0.y, r6.y + endif +else + mov r6.x, r3.x +endif +mul r4.xyzw, r4.xyzw, r6.xxxx +mul r5.xyzw, r5.xyzw, r6.xxxx +mul_sat r0.y, r2.w, r6.x +if_nz r0.z + mov r4.x, r4.y + mov r4.w, r5.x + mov r5.z, r5.w +endif +if_nz r0.w + mov r4.xy, r5.xyxx + mov r4.xyz, r4.wxyw +endif +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.z, r4.y, l(256), r4.x +imad r0.z, r4.z, l(0x00010000), r0.z +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.zzzz +mov_sat r5.xyzw, r5.xyzw +mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r5.xyzw, r5.xyzw +imad r0.z, r5.y, l(256), r5.x +imad r0.z, r5.z, l(0x00010000), r0.z +imad r4.y, r5.w, l(0x01000000), r0.z +store_uav_typed U0[0].xyzw, r1.xxxx, r4.xyzw +mad r0.y, r0.y, l(255.000000), l(0.500000) +ftou r0.y, r0.y +iadd r0.z, r1.y, r1.z +ishl r0.z, l(36), r0.z +imad r0.x, r0.x, l(36), r0.z +if_nz r2.x + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r5.xy, r1.yyyy, l(16, 32, 0, 0) + ld_raw r6.xyzw, r5.x, T0[0].xyzw + ld_raw r1.z, r5.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r8.xyzw, r5.xyzw + movc r4.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r8.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r10.xyzw, r8.xyzw + iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) + movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) + iadd r11.xyzw, -r10.xyzw, l(1, 1, 1, 1) + movc r11.xyzw, r9.xyzw, r9.xyzw, r11.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw + ishl r8.xyzw, r11.xyzw, l(23, 23, 23, 23) + iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r8.xyzw, r5.xyzw + movc r6.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) + ushr r2.w, r1.z, r2.w + and r5.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r5.z, l(3), l(7), r2.w + firstbit_hi r5.w, r5.y + iadd r5.w, r5.w, l(-24) + movc r5.w, r5.y, r5.w, l(8) + iadd r7.x, -r5.w, l(1) + movc r7.x, r5.z, r5.z, r7.x + bfi r2.w, l(7), r5.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r5.z, r5.y, r2.w + ishl r5.y, r7.x, l(23) + iadd r5.y, r5.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r5.y, r2.w + movc r1.z, r5.x, r2.w, l(0) + break + case l(4) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r5.x, T0[0].xxxx + ld_raw r4.z, r5.y, T0[0].xxxx + ld_raw r4.w, r5.z, T0[0].xxxx + ld_raw r6.x, r5.w, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r5.x, T0[0].xxxx + ld_raw r6.z, r5.y, T0[0].xxxx + ld_raw r6.w, r5.z, T0[0].xxxx + ld_raw r1.z, r5.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r5.x, l(2880), r3.z + iadd r5.x, r1.y, r5.x + if_z r2.z + ld_raw r7.xyzw, r5.x, T0[0].xyzw + iadd r5.yz, r5.xxxx, l(0, 16, 32, 0) + ld_raw r8.xyzw, r5.y, T0[0].xyzw + ld_raw r5.y, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r5.z, r5.y, r5.z + and r9.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r5.w, r5.w, r9.w + bfi r5.z, l(7), r9.z, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r9.y, r5.z + ishl r5.w, r9.w, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.y, r9.x, r5.z, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + else + ld_raw r7.x, r5.x, T0[0].xxxx + iadd r9.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r5.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r5.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r5.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r8.xyzw + add r1.z, r1.z, r5.y + uge r5.x, r2.y, l(6) + if_nz r5.x + mul r2.w, r3.x, l(0.250000) + ishl r5.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r5.xy, r1.yyyy, r5.xyxx + if_z r2.z + ld_raw r7.xyzw, r5.x, T0[0].xyzw + iadd r5.zw, r5.xxxx, l(0, 0, 16, 32) + ld_raw r8.xyzw, r5.z, T0[0].xyzw + ld_raw r1.y, r5.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r5.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r5.z, r1.y, r5.z + and r9.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r5.w, r5.w, r9.w + bfi r5.z, l(7), r9.z, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r9.y, r5.z + ishl r5.w, r9.w, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r1.y, r9.x, r5.z, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r1.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r1.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r7.x, r5.x, T0[0].xxxx + iadd r9.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r9.x, T0[0].xxxx + ld_raw r7.z, r9.y, T0[0].xxxx + ld_raw r7.w, r9.z, T0[0].xxxx + ld_raw r8.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r1.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r1.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r1.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r7.xyzw, r4.xyzw, r7.xyzw + add r8.xyzw, r6.xyzw, r8.xyzw + add r1.y, r1.y, r1.z + if_z r2.z + ld_raw r9.xyzw, r5.y, T0[0].xyzw + iadd r5.xz, r5.yyyy, l(16, 0, 32, 0) + ld_raw r10.xyzw, r5.x, T0[0].xyzw + ld_raw r5.x, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r5.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r5.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r5.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r5.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r5.z, r5.x, r5.z + and r11.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r11.z, r11.y + iadd r11.z, r11.z, l(-24) + movc r11.z, r11.y, r11.z, l(8) + iadd r11.w, -r11.z, l(1) + movc r11.w, r5.w, r5.w, r11.w + bfi r5.z, l(7), r11.z, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r11.y, r5.z + ishl r5.w, r11.w, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.x, r11.x, r5.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.x + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.x, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + else + ld_raw r9.x, r5.y, T0[0].xxxx + iadd r11.xyzw, r5.yyyy, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r5.yyyy, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r5.x, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.y, l(16), l(0), r5.x + itof r5.y, r5.y + mul r5.y, r5.y, l(0.000977) + max r5.x, r5.y, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + endif + add r4.xyzw, r7.xyzw, r9.xyzw + add r6.xyzw, r8.xyzw, r10.xyzw + add r1.z, r1.y, r5.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.xyzw +mul r5.xyzw, r2.wwww, r6.xyzw +mul_sat r6.y, r1.z, r2.w +if_nz r0.w + mov r4.x, r4.w + mov r4.yz, r5.xxyx +endif +iadd r7.xyzw, r1.xxxx, l(1, 2, 3, 4) +mov_sat r4.xyzw, r4.xyzw +mad r8.xyz, r4.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r8.xyz, r8.xyzx +imad r1.y, r8.y, l(256), r8.x +ishl r1.z, r8.z, l(24) +imad r1.y, r1.y, l(256), r1.z +iadd r8.xzw, r0.yyyy, r1.yyyy +mov_sat r4.xyz, r5.xyzx +mad r4.xyzw, r4.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.xxxx, r8.xyzw +mov_sat r6.x, r5.w +mad r1.yz, r6.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) +ftou r1.yz, r1.yyzy +imad r0.y, r1.z, l(256), r1.y +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r5.xy, r1.yyyy, l(16, 32, 0, 0) + ld_raw r6.xyzw, r5.x, T0[0].xyzw + ld_raw r1.z, r5.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r11.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r9.xyzw, r5.xyzw + movc r4.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r11.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r9.xyzw, r5.xyzw + movc r6.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) + ushr r2.w, r1.z, r2.w + and r5.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r5.z, l(3), l(7), r2.w + firstbit_hi r5.w, r5.y + iadd r5.w, r5.w, l(-24) + movc r5.w, r5.y, r5.w, l(8) + iadd r7.x, -r5.w, l(1) + movc r7.x, r5.z, r5.z, r7.x + bfi r2.w, l(7), r5.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r5.z, r5.y, r2.w + ishl r5.y, r7.x, l(23) + iadd r5.y, r5.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r5.y, r2.w + movc r1.z, r5.x, r2.w, l(0) + break + case l(4) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r5.x, T0[0].xxxx + ld_raw r4.z, r5.y, T0[0].xxxx + ld_raw r4.w, r5.z, T0[0].xxxx + ld_raw r6.x, r5.w, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r5.x, T0[0].xxxx + ld_raw r6.z, r5.y, T0[0].xxxx + ld_raw r6.w, r5.z, T0[0].xxxx + ld_raw r1.z, r5.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r5.x, l(2880), r3.z + iadd r5.x, r1.y, r5.x + if_z r2.z + ld_raw r8.xyzw, r5.x, T0[0].xyzw + iadd r5.yz, r5.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r5.y, T0[0].xyzw + ld_raw r5.y, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r5.z, r5.y, r5.z + and r10.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r7.x, r10.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r10.y, r7.x, l(8) + iadd r10.z, -r7.x, l(1) + movc r10.z, r5.w, r5.w, r10.z + bfi r5.z, l(7), r7.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r10.y, r5.z + ishl r5.w, r10.z, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.y, r10.x, r5.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + else + ld_raw r8.x, r5.x, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r5.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r5.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r5.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r8.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r1.z, r1.z, r5.y + uge r5.x, r2.y, l(6) + if_nz r5.x + mul r2.w, r3.x, l(0.250000) + ishl r5.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r5.xy, r1.yyyy, r5.xyxx + if_z r2.z + ld_raw r8.xyzw, r5.x, T0[0].xyzw + iadd r5.zw, r5.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r5.z, T0[0].xyzw + ld_raw r1.y, r5.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r5.z, r1.y, r5.z + and r10.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r7.x, r10.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r10.y, r7.x, l(8) + iadd r10.z, -r7.x, l(1) + movc r10.z, r5.w, r5.w, r10.z + bfi r5.z, l(7), r7.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r10.y, r5.z + ishl r5.w, r10.z, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r1.y, r10.x, r5.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r1.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r1.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r5.x, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r1.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r1.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r4.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + add r1.y, r1.y, r1.z + if_z r2.z + ld_raw r10.xyzw, r5.y, T0[0].xyzw + iadd r5.xz, r5.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r5.x, T0[0].xyzw + ld_raw r5.x, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r5.z, r5.x, r5.z + and r12.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r7.x, r12.y + iadd r7.x, r7.x, l(-24) + movc r7.x, r12.y, r7.x, l(8) + iadd r12.z, -r7.x, l(1) + movc r12.z, r5.w, r5.w, r12.z + bfi r5.z, l(7), r7.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r12.y, r5.z + ishl r5.w, r12.z, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.x, r12.x, r5.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.x + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.x, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + else + ld_raw r10.x, r5.y, T0[0].xxxx + iadd r12.xyzw, r5.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r5.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r5.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.y, l(16), l(0), r5.x + itof r5.y, r5.y + mul r5.y, r5.y, l(0.000977) + max r5.x, r5.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + endif + add r4.xyzw, r8.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r1.z, r1.y, r5.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.xwyz +mul r5.xyzw, r2.wwww, r6.xyzw +mul_sat r6.z, r1.z, r2.w +if_nz r0.w + mov r8.x, r4.y + mov r8.y, r5.x + mov r4.x, r5.y +else + mov r8.xy, r4.xzxx + mov r4.x, r4.w +endif +mov_sat r8.xy, r8.xyxx +mad r1.yz, r8.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) +ftou r1.yz, r1.yyzy +ishl r1.z, r1.z, l(24) +imad r1.y, r1.y, l(0x00010000), r1.z +iadd r8.xzw, r0.yyyy, r1.yyyy +mov r4.zw, r5.xxxy +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.yyyy, r8.xyzw +mov_sat r6.xy, r5.zwzz +mad r4.xyz, r6.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r4.xyz, r4.xyzx +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r4.xyzw, r1.y, T0[0].xyzw + iadd r5.xy, r1.yyyy, l(16, 32, 0, 0) + ld_raw r6.xyzw, r5.x, T0[0].xyzw + ld_raw r1.z, r5.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r4.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + utof r5.xyzw, r5.xyzw + mul r6.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r5.xyzw, r4.xyzw, r2.wwww + and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r11.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r9.xyzw, r5.xyzw + movc r4.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) + ushr r5.xyzw, r6.xyzw, r2.wwww + and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r5.xyzw, l(7, 7, 7, 7), r11.xyzw, r5.xyzw, l(0, 0, 0, 0) + and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) + movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) + iadd r5.xyzw, r9.xyzw, r5.xyzw + movc r6.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) + ushr r2.w, r1.z, r2.w + and r5.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r5.z, l(3), l(7), r2.w + firstbit_hi r5.w, r5.y + iadd r5.w, r5.w, l(-24) + movc r5.w, r5.y, r5.w, l(8) + iadd r7.x, -r5.w, l(1) + movc r7.x, r5.z, r5.z, r7.x + bfi r2.w, l(7), r5.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r5.z, r5.y, r2.w + ishl r5.y, r7.x, l(23) + iadd r5.y, r5.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r5.y, r2.w + movc r1.z, r5.x, r2.w, l(0) + break + case l(4) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +else + ld_raw r4.x, r1.y, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r4.y, r5.x, T0[0].xxxx + ld_raw r4.z, r5.y, T0[0].xxxx + ld_raw r4.w, r5.z, T0[0].xxxx + ld_raw r6.x, r5.w, T0[0].xxxx + iadd r5.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r5.x, T0[0].xxxx + ld_raw r6.z, r5.y, T0[0].xxxx + ld_raw r6.w, r5.z, T0[0].xxxx + ld_raw r1.z, r5.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r4.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r4.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r5.xyzw, r5.xyzw + mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r4.xyzw, r4.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r5.x, l(2880), r3.z + iadd r5.x, r1.y, r5.x + if_z r2.z + ld_raw r8.xyzw, r5.x, T0[0].xyzw + iadd r5.yz, r5.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r5.y, T0[0].xyzw + ld_raw r5.y, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r5.z, r5.y, r5.z + and r7.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r10.x, r7.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r7.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r5.w, r5.w, r10.y + bfi r5.z, l(7), r10.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r7.y, r5.z + ishl r5.w, r10.y, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.y, r7.x, r5.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + else + ld_raw r8.x, r5.x, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r5.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r5.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r5.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r5.y, r5.y + break + default + break + endswitch + endif + add r4.xyzw, r4.xyzw, r8.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r1.z, r1.z, r5.y + uge r5.x, r2.y, l(6) + if_nz r5.x + mul r2.w, r3.x, l(0.250000) + ishl r5.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r5.xy, r1.yyyy, r5.xyxx + if_z r2.z + ld_raw r8.xyzw, r5.x, T0[0].xyzw + iadd r5.zw, r5.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r5.z, T0[0].xyzw + ld_raw r1.y, r5.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r1.y, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r1.y, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r5.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r5.z, r1.y, r5.z + and r7.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r10.x, r7.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r7.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r5.w, r5.w, r10.y + bfi r5.z, l(7), r10.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r7.y, r5.z + ishl r5.w, r10.y, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r1.y, r7.x, r5.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r1.y + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r1.y, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r5.x, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r5.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.x, l(16), l(0), r1.y + itof r5.x, r5.x + mul r5.x, r5.x, l(0.000977) + max r1.y, r5.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r4.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + add r1.y, r1.y, r1.z + if_z r2.z + ld_raw r10.xyzw, r5.y, T0[0].xyzw + iadd r5.xz, r5.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r5.x, T0[0].xyzw + ld_raw r5.x, r5.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r5.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(255) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.003922) + break + case l(2) + case l(10) + movc r5.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r5.z, r5.x, r5.z + and r5.z, r5.z, l(1023) + utof r5.z, r5.z + mul r5.x, r5.z, l(0.000978) + break + case l(3) + case l(12) + movc r5.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r5.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r5.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r5.z, r5.x, r5.z + and r7.xy, r5.zzzz, l(1023, 127, 0, 0) + ubfe r5.w, l(3), l(7), r5.z + firstbit_hi r12.x, r7.y + iadd r12.x, r12.x, l(-24) + movc r12.x, r7.y, r12.x, l(8) + iadd r12.y, -r12.x, l(1) + movc r12.y, r5.w, r5.w, r12.y + bfi r5.z, l(7), r12.x, r5.z, l(0) + and r5.z, r5.z, l(127) + movc r5.z, r5.w, r7.y, r5.z + ishl r5.w, r12.y, l(23) + iadd r5.w, r5.w, l(0x3e000000) + ishl r5.z, r5.z, l(16) + iadd r5.z, r5.w, r5.z + movc r5.x, r7.x, r5.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.z, l(16), l(0), r5.x + itof r5.z, r5.z + mul r5.z, r5.z, l(0.000977) + max r5.x, r5.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + else + ld_raw r10.x, r5.y, T0[0].xxxx + iadd r12.xyzw, r5.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r5.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r5.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r5.y, l(16), l(0), r5.x + itof r5.y, r5.y + mul r5.y, r5.y, l(0.000977) + max r5.x, r5.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r5.x, r5.x + break + default + break + endswitch + endif + add r4.xyzw, r8.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r1.z, r1.y, r5.x + endif +else + mov r2.w, r3.x +endif +mul r4.xyzw, r2.wwww, r4.yzxw +mul r5.xyzw, r2.wwww, r6.xyzw +mul_sat r6.w, r1.z, r2.w +if_nz r0.w + mov r4.xz, r5.yyxy + mov r1.y, r4.w +else + mov r1.y, r4.z + mov r4.xz, r4.yyxy +endif +mov_sat r1.y, r1.y +mad r1.y, r1.y, l(255.000000), l(0.500000) +ftou r1.y, r1.y +imad r8.xzw, r1.yyyy, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov r4.y, r5.x +mov_sat r4.xyzw, r4.xyzw +mad r4.xyzw, r4.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r8.y, r4.w, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r7.zzzz, r8.xyzw +mov_sat r6.xyz, r5.yzwy +mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r0.y, r0.x, l(4) +else + mov r0.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r0.y, T0[0].xyzw + iadd r1.yz, r0.yyyy, l(0, 16, 32, 0) + ld_raw r6.xyzw, r1.y, T0[0].xyzw + ld_raw r1.y, r1.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r1.z, r1.w, l(16), l(0) + ushr r8.xyzw, r5.xyzw, r1.zzzz + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r5.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r8.xyzw, r6.xyzw, r1.zzzz + and r8.xyzw, r8.xyzw, l(255, 255, 255, 255) + utof r8.xyzw, r8.xyzw + mul r6.xyzw, r8.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.z, r1.y, r1.z + and r1.z, r1.z, l(255) + utof r1.z, r1.z + mul r1.y, r1.z, l(0.003922) + break + case l(2) + case l(10) + movc r1.z, r1.w, l(20), l(0) + ushr r8.xyzw, r5.xyzw, r1.zzzz + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r5.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r8.xyzw, r6.xyzw, r1.zzzz + and r8.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + utof r8.xyzw, r8.xyzw + mul r6.xyzw, r8.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r1.z, r1.y, r1.z + and r1.z, r1.z, l(1023) + utof r1.z, r1.z + mul r1.y, r1.z, l(0.000978) + break + case l(3) + case l(12) + movc r1.z, r1.w, l(20), l(0) + ushr r8.xyzw, r5.xyzw, r1.zzzz + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r10.xyzw, r8.xyzw + movc r5.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) + ushr r8.xyzw, r6.xyzw, r1.zzzz + and r9.xyzw, r8.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r8.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r8.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r8.xyzw, l(7, 7, 7, 7), r12.xyzw, r8.xyzw, l(0, 0, 0, 0) + and r8.xyzw, r8.xyzw, l(127, 127, 127, 127) + movc r8.xyzw, r11.xyzw, r10.xyzw, r8.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r8.xyzw, r8.xyzw, l(16, 16, 16, 16) + iadd r8.xyzw, r10.xyzw, r8.xyzw + movc r6.xyzw, r9.xyzw, r8.xyzw, l(0,0,0,0) + ushr r1.z, r1.y, r1.z + and r7.xy, r1.zzzz, l(1023, 127, 0, 0) + ubfe r2.w, l(3), l(7), r1.z + firstbit_hi r7.z, r7.y + iadd r7.z, r7.z, l(-24) + movc r7.z, r7.y, r7.z, l(8) + iadd r8.x, -r7.z, l(1) + movc r8.x, r2.w, r2.w, r8.x + bfi r1.z, l(7), r7.z, r1.z, l(0) + and r1.z, r1.z, l(127) + movc r1.z, r2.w, r7.y, r1.z + ishl r2.w, r8.x, l(23) + iadd r2.w, r2.w, l(0x3e000000) + ishl r1.z, r1.z, l(16) + iadd r1.z, r2.w, r1.z + movc r1.y, r7.x, r1.z, l(0) + break + case l(4) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r1.y + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r1.y, r1.z, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch +else + ld_raw r5.x, r0.y, T0[0].xxxx + iadd r8.xyzw, r0.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r8.x, T0[0].xxxx + ld_raw r5.z, r8.y, T0[0].xxxx + ld_raw r5.w, r8.z, T0[0].xxxx + ld_raw r6.x, r8.w, T0[0].xxxx + iadd r8.xyzw, r0.yyyy, l(40, 48, 56, 64) + ld_raw r6.y, r8.x, T0[0].xxxx + ld_raw r6.z, r8.y, T0[0].xxxx + ld_raw r6.w, r8.z, T0[0].xxxx + ld_raw r1.y, r8.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r8.xyzw, r8.xyzw + mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r1.y + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r1.y, r1.z, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch +endif +if_nz r3.y + mul r1.z, r3.x, l(0.500000) + ishl r2.w, l(2880), r3.z + iadd r2.w, r0.y, r2.w + if_z r2.z + ld_raw r8.xyzw, r2.w, T0[0].xyzw + iadd r7.xy, r2.wwww, l(16, 32, 0, 0) + ld_raw r9.xyzw, r7.x, T0[0].xyzw + ld_raw r7.x, r7.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.y, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.y, r7.x, r7.y + and r7.y, r7.y, l(255) + utof r7.y, r7.y + mul r7.x, r7.y, l(0.003922) + break + case l(2) + case l(10) + movc r7.y, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.y, r7.x, r7.y + and r7.y, r7.y, l(1023) + utof r7.y, r7.y + mul r7.x, r7.y, l(0.000978) + break + case l(3) + case l(12) + movc r7.y, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r7.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r7.yyyy + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r7.y, r7.x, r7.y + and r10.xy, r7.yyyy, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r7.y + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r7.z, r7.z, r10.w + bfi r7.y, l(7), r10.z, r7.y, l(0) + and r7.y, r7.y, l(127) + movc r7.y, r7.z, r10.y, r7.y + ishl r7.z, r10.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r7.y, r7.y, l(16) + iadd r7.y, r7.z, r7.y + movc r7.x, r10.x, r7.y, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.y, l(16), l(0), r7.x + itof r7.y, r7.y + mul r7.y, r7.y, l(0.000977) + max r7.x, r7.y, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + else + ld_raw r8.x, r2.w, T0[0].xxxx + iadd r10.xyzw, r2.wwww, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r2.wwww, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r7.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r7.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r7.x, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r7.x, r7.x + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r8.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r1.y, r1.y, r7.x + uge r2.w, r2.y, l(6) + if_nz r2.w + mul r1.z, r3.x, l(0.250000) + ishl r7.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r7.xy, r0.yyyy, r7.xyxx + if_z r2.z + ld_raw r8.xyzw, r7.x, T0[0].xyzw + iadd r9.xy, r7.xxxx, l(16, 32, 0, 0) + ld_raw r10.xyzw, r9.x, T0[0].xyzw + ld_raw r0.y, r9.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r0.y, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r0.y, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r10.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r0.y, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r0.y, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r9.xyzw, r8.xyzw, r2.wwww + and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r12.xyzw, r9.xyzw + movc r8.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r10.xyzw, r2.wwww + and r11.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r14.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r13.xyzw, r12.xyzw, r9.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r12.xyzw, r9.xyzw + movc r10.xyzw, r11.xyzw, r9.xyzw, l(0,0,0,0) + ushr r2.w, r0.y, r2.w + and r9.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r2.w + firstbit_hi r9.z, r9.y + iadd r9.z, r9.z, l(-24) + movc r9.z, r9.y, r9.z, l(8) + iadd r9.w, -r9.z, l(1) + movc r9.w, r7.z, r7.z, r9.w + bfi r2.w, l(7), r9.z, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r7.z, r9.y, r2.w + ishl r7.z, r9.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r7.z, r2.w + movc r0.y, r9.x, r2.w, l(0) + break + case l(4) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r0.y + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r0.y, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + else + ld_raw r8.x, r7.x, T0[0].xxxx + iadd r9.xyzw, r7.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r9.x, T0[0].xxxx + ld_raw r8.z, r9.y, T0[0].xxxx + ld_raw r8.w, r9.z, T0[0].xxxx + ld_raw r10.x, r9.w, T0[0].xxxx + iadd r9.xyzw, r7.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r9.x, T0[0].xxxx + ld_raw r10.z, r9.y, T0[0].xxxx + ld_raw r10.w, r9.z, T0[0].xxxx + ld_raw r0.y, r9.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r0.y + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r0.y, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r0.y, r0.y + break + default + break + endswitch + endif + add r8.xyzw, r5.xyzw, r8.xyzw + add r9.xyzw, r6.xyzw, r10.xyzw + add r0.y, r0.y, r1.y + if_z r2.z + ld_raw r10.xyzw, r7.y, T0[0].xyzw + iadd r7.xz, r7.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r7.x, T0[0].xyzw + ld_raw r2.w, r7.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r7.x, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.x, r2.w, r7.x + and r7.x, r7.x, l(255) + utof r7.x, r7.x + mul r2.w, r7.x, l(0.003922) + break + case l(2) + case l(10) + movc r7.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.x, r2.w, r7.x + and r7.x, r7.x, l(1023) + utof r7.x, r7.x + mul r2.w, r7.x, l(0.000978) + break + case l(3) + case l(12) + movc r7.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r7.xxxx + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r7.xxxx + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r7.x, r2.w, r7.x + and r12.xy, r7.xxxx, l(1023, 127, 0, 0) + ubfe r7.z, l(3), l(7), r7.x + firstbit_hi r12.z, r12.y + iadd r12.z, r12.z, l(-24) + movc r12.z, r12.y, r12.z, l(8) + iadd r12.w, -r12.z, l(1) + movc r12.w, r7.z, r7.z, r12.w + bfi r7.x, l(7), r12.z, r7.x, l(0) + and r7.x, r7.x, l(127) + movc r7.x, r7.z, r12.y, r7.x + ishl r7.z, r12.w, l(23) + iadd r7.z, r7.z, l(0x3e000000) + ishl r7.x, r7.x, l(16) + iadd r7.x, r7.z, r7.x + movc r2.w, r12.x, r7.x, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r2.w + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r2.w, r7.x, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch + else + ld_raw r10.x, r7.y, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r7.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r2.w, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.x, l(16), l(0), r2.w + itof r7.x, r7.x + mul r7.x, r7.x, l(0.000977) + max r2.w, r7.x, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r2.w, r2.w + break + default + break + endswitch + endif + add r5.xyzw, r8.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r1.y, r0.y, r2.w + endif +else + mov r1.z, r3.x +endif +mul r5.xyzw, r1.zzzz, r5.xyzw +mul r6.xyzw, r1.zzzz, r6.xyzw +mul_sat r0.y, r1.z, r1.y +if_nz r0.w + mov r5.x, r5.w + mov r5.yz, r6.xxyx +endif +mov_sat r5.xyzw, r5.xyzw +mad r5.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r5.xyzw, r5.xyzw +imad r1.y, r5.y, l(256), r5.x +imad r1.y, r5.z, l(0x00010000), r1.y +imad r4.y, r5.w, l(0x01000000), r1.y +store_uav_typed U0[0].xyzw, r7.wwww, r4.xyzw +mov_sat r6.xyzw, r6.xyzw +mad r4.xyzw, r6.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r1.y, r4.y, l(256), r4.x +imad r1.y, r4.z, l(0x00010000), r1.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r1.yyyy +mad r0.y, r0.y, l(255.000000), l(0.500000) +ftou r0.y, r0.y +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r1.y, T0[0].xyzw + iadd r6.xy, r1.yyyy, l(16, 32, 0, 0) + ld_raw r7.xyzw, r6.x, T0[0].xyzw + ld_raw r1.z, r6.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r7.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r7.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r5.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r8.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r11.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r10.xyzw, r9.xyzw, r6.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r9.xyzw, r6.xyzw + movc r7.xyzw, r8.xyzw, r6.xyzw, l(0,0,0,0) + ushr r2.w, r1.z, r2.w + and r6.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r6.z, l(3), l(7), r2.w + firstbit_hi r6.w, r6.y + iadd r6.w, r6.w, l(-24) + movc r6.w, r6.y, r6.w, l(8) + iadd r8.x, -r6.w, l(1) + movc r8.x, r6.z, r6.z, r8.x + bfi r2.w, l(7), r6.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r6.z, r6.y, r2.w + ishl r6.y, r8.x, l(23) + iadd r6.y, r6.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r6.y, r2.w + movc r1.z, r6.x, r2.w, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +else + ld_raw r5.x, r1.y, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r7.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r7.y, r6.x, T0[0].xxxx + ld_raw r7.z, r6.y, T0[0].xxxx + ld_raw r7.w, r6.z, T0[0].xxxx + ld_raw r1.z, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r6.x, l(2880), r3.z + iadd r6.x, r1.y, r6.x + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r6.y, r6.z + and r10.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r6.w, r6.w, r10.w + bfi r6.z, l(7), r10.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r10.y, r6.z + ishl r6.w, r10.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.y, r10.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r6.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r6.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r6.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r8.xyzw + add r7.xyzw, r7.xyzw, r9.xyzw + add r1.z, r1.z, r6.y + uge r6.x, r2.y, l(6) + if_nz r6.x + mul r2.w, r3.x, l(0.250000) + ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r6.xy, r1.yyyy, r6.xyxx + if_z r2.z + ld_raw r8.xyzw, r6.x, T0[0].xyzw + iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) + ld_raw r9.xyzw, r6.z, T0[0].xyzw + ld_raw r1.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r8.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r10.xyzw, r8.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r8.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r6.z, r1.y, r6.z + and r10.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r10.z, r10.y + iadd r10.z, r10.z, l(-24) + movc r10.z, r10.y, r10.z, l(8) + iadd r10.w, -r10.z, l(1) + movc r10.w, r6.w, r6.w, r10.w + bfi r6.z, l(7), r10.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r10.y, r6.z + ishl r6.w, r10.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r1.y, r10.x, r6.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r1.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r1.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r8.x, r6.x, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r8.y, r10.x, T0[0].xxxx + ld_raw r8.z, r10.y, T0[0].xxxx + ld_raw r8.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r1.y, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r1.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r1.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r8.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r8.xyzw, r5.xyzw, r8.xyzw + add r9.xyzw, r7.xyzw, r9.xyzw + add r1.y, r1.y, r1.z + if_z r2.z + ld_raw r10.xyzw, r6.y, T0[0].xyzw + iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r6.x, T0[0].xyzw + ld_raw r6.x, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r6.zzzz + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r6.z, r6.x, r6.z + and r12.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r12.z, r12.y + iadd r12.z, r12.z, l(-24) + movc r12.z, r12.y, r12.z, l(8) + iadd r12.w, -r12.z, l(1) + movc r12.w, r6.w, r6.w, r12.w + bfi r6.z, l(7), r12.z, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r12.y, r6.z + ishl r6.w, r12.w, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.x, r12.x, r6.z, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.x + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.x, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + else + ld_raw r10.x, r6.y, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r12.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r12.x, T0[0].xxxx + ld_raw r11.z, r12.y, T0[0].xxxx + ld_raw r11.w, r12.z, T0[0].xxxx + ld_raw r6.x, r12.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.x + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.x, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + endif + add r5.xyzw, r8.xyzw, r10.xyzw + add r7.xyzw, r9.xyzw, r11.xyzw + add r1.z, r1.y, r6.x + endif +else + mov r2.w, r3.x +endif +mul r5.xyzw, r2.wwww, r5.xyzw +mul r6.xyzw, r2.wwww, r7.xyzw +mul_sat r7.y, r1.z, r2.w +if_nz r0.w + mov r5.x, r5.w + mov r5.yz, r6.xxyx +endif +iadd r8.xyzw, r1.xxxx, l(5, 6, 7, 8) +mov_sat r5.xyzw, r5.xyzw +mad r9.xyz, r5.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r9.xyz, r9.xyzx +imad r1.y, r9.y, l(256), r9.x +ishl r1.z, r9.z, l(24) +imad r1.y, r1.y, l(256), r1.z +iadd r4.y, r0.y, r1.y +store_uav_typed U0[0].xyzw, r8.xxxx, r4.xyzw +mov_sat r5.xyz, r6.xyzx +mad r4.xyzw, r5.wxyz, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov_sat r7.x, r6.w +mad r1.yz, r7.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) +ftou r1.yz, r1.yyzy +imad r0.y, r1.z, l(256), r1.y +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r1.y, r0.x, l(4) +else + mov r1.y, r0.x +endif +if_z r2.z + ld_raw r5.xyzw, r1.y, T0[0].xyzw + iadd r6.xy, r1.yyyy, l(16, 32, 0, 0) + ld_raw r7.xyzw, r6.x, T0[0].xyzw + ld_raw r1.z, r6.y, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(255, 255, 255, 255) + utof r6.xyzw, r6.xyzw + mul r7.xyzw, r6.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r5.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r6.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + utof r6.xyzw, r6.xyzw + mul r7.xyzw, r6.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r1.z, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r1.z, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r6.xyzw, r5.xyzw, r2.wwww + and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r12.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r11.xyzw, r10.xyzw, r6.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r10.xyzw, r6.xyzw + movc r5.xyzw, r9.xyzw, r6.xyzw, l(0,0,0,0) + ushr r6.xyzw, r7.xyzw, r2.wwww + and r9.xyzw, r6.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r6.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r6.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r6.xyzw, l(7, 7, 7, 7), r12.xyzw, r6.xyzw, l(0, 0, 0, 0) + and r6.xyzw, r6.xyzw, l(127, 127, 127, 127) + movc r6.xyzw, r11.xyzw, r10.xyzw, r6.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r6.xyzw, r6.xyzw, l(16, 16, 16, 16) + iadd r6.xyzw, r10.xyzw, r6.xyzw + movc r7.xyzw, r9.xyzw, r6.xyzw, l(0,0,0,0) + ushr r2.w, r1.z, r2.w + and r6.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r6.z, l(3), l(7), r2.w + firstbit_hi r6.w, r6.y + iadd r6.w, r6.w, l(-24) + movc r6.w, r6.y, r6.w, l(8) + iadd r8.x, -r6.w, l(1) + movc r8.x, r6.z, r6.z, r8.x + bfi r2.w, l(7), r6.w, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r6.z, r6.y, r2.w + ishl r6.y, r8.x, l(23) + iadd r6.y, r6.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r6.y, r2.w + movc r1.z, r6.x, r2.w, l(0) + break + case l(4) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +else + ld_raw r5.x, r1.y, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(8, 16, 24, 32) + ld_raw r5.y, r6.x, T0[0].xxxx + ld_raw r5.z, r6.y, T0[0].xxxx + ld_raw r5.w, r6.z, T0[0].xxxx + ld_raw r7.x, r6.w, T0[0].xxxx + iadd r6.xyzw, r1.yyyy, l(40, 48, 56, 64) + ld_raw r7.y, r6.x, T0[0].xxxx + ld_raw r7.z, r6.y, T0[0].xxxx + ld_raw r7.w, r6.z, T0[0].xxxx + ld_raw r1.z, r6.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r6.xyzw, r6.xyzw + mul r6.xyzw, r6.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r6.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r1.z + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r1.z, r2.w, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch +endif +if_nz r3.y + mul r2.w, r3.x, l(0.500000) + ishl r6.x, l(2880), r3.z + iadd r6.x, r1.y, r6.x + if_z r2.z + ld_raw r9.xyzw, r6.x, T0[0].xyzw + iadd r6.yz, r6.xxxx, l(0, 16, 32, 0) + ld_raw r10.xyzw, r6.y, T0[0].xyzw + ld_raw r6.y, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r6.z, r6.y, r6.z + and r11.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r8.x, r11.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r11.y, r8.x, l(8) + iadd r11.z, -r8.x, l(1) + movc r11.z, r6.w, r6.w, r11.z + bfi r6.z, l(7), r8.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r11.y, r6.z + ishl r6.w, r11.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.y, r11.x, r6.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + else + ld_raw r9.x, r6.x, T0[0].xxxx + iadd r11.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r6.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r6.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r6.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r6.y, r6.y + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r9.xyzw + add r7.xyzw, r7.xyzw, r10.xyzw + add r1.z, r1.z, r6.y + uge r6.x, r2.y, l(6) + if_nz r6.x + mul r2.w, r3.x, l(0.250000) + ishl r6.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r6.xy, r1.yyyy, r6.xyxx + if_z r2.z + ld_raw r9.xyzw, r6.x, T0[0].xyzw + iadd r6.zw, r6.xxxx, l(0, 0, 16, 32) + ld_raw r10.xyzw, r6.z, T0[0].xyzw + ld_raw r1.y, r6.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r1.y, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r1.y, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r11.xyzw, r9.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r6.zzzz + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r6.z, r1.y, r6.z + and r11.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r8.x, r11.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r11.y, r8.x, l(8) + iadd r11.z, -r8.x, l(1) + movc r11.z, r6.w, r6.w, r11.z + bfi r6.z, l(7), r8.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r11.y, r6.z + ishl r6.w, r11.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r1.y, r11.x, r6.z, l(0) + break + case l(4) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r1.y + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r1.y, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + else + ld_raw r9.x, r6.x, T0[0].xxxx + iadd r11.xyzw, r6.xxxx, l(8, 16, 24, 32) + ld_raw r9.y, r11.x, T0[0].xxxx + ld_raw r9.z, r11.y, T0[0].xxxx + ld_raw r9.w, r11.z, T0[0].xxxx + ld_raw r10.x, r11.w, T0[0].xxxx + iadd r11.xyzw, r6.xxxx, l(40, 48, 56, 64) + ld_raw r10.y, r11.x, T0[0].xxxx + ld_raw r10.z, r11.y, T0[0].xxxx + ld_raw r10.w, r11.z, T0[0].xxxx + ld_raw r1.y, r11.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.x, l(16), l(0), r1.y + itof r6.x, r6.x + mul r6.x, r6.x, l(0.000977) + max r1.y, r6.x, l(-1.000000) + break + case l(7) + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r1.y, r1.y + break + default + break + endswitch + endif + add r9.xyzw, r5.xyzw, r9.xyzw + add r10.xyzw, r7.xyzw, r10.xyzw + add r1.y, r1.y, r1.z + if_z r2.z + ld_raw r11.xyzw, r6.y, T0[0].xyzw + iadd r6.xz, r6.yyyy, l(16, 0, 32, 0) + ld_raw r12.xyzw, r6.x, T0[0].xyzw + ld_raw r6.x, r6.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r6.z, r1.w, l(16), l(0) + ushr r13.xyzw, r11.xyzw, r6.zzzz + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r13.xyzw, r12.xyzw, r6.zzzz + and r13.xyzw, r13.xyzw, l(255, 255, 255, 255) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(255) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.003922) + break + case l(2) + case l(10) + movc r6.z, r1.w, l(20), l(0) + ushr r13.xyzw, r11.xyzw, r6.zzzz + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + utof r13.xyzw, r13.xyzw + mul r11.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r13.xyzw, r12.xyzw, r6.zzzz + and r13.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + utof r13.xyzw, r13.xyzw + mul r12.xyzw, r13.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r6.z, r6.x, r6.z + and r6.z, r6.z, l(1023) + utof r6.z, r6.z + mul r6.x, r6.z, l(0.000978) + break + case l(3) + case l(12) + movc r6.z, r1.w, l(20), l(0) + ushr r13.xyzw, r11.xyzw, r6.zzzz + and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) + ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw + firstbit_hi r17.xyzw, r15.xyzw + iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) + movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) + iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) + movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw + bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) + and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) + movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw + ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) + iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + iadd r13.xyzw, r15.xyzw, r13.xyzw + movc r11.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) + ushr r13.xyzw, r12.xyzw, r6.zzzz + and r14.xyzw, r13.xyzw, l(1023, 1023, 1023, 1023) + and r15.xyzw, r13.xyzw, l(127, 127, 127, 127) + ubfe r16.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r13.xyzw + firstbit_hi r17.xyzw, r15.xyzw + iadd r17.xyzw, r17.xyzw, l(-24, -24, -24, -24) + movc r17.xyzw, r15.xyzw, r17.xyzw, l(8,8,8,8) + iadd r18.xyzw, -r17.xyzw, l(1, 1, 1, 1) + movc r18.xyzw, r16.xyzw, r16.xyzw, r18.xyzw + bfi r13.xyzw, l(7, 7, 7, 7), r17.xyzw, r13.xyzw, l(0, 0, 0, 0) + and r13.xyzw, r13.xyzw, l(127, 127, 127, 127) + movc r13.xyzw, r16.xyzw, r15.xyzw, r13.xyzw + ishl r15.xyzw, r18.xyzw, l(23, 23, 23, 23) + iadd r15.xyzw, r15.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r13.xyzw, r13.xyzw, l(16, 16, 16, 16) + iadd r13.xyzw, r15.xyzw, r13.xyzw + movc r12.xyzw, r14.xyzw, r13.xyzw, l(0,0,0,0) + ushr r6.z, r6.x, r6.z + and r13.xy, r6.zzzz, l(1023, 127, 0, 0) + ubfe r6.w, l(3), l(7), r6.z + firstbit_hi r8.x, r13.y + iadd r8.x, r8.x, l(-24) + movc r8.x, r13.y, r8.x, l(8) + iadd r13.z, -r8.x, l(1) + movc r13.z, r6.w, r6.w, r13.z + bfi r6.z, l(7), r8.x, r6.z, l(0) + and r6.z, r6.z, l(127) + movc r6.z, r6.w, r13.y, r6.z + ishl r6.w, r13.z, l(23) + iadd r6.w, r6.w, l(0x3e000000) + ishl r6.z, r6.z, l(16) + iadd r6.z, r6.w, r6.z + movc r6.x, r13.x, r6.z, l(0) + break + case l(4) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.z, l(16), l(0), r6.x + itof r6.z, r6.z + mul r6.z, r6.z, l(0.000977) + max r6.x, r6.z, l(-1.000000) + break + case l(6) + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r12.xyzw, r12.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + else + ld_raw r11.x, r6.y, T0[0].xxxx + iadd r13.xyzw, r6.yyyy, l(8, 16, 24, 32) + ld_raw r11.y, r13.x, T0[0].xxxx + ld_raw r11.z, r13.y, T0[0].xxxx + ld_raw r11.w, r13.z, T0[0].xxxx + ld_raw r12.x, r13.w, T0[0].xxxx + iadd r13.xyzw, r6.yyyy, l(40, 48, 56, 64) + ld_raw r12.y, r13.x, T0[0].xxxx + ld_raw r12.z, r13.y, T0[0].xxxx + ld_raw r12.w, r13.z, T0[0].xxxx + ld_raw r6.x, r13.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r13.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw + itof r13.xyzw, r13.xyzw + mul r13.xyzw, r13.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r12.xyzw, r13.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r6.y, l(16), l(0), r6.x + itof r6.y, r6.y + mul r6.y, r6.y, l(0.000977) + max r6.x, r6.y, l(-1.000000) + break + case l(7) + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r12.xyzw, r12.xyzw + f16tof32 r6.x, r6.x + break + default + break + endswitch + endif + add r5.xyzw, r9.xyzw, r11.xyzw + add r7.xyzw, r10.xyzw, r12.xyzw + add r1.z, r1.y, r6.x + endif +else + mov r2.w, r3.x +endif +mul r5.xyzw, r2.wwww, r5.xwyz +mul r6.xyzw, r2.wwww, r7.xyzw +mul_sat r7.z, r1.z, r2.w +if_nz r0.w + mov r9.x, r5.y + mov r9.y, r6.x + mov r5.x, r6.y +else + mov r9.xy, r5.xzxx + mov r5.x, r5.w +endif +mov_sat r9.xy, r9.xyxx +mad r1.yz, r9.xxyx, l(0.000000, 255.000000, 255.000000, 0.000000), l(0.000000, 0.500000, 0.500000, 0.000000) +ftou r1.yz, r1.yyzy +ishl r1.z, r1.z, l(24) +imad r1.y, r1.y, l(0x00010000), r1.z +iadd r4.y, r0.y, r1.y +store_uav_typed U0[0].xyzw, r8.yyyy, r4.xyzw +mov r5.zw, r6.xxxy +mov_sat r5.xyzw, r5.xyzw +mad r4.xyzw, r5.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r4.xyzw, r4.xyzw +imad r0.y, r4.y, l(256), r4.x +imad r0.y, r4.z, l(0x00010000), r0.y +imad r4.xzw, r4.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.yyyy +mov_sat r7.xy, r6.zwzz +mad r5.xyz, r7.xyzx, l(255.000000, 255.000000, 255.000000, 0.000000), l(0.500000, 0.500000, 0.500000, 0.000000) +ftou r5.xyz, r5.xyzx +imad r0.y, r5.y, l(256), r5.x +imad r0.y, r5.z, l(0x00010000), r0.y +iadd r0.x, r0.z, r0.x +if_nz r2.x + iadd r0.x, r0.x, l(4) +endif +if_z r2.z + ld_raw r5.xyzw, r0.x, T0[0].xyzw + iadd r1.yz, r0.xxxx, l(0, 16, 32, 0) + ld_raw r6.xyzw, r1.y, T0[0].xyzw + ld_raw r0.z, r1.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r1.y, r1.w, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.y, r0.z, r1.y + and r1.y, r1.y, l(255) + utof r1.y, r1.y + mul r0.z, r1.y, l(0.003922) + break + case l(2) + case l(10) + movc r1.y, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r1.y, r0.z, r1.y + and r1.y, r1.y, l(1023) + utof r1.y, r1.y + mul r0.z, r1.y, l(0.000978) + break + case l(3) + case l(12) + movc r1.y, r1.w, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r1.yyyy + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r5.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r1.yyyy + and r9.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r10.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r11.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r12.xyzw, r10.xyzw + iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) + movc r12.xyzw, r10.xyzw, r12.xyzw, l(8,8,8,8) + iadd r13.xyzw, -r12.xyzw, l(1, 1, 1, 1) + movc r13.xyzw, r11.xyzw, r11.xyzw, r13.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r12.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r11.xyzw, r10.xyzw, r7.xyzw + ishl r10.xyzw, r13.xyzw, l(23, 23, 23, 23) + iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r10.xyzw, r7.xyzw + movc r6.xyzw, r9.xyzw, r7.xyzw, l(0,0,0,0) + ushr r1.y, r0.z, r1.y + and r2.xw, r1.yyyy, l(1023, 0, 0, 127) + ubfe r1.z, l(3), l(7), r1.y + firstbit_hi r7.x, r2.w + iadd r7.x, r7.x, l(-24) + movc r7.x, r2.w, r7.x, l(8) + iadd r7.y, -r7.x, l(1) + movc r7.y, r1.z, r1.z, r7.y + bfi r1.y, l(7), r7.x, r1.y, l(0) + and r1.y, r1.y, l(127) + movc r1.y, r1.z, r2.w, r1.y + ishl r1.z, r7.y, l(23) + iadd r1.z, r1.z, l(0x3e000000) + ishl r1.y, r1.y, l(16) + iadd r1.y, r1.z, r1.y + movc r0.z, r2.x, r1.y, l(0) + break + case l(4) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.y, l(16), l(0), r0.z + itof r1.y, r1.y + mul r1.y, r1.y, l(0.000977) + max r0.z, r1.y, l(-1.000000) + break + case l(6) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r0.z, r0.z + break + default + break + endswitch +else + ld_raw r5.x, r0.x, T0[0].xxxx + iadd r7.xyzw, r0.xxxx, l(8, 16, 24, 32) + ld_raw r5.y, r7.x, T0[0].xxxx + ld_raw r5.z, r7.y, T0[0].xxxx + ld_raw r5.w, r7.z, T0[0].xxxx + ld_raw r6.x, r7.w, T0[0].xxxx + iadd r7.xyzw, r0.xxxx, l(40, 48, 56, 64) + ld_raw r6.y, r7.x, T0[0].xxxx + ld_raw r6.z, r7.y, T0[0].xxxx + ld_raw r6.w, r7.z, T0[0].xxxx + ld_raw r0.z, r7.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.y, l(16), l(0), r0.z + itof r1.y, r1.y + mul r1.y, r1.y, l(0.000977) + max r0.z, r1.y, l(-1.000000) + break + case l(7) + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw + f16tof32 r0.z, r0.z + break + default + break + endswitch +endif +if_nz r3.y + mul r1.y, r3.x, l(0.500000) + ishl r1.z, l(2880), r3.z + iadd r1.z, r0.x, r1.z + if_z r2.z + ld_raw r7.xyzw, r1.z, T0[0].xyzw + iadd r2.xw, r1.zzzz, l(16, 0, 0, 32) + ld_raw r9.xyzw, r2.x, T0[0].xyzw + ld_raw r2.x, r2.w, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.w, r1.w, l(16), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(255) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.003922) + break + case l(2) + case l(10) + movc r2.w, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.w, r2.x, r2.w + and r2.w, r2.w, l(1023) + utof r2.w, r2.w + mul r2.x, r2.w, l(0.000978) + break + case l(3) + case l(12) + movc r2.w, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r2.wwww + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r2.wwww + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r2.w, r2.x, r2.w + and r8.xy, r2.wwww, l(1023, 127, 0, 0) + ubfe r3.y, l(3), l(7), r2.w + firstbit_hi r10.x, r8.y + iadd r10.x, r10.x, l(-24) + movc r10.x, r8.y, r10.x, l(8) + iadd r10.y, -r10.x, l(1) + movc r10.y, r3.y, r3.y, r10.y + bfi r2.w, l(7), r10.x, r2.w, l(0) + and r2.w, r2.w, l(127) + movc r2.w, r3.y, r8.y, r2.w + ishl r3.y, r10.y, l(23) + iadd r3.y, r3.y, l(0x3e000000) + ishl r2.w, r2.w, l(16) + iadd r2.w, r3.y, r2.w + movc r2.x, r8.x, r2.w, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.w, l(16), l(0), r2.x + itof r2.w, r2.w + mul r2.w, r2.w, l(0.000977) + max r2.x, r2.w, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch + else + ld_raw r7.x, r1.z, T0[0].xxxx + iadd r10.xyzw, r1.zzzz, l(8, 16, 24, 32) + ld_raw r7.y, r10.x, T0[0].xxxx + ld_raw r7.z, r10.y, T0[0].xxxx + ld_raw r7.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r1.zzzz, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r2.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r2.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r2.x, r1.z, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r2.x, r2.x + break + default + break + endswitch + endif + add r5.xyzw, r5.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r9.xyzw + add r0.z, r0.z, r2.x + uge r1.z, r2.y, l(6) + if_nz r1.z + mul r3.x, r3.x, l(0.250000) + ishl r2.xy, l(36, 2916, 0, 0), r3.zzzz + iadd r2.xy, r0.xxxx, r2.xyxx + if_z r2.z + ld_raw r7.xyzw, r2.x, T0[0].xyzw + iadd r3.yz, r2.xxxx, l(0, 16, 32, 0) + ld_raw r9.xyzw, r3.y, T0[0].xyzw + ld_raw r0.x, r3.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r1.z, r1.w, l(16), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(255, 255, 255, 255) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r1.z, r0.x, r1.z + and r1.z, r1.z, l(255) + utof r1.z, r1.z + mul r0.x, r1.z, l(0.003922) + break + case l(2) + case l(10) + movc r1.z, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r7.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r10.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + utof r10.xyzw, r10.xyzw + mul r9.xyzw, r10.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r1.z, r0.x, r1.z + and r1.z, r1.z, l(1023) + utof r1.z, r1.z + mul r0.x, r1.z, l(0.000978) + break + case l(3) + case l(12) + movc r1.z, r1.w, l(20), l(0) + ushr r10.xyzw, r7.xyzw, r1.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r7.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r10.xyzw, r9.xyzw, r1.zzzz + and r11.xyzw, r10.xyzw, l(1023, 1023, 1023, 1023) + and r12.xyzw, r10.xyzw, l(127, 127, 127, 127) + ubfe r13.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r10.xyzw + firstbit_hi r14.xyzw, r12.xyzw + iadd r14.xyzw, r14.xyzw, l(-24, -24, -24, -24) + movc r14.xyzw, r12.xyzw, r14.xyzw, l(8,8,8,8) + iadd r15.xyzw, -r14.xyzw, l(1, 1, 1, 1) + movc r15.xyzw, r13.xyzw, r13.xyzw, r15.xyzw + bfi r10.xyzw, l(7, 7, 7, 7), r14.xyzw, r10.xyzw, l(0, 0, 0, 0) + and r10.xyzw, r10.xyzw, l(127, 127, 127, 127) + movc r10.xyzw, r13.xyzw, r12.xyzw, r10.xyzw + ishl r12.xyzw, r15.xyzw, l(23, 23, 23, 23) + iadd r12.xyzw, r12.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r10.xyzw, r10.xyzw, l(16, 16, 16, 16) + iadd r10.xyzw, r12.xyzw, r10.xyzw + movc r9.xyzw, r11.xyzw, r10.xyzw, l(0,0,0,0) + ushr r1.z, r0.x, r1.z + and r3.yz, r1.zzzz, l(0, 1023, 127, 0) + ubfe r2.w, l(3), l(7), r1.z + firstbit_hi r8.x, r3.z + iadd r8.x, r8.x, l(-24) + movc r8.x, r3.z, r8.x, l(8) + iadd r8.y, -r8.x, l(1) + movc r8.y, r2.w, r2.w, r8.y + bfi r1.z, l(7), r8.x, r1.z, l(0) + and r1.z, r1.z, l(127) + movc r1.z, r2.w, r3.z, r1.z + ishl r2.w, r8.y, l(23) + iadd r2.w, r2.w, l(0x3e000000) + ishl r1.z, r1.z, l(16) + iadd r1.z, r2.w, r1.z + movc r0.x, r3.y, r1.z, l(0) + break + case l(4) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r0.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r0.x, r1.z, l(-1.000000) + break + case l(6) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.x, r0.x + break + default + break + endswitch + else + ld_raw r7.x, r2.x, T0[0].xxxx + iadd r10.xyzw, r2.xxxx, l(8, 16, 24, 32) + ld_raw r7.y, r10.x, T0[0].xxxx + ld_raw r7.z, r10.y, T0[0].xxxx + ld_raw r7.w, r10.z, T0[0].xxxx + ld_raw r9.x, r10.w, T0[0].xxxx + iadd r10.xyzw, r2.xxxx, l(40, 48, 56, 64) + ld_raw r9.y, r10.x, T0[0].xxxx + ld_raw r9.z, r10.y, T0[0].xxxx + ld_raw r9.w, r10.z, T0[0].xxxx + ld_raw r0.x, r10.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r10.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r10.xyzw, r10.xyzw + mul r10.xyzw, r10.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r10.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.z, l(16), l(0), r0.x + itof r1.z, r1.z + mul r1.z, r1.z, l(0.000977) + max r0.x, r1.z, l(-1.000000) + break + case l(7) + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r0.x, r0.x + break + default + break + endswitch + endif + add r7.xyzw, r5.xyzw, r7.xyzw + add r9.xyzw, r6.xyzw, r9.xyzw + add r0.x, r0.x, r0.z + if_z r2.z + ld_raw r10.xyzw, r2.y, T0[0].xyzw + iadd r2.xz, r2.yyyy, l(16, 0, 32, 0) + ld_raw r11.xyzw, r2.x, T0[0].xyzw + ld_raw r1.z, r2.z, T0[0].xxxx + switch r3.w + case l(0) + case l(1) + movc r2.x, r1.w, l(16), l(0) + ushr r12.xyzw, r10.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r12.xyzw, r11.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(255, 255, 255, 255) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r2.x, r1.z, r2.x + and r2.x, r2.x, l(255) + utof r2.x, r2.x + mul r1.z, r2.x, l(0.003922) + break + case l(2) + case l(10) + movc r2.x, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r10.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r12.xyzw, r11.xyzw, r2.xxxx + and r12.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + utof r12.xyzw, r12.xyzw + mul r11.xyzw, r12.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r2.x, r1.z, r2.x + and r2.x, r2.x, l(1023) + utof r2.x, r2.x + mul r1.z, r2.x, l(0.000978) + break + case l(3) + case l(12) + movc r1.w, r1.w, l(20), l(0) + ushr r12.xyzw, r10.xyzw, r1.wwww + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r10.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r12.xyzw, r11.xyzw, r1.wwww + and r13.xyzw, r12.xyzw, l(1023, 1023, 1023, 1023) + and r14.xyzw, r12.xyzw, l(127, 127, 127, 127) + ubfe r15.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r12.xyzw + firstbit_hi r16.xyzw, r14.xyzw + iadd r16.xyzw, r16.xyzw, l(-24, -24, -24, -24) + movc r16.xyzw, r14.xyzw, r16.xyzw, l(8,8,8,8) + iadd r17.xyzw, -r16.xyzw, l(1, 1, 1, 1) + movc r17.xyzw, r15.xyzw, r15.xyzw, r17.xyzw + bfi r12.xyzw, l(7, 7, 7, 7), r16.xyzw, r12.xyzw, l(0, 0, 0, 0) + and r12.xyzw, r12.xyzw, l(127, 127, 127, 127) + movc r12.xyzw, r15.xyzw, r14.xyzw, r12.xyzw + ishl r14.xyzw, r17.xyzw, l(23, 23, 23, 23) + iadd r14.xyzw, r14.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r12.xyzw, r12.xyzw, l(16, 16, 16, 16) + iadd r12.xyzw, r14.xyzw, r12.xyzw + movc r11.xyzw, r13.xyzw, r12.xyzw, l(0,0,0,0) + ushr r1.w, r1.z, r1.w + and r2.xz, r1.wwww, l(1023, 0, 127, 0) + ubfe r2.w, l(3), l(7), r1.w + firstbit_hi r3.y, r2.z + iadd r3.y, r3.y, l(-24) + movc r3.y, r2.z, r3.y, l(8) + iadd r3.z, -r3.y, l(1) + movc r3.z, r2.w, r2.w, r3.z + bfi r1.w, l(7), r3.y, r1.w, l(0) + and r1.w, r1.w, l(127) + movc r1.w, r2.w, r2.z, r1.w + ishl r2.z, r3.z, l(23) + iadd r2.z, r2.z, l(0x3e000000) + ishl r1.w, r1.w, l(16) + iadd r1.w, r2.z, r1.w + movc r1.z, r2.x, r1.w, l(0) + break + case l(4) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r12.xyzw, r12.xyzw + mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.w, l(16), l(0), r1.z + itof r1.w, r1.w + mul r1.w, r1.w, l(0.000977) + max r1.z, r1.w, l(-1.000000) + break + case l(6) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch + else + ld_raw r10.x, r2.y, T0[0].xxxx + iadd r12.xyzw, r2.yyyy, l(8, 16, 24, 32) + ld_raw r10.y, r12.x, T0[0].xxxx + ld_raw r10.z, r12.y, T0[0].xxxx + ld_raw r10.w, r12.z, T0[0].xxxx + ld_raw r11.x, r12.w, T0[0].xxxx + iadd r2.xyzw, r2.yyyy, l(40, 48, 56, 64) + ld_raw r11.y, r2.x, T0[0].xxxx + ld_raw r11.z, r2.y, T0[0].xxxx + ld_raw r11.w, r2.z, T0[0].xxxx + ld_raw r1.z, r2.w, T0[0].xxxx + switch r3.w + case l(5) + ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r2.xyzw, r2.xyzw + mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r2.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw + itof r2.xyzw, r2.xyzw + mul r2.xyzw, r2.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r11.xyzw, r2.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r1.w, l(16), l(0), r1.z + itof r1.w, r1.w + mul r1.w, r1.w, l(0.000977) + max r1.z, r1.w, l(-1.000000) + break + case l(7) + f16tof32 r10.xyzw, r10.xyzw + f16tof32 r11.xyzw, r11.xyzw + f16tof32 r1.z, r1.z + break + default + break + endswitch + endif + add r5.xyzw, r7.xyzw, r10.xyzw + add r6.xyzw, r9.xyzw, r11.xyzw + add r0.z, r0.x, r1.z + else + mov r3.x, r1.y + endif +endif +mul r2.xyzw, r3.xxxx, r5.yzxw +mul r5.xyzw, r3.xxxx, r6.xyzw +mul_sat r3.w, r0.z, r3.x +if_nz r0.w + mov r2.xz, r5.yyxy + mov r0.x, r2.w +else + mov r0.x, r2.z + mov r2.xz, r2.yyxy +endif +mov_sat r0.x, r0.x +mad r0.x, r0.x, l(255.000000), l(0.500000) +ftou r0.x, r0.x +imad r4.y, r0.x, l(0x01000000), r0.y +store_uav_typed U0[0].xyzw, r8.zzzz, r4.xyzw +mov r2.y, r5.x +mov_sat r2.xyzw, r2.xyzw +mad r0.xyzw, r2.zxwy, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r0.xyzw, r0.xyzw +imad r0.x, r0.y, l(256), r0.x +imad r0.x, r0.z, l(0x00010000), r0.x +imad r0.xzw, r0.wwww, l(0x01000000, 0, 0x01000000, 0x01000000), r0.xxxx +mov_sat r3.xyz, r5.yzwy +mad r2.xyzw, r3.xyzw, l(255.000000, 255.000000, 255.000000, 255.000000), l(0.500000, 0.500000, 0.500000, 0.500000) +ftou r2.xyzw, r2.xyzw +imad r1.y, r2.y, l(256), r2.x +imad r1.y, r2.z, l(0x00010000), r1.y +imad r0.y, r2.w, l(0x01000000), r1.y +store_uav_typed U0[0].xyzw, r8.wwww, r0.xyzw +ret +// Approximately 5348 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.cso index 4f49bf8893873083855224de48bc2fd46794eebb..87f1ed847a73719511a6c923272b048229c62652 100644 GIT binary patch literal 19628 zcmeI4PmEnv9mnrG(m61OHU3??p&3*yqaAS{T9EZmq-zn^pO_s;K~zBip22NIJx$$97A z-}(Lj{m!}P_wKwo{M5liNB(rje_ojQ*N?yP-dk_}=JpSs95hYy+oMf0sqqWyZ>6UB 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zPx%3^*jWAGJ<{OEKr`*faQ}E>il$qzuiw|Qx%WT6Dv5pbTEh?GbyBL&zx4T+{zlKs kiyQkYxX-Eoy}Itt__r9vZ@j(SprHR9^}`K(JFnRAb08W~V*mgE diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h index 598100d9c..aa4e8f0f0 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: resolve_full_8bpp.cs.hlsl const uint8_t resolve_full_8bpp_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x93, 0x8B, 0xDD, 0xC6, 0xC1, 0x38, 0x76, 0x91, - 0xFE, 0x9C, 0x92, 0xB0, 0x09, 0x72, 0xD2, 0xD3, 0x01, 0x00, 0x00, 0x00, - 0xDC, 0x5C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x46, 0xC9, 0x1C, 0xFB, 0x6D, 0x03, 0xF1, 0x8D, + 0x57, 0xEC, 0xC8, 0xB4, 0xAA, 0x19, 0xFE, 0x55, 0x01, 0x00, 0x00, 0x00, + 0xAC, 0x4C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0xC8, 0x02, 0x00, 0x00, 0xD8, 0x02, 0x00, 0x00, 0xE8, 0x02, 0x00, 0x00, - 0x40, 0x5C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, + 0x10, 0x4C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x8C, 0x02, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xEC, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -63,8 +63,8 @@ const uint8_t resolve_full_8bpp_cs[] = { 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x53, 0x48, 0x45, 0x58, 0x50, 0x59, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, - 0x54, 0x16, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, + 0x53, 0x48, 0x45, 0x58, 0x20, 0x49, 0x00, 0x00, 0x51, 0x00, 0x05, 0x00, + 0x48, 0x12, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA1, 0x00, 0x00, 0x06, 0x46, 0x7E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -72,7 +72,7 @@ const uint8_t resolve_full_8bpp_cs[] = { 0x9C, 0x08, 0x00, 0x07, 0x46, 0xEE, 0x31, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x5F, 0x00, 0x00, 0x02, 0x32, 0x00, 0x02, 0x00, - 0x68, 0x00, 0x00, 0x02, 0x10, 0x00, 0x00, 0x00, 0x9B, 0x00, 0x00, 0x04, + 0x68, 0x00, 0x00, 0x02, 0x11, 0x00, 0x00, 0x00, 0x9B, 0x00, 0x00, 0x04, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x0B, 0x12, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, @@ -140,1415 +140,775 @@ const uint8_t resolve_full_8bpp_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x46, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x08, - 0x82, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, - 0x0A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, - 0x50, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, + 0x46, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x4E, 0x00, 0x00, 0x0B, + 0x32, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0xD0, 0x00, 0x00, + 0x46, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, 0x82, 0x00, 0x10, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x2A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x01, 0x40, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x07, 0x82, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, + 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, + 0x05, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x07, + 0x82, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x3A, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x23, 0x00, 0x00, 0x0D, 0x32, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, + 0x46, 0x00, 0x10, 0x80, 0x41, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, + 0x02, 0x40, 0x00, 0x00, 0x50, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x00, 0x10, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x23, 0x00, 0x00, 0x09, 0x12, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x02, 0x00, 0x00, 0x00, - 0x01, 0x40, 0x00, 0x00, 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0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, - 0xFF, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, - 0x56, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x81, 0x80, 0x80, 0x3B, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, + 0xFF, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, + 0x56, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x81, 0x80, 0x80, 0x3B, 0x81, 0x80, 0x80, 0x3B, 0x81, 0x80, 0x80, 0x3B, 0x81, 0x80, 0x80, 0x3B, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, @@ -1556,25 +916,25 @@ const uint8_t resolve_full_8bpp_cs[] = { 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, - 0x56, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x20, 0x80, 0x3A, + 0x56, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, - 0x55, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, + 0x55, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x08, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, 0x08, 0x20, 0x80, 0x3A, 0x02, 0x00, 0x00, 0x01, 0x06, 0x00, 0x00, 0x03, 0x01, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, @@ -1582,27 +942,27 @@ const uint8_t resolve_full_8bpp_cs[] = { 0x37, 0x00, 0x00, 0x09, 0x22, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1A, 0x00, 0x10, 0x00, 0x03, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x01, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x55, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0F, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, + 0x55, 0x00, 0x00, 0x07, 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x07, 0x00, 0x00, 0x00, 0x56, 0x05, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0xFF, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x8A, 0x00, 0x00, 0x0F, 0xF2, 0x00, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, - 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x87, 0x00, 0x00, 0x05, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0x37, 0x00, 0x00, 0x0C, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0B, 0xF2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, @@ -1612,55 +972,55 @@ const uint8_t resolve_full_8bpp_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x11, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x37, 0x00, 0x00, 0x09, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, - 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x29, 0x00, 0x00, 0x0A, + 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, - 0x1E, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0x1E, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x00, 0x3E, 0x29, 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0xE8, 0xFF, 0xFF, 0xFF, 0xE8, 0xFF, 0xFF, 0xFF, 0x37, 0x00, 0x00, 0x0C, 0xF2, 0x00, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, - 0x46, 0x0E, 0x10, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, + 0x46, 0x0E, 0x10, 0x00, 0x0B, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x1E, 0x00, 0x00, 0x0B, 0xF2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, @@ -1670,316 +1030,611 @@ const uint8_t resolve_full_8bpp_cs[] = { 0xF2, 0x00, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x8C, 0x00, 0x00, 0x11, - 0xF2, 0x00, 0x10, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, + 0xF2, 0x00, 0x10, 0x00, 0x09, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00, 0x07, 0x00, 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0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, 0x00, + 0x2D, 0x00, 0x00, 0x00, 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, }; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt index ee5ed8d83..6fbb7ef25 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/resolve_full_8bpp_cs.txt @@ -43,7 +43,7 @@ dcl_constantbuffer CB0[0:0][2], immediateIndexed, space=0 dcl_resource_raw T0[0:0], space=0 dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 dcl_input vThreadID.xy -dcl_temps 16 +dcl_temps 17 dcl_thread_group 8, 8, 1 ubfe r0.x, l(11), l(7), CB0[0][0].y uge r0.x, vThreadID.x, r0.x @@ -75,684 +75,530 @@ ishl r2.xy, r2.xyxx, r2.zwzz ushr r5.x, r5.y, l(1) and r5.xy, r5.xyxx, l(1, 1, 0, 0) iadd r2.xy, r2.xyxx, r5.xyxx -udiv r1.w, null, r2.x, l(80) -ushr r2.w, r2.y, l(4) -movc r4.y, r4.z, l(1), l(0) -ishl r5.x, r1.w, r4.y -imad r5.x, r2.w, r3.x, r5.x -iadd r4.x, r4.x, r5.x -ineg r5.x, r1.w -ineg r5.y, r2.w -imad r2.xy, r5.xyxx, l(80, 16, 0, 0), r2.xyxx -imad r1.w, r2.y, l(80), r2.x -ishl r1.w, r1.w, r4.y -imad r1.w, r4.x, l(1280), r1.w +udiv r5.xy, null, r2.xyxx, l(80, 16, 0, 0) +movc r1.w, r4.z, l(1), l(0) +ishl r2.w, r5.x, r1.w +imad r2.w, r5.y, r3.x, r2.w +iadd r2.w, r2.w, r4.x +imad r2.xy, -r5.xyxx, l(80, 16, 0, 0), r2.xyxx +imad r2.x, r2.y, l(80), r2.x +ishl r1.w, r2.x, r1.w +imad r1.w, r2.w, l(1280), r1.w iadd r2.x, r2.z, r4.z ishl r2.y, l(4), r2.x ishl r1.w, r1.w, l(2) +ine r2.z, r3.y, l(0) +ine r2.w, r4.z, l(0) +and r2.z, r2.z, r2.w +if_nz r2.z + iadd r1.w, r1.w, l(4) +endif +ieq r2.z, r2.y, l(4) +if_nz r2.z + ld_raw r5.xyzw, r1.w, T0[0].xyzw + iadd r2.w, r1.w, l(16) + ld_raw r6.xyzw, r2.w, T0[0].xyzw +else + ld_raw r5.x, r1.w, T0[0].xxxx + iadd r2.w, r2.y, r1.w + ld_raw r5.y, r2.w, T0[0].xxxx + ishl r7.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r7.xyzw, r1.wwww, r7.xyzw + ld_raw r5.z, r7.x, T0[0].xxxx + ld_raw r5.w, r7.y, T0[0].xxxx + ld_raw r6.x, r7.z, T0[0].xxxx + ld_raw r6.y, r7.w, T0[0].xxxx + ishl r4.xy, l(24, 28, 0, 0), r2.xxxx + iadd r4.xy, r1.wwww, r4.xyxx + ld_raw r6.z, r4.x, T0[0].xxxx + ld_raw r6.w, r4.y, T0[0].xxxx +endif if_nz r4.z - ieq r2.z, r2.y, l(8) - if_nz r2.z - ld_raw r5.xyzw, r1.w, T0[0].ywxz - iadd r2.z, r1.w, l(16) - ld_raw r6.xyzw, r2.z, T0[0].xyzw - iadd r2.zw, r1.wwww, l(0, 0, 32, 48) - ld_raw r7.xyzw, r2.z, T0[0].ywxz - ld_raw r8.xyzw, r2.w, T0[0].xyzw - mov r11.xy, r5.zwzz - mov r11.zw, r6.xxxz - mov r5.zw, r6.yyyw - mov r6.xy, r7.zwzz - mov r6.zw, r8.xxxz - mov r7.zw, r8.yyyw - else - ld_raw r5.xz, r1.w, T0[0].yxxx - iadd r2.z, r2.y, r1.w - ld_raw r5.yw, r2.z, T0[0].xyxx - ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r9.xyzw, r1.wwww, r9.xyzw - ld_raw r10.xy, r9.x, T0[0].xyxx - ld_raw r10.zw, r9.y, T0[0].xxxy - ld_raw r7.xz, r9.z, T0[0].yxxx - ld_raw r7.yw, r9.w, T0[0].xyxx - ishl r2.zw, l(0, 0, 24, 28), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r9.xy, r2.z, T0[0].xyxx - ld_raw r9.zw, r2.w, T0[0].xxxy - mov r11.xy, r5.zwzz - mov r11.zw, r10.xxxz - mov r5.zw, r10.yyyw - mov r6.xy, r7.zwzz - mov r6.zw, r9.xxxz - mov r7.zw, r9.yyyw - endif switch r4.w case l(5) - movc r8.xyzw, r3.yyyy, r5.xyzw, r11.xyzw - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - movc r8.xyzw, r3.yyyy, r7.xyzw, r6.xyzw - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(7) - movc r5.xyzw, r3.yyyy, r5.xyzw, r11.xyzw - f16tof32 r11.xyzw, r5.xyzw - movc r5.xyzw, r3.yyyy, r7.xyzw, r6.xyzw - f16tof32 r6.xyzw, r5.xyzw + f16tof32 r5.xyzw, r5.xyzw + f16tof32 r6.xyzw, r6.xyzw break default break endswitch else - ieq r2.z, r2.y, l(4) - if_nz r2.z - ld_raw r11.xyzw, r1.w, T0[0].xyzw - iadd r2.z, r1.w, l(16) - ld_raw r6.xyzw, r2.z, T0[0].xyzw - else - ld_raw r11.x, r1.w, T0[0].xxxx - iadd r2.z, r2.y, r1.w - ld_raw r11.y, r2.z, T0[0].xxxx - ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r5.xyzw, r1.wwww, r5.xyzw - ld_raw r11.z, r5.x, T0[0].xxxx - ld_raw r11.w, r5.y, T0[0].xxxx - ld_raw r6.x, r5.z, T0[0].xxxx - ld_raw r6.y, r5.w, T0[0].xxxx - ishl r2.zw, l(0, 0, 24, 28), r2.xxxx - iadd r2.zw, r1.wwww, r2.zzzw - ld_raw r6.z, r2.z, T0[0].xxxx - ld_raw r6.w, r2.w, T0[0].xxxx - endif switch r4.w case l(0) case l(1) - movc r2.z, r3.y, l(16), l(0) - ushr r5.xyzw, r11.xyzw, r2.zzzz - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r11.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.xyzw, r6.xyzw, r2.zzzz - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r6.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + movc r2.w, r3.y, l(16), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(255, 255, 255, 255) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) break case l(2) case l(10) - movc r2.z, r3.y, l(20), l(0) - ushr r5.xyzw, r11.xyzw, r2.zzzz - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r11.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r5.xyzw, r6.xyzw, r2.zzzz - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r6.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + movc r2.w, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r5.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r7.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + utof r7.xyzw, r7.xyzw + mul r6.xyzw, r7.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) break case l(3) case l(12) - movc r2.z, r3.y, l(20), l(0) - ushr r5.xyzw, r11.xyzw, r2.zzzz - and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r9.xyzw, r9.xyzw, r12.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw - ishl r8.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r8.xyzw, r5.xyzw - movc r11.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) - ushr r5.xyzw, r6.xyzw, r2.zzzz - and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r8.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r9.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r10.xyzw, r8.xyzw - iadd r10.xyzw, r10.xyzw, l(-24, -24, -24, -24) - movc r10.xyzw, r8.xyzw, r10.xyzw, l(8,8,8,8) - iadd r12.xyzw, -r10.xyzw, l(1, 1, 1, 1) - movc r12.xyzw, r9.xyzw, r9.xyzw, r12.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r10.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r9.xyzw, r8.xyzw, r5.xyzw - ishl r8.xyzw, r12.xyzw, l(23, 23, 23, 23) - iadd r8.xyzw, r8.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r8.xyzw, r5.xyzw - movc r6.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) + movc r2.w, r3.y, l(20), l(0) + ushr r7.xyzw, r5.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r5.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) + ushr r7.xyzw, r6.xyzw, r2.wwww + and r8.xyzw, r7.xyzw, l(1023, 1023, 1023, 1023) + and r9.xyzw, r7.xyzw, l(127, 127, 127, 127) + ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r7.xyzw + firstbit_hi r11.xyzw, r9.xyzw + iadd r11.xyzw, r11.xyzw, l(-24, -24, -24, -24) + movc r11.xyzw, r9.xyzw, r11.xyzw, l(8,8,8,8) + iadd r12.xyzw, -r11.xyzw, l(1, 1, 1, 1) + movc r12.xyzw, r10.xyzw, r10.xyzw, r12.xyzw + bfi r7.xyzw, l(7, 7, 7, 7), r11.xyzw, r7.xyzw, l(0, 0, 0, 0) + and r7.xyzw, r7.xyzw, l(127, 127, 127, 127) + movc r7.xyzw, r10.xyzw, r9.xyzw, r7.xyzw + ishl r9.xyzw, r12.xyzw, l(23, 23, 23, 23) + iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r7.xyzw, r7.xyzw, l(16, 16, 16, 16) + iadd r7.xyzw, r9.xyzw, r7.xyzw + movc r6.xyzw, r8.xyzw, r7.xyzw, l(0,0,0,0) break case l(4) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r11.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r11.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r6.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r5.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r5.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r6.xyzw + itof r7.xyzw, r7.xyzw + mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r6.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(6) - f16tof32 r11.xyzw, r11.xyzw + f16tof32 r5.xyzw, r5.xyzw f16tof32 r6.xyzw, r6.xyzw break default break endswitch endif -ibfe r2.z, l(6), l(16), CB0[0][0].z -ishl r2.z, r2.z, l(23) -iadd r2.z, r2.z, l(0x3f800000) -uge r2.w, r1.y, l(4) -if_nz r2.w - mul r2.w, r2.z, l(0.500000) - ishl r4.x, l(320), r4.z - iadd r4.x, r1.w, r4.x +ibfe r2.w, l(6), l(16), CB0[0][0].z +ishl r2.w, r2.w, l(23) +iadd r2.w, r2.w, l(0x3f800000) +uge r4.x, r1.y, l(4) +if_nz r4.x + mul r4.x, r2.w, l(0.500000) + ishl r4.y, l(320), r4.z + iadd r4.y, r1.w, r4.y + if_nz r2.z + ld_raw r7.xyzw, r4.y, T0[0].xyzw + iadd r8.x, r4.y, l(16) + ld_raw r8.xyzw, r8.x, T0[0].xyzw + else + ld_raw r7.x, r4.y, T0[0].xxxx + iadd r9.x, r2.y, r4.y + ld_raw r7.y, r9.x, T0[0].xxxx + ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r9.xyzw, r4.yyyy, r9.xyzw + ld_raw r7.z, r9.x, T0[0].xxxx + ld_raw r7.w, r9.y, T0[0].xxxx + ld_raw r8.x, r9.z, T0[0].xxxx + ld_raw r8.y, r9.w, T0[0].xxxx + ishl r9.xy, l(24, 28, 0, 0), r2.xxxx + iadd r9.xy, r4.yyyy, r9.xyxx + ld_raw r8.z, r9.x, T0[0].xxxx + ld_raw r8.w, r9.y, T0[0].xxxx + endif if_nz r4.z - ieq r4.y, r2.y, l(8) - if_nz r4.y - ld_raw r5.xyzw, r4.x, T0[0].ywxz - iadd r4.y, r4.x, l(16) - ld_raw r7.xyzw, r4.y, T0[0].xyzw - iadd r8.xy, r4.xxxx, l(32, 48, 0, 0) - ld_raw r9.xyzw, r8.x, T0[0].ywxz - ld_raw r8.xyzw, r8.y, T0[0].xyzw - mov r10.xy, r5.zwzz - mov r10.zw, r7.xxxz - mov r5.zw, r7.yyyw - mov r7.xy, r9.zwzz - mov r7.zw, r8.xxxz - mov r9.zw, r8.yyyw - else - ld_raw r5.xz, r4.x, T0[0].yxxx - iadd r4.y, r2.y, r4.x - ld_raw r5.yw, r4.y, T0[0].xyxx - ishl r10.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r10.xyzw, r4.xxxx, r10.xyzw - ld_raw r12.xy, r10.x, T0[0].xyxx - ld_raw r12.zw, r10.y, T0[0].xxxy - ld_raw r9.xz, r10.z, T0[0].yxxx - ld_raw r9.yw, r10.w, T0[0].xyxx - ishl r10.xy, l(24, 28, 0, 0), r2.xxxx - iadd r10.xy, r4.xxxx, r10.xyxx - ld_raw r13.xy, r10.x, T0[0].xyxx - ld_raw r13.zw, r10.y, T0[0].xxxy - mov r10.xy, r5.zwzz - mov r10.zw, r12.xxxz - mov r5.zw, r12.yyyw - mov r7.xy, r9.zwzz - mov r7.zw, r13.xxxz - mov r9.zw, r13.yyyw - endif switch r4.w case l(5) - movc r8.xyzw, r3.yyyy, r5.xyzw, r10.xyzw - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - movc r8.xyzw, r3.yyyy, r9.xyzw, r7.xyzw - ibfe r8.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r8.xyzw, r8.xyzw - mul r8.xyzw, r8.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r8.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(7) - movc r5.xyzw, r3.yyyy, r5.xyzw, r10.xyzw - f16tof32 r10.xyzw, r5.xyzw - movc r5.xyzw, r3.yyyy, r9.xyzw, r7.xyzw - f16tof32 r7.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw break default break endswitch else - ieq r4.y, r2.y, l(4) - if_nz r4.y - ld_raw r10.xyzw, r4.x, T0[0].xyzw - iadd r4.y, r4.x, l(16) - ld_raw r7.xyzw, r4.y, T0[0].xyzw - else - ld_raw r10.x, r4.x, T0[0].xxxx - iadd r4.y, r2.y, r4.x - ld_raw r10.y, r4.y, T0[0].xxxx - ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r5.xyzw, r4.xxxx, r5.xyzw - ld_raw r10.z, r5.x, T0[0].xxxx - ld_raw r10.w, r5.y, T0[0].xxxx - ld_raw r7.x, r5.z, T0[0].xxxx - ld_raw r7.y, r5.w, T0[0].xxxx - ishl r5.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r4.xxxx, r5.xyxx - ld_raw r7.z, r4.x, T0[0].xxxx - ld_raw r7.w, r4.y, T0[0].xxxx - endif switch r4.w case l(0) case l(1) - movc r4.x, r3.y, l(16), l(0) - ushr r5.xyzw, r10.xyzw, r4.xxxx - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r10.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.xyzw, r7.xyzw, r4.xxxx - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r7.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + movc r4.y, r3.y, l(16), l(0) + ushr r9.xyzw, r7.xyzw, r4.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r4.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) break case l(2) case l(10) - movc r4.x, r3.y, l(20), l(0) - ushr r5.xyzw, r10.xyzw, r4.xxxx - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r10.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r5.xyzw, r7.xyzw, r4.xxxx - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r7.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + movc r4.y, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r4.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r4.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) break case l(3) case l(12) - movc r4.x, r3.y, l(20), l(0) - ushr r5.xyzw, r10.xyzw, r4.xxxx - and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r13.xyzw, r9.xyzw + movc r4.y, r3.y, l(20), l(0) + ushr r9.xyzw, r7.xyzw, r4.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r9.xyzw, r13.xyzw, l(8,8,8,8) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r13.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r12.xyzw, r9.xyzw, r5.xyzw - ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r9.xyzw, r5.xyzw - movc r10.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) - ushr r5.xyzw, r7.xyzw, r4.xxxx - and r8.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r13.xyzw, r9.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r4.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r9.xyzw, r13.xyzw, l(8,8,8,8) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r13.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r12.xyzw, r9.xyzw, r5.xyzw - ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r9.xyzw, r5.xyzw - movc r7.xyzw, r8.xyzw, r5.xyzw, l(0,0,0,0) + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) break case l(4) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r10.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r7.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(6) - f16tof32 r10.xyzw, r10.xyzw f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw break default break endswitch endif - add r11.xyzw, r10.xyzw, r11.xyzw - add r6.xyzw, r6.xyzw, r7.xyzw + add r5.xyzw, r5.xyzw, r7.xyzw + add r6.xyzw, r6.xyzw, r8.xyzw uge r1.y, r1.y, l(6) if_nz r1.y - mul r2.z, r2.z, l(0.250000) - ishl r4.xy, l(4, 324, 0, 0), r4.zzzz - iadd r1.yw, r1.wwww, r4.xxxy + mul r2.w, r2.w, l(0.250000) + ishl r7.xy, l(4, 324, 0, 0), r4.zzzz + iadd r1.yw, r1.wwww, r7.xxxy + if_nz r2.z + ld_raw r7.xyzw, r1.y, T0[0].xyzw + iadd r4.y, r1.y, l(16) + ld_raw r8.xyzw, r4.y, T0[0].xyzw + else + ld_raw r7.x, r1.y, T0[0].xxxx + iadd r4.y, r2.y, r1.y + ld_raw r7.y, r4.y, T0[0].xxxx + ishl r9.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r9.xyzw, r1.yyyy, r9.xyzw + ld_raw r7.z, r9.x, T0[0].xxxx + ld_raw r7.w, r9.y, T0[0].xxxx + ld_raw r8.x, r9.z, T0[0].xxxx + ld_raw r8.y, r9.w, T0[0].xxxx + ishl r9.xy, l(24, 28, 0, 0), r2.xxxx + iadd r9.xy, r1.yyyy, r9.xyxx + ld_raw r8.z, r9.x, T0[0].xxxx + ld_raw r8.w, r9.y, T0[0].xxxx + endif if_nz r4.z - ieq r4.x, r2.y, l(8) - if_nz r4.x - ld_raw r5.xyzw, r1.y, T0[0].ywxz - iadd r7.xyz, r1.yyyy, l(16, 32, 48, 0) - ld_raw r8.xyzw, r7.x, T0[0].xyzw - ld_raw r9.xyzw, r7.y, T0[0].ywxz - ld_raw r7.xyzw, r7.z, T0[0].xyzw - mov r13.xy, r5.zwzz - mov r13.zw, r8.xxxz - mov r5.zw, r8.yyyw - mov r8.xy, r9.zwzz - mov r8.zw, r7.xxxz - mov r9.zw, r7.yyyw - else - ld_raw r5.xz, r1.y, T0[0].yxxx - iadd r4.x, r2.y, r1.y - ld_raw r5.yw, r4.x, T0[0].xyxx - ishl r10.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r10.xyzw, r1.yyyy, r10.xyzw - ld_raw r12.xy, r10.x, T0[0].xyxx - ld_raw r12.zw, r10.y, T0[0].xxxy - ld_raw r9.xz, r10.z, T0[0].yxxx - ld_raw r9.yw, r10.w, T0[0].xyxx - ishl r4.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r10.xy, r4.x, T0[0].xyxx - ld_raw r10.zw, r4.y, T0[0].xxxy - mov r13.xy, r5.zwzz - mov r13.zw, r12.xxxz - mov r5.zw, r12.yyyw - mov r8.xy, r9.zwzz - mov r8.zw, r10.xxxz - mov r9.zw, r10.yyyw - endif switch r4.w case l(5) - movc r7.xyzw, r3.yyyy, r5.xyzw, r13.xyzw - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - movc r7.xyzw, r3.yyyy, r9.xyzw, r8.xyzw - ibfe r7.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw - itof r7.xyzw, r7.xyzw - mul r7.xyzw, r7.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r7.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(7) - movc r5.xyzw, r3.yyyy, r5.xyzw, r13.xyzw - f16tof32 r13.xyzw, r5.xyzw - movc r5.xyzw, r3.yyyy, r9.xyzw, r8.xyzw - f16tof32 r8.xyzw, r5.xyzw + f16tof32 r7.xyzw, r7.xyzw + f16tof32 r8.xyzw, r8.xyzw break default break endswitch else - ieq r4.x, r2.y, l(4) - if_nz r4.x - ld_raw r13.xyzw, r1.y, T0[0].xyzw - iadd r4.x, r1.y, l(16) - ld_raw r8.xyzw, r4.x, T0[0].xyzw - else - ld_raw r13.x, r1.y, T0[0].xxxx - iadd r4.x, r2.y, r1.y - ld_raw r13.y, r4.x, T0[0].xxxx - ishl r5.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r5.xyzw, r1.yyyy, r5.xyzw - ld_raw r13.z, r5.x, T0[0].xxxx - ld_raw r13.w, r5.y, T0[0].xxxx - ld_raw r8.x, r5.z, T0[0].xxxx - ld_raw r8.y, r5.w, T0[0].xxxx - ishl r4.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r1.yyyy, r4.xyxx - ld_raw r8.z, r4.x, T0[0].xxxx - ld_raw r8.w, r4.y, T0[0].xxxx - endif switch r4.w case l(0) case l(1) movc r1.y, r3.y, l(16), l(0) - ushr r5.xyzw, r13.xyzw, r1.yyyy - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r13.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r5.xyzw, r8.xyzw, r1.yyyy - and r5.xyzw, r5.xyzw, l(255, 255, 255, 255) - utof r5.xyzw, r5.xyzw - mul r8.xyzw, r5.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(255, 255, 255, 255) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) break case l(2) case l(10) movc r1.y, r3.y, l(20), l(0) - ushr r5.xyzw, r13.xyzw, r1.yyyy - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r13.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r5.xyzw, r8.xyzw, r1.yyyy - and r5.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - utof r5.xyzw, r5.xyzw - mul r8.xyzw, r5.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r7.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r9.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + utof r9.xyzw, r9.xyzw + mul r8.xyzw, r9.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) break case l(3) case l(12) movc r1.y, r3.y, l(20), l(0) - ushr r5.xyzw, r13.xyzw, r1.yyyy - and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r12.xyzw, r9.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r9.xyzw, r12.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r10.xyzw, r10.xyzw, r14.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r12.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw - ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r9.xyzw, r5.xyzw - movc r13.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) - ushr r5.xyzw, r8.xyzw, r1.yyyy - and r7.xyzw, r5.xyzw, l(1023, 1023, 1023, 1023) - and r9.xyzw, r5.xyzw, l(127, 127, 127, 127) - ubfe r10.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r5.xyzw - firstbit_hi r12.xyzw, r9.xyzw - iadd r12.xyzw, r12.xyzw, l(-24, -24, -24, -24) - movc r12.xyzw, r9.xyzw, r12.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r12.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r10.xyzw, r10.xyzw, r14.xyzw - bfi r5.xyzw, l(7, 7, 7, 7), r12.xyzw, r5.xyzw, l(0, 0, 0, 0) - and r5.xyzw, r5.xyzw, l(127, 127, 127, 127) - movc r5.xyzw, r10.xyzw, r9.xyzw, r5.xyzw - ishl r9.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r9.xyzw, r9.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r5.xyzw, r5.xyzw, l(16, 16, 16, 16) - iadd r5.xyzw, r9.xyzw, r5.xyzw - movc r8.xyzw, r7.xyzw, r5.xyzw, l(0,0,0,0) + ushr r9.xyzw, r7.xyzw, r1.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r7.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) + ushr r9.xyzw, r8.xyzw, r1.yyyy + and r10.xyzw, r9.xyzw, l(1023, 1023, 1023, 1023) + and r11.xyzw, r9.xyzw, l(127, 127, 127, 127) + ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r9.xyzw + firstbit_hi r13.xyzw, r11.xyzw + iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) + movc r13.xyzw, r11.xyzw, r13.xyzw, l(8,8,8,8) + iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) + movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw + bfi r9.xyzw, l(7, 7, 7, 7), r13.xyzw, r9.xyzw, l(0, 0, 0, 0) + and r9.xyzw, r9.xyzw, l(127, 127, 127, 127) + movc r9.xyzw, r12.xyzw, r11.xyzw, r9.xyzw + ishl r11.xyzw, r14.xyzw, l(23, 23, 23, 23) + iadd r11.xyzw, r11.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r9.xyzw, r9.xyzw, l(16, 16, 16, 16) + iadd r9.xyzw, r11.xyzw, r9.xyzw + movc r8.xyzw, r10.xyzw, r9.xyzw, l(0,0,0,0) break case l(4) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r13.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r13.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r5.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw - itof r5.xyzw, r5.xyzw - mul r5.xyzw, r5.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r8.xyzw, r5.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r7.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r7.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r9.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r8.xyzw + itof r9.xyzw, r9.xyzw + mul r9.xyzw, r9.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r8.xyzw, r9.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(6) - f16tof32 r13.xyzw, r13.xyzw + f16tof32 r7.xyzw, r7.xyzw f16tof32 r8.xyzw, r8.xyzw break default break endswitch endif - add r5.xyzw, r11.xyzw, r13.xyzw - add r7.xyzw, r6.xyzw, r8.xyzw + add r7.xyzw, r5.xyzw, r7.xyzw + add r8.xyzw, r6.xyzw, r8.xyzw + if_nz r2.z + ld_raw r9.xyzw, r1.w, T0[0].xyzw + iadd r1.y, r1.w, l(16) + ld_raw r10.xyzw, r1.y, T0[0].xyzw + else + ld_raw r9.x, r1.w, T0[0].xxxx + iadd r1.y, r2.y, r1.w + ld_raw r9.y, r1.y, T0[0].xxxx + ishl r11.xyzw, l(8, 12, 16, 20), r2.xxxx + iadd r11.xyzw, r1.wwww, r11.xyzw + ld_raw r9.z, r11.x, T0[0].xxxx + ld_raw r9.w, r11.y, T0[0].xxxx + ld_raw r10.x, r11.z, T0[0].xxxx + ld_raw r10.y, r11.w, T0[0].xxxx + ishl r2.xy, l(24, 28, 0, 0), r2.xxxx + iadd r1.yw, r1.wwww, r2.xxxy + ld_raw r10.z, r1.y, T0[0].xxxx + ld_raw r10.w, r1.w, T0[0].xxxx + endif if_nz r4.z - ieq r1.y, r2.y, l(8) - if_nz r1.y - ld_raw r8.xyzw, r1.w, T0[0].ywxz - iadd r4.xyz, r1.wwww, l(16, 32, 48, 0) - ld_raw r9.xyzw, r4.x, T0[0].xyzw - ld_raw r10.xyzw, r4.y, T0[0].ywxz - ld_raw r12.xyzw, r4.z, T0[0].xyzw - mov r15.xy, r8.zwzz - mov r15.zw, r9.xxxz - mov r8.zw, r9.yyyw - mov r9.xy, r10.zwzz - mov r9.zw, r12.xxxz - mov r10.zw, r12.yyyw - else - ld_raw r8.xz, r1.w, T0[0].yxxx - iadd r1.y, r2.y, r1.w - ld_raw r8.yw, r1.y, T0[0].xyxx - ishl r13.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r13.xyzw, r1.wwww, r13.xyzw - ld_raw r14.xy, r13.x, T0[0].xyxx - ld_raw r14.zw, r13.y, T0[0].xxxy - ld_raw r10.xz, r13.z, T0[0].yxxx - ld_raw r10.yw, r13.w, T0[0].xyxx - ishl r4.xy, l(24, 28, 0, 0), r2.xxxx - iadd r4.xy, r1.wwww, r4.xyxx - ld_raw r13.xy, r4.x, T0[0].xyxx - ld_raw r13.zw, r4.y, T0[0].xxxy - mov r15.xy, r8.zwzz - mov r15.zw, r14.xxxz - mov r8.zw, r14.yyyw - mov r9.xy, r10.zwzz - mov r9.zw, r13.xxxz - mov r10.zw, r13.yyyw - endif switch r4.w case l(5) - movc r12.xyzw, r3.yyyy, r8.xyzw, r15.xyzw - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - movc r12.xyzw, r3.yyyy, r10.xyzw, r9.xyzw - ibfe r12.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r12.xyzw - itof r12.xyzw, r12.xyzw - mul r12.xyzw, r12.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r12.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(7) - movc r8.xyzw, r3.yyyy, r8.xyzw, r15.xyzw - f16tof32 r15.xyzw, r8.xyzw - movc r8.xyzw, r3.yyyy, r10.xyzw, r9.xyzw - f16tof32 r9.xyzw, r8.xyzw + f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw break default break endswitch else - ieq r1.y, r2.y, l(4) - if_nz r1.y - ld_raw r15.xyzw, r1.w, T0[0].xyzw - iadd r1.y, r1.w, l(16) - ld_raw r9.xyzw, r1.y, T0[0].xyzw - else - ld_raw r15.x, r1.w, T0[0].xxxx - iadd r1.y, r2.y, r1.w - ld_raw r15.y, r1.y, T0[0].xxxx - ishl r8.xyzw, l(8, 12, 16, 20), r2.xxxx - iadd r8.xyzw, r1.wwww, r8.xyzw - ld_raw r15.z, r8.x, T0[0].xxxx - ld_raw r15.w, r8.y, T0[0].xxxx - ld_raw r9.x, r8.z, T0[0].xxxx - ld_raw r9.y, r8.w, T0[0].xxxx - ishl r2.xy, l(24, 28, 0, 0), r2.xxxx - iadd r1.yw, r1.wwww, r2.xxxy - ld_raw r9.z, r1.y, T0[0].xxxx - ld_raw r9.w, r1.w, T0[0].xxxx - endif switch r4.w case l(0) case l(1) movc r1.y, r3.y, l(16), l(0) - ushr r4.xyzw, r15.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(255, 255, 255, 255) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r9.xyzw, r1.yyyy + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) + ushr r11.xyzw, r10.xyzw, r1.yyyy + and r11.xyzw, r11.xyzw, l(255, 255, 255, 255) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.003922, 0.003922, 0.003922, 0.003922) break case l(2) case l(10) movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r15.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r15.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r4.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - utof r4.xyzw, r4.xyzw - mul r9.xyzw, r4.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r9.xyzw, r1.yyyy + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r9.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) + ushr r11.xyzw, r10.xyzw, r1.yyyy + and r11.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + utof r11.xyzw, r11.xyzw + mul r10.xyzw, r11.xyzw, l(0.000978, 0.000978, 0.000978, 0.000978) break case l(3) case l(12) movc r1.y, r3.y, l(20), l(0) - ushr r4.xyzw, r15.xyzw, r1.yyyy - and r8.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r13.xyzw, r10.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r10.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r13.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r12.xyzw, r10.xyzw, r4.xyzw - ishl r10.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r10.xyzw, r4.xyzw - movc r15.xyzw, r8.xyzw, r4.xyzw, l(0,0,0,0) - ushr r4.xyzw, r9.xyzw, r1.yyyy - and r8.xyzw, r4.xyzw, l(1023, 1023, 1023, 1023) - and r10.xyzw, r4.xyzw, l(127, 127, 127, 127) - ubfe r12.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r4.xyzw - firstbit_hi r13.xyzw, r10.xyzw - iadd r13.xyzw, r13.xyzw, l(-24, -24, -24, -24) - movc r13.xyzw, r10.xyzw, r13.xyzw, l(8,8,8,8) - iadd r14.xyzw, -r13.xyzw, l(1, 1, 1, 1) - movc r14.xyzw, r12.xyzw, r12.xyzw, r14.xyzw - bfi r4.xyzw, l(7, 7, 7, 7), r13.xyzw, r4.xyzw, l(0, 0, 0, 0) - and r4.xyzw, r4.xyzw, l(127, 127, 127, 127) - movc r4.xyzw, r12.xyzw, r10.xyzw, r4.xyzw - ishl r10.xyzw, r14.xyzw, l(23, 23, 23, 23) - iadd r10.xyzw, r10.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) - ishl r4.xyzw, r4.xyzw, l(16, 16, 16, 16) - iadd r4.xyzw, r10.xyzw, r4.xyzw - movc r9.xyzw, r8.xyzw, r4.xyzw, l(0,0,0,0) + ushr r11.xyzw, r9.xyzw, r1.yyyy + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r9.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) + ushr r11.xyzw, r10.xyzw, r1.yyyy + and r12.xyzw, r11.xyzw, l(1023, 1023, 1023, 1023) + and r13.xyzw, r11.xyzw, l(127, 127, 127, 127) + ubfe r14.xyzw, l(3, 3, 3, 3), l(7, 7, 7, 7), r11.xyzw + firstbit_hi r15.xyzw, r13.xyzw + iadd r15.xyzw, r15.xyzw, l(-24, -24, -24, -24) + movc r15.xyzw, r13.xyzw, r15.xyzw, l(8,8,8,8) + iadd r16.xyzw, -r15.xyzw, l(1, 1, 1, 1) + movc r16.xyzw, r14.xyzw, r14.xyzw, r16.xyzw + bfi r11.xyzw, l(7, 7, 7, 7), r15.xyzw, r11.xyzw, l(0, 0, 0, 0) + and r11.xyzw, r11.xyzw, l(127, 127, 127, 127) + movc r11.xyzw, r14.xyzw, r13.xyzw, r11.xyzw + ishl r13.xyzw, r16.xyzw, l(23, 23, 23, 23) + iadd r13.xyzw, r13.xyzw, l(0x3e000000, 0x3e000000, 0x3e000000, 0x3e000000) + ishl r11.xyzw, r11.xyzw, l(16, 16, 16, 16) + iadd r11.xyzw, r13.xyzw, r11.xyzw + movc r10.xyzw, r12.xyzw, r11.xyzw, l(0,0,0,0) break case l(4) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r15.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r15.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) - ibfe r4.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw - itof r4.xyzw, r4.xyzw - mul r4.xyzw, r4.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) - max r9.xyzw, r4.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r9.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r9.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) + ibfe r11.xyzw, l(16, 16, 16, 16), l(0, 0, 0, 0), r10.xyzw + itof r11.xyzw, r11.xyzw + mul r11.xyzw, r11.xyzw, l(0.000977, 0.000977, 0.000977, 0.000977) + max r10.xyzw, r11.xyzw, l(-1.000000, -1.000000, -1.000000, -1.000000) break case l(6) - f16tof32 r15.xyzw, r15.xyzw f16tof32 r9.xyzw, r9.xyzw + f16tof32 r10.xyzw, r10.xyzw break default break endswitch endif - add r11.xyzw, r5.xyzw, r15.xyzw - add r6.xyzw, r7.xyzw, r9.xyzw + add r5.xyzw, r7.xyzw, r9.xyzw + add r6.xyzw, r8.xyzw, r10.xyzw else - mov r2.z, r2.w + mov r2.w, r4.x endif endif -mul_sat r4.xyzw, r2.zzzz, r11.xyzw -mul_sat r2.xyzw, r2.zzzz, r6.xyzw +mul_sat r4.xyzw, r2.wwww, r5.xyzw +mul_sat r2.xyzw, r2.wwww, r6.xyzw bfi r1.xyzw, l(2, 2, 2, 2), l(3, 3, 3, 3), r1.zxxz, l(0, 0, 0, 0) iadd r0.xyzw, r0.xyzw, r1.xyzw if_nz r3.w @@ -823,4 +669,4 @@ imad r0.y, r2.z, l(0x00010000), r0.y imad r1.y, r2.w, l(0x01000000), r0.y store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw ret -// Approximately 778 instruction slots used +// Approximately 624 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.cso index f6173da2e4eb89b6d4b854eba6e410cba7ff0b92..4bc88690a724d7e0445370d74ec881cee1a30d97 100644 GIT binary patch delta 928 zcmZY7Pe>F|90%~mV$#=6eg??sMJAH^U^`0AR?F@ZD7+~#@tOOx_POC zP|G9g;K5ir?Gn;I5Ih)k=-^=v9W$0Nx@@*H<)#;hbSIQH8Y_NQN z;nV;so*?UDSu1j4DWbDEkXt_JO>P1OC@tI*cnCzxaOFQ>qJhAZT?&C=Us}y-t!Sm7NDYeEd{y`mNRqiQ94EynK>IhG0 PhB%0Jfmv?~+HmYYjasZ$ delta 999 zcmZY7PiWIn90%}U)--8qg*F>*b54smCMZ~8V2dEKO~spTOm-M#Sr>5Hnb?o*FJZq-T@h64gAiSP>2xO+Sw0GHn0s>UansNb~NF*Qu}f! zbsyRVZ3&$Rro&hVo(!S>8khl2VsLG6sJ;v3TjGOpB~;!jqY^D+)_ha?bzq%aFu3+x z4d@DHEv+_i6`020s&cBn2K6utZou>PH}oSk2vcforKV*U5>2`Gp0Col%&1zi5iif9N7<56H&7_-21C{rH=W`Jowk!V`u zlRko8gSMPhe+HfWPv1fv=*33DhM%wtU4;g@$vEc@;H&k*38@k2R+CPMh3FOOvG{=B zZPBaP(x_Na?n&!HQ_rFS=txXA*cgbCzKioSUXm zwvAb{bekb>7wn>8%{j)@j9DVAijYLI*iLjGTgRvMuf=xDj$6h$2miMRJtwdo_gK?K zbJi$YCA;93XY4yh>8@)QEu)k-3zm2uTahYaOgk=?wbSun5A5BQ-OXy>KMtG@WD F$R3*5ys`iQ diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h index 00c28851b..c5a90b5b3 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.h @@ -1,14 +1,14 @@ // generated from `xb buildhlsl` // source: tessellation.vs.hlsl const uint8_t tessellation_vs[] = { - 0x44, 0x58, 0x42, 0x43, 0x12, 0xE7, 0xA4, 0xA5, 0x39, 0x62, 0xA0, 0x31, - 0xA9, 0x00, 0x56, 0xB4, 0x65, 0x75, 0xDF, 0x8A, 0x01, 0x00, 0x00, 0x00, - 0x98, 0x0D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, - 0xD0, 0x0A, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x00, 0x38, 0x0B, 0x00, 0x00, - 0xFC, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x94, 0x0A, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x18, 0xAE, 0xB9, 0x26, 0x87, 0x12, 0x5A, 0xEE, + 0xA5, 0xC4, 0x95, 0xE5, 0xA3, 0x24, 0x2C, 0x77, 0x01, 0x00, 0x00, 0x00, + 0x50, 0x0D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x88, 0x0A, 0x00, 0x00, 0xBC, 0x0A, 0x00, 0x00, 0xF0, 0x0A, 0x00, 0x00, + 0xB4, 0x0C, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0x4C, 0x0A, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0xFE, 0xFF, 0x00, 0x05, 0x00, 0x00, - 0x6A, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x22, 0x0A, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -16,185 +16,176 @@ const uint8_t tessellation_vs[] = { 0x01, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x65, 0x5F, 0x73, 0x79, 0x73, 0x74, 0x65, 0x6D, 0x5F, 0x63, 0x62, 0x75, 0x66, 0x66, 0x65, 0x72, 0x00, 0xAB, 0xAB, - 0x64, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, - 0xF0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x90, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x64, 0x00, 0x00, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, + 0xE0, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x68, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xC4, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x9C, 0x05, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xE4, 0x05, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x27, 0x06, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x02, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xFF, 0x05, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x3E, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x58, 0x06, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x16, 0x06, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x30, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x54, 0x06, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x8A, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x62, 0x06, 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x06, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE8, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x06, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xB7, 0x06, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x8F, 0x06, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xD4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xAC, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xF8, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0C, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xD0, 0x06, 0x00, 0x00, 0x90, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x30, 0x07, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, - 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x07, 0x00, 0x00, 0x9C, 0x00, 0x00, 0x00, + 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x51, 0x07, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x29, 0x07, 0x00, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x0C, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xE4, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0x5F, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0xA0, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x37, 0x07, 0x00, 0x00, 0xAC, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x78, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, - 0x00, 0x00, 0x00, 0x00, 0x6F, 0x07, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, - 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x07, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x47, 0x07, 0x00, 0x00, 0xB0, 0x00, 0x00, 0x00, + 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x68, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, - 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0xB4, 0x07, 0x00, 0x00, - 0xD0, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xD0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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0x5F, 0x72, 0x74, 0x5F, 0x62, 0x6C, 0x65, 0x6E, 0x64, 0x5F, 0x66, 0x61, 0x63, 0x74, 0x6F, 0x72, 0x73, 0x5F, 0x6F, 0x70, 0x73, 0x00, 0x78, 0x65, 0x5F, 0x65, 0x64, 0x72, 0x61, 0x6D, 0x5F, 0x62, diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.txt index a5aecc7bc..7782fda64 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/tessellation_vs.txt @@ -21,24 +21,23 @@ // float3 xe_ndc_offset; // Offset: 160 Size: 12 [unused] // uint xe_ps_param_gen; // Offset: 172 Size: 4 [unused] // uint4 xe_texture_swizzled_signs[2];// Offset: 176 Size: 32 [unused] -// uint2 xe_sample_count_log2; // Offset: 208 Size: 8 [unused] -// float xe_alpha_test_reference; // Offset: 216 Size: 4 [unused] -// uint xe_alpha_to_mask; // Offset: 220 Size: 4 [unused] +// uint xe_textures_resolved; // Offset: 208 Size: 4 [unused] +// uint2 xe_sample_count_log2; // Offset: 212 Size: 8 [unused] +// float xe_alpha_test_reference; // Offset: 220 Size: 4 [unused] // float4 xe_color_exp_bias; // Offset: 224 Size: 16 [unused] -// uint4 xe_color_output_map; // Offset: 240 Size: 16 [unused] -// uint xe_edram_resolution_square_scale;// Offset: 256 Size: 4 [unused] -// uint xe_edram_pitch_tiles; // Offset: 260 Size: 4 [unused] -// float2 xe_edram_depth_range; // Offset: 264 Size: 8 [unused] -// float2 xe_edram_poly_offset_front; // Offset: 272 Size: 8 [unused] -// float2 xe_edram_poly_offset_back; // Offset: 280 Size: 8 [unused] -// uint xe_edram_depth_base_dwords; // Offset: 288 Size: 4 [unused] -// uint4 xe_edram_stencil[2]; // Offset: 304 Size: 32 [unused] -// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 336 Size: 16 [unused] -// uint4 xe_edram_rt_format_flags; // Offset: 352 Size: 16 [unused] -// float4 xe_edram_rt_clamp[4]; // Offset: 368 Size: 64 [unused] -// uint4 xe_edram_rt_keep_mask[2]; // Offset: 432 Size: 32 [unused] -// uint4 xe_edram_rt_blend_factors_ops;// Offset: 464 Size: 16 [unused] -// float4 xe_edram_blend_constant; // Offset: 480 Size: 16 [unused] +// uint xe_alpha_to_mask; // Offset: 240 Size: 4 [unused] +// uint xe_edram_pitch_tiles; // Offset: 244 Size: 4 [unused] +// float2 xe_edram_depth_range; // Offset: 248 Size: 8 [unused] +// float2 xe_edram_poly_offset_front; // Offset: 256 Size: 8 [unused] +// float2 xe_edram_poly_offset_back; // Offset: 264 Size: 8 [unused] +// uint xe_edram_depth_base_dwords; // Offset: 272 Size: 4 [unused] +// uint4 xe_edram_stencil[2]; // Offset: 288 Size: 32 [unused] +// uint4 xe_edram_rt_base_dwords_scaled;// Offset: 320 Size: 16 [unused] +// uint4 xe_edram_rt_format_flags; // Offset: 336 Size: 16 [unused] +// float4 xe_edram_rt_clamp[4]; // Offset: 352 Size: 64 [unused] +// uint4 xe_edram_rt_keep_mask[2]; // Offset: 416 Size: 32 [unused] +// uint4 xe_edram_rt_blend_factors_ops;// Offset: 448 Size: 16 [unused] +// float4 xe_edram_blend_constant; // Offset: 464 Size: 16 [unused] // // } // diff --git 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000000000..be02f434a --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.txt @@ -0,0 +1,391 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint4 buf T0 t0 1 +// xe_texture_load_dest UAV uint4 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 7 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(4) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(4) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r1.x, CB0[0][1].w, l(1) + if_nz r1.x + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r1.x, r1.x, l(0x0ffffffe) + imad r1.x, r2.y, r1.x, r2.x + ibfe r1.zw, l(0, 0, 27, 29), l(0, 0, 4, 2), vThreadID.xxxx + imad r1.x, r1.x, r1.y, r1.z + ishl r1.y, vThreadID.y, l(12) + and r1.y, r1.y, l(0x00006000) + bfi r1.y, l(3), l(10), r0.x, r1.y + ishr r1.y, r1.y, l(6) + iadd r1.z, r2.y, r2.z + bfi r2.x, l(1), l(1), r1.z, l(0) + iadd r1.w, r1.w, r2.x + bfi r1.w, l(2), l(1), r1.w, l(0) + bfi r1.z, l(1), l(0), r1.z, r1.w + bfi r1.xw, l(18, 0, 0, 18), l(12, 0, 0, 15), r1.xxxx, l(0, 0, 0, 0) + imad r1.xy, r1.yyyy, l(2, 16, 0, 0), r1.xwxx + bfi r1.xy, l(2, 2, 0, 0), l(10, 13, 0, 0), vThreadID.zzzz, r1.xyxx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.z, l(6) + bfi r1.z, l(1), l(8), r1.z, l(0) + imad r1.z, r2.x, l(32), r1.z + imad r1.z, r2.y, l(4), r1.z + bfi r1.xy, l(6, 6, 0, 0), l(0, 3, 0, 0), r1.wwww, r1.xyxx + bfi r1.y, l(9), l(3), r1.z, r1.y + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.yz, l(0, 27, 29, 0), l(0, 4, 2, 0), vThreadID.xxxx + ishr r2.xy, vThreadID.yyyy, l(5, 2, 0, 0) + iadd r1.w, CB0[0][0].z, l(31) + ushr r1.w, r1.w, l(5) + imad r1.y, r2.x, r1.w, r1.y + ishl r1.w, vThreadID.y, l(7) + and r2.xz, r1.wwww, l(1792, 0, 2048, 0) + bfi r1.w, l(3), l(5), r0.x, r2.x + bfi r1.w, l(21), l(11), r1.y, r1.w + bfi r2.w, l(1), l(4), vThreadID.y, l(0) + iadd r1.w, r1.w, r2.w + ishl r3.xy, r2.xxxx, l(3, 2, 0, 0) + bfi r3.xy, l(3, 3, 0, 0), l(8, 7, 0, 0), r0.xxxx, r3.xyxx + bfi r3.xy, l(21, 21, 0, 0), l(14, 13, 0, 0), r1.yyyy, r3.xyxx + imad r2.xw, r2.wwww, l(8, 0, 0, 4), r3.xxxy + bfi r1.y, l(12), l(0), r2.z, r2.x + and r2.x, r2.w, l(1792) + iadd r1.y, r1.y, r2.x + and r2.x, r2.y, l(2) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r1.w, r1.y + endif +else + ishl r0.x, r0.x, l(4) + iadd r1.y, CB0[0][1].y, l(31) + and r1.y, r1.y, l(-32) + imad r1.y, vThreadID.z, r1.y, vThreadID.y + imad r1.x, r1.y, CB0[0][0].y, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(4, 4, 0, 0) +ushr r1.x, CB0[0][1].w, l(1) +ld r2.xyzw, r0.xxxx, T0[0].xyzw +ieq r1.xyz, r1.xxxx, l(1, 2, 3, 0) +or r1.xy, r1.yzyy, r1.xyxx +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyzw +iadd r2.xyzw, r0.yyyy, l(1, 2, 3, 4) +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +iadd r1.z, r0.z, r0.y +ld r4.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) +ld r3.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r3.xyzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r4.xyzw +iadd r1.z, r0.z, r1.z +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyzw +iadd r2.xy, r1.zzzz, l(1, 2, 0, 0) +ld r4.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.xxxx, r4.xyzw +ld r3.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.yyyy, r3.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(18) +else + iadd r0.w, r0.x, l(9) +endif +ld r3.xyzw, r0.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r4.xyzw, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r2.wwww, r4.xyzw +iadd r0.x, r0.y, l(5) +ld r4.xyzw, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r1.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +iadd r0.x, r0.z, r2.z +ld r2.xyzw, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r1.zw, r0.xxxx, l(0, 0, 1, 2) +ld r2.xyzw, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r3.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r3.xyzw +endif +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +iadd r2.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r3.xyzw, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r0.x, r0.z, r0.x +ld r3.xyzw, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.xxxx, r3.xyzw +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +ld r3.xyzw, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r3.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r3.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r1.y + ushr r4.xyzw, r3.xyzw, l(16, 16, 16, 16) + bfi r3.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r3.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r3.xyzw +ld r2.xyzw, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r4.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r3.xyzw, r4.xyzw +endif +if_nz r1.y + ushr r1.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r1.xyzw +endif +store_uav_typed U0[0].xyzw, r0.zzzz, r2.xyzw +ret +// Approximately 340 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.cso 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0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.txt new file mode 100644 index 000000000..4ee250fcd --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.txt @@ -0,0 +1,600 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r1.x, CB0[0][1].w, l(1) + if_nz r1.x + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r1.x, r1.x, l(0x0ffffffe) + imad r1.x, r2.y, r1.x, r2.x + ibfe r1.z, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r1.y, r1.z + ishl r1.y, vThreadID.y, l(9) + ishr r1.y, r1.y, l(6) + iadd r1.z, r2.y, r2.z + and r1.yw, r1.yyyz, l(0, 48, 0, 1) + ishr r2.x, r0.x, l(3) + bfi r1.z, l(1), l(1), r1.z, l(0) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(1), r1.z, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.xw, l(21, 0, 0, 21), l(9, 0, 0, 12), r1.xxxx, l(0, 0, 0, 0) + imad r1.xy, r1.yyyy, l(2, 16, 0, 0), r1.xwxx + bfi r1.xy, l(2, 2, 0, 0), l(7, 10, 0, 0), vThreadID.zzzz, r1.xyxx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.z, l(4) + bfi r1.z, l(2), l(8), r1.z, l(0) + imad r1.z, r2.x, l(32), r1.z + imad r1.z, r2.y, l(4), r1.z + bfi r1.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r1.wwww, r1.xyxx + bfi r1.y, l(9), l(3), r1.z, r1.y + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + iadd r1.y, CB0[0][1].y, l(31) + and r1.y, r1.y, l(-32) + imad r1.y, vThreadID.z, r1.y, vThreadID.y + imad r1.x, r1.y, CB0[0][0].y, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][1].w, l(1) +ld r1.yz, r0.xxxx, T0[0].zyxw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.wwzw, r2.yyxy + mov r2.x, r1.z +else + mov r2.x, r1.z +endif +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r3.xxxx, T0[0].zwxy +if_nz r1.x + ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.zw, r2.zzzw, r4.xxxy +endif +ld r2.zw, r3.yyyy, T0[0].zwyx +if_nz r1.x + ishl r3.xy, r2.wzww, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.wzww, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r3.yyyx, r4.yyyx + mov r3.x, r2.w +else + mov r3.x, r2.w +endif +ld r3.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r3.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r3.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.yz, r4.zzwz, r4.xxyx +endif +ld r4.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r4.zw, r4.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r4.xyxx, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r4.zwzz, r5.xyxx + mov r2.w, r4.y +else + mov r2.w, r4.y +endif +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r4.zw, r5.xxxx, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.zzzw, r6.xxxy +endif +ld r5.xy, r5.yyyy, T0[0].yxzw +if_nz r1.x + ishl r6.xy, r5.yxyy, l(8, 8, 0, 0) + ushr r6.zw, r5.yyyx, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r6.wzww, r6.yxyy + mov r4.y, r5.y +else + mov r4.y, r5.y +endif +ld r5.yz, r5.zzzz, T0[0].zyxw +if_nz r1.x + ishl r6.xy, r5.zyzz, l(8, 8, 0, 0) + ushr r6.zw, r5.zzzy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.yz, r6.wwzw, r6.yyxy + mov r6.y, r5.z +else + mov r6.y, r5.z +endif +ld r5.zw, r5.wwww, T0[0].zwxy +if_nz r1.x + ishl r6.zw, r5.zzzw, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r5.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.zw, r6.zzzw, r7.xxxy +endif +bfi r2.y, l(16), l(0), r1.y, r3.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xyxx +iadd r7.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r7.xxxx, r2.zwzz +bfi r6.x, l(16), l(0), r4.z, r5.x +store_uav_typed U0[0].xyzw, r7.yyyy, r6.xyxx +iadd r2.x, r0.z, r0.y +ushr r1.y, r1.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r6.y, l(16), l(16), r3.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw +iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) +ushr r1.y, r3.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.yyyy +ushr r1.y, r4.z, l(16) +bfi r6.y, l(16), l(16), r4.w, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +ushr r1.y, r4.w, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r1.yyyy +ushr r1.y, r5.y, l(16) +bfi r6.y, l(16), l(16), r5.z, r1.y +store_uav_typed U0[0].xyzw, r2.zzzz, r6.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r3.x, r3.z +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r4.xyxx +bfi r5.z, l(16), l(0), r5.x, r5.z +store_uav_typed U0[0].xyzw, r1.wwww, r5.zwzz +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zyxw +if_nz r1.x + ishl r3.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r3.zw, r1.zzzy, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.wwzw, r3.yyxy + mov r3.x, r1.z +else + mov r3.x, r1.z +endif +ld r1.zw, r2.yyyy, T0[0].zwxy +if_nz r1.x + ishl r2.xy, r1.zwzz, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r3.zw, r1.zzzw, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r1.zw, r2.xxxy, r3.zzzw +endif +ld r2.xy, r2.zzzz, T0[0].yxzw +if_nz r1.x + ishl r3.zw, r2.yyyx, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r2.yxyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r3.wzww, r4.yxyy + mov r2.xz, r2.xxyx +else + mov r2.xz, r2.xxyx +endif +ld r3.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) + ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.zw, r4.zzzw, r4.xxxy +endif +iadd r4.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r5.xy, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r5.zwzz, r6.xyxx + mov r2.y, r5.y +else + mov r2.y, r5.y +endif +ld r4.xy, r4.yyyy, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r4.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.zwzz, r6.xyxx +endif +ld r5.zw, r4.zzzz, T0[0].zwyx +if_nz r1.x + ishl r6.xy, r5.wzww, l(8, 8, 0, 0) + ushr r6.zw, r5.wwwz, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.zw, r6.wwwz, r6.yyyx + mov r5.yz, r5.wwzw +else + mov r5.yz, r5.wwzw +endif +iadd r2.w, r0.x, l(17) +ld r4.zw, r4.wwww, T0[0].zwyx +if_nz r1.x + ishl r6.xy, r4.wzww, l(8, 8, 0, 0) + ushr r6.zw, r4.wwwz, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.wwwz, r6.yyyx + mov r6.y, r4.w +else + mov r6.y, r4.w +endif +ld r6.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r6.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r8.xy, r6.zwzz, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.zw, r7.xxxy, r8.xxxy +endif +bfi r3.y, l(16), l(0), r1.y, r2.z +store_uav_typed U0[0].xyzw, r7.zzzz, r3.xyxx +store_uav_typed U0[0].xyzw, r7.wwww, r2.xyxx +iadd r8.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r6.x, l(16), l(0), r4.x, r5.z +store_uav_typed U0[0].xyzw, r8.xxxx, r6.xyxx +iadd r2.x, r0.z, r7.z +ushr r1.y, r1.y, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r7.y, l(16), l(16), r3.z, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r7.xyzw +iadd r2.yw, r2.xxxx, l(0, 1, 0, 2) +ushr r1.y, r3.z, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.wwww, r1.yyyy +ushr r1.y, r4.x, l(16) +bfi r7.y, l(16), l(16), r4.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r7.xyzw +ushr r1.y, r4.y, l(16) +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.zzzz, r1.yyyy +ushr r1.y, r4.z, l(16) +bfi r7.y, l(16), l(16), r6.z, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r7.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r2.z, r3.w +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r5.xyxx +bfi r6.z, l(16), l(0), r5.z, r6.z +store_uav_typed U0[0].xyzw, r1.wwww, r6.zwzz +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zyxw +if_nz r1.x + ishl r2.xy, r1.zyzz, l(8, 8, 0, 0) + ushr r2.zw, r1.zzzy, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.wwzw, r2.yyxy + mov r2.x, r1.z +else + mov r2.x, r1.z +endif +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.zw, r3.xxxx, T0[0].zwxy +if_nz r1.x + ishl r2.zw, r1.zzzw, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r1.zwzz, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.zw, r2.zzzw, r4.xxxy +endif +ld r2.zw, r3.yyyy, T0[0].zwyx +if_nz r1.x + ishl r3.xy, r2.wzww, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r2.wzww, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r3.yyyx, r4.yyyx + mov r0.x, r2.w +else + mov r0.x, r2.w +endif +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r3.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r3.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.xy, r4.zwzz, r4.xyxx +endif +ld r3.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.xy, r3.zwzz, l(8, 8, 0, 0) + ushr r4.zw, r3.zzzw, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r3.zw, r4.zzzw, r4.xxxy + mov r2.w, r3.w +else + mov r2.w, r3.w +endif +iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r5.xy, r4.xxxx, T0[0].xyzw +if_nz r1.x + ishl r5.zw, r5.xxxy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r5.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.xy, r5.zwzz, r6.xyxx +endif +ld r4.xy, r4.yyyy, T0[0].yxzw +if_nz r1.x + ishl r5.zw, r4.yyyx, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.yxyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.xy, r5.wzww, r6.yxyy + mov r3.w, r4.y +else + mov r3.w, r4.y +endif +ld r4.yz, r4.zzzz, T0[0].zyxw +if_nz r1.x + ishl r5.zw, r4.zzzy, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r4.zyzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r4.yz, r5.wwzw, r6.yyxy + mov r6.y, r4.z +else + mov r6.y, r4.z +endif +ld r4.zw, r4.wwww, T0[0].zwxy +if_nz r1.x + ishl r5.zw, r4.zzzw, l(0, 0, 8, 8) + and r5.zw, r5.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r5.zzzw, r6.zzzw +endif +bfi r2.y, l(16), l(0), r1.y, r0.x +store_uav_typed U0[0].xyzw, r8.yyyy, r2.xyxx +store_uav_typed U0[0].xyzw, r8.zzzz, r2.zwzz +bfi r6.x, l(16), l(0), r5.x, r4.x +store_uav_typed U0[0].xyzw, r8.wwww, r6.xyxx +iadd r2.x, r0.z, r8.y +ushr r1.y, r1.y, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.y, r1.z, l(16) +bfi r6.y, l(16), l(16), r3.x, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r6.xyzw +iadd r2.yz, r2.xxxx, l(0, 1, 2, 0) +ushr r1.y, r3.x, l(16) +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r1.yyyy +ushr r1.y, r5.x, l(16) +bfi r6.y, l(16), l(16), r5.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +ushr r1.y, r5.y, l(16) +bfi r5.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r1.yyyy +ushr r1.y, r4.y, l(16) +bfi r5.y, l(16), l(16), r4.z, r1.y +store_uav_typed U0[0].xyzw, r2.zzzz, r5.xyzw +iadd r1.y, r0.z, r2.x +bfi r1.z, l(16), l(0), r0.x, r3.y +store_uav_typed U0[0].xyzw, r1.yyyy, r1.wzww +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +store_uav_typed U0[0].xyzw, r1.zzzz, r3.zwzz +bfi r4.z, l(16), l(0), r4.x, r4.z +store_uav_typed U0[0].xyzw, r1.wwww, r4.zwzz +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].yxzw +if_nz r1.x + ishl r3.zw, r3.yyyx, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.yxyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.wzww, r4.yxyy + mov r4.x, r3.y +else + mov r4.x, r3.y +endif +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r3.yz, r2.xxyx, l(0, 8, 8, 0) + and r3.yz, r3.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r3.yzyy, r4.zwzz +endif +ld r3.yz, r2.zzzz, T0[0].zyxw +if_nz r1.x + ishl r4.zw, r3.zzzy, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r3.zyzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.yz, r4.wwzw, r5.yyxy + mov r0.x, r3.z +else + mov r0.x, r3.z +endif +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r4.zw, r2.zzzw, l(0, 0, 8, 8) + and r4.zw, r4.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r5.xy, r2.zwzz, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r4.zzzw, r5.xxxy +endif +iadd r5.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r4.zw, r5.xxxx, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r4.zwzz, l(8, 8, 0, 0) + ushr r6.zw, r4.zzzw, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r4.zw, r6.zzzw, r6.xxxy + mov r3.z, r4.w +else + mov r3.z, r4.w +endif +ld r5.xy, r5.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r5.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r5.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r5.xy, r6.zwzz, r6.xyxx +endif +ld r6.xy, r5.zzzz, T0[0].yxzw +if_nz r1.x + ishl r6.zw, r6.yyyx, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.yxyy, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.wzww, r7.yxyy + mov r4.w, r6.y +else + mov r4.w, r6.y +endif +iadd r0.w, r0.w, l(17) +ld r5.zw, r5.wwww, T0[0].zwyx +if_nz r1.x + ishl r6.yz, r5.wwzw, l(0, 8, 8, 0) + and r6.yz, r6.yyzy, l(0, 0xff00ff00, 0xff00ff00, 0) + ushr r7.xy, r5.wzww, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r5.zw, r6.zzzy, r7.yyyx + mov r7.y, r5.w +else + mov r7.y, r5.w +endif +ld r6.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r7.zw, r6.yyyz, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r6.yzyy, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.yz, r7.zzwz, r8.xxyx +endif +bfi r4.y, l(16), l(0), r3.x, r0.x +store_uav_typed U0[0].xyzw, r1.yyyy, r4.xyxx +store_uav_typed U0[0].xyzw, r1.zzzz, r3.yzyy +bfi r7.x, l(16), l(0), r5.x, r6.x +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.y, r0.z, r1.y +ushr r0.w, r3.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.xxxx, r0.wwww +ushr r0.w, r2.x, l(16) +bfi r1.y, l(16), l(16), r2.z, r0.w +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +ushr r0.w, r2.z, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.wwww, r0.wwww +ushr r0.w, r5.x, l(16) +bfi r3.y, l(16), l(16), r5.y, r0.w +store_uav_typed U0[0].xyzw, r1.xxxx, r3.xyzw +ushr r0.w, r5.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.zzzz, r0.wwww +ushr r0.w, r5.z, l(16) +bfi r3.y, l(16), l(16), r6.y, r0.w +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xyzw +iadd r0.y, r0.z, r0.y +bfi r2.x, l(16), l(0), r0.x, r2.w +store_uav_typed U0[0].xyzw, r0.yyyy, r2.yxyy +iadd r0.xz, r0.yyyy, l(1, 0, 2, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.zwzz +bfi r6.y, l(16), l(0), r6.x, r6.y +store_uav_typed U0[0].xyzw, r0.zzzz, r6.yzyy +ret +// Approximately 549 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..c51f37ed733910b853d4ca98c0d94b6ede41d06d GIT binary patch literal 7188 zcmb`L&u?5;700iy>v1x1n;&f{3crRpja*BhBrO$+Q1x(J6Qlqo4pCT*oOpS?tPJ|Gi`g{me>R(Wsdn|;n ztDRH3{kae>EWW(-&&d$L{YOp1@C~(zspYdQ`m-jUd~)$w=02-7m)ddlGiu1YYEey; zCC@{NhUJ(!%ilEMc{kja7u0%uq*-ov+JnyR!Oe|M`+9F>wcYRC+_>5a_3714e-JKr zE>_Uen#;=q=DE=wTwNQZ>koPxE7v;hTiw;cT6?Y2 zy|y+8H@oYD)7YFSZKmMcP}YAq!e+nwvrhZU_1@K2`z6uyBC2>4j4?7NRo(Y)zy17b zyR*L9U0Hubxz=-h>dQ*a=p9$P;}&$T_rrI(S2ue7-j4>YxeL#=&YfRA-&$T6iHp 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z2yw=?a{_YN-e*2H4_eCp?9oa0&#tYbw@@t!`3&p3K;zoAo?$Z6Tg{ZKeSAFZA%|dByp{RnIrir+jPvUN~~Z^&=K~kT8e9QO^;u=uf1-l`{=S|9yQATy=ZbHugcGs-3G)b-BCJ1N(wGqyvHAhD?O zlpM3vd2DAX?UP)4EAy9Jd;M0+%OCkZ!6vc#OIj0)?OgLB>dS+K=Z(jVh$nUGMcLd*&7t~IuaUUL68z+1t=i>jP$>%=p7|#Cz6enrx literal 0 HcmV?d00001 diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h new file mode 100644 index 000000000..d3931448f --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h @@ -0,0 +1,603 @@ +// generated from `xb buildhlsl` +// source: texture_load_32bpb_3x.cs.hlsl +const uint8_t texture_load_32bpb_3x_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x17, 0x67, 0x97, 0x35, 0xB3, 0xCC, 0x0F, 0x9B, + 0x25, 0xBD, 0xC0, 0x8C, 0x24, 0xBC, 0xB6, 0xDF, 0x01, 0x00, 0x00, 0x00, + 0x14, 0x1C, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x48, 0x04, 0x00, 0x00, + 0x78, 0x1B, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.txt new file mode 100644 index 000000000..9cb2fd884 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.txt @@ -0,0 +1,233 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(2) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r0.w, CB0[0][1].w, l(1) + if_nz r0.w + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r0.w, r1.x, l(0x0ffffffe) + imad r0.w, r2.y, r0.w, r2.x + ibfe r1.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r0.w, r0.w, r1.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r2.y, r2.z + bfi r1.w, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + iadd r1.x, CB0[0][1].y, l(31) + and r1.x, r1.x, l(-32) + imad r1.x, vThreadID.z, r1.x, vThreadID.y + imad r0.w, r1.x, CB0[0][0].y, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][1].w, l(1) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx +ld r4.xy, r2.yyyy, T0[0].xyzw +ld r4.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw + mov r1.x, r4.x +else + mov r1.x, r4.x +endif +iadd r0.w, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.wxww +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz +ld r2.xy, r2.wwww, T0[0].xyzw +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r2.zw, r5.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw + mov r1.x, r2.y +else + mov r1.x, r2.y +endif +iadd r1.yw, r0.yyyy, l(0, 1, 0, 2) +store_uav_typed U0[0].xyzw, r1.yyyy, r1.zxzz +store_uav_typed U0[0].xyzw, r1.wwww, r2.zwzz +ld r1.xy, r5.yyyy, T0[0].xyzw +ld r1.zw, r5.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw + mov r4.x, r1.x + mov r2.y, r1.w +else + mov r4.x, r1.x + mov r2.y, r1.w +endif +iadd r0.xy, r0.wwww, l(1, 2, 0, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yxyy +store_uav_typed U0[0].xyzw, r0.yyyy, r1.yzyy +iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyxx +ld r0.xw, r5.wwww, T0[0].xzwy +if_nz r3.x + ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r1.zzzw, r1.xxxy +endif +if_nz r3.y + ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) + bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy +endif +store_uav_typed U0[0].xyzw, r0.yyyy, r0.xwxx +ret +// Approximately 182 instruction slots used diff --git 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.txt new file mode 100644 index 000000000..e45a96e83 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.txt @@ -0,0 +1,278 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r1.x, CB0[0][1].w, l(1) + if_nz r1.x + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r1.x, r1.x, l(0x0ffffffe) + imad r1.x, r2.y, r1.x, r2.x + ibfe r1.z, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r1.y, r1.z + ishl r1.y, vThreadID.y, l(8) + ishr r1.y, r1.y, l(6) + iadd r1.z, r2.y, r2.z + and r1.w, r1.z, l(1) + ishr r2.x, r0.x, l(3) + bfi r1.z, l(1), l(1), r1.z, l(0) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(1), r1.z, l(0) + iadd r1.z, r1.z, r1.w + and r1.yw, r1.yyyy, l(0, 16, 0, 8) + bfi r2.xy, l(22, 22, 0, 0), l(8, 11, 0, 0), r1.xxxx, l(0, 0, 0, 0) + imad r1.xy, r1.yyyy, l(2, 16, 0, 0), r2.xyxx + bfi r1.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r1.wwww, r1.xyxx + bfi r1.xy, l(2, 2, 0, 0), l(6, 9, 0, 0), vThreadID.zzzz, r1.xyxx + ubfe r1.w, l(3), l(6), r1.x + and r2.x, r1.z, l(4) + bfi r1.z, l(2), l(8), r1.z, l(0) + imad r1.z, r1.w, l(32), r1.z + imad r1.z, r2.x, l(4), r1.z + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xyxx + bfi r1.y, l(9), l(3), r1.z, r1.y + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.y, r1.z, r2.x, r1.y + ishl r2.xy, vThreadID.yyyy, l(2, 7, 0, 0) + ishl r1.z, r2.x, l(1) + and r1.z, r1.z, l(96) + bfi r2.z, l(25), l(7), r1.y, r1.z + and r2.xy, r2.xyxx, l(8, 2048, 0, 0) + iadd r2.z, r2.z, r2.x + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r3.xy, r1.zzzz, l(3, 2, 0, 0) + bfi r1.yz, l(0, 25, 25, 0), l(0, 10, 9, 0), r1.yyyy, r3.xxyx + imad r1.yz, r2.xxxx, l(0, 8, 4, 0), r1.yyzy + bfi r1.yz, l(0, 1, 1, 0), l(0, 7, 6, 0), vThreadID.yyyy, r1.yyzy + bfi r1.y, l(12), l(0), r2.y, r1.y + and r1.z, r1.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.z, r1.y + endif +else + iadd r1.y, CB0[0][1].y, l(31) + and r1.y, r1.y, l(-32) + imad r1.y, vThreadID.z, r1.y, vThreadID.y + imad r1.x, r1.y, CB0[0][0].y, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ld r2.xy, r2.yyyy, T0[0].xyzw +ld r3.xy, r2.zzzz, T0[0].xyzw +ld r2.zw, r2.wwww, T0[0].zwxy +iadd r4.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r3.zw, r4.xxxx, T0[0].zwxy +ld r4.xy, r4.yyyy, T0[0].xyzw +ld r5.xy, r4.zzzz, T0[0].xyzw +ld r4.zw, r4.wwww, T0[0].zwxy +ushr r5.zw, r1.zzzz, l(0, 0, 8, 16) +bfi r6.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.zzzz, r1.xxxx +bfi r6.y, l(16), l(0), r5.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r6.xyzw +iadd r6.xyzw, r0.yyyy, l(1, 2, 3, 4) +ushr r5.zw, r3.xxxy, l(0, 0, 24, 16) +bfi r5.z, l(24), l(8), r5.z, r2.y +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.zzzz +ushr r8.xyz, r3.wwzw, l(8, 16, 16, 0) +bfi r7.y, l(8), l(24), r8.x, r2.w +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r8.yyyy, r4.yyyy +ushr r8.xyw, r5.yxyx, l(24, 8, 0, 24) +bfi r3.y, l(24), l(8), r8.x, r5.x +bfi r7.y, l(16), l(16), r4.z, r3.y +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +iadd r3.y, r0.z, r0.y +ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) +ishl r1.x, r1.y, l(16) +ushr r1.x, r1.x, l(8) +iadd r1.x, r1.x, r5.x +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx +ubfe r1.x, l(16), l(8), r1.w +ushr r6.xy, r2.yyyy, l(8, 24, 0, 0) +bfi r7.y, l(16), l(16), r6.x, r1.x +store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw +iadd r1.xy, r3.yyyy, l(1, 2, 0, 0) +imad r2.y, r5.w, l(256), r6.y +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy +ushr r2.y, r2.w, l(24) +ishl r3.zw, r3.zzzw, l(0, 0, 16, 24) +ushr r3.zw, r3.zzzw, l(0, 0, 8, 8) +iadd r2.y, r2.y, r3.z +bfi r7.y, l(8), l(24), r4.x, r2.y +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +ubfe r1.x, l(16), l(8), r4.x +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r8.yyyy, r1.xxxx +ushr r1.x, r4.z, l(16) +imad r1.x, r1.x, l(256), r8.w +bfi r7.y, l(8), l(24), r4.z, r1.x +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw +iadd r1.x, r0.z, r3.y +ishl r1.y, r1.z, l(24) +ushr r1.y, r1.y, l(8) +iadd r1.y, r1.y, r5.z +bfi r7.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r1.yyyy, r1.wwww +bfi r7.y, l(16), l(16), r3.x, r2.x +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +iadd r1.yz, r1.xxxx, l(0, 1, 2, 0) +ubfe r1.w, l(8), l(16), r3.x +bfi r2.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.wwww, r2.zzzz +iadd r1.w, r3.w, r8.z +bfi r2.y, l(24), l(0), r1.w, r4.x +store_uav_typed U0[0].xyzw, r1.yyyy, r2.xyzw +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r5.yyyy, r4.yyyy +ubfe r1.y, l(8), l(16), r5.y +bfi r2.y, l(8), l(0), r1.y, r4.w +store_uav_typed U0[0].xyzw, r1.zzzz, r2.xyzw +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(9) +endif +ld r1.xy, r0.wwww, T0[0].xyzw +iadd r2.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ld r2.xy, r2.yyyy, T0[0].xyzw +ld r3.xy, r2.zzzz, T0[0].xyzw +ld r2.zw, r2.wwww, T0[0].zwxy +iadd r4.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r0.xw, r4.xxxx, T0[0].xzwy +ld r3.zw, r4.yyyy, T0[0].zwxy +ld r4.xy, r4.zzzz, T0[0].xyzw +ld r4.zw, r4.wwww, T0[0].zwxy +ushr r5.xy, r1.zzzz, l(8, 16, 0, 0) +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r5.xxxx, r1.xxxx +bfi r7.y, l(16), l(0), r5.y, r2.x +store_uav_typed U0[0].xyzw, r6.zzzz, r7.xyzw +ushr r5.xy, r3.xyxx, l(24, 16, 0, 0) +bfi r5.x, l(24), l(8), r5.x, r2.y +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.yyyy, r5.xxxx +ushr r5.xzw, r0.wwwx, l(8, 0, 16, 16) +bfi r7.y, l(8), l(24), r5.x, r2.w +store_uav_typed U0[0].xyzw, r6.wwww, r7.xyzw +iadd r3.y, r0.y, l(5) +bfi r7.xzw, l(16, 0, 16, 16), l(0, 0, 0, 0), r5.zzzz, r3.wwww +ushr r6.xyw, r4.yxyx, l(24, 8, 0, 24) +bfi r4.x, l(24), l(8), r6.x, r4.x +bfi r7.y, l(16), l(16), r4.z, r4.x +store_uav_typed U0[0].xyzw, r3.yyyy, r7.xyzw +iadd r0.y, r0.z, r6.z +ushr r5.xz, r1.xxyx, l(24, 0, 16, 0) +ishl r1.x, r1.y, l(16) +ushr r1.x, r1.x, l(8) +iadd r1.x, r1.x, r5.x +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r1.wwww, r1.xxxx +ubfe r1.x, l(16), l(8), r1.w +ushr r6.xz, r2.yyyy, l(8, 0, 24, 0) +bfi r7.y, l(16), l(16), r6.x, r1.x +store_uav_typed U0[0].xyzw, r0.yyyy, r7.xyzw +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +imad r2.y, r5.y, l(256), r6.z +bfi r7.xzw, l(8, 0, 8, 8), l(24, 0, 24, 24), r2.zzzz, r2.yyyy +ushr r2.y, r2.w, l(24) +ishl r0.xw, r0.xxxw, l(16, 0, 0, 24) +ushr r0.xw, r0.xxxw, l(8, 0, 0, 8) +iadd r0.x, r0.x, r2.y +bfi r7.y, l(8), l(24), r3.z, r0.x +store_uav_typed U0[0].xyzw, r1.xxxx, r7.xyzw +ubfe r0.x, l(16), l(8), r3.z +bfi r7.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r6.yyyy, r0.xxxx +ushr r0.x, r4.z, l(16) +imad r0.x, r0.x, l(256), r6.w +bfi r7.y, l(8), l(24), r4.z, r0.x +store_uav_typed U0[0].xyzw, r1.yyyy, r7.xyzw +iadd r0.x, r0.z, r0.y +ishl r0.y, r1.z, l(24) +ushr r0.y, r0.y, l(8) +iadd r0.yw, r0.yyyw, r5.zzzw +bfi r1.xzw, l(24, 0, 24, 24), l(0, 0, 0, 0), r0.yyyy, r1.wwww +bfi r1.y, l(16), l(16), r3.x, r2.x +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +ubfe r1.x, l(8), l(16), r3.x +bfi r1.xzw, l(8, 0, 8, 8), l(0, 0, 0, 0), r1.xxxx, r2.zzzz +bfi r1.y, l(24), l(0), r0.w, r3.z +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.yyyy, r3.wwww +ubfe r0.y, l(8), l(16), r4.y +bfi r1.y, l(8), l(0), r0.y, r4.w +store_uav_typed U0[0].xyzw, r0.zzzz, r1.xyzw +ret +// Approximately 227 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..bed5219091680b289951fa1fda3e09b26a8ac4fa GIT binary patch literal 10296 zcmcJU&2L^u6~?c}jU78_^HHjzK;b0`CA9=fQodB7YMP`bNC8TmhOn}n_-$+&;?#aa zDi&3hMI%uJQiZBYRALiFsyJz$-Q-ea;ovU zcjnA<&YU^(+{xP$=Z+nJ>DpU^LvKH}`uyMCdFPi0fBnK(RaIX-R8`xgzo>TT0lll8 zRD1h#RdxErv$KC0uPW^Rsiw#3YieWL=8iMzH|lu!;S-;w@8fEMs@p;7oodLtYC%nq zHO^g$9_wfNEWgzQ?_1fedqSa!k!E>$I6oS`Ji59%oWHcPusFZAa&`5>uqwM3hijwi z-0)0edPBH>a)gXRo z*!`J56609!RK9nspWI?{m<^G5-1?0AKdJt$;(JMUgZr?1U3LfW!|s;sr~&*UeR(N2 z;o?>8!u^6eD9AEjtmE}u%ICA(4N2+hkef?Y1A%gyP@jiF**>k53RMmGx0Dq9d_qSJL z->a(0*`MYoq~QuM&TZG&E1SnooM1#8!`NSsG%x9|$L3YytE%!P>1mDqLS;qm57elN zC#q^7?_q znbh}Gvi)@Rz__2EmitH4Pmf+$5P+ES2z29oHYNgs{WKPC#IShC$={j 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+const uint8_t texture_load_depth_unorm_3x_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0x1D, 0xB7, 0x62, 0x96, 0x02, 0x41, 0x04, 0xF4, + 0xBA, 0x30, 0x1C, 0x9B, 0xAF, 0x77, 0xDE, 0xE6, 0x01, 0x00, 0x00, 0x00, + 0x3C, 0x1F, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x48, 0x04, 0x00, 0x00, + 0xA0, 0x1E, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xEC, 0x03, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0xC4, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 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xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 8 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(2) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r0.w, CB0[0][1].w, l(1) + if_nz r0.w + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r0.w, r1.x, l(0x0ffffffe) + imad r0.w, r2.y, r0.w, r2.x + ibfe r1.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r0.w, r0.w, r1.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r2.y, r2.z + bfi r1.w, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + iadd r1.x, CB0[0][1].y, l(31) + and r1.x, r1.x, l(-32) + imad r1.x, vThreadID.z, r1.x, vThreadID.y + imad r0.w, r1.x, CB0[0][0].y, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][1].w, l(1) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r4.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r4.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyxx +ld r4.xy, r2.yyyy, T0[0].xyzw +ld r4.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r4.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r4.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r4.xyzw, l(16, 16, 16, 16) + bfi r4.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r4.xyzw, r5.xyzw +endif +ushr r4.xyzw, r4.xyzw, l(8, 8, 8, 8) +ushr r5.xyzw, r4.xyzw, l(23, 23, 23, 23) +iadd r4.xyzw, r4.xyzw, r5.xyzw +utof r4.xyzw, r4.xyzw +mul r4.xyzw, r4.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r0.w, r0.z, r0.y +mov r5.xzw, r1.wwww +mov r5.y, r4.x +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +store_uav_typed U0[0].xyzw, r0.zzzz, r4.zwzz +ld r2.xy, r2.wwww, T0[0].xyzw +iadd r5.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r2.zw, r5.xxxx, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r2.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r2.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r2.xyzw, l(16, 16, 16, 16) + bfi r2.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r2.xyzw, r6.xyzw +endif +ushr r2.xyzw, r2.xyzw, l(8, 8, 8, 8) +ushr r6.xyzw, r2.xyzw, l(23, 23, 23, 23) +iadd r2.xyzw, r2.xyzw, r6.xyzw +utof r2.xyzw, r2.xyzw +mul r2.xyzw, r2.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r1.xy, r0.yyyy, l(1, 2, 0, 0) +mov r6.xzw, r1.zzzz +mov r6.y, r2.y +store_uav_typed U0[0].xyzw, r1.xxxx, r6.xyzw +store_uav_typed U0[0].xyzw, r1.yyyy, r2.zwzz +ld r1.xy, r5.yyyy, T0[0].xyzw +ld r1.zw, r5.zzzz, T0[0].zwxy +if_nz r3.x + ishl r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r6.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r6.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r6.xyzw +endif +ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r6.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r6.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xwyz, l(0.000000, 0.000000, 0.000000, 0.000000) +iadd r0.xy, r0.wwww, l(1, 2, 0, 0) +mov r4.xzw, r4.yyyy +mov r4.y, r1.x +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +store_uav_typed U0[0].xyzw, r0.yyyy, r1.zwzz +iadd r0.xy, r0.zzzz, l(1, 2, 0, 0) +mov r1.xzw, r2.xxxx +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ld r0.xw, r5.wwww, T0[0].xzwy +if_nz r3.x + ishl r1.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxw, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r1.zzzw, r1.xxxy +endif +if_nz r3.y + ushr r1.xy, r0.xwxx, l(16, 16, 0, 0) + bfi r0.xw, l(16, 0, 0, 16), l(16, 0, 0, 16), r0.xxxw, r1.xxxy +endif +ushr r1.xyzw, r0.xwxx, l(8, 8, 8, 8) +ushr r2.xyzw, r1.wyww, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r2.xyzw +utof r1.xyzw, r1.xyzw +mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +ret +// Approximately 203 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.cso index 20face715dde6b57dbfff2012a7f4bfcbd9ff444..0b8b3dfbc500f1c5608f71e5796648333fdb1880 100644 GIT binary patch delta 251 zcmeyP-lA#f65-@*?N-|SF`W6mL|pyxbL#3Wj0_A6Eg}pItU%fXh&5Ok7%YI;1BhR2 zG?ZrHoWak)5D1iiwmFm~nP;+sfP|(vP$4pwV_;za#2~-`GR%z+K{HSOE2PiMz|dd} z$D2P2@G}{PGB9v~G%z7)U~)h;6l4M1;K>JtgeM8>pqe%Lqk!;aA7L5EQlL_h2S5Pi P29U8DKrA!4QMeiau>~gh delta 138 zcmZqC{G)E@65-@5d-uGi?b+#1IfLMctfx!ZZJ%Bi2 zqoFhlrvN_#Lm*K8$mUR%WS+@?1ax>A85)e?c=ADE;msa`e;Bb!=`$8i{wOTWss=P$ JYBHxtH2|J@A*28R diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h index 4348a159b..12b58d372 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h @@ -1,11 +1,11 @@ // generated from `xb buildhlsl` // source: texture_load_depth_unorm.cs.hlsl const uint8_t texture_load_depth_unorm_cs[] = { - 0x44, 0x58, 0x42, 0x43, 0x1D, 0xDD, 0xCF, 0x29, 0x3D, 0xCD, 0x97, 0xE5, - 0x1E, 0x7F, 0x82, 0x3F, 0xB7, 0xBF, 0x63, 0x28, 0x01, 0x00, 0x00, 0x00, - 0xFC, 0x13, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x44, 0x58, 0x42, 0x43, 0x3B, 0x46, 0x75, 0x83, 0xF1, 0x57, 0x03, 0xEF, + 0x18, 0x5E, 0x7F, 0xC7, 0xCE, 0x27, 0x27, 0x04, 0x01, 0x00, 0x00, 0x00, + 0x84, 0x14, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x48, 0x04, 0x00, 0x00, - 0x60, 0x13, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xEC, 0x03, 0x00, 0x00, + 0xE8, 0x13, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xEC, 0x03, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, 0xC4, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, @@ -92,8 +92,8 @@ const uint8_t texture_load_depth_unorm_cs[] = { 0x65, 0x72, 0x20, 0x31, 0x30, 0x2E, 0x31, 0x00, 0x49, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x4F, 0x53, 0x47, 0x4E, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, 0x10, 0x0F, 0x00, 0x00, - 0x51, 0x00, 0x05, 0x00, 0xC4, 0x03, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, + 0x08, 0x00, 0x00, 0x00, 0x53, 0x48, 0x45, 0x58, 0x98, 0x0F, 0x00, 0x00, + 0x51, 0x00, 0x05, 0x00, 0xE6, 0x03, 0x00, 0x00, 0x6A, 0x08, 0x00, 0x01, 0x59, 0x00, 0x00, 0x07, 0x46, 0x8E, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x58, 0x08, 0x00, 0x07, 0x46, 0x7E, 0x30, 0x00, @@ -357,75 +357,86 @@ const uint8_t texture_load_depth_unorm_cs[] = { 0x15, 0x00, 0x00, 0x01, 0x55, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x02, 0x40, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, - 0x08, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x05, - 0xF2, 0x00, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x0A, 0xF2, 0x00, 0x10, 0x00, - 0x01, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, 0x01, 0x00, 0x00, 0x00, - 0x02, 0x40, 0x00, 0x00, 0x01, 0x00, 0x80, 0x33, 0x01, 0x00, 0x80, 0x33, - 0x01, 0x00, 0x80, 0x33, 0x01, 0x00, 0x80, 0x33, 0xA4, 0x00, 0x00, 0x08, - 0xF2, 0xE0, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x56, 0x05, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x46, 0x0E, 0x10, 0x00, - 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a720e2af3..e8c70eb23 100644 --- a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.txt +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.txt @@ -138,6 +138,8 @@ if_nz r2.y bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r3.xyzw endif ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r3.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r3.xyzw utof r1.xyzw, r1.xyzw mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw @@ -157,8 +159,10 @@ if_nz r2.y bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r2.xyzw endif ushr r1.xyzw, r1.xyzw, l(8, 8, 8, 8) +ushr r2.xyzw, r1.xyzw, l(23, 23, 23, 23) +iadd r1.xyzw, r1.xyzw, r2.xyzw utof r1.xyzw, r1.xyzw mul r1.xyzw, r1.xyzw, l(0.000000, 0.000000, 0.000000, 0.000000) store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw ret -// Approximately 113 instruction slots used +// Approximately 117 instruction slots used diff --git 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.txt new file mode 100644 index 000000000..61f7bde22 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.txt @@ -0,0 +1,410 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r0.w, CB0[0][1].w, l(1) + if_nz r0.w + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r0.w, r1.x, l(0x0ffffffe) + imad r0.w, r2.y, r0.w, r2.x + ibfe r1.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r0.w, r0.w, r1.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r2.y, r2.z + bfi r1.w, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + iadd r1.x, CB0[0][1].y, l(31) + and r1.x, r1.x, l(-32) + imad r1.x, vThreadID.z, r1.x, vThreadID.y + imad r0.w, r1.x, CB0[0][0].y, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][1].w, l(1) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r4.x, r1.x +else + mov r4.x, r1.x +endif +ushr r4.y, r4.x, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) +ubfe r4.yz, l(0, 6, 5, 0), l(0, 4, 27, 0), r4.xxxx +iadd r3.zw, r3.zzzw, r4.yyyz +ishl r0.w, r4.x, l(11) +and r2.x, r4.x, l(0x001f0000) +bfi r0.w, l(21), l(0), r2.x, r0.w +iadd r4.xzw, r0.wwww, r3.zzzz +iadd r4.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) +ushr r1.x, r1.y, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.w, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.y, r0.w +iadd r5.xzw, r0.wwww, r3.zzzz +iadd r5.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +ushr r1.x, r1.z, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.w, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.y, r0.w +iadd r5.xzw, r0.wwww, r3.zzzz +iadd r5.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.w, r0.z, r0.y +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww +iadd r1.xy, r1.xyxx, r3.zwzz +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r5.xzw, r1.zzzz, r1.xxxx +iadd r5.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw + mov r2.x, r1.x +else + mov r2.x, r1.x +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +ushr r2.y, r2.x, l(21) +bfi r2.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r2.xxyx, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r2.xxxx +iadd r2.yz, r2.yyzy, r3.zzwz +ishl r3.z, r2.x, l(11) +and r2.x, r2.x, l(0x001f0000) +bfi r2.x, l(21), l(0), r2.x, r3.z +iadd r6.xzw, r2.xxxx, r2.yyyy +iadd r6.y, r2.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw +ushr r1.x, r1.y, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.yyyy +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r2.z, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r2.z +iadd r6.xzw, r1.yyyy, r2.xxxx +iadd r6.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +ushr r1.x, r1.z, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r1.y, r1.z, l(11) +and r1.z, r1.z, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.z, r1.y +iadd r6.xzw, r1.yyyy, r2.xxxx +iadd r6.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw +iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww +iadd r1.xy, r1.xyxx, r2.xyxx +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r7.xzw, r1.zzzz, r1.xxxx +iadd r7.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw + mov r4.x, r1.x +else + mov r4.x, r1.x +endif +ushr r4.y, r4.x, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r4.xxxy, l(0, 0, 0, 0) +ubfe r5.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r4.xxxx +iadd r3.zw, r3.zzzw, r5.xxxy +ishl r0.x, r4.x, l(11) +and r2.x, r4.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r2.x, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +ushr r1.x, r1.y, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.yyyx, l(0, 0, 0, 0) +ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r3.zw, r3.zzzw, r4.xxxy +ishl r0.x, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r0.x, l(21), l(0), r1.y, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw +ushr r1.x, r1.z, l(21) +bfi r3.zw, l(0, 0, 10, 27), l(0, 0, 6, 5), r1.zzzx, l(0, 0, 0, 0) +ubfe r4.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.zzzz +iadd r3.zw, r3.zzzw, r4.xxxy +ishl r0.x, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.x, l(21), l(0), r1.y, r0.x +iadd r7.xzw, r0.xxxx, r3.zzzz +iadd r7.y, r3.w, l(0xffff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw +iadd r0.x, r0.y, l(5) +ushr r1.x, r1.w, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.wwww +iadd r1.xy, r1.xyxx, r3.zwzz +ishl r1.z, r1.w, l(11) +and r1.w, r1.w, l(0x001f0000) +bfi r1.z, l(21), l(0), r1.w, r1.z +iadd r4.xzw, r1.zzzz, r1.xxxx +iadd r4.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw + mov r0.x, r1.x +else + mov r0.x, r1.x +endif +ushr r0.y, r0.x, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r0.y, r0.x, l(11) +and r0.x, r0.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r0.x, r0.y +iadd r4.xzw, r0.xxxx, r2.xxxx +iadd r4.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw +ushr r1.x, r1.y, l(21) +bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.yxyy, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.yyyy +iadd r0.xy, r0.xyxx, r2.xyxx +ishl r2.x, r1.y, l(11) +and r1.y, r1.y, l(0x001f0000) +bfi r1.y, l(21), l(0), r1.y, r2.x +iadd r4.xzw, r0.xxxx, r1.yyyy +iadd r4.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +iadd r0.x, r0.w, l(5) +ushr r1.x, r1.z, l(21) +bfi r2.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.zxzz, l(0, 0, 0, 0) +ubfe r3.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r1.zzzz +iadd r2.xy, r2.xyxx, r3.zwzz +ishl r0.y, r1.z, l(11) +and r1.y, r1.z, l(0x001f0000) +bfi r0.y, l(21), l(0), r1.y, r0.y +iadd r4.xzw, r0.yyyy, r2.xxxx +iadd r4.y, r2.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ushr r1.x, r1.w, l(21) +bfi r0.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r1.wxww, l(0, 0, 0, 0) +ubfe r1.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.wwww +iadd r0.xy, r0.xyxx, r1.xyxx +ishl r0.w, r1.w, l(11) +and r1.x, r1.w, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.x, r0.w +iadd r1.xzw, r0.wwww, r0.xxxx +iadd r1.y, r0.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.zzzz, r1.xyzw +ld r0.xy, r2.wwww, T0[0].yxzw +if_nz r3.x + ishl r1.xy, r0.yxyy, l(8, 8, 0, 0) + ushr r1.zw, r0.yyyx, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xy, r1.wzww, r1.yxyy +endif +if_nz r3.y + ushr r1.xy, r0.yxyy, l(16, 16, 0, 0) + bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.yxyy + mov r1.x, r0.y +else + mov r1.x, r0.y +endif +ushr r1.y, r1.x, l(21) +bfi r1.yz, l(0, 10, 27, 0), l(0, 6, 5, 0), r1.xxyx, l(0, 0, 0, 0) +ubfe r2.xy, l(6, 5, 0, 0), l(4, 27, 0, 0), r1.xxxx +iadd r1.yz, r1.yyzy, r2.xxyx +ishl r0.w, r1.x, l(11) +and r1.x, r1.x, l(0x001f0000) +bfi r0.w, l(21), l(0), r1.x, r0.w +iadd r2.xzw, r0.wwww, r1.yyyy +iadd r2.y, r1.z, l(0xffff0000) +store_uav_typed U0[0].xyzw, r6.wwww, r2.xyzw +iadd r0.w, r0.z, l(5) +ushr r0.y, r0.x, l(21) +bfi r1.xy, l(10, 27, 0, 0), l(6, 5, 0, 0), r0.xyxx, l(0, 0, 0, 0) +ubfe r1.zw, l(0, 0, 6, 5), l(0, 0, 4, 27), r0.xxxx +iadd r1.xy, r1.xyxx, r1.zwzz +ishl r0.y, r0.x, l(11) +and r0.x, r0.x, l(0x001f0000) +bfi r0.x, l(21), l(0), r0.x, r0.y +iadd r2.xzw, r0.xxxx, r1.xxxx +iadd r2.y, r1.y, l(0xffff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r2.xyzw +ret +// Approximately 359 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..65569c6b9973d8bd5569bbe1bd97d2035af2047b GIT binary patch literal 27436 zcmeI4&#ztARmYFdZC;WWr%qBT!2CMIrAn_TO56&gS5zHdQWK;AB{n87vF!LYb`$L2 z_o7w|3V4tKMNk2%kU$6_lu4#h|A447CMEv>7K4fbV&DN{gjt_+_vgIzw$HoomoXk> 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x12, 0x00, 0x00, 0x00, +}; diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.txt new file mode 100644 index 000000000..2d0642777 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.txt @@ -0,0 +1,871 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 9 +dcl_thread_group 16, 32, 1 +ishl r0.x, vThreadID.x, l(1) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +ishl r0.yzw, r0.xxyz, l(0, 3, 3, 1) +imul null, r0.w, r0.w, CB0[0][1].y +ishl r0.y, r0.y, l(3) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r0.w, CB0[0][1].w, l(1) + if_nz r0.w + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r0.w, r1.x, l(0x0ffffffe) + imad r0.w, r2.y, r0.w, r2.x + ibfe r1.xz, l(27, 0, 29, 0), l(4, 0, 2, 0), vThreadID.xxxx + imad r0.w, r0.w, r1.y, r1.x + ishl r1.x, vThreadID.y, l(10) + and r1.x, r1.x, l(6144) + bfi r1.x, l(3), l(8), r0.x, r1.x + ishr r1.x, r1.x, l(6) + iadd r1.y, r2.y, r2.z + bfi r1.w, l(1), l(1), r1.y, l(0) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(1), r1.z, l(0) + bfi r1.y, l(1), l(0), r1.y, r1.z + and r1.z, r1.x, l(112) + bfi r2.xy, l(20, 20, 0, 0), l(10, 13, 0, 0), r0.wwww, l(0, 0, 0, 0) + imad r1.zw, r1.zzzz, l(0, 0, 2, 16), r2.xxxy + bfi r1.xz, l(4, 0, 4, 0), l(0, 0, 3, 0), r1.xxxx, r1.zzwz + bfi r1.xz, l(2, 0, 2, 0), l(8, 0, 11, 0), vThreadID.zzzz, r1.xxzx + ubfe r0.w, l(3), l(6), r1.x + and r1.w, r1.y, l(6) + bfi r1.y, l(1), l(8), r1.y, l(0) + imad r0.w, r0.w, l(32), r1.y + imad r0.w, r1.w, l(4), r0.w + bfi r1.xy, l(1, 1, 0, 0), l(4, 7, 0, 0), vThreadID.yyyy, r1.xzxx + bfi r0.w, l(9), l(3), r0.w, r1.y + bfi r0.w, l(6), l(0), r1.x, r0.w + else + ibfe r1.xy, l(27, 29, 0, 0), l(4, 2, 0, 0), vThreadID.xxxx + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.x, r1.z, r2.x, r1.x + ishl r2.xy, vThreadID.yyyy, l(4, 7, 0, 0) + and r2.xy, r2.xyxx, l(224, 2048, 0, 0) + bfi r1.z, l(3), l(2), r0.x, r2.x + ishl r2.x, r2.x, l(1) + bfi r2.x, l(3), l(3), r0.x, r2.x + and r2.x, r2.x, l(480) + bfi r2.z, l(23), l(9), r1.x, r2.x + bfi r2.z, l(4), l(0), r1.z, r2.z + bfi r2.z, l(1), l(4), vThreadID.y, r2.z + ishl r2.xw, r2.xxxx, l(3, 0, 0, 2) + bfi r2.xw, l(23, 0, 0, 23), l(12, 0, 0, 11), r1.xxxx, r2.xxxw + bfi r1.xz, l(4, 0, 4, 0), l(3, 0, 2, 0), r1.zzzz, r2.xxwx + bfi r1.xz, l(1, 0, 1, 0), l(7, 0, 6, 0), vThreadID.yyyy, r1.xxzx + bfi r1.x, l(12), l(0), r2.y, r1.x + and r1.z, r1.z, l(1792) + iadd r1.x, r1.x, r1.z + and r1.z, r1.w, l(2) + iadd r1.y, r1.y, r1.z + bfi r1.y, l(2), l(6), r1.y, l(0) + iadd r1.x, r1.x, r1.y + bfi r0.w, l(6), l(0), r2.z, r1.x + endif +else + ishl r0.x, r0.x, l(2) + iadd r1.x, CB0[0][1].y, l(31) + and r1.x, r1.x, l(-32) + imad r1.x, vThreadID.z, r1.x, vThreadID.y + imad r0.w, r1.x, CB0[0][0].y, r0.x +endif +iadd r0.x, r0.w, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r0.w, CB0[0][1].w, l(1) +ld r1.xy, r0.xxxx, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.zw, r2.xxxx, T0[0].zwxy +ieq r3.xyz, r0.wwww, l(1, 2, 3, 0) +or r3.xy, r3.yzyy, r3.xyxx +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r5.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.w, r1.x, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.x, r0.w, l(1024) +movc r0.w, r2.x, l(1025), r0.w +movc r5.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r5.x +iadd r0.w, r4.x, r0.w +ishl r2.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r2.x +xor r0.w, r5.y, r0.w +iadd r0.w, r4.x, r0.w +ieq r2.x, r4.y, l(1024) +movc r2.x, r2.x, l(1025), r4.y +xor r2.x, r5.z, r2.x +iadd r2.x, r4.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r5.w, r2.x +iadd r2.x, r4.z, r2.x +ishl r2.x, r2.x, l(16) +or r4.xzw, r0.wwww, r2.xxxx +ushr r0.w, r1.x, l(22) +ushr r1.x, r0.w, l(9) +ieq r2.x, r0.w, l(512) +movc r0.w, r2.x, l(513), r0.w +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r2.x, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r2.x +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r4.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.yyyy, r4.xyzw +iadd r4.xyzw, r0.yyyy, l(1, 2, 3, 4) +and r0.w, r1.y, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r1.x, r0.w, l(1024) +movc r0.w, r1.x, l(1025), r0.w +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.y, l(22) +ushr r1.x, r0.w, l(9) +ieq r1.y, r0.w, l(512) +movc r0.w, r1.y, l(513), r0.w +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r3.z +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.y +xor r0.w, r3.w, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.xxxx, r5.xyzw +and r0.w, r1.z, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.w, l(1024) +movc r0.w, r1.x, l(1025), r0.w +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r6.x +iadd r0.w, r5.x, r0.w +ishl r1.x, r0.w, l(5) +ushr r0.w, r0.w, l(5) +or r0.w, r0.w, r1.x +xor r0.w, r6.y, r0.w +iadd r0.w, r5.x, r0.w +ieq r1.x, r5.y, l(1024) +movc r1.x, r1.x, l(1025), r5.y +xor r1.x, r6.z, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.w, r1.x +iadd r1.x, r5.z, r1.x +ishl r1.x, r1.x, l(16) +or r5.xzw, r0.wwww, r1.xxxx +ushr r0.w, r1.z, l(22) +ushr r1.x, r0.w, l(9) +ieq r1.y, r0.w, l(512) +movc r0.w, r1.y, l(513), r0.w +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.w, r0.w, r1.y +iadd r0.w, r1.x, r0.w +ishl r1.y, r0.w, l(6) +ushr r0.w, r0.w, l(3) +or r0.w, r0.w, r1.y +xor r0.w, r1.z, r0.w +iadd r0.w, r1.x, r0.w +or r5.y, r0.w, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.yyyy, r5.xyzw +iadd r0.w, r0.z, r0.y +and r1.x, r1.w, l(2047) +ubfe r5.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r6.xyzw, r5.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r5.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r5.y, l(1024) +movc r1.y, r1.y, l(1025), r5.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r5.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r6.w, r1.y +iadd r1.y, r5.z, r1.y +ishl r1.y, r1.y, l(16) +or r5.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r5.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.wwww, r5.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r5.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r6.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r6.xyzw, r6.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r5.xyzw, r6.xyzw +endif +if_nz r3.y + ushr r5.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r5.xyzw +endif +iadd r5.xyzw, r0.wwww, l(1, 2, 3, 4) +and r2.x, r1.x, l(2047) +ubfe r6.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.y, r2.x, l(1024) +movc r2.x, r2.y, l(1025), r2.x +movc r7.xyzw, r6.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r2.x, r2.x, r7.x +iadd r2.x, r6.x, r2.x +ishl r2.y, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r2.y +xor r2.x, r7.y, r2.x +ieq r2.y, r6.y, l(1024) +movc r2.y, r2.y, l(1025), r6.y +xor r2.y, r7.z, r2.y +iadd r2.xy, r6.xzxx, r2.xyxx +ishl r2.z, r2.y, l(5) +ushr r2.y, r2.y, l(5) +or r2.y, r2.y, r2.z +xor r2.y, r7.w, r2.y +iadd r2.y, r6.z, r2.y +ishl r2.y, r2.y, l(16) +or r6.xzw, r2.yyyy, r2.xxxx +ushr r1.x, r1.x, l(22) +ushr r2.x, r1.x, l(9) +ieq r2.y, r1.x, l(512) +movc r1.x, r2.y, l(513), r1.x +movc r2.yz, r2.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r1.x, r1.x, r2.y +iadd r1.x, r2.x, r1.x +ishl r2.y, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r2.y +xor r1.x, r2.z, r1.x +iadd r1.x, r2.x, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.xxxx, r6.xyzw +and r1.x, r1.y, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r3.z, r1.x, l(1024) +movc r1.x, r3.z, l(1025), r1.x +movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r3.z, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r3.z +xor r1.x, r6.y, r1.x +iadd r1.x, r2.x, r1.x +ieq r2.x, r2.y, l(1024) +movc r2.x, r2.x, l(1025), r2.y +xor r2.x, r6.z, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.y, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r2.y +xor r2.x, r6.w, r2.x +iadd r2.x, r2.z, r2.x +ishl r2.x, r2.x, l(16) +or r6.xzw, r1.xxxx, r2.xxxx +ushr r1.x, r1.y, l(22) +ushr r1.y, r1.x, l(9) +ieq r2.x, r1.x, l(512) +movc r1.x, r2.x, l(513), r1.x +movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r2.x, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r2.x +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.yyyy, r6.xyzw +ishl r0.z, r0.z, l(1) +iadd r0.z, r0.z, r0.y +and r1.x, r1.z, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r6.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r6.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r6.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r6.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r2.x, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r2.x +xor r1.y, r6.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r6.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.z, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r2.xy, r1.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r1.x, r1.x, r2.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r2.y, r1.x +iadd r1.x, r1.y, r1.x +or r6.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.zzzz, r6.xyzw +iadd r6.xyzw, r0.zzzz, l(1, 2, 3, 4) +and r1.x, r1.w, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r7.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r2.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r2.y, l(1024) +movc r1.y, r1.y, l(1025), r2.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r2.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r2.z, r1.y +ishl r1.y, r1.y, l(16) +or r7.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r7.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.xxxx, r7.xyzw +ld r1.xy, r2.wwww, T0[0].xyzw +iadd r2.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r1.zw, r2.xxxx, T0[0].zwxy +if_nz r3.x + ishl r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r8.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r8.xyzw, r8.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r7.xyzw, r8.xyzw +endif +if_nz r3.y + ushr r7.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r7.xyzw +endif +and r0.x, r1.x, l(2047) +ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r2.x, r0.x, l(1024) +movc r0.x, r2.x, l(1025), r0.x +movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r2.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r2.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r2.x, r7.y, l(1024) +movc r2.x, r2.x, l(1025), r7.y +xor r2.x, r8.z, r2.x +iadd r2.x, r7.z, r2.x +ishl r3.z, r2.x, l(5) +ushr r2.x, r2.x, l(5) +or r2.x, r2.x, r3.z +xor r2.x, r8.w, r2.x +iadd r2.x, r7.z, r2.x +ishl r2.x, r2.x, l(16) +or r7.xzw, r0.xxxx, r2.xxxx +ushr r0.x, r1.x, l(22) +ushr r1.x, r0.x, l(9) +ieq r2.x, r0.x, l(512) +movc r0.x, r2.x, l(513), r0.x +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r2.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r2.x +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.yyyy, r7.xyzw +and r0.x, r1.y, l(2047) +ubfe r7.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r8.xyzw, r7.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r8.x +iadd r0.x, r7.x, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r8.y, r0.x +iadd r0.x, r7.x, r0.x +ieq r1.x, r7.y, l(1024) +movc r1.x, r1.x, l(1025), r7.y +xor r1.x, r8.z, r1.x +iadd r1.x, r7.z, r1.x +ishl r2.x, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r2.x +xor r1.x, r8.w, r1.x +iadd r1.x, r7.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.y, l(22) +ushr r1.x, r0.x, l(9) +ieq r1.y, r0.x, l(512) +movc r0.x, r1.y, l(513), r0.x +movc r3.zw, r1.xxxx, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r3.z +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.y +xor r0.x, r3.w, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.zzzz, r7.xyzw +and r0.x, r1.z, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.x, l(1024) +movc r0.x, r1.x, l(1025), r0.x +movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r7.x +iadd r0.x, r4.x, r0.x +ishl r1.x, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r1.x +xor r0.x, r7.y, r0.x +iadd r0.x, r4.x, r0.x +ieq r1.x, r4.y, l(1024) +movc r1.x, r1.x, l(1025), r4.y +xor r1.x, r7.z, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.w, r1.x +iadd r1.x, r4.z, r1.x +ishl r1.x, r1.x, l(16) +or r7.xzw, r0.xxxx, r1.xxxx +ushr r0.x, r1.z, l(22) +ushr r1.x, r0.x, l(9) +ieq r1.y, r0.x, l(512) +movc r0.x, r1.y, l(513), r0.x +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.x, r0.x, r1.y +iadd r0.x, r1.x, r0.x +ishl r1.y, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.y +xor r0.x, r1.z, r0.x +iadd r0.x, r1.x, r0.x +or r7.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r4.wwww, r7.xyzw +iadd r0.x, r0.y, l(5) +and r1.x, r1.w, l(2047) +ubfe r4.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r1.y, r1.x, l(1024) +movc r1.x, r1.y, l(1025), r1.x +movc r7.xyzw, r4.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.x, r7.x +iadd r1.x, r4.x, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r7.y, r1.x +ieq r1.y, r4.y, l(1024) +movc r1.y, r1.y, l(1025), r4.y +xor r1.y, r7.z, r1.y +iadd r1.xy, r4.xzxx, r1.xyxx +ishl r1.z, r1.y, l(5) +ushr r1.y, r1.y, l(5) +or r1.y, r1.y, r1.z +xor r1.y, r7.w, r1.y +iadd r1.y, r4.z, r1.y +ishl r1.y, r1.y, l(16) +or r4.xzw, r1.yyyy, r1.xxxx +ushr r1.x, r1.w, l(22) +ushr r1.y, r1.x, l(9) +ieq r1.z, r1.x, l(512) +movc r1.x, r1.z, l(513), r1.x +movc r1.zw, r1.yyyy, l(0,0,1023,0x0000ffff), l(0,0,0,0) +xor r1.x, r1.z, r1.x +iadd r1.x, r1.y, r1.x +ishl r1.z, r1.x, l(6) +ushr r1.x, r1.x, l(3) +or r1.x, r1.x, r1.z +xor r1.x, r1.w, r1.x +iadd r1.x, r1.y, r1.x +or r4.y, r1.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +ld r1.xy, r2.yyyy, T0[0].xyzw +ld r1.zw, r2.zzzz, T0[0].zwxy +if_nz r3.x + ishl r4.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0xff00ff00, 0xff00ff00) + ushr r7.xyzw, r1.xyzw, l(8, 8, 8, 8) + and r7.xyzw, r7.xyzw, l(0x00ff00ff, 0x00ff00ff, 0x00ff00ff, 0x00ff00ff) + iadd r1.xyzw, r4.xyzw, r7.xyzw +endif +if_nz r3.y + ushr r4.xyzw, r1.xyzw, l(16, 16, 16, 16) + bfi r1.xyzw, l(16, 16, 16, 16), l(16, 16, 16, 16), r1.xyzw, r4.xyzw +endif +and r0.x, r1.x, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.xxxx +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r2.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r2.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.x, l(22) +ushr r0.y, r0.x, l(9) +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r2.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.zzzz, r4.xyzw +and r0.x, r1.y, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.yyyy +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r2.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r2.y, l(1024) +movc r0.y, r0.y, l(1025), r2.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r2.xzxx, r0.xyxx +ishl r1.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.x +xor r0.y, r4.w, r0.y +iadd r0.y, r2.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.y, l(22) +ushr r0.y, r0.x, l(9) +ieq r1.x, r0.x, l(512) +movc r0.x, r1.x, l(513), r0.x +movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r1.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r1.x +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r5.wwww, r4.xyzw +iadd r0.x, r0.w, l(5) +and r0.y, r1.z, l(2047) +ubfe r2.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.zzzz +ieq r1.x, r0.y, l(1024) +movc r0.y, r1.x, l(1025), r0.y +movc r4.xyzw, r2.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.y, r0.y, r4.x +iadd r0.y, r2.x, r0.y +ishl r1.x, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r1.x +xor r0.y, r4.y, r0.y +iadd r0.y, r2.x, r0.y +ieq r1.x, r2.y, l(1024) +movc r1.x, r1.x, l(1025), r2.y +xor r1.x, r4.z, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r4.w, r1.x +iadd r1.x, r2.z, r1.x +ishl r1.x, r1.x, l(16) +or r4.xzw, r0.yyyy, r1.xxxx +ushr r0.y, r1.z, l(22) +ushr r1.x, r0.y, l(9) +ieq r1.y, r0.y, l(512) +movc r0.y, r1.y, l(513), r0.y +movc r1.yz, r1.xxxx, l(0,1023,0x0000ffff,0), l(0,0,0,0) +xor r0.y, r0.y, r1.y +iadd r0.y, r1.x, r0.y +ishl r1.y, r0.y, l(6) +ushr r0.y, r0.y, l(3) +or r0.y, r0.y, r1.y +xor r0.y, r1.z, r0.y +iadd r0.y, r1.x, r0.y +or r4.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r4.xyzw +and r0.x, r1.w, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r1.wwww +ieq r0.y, r0.x, l(1024) +movc r0.x, r0.y, l(1025), r0.x +movc r4.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.x, r0.x, r4.x +iadd r0.x, r1.x, r0.x +ishl r0.y, r0.x, l(5) +ushr r0.x, r0.x, l(5) +or r0.x, r0.x, r0.y +xor r0.x, r4.y, r0.x +ieq r0.y, r1.y, l(1024) +movc r0.y, r0.y, l(1025), r1.y +xor r0.y, r4.z, r0.y +iadd r0.xy, r1.xzxx, r0.xyxx +ishl r0.w, r0.y, l(5) +ushr r0.y, r0.y, l(5) +or r0.y, r0.y, r0.w +xor r0.y, r4.w, r0.y +iadd r0.y, r1.z, r0.y +ishl r0.y, r0.y, l(16) +or r4.xzw, r0.yyyy, r0.xxxx +ushr r0.x, r1.w, l(22) +ushr r0.y, r0.x, l(9) +ieq r0.w, r0.x, l(512) +movc r0.x, r0.w, l(513), r0.x +movc r1.xy, r0.yyyy, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r1.x +iadd r0.x, r0.y, r0.x +ishl r0.w, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r0.w +xor r0.x, r1.y, r0.x +iadd r0.x, r0.y, r0.x +or r4.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.zzzz, r4.xyzw +ld r0.xy, r2.wwww, T0[0].xyzw +if_nz r3.x + ishl r1.xy, r0.xyxx, l(8, 8, 0, 0) + ushr r1.zw, r0.xxxy, l(0, 0, 8, 8) + and r1.xyzw, r1.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xy, r1.zwzz, r1.xyxx +endif +if_nz r3.y + ushr r1.xy, r0.xyxx, l(16, 16, 0, 0) + bfi r0.xy, l(16, 16, 0, 0), l(16, 16, 0, 0), r0.xyxx, r1.xyxx +endif +and r0.w, r0.x, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.xxxx +ieq r1.w, r0.w, l(1024) +movc r0.w, r1.w, l(1025), r0.w +movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(5) +ushr r0.xw, r0.xxxw, l(22, 0, 0, 5) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.x, l(9) +ieq r2.x, r0.x, l(512) +movc r0.x, r2.x, l(513), r0.x +movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.x, r0.x, r2.x +iadd r0.x, r0.w, r0.x +ishl r2.x, r0.x, l(6) +ushr r0.x, r0.x, l(3) +or r0.x, r0.x, r2.x +xor r0.x, r2.y, r0.x +iadd r0.x, r0.w, r0.x +or r1.y, r0.x, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r6.wwww, r1.xyzw +iadd r0.x, r0.z, l(5) +and r0.w, r0.y, l(2047) +ubfe r1.xyz, l(1, 11, 1, 0), l(10, 11, 21, 0), r0.yyyy +ieq r1.w, r0.w, l(1024) +movc r0.w, r1.w, l(1025), r0.w +movc r2.xyzw, r1.xxzz, l(2047,0x0000ffff,2047,0x0000ffff), l(0,0,0,0) +xor r0.w, r0.w, r2.x +iadd r0.w, r1.x, r0.w +ishl r1.w, r0.w, l(5) +ushr r0.yw, r0.yyyw, l(0, 22, 0, 5) +or r0.w, r0.w, r1.w +xor r0.w, r2.y, r0.w +iadd r0.w, r1.x, r0.w +ieq r1.x, r1.y, l(1024) +movc r1.x, r1.x, l(1025), r1.y +xor r1.x, r2.z, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.y, r1.x, l(5) +ushr r1.x, r1.x, l(5) +or r1.x, r1.x, r1.y +xor r1.x, r2.w, r1.x +iadd r1.x, r1.z, r1.x +ishl r1.x, r1.x, l(16) +or r1.xzw, r0.wwww, r1.xxxx +ushr r0.w, r0.y, l(9) +ieq r2.x, r0.y, l(512) +movc r0.y, r2.x, l(513), r0.y +movc r2.xy, r0.wwww, l(1023,0x0000ffff,0,0), l(0,0,0,0) +xor r0.y, r0.y, r2.x +iadd r0.y, r0.w, r0.y +ishl r2.x, r0.y, l(6) +ushr r0.y, r0.y, l(3) +or r0.y, r0.y, r2.x +xor r0.y, r2.y, r0.y +iadd r0.y, r0.w, r0.y +or r1.y, r0.y, l(0x7fff0000) +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +ret +// Approximately 820 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.cso new file mode 100644 index 0000000000000000000000000000000000000000..73262f40811739f1daf25ef4371117b72f76435d GIT binary patch literal 26108 zcmeI5O^hB#na6u-;@9!Ski;Pp3M&}wU^$jR`9KI+2o;W*4N~~nI9NtnY4F%XJP}QQ0>nyLWUT~TP&AiZ5uC9Qm%Shkxe|dCaX_n;4~WBRv;SXp{okpnw|lxh zW)O!wQTNkb_0;qAf2ykA@(9jdJp1%dF8=ce|Lq%>zy9rCKJ}S%zc~LNb4}Cy?`qQ= z692HSQ};B@M|C};>x*iC?%XGr{xsh-$o)l^9-EKpnmcsT&8cXE^n=VbL*vz)#Vr0FI`#Q zTz_ff@@i8zUs>JUYA&um--ckEga)0C|vL5rJ%J&0mC%1?^4j>};n?JAie^C37e_xl};t09# zN$$}Ra@&%l2CxhD<)sGUg_nfF^2(*n)#l2}>l;^^*Is)~l_fk&L|dJ{e?v~n>qP5RPf(**xX$Em(}H! z7uPR;Wiu&yN{U)NN=6TzQdjN!+UD|8SC&_=U0J(yZKm_;y7N;HOFi8Yx6v^RR$ts~ zKD~B%V|{b|OIwSlo_lQZnP<;GyLkTUr7No&i%+kA^=oS{>fwpUKlDWNsq_E%8R`&% zf3|u*|I8;ZK5(gN{z(hKIZgU6-`mW6p=k~;{h*v7?OK73i}$MUTf6(touj8|eoWtg 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texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl +const uint8_t texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs[] = { + 0x44, 0x58, 0x42, 0x43, 0xB2, 0xDA, 0x41, 0x78, 0xE6, 0x68, 0x7F, 0x22, + 0xC2, 0x25, 0xF6, 0xF0, 0xBE, 0xBD, 0xA3, 0x3E, 0x01, 0x00, 0x00, 0x00, + 0x04, 0x5B, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x34, 0x00, 0x00, 0x00, + 0x28, 0x04, 0x00, 0x00, 0x38, 0x04, 0x00, 0x00, 0x48, 0x04, 0x00, 0x00, + 0x68, 0x5A, 0x00, 0x00, 0x52, 0x44, 0x45, 0x46, 0xEC, 0x03, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xF8, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + 0x3C, 0x00, 0x00, 0x00, 0x01, 0x05, 0x53, 0x43, 0x00, 0x05, 0x00, 0x00, + 0xC4, 0x03, 0x00, 0x00, 0x13, 0x13, 0x44, 0x25, 0x3C, 0x00, 0x00, 0x00, + 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, + 0x24, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xB4, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 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a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.txt b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.txt new file mode 100644 index 000000000..94b149f81 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.txt @@ -0,0 +1,709 @@ +// +// Generated by Microsoft (R) HLSL Shader Compiler 10.1 +// +// +// Buffer Definitions: +// +// cbuffer XeTextureLoadConstants +// { +// +// uint xe_texture_load_guest_base; // Offset: 0 Size: 4 +// uint xe_texture_load_guest_pitch; // Offset: 4 Size: 4 +// uint2 xe_texture_load_guest_storage_width_height;// Offset: 8 Size: 8 +// uint3 xe_texture_load_size_blocks; // Offset: 16 Size: 12 +// uint xe_texture_load_is_3d_endian; // Offset: 28 Size: 4 +// uint xe_texture_load_host_base; // Offset: 32 Size: 4 +// uint xe_texture_load_host_pitch; // Offset: 36 Size: 4 +// uint xe_texture_load_height_texels;// Offset: 40 Size: 4 [unused] +// +// } +// +// +// Resource Bindings: +// +// Name Type Format Dim ID HLSL Bind Count +// ------------------------------ ---------- ------- ----------- ------- -------------- ------ +// xe_texture_load_source texture uint2 buf T0 t0 1 +// xe_texture_load_dest UAV uint2 buf U0 u0 1 +// XeTextureLoadConstants cbuffer NA NA CB0 cb0 1 +// +// +// +// Input signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Input +// +// Output signature: +// +// Name Index Mask Register SysValue Format Used +// -------------------- ----- ------ -------- -------- ------- ------ +// no Output +cs_5_1 +dcl_globalFlags refactoringAllowed +dcl_constantbuffer CB0[0:0][3], immediateIndexed, space=0 +dcl_resource_buffer (uint,uint,uint,uint) T0[0:0], space=0 +dcl_uav_typed_buffer (uint,uint,uint,uint) U0[0:0], space=0 +dcl_input vThreadID.xyz +dcl_temps 11 +dcl_thread_group 2, 32, 1 +ishl r0.x, vThreadID.x, l(4) +mov r0.yz, vThreadID.yyzy +uge r1.xyz, r0.xyzx, CB0[0][1].xyzx +or r0.w, r1.y, r1.x +or r0.w, r1.z, r0.w +if_nz r0.w + ret +endif +mov r1.x, l(3) +mov r1.z, CB0[0][1].y +imul null, r0.yzw, r0.xxyz, r1.xxxz +ishl r0.y, r0.y, l(1) +imad r0.z, l(3), r0.w, r0.z +imad r0.y, r0.z, CB0[0][2].y, r0.y +iadd r0.y, r0.y, CB0[0][2].x +ushr r0.z, CB0[0][2].y, l(3) +ieq r0.w, CB0[0][0].y, l(-1) +if_nz r0.w + and r1.x, CB0[0][1].w, l(1) + if_nz r1.x + iadd r1.xy, CB0[0][0].wzww, l(31, 31, 0, 0) + ishr r2.xyz, vThreadID.yzyy, l(4, 2, 3, 0) + ushr r1.xy, r1.xyxx, l(4, 5, 0, 0) + and r1.x, r1.x, l(0x0ffffffe) + imad r1.x, r2.y, r1.x, r2.x + ibfe r1.z, l(27), l(1), vThreadID.x + imad r1.x, r1.x, r1.y, r1.z + ishl r1.y, vThreadID.y, l(9) + ishr r1.y, r1.y, l(6) + iadd r1.z, r2.y, r2.z + and r1.yw, r1.yyyz, l(0, 48, 0, 1) + ishr r2.x, r0.x, l(3) + bfi r1.z, l(1), l(1), r1.z, l(0) + iadd r1.z, r1.z, r2.x + bfi r1.z, l(2), l(1), r1.z, l(0) + iadd r1.z, r1.z, r1.w + bfi r1.xw, l(21, 0, 0, 21), l(9, 0, 0, 12), r1.xxxx, l(0, 0, 0, 0) + imad r1.xy, r1.yyyy, l(2, 16, 0, 0), r1.xwxx + bfi r1.xy, l(2, 2, 0, 0), l(7, 10, 0, 0), vThreadID.zzzz, r1.xyxx + bfi r1.w, l(1), l(4), vThreadID.y, l(0) + ubfe r2.x, l(3), l(6), r1.x + and r2.y, r1.z, l(4) + bfi r1.z, l(2), l(8), r1.z, l(0) + imad r1.z, r2.x, l(32), r1.z + imad r1.z, r2.y, l(4), r1.z + bfi r1.xy, l(5, 5, 0, 0), l(0, 3, 0, 0), r1.wwww, r1.xyxx + bfi r1.y, l(9), l(3), r1.z, r1.y + bfi r1.x, l(6), l(0), r1.x, r1.y + else + ibfe r1.y, l(27), l(1), vThreadID.x + ishr r1.zw, vThreadID.yyyy, l(0, 0, 5, 2) + iadd r2.x, CB0[0][0].z, l(31) + ushr r2.x, r2.x, l(5) + imad r1.y, r1.z, r2.x, r1.y + bfi r2.xyz, l(4, 4, 4, 0), l(4, 7, 6, 0), vThreadID.yyyy, l(0, 0, 0, 0) + bfi r2.xyz, l(24, 24, 24, 0), l(8, 11, 10, 0), r1.yyyy, r2.xyzx + ishl r1.y, vThreadID.y, l(7) + and r1.y, r1.y, l(2048) + bfi r1.y, l(12), l(0), r1.y, r2.y + and r1.z, r2.z, l(1792) + iadd r1.y, r1.y, r1.z + and r1.z, r1.w, l(2) + ishr r1.w, r0.x, l(3) + iadd r1.z, r1.w, r1.z + bfi r1.z, l(2), l(6), r1.z, l(0) + iadd r1.y, r1.y, r1.z + bfi r1.x, l(6), l(0), r2.x, r1.y + endif +else + ishl r0.x, r0.x, l(1) + iadd r1.y, CB0[0][1].y, l(31) + and r1.y, r1.y, l(-32) + imad r1.y, vThreadID.z, r1.y, vThreadID.y + imad r1.x, r1.y, CB0[0][0].y, r0.x +endif +iadd r0.x, r1.x, CB0[0][0].x +imul null, r0.x, r0.x, l(9) +ushr r0.xy, r0.xyxx, l(3, 3, 0, 0) +ushr r1.x, CB0[0][1].w, l(1) +ld r1.yz, r0.xxxx, T0[0].zxyw +ieq r1.x, r1.x, l(1) +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.xxxx, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.xxxx, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) +and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r0.yyyy, r2.xzxx +iadd r9.xyzw, r0.yyyy, l(1, 2, 3, 4) +store_uav_typed U0[0].xyzw, r9.xxxx, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r9.yyyy, r3.xyxx +iadd r1.w, r0.z, r0.y +ushr r2.x, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.xxxx +ushr r3.x, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r3.x +store_uav_typed U0[0].xyzw, r1.wwww, r2.xyzw +iadd r2.xy, r1.wwww, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r10.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r2.zw, r6.xxxy, l(0, 0, 16, 16) +bfi r10.y, l(16), l(16), r6.y, r2.z +store_uav_typed U0[0].xyzw, r2.xxxx, r10.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r2.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +iadd r2.xyzw, r0.xxxx, l(9, 10, 11, 12) +ld r1.yz, r2.xxxx, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r3.zw, r1.yyyz, l(0, 0, 8, 8) + and r3.xyzw, r3.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r3.zzwz, r3.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r3.xy, r1.yzyy, r3.xyxx +ld r1.yz, r2.yyyy, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r4.xy, r1.yzyy, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r4.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.zzzz, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + and r2.xy, r2.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r2.xxyx, r5.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r2.xyxx +ld r1.yz, r2.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r2.xxyx +iadd r2.xyzw, r0.xxxx, l(13, 14, 15, 16) +ld r6.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r6.xxxy, r6.zzzw +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r6.zw, r2.xxxy, l(0, 0, 8, 8) + and r6.xyzw, r6.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r6.zwzz, r6.xyxx +endif +ishl r6.xy, r2.xyxx, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r2.xy, r2.xyxx, r6.xyxx +ld r6.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +iadd r1.w, r0.x, l(17) +ld r2.zw, r2.wwww, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r7.yz, r2.zzwz, r7.xxyx +ld r2.zw, r1.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r2.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r2.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r2.zzwz, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r9.zzzz, r3.xzxx +store_uav_typed U0[0].xyzw, r9.wwww, r5.ywyy +iadd r10.xyzw, r0.yyyy, l(5, 6, 7, 8) +bfi r7.x, l(16), l(0), r2.x, r6.y +store_uav_typed U0[0].xyzw, r10.xxxx, r7.xyxx +iadd r1.w, r0.z, r9.z +ushr r2.z, r3.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r2.zzzz +ushr r2.z, r4.x, l(16) +bfi r3.y, l(16), l(16), r1.y, r2.z +store_uav_typed U0[0].xyzw, r1.wwww, r3.xyzw +iadd r2.zw, r1.wwww, l(0, 0, 1, 2) +ushr r1.y, r1.y, l(16) +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r4.xw, r2.xxxy, l(16, 0, 0, 16) +bfi r3.y, l(16), l(16), r2.y, r4.x +store_uav_typed U0[0].xyzw, r2.zzzz, r3.xyzw +bfi r3.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r4.wwww +ushr r1.y, r7.z, l(16) +bfi r3.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.wwww, r3.xyzw +iadd r1.y, r0.z, r1.w +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r1.yyyy, r4.yzyy +iadd r1.zw, r1.yyyy, l(0, 0, 1, 2) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r1.zzzz, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r1.wwww, r8.xzxx +if_nz r0.w + iadd r0.w, r0.x, l(72) +else + iadd r0.w, r0.x, l(18) +endif +ld r1.yz, r0.wwww, T0[0].zxyw +if_nz r1.x + ishl r2.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r2.zw, r1.yyyz, l(0, 0, 8, 8) + and r2.xyzw, r2.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r2.zzwz, r2.xxyx +endif +ishl r2.xy, r1.yzyy, l(11, 11, 0, 0) +and r2.xy, r2.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r2.xy, r1.yzyy, r2.xyxx +iadd r3.xyzw, r0.wwww, l(1, 2, 3, 4) +ld r1.yz, r3.xxxx, T0[0].zxyw +if_nz r1.x + ishl r4.xy, r1.yzyy, l(8, 8, 0, 0) + ushr r4.zw, r1.yyyz, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r1.yz, r4.zzwz, r4.xxyx +endif +ishl r4.xy, r1.yzyy, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r4.xy, r1.yzyy, r4.xyxx +ld r1.yz, r3.yyyy, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r5.xy, r1.yzyy, l(8, 8, 0, 0) + and r5.xy, r5.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r5.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r5.xy, r1.yzyy, r3.xyxx +ld r1.yz, r3.zzzz, T0[0].zxyw +if_nz r1.x + ishl r3.xy, r1.yzyy, l(8, 8, 0, 0) + and r3.xy, r3.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r6.xy, r1.yzyy, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r1.yz, r3.xxyx, r6.xxyx +endif +ishl r3.xy, r1.yzyy, l(11, 11, 0, 0) +and r3.xy, r3.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r1.yz, r1.yyzy, l(0, 5, 5, 0) +and r1.yz, r1.yyzy, l(0, 0x07ff07ff, 0x07ff07ff, 0) +iadd r1.yz, r1.yyzy, r3.xxyx +ld r3.xy, r3.wwww, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r3.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r6.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r5.zw, r3.xxxy, r3.zzzw +iadd r3.xyzw, r0.wwww, l(5, 6, 7, 8) +ld r6.xy, r3.xxxx, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r6.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r6.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r6.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r6.xxxy, l(0, 0, 11, 11) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xyzw, r6.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r6.xy, r6.xyxx, r6.zwzz +ld r3.xy, r3.yyyy, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r7.xy, r3.xyxx, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r7.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r7.xy, r3.xyxx, r6.zwzz +ld r3.xy, r3.zzzz, T0[0].xyzw +if_nz r1.x + ishl r6.zw, r3.xxxy, l(0, 0, 8, 8) + and r6.zw, r6.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r3.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r6.zwzz, r8.xyxx +endif +ishl r6.zw, r3.xxxy, l(0, 0, 11, 11) +and r6.zw, r6.zzzw, l(0, 0, 0xf800f800, 0xf800f800) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xy, r3.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r3.yz, r3.xxyx, r6.zzwz +ld r6.zw, r3.wwww, T0[0].zwxy +if_nz r1.x + ishl r8.xy, r6.zwzz, l(8, 8, 0, 0) + ushr r8.zw, r6.zzzw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.zw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r6.zwzz, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.zw, r6.zzzw, l(0, 0, 5, 5) +and r6.zw, r6.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r8.yz, r6.zzwz, r8.xxyx +bfi r2.z, l(16), l(0), r2.y, r5.x +store_uav_typed U0[0].xyzw, r10.yyyy, r2.xzxx +store_uav_typed U0[0].xyzw, r10.zzzz, r5.ywyy +bfi r3.x, l(16), l(0), r6.x, r7.y +store_uav_typed U0[0].xyzw, r10.wwww, r3.xyxx +iadd r0.x, r0.z, r10.y +ushr r1.w, r2.y, l(16) +bfi r2.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r1.wwww +ushr r1.w, r4.x, l(16) +bfi r2.y, l(16), l(16), r1.y, r1.w +store_uav_typed U0[0].xyzw, r0.xxxx, r2.xyzw +iadd r2.xy, r0.xxxx, l(1, 2, 0, 0) +ushr r1.y, r1.y, l(16) +bfi r9.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r1.zzzz, r1.yyyy +ushr r1.yw, r6.xxxy, l(0, 16, 0, 16) +bfi r9.y, l(16), l(16), r6.y, r1.y +store_uav_typed U0[0].xyzw, r2.xxxx, r9.xyzw +bfi r6.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r3.zzzz, r1.wwww +ushr r1.y, r3.z, l(16) +bfi r6.y, l(16), l(16), r8.y, r1.y +store_uav_typed U0[0].xyzw, r2.yyyy, r6.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r1.z +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r1.yz, r0.xxxx, l(0, 1, 2, 0) +mov r7.z, r5.z +store_uav_typed U0[0].xyzw, r1.yyyy, r7.zxzz +bfi r8.x, l(16), l(0), r7.y, r8.y +store_uav_typed U0[0].xyzw, r1.zzzz, r8.xzxx +iadd r1.yzw, r0.yyyy, l(0, 9, 10, 11) +iadd r2.xyzw, r0.wwww, l(9, 10, 11, 12) +ld r3.xy, r2.xxxx, T0[0].xyzw +if_nz r1.x + ishl r3.zw, r3.xxxy, l(0, 0, 8, 8) + and r3.zw, r3.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r4.xy, r3.xyxx, l(8, 8, 0, 0) + and r4.xy, r4.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r3.xy, r3.zwzz, r4.xyxx +endif +ishl r3.zw, r3.xxxy, l(0, 0, 11, 11) +ushr r3.xy, r3.xyxx, l(5, 5, 0, 0) +and r3.xyzw, r3.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r3.xy, r3.xyxx, r3.zwzz +ld r2.xy, r2.yyyy, T0[0].xyzw +if_nz r1.x + ishl r4.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r4.zw, r2.xxxy, l(0, 0, 8, 8) + and r4.xyzw, r4.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r4.zwzz, r4.xyxx +endif +ishl r4.xy, r2.xyxx, l(11, 11, 0, 0) +and r4.xy, r4.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r4.xy, r2.xyxx, r4.xyxx +ld r2.xy, r2.zzzz, T0[0].xyzw +if_nz r1.x + ishl r5.xy, r2.xyxx, l(8, 8, 0, 0) + ushr r5.zw, r2.xxxy, l(0, 0, 8, 8) + and r5.xyzw, r5.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.xy, r5.zwzz, r5.xyxx +endif +ishl r5.xy, r2.xyxx, l(11, 11, 0, 0) +and r5.xy, r5.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xy, r2.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r5.xy, r2.xyxx, r5.xyxx +ld r2.xy, r2.wwww, T0[0].xyzw +if_nz r1.x + ishl r2.zw, r2.xxxy, l(0, 0, 8, 8) + and r2.zw, r2.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r6.xy, r2.xyxx, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.xy, r2.zwzz, r6.xyxx +endif +ishl r2.zw, r2.xxxy, l(0, 0, 11, 11) +ushr r2.xy, r2.xyxx, l(5, 5, 0, 0) +and r2.xyzw, r2.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r2.xy, r2.xyxx, r2.zwzz +iadd r6.xyzw, r0.wwww, l(13, 14, 15, 16) +ld r2.zw, r6.xxxx, T0[0].zwxy +if_nz r1.x + ishl r7.xy, r2.zwzz, l(8, 8, 0, 0) + ushr r7.zw, r2.zzzw, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r2.zw, r7.zzzw, r7.xxxy +endif +ishl r7.xy, r2.zwzz, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r5.zw, r2.zzzw, r7.xxxy +ld r2.zw, r6.yyyy, T0[0].zwxy +if_nz r1.x + ishl r6.xy, r2.zwzz, l(8, 8, 0, 0) + and r6.xy, r6.xyxx, l(0xff00ff00, 0xff00ff00, 0, 0) + ushr r7.xy, r2.zwzz, l(8, 8, 0, 0) + and r7.xy, r7.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r2.zw, r6.xxxy, r7.xxxy +endif +ishl r6.xy, r2.zwzz, l(11, 11, 0, 0) +and r6.xy, r6.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r2.zw, r2.zzzw, l(0, 0, 5, 5) +and r2.zw, r2.zzzw, l(0, 0, 0x07ff07ff, 0x07ff07ff) +iadd r2.zw, r2.zzzw, r6.xxxy +ld r6.xy, r6.zzzz, T0[0].xyzw +if_nz r1.x + ishl r7.xy, r6.xyxx, l(8, 8, 0, 0) + ushr r7.zw, r6.xxxy, l(0, 0, 8, 8) + and r7.xyzw, r7.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r6.xy, r7.zwzz, r7.xyxx +endif +ishl r7.xy, r6.xyxx, l(11, 11, 0, 0) +and r7.xy, r7.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r6.xy, r6.xyxx, l(5, 5, 0, 0) +and r6.xy, r6.xyxx, l(0x07ff07ff, 0x07ff07ff, 0, 0) +iadd r6.xy, r6.xyxx, r7.xyxx +iadd r0.x, r0.w, l(17) +ld r7.xy, r6.wwww, T0[0].xyzw +if_nz r1.x + ishl r7.zw, r7.xxxy, l(0, 0, 8, 8) + and r7.zw, r7.zzzw, l(0, 0, 0xff00ff00, 0xff00ff00) + ushr r8.xy, r7.xyxx, l(8, 8, 0, 0) + and r8.xy, r8.xyxx, l(0x00ff00ff, 0x00ff00ff, 0, 0) + iadd r7.xy, r7.zwzz, r8.xyxx +endif +ishl r7.zw, r7.xxxy, l(0, 0, 11, 11) +ushr r7.xy, r7.xyxx, l(5, 5, 0, 0) +and r7.xyzw, r7.xyzw, l(0x07ff07ff, 0x07ff07ff, 0xf800f800, 0xf800f800) +iadd r7.yz, r7.xxyx, r7.zzwz +ld r0.xw, r0.xxxx, T0[0].xzwy +if_nz r1.x + ishl r8.xy, r0.xwxx, l(8, 8, 0, 0) + ushr r8.zw, r0.xxxw, l(0, 0, 8, 8) + and r8.xyzw, r8.xyzw, l(0xff00ff00, 0xff00ff00, 0x00ff00ff, 0x00ff00ff) + iadd r0.xw, r8.zzzw, r8.xxxy +endif +ishl r8.xy, r0.xwxx, l(11, 11, 0, 0) +and r8.xy, r8.xyxx, l(0xf800f800, 0xf800f800, 0, 0) +ushr r0.xw, r0.xxxw, l(5, 0, 0, 5) +and r0.xw, r0.xxxw, l(0x07ff07ff, 0, 0, 0x07ff07ff) +iadd r8.yz, r0.xxwx, r8.xxyx +bfi r3.z, l(16), l(0), r3.y, r5.x +store_uav_typed U0[0].xyzw, r1.yyyy, r3.xzxx +store_uav_typed U0[0].xyzw, r1.zzzz, r5.ywyy +bfi r7.x, l(16), l(0), r2.z, r6.y +store_uav_typed U0[0].xyzw, r1.wwww, r7.xyxx +iadd r0.x, r0.z, r1.y +ushr r0.y, r3.y, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r4.xxxx, r0.yyyy +ushr r0.y, r4.x, l(16) +bfi r1.y, l(16), l(16), r2.x, r0.y +store_uav_typed U0[0].xyzw, r0.xxxx, r1.xyzw +iadd r0.yw, r0.xxxx, l(0, 1, 0, 2) +ushr r1.x, r2.x, l(16) +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r2.yyyy, r1.xxxx +ushr r2.xz, r2.zzwz, l(16, 0, 16, 0) +bfi r1.y, l(16), l(16), r2.w, r2.x +store_uav_typed U0[0].xyzw, r0.yyyy, r1.xyzw +bfi r1.xzw, l(16, 0, 16, 16), l(16, 0, 16, 16), r7.zzzz, r2.zzzz +ushr r0.y, r7.z, l(16) +bfi r1.y, l(16), l(16), r8.y, r0.y +store_uav_typed U0[0].xyzw, r0.wwww, r1.xyzw +iadd r0.x, r0.z, r0.x +bfi r4.z, l(16), l(0), r5.x, r2.y +store_uav_typed U0[0].xyzw, r0.xxxx, r4.yzyy +iadd r0.yz, r0.xxxx, l(0, 1, 2, 0) +mov r6.z, r5.z +store_uav_typed U0[0].xyzw, r0.yyyy, r6.zxzz +bfi r8.x, l(16), l(0), r6.y, r8.y +store_uav_typed U0[0].xyzw, r0.zzzz, r8.xzxx +ret +// Approximately 658 instruction slots used diff --git a/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.cso b/src/xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.cso new file mode 100644 index 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tile_offset_xy.y * pitch_tiles + (tile_offset_xy.x << format_ints_log2); - pixel_index -= tile_offset_xy * uint2(80u, 16u); + pixel_index -= tile_offset_xy * tile_size; if (is_depth) { + uint tile_width_half = tile_size.x >> 1u; pixel_index.x = - uint(int(pixel_index.x) + ((pixel_index.x >= 40u) ? -40 : 40)); + uint(int(pixel_index.x) + + ((pixel_index.x >= tile_width_half) ? -int(tile_width_half) + : int(tile_width_half))); } - return base_tiles * 1280u + - ((pixel_index.y * 80u + pixel_index.x) << format_ints_log2); + return base_tiles * (tile_size.x * tile_size.y) + + ((pixel_index.y * tile_size.x + pixel_index.x) << format_ints_log2); } #endif // XENIA_GPU_D3D12_SHADERS_EDRAM_HLSLI_ diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_color_32bpp.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_color_32bpp.cs.hlsl deleted file mode 100644 index 44509f248..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_color_32bpp.cs.hlsl +++ /dev/null @@ -1,14 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - uint4 samples = xe_edram_load_store_source.Load4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index)); - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_color_64bpp.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_color_64bpp.cs.hlsl deleted file mode 100644 index 48efd0e7e..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_color_64bpp.cs.hlsl +++ /dev/null @@ -1,14 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(40, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 2u; - uint4 samples = xe_edram_load_store_source.Load4( - XeEdramOffset64bpp(xe_group_id.xy, tile_sample_index)); - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_color_7e3.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_color_7e3.cs.hlsl deleted file mode 100644 index d98d66817..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_color_7e3.cs.hlsl +++ /dev/null @@ -1,22 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(40, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 2u; - uint2 samples_7e3_packed = xe_edram_load_store_source.Load2( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index)); - uint4 sample_0_f16u32 = - f32tof16(XeUnpackR10G10B10A2Float(samples_7e3_packed.x)); - uint4 sample_1_f16u32 = - f32tof16(XeUnpackR10G10B10A2Float(samples_7e3_packed.y)); - uint4 samples_f16u32_packed = - uint4(sample_0_f16u32.xz, sample_1_f16u32.xz) | - (uint4(sample_0_f16u32.yw, sample_1_f16u32.yw) << 16u); - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, samples_f16u32_packed); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_depth_float.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_depth_float.cs.hlsl deleted file mode 100644 index ef72713a3..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_depth_float.cs.hlsl +++ /dev/null @@ -1,23 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - uint4 samples = xe_edram_load_store_source.Load4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index)); - // Depth (exact conversion ensured during drawing). - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, XeFloat20e4To32(samples >> 8u)); - // Stencil. - uint4 stencil = (samples & 0xFFu) << uint4(0u, 8u, 16u, 24u); - stencil.xy |= stencil.zw; - stencil.x |= stencil.y; - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - xe_edram_load_store_dest.Store(rt_offset, stencil.x); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_depth_float24and32.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_depth_float24and32.cs.hlsl deleted file mode 100644 index bc02b4623..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_depth_float24and32.cs.hlsl +++ /dev/null @@ -1,31 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - uint edram_offset = XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index); - uint4 depth24_stencil = xe_edram_load_store_source.Load4(edram_offset); - uint4 depth24 = depth24_stencil >> 8u; - uint4 depth32 = xe_edram_load_store_source.Load4(10485760u + edram_offset); - // Depth. If the stored 32-bit depth converted to 24-bit is the same as the - // stored 24-bit depth, load the 32-bit value because it has more precision - // (and multipass rendering is possible), if it's not, convert the 24-bit - // depth because it was overwritten by aliasing. - uint4 depth24to32 = XeFloat20e4To32(depth24); - uint4 depth = depth24to32 + (depth32 - depth24to32) * - uint4(XeFloat32To20e4(depth32) == depth24); - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, depth); - // Stencil. - uint4 stencil = (depth24_stencil & 0xFFu) << uint4(0u, 8u, 16u, 24u); - stencil.xy |= stencil.zw; - stencil.x |= stencil.y; - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - xe_edram_load_store_dest.Store(rt_offset, stencil.x); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_depth_unorm.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_load_depth_unorm.cs.hlsl deleted file mode 100644 index d012c434d..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_depth_unorm.cs.hlsl +++ /dev/null @@ -1,22 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - uint4 samples = xe_edram_load_store_source.Load4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index)); - // Depth. - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - xe_edram_load_store_dest.Store4(rt_offset, samples >> 8u); - // Stencil. - uint4 stencil = (samples & 0xFFu) << uint4(0u, 8u, 16u, 24u); - stencil.xy |= stencil.zw; - stencil.x |= stencil.y; - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - xe_edram_load_store_dest.Store(rt_offset, stencil.x); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_load_store.hlsli b/src/xenia/gpu/d3d12/shaders/edram_load_store.hlsli deleted file mode 100644 index 02df46846..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_load_store.hlsli +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef XENIA_GPU_D3D12_SHADERS_EDRAM_LOAD_STORE_HLSLI_ -#define XENIA_GPU_D3D12_SHADERS_EDRAM_LOAD_STORE_HLSLI_ - -// Root constants. -cbuffer XeEdramLoadStoreConstants : register(b0) { - uint xe_edram_rt_color_depth_offset; - uint xe_edram_rt_color_depth_pitch; - uint xe_edram_rt_stencil_offset; - uint xe_edram_rt_stencil_pitch; - // 0:10 - EDRAM base in tiles. - // 11 - log2(vertical sample count), 0 for 1x AA, 1 for 2x/4x AA. - // 12 - log2(horizontal sample count), 0 for 1x/2x AA, 1 for 4x AA. - // 13 - whether 2x resolution scale is used. - // 14 - whether to apply the hack and duplicate the top/left - // half-row/half-column to reduce the impact of half-pixel offset with - // 2x resolution scale. - // 15 - whether it's a depth render target. - // 16: - EDRAM pitch in tiles. - uint xe_edram_base_samples_2x_depth_pitch; -}; - -RWByteAddressBuffer xe_edram_load_store_dest : register(u0); -ByteAddressBuffer xe_edram_load_store_source : register(t0); - -uint2 XeEdramSampleCountLog2() { - return (xe_edram_base_samples_2x_depth_pitch >> uint2(12u, 11u)) & 1u; -} - -uint XeEdramScaleLog2() { - return (xe_edram_base_samples_2x_depth_pitch >> 13u) & 1u; -} - -uint XeEdramOffset32bpp(uint2 tile_index, uint2 tile_sample_index, - uint2 scaled_2x_pixel_index = uint2(0u, 0u)) { - if (xe_edram_base_samples_2x_depth_pitch & (1u << 15u)) { - // Depth render targets apparently have samples 0:39 and 40:79 swapped - - // affects loading depth to EDRAM via color aliasing in GTA IV and Halo 3. - tile_sample_index.x += 40u * uint(tile_sample_index.x < 40u) - - 40u * uint(tile_sample_index.x >= 40u); - } - uint offset = ((xe_edram_base_samples_2x_depth_pitch & 2047u) + - tile_index.y * (xe_edram_base_samples_2x_depth_pitch >> 16u) + - tile_index.x) * 5120u + tile_sample_index.y * 320u + - tile_sample_index.x * 4u; - uint resolution_scale_log2 = XeEdramScaleLog2(); - scaled_2x_pixel_index &= resolution_scale_log2; - return (offset << (resolution_scale_log2 * 2u)) + - scaled_2x_pixel_index.y * 8u + scaled_2x_pixel_index.x * 4u; -} - -// Instead of individual tiles, this works on two consecutive tiles, the first -// one containing the top 80x8 samples, and the second one containing the bottom -// 80x8 samples. -uint XeEdramOffset64bpp(uint2 tile_pair_index, uint2 tile_pair_sample_index, - uint2 scaled_2x_pixel_index = uint2(0u, 0u)) { - uint offset = ((xe_edram_base_samples_2x_depth_pitch & 2047u) + - tile_pair_index.y * - (xe_edram_base_samples_2x_depth_pitch >> 16u) + - (tile_pair_index.x << 1u)) * 5120u + - tile_pair_sample_index.y * 640u + tile_pair_sample_index.x * 8u; - uint resolution_scale_log2 = XeEdramScaleLog2(); - scaled_2x_pixel_index &= resolution_scale_log2; - return (offset << (resolution_scale_log2 * 2u)) + - scaled_2x_pixel_index.y * 16u + scaled_2x_pixel_index.x * 8u; -} - -#endif // XENIA_GPU_D3D12_SHADERS_EDRAM_LOAD_STORE_HLSLI_ diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_color_32bpp.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_color_32bpp.cs.hlsl deleted file mode 100644 index d7cc513ed..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_color_32bpp.cs.hlsl +++ /dev/null @@ -1,14 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 samples = xe_edram_load_store_source.Load4(rt_offset); - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - xe_edram_load_store_dest.Store4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index), samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_color_64bpp.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_color_64bpp.cs.hlsl deleted file mode 100644 index 01387767b..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_color_64bpp.cs.hlsl +++ /dev/null @@ -1,14 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(40, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 samples = xe_edram_load_store_source.Load4(rt_offset); - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 2u; - xe_edram_load_store_dest.Store4( - XeEdramOffset64bpp(xe_group_id.xy, tile_sample_index), samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_color_7e3.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_color_7e3.cs.hlsl deleted file mode 100644 index 4c3887f71..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_color_7e3.cs.hlsl +++ /dev/null @@ -1,21 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(40, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 samples_f16u32_packed = xe_edram_load_store_source.Load4(rt_offset); - uint4 sample_0_f16u32 = samples_f16u32_packed.xxyy >> uint4(0u, 16u, 0u, 16u); - uint4 sample_1_f16u32 = samples_f16u32_packed.zzww >> uint4(0u, 16u, 0u, 16u); - uint2 samples_7e3_packed = uint2( - XePackR10G10B10A2Float(f16tof32(sample_0_f16u32)), - XePackR10G10B10A2Float(f16tof32(sample_1_f16u32))); - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 2u; - xe_edram_load_store_dest.Store2( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index), - samples_7e3_packed); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_depth_float.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_depth_float.cs.hlsl deleted file mode 100644 index d0123c69f..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_depth_float.cs.hlsl +++ /dev/null @@ -1,22 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - // Depth (exact conversion ensured during drawing). - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 samples = - XeFloat32To20e4(xe_edram_load_store_source.Load4(rt_offset)) << 8u; - // Stencil. - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - samples |= (xe_edram_load_store_source.Load(rt_offset).xxxx >> - uint4(0u, 8u, 16u, 24u)) & 0xFFu; - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - xe_edram_load_store_dest.Store4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index), samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_depth_float24and32.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_depth_float24and32.cs.hlsl deleted file mode 100644 index ac7626721..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_depth_float24and32.cs.hlsl +++ /dev/null @@ -1,25 +0,0 @@ -#include "edram_load_store.hlsli" -#include "pixel_formats.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - // Depth. - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 depth32 = xe_edram_load_store_source.Load4(rt_offset); - uint4 depth24_stencil = XeFloat32To20e4(depth32) << 8u; - // Stencil. - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - depth24_stencil |= (xe_edram_load_store_source.Load(rt_offset).xxxx >> - uint4(0u, 8u, 16u, 24u)) & 0xFFu; - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - uint edram_offset = XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index); - // Store 24-bit depth for aliasing and checking if 32-bit depth is up to date. - xe_edram_load_store_dest.Store4(edram_offset, depth24_stencil); - // Store 32-bit depth so precision isn't lost when doing multipass rendering. - xe_edram_load_store_dest.Store4(10485760u + edram_offset, depth32); -} diff --git a/src/xenia/gpu/d3d12/shaders/edram_store_depth_unorm.cs.hlsl b/src/xenia/gpu/d3d12/shaders/edram_store_depth_unorm.cs.hlsl deleted file mode 100644 index 093f533af..000000000 --- a/src/xenia/gpu/d3d12/shaders/edram_store_depth_unorm.cs.hlsl +++ /dev/null @@ -1,20 +0,0 @@ -#include "edram_load_store.hlsli" - -[numthreads(20, 16, 1)] -void main(uint3 xe_group_id : SV_GroupID, - uint3 xe_group_thread_id : SV_GroupThreadID, - uint3 xe_thread_id : SV_DispatchThreadID) { - // Depth. - uint rt_offset = xe_thread_id.y * xe_edram_rt_color_depth_pitch + - xe_thread_id.x * 16u + xe_edram_rt_color_depth_offset; - uint4 samples = xe_edram_load_store_source.Load4(rt_offset) << 8u; - // Stencil. - rt_offset = xe_thread_id.y * xe_edram_rt_stencil_pitch + xe_thread_id.x * 4u + - xe_edram_rt_stencil_offset; - samples |= (xe_edram_load_store_source.Load(rt_offset).xxxx >> - uint4(0u, 8u, 16u, 24u)) & 0xFFu; - uint2 tile_sample_index = xe_group_thread_id.xy; - tile_sample_index.x *= 4u; - xe_edram_load_store_dest.Store4( - XeEdramOffset32bpp(xe_group_id.xy, tile_sample_index), samples); -} diff --git a/src/xenia/gpu/d3d12/shaders/endian.hlsli b/src/xenia/gpu/d3d12/shaders/endian.hlsli index 7fe588080..a7f58adb3 100644 --- a/src/xenia/gpu/d3d12/shaders/endian.hlsli +++ b/src/xenia/gpu/d3d12/shaders/endian.hlsli @@ -23,6 +23,14 @@ XE_ENDIAN_SWAP_16_OVERLOAD(uint2) XE_ENDIAN_SWAP_16_OVERLOAD(uint3) XE_ENDIAN_SWAP_16_OVERLOAD(uint4) +// 4 + 1 version for 3x3 resolution scale resolves. +void XeEndianSwap16(inout uint4 value, inout uint value_4, uint endian) { + if (endian == kXenosEndian_8in16) { + value = ((value & 0x00FF00FFu) << 8u) | ((value & 0xFF00FF00u) >> 8u); + value_4 = ((value_4 & 0x00FF00FFu) << 8u) | ((value_4 & 0xFF00FF00u) >> 8u); + } +} + #define XE_ENDIAN_SWAP_32_OVERLOAD(XeEndianSwapType) \ XeEndianSwapType XeEndianSwap32(XeEndianSwapType value, uint endian) { \ if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { \ @@ -38,6 +46,18 @@ XE_ENDIAN_SWAP_32_OVERLOAD(uint2) XE_ENDIAN_SWAP_32_OVERLOAD(uint3) XE_ENDIAN_SWAP_32_OVERLOAD(uint4) +// 4 + 1 version for 3x3 resolution scale resolves. +void XeEndianSwap32(inout uint4 value, inout uint value_4, uint endian) { + if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { + value = ((value & 0x00FF00FFu) << 8u) | ((value & 0xFF00FF00u) >> 8u); + value_4 = ((value_4 & 0x00FF00FFu) << 8u) | ((value_4 & 0xFF00FF00u) >> 8u); + } + if (endian == kXenosEndian_8in32 || endian == kXenosEndian_16in32) { + value = (value << 16u) | (value >> 16u); + value_4 = (value_4 << 16u) | (value_4 >> 16u); + } +} + uint2 XeEndianSwap64(uint2 value, uint endian) { if (endian == kXenosEndian_8in64) { value = value.yx; @@ -45,6 +65,7 @@ uint2 XeEndianSwap64(uint2 value, uint endian) { } return XeEndianSwap32(value, endian); } + uint4 XeEndianSwap64(uint4 value, uint endian) { if (endian == kXenosEndian_8in64) { value = value.yxwz; @@ -53,6 +74,48 @@ uint4 XeEndianSwap64(uint4 value, uint endian) { return XeEndianSwap32(value, endian); } +// 2 + 2 version for 3x3 resolution scale resolves. +void XeEndianSwap64(inout uint4 value_01, inout uint4 value_23, uint endian) { + if (endian == kXenosEndian_8in64) { + value_01 = value_01.yxwz; + value_23 = value_23.yxwz; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { + value_01 = ((value_01 & 0x00FF00FFu) << 8u) | + ((value_01 & 0xFF00FF00u) >> 8u); + value_23 = ((value_23 & 0x00FF00FFu) << 8u) | + ((value_23 & 0xFF00FF00u) >> 8u); + } + if (endian == kXenosEndian_8in32 || endian == kXenosEndian_16in32) { + value_01 = (value_01 << 16u) | (value_01 >> 16u); + value_23 = (value_23 << 16u) | (value_23 >> 16u); + } +} + +// 2 + 2 + 1 version for 3x3 resolution scale resolves. +void XeEndianSwap64(inout uint4 value_01, inout uint4 value_23, + inout uint2 value_4, uint endian) { + if (endian == kXenosEndian_8in64) { + value_01 = value_01.yxwz; + value_23 = value_23.yxwz; + value_4 = value_4.yx; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { + value_01 = ((value_01 & 0x00FF00FFu) << 8u) | + ((value_01 & 0xFF00FF00u) >> 8u); + value_23 = ((value_23 & 0x00FF00FFu) << 8u) | + ((value_23 & 0xFF00FF00u) >> 8u); + value_4 = ((value_4 & 0x00FF00FFu) << 8u) | ((value_4 & 0xFF00FF00u) >> 8u); + } + if (endian == kXenosEndian_8in32 || endian == kXenosEndian_16in32) { + value_01 = (value_01 << 16u) | (value_01 >> 16u); + value_23 = (value_23 << 16u) | (value_23 >> 16u); + value_4 = (value_4 << 16u) | (value_4 >> 16u); + } +} + uint4 XeEndianSwap128(uint4 value, uint endian) { if (endian == kXenosEndian_8in128) { value = value.wzyx; @@ -61,4 +124,71 @@ uint4 XeEndianSwap128(uint4 value, uint endian) { return XeEndianSwap64(value, endian); } +// 4-value version for 3x3 resolution scale resolves. +void XeEndianSwap128(inout uint4 value_0, inout uint4 value_1, + inout uint4 value_2, inout uint4 value_3, uint endian) { + if (endian == kXenosEndian_8in128) { + value_0 = value_0.wzyx; + value_1 = value_1.wzyx; + value_2 = value_2.wzyx; + value_3 = value_3.wzyx; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in64) { + value_0 = value_0.yxwz; + value_1 = value_1.yxwz; + value_2 = value_2.yxwz; + value_3 = value_3.yxwz; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { + value_0 = ((value_0 & 0x00FF00FFu) << 8u) | ((value_0 & 0xFF00FF00u) >> 8u); + value_1 = ((value_1 & 0x00FF00FFu) << 8u) | ((value_1 & 0xFF00FF00u) >> 8u); + value_2 = ((value_2 & 0x00FF00FFu) << 8u) | ((value_2 & 0xFF00FF00u) >> 8u); + value_3 = ((value_3 & 0x00FF00FFu) << 8u) | ((value_3 & 0xFF00FF00u) >> 8u); + } + if (endian == kXenosEndian_8in32 || endian == kXenosEndian_16in32) { + value_0 = (value_0 << 16u) | (value_0 >> 16u); + value_1 = (value_1 << 16u) | (value_1 >> 16u); + value_2 = (value_2 << 16u) | (value_2 >> 16u); + value_3 = (value_3 << 16u) | (value_3 >> 16u); + } +} + +// 5-value version for 3x3 resolution scale resolves. +void XeEndianSwap128(inout uint4 value_0, inout uint4 value_1, + inout uint4 value_2, inout uint4 value_3, + inout uint4 value_4, uint endian) { + if (endian == kXenosEndian_8in128) { + value_0 = value_0.wzyx; + value_1 = value_1.wzyx; + value_2 = value_2.wzyx; + value_3 = value_3.wzyx; + value_4 = value_4.wzyx; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in64) { + value_0 = value_0.yxwz; + value_1 = value_1.yxwz; + value_2 = value_2.yxwz; + value_3 = value_3.yxwz; + value_4 = value_4.yxwz; + endian = kXenosEndian_8in32; + } + if (endian == kXenosEndian_8in16 || endian == kXenosEndian_8in32) { + value_0 = ((value_0 & 0x00FF00FFu) << 8u) | ((value_0 & 0xFF00FF00u) >> 8u); + value_1 = ((value_1 & 0x00FF00FFu) << 8u) | ((value_1 & 0xFF00FF00u) >> 8u); + value_2 = ((value_2 & 0x00FF00FFu) << 8u) | ((value_2 & 0xFF00FF00u) >> 8u); + value_3 = ((value_3 & 0x00FF00FFu) << 8u) | ((value_3 & 0xFF00FF00u) >> 8u); + value_4 = ((value_4 & 0x00FF00FFu) << 8u) | ((value_4 & 0xFF00FF00u) >> 8u); + } + if (endian == kXenosEndian_8in32 || endian == kXenosEndian_16in32) { + value_0 = (value_0 << 16u) | (value_0 >> 16u); + value_1 = (value_1 << 16u) | (value_1 >> 16u); + value_2 = (value_2 << 16u) | (value_2 >> 16u); + value_3 = (value_3 << 16u) | (value_3 >> 16u); + value_4 = (value_4 << 16u) | (value_4 >> 16u); + } +} + #endif // XENIA_GPU_D3D12_SHADERS_ENDIAN_HLSLI_ diff --git a/src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl b/src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl index 346b21b4f..10840173c 100644 --- a/src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl +++ b/src/xenia/gpu/d3d12/shaders/float24_round.ps.hlsl @@ -8,6 +8,9 @@ struct XePSInput { precise float main(XePSInput xe_input) : SV_Depth { // Input Z may be outside the viewport range (it's clamped after the shader). - return asfloat( - XeFloat20e4To32(XeFloat32To20e4(asuint(saturate(xe_input.position.z))))); + // Assuming that 0...0.5 on the host corresponds to 0...1 on the guest, to + // allow for safe reinterpretation of any 24-bit value to and from float24 + // depth using depth output without unrestricted depth range. + return asfloat(XeFloat20e4To32( + XeFloat32To20e4(asuint(saturate(xe_input.position.z * 2.0f))), true)); } diff --git a/src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl b/src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl index 83a5d08d9..29d4e6761 100644 --- a/src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl +++ b/src/xenia/gpu/d3d12/shaders/float24_truncate.ps.hlsl @@ -17,7 +17,10 @@ precise float main(XePSInput xe_input) : SV_DepthLessEqual { // at -34. // Anything smaller than 2^-34 becomes 0. // Input Z may be outside the viewport range (it's clamped after the shader). - precise uint depth = asuint(saturate(xe_input.position.z)); + // Assuming that 0...0.5 on the host corresponds to 0...1 on the guest, to + // allow for safe reinterpretation of any 24-bit value to and from float24 + // depth using depth output without unrestricted depth range. + precise uint depth = asuint(saturate(xe_input.position.z * 2.0f)); // Check if the number is representable as a float24 after truncation - the // exponent is at least -34. if (depth >= 0x2E800000u) { @@ -34,5 +37,5 @@ precise float main(XePSInput xe_input) : SV_DepthLessEqual { // The number is not representable as float24 after truncation - zero. depth = 0u; } - return asfloat(depth); + return asfloat(depth) * 0.5f; } diff --git a/src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl b/src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl index e862f0b7c..3314d1d87 100644 --- a/src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/fullscreen.vs.hlsl @@ -1,7 +1,5 @@ // A triangle covering the whole viewport. -void main(uint xe_vertex_id : SV_VertexID, out float2 xe_texcoord : TEXCOORD, - out float4 xe_position : SV_Position) { - xe_texcoord = float2(uint2(xe_vertex_id, xe_vertex_id << 1u) & 2u); - xe_position = - float4(xe_texcoord * float2(2.0, -2.0) + float2(-1.0, 1.0), 0.0, 1.0); +float4 main(uint xe_vertex_id : SV_VertexID) : SV_Position { + return float4(((xe_vertex_id.xx >> uint2(0u, 1u)) & 1u) * 4.0 - 1.0, 0.0, + 1.0); } diff --git a/src/xenia/gpu/d3d12/shaders/fullscreen_tc.vs.hlsl b/src/xenia/gpu/d3d12/shaders/fullscreen_tc.vs.hlsl new file mode 100644 index 000000000..e862f0b7c --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/fullscreen_tc.vs.hlsl @@ -0,0 +1,7 @@ +// A triangle covering the whole viewport. +void main(uint xe_vertex_id : SV_VertexID, out float2 xe_texcoord : TEXCOORD, + out float4 xe_position : SV_Position) { + xe_texcoord = float2(uint2(xe_vertex_id, xe_vertex_id << 1u) & 2u); + xe_position = + float4(xe_texcoord * float2(2.0, -2.0) + float2(-1.0, 1.0), 0.0, 1.0); +} diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli b/src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli new file mode 100644 index 000000000..190d8b03e --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/host_depth_store.hlsli @@ -0,0 +1,40 @@ +#ifndef XENIA_GPU_D3D12_SHADERS_HOST_DEPTH_STORE_HLSLI_ +#define XENIA_GPU_D3D12_SHADERS_HOST_DEPTH_STORE_HLSLI_ + +cbuffer XeHostDepthStoreRectangleConstants : register(b0) { + uint xe_host_depth_store_rectangle; +}; + +cbuffer XeHostDepthStoreRenderTargetConstants : register(b1) { + uint xe_host_depth_store_render_target; +}; +RWBuffer xe_host_depth_store_dest : register(u0); + +uint2 XeHostDepthStoreOrigin() { + return ((xe_host_depth_store_rectangle.xx >> uint2(0u, 10u)) & 0x3FFu) << 3u; +} + +uint XeHostDepthStoreWidthDiv8Minus1() { + return (xe_host_depth_store_rectangle >> 20u) & 0x3FFu; +} + +// As host depth is needed for at most one transfer destination per update, base +// is not passed to the shader - (0, 0) of the render target is at 0 of the +// destination buffer. + +uint XeHostDepthStorePitchTiles() { + return xe_host_depth_store_render_target & 0x3FFu; +} + +uint XeHostDepthStoreResolutionScale() { + return (xe_host_depth_store_render_target >> 10u) & 0x3u; +} + +uint XeHostDepthStoreSecondSampleIndex() { + return (xe_host_depth_store_render_target >> 12u) & 0x3u; +} + +// 40-sample columns are not swapped for addressing simplicity (because this is +// used for depth -> depth transfers, where swapping isn't needed). + +#endif // XENIA_GPU_D3D12_SHADERS_HOST_DEPTH_STORE_HLSLI_ \ No newline at end of file diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_1xmsaa.cs.hlsl b/src/xenia/gpu/d3d12/shaders/host_depth_store_1xmsaa.cs.hlsl new file mode 100644 index 000000000..ebfa9cffd --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/host_depth_store_1xmsaa.cs.hlsl @@ -0,0 +1,33 @@ +#include "edram.hlsli" +#include "host_depth_store.hlsli" + +Texture2D xe_host_depth_store_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 samples (same as resolve granularity). + uint resolution_scale = XeHostDepthStoreResolutionScale(); + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (xe_thread_id.x > + XeHostDepthStoreWidthDiv8Minus1() * resolution_scale) { + return; + } + uint2 pixel_index = XeHostDepthStoreOrigin() * resolution_scale + + (xe_thread_id.xy << uint2(3u, 0u)); + uint edram_address_int4s = + XeEdramOffsetInts(pixel_index, 0u, XeHostDepthStorePitchTiles(), + kXenosMsaaSamples_1X, false, 0u, 0u, resolution_scale) + >> 2u; + int3 source_pixel_index = int3(pixel_index, 0); + xe_host_depth_store_dest[edram_address_int4s] = asuint(float4( + xe_host_depth_store_source.Load(source_pixel_index), + xe_host_depth_store_source.Load(source_pixel_index + int3(1, 0, 0)), + xe_host_depth_store_source.Load(source_pixel_index + int3(2, 0, 0)), + xe_host_depth_store_source.Load(source_pixel_index + int3(3, 0, 0)))); + xe_host_depth_store_dest[edram_address_int4s + 1u] = asuint(float4( + xe_host_depth_store_source.Load(source_pixel_index + int3(4, 0, 0)), + xe_host_depth_store_source.Load(source_pixel_index + int3(5, 0, 0)), + xe_host_depth_store_source.Load(source_pixel_index + int3(6, 0, 0)), + xe_host_depth_store_source.Load(source_pixel_index + int3(7, 0, 0)))); +} diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl b/src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl new file mode 100644 index 000000000..f8c31b22e --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/host_depth_store_2xmsaa.cs.hlsl @@ -0,0 +1,43 @@ +#include "edram.hlsli" +#include "host_depth_store.hlsli" + +Texture2DMS xe_host_depth_store_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 samples (8x0.5 pixels, resolve granularity is 8 pixels). + uint resolution_scale = XeHostDepthStoreResolutionScale(); + // Group height is aligned to resolve granularity, Y overflow check not + // needed. + [branch] if (xe_thread_id.x > + XeHostDepthStoreWidthDiv8Minus1() * resolution_scale) { + return; + } + uint2 pixel_index = XeHostDepthStoreOrigin() * resolution_scale + + uint2(xe_thread_id.x << 3u, xe_thread_id.y >> 1u); + uint dest_sample_index = xe_thread_id.y & 1u; + uint edram_address_int4s = + XeEdramOffsetInts(pixel_index, 0u, XeHostDepthStorePitchTiles(), + kXenosMsaaSamples_2X, false, 0u, dest_sample_index, + resolution_scale) + >> 2u; + int source_sample_index = + int(dest_sample_index != 0u ? XeHostDepthStoreSecondSampleIndex() : 0u); + xe_host_depth_store_dest[edram_address_int4s] = asuint(float4( + xe_host_depth_store_source.Load(int2(pixel_index), source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0), + source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(2, 0), + source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(3, 0), + source_sample_index))); + xe_host_depth_store_dest[edram_address_int4s + 1u] = asuint(float4( + xe_host_depth_store_source.Load(int2(pixel_index) + int2(4, 0), + source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(5, 0), + source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(6, 0), + source_sample_index), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(7, 0), + source_sample_index))); +} diff --git a/src/xenia/gpu/d3d12/shaders/host_depth_store_4xmsaa.cs.hlsl b/src/xenia/gpu/d3d12/shaders/host_depth_store_4xmsaa.cs.hlsl new file mode 100644 index 000000000..0ee0f74ad --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/host_depth_store_4xmsaa.cs.hlsl @@ -0,0 +1,43 @@ +#include "edram.hlsli" +#include "host_depth_store.hlsli" + +Texture2DMS xe_host_depth_store_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 samples (4x0.5 pixels, resolve granularity is 8 pixels). + uint resolution_scale = XeHostDepthStoreResolutionScale(); + // Group height is aligned to resolve granularity, Y overflow check not + // needed. + [branch] if ((xe_thread_id.x >> 1u) > + XeHostDepthStoreWidthDiv8Minus1() * resolution_scale) { + return; + } + uint2 pixel_index = XeHostDepthStoreOrigin() * resolution_scale + + uint2(xe_thread_id.x << 2u, xe_thread_id.y >> 1u); + // For simplicity, passing samples directly, not pixels, to XeEdramOffsetInts. + uint edram_address_int4s = + XeEdramOffsetInts((pixel_index << 1u) | (xe_thread_id.xy & 1u), 0u, + XeHostDepthStorePitchTiles(), kXenosMsaaSamples_1X, + false, 0u, 0u, resolution_scale) + >> 2u; + // Render target horizontal sample in bit 0, vertical sample in bit 1. + int source_sample_left = int((xe_thread_id.y & 1u) << 1u); + int source_sample_right = source_sample_left + 1; + xe_host_depth_store_dest[edram_address_int4s] = asuint(float4( + xe_host_depth_store_source.Load(int2(pixel_index), source_sample_left), + xe_host_depth_store_source.Load(int2(pixel_index), source_sample_right), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0), + source_sample_left), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(1, 0), + source_sample_right))); + xe_host_depth_store_dest[edram_address_int4s + 1u] = asuint(float4( + xe_host_depth_store_source.Load(int2(pixel_index) + int2(2, 0), + source_sample_left), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(2, 0), + source_sample_right), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(3, 0), + source_sample_left), + xe_host_depth_store_source.Load(int2(pixel_index) + int2(3, 0), + source_sample_right))); +} diff --git a/src/xenia/gpu/d3d12/shaders/passthrough_position_xy.vs.hlsl b/src/xenia/gpu/d3d12/shaders/passthrough_position_xy.vs.hlsl new file mode 100644 index 000000000..97f4f0e1d --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/passthrough_position_xy.vs.hlsl @@ -0,0 +1,3 @@ +float4 main(float2 position : POSITION) : SV_Position { + return float4(position, 0.0, 1.0); +} diff --git a/src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli b/src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli index e3654211d..91bde0378 100644 --- a/src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli +++ b/src/xenia/gpu/d3d12/shaders/pixel_formats.hlsli @@ -103,6 +103,16 @@ uint XePackR5G5B6UNorm(float3 f) { return n.r | (n.g << 5) | (n.b << 10); } +uint XePackR8G8UNorm(float2 f) { + uint2 n = uint2(saturate(f) * 255.0f + 0.5f); + return n.r | (n.g << 8); +} + +uint XePackR8G8B8UNorm(float3 f) { + uint3 n = uint3(saturate(f) * 255.0f + 0.5f); + return n.r | (n.g << 8) | (n.b << 16); +} + uint XePackR8G8B8A8UNorm(float4 f) { uint4 n = uint4(saturate(f) * 255.0f + 0.5f); return n.r | (n.g << 8) | (n.b << 16) | (n.a << 24); @@ -142,8 +152,143 @@ uint2 XePackR16G16B16A16UNorm(float4 f) { return n.rb | (n.ga << 16); } -uint2 XePack16bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, - float4 pixel_3, uint format) { +uint4 XePack16bpp4PixelsInUInt4(float4 pixel_0, float4 pixel_1, float4 pixel_2, + float4 pixel_3, uint format) { + uint4 packed; + switch (format) { + case kXenosFormat_1_5_5_5: + packed.x = XePackR5G5B5A1UNorm(pixel_0); + packed.y = XePackR5G5B5A1UNorm(pixel_1); + packed.z = XePackR5G5B5A1UNorm(pixel_2); + packed.w = XePackR5G5B5A1UNorm(pixel_3); + break; + case kXenosFormat_5_6_5: + packed.x = XePackR5G6B5UNorm(pixel_0.rgb); + packed.y = XePackR5G6B5UNorm(pixel_1.rgb); + packed.z = XePackR5G6B5UNorm(pixel_2.rgb); + packed.w = XePackR5G6B5UNorm(pixel_3.rgb); + break; + case kXenosFormat_6_5_5: + packed.x = XePackR5G5B6UNorm(pixel_0.rgb); + packed.y = XePackR5G5B6UNorm(pixel_1.rgb); + packed.z = XePackR5G5B6UNorm(pixel_2.rgb); + packed.w = XePackR5G5B6UNorm(pixel_3.rgb); + break; + case kXenosFormat_8_8: + packed.x = XePackR8G8UNorm(pixel_0.rg); + packed.y = XePackR8G8UNorm(pixel_1.rg); + packed.z = XePackR8G8UNorm(pixel_2.rg); + packed.w = XePackR8G8UNorm(pixel_3.rg); + break; + case kXenosFormat_4_4_4_4: + packed.x = XePackR4G4B4A4UNorm(pixel_0); + packed.y = XePackR4G4B4A4UNorm(pixel_1); + packed.z = XePackR4G4B4A4UNorm(pixel_2); + packed.w = XePackR4G4B4A4UNorm(pixel_3); + break; + case kXenosFormat_16: + packed.x = XePackR16UNorm(pixel_0.r); + packed.y = XePackR16UNorm(pixel_1.r); + packed.z = XePackR16UNorm(pixel_2.r); + packed.w = XePackR16UNorm(pixel_3.r); + break; + default: + // Treat as something (16_FLOAT). + packed = f32tof16(float4(pixel_0.r, pixel_1.r, pixel_2.r, pixel_3.r)); + break; + } + return packed; +} + +void XePack16bpp5PixelsInUInt41(float4 pixel_0, float4 pixel_1, float4 pixel_2, + float4 pixel_3, float4 pixel_4, uint format, + out uint4 packed, out uint packed_4) { + switch (format) { + case kXenosFormat_1_5_5_5: + packed.x = XePackR5G5B5A1UNorm(pixel_0); + packed.y = XePackR5G5B5A1UNorm(pixel_1); + packed.z = XePackR5G5B5A1UNorm(pixel_2); + packed.w = XePackR5G5B5A1UNorm(pixel_3); + packed_4 = XePackR5G5B5A1UNorm(pixel_4); + break; + case kXenosFormat_5_6_5: + packed.x = XePackR5G6B5UNorm(pixel_0.rgb); + packed.y = XePackR5G6B5UNorm(pixel_1.rgb); + packed.z = XePackR5G6B5UNorm(pixel_2.rgb); + packed.w = XePackR5G6B5UNorm(pixel_3.rgb); + packed_4 = XePackR5G6B5UNorm(pixel_4.rgb); + break; + case kXenosFormat_6_5_5: + packed.x = XePackR5G5B6UNorm(pixel_0.rgb); + packed.y = XePackR5G5B6UNorm(pixel_1.rgb); + packed.z = XePackR5G5B6UNorm(pixel_2.rgb); + packed.w = XePackR5G5B6UNorm(pixel_3.rgb); + packed_4 = XePackR5G5B6UNorm(pixel_4.rgb); + break; + case kXenosFormat_8_8: + packed.x = XePackR8G8UNorm(pixel_0.rg); + packed.y = XePackR8G8UNorm(pixel_1.rg); + packed.z = XePackR8G8UNorm(pixel_2.rg); + packed.w = XePackR8G8UNorm(pixel_3.rg); + packed_4 = XePackR8G8UNorm(pixel_4.rg); + break; + case kXenosFormat_4_4_4_4: + packed.x = XePackR4G4B4A4UNorm(pixel_0); + packed.y = XePackR4G4B4A4UNorm(pixel_1); + packed.z = XePackR4G4B4A4UNorm(pixel_2); + packed.w = XePackR4G4B4A4UNorm(pixel_3); + packed_4 = XePackR4G4B4A4UNorm(pixel_4); + break; + case kXenosFormat_16: + packed.x = XePackR16UNorm(pixel_0.r); + packed.y = XePackR16UNorm(pixel_1.r); + packed.z = XePackR16UNorm(pixel_2.r); + packed.w = XePackR16UNorm(pixel_3.r); + packed_4 = XePackR16UNorm(pixel_4.r); + break; + default: + // Treat as something (16_FLOAT). + packed = f32tof16(float4(pixel_0.r, pixel_1.r, pixel_2.r, pixel_3.r)); + packed_4 = f32tof16(pixel_4.r); + break; + } +} + +uint XePack16bpp2PixelsInUInt(float4 pixel_0, float4 pixel_1, uint format) { + uint packed; + switch (format) { + case kXenosFormat_1_5_5_5: + packed = XePackR5G5B5A1UNorm(pixel_0) | + (XePackR5G5B5A1UNorm(pixel_1) << 16u); + break; + case kXenosFormat_5_6_5: + packed = XePackR5G6B5UNorm(pixel_0.rgb) | + (XePackR5G6B5UNorm(pixel_1.rgb) << 16u); + break; + case kXenosFormat_6_5_5: + packed = XePackR5G5B6UNorm(pixel_0.rgb) | + (XePackR5G5B6UNorm(pixel_1.rgb) << 16u); + break; + case kXenosFormat_8_8: + packed = XePackR8G8B8A8UNorm(float4(pixel_0.rg, pixel_1.rg)); + break; + case kXenosFormat_4_4_4_4: + packed = XePackR4G4B4A4UNorm(pixel_0) | + (XePackR4G4B4A4UNorm(pixel_1) << 16u); + break; + case kXenosFormat_16: + packed = XePackR16G16UNorm(float2(pixel_0.r, pixel_1.r)); + break; + default: + // Treat as something (16_FLOAT). + packed = f32tof16(pixel_0.r) | (f32tof16(pixel_1.r) << 16u); + break; + } + return packed; +} + +uint2 XePack16bpp4PixelsInUInt2(float4 pixel_0, float4 pixel_1, float4 pixel_2, + float4 pixel_3, uint format) { uint2 packed; switch (format) { case kXenosFormat_1_5_5_5: @@ -187,6 +332,48 @@ uint2 XePack16bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, return packed; } +uint2 XePack32bpp2Pixels(float4 pixel_0, float4 pixel_1, uint format) { + uint2 packed; + switch (format) { + case kXenosFormat_8_8_8_8: + // TODO(Triang3l): Investigate 8_8_8_8_A. + case kXenosFormat_8_8_8_8_A: + case kXenosFormat_8_8_8_8_AS_16_16_16_16: + packed.x = XePackR8G8B8A8UNorm(pixel_0); + packed.y = XePackR8G8B8A8UNorm(pixel_1); + break; + case kXenosFormat_2_10_10_10: + case kXenosFormat_2_10_10_10_AS_16_16_16_16: + packed.x = XePackR10G10B10A2UNorm(pixel_0); + packed.y = XePackR10G10B10A2UNorm(pixel_1); + break; + case kXenosFormat_10_11_11: + case kXenosFormat_10_11_11_AS_16_16_16_16: + packed.x = XePackR11G11B10UNorm(pixel_0.rgb); + packed.y = XePackR11G11B10UNorm(pixel_1.rgb); + break; + case kXenosFormat_11_11_10: + case kXenosFormat_11_11_10_AS_16_16_16_16: + packed.x = XePackR10G11B11UNorm(pixel_0.rgb); + packed.y = XePackR10G11B11UNorm(pixel_1.rgb); + break; + case kXenosFormat_16_16: + packed.x = XePackR16G16UNorm(pixel_0.rg); + packed.y = XePackR16G16UNorm(pixel_1.rg); + break; + case kXenosFormat_16_16_FLOAT: + packed = f32tof16(float2(pixel_0.r, pixel_1.r)) | + (f32tof16(float2(pixel_0.g, pixel_1.g)) << 16u); + break; + default: + // Treat as 32_FLOAT. + packed.x = asuint(pixel_0.r); + packed.y = asuint(pixel_1.r); + break; + } + return packed; +} + uint4 XePack32bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, float4 pixel_3, uint format) { uint4 packed; @@ -243,6 +430,85 @@ uint4 XePack32bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, return packed; } +void XePack32bpp5Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, + float4 pixel_3, float4 pixel_4, uint format, + out uint4 packed, out uint packed_4) { + switch (format) { + case kXenosFormat_8_8_8_8: + // TODO(Triang3l): Investigate 8_8_8_8_A. + case kXenosFormat_8_8_8_8_A: + case kXenosFormat_8_8_8_8_AS_16_16_16_16: + packed.x = XePackR8G8B8A8UNorm(pixel_0); + packed.y = XePackR8G8B8A8UNorm(pixel_1); + packed.z = XePackR8G8B8A8UNorm(pixel_2); + packed.w = XePackR8G8B8A8UNorm(pixel_3); + packed_4 = XePackR8G8B8A8UNorm(pixel_4); + break; + case kXenosFormat_2_10_10_10: + case kXenosFormat_2_10_10_10_AS_16_16_16_16: + packed.x = XePackR10G10B10A2UNorm(pixel_0); + packed.y = XePackR10G10B10A2UNorm(pixel_1); + packed.z = XePackR10G10B10A2UNorm(pixel_2); + packed.w = XePackR10G10B10A2UNorm(pixel_3); + packed_4 = XePackR10G10B10A2UNorm(pixel_4); + break; + case kXenosFormat_10_11_11: + case kXenosFormat_10_11_11_AS_16_16_16_16: + packed.x = XePackR11G11B10UNorm(pixel_0.rgb); + packed.y = XePackR11G11B10UNorm(pixel_1.rgb); + packed.z = XePackR11G11B10UNorm(pixel_2.rgb); + packed.w = XePackR11G11B10UNorm(pixel_3.rgb); + packed_4 = XePackR11G11B10UNorm(pixel_4.rgb); + break; + case kXenosFormat_11_11_10: + case kXenosFormat_11_11_10_AS_16_16_16_16: + packed.x = XePackR10G11B11UNorm(pixel_0.rgb); + packed.y = XePackR10G11B11UNorm(pixel_1.rgb); + packed.z = XePackR10G11B11UNorm(pixel_2.rgb); + packed.w = XePackR10G11B11UNorm(pixel_3.rgb); + packed_4 = XePackR10G11B11UNorm(pixel_4.rgb); + break; + case kXenosFormat_16_16: + packed.x = XePackR16G16UNorm(pixel_0.rg); + packed.y = XePackR16G16UNorm(pixel_1.rg); + packed.z = XePackR16G16UNorm(pixel_2.rg); + packed.w = XePackR16G16UNorm(pixel_3.rg); + packed_4 = XePackR16G16UNorm(pixel_4.rg); + break; + case kXenosFormat_16_16_FLOAT: + packed = + f32tof16(float4(pixel_0.r, pixel_1.r, pixel_2.r, pixel_3.r)) | + (f32tof16(float4(pixel_0.g, pixel_1.g, pixel_2.g, pixel_3.g)) << 16u); + packed_4 = f32tof16(pixel_4.r) | (f32tof16(pixel_4.g) << 16u); + break; + default: + // Treat as 32_FLOAT. + packed.x = asuint(pixel_0.r); + packed.y = asuint(pixel_1.r); + packed.z = asuint(pixel_2.r); + packed.w = asuint(pixel_3.r); + packed_4 = asuint(pixel_4.r); + break; + } +} + +uint2 XePack64bppPixel(float4 pixel, uint format) { + uint2 packed; + switch (format) { + case kXenosFormat_16_16_16_16: + packed = XePackR16G16B16A16UNorm(pixel); + break; + case kXenosFormat_16_16_16_16_FLOAT: + packed = f32tof16(pixel.rb) | (f32tof16(pixel.ga) << 16u); + break; + default: + // Treat as 32_32_FLOAT. + packed = asuint(pixel.rg); + break; + } + return packed; +} + void XePack64bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, float4 pixel_3, uint format, out uint4 packed_01, out uint4 packed_23) { @@ -269,30 +535,43 @@ void XePack64bpp4Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, } } -// EDRAM color format packing. - -uint XePackR10G10B10A2Float(float4 f) { - // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp - // Keep only positive integers and saturate to 31.875 (also dropping NaNs). - // Was previously done with `asuint(clamp(asint(rgb_f32u32), 0, 0x41FF0000))`, - // but FXC decides to ignore the uint->int cast, and negative numbers become - // 0x41FF0000. - uint3 rgb_f32u32 = asuint(f.rgb); - rgb_f32u32 = min((rgb_f32u32 <= 0x7FFFFFFFu) ? rgb_f32u32 : (0u).xxx, - 0x41FF0000u); - uint3 denormalized = ((rgb_f32u32 & 0x7FFFFFu) | 0x800000u) >> - min((125u).xxx - (rgb_f32u32 >> 23u), 24u); - uint3 rgb_f10u32 = - (rgb_f32u32 < 0x3E800000u) ? denormalized : (rgb_f32u32 + 0xC2000000u); - rgb_f10u32 = - ((rgb_f10u32 + 0x7FFFu + ((rgb_f10u32 >> 16u) & 1u)) >> 16u) & 0x3FFu; - // Rounding alpha to the nearest integer. - return rgb_f10u32.r | (rgb_f10u32.g << 10u) | (rgb_f10u32.b << 20u) | - (uint(saturate(f.a) * 3.0f + 0.5f) << 30u); +void XePack64bpp5Pixels(float4 pixel_0, float4 pixel_1, float4 pixel_2, + float4 pixel_3, float4 pixel_4, uint format, + out uint4 packed_01, out uint4 packed_23, + out uint2 packed_4) { + switch (format) { + case kXenosFormat_16_16_16_16: + packed_01.xy = XePackR16G16B16A16UNorm(pixel_0); + packed_01.zw = XePackR16G16B16A16UNorm(pixel_1); + packed_23.xy = XePackR16G16B16A16UNorm(pixel_2); + packed_23.zw = XePackR16G16B16A16UNorm(pixel_3); + packed_4 = XePackR16G16B16A16UNorm(pixel_4); + break; + case kXenosFormat_16_16_16_16_FLOAT: + packed_01 = + f32tof16(float4(pixel_0.r, pixel_0.b, pixel_1.r, pixel_1.b)) | + (f32tof16(float4(pixel_0.g, pixel_0.a, pixel_1.g, pixel_1.a)) << 16u); + packed_23 = + f32tof16(float4(pixel_2.r, pixel_2.b, pixel_3.r, pixel_3.b)) | + (f32tof16(float4(pixel_2.g, pixel_2.a, pixel_3.g, pixel_3.a)) << 16u); + packed_4 = f32tof16(float2(pixel_4.r, pixel_4.b)) | + (f32tof16(float2(pixel_4.g, pixel_4.a)) << 16u); + break; + default: + // Treat as 32_32_FLOAT. + packed_01 = asuint(float4(pixel_0.rg, pixel_1.rg)); + packed_23 = asuint(float4(pixel_2.rg, pixel_3.rg)); + packed_4 = asuint(pixel_4.rg); + break; + } } // EDRAM color format unpacking. +float XeUnpackR8UNorm(uint p) { + return float(p & 255u) * (1.0f / 255.0f); +} + float4 XeUnpackR8UNormX4(uint4 p) { return float4(p & 255u) * (1.0f / 255.0f); } @@ -301,6 +580,10 @@ float4 XeUnpackR8G8B8A8UNorm(uint p) { return float4((p >> uint4(0u, 8u, 16u, 24u)) & 255u) * (1.0f / 255.0f); } +float XeUnpackR10UNorm(uint p) { + return float(p & 1023u) * (1.0f / 1023.0f); +} + float4 XeUnpackR10UNormX4(uint4 p) { return float4(p & 1023u) * (1.0f / 1023.0f); } @@ -329,6 +612,10 @@ float4 XeUnpackR10FloatX4(uint4 p) { : (0u).xxxx); } +float XeUnpackR10Float(uint p) { + return XeUnpackR10FloatX4(p.xxxx).x; +} + float4 XeUnpackR10G10B10A2Float(uint p) { // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp uint3 rgb_f10u32 = (p.xxx >> uint3(0u, 10u, 20u)) & 0x3FFu; @@ -358,6 +645,12 @@ float4 XeUnpackR10G10B10A2Float(uint p) { // to 1. When sampling from this texture in a shader, the results must be // scaled to a 0 to 1 range." +// Upper 16 bits are ignored by XeUnpackR16Edram. + +float XeUnpackR16Edram(uint p) { + return max(float(asint(p) << 16 >> 16) * (32.0f / 32767.0f), -1.0f); +} + float4 XeUnpackR16EdramX4(uint4 p) { return max(float4(asint(p) << 16 >> 16) * (32.0f / 32767.0f), -1.0f); } @@ -379,22 +672,34 @@ uint4 XeR5G5B5A1ToB5G5R5A1(uint4 packed_texels) { return (packed_texels & 0x83E083E0u) | ((packed_texels & 0x001F001Fu) << 10) | ((packed_texels & 0x7C007C00u) >> 10); } +uint2 XeR5G5B5A1ToB5G5R5A1(uint2 packed_texels) { + return XeR5G5B5A1ToB5G5R5A1(packed_texels.xyxx).xy; +} uint4 XeR5G6B5ToB5G6R5(uint4 packed_texels) { return (packed_texels & 0x07E007E0u) | ((packed_texels & 0x001F001Fu) << 11) | ((packed_texels & 0xF800F800u) >> 11); } +uint2 XeR5G6B5ToB5G6R5(uint2 packed_texels) { + return XeR5G6B5ToB5G6R5(packed_texels.xyxx).xy; +} uint4 XeR4G4B4A4ToB4G4R4A4(uint4 packed_texels) { return (packed_texels & 0xF0F0F0F0u) | ((packed_texels & 0x000F000Fu) << 8) | ((packed_texels & 0x0F000F00u) >> 8); } +uint2 XeR4G4B4A4ToB4G4R4A4(uint2 packed_texels) { + return XeR4G4B4A4ToB4G4R4A4(packed_texels.xyxx).xy; +} // RRRRR GGGGG BBBBBB to GGGGG BBBBBB RRRRR (use RBGA swizzle when reading). uint4 XeR5G5B6ToB5G6R5WithRBGASwizzle(uint4 packed_texels) { return ((packed_texels & 0x001F001Fu) << 11) | ((packed_texels & 0xFFE0FFE0) >> 5); } +uint2 XeR5G5B6ToB5G6R5WithRBGASwizzle(uint2 packed_texels) { + return XeR5G5B6ToB5G6R5WithRBGASwizzle(packed_texels.xyxx).xy; +} uint4 XeR10G11B11UNormToRGBA16(uint2 packed_texels) { // Red and blue. @@ -410,7 +715,9 @@ uint4 XeR10G11B11UNormToRGBA16(uint2 packed_texels) { result.yw |= 0xFFFF0000u; return result; } - +uint2 XeR10G11B11UNormToRGBA16(uint packed_texel) { + return XeR10G11B11UNormToRGBA16(packed_texel.xx).xy; +} void XeR10G11B11UNormToRGBA16(uint4 packed_texels, out uint4 out_01, out uint4 out_23) { out_01 = XeR10G11B11UNormToRGBA16(packed_texels.xy); @@ -431,7 +738,9 @@ uint4 XeR11G11B10UNormToRGBA16(uint2 packed_texels) { result.yw |= 0xFFFF0000u; return result; } - +uint2 XeR11G11B10UNormToRGBA16(uint packed_texel) { + return XeR11G11B10UNormToRGBA16(packed_texel.xx).xy; +} void XeR11G11B10UNormToRGBA16(uint4 packed_texels, out uint4 out_01, out uint4 out_23) { out_01 = XeR11G11B10UNormToRGBA16(packed_texels.xy); @@ -470,7 +779,9 @@ uint4 XeR10G11B11SNormToRGBA16(uint2 packed_texels) { (XeSNorm11To16((packed_texels >> 10u) & 2047u) << 16u), XeSNorm11To16(packed_texels >> 21u) | 0x7FFF0000u).xzyw; } - +uint2 XeR10G11B11SNormToRGBA16(uint packed_texel) { + return XeR10G11B11SNormToRGBA16(packed_texel.xx).xy; +} void XeR10G11B11SNormToRGBA16(uint4 packed_texels, out uint4 out_01, out uint4 out_23) { out_01 = XeR10G11B11SNormToRGBA16(packed_texels.xy); @@ -483,7 +794,9 @@ uint4 XeR11G11B10SNormToRGBA16(uint2 packed_texels) { (XeSNorm11To16((packed_texels >> 11u) & 2047u) << 16u), XeSNorm10To16(packed_texels >> 22u) | 0x7FFF0000u).xzyw; } - +uint2 XeR11G11B10SNormToRGBA16(uint packed_texel) { + return XeR11G11B10SNormToRGBA16(packed_texel.xx).xy; +} void XeR11G11B10SNormToRGBA16(uint4 packed_texels, out uint4 out_01, out uint4 out_23) { out_01 = XeR11G11B10SNormToRGBA16(packed_texels.xy); @@ -505,17 +818,7 @@ uint XeFloat32To20e4(uint f32u32) { return ((f24u32 + 3u + ((f24u32 >> 3u) & 1u)) >> 3u) & 0xFFFFFFu; } -uint4 XeFloat32To20e4(uint4 f32u32) { - // Keep only positive (high bit set means negative for both float and int) and - // saturate to the maximum representable value near 2 (also dropping NaNs). - f32u32 = min((f32u32 <= 0x7FFFFFFFu) ? f32u32 : (0u).xxxx, 0x3FFFFFF8u); - uint4 denormalized = ((f32u32 & 0x7FFFFFu) | 0x800000u) >> - min((113u).xxxx - (f32u32 >> 23u), 24u); - uint4 f24u32 = (f32u32 < 0x38800000u) ? denormalized : (f32u32 + 0xC8000000u); - return ((f24u32 + 3u + ((f24u32 >> 3u) & 1u)) >> 3u) & 0xFFFFFFu; -} - -uint XeFloat20e4To32(uint f24u32) { +uint XeFloat20e4To32(uint f24u32, bool remap_to_0_to_0_5 = false) { uint mantissa = f24u32 & 0xFFFFFu; uint exponent = f24u32 >> 20u; // Normalize the values for the denormalized components. @@ -526,8 +829,12 @@ uint XeFloat20e4To32(uint f24u32) { exponent = is_denormalized ? (1u - mantissa_lzcnt) : exponent; mantissa = is_denormalized ? ((mantissa << mantissa_lzcnt) & 0xFFFFFu) : mantissa; - // Combine into 32-bit float bits and clear zeros. - return (f24u32 != 0u) ? (((exponent + 112u) << 23u) | (mantissa << 3u)) : 0u; + // Combine into 32-bit float bits and clear zeros and, if needed, bias the + // exponent. + return (f24u32 != 0u) + ? ((exponent + (112u - uint(remap_to_0_to_0_5))) << 23u) | + (mantissa << 3u) + : 0u; } uint4 XeFloat20e4To32(uint4 f24u32) { @@ -546,6 +853,22 @@ uint4 XeFloat20e4To32(uint4 f24u32) { : (0u).xxxx; } +uint2 XeFloat20e4To32(uint2 f24u32) { + return XeFloat20e4To32(f24u32.xyxx).xy; +} + +float4 XeUNorm24To32(uint4 n24) { + // Not 1.0f / 16777215.0f as that gives an incorrect result (like for a very + // common 0xC00000 which clears 2_10_10_10 to 0001). Division by 2^24 is just + // an exponent shift though, thus exact. + // Division by 16777215.0f behaves this way. + return float4(n24 + (n24 >> 23u)) * (1.0f / 16777216.0f); +} + +float2 XeUNorm24To32(uint2 n24) { + return XeUNorm24To32(n24.xyxx).xy; +} + // Converts endpoint BGR (first - X of the return value - in the low 16 bits, // second - Y of the return value - in the high) of a DXT blocks to 8-bit, with // 2 unused bits between each component to allow for overflow when multiplying diff --git a/src/xenia/gpu/d3d12/shaders/resolve.hlsli b/src/xenia/gpu/d3d12/shaders/resolve.hlsli index f626d9243..e4293573c 100644 --- a/src/xenia/gpu/d3d12/shaders/resolve.hlsli +++ b/src/xenia/gpu/d3d12/shaders/resolve.hlsli @@ -258,6 +258,60 @@ uint2 XeResolveSize() { } } + void XeResolveUnpack32bpp5Samples(uint4 packed, uint packed_4, uint format, + out float4 sample_0, out float4 sample_1, + out float4 sample_2, out float4 sample_3, + out float4 sample_4) { + switch (format) { + case kXenosColorRenderTargetFormat_8_8_8_8: + case kXenosColorRenderTargetFormat_8_8_8_8_GAMMA: + sample_0 = XeUnpackR8G8B8A8UNorm(packed.x); + sample_1 = XeUnpackR8G8B8A8UNorm(packed.y); + sample_2 = XeUnpackR8G8B8A8UNorm(packed.z); + sample_3 = XeUnpackR8G8B8A8UNorm(packed.w); + sample_4 = XeUnpackR8G8B8A8UNorm(packed_4); + break; + case kXenosColorRenderTargetFormat_2_10_10_10: + case kXenosColorRenderTargetFormat_2_10_10_10_AS_10_10_10_10: + sample_0 = XeUnpackR10G10B10A2UNorm(packed.x); + sample_1 = XeUnpackR10G10B10A2UNorm(packed.y); + sample_2 = XeUnpackR10G10B10A2UNorm(packed.z); + sample_3 = XeUnpackR10G10B10A2UNorm(packed.w); + sample_4 = XeUnpackR10G10B10A2UNorm(packed_4); + break; + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT: + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT_AS_16_16_16_16: + sample_0 = XeUnpackR10G10B10A2Float(packed.x); + sample_1 = XeUnpackR10G10B10A2Float(packed.y); + sample_2 = XeUnpackR10G10B10A2Float(packed.z); + sample_3 = XeUnpackR10G10B10A2Float(packed.w); + sample_4 = XeUnpackR10G10B10A2Float(packed_4); + break; + case kXenosColorRenderTargetFormat_16_16: + sample_0 = float4(XeUnpackR16G16Edram(packed.x), 0.0f, 0.0f); + sample_1 = float4(XeUnpackR16G16Edram(packed.y), 0.0f, 0.0f); + sample_2 = float4(XeUnpackR16G16Edram(packed.z), 0.0f, 0.0f); + sample_3 = float4(XeUnpackR16G16Edram(packed.w), 0.0f, 0.0f); + sample_4 = float4(XeUnpackR16G16Edram(packed_4), 0.0f, 0.0f); + break; + case kXenosColorRenderTargetFormat_16_16_FLOAT: + sample_0 = float4(f16tof32(packed.x >> uint2(0u, 16u)), 0.0f, 0.0f); + sample_1 = float4(f16tof32(packed.y >> uint2(0u, 16u)), 0.0f, 0.0f); + sample_2 = float4(f16tof32(packed.z >> uint2(0u, 16u)), 0.0f, 0.0f); + sample_3 = float4(f16tof32(packed.w >> uint2(0u, 16u)), 0.0f, 0.0f); + sample_4 = float4(f16tof32(packed_4 >> uint2(0u, 16u)), 0.0f, 0.0f); + break; + default: + // Treat as 32_FLOAT. + sample_0 = float2(asfloat(packed.x), 0.0f).xyyy; + sample_1 = float2(asfloat(packed.y), 0.0f).xyyy; + sample_2 = float2(asfloat(packed.z), 0.0f).xyyy; + sample_3 = float2(asfloat(packed.w), 0.0f).xyyy; + sample_4 = float2(asfloat(packed_4), 0.0f).xyyy; + break; + } + } + void XeResolveUnpack32bpp8RedSamples(uint4 packed_0123, uint4 packed_4567, uint format, bool swap, out float4 samples_0123, @@ -297,6 +351,69 @@ uint2 XeResolveSize() { } } + void XeResolveUnpack32bpp9RedSamples(uint4 packed_0123, uint4 packed_4567, + uint packed_8, uint format, bool swap, + out float4 samples_0123, + out float4 samples_4567, + out float samples_8) { + switch (format) { + case kXenosColorRenderTargetFormat_8_8_8_8: + case kXenosColorRenderTargetFormat_8_8_8_8_GAMMA: { + uint shift = swap ? 16u : 0u; + samples_0123 = XeUnpackR8UNormX4(packed_0123 >> shift); + samples_4567 = XeUnpackR8UNormX4(packed_4567 >> shift); + samples_8 = XeUnpackR8UNorm(packed_8 >> shift); + } break; + case kXenosColorRenderTargetFormat_2_10_10_10: + case kXenosColorRenderTargetFormat_2_10_10_10_AS_10_10_10_10: { + uint shift = swap ? 20u : 0u; + samples_0123 = XeUnpackR10UNormX4(packed_0123 >> shift); + samples_4567 = XeUnpackR10UNormX4(packed_4567 >> shift); + samples_8 = XeUnpackR10UNorm(packed_8 >> shift); + } break; + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT: + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT_AS_16_16_16_16: { + uint shift = swap ? 20u : 0u; + samples_0123 = XeUnpackR10FloatX4(packed_0123 >> shift); + samples_4567 = XeUnpackR10FloatX4(packed_4567 >> shift); + samples_8 = XeUnpackR10Float(packed_8 >> shift); + } break; + case kXenosColorRenderTargetFormat_16_16: + samples_0123 = XeUnpackR16EdramX4(packed_0123); + samples_4567 = XeUnpackR16EdramX4(packed_4567); + samples_8 = XeUnpackR16Edram(packed_8); + break; + case kXenosColorRenderTargetFormat_16_16_FLOAT: + samples_0123 = f16tof32(packed_0123); + samples_4567 = f16tof32(packed_4567); + samples_8 = f16tof32(packed_8); + break; + default: + // Treat as 32_FLOAT. + samples_0123 = asfloat(packed_0123); + samples_4567 = asfloat(packed_4567); + samples_8 = asfloat(packed_8); + break; + } + } + + float4 XeResolveUnpack64bppSample(uint2 packed, uint format) { + float4 value; + switch (format) { + case kXenosColorRenderTargetFormat_16_16_16_16: + value = XeUnpackR16G16B16A16Edram(packed); + break; + case kXenosColorRenderTargetFormat_16_16_16_16_FLOAT: + value = f16tof32(packed.xxyy >> uint2(0u, 16u).xyxy); + break; + default: + // Treat as 32_32_FLOAT. + value = float4(asfloat(packed), 0.0f, 0.0f); + break; + } + return value; + } + void XeResolveUnpack64bpp2Samples(uint4 packed, uint format, out float4 sample_0, out float4 sample_1) { switch (format) { @@ -343,6 +460,49 @@ uint2 XeResolveSize() { } } + void XeResolveUnpack64bpp8RedUnswappedSamples( + uint4 packed_0123, uint4 packed_4567, uint format, + out float4 samples_0123, out float4 samples_4567) { + switch (format) { + case kXenosColorRenderTargetFormat_16_16_16_16: + samples_0123 = XeUnpackR16EdramX4(packed_0123); + samples_4567 = XeUnpackR16EdramX4(packed_4567); + break; + case kXenosColorRenderTargetFormat_16_16_16_16_FLOAT: + samples_0123 = f16tof32(packed_0123); + samples_4567 = f16tof32(packed_4567); + break; + default: + // Treat as 32_32_FLOAT. + samples_0123 = asfloat(packed_0123); + samples_4567 = asfloat(packed_4567); + break; + } + } + + void XeResolveUnpack64bpp9RedUnswappedSamples( + uint4 packed_0123, uint4 packed_4567, uint packed_8, uint format, + out float4 samples_0123, out float4 samples_4567, out float samples_8) { + switch (format) { + case kXenosColorRenderTargetFormat_16_16_16_16: + samples_0123 = XeUnpackR16EdramX4(packed_0123); + samples_4567 = XeUnpackR16EdramX4(packed_4567); + samples_8 = XeUnpackR16Edram(packed_8); + break; + case kXenosColorRenderTargetFormat_16_16_16_16_FLOAT: + samples_0123 = f16tof32(packed_0123); + samples_4567 = f16tof32(packed_4567); + samples_8 = f16tof32(packed_8); + break; + default: + // Treat as 32_32_FLOAT. + samples_0123 = asfloat(packed_0123); + samples_4567 = asfloat(packed_4567); + samples_8 = asfloat(packed_8); + break; + } + } + void XeResolveUnpack64bpp8RedSamples(uint4 packed_01, uint4 packed_23, uint4 packed_45, uint4 packed_67, uint format, bool swap, @@ -431,66 +591,73 @@ uint2 XeResolveSize() { } } - void XeResolveLoad8RedSwappedPixelSamplesFromRaw( + // For red/blue swapping for 64bpp, pre-add 4 to sample_address_bytes. + void XeResolveLoad8RedPixelSamplesFromRaw( ByteAddressBuffer source, uint sample_address_bytes, - uint pixel_stride_bytes, uint format_ints_log2, uint format, bool swap, - out float4 pixels_0123, out float4 pixels_4567) { - [branch] if (format_ints_log2) { - uint4 packed_01, packed_23, packed_45, packed_67; - [branch] if (pixel_stride_bytes == 8u) { - packed_01 = source.Load4(sample_address_bytes); - packed_23 = source.Load4(sample_address_bytes + 16u); - packed_45 = source.Load4(sample_address_bytes + 32u); - packed_67 = source.Load4(sample_address_bytes + 48u); - } else { - packed_01.xy = source.Load2(sample_address_bytes); - packed_01.zw = source.Load2(sample_address_bytes + pixel_stride_bytes); - packed_23.xy = - source.Load2(sample_address_bytes + 2u * pixel_stride_bytes); - packed_23.zw = - source.Load2(sample_address_bytes + 3u * pixel_stride_bytes); - packed_45.xy = - source.Load2(sample_address_bytes + 4u * pixel_stride_bytes); - packed_45.zw = - source.Load2(sample_address_bytes + 5u * pixel_stride_bytes); - packed_67.xy = - source.Load2(sample_address_bytes + 6u * pixel_stride_bytes); - packed_67.zw = - source.Load2(sample_address_bytes + 7u * pixel_stride_bytes); - } - XeResolveUnpack64bpp8RedSamples(packed_01, packed_23, packed_45, - packed_67, format, swap, pixels_0123, - pixels_4567); + uint pixel_stride_bytes, uint format_ints_log2, uint format, + bool swap_32bpp, out float4 pixels_0123, out float4 pixels_4567) { + uint4 packed_0123, packed_4567; + [branch] if (pixel_stride_bytes == 4u) { + packed_0123 = source.Load4(sample_address_bytes); + packed_4567 = source.Load4(sample_address_bytes + 16u); } else { - uint4 packed_0123, packed_4567; - [branch] if (pixel_stride_bytes == 4u) { - packed_0123 = source.Load4(sample_address_bytes); - packed_4567 = source.Load4(sample_address_bytes + 16u); - } else { - packed_0123.x = source.Load(sample_address_bytes); - packed_0123.y = source.Load(sample_address_bytes + pixel_stride_bytes); - packed_0123.z = - source.Load(sample_address_bytes + 2u * pixel_stride_bytes); - packed_0123.w = - source.Load(sample_address_bytes + 3u * pixel_stride_bytes); - packed_4567.x = - source.Load(sample_address_bytes + 4u * pixel_stride_bytes); - packed_4567.y = - source.Load(sample_address_bytes + 5u * pixel_stride_bytes); - packed_4567.z = - source.Load(sample_address_bytes + 6u * pixel_stride_bytes); - packed_4567.w = - source.Load(sample_address_bytes + 7u * pixel_stride_bytes); - } - XeResolveUnpack32bpp8RedSamples(packed_0123, packed_4567, format, swap, - pixels_0123, pixels_4567); + packed_0123.x = source.Load(sample_address_bytes); + packed_0123.y = source.Load(sample_address_bytes + pixel_stride_bytes); + packed_0123.z = + source.Load(sample_address_bytes + 2u * pixel_stride_bytes); + packed_0123.w = + source.Load(sample_address_bytes + 3u * pixel_stride_bytes); + packed_4567.x = + source.Load(sample_address_bytes + 4u * pixel_stride_bytes); + packed_4567.y = + source.Load(sample_address_bytes + 5u * pixel_stride_bytes); + packed_4567.z = + source.Load(sample_address_bytes + 6u * pixel_stride_bytes); + packed_4567.w = + source.Load(sample_address_bytes + 7u * pixel_stride_bytes); + } + [branch] if (format_ints_log2) { + XeResolveUnpack64bpp8RedUnswappedSamples(packed_0123, packed_4567, format, + pixels_0123, pixels_4567); + } else { + XeResolveUnpack32bpp8RedSamples(packed_0123, packed_4567, format, + swap_32bpp, pixels_0123, pixels_4567); + } + } + + // For red/blue swapping for 64bpp, pre-add 4 to sample_address_bytes. + void XeResolveLoad9RedHostPixelSamplesFromRaw( + ByteAddressBuffer source, uint sample_address_bytes, + uint format_ints_log2, uint format, bool swap_32bpp, + out float4 pixels_0123, out float4 pixels_4567, out float pixels_8) { + uint4 packed_0123, packed_4567; + uint packed_8; + [branch] if (!format_ints_log2) { + packed_0123 = source.Load4(sample_address_bytes); + packed_4567 = source.Load4(sample_address_bytes + 4u * 4u); + packed_8 = source.Load(sample_address_bytes + 8u * 4u); + XeResolveUnpack32bpp9RedSamples( + packed_0123, packed_4567, packed_8, format, swap_32bpp, pixels_0123, + pixels_4567, pixels_8); + } else { + packed_0123.x = source.Load(sample_address_bytes); + packed_0123.y = source.Load(sample_address_bytes + 8u); + packed_0123.z = source.Load(sample_address_bytes + 2u * 8u); + packed_0123.w = source.Load(sample_address_bytes + 3u * 8u); + packed_4567.x = source.Load(sample_address_bytes + 4u * 8u); + packed_4567.y = source.Load(sample_address_bytes + 5u * 8u); + packed_4567.z = source.Load(sample_address_bytes + 6u * 8u); + packed_4567.w = source.Load(sample_address_bytes + 7u * 8u); + packed_8 = source.Load(sample_address_bytes + 8u * 8u); + XeResolveUnpack64bpp9RedUnswappedSamples( + packed_0123, packed_4567, packed_8, format, pixels_0123, pixels_4567, + pixels_8); } } void XeResolveLoad2RGBAColorsX1(ByteAddressBuffer source, uint address_ints, out float4 pixel_0, out float4 pixel_1) { uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); - uint msaa_samples = XeResolveEdramMsaaSamples(); uint pixel_stride_bytes = XeResolveEdramPixelStrideInts() << 2u; uint address_bytes = address_ints << 2u; uint format = XeResolveEdramFormat(); @@ -538,7 +705,6 @@ uint2 XeResolveSize() { out float4 pixel_0, out float4 pixel_1, out float4 pixel_2, out float4 pixel_3) { uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); - uint msaa_samples = XeResolveEdramMsaaSamples(); uint pixel_stride_bytes = XeResolveEdramPixelStrideInts() << 2u; uint address_bytes = address_ints << 2u; uint format = XeResolveEdramFormat(); @@ -600,22 +766,25 @@ uint2 XeResolveSize() { out float4 pixels_0123, out float4 pixels_4567) { uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); - uint msaa_samples = XeResolveEdramMsaaSamples(); uint pixel_stride_bytes = XeResolveEdramPixelStrideInts() << 2u; uint address_bytes = address_ints << 2u; uint format = XeResolveEdramFormat(); bool swap = XeResolveDestSwap(); - XeResolveLoad8RedSwappedPixelSamplesFromRaw(source, address_bytes, - pixel_stride_bytes, - format_ints_log2, format, swap, - pixels_0123, pixels_4567); + [branch] if (format_ints_log2 && swap) { + // Likely want to load the blue part from the right half. + address_bytes += 4u; + } + XeResolveLoad8RedPixelSamplesFromRaw(source, address_bytes, + pixel_stride_bytes, format_ints_log2, + format, swap, pixels_0123, + pixels_4567); uint sample_select = XeResolveSampleSelect(); float exp_bias = XeResolveDestExpBiasFactor(); [branch] if (sample_select >= kXenosCopySampleSelect_01) { // TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA. exp_bias *= 0.5f; float4 msaa_resolve_pixels_0123, msaa_resolve_pixels_4567; - XeResolveLoad8RedSwappedPixelSamplesFromRaw( + XeResolveLoad8RedPixelSamplesFromRaw( source, address_bytes + (320u << format_ints_log2), pixel_stride_bytes, format_ints_log2, format, swap, msaa_resolve_pixels_0123, msaa_resolve_pixels_4567); @@ -623,13 +792,13 @@ uint2 XeResolveSize() { pixels_4567 += msaa_resolve_pixels_4567; [branch] if (sample_select >= kXenosCopySampleSelect_0123) { exp_bias *= 0.5f; - XeResolveLoad8RedSwappedPixelSamplesFromRaw( + XeResolveLoad8RedPixelSamplesFromRaw( source, address_bytes + (4u << format_ints_log2), pixel_stride_bytes, format_ints_log2, format, swap, msaa_resolve_pixels_0123, msaa_resolve_pixels_4567); pixels_0123 += msaa_resolve_pixels_0123; pixels_4567 += msaa_resolve_pixels_4567; - XeResolveLoad8RedSwappedPixelSamplesFromRaw( + XeResolveLoad8RedPixelSamplesFromRaw( source, address_bytes + (324u << format_ints_log2), pixel_stride_bytes, format_ints_log2, format, swap, msaa_resolve_pixels_0123, msaa_resolve_pixels_4567); @@ -648,7 +817,6 @@ uint2 XeResolveSize() { out float4 host_pixel_y1x0, out float4 host_pixel_y1x1) { uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); - uint msaa_samples = XeResolveEdramMsaaSamples(); uint format = XeResolveEdramFormat(); // 1 host uint4 == 1 guest uint. uint4 packed = source[guest_address_ints]; @@ -744,7 +912,6 @@ uint2 XeResolveSize() { out float4 guest_pixel_0, out float4 guest_pixel_1) { uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); - uint msaa_samples = XeResolveEdramMsaaSamples(); uint guest_address_ints_1 = guest_address_ints + XeResolveEdramPixelStrideInts(); uint format = XeResolveEdramFormat(); @@ -819,20 +986,250 @@ uint2 XeResolveSize() { guest_pixel_1 *= exp_bias; } + void XeResolveLoad9RedColorsX3(ByteAddressBuffer source, + uint address_bytes, out float4 pixels_0123, + out float4 pixels_4567, out float pixels_8) { + uint format_ints_log2 = XeResolveEdramFormatIntsLog2(); + uint format = XeResolveEdramFormat(); + bool swap = XeResolveDestSwap(); + [branch] if (format_ints_log2 && swap) { + // Likely want to load the blue part from the right half. + address_bytes += 4u; + } + XeResolveLoad9RedHostPixelSamplesFromRaw(source, address_bytes, + format_ints_log2, format, swap, + pixels_0123, pixels_4567, + pixels_8); + uint sample_select = XeResolveSampleSelect(); + float exp_bias = XeResolveDestExpBiasFactor(); + [branch] if (sample_select >= kXenosCopySampleSelect_01) { + // TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA. + exp_bias *= 0.5f; + float4 msaa_resolve_pixels_0123, msaa_resolve_pixels_4567; + float msaa_resolve_pixels_8; + XeResolveLoad9RedHostPixelSamplesFromRaw( + source, address_bytes + ((320u * 9u) << format_ints_log2), + format_ints_log2, format, swap, msaa_resolve_pixels_0123, + msaa_resolve_pixels_4567, msaa_resolve_pixels_8); + pixels_0123 += msaa_resolve_pixels_0123; + pixels_4567 += msaa_resolve_pixels_4567; + pixels_8 += msaa_resolve_pixels_8; + [branch] if (sample_select >= kXenosCopySampleSelect_0123) { + exp_bias *= 0.5f; + XeResolveLoad9RedHostPixelSamplesFromRaw( + source, address_bytes + ((4u * 9u) << format_ints_log2), + format_ints_log2, format, swap, msaa_resolve_pixels_0123, + msaa_resolve_pixels_4567, msaa_resolve_pixels_8); + pixels_0123 += msaa_resolve_pixels_0123; + pixels_4567 += msaa_resolve_pixels_4567; + pixels_8 += msaa_resolve_pixels_8; + XeResolveLoad9RedHostPixelSamplesFromRaw( + source, address_bytes + ((324u * 9u) << format_ints_log2), + format_ints_log2, format, swap, msaa_resolve_pixels_0123, + msaa_resolve_pixels_4567, msaa_resolve_pixels_8); + pixels_0123 += msaa_resolve_pixels_0123; + pixels_4567 += msaa_resolve_pixels_4567; + pixels_8 += msaa_resolve_pixels_8; + } + } + pixels_0123 *= exp_bias; + pixels_4567 *= exp_bias; + pixels_8 *= exp_bias; + } + + void XeResolveLoad4Host32bppPixels(ByteAddressBuffer source, + uint resolution_scale_square, + uint host_address_bytes, + out float4 host_pixel_0, + out float4 host_pixel_1, + out float4 host_pixel_2, + out float4 host_pixel_3) { + uint format = XeResolveEdramFormat(); + uint4 packed = source.Load4(host_address_bytes); + XeResolveUnpack32bpp4Samples(packed, format, host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3); + uint sample_select = XeResolveSampleSelect(); + float exp_bias = XeResolveDestExpBiasFactor(); + [branch] if (sample_select >= kXenosCopySampleSelect_01) { + // TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA. + exp_bias *= 0.5f; + float4 msaa_resolve_pixel_0; + float4 msaa_resolve_pixel_1; + float4 msaa_resolve_pixel_2; + float4 msaa_resolve_pixel_3; + packed = + source.Load4(host_address_bytes + (320u * resolution_scale_square)); + XeResolveUnpack32bpp4Samples(packed, format, msaa_resolve_pixel_0, + msaa_resolve_pixel_1, msaa_resolve_pixel_2, + msaa_resolve_pixel_3); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + [branch] if (sample_select >= kXenosCopySampleSelect_0123) { + exp_bias *= 0.5f; + packed = + source.Load4(host_address_bytes + (4u * resolution_scale_square)); + XeResolveUnpack32bpp4Samples(packed, format, msaa_resolve_pixel_0, + msaa_resolve_pixel_1, msaa_resolve_pixel_2, + msaa_resolve_pixel_3); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + packed = + source.Load4(host_address_bytes + (324u * resolution_scale_square)); + XeResolveUnpack32bpp4Samples(packed, format, msaa_resolve_pixel_0, + msaa_resolve_pixel_1, msaa_resolve_pixel_2, + msaa_resolve_pixel_3); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + } + } + host_pixel_0 *= exp_bias; + host_pixel_1 *= exp_bias; + host_pixel_2 *= exp_bias; + host_pixel_3 *= exp_bias; + [branch] if (XeResolveDestSwap()) { + host_pixel_0 = host_pixel_0.bgra; + host_pixel_1 = host_pixel_1.bgra; + host_pixel_2 = host_pixel_2.bgra; + host_pixel_3 = host_pixel_3.bgra; + } + } + + void XeResolveLoad5Host32bppPixels(ByteAddressBuffer source, + uint resolution_scale_square, + uint host_address_bytes, + out float4 host_pixel_0, + out float4 host_pixel_1, + out float4 host_pixel_2, + out float4 host_pixel_3, + out float4 host_pixel_4) { + uint format = XeResolveEdramFormat(); + uint4 packed = source.Load4(host_address_bytes); + uint packed_4 = source.Load(host_address_bytes + 16u); + XeResolveUnpack32bpp5Samples(packed, packed_4, format, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3, + host_pixel_4); + uint sample_select = XeResolveSampleSelect(); + float exp_bias = XeResolveDestExpBiasFactor(); + [branch] if (sample_select >= kXenosCopySampleSelect_01) { + // TODO(Triang3l): Gamma-correct resolve for 8_8_8_8_GAMMA. + exp_bias *= 0.5f; + float4 msaa_resolve_pixel_0; + float4 msaa_resolve_pixel_1; + float4 msaa_resolve_pixel_2; + float4 msaa_resolve_pixel_3; + float4 msaa_resolve_pixel_4; + uint sample_host_address_bytes = + host_address_bytes + (320u * resolution_scale_square); + packed = source.Load4(sample_host_address_bytes); + packed_4 = source.Load(sample_host_address_bytes + 16u); + XeResolveUnpack32bpp5Samples(packed, packed_4, format, + msaa_resolve_pixel_0, msaa_resolve_pixel_1, + msaa_resolve_pixel_2, msaa_resolve_pixel_3, + msaa_resolve_pixel_4); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + host_pixel_4 += msaa_resolve_pixel_4; + [branch] if (sample_select >= kXenosCopySampleSelect_0123) { + exp_bias *= 0.5f; + uint sample_host_address_bytes = + host_address_bytes + (4u * resolution_scale_square); + packed = source.Load4(sample_host_address_bytes); + packed_4 = source.Load(sample_host_address_bytes + 16u); + XeResolveUnpack32bpp5Samples(packed, packed_4, format, + msaa_resolve_pixel_0, msaa_resolve_pixel_1, + msaa_resolve_pixel_2, msaa_resolve_pixel_3, + msaa_resolve_pixel_4); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + host_pixel_4 += msaa_resolve_pixel_4; + sample_host_address_bytes = + host_address_bytes + (324u * resolution_scale_square); + packed = source.Load4(sample_host_address_bytes); + packed_4 = source.Load(sample_host_address_bytes + 16u); + XeResolveUnpack32bpp5Samples(packed, packed_4, format, + msaa_resolve_pixel_0, msaa_resolve_pixel_1, + msaa_resolve_pixel_2, msaa_resolve_pixel_3, + msaa_resolve_pixel_4); + host_pixel_0 += msaa_resolve_pixel_0; + host_pixel_1 += msaa_resolve_pixel_1; + host_pixel_2 += msaa_resolve_pixel_2; + host_pixel_3 += msaa_resolve_pixel_3; + host_pixel_4 += msaa_resolve_pixel_4; + } + } + host_pixel_0 *= exp_bias; + host_pixel_1 *= exp_bias; + host_pixel_2 *= exp_bias; + host_pixel_3 *= exp_bias; + host_pixel_4 *= exp_bias; + [branch] if (XeResolveDestSwap()) { + host_pixel_0 = host_pixel_0.bgra; + host_pixel_1 = host_pixel_1.bgra; + host_pixel_2 = host_pixel_2.bgra; + host_pixel_3 = host_pixel_3.bgra; + host_pixel_4 = host_pixel_4.bgra; + } + } + + float4 XeResolveLoadHost64bppPixelFromUInt2(Buffer source, + uint resolution_scale_square, + uint host_address_int2s) { + uint format = XeResolveEdramFormat(); + float4 host_pixel = + XeResolveUnpack64bppSample(source[host_address_int2s], format); + uint sample_select = XeResolveSampleSelect(); + float exp_bias = XeResolveDestExpBiasFactor(); + [branch] if (sample_select >= kXenosCopySampleSelect_01) { + exp_bias *= 0.5f; + host_pixel += XeResolveUnpack64bppSample( + source[host_address_int2s + 80u * resolution_scale_square], format); + [branch] if (sample_select >= kXenosCopySampleSelect_0123) { + exp_bias *= 0.5f; + host_pixel += XeResolveUnpack64bppSample( + source[host_address_int2s + 1u * resolution_scale_square], format); + host_pixel += XeResolveUnpack64bppSample( + source[host_address_int2s + 81u * resolution_scale_square], format); + } + } + host_pixel *= exp_bias; + [branch] if (XeResolveDestSwap()) { + host_pixel = host_pixel.bgra; + } + return host_pixel; + } + + uint4 XeResolveSwapRedBlue_8_8_8_8(uint4 pixels) { + return (pixels & ~0xFF00FFu) | ((pixels & 0xFFu) << 16u) | + ((pixels >> 16u) & 0xFFu); + } + + uint4 XeResolveSwapRedBlue_2_10_10_10(uint4 pixels) { + return (pixels & ~0x3FF003FF) | ((pixels & 0x3FFu) << 20u) | + ((pixels >> 20u) & 0x3FFu); + } + uint4 XeResolveSwap4PixelsRedBlue32bpp(uint4 pixels) { [branch] if (XeResolveDestSwap()) { switch (XeResolveEdramFormat()) { case kXenosColorRenderTargetFormat_8_8_8_8: case kXenosColorRenderTargetFormat_8_8_8_8_GAMMA: - pixels = (pixels & ~0xFF00FFu) | ((pixels & 0xFFu) << 16u) | - ((pixels >> 16u) & 0xFFu); + pixels = XeResolveSwapRedBlue_8_8_8_8(pixels); break; case kXenosColorRenderTargetFormat_2_10_10_10: case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT: case kXenosColorRenderTargetFormat_2_10_10_10_AS_10_10_10_10: case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT_AS_16_16_16_16: - pixels = (pixels & ~0x3FF003FF) | ((pixels & 0x3FFu) << 20u) | - ((pixels >> 20u) & 0x3FFu); + pixels = XeResolveSwapRedBlue_2_10_10_10(pixels); break; } } @@ -845,32 +1242,64 @@ uint2 XeResolveSize() { switch (XeResolveEdramFormat()) { case kXenosColorRenderTargetFormat_8_8_8_8: case kXenosColorRenderTargetFormat_8_8_8_8_GAMMA: - pixels_0123 = (pixels_0123 & ~0xFF00FFu) | - ((pixels_0123 & 0xFFu) << 16u) | - ((pixels_0123 >> 16u) & 0xFFu); - pixels_4567 = (pixels_4567 & ~0xFF00FFu) | - ((pixels_4567 & 0xFFu) << 16u) | - ((pixels_4567 >> 16u) & 0xFFu); + pixels_0123 = XeResolveSwapRedBlue_8_8_8_8(pixels_0123); + pixels_4567 = XeResolveSwapRedBlue_8_8_8_8(pixels_4567); break; case kXenosColorRenderTargetFormat_2_10_10_10: case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT: case kXenosColorRenderTargetFormat_2_10_10_10_AS_10_10_10_10: case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT_AS_16_16_16_16: - pixels_0123 = (pixels_0123 & ~0x3FF003FF) | - ((pixels_0123 & 0x3FFu) << 20u) | - ((pixels_0123 >> 20u) & 0x3FFu); - pixels_4567 = (pixels_4567 & ~0x3FF003FF) | - ((pixels_4567 & 0x3FFu) << 20u) | - ((pixels_4567 >> 20u) & 0x3FFu); + pixels_0123 = XeResolveSwapRedBlue_2_10_10_10(pixels_0123); + pixels_4567 = XeResolveSwapRedBlue_2_10_10_10(pixels_4567); break; } } } + void XeResolveSwap18PixelsRedBlue32bpp(inout uint4 pixels_abcd, + inout uint4 pixels_efgh, + inout uint4 pixels_ijkl, + inout uint4 pixels_mnop, + inout uint2 pixels_qr) { + [branch] if (XeResolveDestSwap()) { + switch (XeResolveEdramFormat()) { + case kXenosColorRenderTargetFormat_8_8_8_8: + case kXenosColorRenderTargetFormat_8_8_8_8_GAMMA: + pixels_abcd = XeResolveSwapRedBlue_8_8_8_8(pixels_abcd); + pixels_efgh = XeResolveSwapRedBlue_8_8_8_8(pixels_efgh); + pixels_ijkl = XeResolveSwapRedBlue_8_8_8_8(pixels_ijkl); + pixels_mnop = XeResolveSwapRedBlue_8_8_8_8(pixels_mnop); + pixels_qr = XeResolveSwapRedBlue_8_8_8_8(pixels_qr.xyxx).xy; + break; + case kXenosColorRenderTargetFormat_2_10_10_10: + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT: + case kXenosColorRenderTargetFormat_2_10_10_10_AS_10_10_10_10: + case kXenosColorRenderTargetFormat_2_10_10_10_FLOAT_AS_16_16_16_16: + pixels_abcd = XeResolveSwapRedBlue_2_10_10_10(pixels_abcd); + pixels_efgh = XeResolveSwapRedBlue_2_10_10_10(pixels_efgh); + pixels_ijkl = XeResolveSwapRedBlue_2_10_10_10(pixels_ijkl); + pixels_mnop = XeResolveSwapRedBlue_2_10_10_10(pixels_mnop); + pixels_qr = XeResolveSwapRedBlue_2_10_10_10(pixels_qr.xyxx).xy; + break; + } + } + } + + uint2 XeResolveSwapPixelRedBlue64bpp(uint2 pixel) { + [branch] if (XeResolveDestSwap()) { + uint format = XeResolveEdramFormat(); + [branch] if (format == kXenosColorRenderTargetFormat_16_16_16_16 || + format == kXenosColorRenderTargetFormat_16_16_16_16_FLOAT) { + pixel = (pixel & ~0xFFFFu) | (pixel.yx & 0xFFFFu); + } + } + return pixel; + } + void XeResolveSwap4PixelsRedBlue64bpp(inout uint4 pixels_01, inout uint4 pixels_23) { [branch] if (XeResolveDestSwap()) { - uint format = XeResolveDestFormat(); + uint format = XeResolveEdramFormat(); [branch] if (format == kXenosColorRenderTargetFormat_16_16_16_16 || format == kXenosColorRenderTargetFormat_16_16_16_16_FLOAT) { pixels_01 = (pixels_01 & ~0xFFFFu) | (pixels_01.yxwz & 0xFFFFu); diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_3xres.cs.hlsl new file mode 100644 index 000000000..d1a282a7a --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_clear_32bpp_3xres.cs.hlsl @@ -0,0 +1,30 @@ +#define XE_RESOLVE_RESOLUTION_SCALED +#define XE_RESOLVE_CLEAR +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 guest samples (same as resolve granularity, no reads, just + // scattering without waiting). + uint2 extent_scale = + uint2(XeResolveEdramMsaaSamples() >= uint2(kXenosMsaaSamples_4X, + kXenosMsaaSamples_2X)); + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (xe_thread_id.x >= (XeResolveSizeDiv8().x << extent_scale.x)) { + return; + } + uint host_source_address_int4s = + (XeEdramOffsetInts( + (xe_thread_id.xy << uint2(3u, 0u)) + + (XeResolveOffset() << extent_scale), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + kXenosMsaaSamples_1X, XeResolveEdramIsDepth(), 0u) * 9u) >> 2u; + uint i; + [unroll] for (i = 0u; i < ((9u * 8u) >> 2u); ++i) { + xe_resolve_dest[host_source_address_int4s + i] = + xe_resolve_clear_value.xxxx; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..78ef18d1a --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_clear_64bpp_3xres.cs.hlsl @@ -0,0 +1,30 @@ +#define XE_RESOLVE_RESOLUTION_SCALED +#define XE_RESOLVE_CLEAR +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 guest samples (same as resolve granularity, no reads, just + // scattering without waiting). + uint2 extent_scale = + uint2(XeResolveEdramMsaaSamples() >= uint2(kXenosMsaaSamples_4X, + kXenosMsaaSamples_2X)); + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (xe_thread_id.x >= (XeResolveSizeDiv8().x << extent_scale.x)) { + return; + } + uint host_source_address_int4s = + (XeEdramOffsetInts( + (xe_thread_id.xy << uint2(3u, 0u)) + + (XeResolveOffset() << extent_scale), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + kXenosMsaaSamples_1X, false, 1u) * 9u) >> 2u; + uint i; + [unroll] for (i = 0u; i < ((9u * 8u * 2u) >> 2u); ++i) { + xe_resolve_dest[host_source_address_int4s + i] = + xe_resolve_clear_value.xyxy; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_clear_depth_24_32.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_clear_depth_24_32.cs.hlsl deleted file mode 100644 index 547d91311..000000000 --- a/src/xenia/gpu/d3d12/shaders/resolve_clear_depth_24_32.cs.hlsl +++ /dev/null @@ -1,32 +0,0 @@ -#define XE_RESOLVE_CLEAR -#include "resolve.hlsli" - -RWBuffer xe_resolve_dest : register(u0); - -[numthreads(8, 8, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 samples (same as resolve granularity). - uint2 extent_scale = - uint2(XeResolveEdramMsaaSamples() >= uint2(kXenosMsaaSamples_4X, - kXenosMsaaSamples_2X)); - // Group height is the same as resolve granularity, Y overflow check not - // needed. - [branch] if (xe_thread_id.x >= (XeResolveSizeDiv8().x << extent_scale.x)) { - return; - } - uint address_int4s = - XeEdramOffsetInts( - (xe_thread_id.xy << uint2(3u, 0u)) + - (XeResolveOffset() << extent_scale), - XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), - kXenosMsaaSamples_1X, true, 0u) - >> 2u; - // Guest 24-bit depth/stencil. - xe_resolve_dest[address_int4s] = xe_resolve_clear_value.xxxx; - xe_resolve_dest[address_int4s + 1u] = xe_resolve_clear_value.xxxx; - // Host 32-bit depth in the second 10 MB. - xe_resolve_dest[address_int4s + 2048u * 320u] = - xe_resolve_clear_value.yyyy; - xe_resolve_dest[address_int4s + (2048u * 320u + 1u)] = - xe_resolve_clear_value.yyyy; -} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl new file mode 100644 index 000000000..c8b90c63e --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_1x2xmsaa.cs.hlsl @@ -0,0 +1,66 @@ +#include "endian.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 guest pixels (a pair is independently addressable as uint2). + uint2 pixel_index = xe_thread_id.xy << uint2(1u, 0u); + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + uint host_source_address_int2s = + (XeEdramOffsetInts(pixel_index + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), XeResolveEdramIsDepth(), + 0u, XeResolveFirstSampleIndex()) * 9u) >> 1u; + // abc jkl + // def mno + // ghi pqr + // as: + // ab|cd|ef|gh|ij|kl|mn|op|qr + uint4 source_abcd = uint4(xe_resolve_source[host_source_address_int2s], + xe_resolve_source[host_source_address_int2s + 1u]); + uint4 source_efgh = uint4(xe_resolve_source[host_source_address_int2s + 2u], + xe_resolve_source[host_source_address_int2s + 3u]); + uint4 source_ijkl = uint4(xe_resolve_source[host_source_address_int2s + 4u], + xe_resolve_source[host_source_address_int2s + 5u]); + uint4 source_mnop = uint4(xe_resolve_source[host_source_address_int2s + 6u], + xe_resolve_source[host_source_address_int2s + 7u]); + uint2 source_qr = xe_resolve_source[host_source_address_int2s + 8u]; + XeResolveSwap18PixelsRedBlue32bpp(source_abcd, source_efgh, source_ijkl, + source_mnop, source_qr); + [branch] if (XeResolveEdramDuplicateSecondHostPixel()) { + if (pixel_index.x == 0u) { + source_abcd.x = source_abcd.y; + source_abcd.w = source_efgh.x; + source_efgh.z = source_efgh.w; + } + if (pixel_index.y == 0u) { + source_abcd.x = source_abcd.w; + source_abcd.yz = source_efgh.xy; + source_ijkl.yzw = source_mnop.xyz; + } + } + uint endian = XeResolveDestEndian128(); + uint dest_address = (XeResolveDestPixelAddress(pixel_index, 2u) * 9u) >> 3u; + source_abcd = XeEndianSwap32(source_abcd, endian); + source_efgh = XeEndianSwap32(source_efgh, endian); + source_ijkl = XeEndianSwap32(source_ijkl, endian); + source_mnop = XeEndianSwap32(source_mnop, endian); + source_qr = XeEndianSwap32(source_qr, endian); + xe_resolve_dest[dest_address] = source_abcd.xy; + xe_resolve_dest[dest_address + 1u] = source_abcd.zw; + xe_resolve_dest[dest_address + 2u] = source_efgh.xy; + xe_resolve_dest[dest_address + 3u] = source_efgh.zw; + xe_resolve_dest[dest_address + 4u] = source_ijkl.xy; + xe_resolve_dest[dest_address + 5u] = source_ijkl.zw; + xe_resolve_dest[dest_address + 6u] = source_mnop.xy; + xe_resolve_dest[dest_address + 7u] = source_mnop.zw; + xe_resolve_dest[dest_address + 8u] = source_qr; +} \ No newline at end of file diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl new file mode 100644 index 000000000..6c860f4c9 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_fast_32bpp_3xres_4xmsaa.cs.hlsl @@ -0,0 +1,95 @@ +#include "endian.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 guest pixels (a pair is independently addressable as uint2). + uint2 pixel_index = xe_thread_id.xy << uint2(1u, 0u); + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + uint host_source_address_int2s = + (XeEdramOffsetInts(pixel_index + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + kXenosMsaaSamples_4X, XeResolveEdramIsDepth(), 0u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + // abc jkl + // def mno + // ghi pqr + // as: + // ab|cd|ef|gh|i-|--|--|--|--|jk|lm|no|pq|r-|--|--|--|-- + // for samples 0 or 1, or + // --|--|--|--|-a|bc|de|fg|hi|--|--|--|--|-j|kl|mn|op|qr + // for samples 2 or 3 + uint4 source_abcd, source_efgh, source_ijkl, source_mnop; + uint2 source_qr; + uint sample_select = XeResolveSampleSelect(); + [branch] if (sample_select != kXenosCopySampleSelect_2 && + sample_select != kXenosCopySampleSelect_3) { + source_abcd.xy = xe_resolve_source[host_source_address_int2s]; + source_abcd.zw = xe_resolve_source[host_source_address_int2s + 1u]; + source_efgh.xy = xe_resolve_source[host_source_address_int2s + 2u]; + source_efgh.zw = xe_resolve_source[host_source_address_int2s + 3u]; + source_ijkl.x = xe_resolve_source[host_source_address_int2s + 4u].x; + source_ijkl.yz = xe_resolve_source[host_source_address_int2s + 9u]; + uint2 source_lm = xe_resolve_source[host_source_address_int2s + 10u]; + source_ijkl.w = source_lm.x; + source_mnop.x = source_lm.y; + source_mnop.yz = xe_resolve_source[host_source_address_int2s + 11u]; + uint2 source_pq = xe_resolve_source[host_source_address_int2s + 12u]; + source_mnop.w = source_pq.x; + source_qr.x = source_pq.y; + source_qr.y = xe_resolve_source[host_source_address_int2s + 13u].x; + } else { + source_abcd.x = xe_resolve_source[host_source_address_int2s + 4u].y; + source_abcd.yz = xe_resolve_source[host_source_address_int2s + 5u]; + uint2 source_de = xe_resolve_source[host_source_address_int2s + 6u]; + source_abcd.w = source_de.x; + source_efgh.x = source_de.y; + source_efgh.yz = xe_resolve_source[host_source_address_int2s + 7u]; + uint2 source_hi = xe_resolve_source[host_source_address_int2s + 8u]; + source_efgh.w = source_hi.x; + source_ijkl.x = source_hi.y; + source_ijkl.y = xe_resolve_source[host_source_address_int2s + 13u].y; + source_ijkl.zw = xe_resolve_source[host_source_address_int2s + 14u]; + source_mnop.xy = xe_resolve_source[host_source_address_int2s + 15u]; + source_mnop.zw = xe_resolve_source[host_source_address_int2s + 16u]; + source_qr = xe_resolve_source[host_source_address_int2s + 17u]; + } + XeResolveSwap18PixelsRedBlue32bpp(source_abcd, source_efgh, source_ijkl, + source_mnop, source_qr); + [branch] if (XeResolveEdramDuplicateSecondHostPixel()) { + if (pixel_index.x == 0u) { + source_abcd.x = source_abcd.y; + source_abcd.w = source_efgh.x; + source_efgh.z = source_efgh.w; + } + if (pixel_index.y == 0u) { + source_abcd.x = source_abcd.w; + source_abcd.yz = source_efgh.xy; + source_ijkl.yzw = source_mnop.xyz; + } + } + uint endian = XeResolveDestEndian128(); + uint dest_address = (XeResolveDestPixelAddress(pixel_index, 2u) * 9u) >> 3u; + source_abcd = XeEndianSwap32(source_abcd, endian); + source_efgh = XeEndianSwap32(source_efgh, endian); + source_ijkl = XeEndianSwap32(source_ijkl, endian); + source_mnop = XeEndianSwap32(source_mnop, endian); + source_qr = XeEndianSwap32(source_qr, endian); + xe_resolve_dest[dest_address] = source_abcd.xy; + xe_resolve_dest[dest_address + 1u] = source_abcd.zw; + xe_resolve_dest[dest_address + 2u] = source_efgh.xy; + xe_resolve_dest[dest_address + 3u] = source_efgh.zw; + xe_resolve_dest[dest_address + 4u] = source_ijkl.xy; + xe_resolve_dest[dest_address + 5u] = source_ijkl.zw; + xe_resolve_dest[dest_address + 6u] = source_mnop.xy; + xe_resolve_dest[dest_address + 7u] = source_mnop.zw; + xe_resolve_dest[dest_address + 8u] = source_qr; +} \ No newline at end of file diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl index 0b91baf82..87bd46c9b 100644 --- a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_2xres.cs.hlsl @@ -21,7 +21,7 @@ void main(uint3 xe_thread_id : SV_DispatchThreadID) { XeResolveFirstSampleIndex()); uint4 guest_pixel_y0 = xe_resolve_source[guest_source_address_ints]; uint4 guest_pixel_y1 = xe_resolve_source[guest_source_address_ints + 1u]; - XeResolveSwap8PixelsRedBlue32bpp(guest_pixel_y0, guest_pixel_y1); + XeResolveSwap4PixelsRedBlue64bpp(guest_pixel_y0, guest_pixel_y1); [branch] if (XeResolveEdramDuplicateSecondHostPixel()) { if (xe_thread_id.x == 0u) { guest_pixel_y0.xy = guest_pixel_y0.zw; diff --git a/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..81ecc8da3 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_fast_64bpp_3xres.cs.hlsl @@ -0,0 +1,35 @@ +#include "endian.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 1 guest pixel. + // Group size is the same as resolve granularity, overflow check not needed. + uint host_source_address_int2s = + (XeEdramOffsetInts(xe_thread_id.xy + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), false, 1u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + uint2 source_xy_min = + XeResolveEdramDuplicateSecondHostPixel() ? uint2(xe_thread_id.xy == 0u) + : uint2(0u, 0u); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(xe_thread_id.xy, 3u) * 9u) >> 3u; + uint x, y; + [unroll] for (y = 0u; y < 3u; ++y) { + uint source_y = max(y, source_xy_min.y); + [unroll] for (x = 0u; x < 3u; ++x) { + xe_resolve_dest[dest_address_int2s++] = + XeEndianSwap64( + XeResolveSwapPixelRedBlue64bpp( + xe_resolve_source[host_source_address_int2s + source_y * 3u + + max(x, source_xy_min.x)]), + endian); + } + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl new file mode 100644 index 000000000..b9173fe1a --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_32bpp_3xres.cs.hlsl @@ -0,0 +1,73 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +ByteAddressBuffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 1 guest pixel. + // Group size is the same as resolve granularity, overflow check not needed. + bool2 duplicate_second = XeResolveEdramDuplicateSecondHostPixel() + ? xe_thread_id.xy == 0u + : bool2(false, false); + uint endian = XeResolveDestEndian128(); + uint dest_address_int4s = + (XeResolveDestPixelAddress(xe_thread_id.xy, 4u) * 9u) >> 4u; + // XYZ + // W4- + // --- + uint source_address_bytes = + XeResolveColorCopySourcePixelAddressInts(xe_thread_id.xy) * (9u * 4u); + float4 source_pixel_y0x0, source_pixel_y0x1, source_pixel_y0x2; + float4 source_pixel_y1x0, source_pixel_y1x1; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + source_pixel_y0x0, source_pixel_y0x1, + source_pixel_y0x2, source_pixel_y1x0, + source_pixel_y1x1); + // y0x2 will be stored later - need y1x2 instead for duplicate_second.y. + uint4 store_pixel_uint_y0x0 = asuint(source_pixel_y0x0); + uint4 store_pixel_uint_y0x1 = asuint(source_pixel_y0x1); + uint4 store_pixel_uint_y1x0 = asuint(source_pixel_y1x0); + uint4 store_pixel_uint_y1x1 = asuint(source_pixel_y1x1); + [branch] if (duplicate_second.x) { + store_pixel_uint_y0x0 = store_pixel_uint_y0x1; + store_pixel_uint_y1x0 = store_pixel_uint_y1x1; + } + [branch] if (duplicate_second.y) { + store_pixel_uint_y0x0 = store_pixel_uint_y1x0; + store_pixel_uint_y0x1 = store_pixel_uint_y1x1; + } + XeEndianSwap128(store_pixel_uint_y0x0, store_pixel_uint_y0x1, + store_pixel_uint_y1x0, store_pixel_uint_y1x1, endian); + xe_resolve_dest[dest_address_int4s] = store_pixel_uint_y0x0; + xe_resolve_dest[dest_address_int4s + 1u] = store_pixel_uint_y0x1; + xe_resolve_dest[dest_address_int4s + 3u] = store_pixel_uint_y1x0; + xe_resolve_dest[dest_address_int4s + 4u] = store_pixel_uint_y1x1; + // +++ + // ++X + // YZW + float4 source_pixel_y1x2; + float4 source_pixel_y2x0, source_pixel_y2x1, source_pixel_y2x2; + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, + source_pixel_y1x2, source_pixel_y2x0, + source_pixel_y2x1, source_pixel_y2x2); + uint4 store_pixel_uint_y0x2 = + asuint(duplicate_second.y ? source_pixel_y1x2 : source_pixel_y0x2); + uint4 store_pixel_uint_y1x2 = asuint(source_pixel_y1x2); + uint4 store_pixel_uint_y2x0 = + asuint(duplicate_second.x ? source_pixel_y2x1 : source_pixel_y2x0); + uint4 store_pixel_uint_y2x1 = asuint(source_pixel_y2x1); + uint4 store_pixel_uint_y2x2 = asuint(source_pixel_y2x2); + XeEndianSwap128(store_pixel_uint_y0x2, store_pixel_uint_y1x2, + store_pixel_uint_y2x0, store_pixel_uint_y2x1, + store_pixel_uint_y2x2, endian); + xe_resolve_dest[dest_address_int4s + 2u] = store_pixel_uint_y0x2; + xe_resolve_dest[dest_address_int4s + 5u] = store_pixel_uint_y1x2; + xe_resolve_dest[dest_address_int4s + 6u] = store_pixel_uint_y2x0; + xe_resolve_dest[dest_address_int4s + 7u] = store_pixel_uint_y2x1; + xe_resolve_dest[dest_address_int4s + 8u] = store_pixel_uint_y2x2; +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..0484ff136 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_128bpp_from_64bpp_3xres.cs.hlsl @@ -0,0 +1,37 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 1 guest pixel. + // Group size is the same as resolve granularity, overflow check not needed. + uint host_source_address_int2s = + (XeEdramOffsetInts(xe_thread_id.xy + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), false, 1u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + uint2 source_xy_min = + XeResolveEdramDuplicateSecondHostPixel() ? uint2(xe_thread_id.xy == 0u) + : uint2(0u, 0u); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int4s = + (XeResolveDestPixelAddress(xe_thread_id.xy, 4u) * 9u) >> 4u; + uint x, y; + [unroll] for (y = 0u; y < 3u; ++y) { + uint source_y = max(y, source_xy_min.y); + [unroll] for (x = 0u; x < 3u; ++x) { + xe_resolve_dest[dest_address_int4s++] = XeEndianSwap128( + asuint(XeResolveLoadHost64bppPixelFromUInt2( + xe_resolve_source, 9u, + host_source_address_int2s + source_y * 3u + + max(x, source_xy_min.x))), + endian); + } + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl index a15b0abab..6109be849 100644 --- a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp.cs.hlsl @@ -19,7 +19,7 @@ void main(uint3 xe_thread_id : SV_DispatchThreadID) { xe_resolve_source, XeResolveColorCopySourcePixelAddressInts(pixel_index), pixel_0, pixel_1, pixel_2, pixel_3); xe_resolve_dest[XeResolveDestPixelAddress(pixel_index, 1u) >> 3u] = - XeEndianSwap16(XePack16bpp4Pixels(pixel_0, pixel_1, pixel_2, pixel_3, - XeResolveDestFormat()), + XeEndianSwap16(XePack16bpp4PixelsInUInt2(pixel_0, pixel_1, pixel_2, + pixel_3, XeResolveDestFormat()), XeResolveDestEndian128()); } diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl index 9892d2f06..bd43d32c5 100644 --- a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_2xres.cs.hlsl @@ -15,9 +15,9 @@ void main(uint3 xe_thread_id : SV_DispatchThreadID) { xe_resolve_source, XeResolveColorCopySourcePixelAddressInts(xe_thread_id.xy), host_pixel_y0x0, host_pixel_y0x1, host_pixel_y1x0, host_pixel_y1x1); - uint2 packed = XePack16bpp4Pixels(host_pixel_y0x0, host_pixel_y0x1, - host_pixel_y1x0, host_pixel_y1x1, - XeResolveDestFormat()); + uint2 packed = XePack16bpp4PixelsInUInt2(host_pixel_y0x0, host_pixel_y0x1, + host_pixel_y1x0, host_pixel_y1x1, + XeResolveDestFormat()); [branch] if (XeResolveEdramDuplicateSecondHostPixel()) { if (xe_thread_id.x == 0u) { packed = (packed & 0xFFFF0000u) | (packed >> 16u); diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl new file mode 100644 index 000000000..40a460be2 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_32bpp_3xres.cs.hlsl @@ -0,0 +1,151 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +ByteAddressBuffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 4 guest pixels. + // Group height is the same as resolve granularity, Y overflow check not + // needed. + uint2 pixel_index = xe_thread_id.xy << uint2(2u, 0u); + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + bool2 duplicate_second = XeResolveEdramDuplicateSecondHostPixel() + ? pixel_index == 0u + : bool2(false, false); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(pixel_index, 1u) * 9u) >> 3u; + // XYZ --- --- --- + // W4x --- --- --- + // yzw --- --- --- + uint source_address_bytes = + XeResolveColorCopySourcePixelAddressInts(pixel_index) * (9u * 4u); + float4 host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, host_pixel_4; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + uint4 packed_top; + uint packed_top_4; + XePack16bpp5PixelsInUInt41(host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4, dest_format, + packed_top, packed_top_4); + XeEndianSwap16(packed_top, packed_top_4, endian); + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + uint4 packed_bottom = XePack16bpp4PixelsInUInt4(host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3, + dest_format); + packed_bottom = XeEndianSwap16(packed_bottom, endian); + [branch] if (duplicate_second.x) { + packed_top.x = packed_top.y; + packed_top.w = packed_top_4; + packed_bottom.y = packed_bottom.z; + } + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s] = packed_top.xz | (packed_top.yw << 16u); + xe_resolve_dest[dest_address_int2s + 1u] = + uint2(packed_top_4, packed_bottom.y) | (packed_bottom.xz << 16u); + uint packed_0_8 = packed_bottom.w; + // +++ XYZ --- --- + // +++ W4x --- --- + // +++ yzw --- --- + uint source_pixel_stride_bytes = + (9u * 4u) << uint(XeResolveEdramMsaaSamples() >= kXenosMsaaSamples_4X); + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + XePack16bpp5PixelsInUInt41(host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4, dest_format, + packed_top, packed_top_4); + XeEndianSwap16(packed_top, packed_top_4, endian); + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + packed_bottom = XePack16bpp4PixelsInUInt4(host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3, + dest_format); + packed_bottom = XeEndianSwap16(packed_bottom, endian); + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s + 2u] = + uint2(packed_0_8, packed_top.y) | (packed_top.xz << 16u); + xe_resolve_dest[dest_address_int2s + 3u] = + uint2(packed_top.w, packed_bottom.x) | + (uint2(packed_top_4, packed_bottom.y) << 16u); + uint packed_1_78 = packed_bottom.z | (packed_bottom.w << 16u); + // +++ +++ XYZ --- + // +++ +++ W4x --- + // +++ +++ yzw --- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + XePack16bpp5PixelsInUInt41(host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4, dest_format, + packed_top, packed_top_4); + XeEndianSwap16(packed_top, packed_top_4, endian); + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + packed_bottom = XePack16bpp4PixelsInUInt4(host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3, + dest_format); + packed_bottom = XeEndianSwap16(packed_bottom, endian); + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s + 4u] = + uint2(packed_1_78, packed_top.x | (packed_top.y << 16u)); + xe_resolve_dest[dest_address_int2s + 5u] = + uint2(packed_top.z, packed_top_4) | + (uint2(packed_top.w, packed_bottom.x) << 16u); + uint2 packed_2_678 = + uint2(packed_bottom.y | (packed_bottom.z << 16u), packed_bottom.w); + // +++ +++ +++ XYZ + // +++ +++ +++ W4x + // +++ +++ +++ yzw + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + XePack16bpp5PixelsInUInt41(host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4, dest_format, + packed_top, packed_top_4); + XeEndianSwap16(packed_top, packed_top_4, endian); + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + packed_bottom = XePack16bpp4PixelsInUInt4(host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3, + dest_format); + packed_bottom = XeEndianSwap16(packed_bottom, endian); + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s + 6u] = + uint2(packed_2_678.x, packed_2_678.y | (packed_top.x << 16u)); + xe_resolve_dest[dest_address_int2s + 7u] = + packed_top.yw | (uint2(packed_top.z, packed_top_4) << 16u); + xe_resolve_dest[dest_address_int2s + 8u] = + packed_bottom.xz | (packed_bottom.yw << 16u); +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..f9b442cb0 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_16bpp_from_64bpp_3xres.cs.hlsl @@ -0,0 +1,62 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 4 guest pixels. + // Group height is the same as resolve granularity, Y overflow check not + // needed. + uint2 pixel_index = xe_thread_id.xy << uint2(2u, 0u); + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + uint host_source_address_int2s = + (XeEdramOffsetInts(pixel_index + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), false, 1u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + uint source_pixel_stride_int2s = + 9u << uint(XeResolveEdramMsaaSamples() >= kXenosMsaaSamples_4X); + uint2 source_xy_min = + XeResolveEdramDuplicateSecondHostPixel() ? uint2(pixel_index == 0u) + : uint2(0u, 0u); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(pixel_index, 1u) * 9u) >> 3u; + uint p, x, y; + uint host_pixel_index = 0u; + float4 host_pixel_previous = (0.0f).xxxx; + uint2 host_pixels_packed = (0u).xx; + [unroll] for (p = 0u; p < 4u; ++p) { + [unroll] for (y = 0u; y < 3u; ++y) { + uint source_y = max(y, source_xy_min.y); + [unroll] for (x = 0u; x < 3u; ++x) { + float4 host_pixel = XeResolveLoadHost64bppPixelFromUInt2( + xe_resolve_source, 9u, + host_source_address_int2s + source_y * 3u + max(x, source_xy_min.x)); + if (host_pixel_index & 1u) { + // High 16 bits within 32 bits - convert and push. + host_pixels_packed.x = host_pixels_packed.y; + host_pixels_packed.y = XePack16bpp2PixelsInUInt( + host_pixel_previous, host_pixel, dest_format); + if (host_pixel_index & 2u) { + // Write four host pixels. + xe_resolve_dest[dest_address_int2s++] = + XeEndianSwap16(host_pixels_packed, endian); + } + } else { + // Low 16 bits within 32 bits. + host_pixel_previous = host_pixel; + } + ++host_pixel_index; + } + } + host_source_address_int2s += source_pixel_stride_int2s; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl new file mode 100644 index 000000000..5ecd29265 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_32bpp_3xres.cs.hlsl @@ -0,0 +1,101 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +ByteAddressBuffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 guest pixels. + // Group height is the same as resolve granularity, Y overflow check not + // needed. + uint2 pixel_index = xe_thread_id.xy << uint2(1u, 0u); + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + bool2 duplicate_second = XeResolveEdramDuplicateSecondHostPixel() + ? pixel_index == 0u + : bool2(false, false); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(pixel_index, 2u) * 9u) >> 3u; + // XYZ --- + // W4- --- + // --- --- + uint source_address_bytes = + XeResolveColorCopySourcePixelAddressInts(pixel_index) * (9u * 4u); + float4 host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, host_pixel_4; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + uint4 packed_top; + uint packed_top_4; + XePack32bpp5Pixels(host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, + host_pixel_4, dest_format, packed_top, packed_top_4); + XeEndianSwap32(packed_top, packed_top_4, endian); + [branch] if (duplicate_second.x) { + packed_top.x = packed_top.y; + packed_top.w = packed_top_4; + } + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + } + xe_resolve_dest[dest_address_int2s] = packed_top.xy; + // +++ --- + // ++X --- + // YZW --- + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + uint4 packed_bottom = XePack32bpp4Pixels(host_pixel_0, host_pixel_1, + host_pixel_2, host_pixel_3, + dest_format); + packed_bottom = XeEndianSwap32(packed_bottom, endian); + [branch] if (duplicate_second.x) { + packed_bottom.y = packed_bottom.z; + } + [branch] if (duplicate_second.y) { + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s + 1u] = packed_top.zw; + xe_resolve_dest[dest_address_int2s + 2u] = + uint2(packed_top_4, packed_bottom.x); + xe_resolve_dest[dest_address_int2s + 3u] = packed_bottom.yz; + // +++ XYZ + // +++ W4- + // +++ --- + source_address_bytes += + (9u * 4u) << uint(XeResolveEdramMsaaSamples() >= kXenosMsaaSamples_4X); + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + XePack32bpp5Pixels(host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, + host_pixel_4, dest_format, packed_top, packed_top_4); + XeEndianSwap32(packed_top, packed_top_4, endian); + [branch] if (duplicate_second.y) { + packed_top.x = packed_top.w; + packed_top.y = packed_top_4; + } + xe_resolve_dest[dest_address_int2s + 4u] = + uint2(packed_bottom.w, packed_top.x); + // +++ +++ + // +++ ++X + // +++ YZW + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + packed_bottom = XePack32bpp4Pixels(host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, dest_format); + packed_bottom = XeEndianSwap32(packed_bottom, endian); + [branch] if (duplicate_second.y) { + packed_top.z = packed_bottom.x; + } + xe_resolve_dest[dest_address_int2s + 5u] = packed_top.yz; + xe_resolve_dest[dest_address_int2s + 6u] = uint2(packed_top.w, packed_top_4); + xe_resolve_dest[dest_address_int2s + 7u] = packed_bottom.xy; + xe_resolve_dest[dest_address_int2s + 8u] = packed_bottom.zw; +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..e11a569d8 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_32bpp_from_64bpp_3xres.cs.hlsl @@ -0,0 +1,55 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 guest pixels. + // Group height is the same as resolve granularity, Y overflow check not + // needed. + uint2 pixel_index = xe_thread_id.xy << uint2(1u, 0u); + [branch] if (pixel_index.x >= XeResolveSize().x) { + return; + } + uint host_source_address_int2s = + (XeEdramOffsetInts(pixel_index + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), false, 1u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + uint2 source_xy_min = + XeResolveEdramDuplicateSecondHostPixel() ? uint2(pixel_index == 0u) + : uint2(0u, 0u); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(pixel_index, 2u) * 9u) >> 3u; + uint p, x, y; + uint host_pixel_index = 0u; + float4 host_pixel_previous = (0.0f).xxxx; + [unroll] for (p = 0u; p < 2u; ++p) { + [unroll] for (y = 0u; y < 3u; ++y) { + uint source_y = max(y, source_xy_min.y); + [unroll] for (x = 0u; x < 3u; ++x) { + float4 host_pixel = XeResolveLoadHost64bppPixelFromUInt2( + xe_resolve_source, 9u, + host_source_address_int2s + source_y * 3u + max(x, source_xy_min.x)); + if (host_pixel_index & 1u) { + // High 32 bits (low already loaded). + xe_resolve_dest[dest_address_int2s++] = XeEndianSwap32( + XePack32bpp2Pixels(host_pixel_previous, host_pixel, dest_format), + endian); + } else { + // Low 32 bits. + host_pixel_previous = host_pixel; + } + ++host_pixel_index; + } + } + host_source_address_int2s += + 9u << uint(XeResolveEdramMsaaSamples() >= kXenosMsaaSamples_4X); + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl new file mode 100644 index 000000000..fad889d06 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_32bpp_3xres.cs.hlsl @@ -0,0 +1,67 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +ByteAddressBuffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 1 guest pixel. + // Group size is the same as resolve granularity, overflow check not needed. + bool2 duplicate_second = XeResolveEdramDuplicateSecondHostPixel() + ? xe_thread_id.xy == 0u + : bool2(false, false); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(xe_thread_id.xy, 3u) * 9u) >> 3u; + // XYZ + // W4- + // --- + uint source_address_bytes = + XeResolveColorCopySourcePixelAddressInts(xe_thread_id.xy) * (9u * 4u); + float4 host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, host_pixel_4; + XeResolveLoad5Host32bppPixels(xe_resolve_source, 9u, source_address_bytes, + host_pixel_0, host_pixel_1, host_pixel_2, + host_pixel_3, host_pixel_4); + uint4 packed_01, packed_23; + uint2 packed_4; + XePack64bpp5Pixels(host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, + host_pixel_4, dest_format, packed_01, packed_23, packed_4); + XeEndianSwap64(packed_01, packed_23, packed_4, endian); + // 2 will be stored later - need 5 instead for duplicate_second.y. + [branch] if (duplicate_second.x) { + packed_01.xy = packed_01.zw; + packed_23.zw = packed_4; + } + [branch] if (duplicate_second.y) { + packed_01 = uint4(packed_23.zw, packed_4); + } + xe_resolve_dest[dest_address_int2s] = packed_01.xy; + xe_resolve_dest[dest_address_int2s + 1u] = packed_01.zw; + xe_resolve_dest[dest_address_int2s + 3u] = packed_23.zw; + xe_resolve_dest[dest_address_int2s + 4u] = packed_4; + // +++ + // ++X + // YZW + XeResolveLoad4Host32bppPixels(xe_resolve_source, 9u, + source_address_bytes + 5u * 4u, host_pixel_0, + host_pixel_1, host_pixel_2, host_pixel_3); + uint4 packed_56, packed_78; + XePack64bpp4Pixels(host_pixel_0, host_pixel_1, host_pixel_2, host_pixel_3, + dest_format, packed_56, packed_78); + XeEndianSwap64(packed_56, packed_78, endian); + [branch] if (duplicate_second.x) { + packed_56.zw = packed_78.xy; + } + [branch] if (duplicate_second.y) { + packed_23.xy = packed_56.xy; + } + xe_resolve_dest[dest_address_int2s + 2u] = packed_23.xy; + xe_resolve_dest[dest_address_int2s + 5u] = packed_56.xy; + xe_resolve_dest[dest_address_int2s + 6u] = packed_56.zw; + xe_resolve_dest[dest_address_int2s + 7u] = packed_78.xy; + xe_resolve_dest[dest_address_int2s + 8u] = packed_78.zw; +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl new file mode 100644 index 000000000..9c61e6568 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_64bpp_from_64bpp_3xres.cs.hlsl @@ -0,0 +1,39 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +Buffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 1 guest pixel. + // Group size is the same as resolve granularity, overflow check not needed. + uint host_source_address_int2s = + (XeEdramOffsetInts(xe_thread_id.xy + XeResolveOffset(), + XeResolveEdramBaseTiles(), XeResolveEdramPitchTiles(), + XeResolveEdramMsaaSamples(), false, 1u, + XeResolveFirstSampleIndex()) * 9u) >> 1u; + uint2 source_xy_min = + XeResolveEdramDuplicateSecondHostPixel() ? uint2(xe_thread_id.xy == 0u) + : uint2(0u, 0u); + uint dest_format = XeResolveDestFormat(); + uint endian = XeResolveDestEndian128(); + uint dest_address_int2s = + (XeResolveDestPixelAddress(xe_thread_id.xy, 3u) * 9u) >> 3u; + uint x, y; + [unroll] for (y = 0u; y < 3u; ++y) { + uint source_y = max(y, source_xy_min.y); + [unroll] for (x = 0u; x < 3u; ++x) { + xe_resolve_dest[dest_address_int2s++] = XeEndianSwap64( + XePack64bppPixel( + XeResolveLoadHost64bppPixelFromUInt2( + xe_resolve_source, 9u, + host_source_address_int2s + source_y * 3u + + max(x, source_xy_min.x)), + dest_format), + endian); + } + } +} diff --git a/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_3xres.cs.hlsl b/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_3xres.cs.hlsl new file mode 100644 index 000000000..2c1c545fb --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/resolve_full_8bpp_3xres.cs.hlsl @@ -0,0 +1,148 @@ +#include "endian.hlsli" +#include "pixel_formats.hlsli" +#define XE_RESOLVE_RESOLUTION_SCALED +#include "resolve.hlsli" + +RWBuffer xe_resolve_dest : register(u0); +ByteAddressBuffer xe_resolve_source : register(t0); + +[numthreads(8, 8, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 guest pixels. + // Group height is the same as resolve granularity, Y overflow check not + // needed. + [branch] if (xe_thread_id.x >= XeResolveSizeDiv8().x) { + return; + } + uint2 pixel_index = xe_thread_id.xy << uint2(3u, 0u); + bool2 duplicate_second = XeResolveEdramDuplicateSecondHostPixel() + ? pixel_index == 0u + : bool2(false, false); + uint dest_address_int2s = + (XeResolveDestPixelAddress(pixel_index, 0u) * 9u) >> 3u; + // Converting to R8. + // TODO(Triang3l): Investigate formats 8_A and 8_B. + // Guest pixel 0. + // +0: 0123, 4567 + // +1: 8---, ---- + uint source_address_bytes = + XeResolveColorCopySourcePixelAddressInts(pixel_index) * (9u * 4u); + float4 host_pixels_0123, host_pixels_4567; + float host_pixels_8; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.x) { + host_pixels_0123.x = host_pixels_0123.y; + host_pixels_0123.w = host_pixels_4567.x; + host_pixels_4567.z = host_pixels_4567.w; + } + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + XePackR8G8B8A8UNorm(host_pixels_0123), + XePackR8G8B8A8UNorm(host_pixels_4567)); + uint packed_next_x = XePackR8UNorm(host_pixels_8); + // Guest pixel 1. + // +1: <012, 3456 + // +2: 78--, ---- + uint source_pixel_stride_bytes = + (9u * 4u) << + (uint(XeResolveEdramFormatIs64bpp()) + + uint(XeResolveEdramMsaaSamples() >= kXenosMsaaSamples_4X)); + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x | (XePackR8G8B8UNorm(host_pixels_0123.xyz) << 8u), + XePackR8G8B8A8UNorm(float4(host_pixels_0123.w, host_pixels_4567.xyz))); + packed_next_x = XePackR8G8UNorm(float2(host_pixels_4567.w, host_pixels_8)); + // Guest pixel 2. + // +2: <<01, 2345 + // +3: 678-, ---- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x | (XePackR8G8UNorm(host_pixels_0123.xy) << 16u), + XePackR8G8B8A8UNorm(float4(host_pixels_0123.zw, host_pixels_4567.xy))); + packed_next_x = XePackR8G8B8UNorm(float3(host_pixels_4567.zw, host_pixels_8)); + // Guest pixel 3. + // +3: <<<0, 1234 + // +4: 5678, ---- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x | (XePackR8UNorm(host_pixels_0123.x) << 24u), + XePackR8G8B8A8UNorm(float4(host_pixels_0123.yzw, host_pixels_4567.x))); + packed_next_x = + XePackR8G8B8A8UNorm(float4(host_pixels_4567.yzw, host_pixels_8)); + // Guest pixel 4. + // +4: <<<<, 0123 + // +5: 4567, 8--- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = + uint2(packed_next_x, XePackR8G8B8A8UNorm(host_pixels_0123)); + packed_next_x = XePackR8G8B8A8UNorm(host_pixels_4567); + uint packed_next_y = XePackR8UNorm(host_pixels_8); + // Guest pixel 5. + // +5: <<<<, <012 + // +6: 3456, 78-- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x, + packed_next_y | (XePackR8G8B8UNorm(host_pixels_0123.xyz) << 8u)); + packed_next_x = + XePackR8G8B8A8UNorm(float4(host_pixels_0123.w, host_pixels_4567.xyz)); + packed_next_y = XePackR8G8UNorm(float2(host_pixels_4567.w, host_pixels_8)); + // Guest pixel 6. + // +6: <<<<, <<01 + // +7: 2345, 678- + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x, + packed_next_y | (XePackR8G8UNorm(host_pixels_0123.xy) << 16u)); + packed_next_x = + XePackR8G8B8A8UNorm(float4(host_pixels_0123.zw, host_pixels_4567.xy)); + packed_next_y = XePackR8G8B8UNorm(float3(host_pixels_4567.zw, host_pixels_8)); + // Guest pixel 7. + // +7: <<<<, <<<0 + // +8: 1234, 5678 + source_address_bytes += source_pixel_stride_bytes; + XeResolveLoad9RedColorsX3(xe_resolve_source, source_address_bytes, + host_pixels_0123, host_pixels_4567, host_pixels_8); + [branch] if (duplicate_second.y) { + host_pixels_0123.xyz = float3(host_pixels_0123.w, host_pixels_4567.xy); + } + xe_resolve_dest[dest_address_int2s++] = uint2( + packed_next_x, + packed_next_y | (XePackR8UNorm(host_pixels_0123.x) << 24u)); + xe_resolve_dest[dest_address_int2s++] = uint2( + XePackR8G8B8A8UNorm(float4(host_pixels_0123.yzw, host_pixels_4567.x)), + XePackR8G8B8A8UNorm(float4(host_pixels_4567.yzw, host_pixels_8))); +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_128bpb_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_128bpb_3x.cs.hlsl new file mode 100644 index 000000000..ee55651f4 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_128bpb_3x.cs.hlsl @@ -0,0 +1,40 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(16, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 blocks. + uint3 block_index = xe_thread_id << uint3(1, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) * int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3u, + xe_texture_load_host_pitch, 16u) + + xe_texture_load_host_base) >> 4; + int elements_pitch_host = xe_texture_load_host_pitch >> 4; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 16u, 4u) * 9) >> 4; + uint endian = XeTextureLoadEndian32(); + int p, y, x; + [unroll] for (p = 0; p < 2; ++p) { + if (p) { + block_offset_host += 3; + if (XeTextureLoadIsTiled()) { + // Odd block start = even block end + 16 guest bytes when tiled. + block_offset_guest += (16 * 9) >> 4; + } + } + int block_row_offset_host = block_offset_host; + [unroll] for (y = 0; y < 3; ++y) { + [unroll] for (x = 0; x < 3; ++x) { + xe_texture_load_dest[block_row_offset_host + x] = XeEndianSwap32( + xe_texture_load_source[block_offset_guest++], endian); + } + block_row_offset_host += elements_pitch_host; + } + } +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli index f1e4c170e..36ed33a4a 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli +++ b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb.hlsli @@ -5,8 +5,8 @@ RWBuffer xe_texture_load_dest : register(u0); [numthreads(2, 32, 1)] void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 16 blocks passed through an externally provided transformation - // function (XE_TEXTURE_LOAD_16BPB_TRANSFORM). + // 1 thread = 16 blocks passed through an externally provided + // uint4 transformation function (XE_TEXTURE_LOAD_16BPB_TRANSFORM). uint3 block_index = xe_thread_id << uint3(4, 0, 0); [branch] if (any(block_index >= xe_texture_load_size_blocks)) { return; diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli index 2365c9f0a..46c9ae00a 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli +++ b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_2x.hlsli @@ -5,8 +5,8 @@ RWBuffer xe_texture_load_dest : register(u0); [numthreads(2, 32, 1)] void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 16 blocks passed through an externally provided transformation - // function (XE_TEXTURE_LOAD_16BPB_TRANSFORM). + // 1 thread = 16 blocks passed through an externally provided + // uint4 transformation function (XE_TEXTURE_LOAD_16BPB_TRANSFORM). uint3 block_index = xe_thread_id << uint3(4, 0, 0); [branch] if (any(block_index >= xe_texture_load_size_blocks)) { return; diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.cs.hlsl new file mode 100644 index 000000000..1e26c60e4 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.cs.hlsl @@ -0,0 +1,2 @@ +#define XE_TEXTURE_LOAD_16BPB_TRANSFORM(blocks) (blocks) +#include "texture_load_16bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.hlsli new file mode 100644 index 000000000..ee8b9c719 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_16bpb_3x.hlsli @@ -0,0 +1,94 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(2, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 16 blocks passed through an externally provided + // uint2 transformation function (XE_TEXTURE_LOAD_16BPB_TRANSFORM). + uint3 block_index = xe_thread_id << uint3(4, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) * int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3, + xe_texture_load_host_pitch, 2u) + + xe_texture_load_host_base) >> 3; + int elements_pitch_host = xe_texture_load_host_pitch >> 3; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 2u, 1u) * 9) >> 3; + uint endian = XeTextureLoadEndian32(); + int i; + [unroll] for (i = 0; i < 16; i += 4) { + if (i == 8 && XeTextureLoadIsTiled()) { + // Odd 8 blocks start = even 8 blocks end + 48 guest bytes when tiled. + block_offset_guest += (48 * 9) >> 3; + } + // For guest pixels 0...3 and host pixels a...i within them: + // 0a0b0c0d0e0f0g0h0i1a1b1c1d1e1f1g1h1i2a2b2c2d2e2f2g2h2i3a3b3c3d3e3f3g3h3i + // to: + // 0a0b0c1a 1b1c2a2b 2c3a3b3c + // 0d0e0f1d 1e1f2d2e 2f3d3e3f + // 0g0h0i1g 1h1i2g2h 2i3g3h3i + uint2 blocks_0a0b_0c0d = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_0e0f_0g0h = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_0i1a_1b1c = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_1d1e_1f1g = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_1h1i_2a2b = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_2c2d_2e2f = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_2g2h_2i3a = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_3b3c_3d3e = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + uint2 blocks_3f3g_3h3i = XE_TEXTURE_LOAD_16BPB_TRANSFORM( + XeEndianSwap16(xe_texture_load_source[block_offset_guest++], endian)); + // R0+0 = 0a0b, 0c1a + int block_row_offset_host = block_offset_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + blocks_0a0b_0c0d.x, + (blocks_0a0b_0c0d.y & 0xFFFFu) | (blocks_0i1a_1b1c.x & ~0xFFFFu)); + // R0+1 = 1b1c, 2a2b + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + blocks_0i1a_1b1c.y, + blocks_1h1i_2a2b.y); + // R0+2 = 2c3a, 3b3c + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + (blocks_2c2d_2e2f.x & 0xFFFFu) | (blocks_2g2h_2i3a.y & ~0xFFFFu), + blocks_3b3c_3d3e.x); + // R1+0 = 0d0e, 0f1d + block_row_offset_host += elements_pitch_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + (blocks_0a0b_0c0d.y >> 16u) | (blocks_0e0f_0g0h.x << 16u), + (blocks_0e0f_0g0h.x >> 16u) | (blocks_1d1e_1f1g.x << 16u)); + // R1+1 = 1e1f, 2d2e + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + (blocks_1d1e_1f1g.x >> 16u) | (blocks_1d1e_1f1g.y << 16u), + (blocks_2c2d_2e2f.x >> 16u) | (blocks_2c2d_2e2f.y << 16u)); + // R1+2 = 2f3d, 3e3f + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + (blocks_2c2d_2e2f.y >> 16u) | (blocks_3b3c_3d3e.y << 16u), + (blocks_3b3c_3d3e.y >> 16u) | (blocks_3f3g_3h3i.x << 16u)); + // R2+0 = 0g0h, 0i1g + block_row_offset_host += elements_pitch_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + blocks_0e0f_0g0h.y, + (blocks_0i1a_1b1c.x & 0xFFFFu) | (blocks_1d1e_1f1g.y & ~0xFFFFu)); + // R2+1 = 1h1i, 2g2h + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + blocks_1h1i_2a2b.x, + blocks_2g2h_2i3a.x); + // R2+2 = 2i3g, 3h3i + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + (blocks_2g2h_2i3a.y & 0xFFFFu) | (blocks_3f3g_3h3i.x & ~0xFFFFu), + blocks_3f3g_3h3i.y); + block_offset_host += 3; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl index 54a68f20b..4ea67a248 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.cs.hlsl @@ -1,28 +1,2 @@ -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 blocks. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index), - xe_texture_load_size_blocks.y, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> 4; - uint endian = XeTextureLoadEndian32(); - xe_texture_load_dest[block_offset_host] = - XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian); - ++block_offset_host; - // Odd 4 blocks = even 4 blocks + 32 bytes when tiled. - block_offset_guest += XeTextureLoadIsTiled() ? 2 : 1; - xe_texture_load_dest[block_offset_host] = - XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian); -} +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) (blocks) +#include "texture_load_32bpb.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.hlsli new file mode 100644 index 000000000..946cdbe5c --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb.hlsli @@ -0,0 +1,29 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(4, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 blocks passed through an externally provided + // uint4 transformation function (XE_TEXTURE_LOAD_32BPB_TRANSFORM). + uint3 block_index = xe_thread_id << uint3(3, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index), + xe_texture_load_size_blocks.y, + xe_texture_load_host_pitch, 4u) + + xe_texture_load_host_base) >> 4; + int block_offset_guest = + XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> 4; + uint endian = XeTextureLoadEndian32(); + xe_texture_load_dest[block_offset_host] = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian)); + ++block_offset_host; + // Odd 4 blocks = even 4 blocks + 32 bytes when tiled. + block_offset_guest += XeTextureLoadIsTiled() ? 2 : 1; + xe_texture_load_dest[block_offset_host] = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian)); +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl index bd612fc53..523b40a55 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.cs.hlsl @@ -1,38 +1,2 @@ -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 blocks. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index) << int3(1, 1, 0), - xe_texture_load_size_blocks.y << 1, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int elements_pitch_host = xe_texture_load_host_pitch >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> (4 - 2); - uint endian = XeTextureLoadEndian32(); - int i; - [unroll] for (i = 0; i < 8; i += 2) { - if (i == 4 && XeTextureLoadIsTiled()) { - // Odd 4 blocks start = even 4 blocks end + 16 guest bytes when tiled. - block_offset_guest += 1 << 2; - } - // TTBB TTBB -> TTTT on the top row, BBBB on the bottom row. - uint4 block_0 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - uint4 block_1 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - xe_texture_load_dest[block_offset_host] = uint4(block_0.xy, block_1.xy); - xe_texture_load_dest[block_offset_host + elements_pitch_host] = - uint4(block_0.zw, block_1.zw); - ++block_offset_host; - } -} +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) (blocks) +#include "texture_load_32bpb_2x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.hlsli new file mode 100644 index 000000000..00512aed6 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_2x.hlsli @@ -0,0 +1,40 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(4, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 8 blocks passed through an externally provided + // uint4 transformation function (XE_TEXTURE_LOAD_32BPB_TRANSFORM). + uint3 block_index = xe_thread_id << uint3(3, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) << int3(1, 1, 0), + xe_texture_load_size_blocks.y << 1, + xe_texture_load_host_pitch, 4u) + + xe_texture_load_host_base) >> 4; + int elements_pitch_host = xe_texture_load_host_pitch >> 4; + int block_offset_guest = + XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> (4 - 2); + uint endian = XeTextureLoadEndian32(); + int i; + [unroll] for (i = 0; i < 8; i += 2) { + if (i == 4 && XeTextureLoadIsTiled()) { + // Odd 4 blocks start = even 4 blocks end + 16 guest bytes when tiled. + block_offset_guest += 1 << 2; + } + // TTBB TTBB -> TTTT on the top row, BBBB on the bottom row. + uint4 block_0 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], + endian); + uint4 block_1 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], + endian); + xe_texture_load_dest[block_offset_host] = + XE_TEXTURE_LOAD_32BPB_TRANSFORM(uint4(block_0.xy, block_1.xy)); + xe_texture_load_dest[block_offset_host + elements_pitch_host] = + XE_TEXTURE_LOAD_32BPB_TRANSFORM(uint4(block_0.zw, block_1.zw)); + ++block_offset_host; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.cs.hlsl new file mode 100644 index 000000000..0a88d846b --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.cs.hlsl @@ -0,0 +1,2 @@ +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) (blocks) +#include "texture_load_32bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.hlsli new file mode 100644 index 000000000..329011fb7 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_3x.hlsli @@ -0,0 +1,80 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(16, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 blocks passed through an externally provided uint2 + // transformation function (XE_TEXTURE_LOAD_32BPB_TRANSFORM). + uint3 block_index = xe_thread_id << uint3(1, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) * int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3, + xe_texture_load_host_pitch, 4u) + + xe_texture_load_host_base) >> 3; + int elements_pitch_host = xe_texture_load_host_pitch >> 3; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) * 9) >> 3; + uint endian = XeTextureLoadEndian32(); + // abc jkl + // def mno + // ghi pqr + // from: + // ab|cd|ef|gh|ij|kl|mn|op|qr + // to: + // ab|cj|kl + // de|fm|no + // gh|ip|qr + uint4 block_abcd = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest], + xe_texture_load_source[block_offset_guest + 1]), + endian)); + // AB|--|-- + // --|--|-- + // --|--|-- + xe_texture_load_dest[block_offset_host] = block_abcd.xy; + uint4 block_efgh = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 2], + xe_texture_load_source[block_offset_guest + 3]), + endian)); + // ab|--|-- + // DE|--|-- + // GH|--|-- + xe_texture_load_dest[block_offset_host + elements_pitch_host] = + uint2(block_abcd.w, block_efgh.x); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host] = + block_efgh.zw; + uint4 block_ijkl = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 4], + xe_texture_load_source[block_offset_guest + 5]), + endian)); + // ab|CJ|KL + // de|--|-- + // gh|--|-- + xe_texture_load_dest[block_offset_host + 1] = + uint2(block_abcd.z, block_ijkl.y); + xe_texture_load_dest[block_offset_host + 2] = block_ijkl.zw; + uint4 block_mnop = XE_TEXTURE_LOAD_32BPB_TRANSFORM( + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 6], + xe_texture_load_source[block_offset_guest + 7]), + endian)); + // ab|cj|kl + // de|FM|NO + // gh|IP|-- + xe_texture_load_dest[block_offset_host + elements_pitch_host + 1] = + uint2(block_efgh.y, block_mnop.x); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 2] = + block_mnop.yz; + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 1] = + uint2(block_ijkl.x, block_mnop.w); + // ab|cj|kl + // de|fm|no + // gh|ip|QR + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 2] = + XE_TEXTURE_LOAD_32BPB_TRANSFORM(XeEndianSwap32( + xe_texture_load_source[block_offset_guest + 8], endian)); +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli index 44ecdea16..f655be57d 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb.hlsli @@ -5,9 +5,9 @@ RWBuffer xe_texture_load_dest : register(u0); [numthreads(4, 32, 1)] void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 packed 32-bit texels with the externally provided function - // (XE_TEXTURE_LOAD_32BPB_TO_64BPB) for converting to 64bpb - useful for - // expansion of hendeca (10:11:11 or 11:11:10) to unorm16/snorm16. + // 1 thread = 8 packed 32-bit texels with the externally provided uint4 -> 2x + // uint4 function (XE_TEXTURE_LOAD_32BPB_TO_64BPB) for converting to 64bpb - + // useful for expansion of hendeca (10:11:11 or 11:11:10) to unorm16/snorm16. uint3 block_index = xe_thread_id << uint3(3, 0, 0); [branch] if (any(block_index >= xe_texture_load_size_blocks)) { return; diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli index 26e73a3ab..067e9dc27 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_2x.hlsli @@ -5,9 +5,9 @@ RWBuffer xe_texture_load_dest : register(u0); [numthreads(4, 32, 1)] void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 packed 32-bit texels with the externally provided function - // (XE_TEXTURE_LOAD_32BPB_TO_64BPB) for converting to 64bpb - useful for - // expansion of hendeca (10:11:11 or 11:11:10) to unorm16/snorm16. + // 1 thread = 8 packed 32-bit texels with the externally provided uint4 -> 2x + // uint4 function (XE_TEXTURE_LOAD_32BPB_TO_64BPB) for converting to 64bpb - + // useful for expansion of hendeca (10:11:11 or 11:11:10) to unorm16/snorm16. uint3 block_index = xe_thread_id << uint3(3, 0, 0); [branch] if (any(block_index >= xe_texture_load_size_blocks)) { return; diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_3x.hlsli b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_3x.hlsli new file mode 100644 index 000000000..e041ba131 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_32bpb_64bpb_3x.hlsli @@ -0,0 +1,103 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(16, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 2 packed 32-bit texels with the externally provided uint -> + // uint2 function (XE_TEXTURE_LOAD_32BPB_TO_64BPB) for converting to 64bpb - + // useful for expansion of hendeca (10:11:11 or 11:11:10) to unorm16/snorm16. + uint3 block_index = xe_thread_id << uint3(1, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) << int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3, + xe_texture_load_host_pitch, 8u) + + xe_texture_load_host_base) >> 3; + int elements_pitch_host = xe_texture_load_host_pitch >> 3; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) * 9) >> 3; + uint endian = XeTextureLoadEndian32(); + // abc jkl + // def mno + // ghi pqr + // from: + // ab|cd|ef|gh|ij|kl|mn|op|qr + // to: + // abcjkl + // defmno + // ghipqr + // Loading: + // ABC--- + // D----- + // ------ + uint4 block_abcd = + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest], + xe_texture_load_source[block_offset_guest + 1]), + endian); + xe_texture_load_dest[block_offset_host] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_abcd.x); + xe_texture_load_dest[block_offset_host + 1] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_abcd.y); + xe_texture_load_dest[block_offset_host + 2] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_abcd.z); + xe_texture_load_dest[block_offset_host + elements_pitch_host] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_abcd.w); + // abc--- + // dEF--- + // GH---- + uint4 block_efgh = + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 2], + xe_texture_load_source[block_offset_guest + 3]), + endian); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 1] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_efgh.x); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 2] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_efgh.y); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_efgh.z); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 1] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_efgh.w); + // abcJKL + // def--- + // ghI--- + uint4 block_ijkl = + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 4], + xe_texture_load_source[block_offset_guest + 5]), + endian); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 2] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_ijkl.x); + xe_texture_load_dest[block_offset_host + 3] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_ijkl.y); + xe_texture_load_dest[block_offset_host + 4] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_ijkl.z); + xe_texture_load_dest[block_offset_host + 5] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_ijkl.w); + // abcjkl + // defMNO + // ghiP-- + uint4 block_mnop = + XeEndianSwap32(uint4(xe_texture_load_source[block_offset_guest + 6], + xe_texture_load_source[block_offset_guest + 7]), + endian); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 3] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_mnop.x); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 4] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_mnop.y); + xe_texture_load_dest[block_offset_host + elements_pitch_host + 5] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_mnop.z); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 3] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_mnop.w); + // abcjkl + // defmno + // ghipQR + uint2 block_qr = + XeEndianSwap32(xe_texture_load_source[block_offset_guest + 8], endian); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 4] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_qr.x); + xe_texture_load_dest[block_offset_host + 2 * elements_pitch_host + 5] = + XE_TEXTURE_LOAD_32BPB_TO_64BPB(block_qr.y); +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_64bpb_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_64bpb_3x.cs.hlsl new file mode 100644 index 000000000..5d1beab90 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_64bpb_3x.cs.hlsl @@ -0,0 +1,38 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(8, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 4 blocks. + uint3 block_index = xe_thread_id << uint3(2, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) * int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3u, + xe_texture_load_host_pitch, 8u) + + xe_texture_load_host_base) >> 3; + int elements_pitch_host = xe_texture_load_host_pitch >> 3; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 8u, 3u) * 9) >> 3; + uint endian = XeTextureLoadEndian32(); + int p, y, x; + [unroll] for (p = 0; p < 4; ++p) { + if (p == 2 && XeTextureLoadIsTiled()) { + // Odd 2 blocks start = even 2 blocks end + 16 guest bytes when tiled. + block_offset_guest += (16 * 9) >> 3; + } + int block_row_offset_host = block_offset_host; + [unroll] for (y = 0; y < 3; ++y) { + [unroll] for (x = 0; x < 3; ++x) { + xe_texture_load_dest[block_row_offset_host + x] = XeEndianSwap32( + xe_texture_load_source[block_offset_guest++], endian); + } + block_row_offset_host += elements_pitch_host; + } + block_offset_host += 3; + } +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_8bpb_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_8bpb_3x.cs.hlsl new file mode 100644 index 000000000..1f25c9efb --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_8bpb_3x.cs.hlsl @@ -0,0 +1,121 @@ +#include "texture_load.hlsli" + +Buffer xe_texture_load_source : register(t0); +RWBuffer xe_texture_load_dest : register(u0); + +[numthreads(2, 32, 1)] +void main(uint3 xe_thread_id : SV_DispatchThreadID) { + // 1 thread = 16 blocks. + uint3 block_index = xe_thread_id << uint3(4, 0, 0); + [branch] if (any(block_index >= xe_texture_load_size_blocks)) { + return; + } + int block_offset_host = + (XeTextureHostLinearOffset(int3(block_index) * int3(3, 3, 1), + xe_texture_load_size_blocks.y * 3, + xe_texture_load_host_pitch, 1u) + + xe_texture_load_host_base) >> 3; + int elements_pitch_host = xe_texture_load_host_pitch >> 3; + int block_offset_guest = + (XeTextureLoadGuestBlockOffset(int3(block_index), 1u, 0u) * 9) >> 3; + int i; + [unroll] for (i = 0; i < 2; ++i) { + if (i) { + block_offset_host += 3; + // Odd 8 blocks start = even 8 blocks end + 56 guest bytes when tiled. + if (XeTextureLoadIsTiled()) { + block_offset_guest += (56 * 9) >> 3; + } + } + // For guest pixels 0...3 and host pixels a...i within them: + // 0a0b0c0d0e0f0g0h0i1a1b1c1d1e1f1g1h1i2a2b2c2d2e2f2g2h2i3a3b3c3d3e3f3g3h3i- + // 4a4b4c4d4e4f4g4h4i5a5b5c5d5e5f5g5h5i6a6b6c6d6e6f6g6h6i7a7b7c7d7e7f7g7h7i + // to: + // 0a0b0c1a 1b1c2a2b 2c3a3b3c 4a4b4c5a 5b5c6a6b 6c7a7b7c + // 0d0e0f1d 1e1f2d2e 2f3d3e3f 4d4e4f5d 5e5f6d6e 6f7d7e7f + // 0g0h0i1g 1h1i2g2h 2i3g3h3i 4g4h4i5g 5h5i6g6h 6i7g7h7i + uint2 blocks_0a0b0c0d_0e0f0g0h = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_0i1a1b1c_1d1e1f1g = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_1h1i2a2b_2c2d2e2f = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_2g2h2i3a_3b3c3d3e = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_3f3g3h3i_4a4b4c4d = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_4e4f4g4h_4i5a5b5c = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_5d5e5f5g_5h5i6a6b = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_6c6d6e6f_6g6h6i7a = + xe_texture_load_source[block_offset_guest++]; + uint2 blocks_7b7c7d7e_7f7g7h7i = + xe_texture_load_source[block_offset_guest++]; + // R0+0 = 0a0b0c1a, 1b1c2a2b + int block_row_offset_host = block_offset_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + (blocks_0a0b0c0d_0e0f0g0h.x & 0x00FFFFFFu) | + ((blocks_0i1a1b1c_1d1e1f1g.x >> 8u) << 24u), + (blocks_0i1a1b1c_1d1e1f1g.x >> 16u) | + (blocks_1h1i2a2b_2c2d2e2f.x & 0xFFFF0000u)); + // R0+1 = 2c3a3b3c, 4a4b4c5a + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + (blocks_1h1i2a2b_2c2d2e2f.y & 0x000000FFu) | + ((blocks_2g2h2i3a_3b3c3d3e.x >> 24u) << 8u) | + (blocks_2g2h2i3a_3b3c3d3e.y << 16u), + (blocks_3f3g3h3i_4a4b4c4d.y & 0x00FFFFFFu) | + ((blocks_4e4f4g4h_4i5a5b5c.y >> 8u) << 24u)); + // R0+2 = 5b5c6a6b, 6c7a7b7c + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + (blocks_4e4f4g4h_4i5a5b5c.y >> 16u) | + (blocks_5d5e5f5g_5h5i6a6b.y & 0xFFFF0000u), + (blocks_6c6d6e6f_6g6h6i7a.x & 0x000000FFu) | + ((blocks_6c6d6e6f_6g6h6i7a.y >> 24u) << 8u) | + (blocks_7b7c7d7e_7f7g7h7i.x << 16u)); + // R1+0 = 0d0e0f1d, 1e1f2d2e + block_row_offset_host += elements_pitch_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + (blocks_0a0b0c0d_0e0f0g0h.x >> 24u) | + ((blocks_0a0b0c0d_0e0f0g0h.y << 16u) >> 8u) | + (blocks_0i1a1b1c_1d1e1f1g.y << 24u), + ((blocks_0i1a1b1c_1d1e1f1g.y << 8u) >> 16u) | + ((blocks_1h1i2a2b_2c2d2e2f.y >> 8u) << 16u)); + // R1+1 = 2f3d3e3f, 4d4e4f5d + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + (blocks_1h1i2a2b_2c2d2e2f.y >> 24u) | + ((blocks_2g2h2i3a_3b3c3d3e.y >> 16u) << 8u) | + (blocks_3f3g3h3i_4a4b4c4d.x << 24u), + (blocks_3f3g3h3i_4a4b4c4d.y >> 24u) | + ((blocks_4e4f4g4h_4i5a5b5c.x << 16u) >> 8u) | + (blocks_5d5e5f5g_5h5i6a6b.x << 24u)); + // R1+2 = 5e5f6d6e, 6f7d7e7f + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + ((blocks_5d5e5f5g_5h5i6a6b.x << 8u) >> 16u) | + ((blocks_6c6d6e6f_6g6h6i7a.x >> 8u) << 16u), + (blocks_6c6d6e6f_6g6h6i7a.x >> 24u) | + ((blocks_7b7c7d7e_7f7g7h7i.x >> 16u) << 8u) | + (blocks_7b7c7d7e_7f7g7h7i.x << 24u)); + // R2+0 = 0g0h0i1g, 1h1i2g2h + block_row_offset_host += elements_pitch_host; + xe_texture_load_dest[block_row_offset_host] = uint2( + (blocks_0a0b0c0d_0e0f0g0h.y >> 16u) | + ((blocks_0i1a1b1c_1d1e1f1g.x << 24u) >> 8u) | + (blocks_0i1a1b1c_1d1e1f1g.y & 0xFF000000u), + (blocks_1h1i2a2b_2c2d2e2f.x & 0x0000FFFFu) | + (blocks_2g2h2i3a_3b3c3d3e.x << 16u)); + // R2+1 = 2i3g3h3i, 4g4h4i5g + xe_texture_load_dest[block_row_offset_host + 1] = uint2( + ((blocks_2g2h2i3a_3b3c3d3e.x << 8u) >> 24u) | + (blocks_3f3g3h3i_4a4b4c4d.x & 0xFFFFFF00u), + (blocks_4e4f4g4h_4i5a5b5c.x >> 16u) | + ((blocks_4e4f4g4h_4i5a5b5c.y << 24u) >> 8u) | + (blocks_5d5e5f5g_5h5i6a6b.x & 0xFF000000u)); + // R2+2 = 5h5i6g6h, 6i7g7h7i + xe_texture_load_dest[block_row_offset_host + 2] = uint2( + (blocks_5d5e5f5g_5h5i6a6b.y & 0x0000FFFFu) | + (blocks_6c6d6e6f_6g6h6i7a.y << 16u), + ((blocks_6c6d6e6f_6g6h6i7a.y << 8u) >> 24u) | + (blocks_7b7c7d7e_7f7g7h7i.y & 0xFFFFFF00u)); + } +} diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl index da3c753d9..2dcd17d22 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float.cs.hlsl @@ -1,33 +1,4 @@ #include "pixel_formats.hlsli" -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 depth texels, 24-bit float depth converted to 32-bit, can't - // read stencil in shaders anyway because it would require a separate - // DXGI_FORMAT_X32_TYPELESS_G8X24_UINT SRV. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index), - xe_texture_load_size_blocks.y, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> 4; - uint endian = XeTextureLoadEndian32(); - xe_texture_load_dest[block_offset_host] = - XeFloat20e4To32(XeEndianSwap32(xe_texture_load_source[block_offset_guest], - endian) >> 8); - ++block_offset_host; - // Odd 4 blocks = even 4 blocks + 32 bytes when tiled. - block_offset_guest += XeTextureLoadIsTiled() ? 2 : 1; - xe_texture_load_dest[block_offset_host] = - XeFloat20e4To32(XeEndianSwap32(xe_texture_load_source[block_offset_guest], - endian) >> 8); -} +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (XeFloat20e4To32((blocks) >> 8u)) +#include "texture_load_32bpb.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl index fb3c12a3a..58470b446 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_2x.cs.hlsl @@ -1,42 +1,4 @@ #include "pixel_formats.hlsli" -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 depth texels, 24-bit float depth converted to 32-bit, can't - // read stencil in shaders anyway because it would require a separate - // DXGI_FORMAT_X32_TYPELESS_G8X24_UINT SRV. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index) << int3(1, 1, 0), - xe_texture_load_size_blocks.y << 1, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int elements_pitch_host = xe_texture_load_host_pitch >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> (4 - 2); - uint endian = XeTextureLoadEndian32(); - int i; - [unroll] for (i = 0; i < 8; i += 2) { - if (i == 4 && XeTextureLoadIsTiled()) { - // Odd 4 blocks start = even 4 blocks end + 16 guest bytes when tiled. - block_offset_guest += 1 << 2; - } - // TTBB TTBB -> TTTT on the top row, BBBB on the bottom row. - uint4 block_0 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - uint4 block_1 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - xe_texture_load_dest[block_offset_host] = - XeFloat20e4To32(uint4(block_0.xy, block_1.xy) >> 8); - xe_texture_load_dest[block_offset_host + elements_pitch_host] = - XeFloat20e4To32(uint4(block_0.zw, block_1.zw) >> 8); - ++block_offset_host; - } -} +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (XeFloat20e4To32((blocks) >> 8u)) +#include "texture_load_32bpb_2x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_3x.cs.hlsl new file mode 100644 index 000000000..9065cf628 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_float_3x.cs.hlsl @@ -0,0 +1,4 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (XeFloat20e4To32((blocks) >> 8u)) +#include "texture_load_32bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl index d0086397e..7272b3c82 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm.cs.hlsl @@ -1,32 +1,4 @@ -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 depth texels, 24-bit unorm depth converted to 32-bit, can't - // read stencil in shaders anyway because it would require a separate - // DXGI_FORMAT_X32_TYPELESS_G8X24_UINT SRV. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index), - xe_texture_load_size_blocks.y, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> 4; - uint endian = XeTextureLoadEndian32(); - xe_texture_load_dest[block_offset_host] = asuint( - float4(XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian) - >> 8) / 16777215.0); - ++block_offset_host; - // Odd 4 blocks = even 4 blocks + 32 bytes when tiled. - block_offset_guest += XeTextureLoadIsTiled() ? 2 : 1; - xe_texture_load_dest[block_offset_host] = asuint( - float4(XeEndianSwap32(xe_texture_load_source[block_offset_guest], endian) - >> 8) / 16777215.0); -} +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (asuint(XeUNorm24To32((blocks) >> 8u))) +#include "texture_load_32bpb.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl index 078aae081..83bda5889 100644 --- a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_2x.cs.hlsl @@ -1,41 +1,4 @@ -#include "texture_load.hlsli" - -Buffer xe_texture_load_source : register(t0); -RWBuffer xe_texture_load_dest : register(u0); - -[numthreads(4, 32, 1)] -void main(uint3 xe_thread_id : SV_DispatchThreadID) { - // 1 thread = 8 depth texels, 24-bit unorm depth converted to 32-bit, can't - // read stencil in shaders anyway because it would require a separate - // DXGI_FORMAT_X32_TYPELESS_G8X24_UINT SRV. - uint3 block_index = xe_thread_id << uint3(3, 0, 0); - [branch] if (any(block_index >= xe_texture_load_size_blocks)) { - return; - } - int block_offset_host = - (XeTextureHostLinearOffset(int3(block_index) << int3(1, 1, 0), - xe_texture_load_size_blocks.y << 1, - xe_texture_load_host_pitch, 4u) + - xe_texture_load_host_base) >> 4; - int elements_pitch_host = xe_texture_load_host_pitch >> 4; - int block_offset_guest = - XeTextureLoadGuestBlockOffset(int3(block_index), 4u, 2u) >> (4 - 2); - uint endian = XeTextureLoadEndian32(); - int i; - [unroll] for (i = 0; i < 8; i += 2) { - if (i == 4 && XeTextureLoadIsTiled()) { - // Odd 4 blocks start = even 4 blocks end + 16 guest bytes when tiled. - block_offset_guest += 1 << 2; - } - // TTBB TTBB -> TTTT on the top row, BBBB on the bottom row. - uint4 block_0 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - uint4 block_1 = XeEndianSwap32(xe_texture_load_source[block_offset_guest++], - endian); - xe_texture_load_dest[block_offset_host] = - asuint(float4(uint4(block_0.xy, block_1.xy) >> 8) / 16777215.0); - xe_texture_load_dest[block_offset_host + elements_pitch_host] = - asuint(float4(uint4(block_0.zw, block_1.zw) >> 8) / 16777215.0); - ++block_offset_host; - } -} +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (asuint(XeUNorm24To32((blocks) >> 8u))) +#include "texture_load_32bpb_2x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_3x.cs.hlsl new file mode 100644 index 000000000..d46bc1ff5 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_depth_unorm_3x.cs.hlsl @@ -0,0 +1,4 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TRANSFORM(blocks) \ + (asuint(XeUNorm24To32((blocks) >> 8u))) +#include "texture_load_32bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl new file mode 100644 index 000000000..f1ee0d447 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TO_64BPB XeR10G11B11UNormToRGBA16 +#include "texture_load_32bpb_64bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl new file mode 100644 index 000000000..e82276207 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r10g11b11_rgba16_snorm_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TO_64BPB XeR10G11B11SNormToRGBA16 +#include "texture_load_32bpb_64bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl new file mode 100644 index 000000000..235d334f3 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TO_64BPB XeR11G11B10UNormToRGBA16 +#include "texture_load_32bpb_64bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl new file mode 100644 index 000000000..d8abc758a --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r11g11b10_rgba16_snorm_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_32BPB_TO_64BPB XeR11G11B10SNormToRGBA16 +#include "texture_load_32bpb_64bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl new file mode 100644 index 000000000..a6fade1e7 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r4g4b4a4_b4g4r4a4_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_16BPB_TRANSFORM XeR4G4B4A4ToB4G4R4A4 +#include "texture_load_16bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl new file mode 100644 index 000000000..9aa51b3c1 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b5a1_b5g5r5a1_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_16BPB_TRANSFORM XeR5G5B5A1ToB5G5R5A1 +#include "texture_load_16bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl new file mode 100644 index 000000000..eb3fc2727 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_16BPB_TRANSFORM XeR5G5B6ToB5G6R5WithRBGASwizzle +#include "texture_load_16bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl b/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl new file mode 100644 index 000000000..18954c8b0 --- /dev/null +++ b/src/xenia/gpu/d3d12/shaders/texture_load_r5g6b5_b5g6r5_3x.cs.hlsl @@ -0,0 +1,3 @@ +#include "pixel_formats.hlsli" +#define XE_TEXTURE_LOAD_16BPB_TRANSFORM XeR5G6B5ToB5G6R5 +#include "texture_load_16bpb_3x.hlsli" diff --git a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli b/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli index 98c5f26ed..1a9ecf4e6 100644 --- a/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli +++ b/src/xenia/gpu/d3d12/shaders/xenos_draw.hlsli @@ -23,15 +23,13 @@ cbuffer xe_system_cbuffer : register(b0) { uint4 xe_texture_swizzled_signs[2]; + uint xe_textures_resolved; uint2 xe_sample_count_log2; float xe_alpha_test_reference; - uint xe_alpha_to_mask; float4 xe_color_exp_bias; - uint4 xe_color_output_map; - - uint xe_edram_resolution_square_scale; + uint xe_alpha_to_mask; uint xe_edram_pitch_tiles; float2 xe_edram_depth_range; diff --git a/src/xenia/gpu/d3d12/texture_cache.cc b/src/xenia/gpu/d3d12/texture_cache.cc index 8541aff6b..25e88ff7d 100644 --- a/src/xenia/gpu/d3d12/texture_cache.cc +++ b/src/xenia/gpu/d3d12/texture_cache.cc @@ -10,6 +10,7 @@ #include "xenia/gpu/d3d12/texture_cache.h" #include +#include #include #include @@ -21,32 +22,38 @@ #include "xenia/base/profiling.h" #include "xenia/base/xxhash.h" #include "xenia/gpu/d3d12/d3d12_command_processor.h" +#include "xenia/gpu/d3d12/d3d12_shared_memory.h" #include "xenia/gpu/gpu_flags.h" #include "xenia/gpu/texture_info.h" #include "xenia/gpu/texture_util.h" #include "xenia/ui/d3d12/d3d12_upload_buffer_pool.h" #include "xenia/ui/d3d12/d3d12_util.h" -DEFINE_int32(d3d12_resolution_scale, 1, - "Scale of rendering width and height (currently only 1 and 2 " - "are available).", - "D3D12"); -DEFINE_int32(d3d12_texture_cache_limit_soft, 384, - "Maximum host texture memory usage (in megabytes) above which old " - "textures will be destroyed (lifetime configured with " - "d3d12_texture_cache_limit_soft_lifetime). If using 2x resolution " - "scale, 1.25x of this is used.", - "D3D12"); -DEFINE_int32(d3d12_texture_cache_limit_soft_lifetime, 30, - "Seconds a texture should be unused to be considered old enough " - "to be deleted if texture memory usage exceeds " - "d3d12_texture_cache_limit_soft.", - "D3D12"); -DEFINE_int32(d3d12_texture_cache_limit_hard, 768, - "Maximum host texture memory usage (in megabytes) above which " - "textures will be destroyed as soon as possible. If using 2x " - "resolution scale, 1.25x of this is used.", - "D3D12"); +DEFINE_uint32( + texture_cache_memory_limit_soft, 384, + "Maximum host texture memory usage (in megabytes) above which old textures " + "will be destroyed.", + "GPU"); +DEFINE_uint32( + texture_cache_memory_limit_soft_lifetime, 30, + "Seconds a texture should be unused to be considered old enough to be " + "deleted if texture memory usage exceeds texture_cache_memory_limit_soft.", + "GPU"); +DEFINE_uint32( + texture_cache_memory_limit_hard, 768, + "Maximum host texture memory usage (in megabytes) above which textures " + "will be destroyed as soon as possible.", + "GPU"); +DEFINE_uint32( + texture_cache_memory_limit_render_to_texture, 24, + "Part of the host texture memory budget (in megabytes) that will be scaled " + "by the current drawing resolution scale.\n" + "If texture_cache_memory_limit_soft, for instance, is 384, and this is 24, " + "it will be assumed that the game will be using roughly 24 MB of " + "render-to-texture (resolve) targets and 384 - 24 = 360 MB of regular " + "textures - so with 2x resolution scaling, the soft limit will be 360 + 96 " + "MB, and with 3x, it will be 360 + 216 MB.", + "GPU"); namespace xe { namespace gpu { @@ -54,19 +61,26 @@ namespace d3d12 { // Generated with `xb buildhlsl`. #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_128bpb_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_16bpb_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_32bpb_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_64bpb_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_8bpb_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_ctx1_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_float_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_depth_unorm_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxn_rg8_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt1_rgba8_cs.h" @@ -76,20 +90,28 @@ namespace d3d12 { #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5_rgba8_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_dxt5a_r8_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r10g11b11_rgba16_snorm_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r11g11b10_rgba16_snorm_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r4g4b4a4_b4g4r4a4_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b5a1_b5g5r5a1_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_2x_cs.h" +#include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_3x_cs.h" #include "xenia/gpu/d3d12/shaders/dxbc/texture_load_r5g6b5_b5g6r5_cs.h" // For formats with less than 4 components, assuming the last component is @@ -765,112 +787,150 @@ const char* const TextureCache::dimension_names_[4] = {"1D", "2D", "3D", "cube"}; const TextureCache::LoadModeInfo TextureCache::load_mode_info_[] = { - {texture_load_8bpb_cs, sizeof(texture_load_8bpb_cs), 3, 4, - texture_load_8bpb_2x_cs, sizeof(texture_load_8bpb_2x_cs), 4, 4}, - {texture_load_16bpb_cs, sizeof(texture_load_16bpb_cs), 4, 4, - texture_load_16bpb_2x_cs, sizeof(texture_load_16bpb_2x_cs), 4, 4}, - {texture_load_32bpb_cs, sizeof(texture_load_32bpb_cs), 4, 4, - texture_load_32bpb_2x_cs, sizeof(texture_load_32bpb_2x_cs), 4, 4}, - {texture_load_64bpb_cs, sizeof(texture_load_64bpb_cs), 4, 4, - texture_load_64bpb_2x_cs, sizeof(texture_load_64bpb_2x_cs), 4, 4}, - {texture_load_128bpb_cs, sizeof(texture_load_128bpb_cs), 4, 4, - texture_load_128bpb_2x_cs, sizeof(texture_load_128bpb_2x_cs), 4, 4}, - {texture_load_r5g5b5a1_b5g5r5a1_cs, - sizeof(texture_load_r5g5b5a1_b5g5r5a1_cs), 4, 4, - texture_load_r5g5b5a1_b5g5r5a1_2x_cs, - sizeof(texture_load_r5g5b5a1_b5g5r5a1_2x_cs), 4, 4}, - {texture_load_r5g6b5_b5g6r5_cs, sizeof(texture_load_r5g6b5_b5g6r5_cs), 4, 4, - texture_load_r5g6b5_b5g6r5_2x_cs, sizeof(texture_load_r5g6b5_b5g6r5_2x_cs), - 4, 4}, - {texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs, - sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs), 4, 4, - texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs, - sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs), 4, 4}, - {texture_load_r4g4b4a4_b4g4r4a4_cs, - sizeof(texture_load_r4g4b4a4_b4g4r4a4_cs), 4, 4, - texture_load_r4g4b4a4_b4g4r4a4_2x_cs, - sizeof(texture_load_r4g4b4a4_b4g4r4a4_2x_cs), 4, 4}, - {texture_load_r10g11b11_rgba16_cs, sizeof(texture_load_r10g11b11_rgba16_cs), - 4, 4, texture_load_r10g11b11_rgba16_2x_cs, - sizeof(texture_load_r10g11b11_rgba16_2x_cs), 4, 4}, - {texture_load_r10g11b11_rgba16_snorm_cs, - sizeof(texture_load_r10g11b11_rgba16_snorm_cs), 4, 4, - texture_load_r10g11b11_rgba16_snorm_2x_cs, - sizeof(texture_load_r10g11b11_rgba16_snorm_2x_cs), 4, 4}, - {texture_load_r11g11b10_rgba16_cs, sizeof(texture_load_r11g11b10_rgba16_cs), - 4, 4, texture_load_r11g11b10_rgba16_2x_cs, - sizeof(texture_load_r11g11b10_rgba16_2x_cs), 4, 4}, - {texture_load_r11g11b10_rgba16_snorm_cs, - sizeof(texture_load_r11g11b10_rgba16_snorm_cs), 4, 4, - texture_load_r11g11b10_rgba16_snorm_2x_cs, - sizeof(texture_load_r11g11b10_rgba16_snorm_2x_cs), 4, 4}, - {texture_load_dxt1_rgba8_cs, sizeof(texture_load_dxt1_rgba8_cs), 4, 4, - nullptr, 0, 4, 4}, - {texture_load_dxt3_rgba8_cs, sizeof(texture_load_dxt3_rgba8_cs), 4, 4, - nullptr, 0, 4, 4}, - {texture_load_dxt5_rgba8_cs, sizeof(texture_load_dxt5_rgba8_cs), 4, 4, - nullptr, 0, 4, 4}, - {texture_load_dxn_rg8_cs, sizeof(texture_load_dxn_rg8_cs), 4, 4, nullptr, 0, - 4, 4}, - {texture_load_dxt3a_cs, sizeof(texture_load_dxt3a_cs), 4, 4, nullptr, 0, 4, - 4}, - {texture_load_dxt3aas1111_cs, sizeof(texture_load_dxt3aas1111_cs), 4, 4, - nullptr, 0, 4, 4}, - {texture_load_dxt5a_r8_cs, sizeof(texture_load_dxt5a_r8_cs), 4, 4, nullptr, - 0, 4, 4}, - {texture_load_ctx1_cs, sizeof(texture_load_ctx1_cs), 4, 4, nullptr, 0, 4, - 4}, - {texture_load_depth_unorm_cs, sizeof(texture_load_depth_unorm_cs), 4, 4, - texture_load_depth_unorm_2x_cs, sizeof(texture_load_depth_unorm_2x_cs), 4, - 4}, - {texture_load_depth_float_cs, sizeof(texture_load_depth_float_cs), 4, 4, - texture_load_depth_float_2x_cs, sizeof(texture_load_depth_float_2x_cs), 4, - 4}, + {{{texture_load_8bpb_cs, sizeof(texture_load_8bpb_cs), 3, 4, 16}, + {texture_load_8bpb_2x_cs, sizeof(texture_load_8bpb_2x_cs), 4, 4, 16 * 2}, + {texture_load_8bpb_3x_cs, sizeof(texture_load_8bpb_3x_cs), 3, 3, + 16 * 3}}}, + {{{texture_load_16bpb_cs, sizeof(texture_load_16bpb_cs), 4, 4, 16}, + {texture_load_16bpb_2x_cs, sizeof(texture_load_16bpb_2x_cs), 4, 4, + 16 * 2}, + {texture_load_16bpb_3x_cs, sizeof(texture_load_16bpb_3x_cs), 3, 3, + 16 * 3}}}, + {{{texture_load_32bpb_cs, sizeof(texture_load_32bpb_cs), 4, 4, 8}, + {texture_load_32bpb_2x_cs, sizeof(texture_load_32bpb_2x_cs), 4, 4, 8 * 2}, + {texture_load_32bpb_3x_cs, sizeof(texture_load_32bpb_3x_cs), 3, 3, + 2 * 3}}}, + {{{texture_load_64bpb_cs, sizeof(texture_load_64bpb_cs), 4, 4, 4}, + {texture_load_64bpb_2x_cs, sizeof(texture_load_64bpb_2x_cs), 4, 4, 4 * 2}, + {texture_load_64bpb_3x_cs, sizeof(texture_load_64bpb_3x_cs), 3, 3, + 4 * 3}}}, + {{{texture_load_128bpb_cs, sizeof(texture_load_128bpb_cs), 4, 4, 2}, + {texture_load_128bpb_2x_cs, sizeof(texture_load_128bpb_2x_cs), 4, 4, + 2 * 2}, + {texture_load_128bpb_3x_cs, sizeof(texture_load_128bpb_3x_cs), 4, 4, + 2 * 3}}}, + {{{texture_load_r5g5b5a1_b5g5r5a1_cs, + sizeof(texture_load_r5g5b5a1_b5g5r5a1_cs), 4, 4, 16}, + {texture_load_r5g5b5a1_b5g5r5a1_2x_cs, + sizeof(texture_load_r5g5b5a1_b5g5r5a1_2x_cs), 4, 4, 16 * 2}, + {texture_load_r5g5b5a1_b5g5r5a1_3x_cs, + sizeof(texture_load_r5g5b5a1_b5g5r5a1_3x_cs), 3, 3, 16 * 3}}}, + {{{texture_load_r5g6b5_b5g6r5_cs, sizeof(texture_load_r5g6b5_b5g6r5_cs), 4, + 4, 16}, + {texture_load_r5g6b5_b5g6r5_2x_cs, + sizeof(texture_load_r5g6b5_b5g6r5_2x_cs), 4, 4, 16 * 2}, + {texture_load_r5g6b5_b5g6r5_3x_cs, + sizeof(texture_load_r5g6b5_b5g6r5_3x_cs), 3, 3, 16 * 3}}}, + {{{texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs, + sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_cs), 4, 4, 16}, + {texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs, + sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_2x_cs), 4, 4, 16 * 2}, + {texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs, + sizeof(texture_load_r5g5b6_b5g6r5_swizzle_rbga_3x_cs), 3, 3, 16 * 3}}}, + {{{texture_load_r4g4b4a4_b4g4r4a4_cs, + sizeof(texture_load_r4g4b4a4_b4g4r4a4_cs), 4, 4, 16}, + {texture_load_r4g4b4a4_b4g4r4a4_2x_cs, + sizeof(texture_load_r4g4b4a4_b4g4r4a4_2x_cs), 4, 4, 16 * 2}, + {texture_load_r4g4b4a4_b4g4r4a4_3x_cs, + sizeof(texture_load_r4g4b4a4_b4g4r4a4_3x_cs), 3, 3, 16 * 3}}}, + {{{texture_load_r10g11b11_rgba16_cs, + sizeof(texture_load_r10g11b11_rgba16_cs), 4, 4, 8}, + {texture_load_r10g11b11_rgba16_2x_cs, + sizeof(texture_load_r10g11b11_rgba16_2x_cs), 4, 4, 8 * 2}, + {texture_load_r10g11b11_rgba16_3x_cs, + sizeof(texture_load_r10g11b11_rgba16_3x_cs), 3, 3, 2 * 3}}}, + {{{texture_load_r10g11b11_rgba16_snorm_cs, + sizeof(texture_load_r10g11b11_rgba16_snorm_cs), 4, 4, 8}, + {texture_load_r10g11b11_rgba16_snorm_2x_cs, + sizeof(texture_load_r10g11b11_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, + {texture_load_r10g11b11_rgba16_snorm_3x_cs, + sizeof(texture_load_r10g11b11_rgba16_snorm_3x_cs), 3, 3, 2 * 3}}}, + {{{texture_load_r11g11b10_rgba16_cs, + sizeof(texture_load_r11g11b10_rgba16_cs), 4, 4, 8}, + {texture_load_r11g11b10_rgba16_2x_cs, + sizeof(texture_load_r11g11b10_rgba16_2x_cs), 4, 4, 8 * 2}, + {texture_load_r11g11b10_rgba16_3x_cs, + sizeof(texture_load_r11g11b10_rgba16_3x_cs), 3, 3, 2 * 3}}}, + {{{texture_load_r11g11b10_rgba16_snorm_cs, + sizeof(texture_load_r11g11b10_rgba16_snorm_cs), 4, 4, 8}, + {texture_load_r11g11b10_rgba16_snorm_2x_cs, + sizeof(texture_load_r11g11b10_rgba16_snorm_2x_cs), 4, 4, 8 * 2}, + {texture_load_r11g11b10_rgba16_snorm_3x_cs, + sizeof(texture_load_r11g11b10_rgba16_snorm_3x_cs), 3, 3, 2 * 3}}}, + {{{texture_load_dxt1_rgba8_cs, sizeof(texture_load_dxt1_rgba8_cs), 4, 4, 4}, + {}, + {}}}, + {{{texture_load_dxt3_rgba8_cs, sizeof(texture_load_dxt3_rgba8_cs), 4, 4, 2}, + {}, + {}}}, + {{{texture_load_dxt5_rgba8_cs, sizeof(texture_load_dxt5_rgba8_cs), 4, 4, 2}, + {}, + {}}}, + {{{texture_load_dxn_rg8_cs, sizeof(texture_load_dxn_rg8_cs), 4, 4, 2}, + {}, + {}}}, + {{{texture_load_dxt3a_cs, sizeof(texture_load_dxt3a_cs), 4, 4, 4}, {}, {}}}, + {{{texture_load_dxt3aas1111_cs, sizeof(texture_load_dxt3aas1111_cs), 4, 4, + 4}, + {}, + {}}}, + {{{texture_load_dxt5a_r8_cs, sizeof(texture_load_dxt5a_r8_cs), 4, 4, 4}, + {}, + {}}}, + {{{texture_load_ctx1_cs, sizeof(texture_load_ctx1_cs), 4, 4, 4}, {}, {}}}, + {{{texture_load_depth_unorm_cs, sizeof(texture_load_depth_unorm_cs), 4, 4, + 8}, + {texture_load_depth_unorm_2x_cs, sizeof(texture_load_depth_unorm_2x_cs), + 4, 4, 8 * 2}, + {texture_load_depth_unorm_3x_cs, sizeof(texture_load_depth_unorm_3x_cs), + 3, 3, 2 * 3}}}, + {{{texture_load_depth_float_cs, sizeof(texture_load_depth_float_cs), 4, 4, + 8}, + {texture_load_depth_float_2x_cs, sizeof(texture_load_depth_float_2x_cs), + 4, 4, 8 * 2}, + {texture_load_depth_float_3x_cs, sizeof(texture_load_depth_float_3x_cs), + 3, 3, 2 * 3}}}, }; TextureCache::TextureCache(D3D12CommandProcessor& command_processor, const RegisterFile& register_file, + D3D12SharedMemory& shared_memory, bool bindless_resources_used, - D3D12SharedMemory& shared_memory) + uint32_t draw_resolution_scale) : command_processor_(command_processor), register_file_(register_file), + shared_memory_(shared_memory), bindless_resources_used_(bindless_resources_used), - shared_memory_(shared_memory) {} + draw_resolution_scale_(draw_resolution_scale) { + assert_true(draw_resolution_scale >= 1); + assert_true(draw_resolution_scale <= 3); +} TextureCache::~TextureCache() { Shutdown(); } -bool TextureCache::Initialize(bool edram_rov_used) { +bool TextureCache::Initialize() { auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); auto device = provider.GetDevice(); - // Try to create the tiled buffer 2x resolution scaling. - // Not currently supported with the RTV/DSV output path for various reasons. - if (cvars::d3d12_resolution_scale >= 2 && edram_rov_used && - provider.GetTiledResourcesTier() != - D3D12_TILED_RESOURCES_TIER_NOT_SUPPORTED && - provider.GetVirtualAddressBitsPerResource() >= - kScaledResolveBufferSizeLog2) { - D3D12_RESOURCE_DESC scaled_resolve_buffer_desc; - ui::d3d12::util::FillBufferResourceDesc( - scaled_resolve_buffer_desc, kScaledResolveBufferSize, - D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS); - scaled_resolve_buffer_state_ = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; - if (FAILED(device->CreateReservedResource( - &scaled_resolve_buffer_desc, scaled_resolve_buffer_state_, nullptr, - IID_PPV_ARGS(&scaled_resolve_buffer_)))) { - XELOGE( - "Texture cache: Failed to create the 2 GB tiled buffer for 2x " - "resolution scale - switching to 1x"); - } - scaled_resolve_buffer_uav_writes_commit_needed_ = false; - const uint32_t scaled_resolve_page_dword_count = - (512 * 1024 * 1024) / 4096 / 32; - scaled_resolve_pages_ = new uint32_t[scaled_resolve_page_dword_count]; + if (draw_resolution_scale_ > 1) { + assert_true(draw_resolution_scale_ <= GetMaxDrawResolutionScale(provider)); + // Buffers not used yet - no need aliasing barriers to change ownership of + // gigabytes between even and odd buffers. + std::memset(scaled_resolve_1gb_buffer_indices_, UINT8_MAX, + sizeof(scaled_resolve_1gb_buffer_indices_)); + assert_true(scaled_resolve_heaps_.empty()); + uint64_t scaled_resolve_address_space_size = + uint64_t(SharedMemory::kBufferSize) * + (draw_resolution_scale_ * draw_resolution_scale_); + scaled_resolve_heaps_.resize(size_t(scaled_resolve_address_space_size >> + kScaledResolveHeapSizeLog2)); + constexpr uint32_t kScaledResolvePageDwordCount = + SharedMemory::kBufferSize / 4096 / 32; + scaled_resolve_pages_ = new uint32_t[kScaledResolvePageDwordCount]; std::memset(scaled_resolve_pages_, 0, - scaled_resolve_page_dword_count * sizeof(uint32_t)); + kScaledResolvePageDwordCount * sizeof(uint32_t)); std::memset(scaled_resolve_pages_l2_, 0, sizeof(scaled_resolve_pages_l2_)); } - std::memset(scaled_resolve_heaps_, 0, sizeof(scaled_resolve_heaps_)); scaled_resolve_heap_count_ = 0; // Create the loading root signature. @@ -912,7 +972,9 @@ bool TextureCache::Initialize(bool edram_rov_used) { load_root_signature_ = ui::d3d12::util::CreateRootSignature(provider, root_signature_desc); if (load_root_signature_ == nullptr) { - XELOGE("Failed to create the texture loading root signature"); + XELOGE( + "D3D12TextureCache: Failed to create the texture loading root " + "signature"); Shutdown(); return false; } @@ -921,23 +983,31 @@ bool TextureCache::Initialize(bool edram_rov_used) { for (uint32_t i = 0; i < uint32_t(LoadMode::kCount); ++i) { const LoadModeInfo& mode_info = load_mode_info_[i]; load_pipelines_[i] = ui::d3d12::util::CreateComputePipeline( - device, mode_info.shader, mode_info.shader_size, load_root_signature_); + device, mode_info.shaders[0].shader, mode_info.shaders[0].shader_size, + load_root_signature_); if (load_pipelines_[i] == nullptr) { - XELOGE("Failed to create the texture loading pipeline for mode {}", i); + XELOGE( + "D3D12TextureCache: Failed to create the texture loading pipeline " + "for mode {}", + i); Shutdown(); return false; } - if (IsResolutionScale2X() && mode_info.shader_2x != nullptr) { - load_pipelines_2x_[i] = ui::d3d12::util::CreateComputePipeline( - device, mode_info.shader_2x, mode_info.shader_2x_size, - load_root_signature_); - if (load_pipelines_2x_[i] == nullptr) { - XELOGE( - "Failed to create the 2x-scaled texture loading pipeline for mode " - "{}", - i); - Shutdown(); - return false; + if (draw_resolution_scale_ > 1) { + const LoadShaderInfo& scaled_load_shader_info = + mode_info.shaders[draw_resolution_scale_ - 1]; + if (scaled_load_shader_info.shader) { + load_pipelines_scaled_[i] = ui::d3d12::util::CreateComputePipeline( + device, scaled_load_shader_info.shader, + scaled_load_shader_info.shader_size, load_root_signature_); + if (load_pipelines_scaled_[i] == nullptr) { + XELOGE( + "D3D12TextureCache: Failed to create the resolution-scaled " + "texture loading pipeline for mode {}", + i); + Shutdown(); + return false; + } } } } @@ -956,7 +1026,9 @@ bool TextureCache::Initialize(bool edram_rov_used) { if (FAILED(device->CreateDescriptorHeap( &null_srv_descriptor_heap_desc, IID_PPV_ARGS(&null_srv_descriptor_heap_)))) { - XELOGE("Failed to create the descriptor heap for null SRVs"); + XELOGE( + "D3D12TextureCache: Failed to create the descriptor heap for null " + "SRVs"); Shutdown(); return false; } @@ -999,7 +1071,7 @@ bool TextureCache::Initialize(bool edram_rov_used) { provider.OffsetViewDescriptor(null_srv_descriptor_heap_start_, uint32_t(NullSRVDescriptorIndex::kCube))); - if (IsResolutionScale2X()) { + if (draw_resolution_scale_ > 1) { scaled_resolve_global_watch_handle_ = shared_memory_.RegisterGlobalWatch( ScaledResolveGlobalWatchCallbackThunk, this); } @@ -1020,7 +1092,7 @@ void TextureCache::Shutdown() { ui::d3d12::util::ReleaseAndNull(null_srv_descriptor_heap_); for (uint32_t i = 0; i < uint32_t(LoadMode::kCount); ++i) { - ui::d3d12::util::ReleaseAndNull(load_pipelines_2x_[i]); + ui::d3d12::util::ReleaseAndNull(load_pipelines_scaled_[i]); ui::d3d12::util::ReleaseAndNull(load_pipelines_[i]); } ui::d3d12::util::ReleaseAndNull(load_root_signature_); @@ -1029,11 +1101,21 @@ void TextureCache::Shutdown() { delete[] scaled_resolve_pages_; scaled_resolve_pages_ = nullptr; } - // First free the buffer to detach it from the heaps. - ui::d3d12::util::ReleaseAndNull(scaled_resolve_buffer_); - for (uint32_t i = 0; i < xe::countof(scaled_resolve_heaps_); ++i) { - ui::d3d12::util::ReleaseAndNull(scaled_resolve_heaps_[i]); + // First free the buffers to detach them from the heaps. + for (size_t i = 0; i < xe::countof(scaled_resolve_2gb_buffers_); ++i) { + ScaledResolveVirtualBuffer*& scaled_resolve_buffer = + scaled_resolve_2gb_buffers_[i]; + if (scaled_resolve_buffer) { + delete scaled_resolve_buffer; + scaled_resolve_buffer = nullptr; + } } + for (ID3D12Heap* scaled_resolve_heap : scaled_resolve_heaps_) { + if (scaled_resolve_heap) { + scaled_resolve_heap->Release(); + } + } + scaled_resolve_heaps_.clear(); scaled_resolve_heap_count_ = 0; COUNT_profile_set("gpu/texture_cache/scaled_resolve_buffer_used_mb", 0); } @@ -1074,6 +1156,22 @@ void TextureCache::TextureFetchConstantWritten(uint32_t index) { texture_bindings_in_sync_ &= ~(1u << index); } +void TextureCache::BeginSubmission() { + // ExecuteCommandLists is a full UAV and aliasing barrier. + if (draw_resolution_scale_ > 1) { + size_t scaled_resolve_buffer_count = GetScaledResolveBufferCount(); + for (size_t i = 0; i < scaled_resolve_buffer_count; ++i) { + ScaledResolveVirtualBuffer* scaled_resolve_buffer = + scaled_resolve_2gb_buffers_[i]; + if (scaled_resolve_buffer) { + scaled_resolve_buffer->ClearUAVBarrierPending(); + } + } + std::memset(scaled_resolve_1gb_buffer_indices_, UINT8_MAX, + sizeof(scaled_resolve_1gb_buffer_indices_)); + } +} + void TextureCache::BeginFrame() { // In case there was a failure creating something in the previous frame, make // sure bindings are reset so a new attempt will surely be made if the texture @@ -1087,14 +1185,18 @@ void TextureCache::BeginFrame() { // If memory usage is too high, destroy unused textures. uint64_t completed_frame = command_processor_.GetCompletedFrame(); - uint32_t limit_soft_mb = cvars::d3d12_texture_cache_limit_soft; - uint32_t limit_hard_mb = cvars::d3d12_texture_cache_limit_hard; - if (IsResolutionScale2X()) { - limit_soft_mb += limit_soft_mb >> 2; - limit_hard_mb += limit_hard_mb >> 2; - } + // texture_cache_memory_limit_render_to_texture is assumed to be included in + // texture_cache_memory_limit_soft and texture_cache_memory_limit_hard, at 1x, + // so subtracting 1 from the scale. + uint32_t limit_scaled_resolve_add_mb = + cvars::texture_cache_memory_limit_render_to_texture * + (draw_resolution_scale_ * draw_resolution_scale_ - 1); + uint32_t limit_soft_mb = + cvars::texture_cache_memory_limit_soft + limit_scaled_resolve_add_mb; + uint32_t limit_hard_mb = + cvars::texture_cache_memory_limit_hard + limit_scaled_resolve_add_mb; uint32_t limit_soft_lifetime = - std::max(cvars::d3d12_texture_cache_limit_soft_lifetime, 0) * 1000; + cvars::texture_cache_memory_limit_soft_lifetime * 1000; bool destroyed_any = false; while (texture_used_first_ != nullptr) { uint64_t total_size_mb = textures_total_size_ >> 20; @@ -1579,7 +1681,7 @@ void TextureCache::MarkRangeAsResolved(uint32_t start_unscaled, start_unscaled &= 0x1FFFFFFF; length_unscaled = std::min(length_unscaled, 0x20000000 - start_unscaled); - if (IsResolutionScale2X()) { + if (draw_resolution_scale_ > 1) { uint32_t page_first = start_unscaled >> 12; uint32_t page_last = (start_unscaled + length_unscaled - 1) >> 12; uint32_t block_first = page_first >> 5; @@ -1600,49 +1702,99 @@ void TextureCache::MarkRangeAsResolved(uint32_t start_unscaled, // Invalidate textures. Toggling individual textures between scaled and // unscaled also relies on invalidation through shared memory. - shared_memory_.RangeWrittenByGpu(start_unscaled, length_unscaled); + shared_memory_.RangeWrittenByGpu(start_unscaled, length_unscaled, true); } -bool TextureCache::EnsureScaledResolveBufferResident(uint32_t start_unscaled, - uint32_t length_unscaled) { - assert_true(IsResolutionScale2X()); +bool TextureCache::EnsureScaledResolveMemoryCommitted( + uint32_t start_unscaled, uint32_t length_unscaled) { + assert_true(draw_resolution_scale_ > 1); if (length_unscaled == 0) { return true; } - start_unscaled &= 0x1FFFFFFF; - if ((0x20000000 - start_unscaled) < length_unscaled) { + if (start_unscaled > SharedMemory::kBufferSize || + (SharedMemory::kBufferSize - start_unscaled) < length_unscaled) { // Exceeds the physical address space. return false; } - uint32_t heap_first = (start_unscaled << 2) >> kScaledResolveHeapSizeLog2; - uint32_t heap_last = ((start_unscaled + length_unscaled - 1) << 2) >> - kScaledResolveHeapSizeLog2; + uint32_t draw_resolution_scale_square = + draw_resolution_scale_ * draw_resolution_scale_; + uint64_t first_scaled = + uint64_t(start_unscaled) * draw_resolution_scale_square; + uint64_t last_scaled = uint64_t(start_unscaled + (length_unscaled - 1)) * + draw_resolution_scale_square; + + auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); + auto device = provider.GetDevice(); + + // Ensure GPU virtual memory for buffers that may be used to access the range + // is allocated - buffers are created. Always creating both buffers for all + // addresses before creating the heaps so when creating a new buffer, it can + // be safely assumed that no existing heaps should be mapped to it. + std::array possible_buffers_first = + GetPossibleScaledResolveBufferIndices(first_scaled); + std::array possible_buffers_last = + GetPossibleScaledResolveBufferIndices(last_scaled); + size_t possible_buffer_first = + std::min(possible_buffers_first[0], possible_buffers_first[1]); + size_t possible_buffer_last = + std::max(possible_buffers_last[0], possible_buffers_last[1]); + for (size_t i = possible_buffer_first; i <= possible_buffer_last; ++i) { + if (scaled_resolve_2gb_buffers_[i]) { + continue; + } + D3D12_RESOURCE_DESC scaled_resolve_buffer_desc; + // Buffer indices are gigabytes. + ui::d3d12::util::FillBufferResourceDesc( + scaled_resolve_buffer_desc, + std::min(uint64_t(1) << 31, uint64_t(SharedMemory::kBufferSize) * + draw_resolution_scale_square - + (uint64_t(i) << 30)), + D3D12_RESOURCE_FLAG_ALLOW_UNORDERED_ACCESS); + // The first access will be a resolve. + constexpr D3D12_RESOURCE_STATES kScaledResolveVirtualBufferInitialState = + D3D12_RESOURCE_STATE_UNORDERED_ACCESS; + ID3D12Resource* scaled_resolve_buffer_resource; + if (FAILED(device->CreateReservedResource( + &scaled_resolve_buffer_desc, + kScaledResolveVirtualBufferInitialState, nullptr, + IID_PPV_ARGS(&scaled_resolve_buffer_resource)))) { + XELOGE( + "D3D12TextureCache: Failed to create a 2 GB tiled buffer for draw " + "resolution scaling"); + return false; + } + scaled_resolve_2gb_buffers_[i] = + new ScaledResolveVirtualBuffer(scaled_resolve_buffer_resource, + kScaledResolveVirtualBufferInitialState); + scaled_resolve_buffer_resource->Release(); + } + + uint32_t heap_first = uint32_t(first_scaled >> kScaledResolveHeapSizeLog2); + uint32_t heap_last = uint32_t(last_scaled >> kScaledResolveHeapSizeLog2); for (uint32_t i = heap_first; i <= heap_last; ++i) { if (scaled_resolve_heaps_[i] != nullptr) { continue; } - auto& provider = command_processor_.GetD3D12Context().GetD3D12Provider(); - auto device = provider.GetDevice(); auto direct_queue = provider.GetDirectQueue(); D3D12_HEAP_DESC heap_desc = {}; heap_desc.SizeInBytes = kScaledResolveHeapSize; heap_desc.Properties.Type = D3D12_HEAP_TYPE_DEFAULT; heap_desc.Flags = D3D12_HEAP_FLAG_ALLOW_ONLY_BUFFERS | provider.GetHeapFlagCreateNotZeroed(); + ID3D12Heap* scaled_resolve_heap; if (FAILED(device->CreateHeap(&heap_desc, - IID_PPV_ARGS(&scaled_resolve_heaps_[i])))) { + IID_PPV_ARGS(&scaled_resolve_heap)))) { XELOGE("Texture cache: Failed to create a scaled resolve tile heap"); return false; } + scaled_resolve_heaps_[i] = scaled_resolve_heap; ++scaled_resolve_heap_count_; COUNT_profile_set( "gpu/texture_cache/scaled_resolve_buffer_used_mb", scaled_resolve_heap_count_ << (kScaledResolveHeapSizeLog2 - 20)); D3D12_TILED_RESOURCE_COORDINATE region_start_coordinates; - region_start_coordinates.X = (i << kScaledResolveHeapSizeLog2) / - D3D12_TILED_RESOURCE_TILE_SIZE_IN_BYTES; region_start_coordinates.Y = 0; region_start_coordinates.Z = 0; region_start_coordinates.Subresource = 0; @@ -1654,50 +1806,183 @@ bool TextureCache::EnsureScaledResolveBufferResident(uint32_t start_unscaled, UINT heap_range_start_offset = 0; UINT range_tile_count = kScaledResolveHeapSize / D3D12_TILED_RESOURCE_TILE_SIZE_IN_BYTES; - direct_queue->UpdateTileMappings( - scaled_resolve_buffer_, 1, ®ion_start_coordinates, ®ion_size, - scaled_resolve_heaps_[i], 1, &range_flags, &heap_range_start_offset, - &range_tile_count, D3D12_TILE_MAPPING_FLAG_NONE); + std::array buffer_indices = + GetPossibleScaledResolveBufferIndices(uint64_t(i) + << kScaledResolveHeapSizeLog2); + for (size_t j = 0; j < 2; ++j) { + size_t buffer_index = buffer_indices[j]; + if (j && buffer_index == buffer_indices[0]) { + break; + } + region_start_coordinates.X = + UINT(((uint64_t(i) << kScaledResolveHeapSizeLog2) - + (uint64_t(buffer_index) << 30)) / + D3D12_TILED_RESOURCE_TILE_SIZE_IN_BYTES); + direct_queue->UpdateTileMappings( + scaled_resolve_2gb_buffers_[buffer_index]->resource(), 1, + ®ion_start_coordinates, ®ion_size, scaled_resolve_heap, 1, + &range_flags, &heap_range_start_offset, &range_tile_count, + D3D12_TILE_MAPPING_FLAG_NONE); + } command_processor_.NotifyQueueOperationsDoneDirectly(); } return true; } -void TextureCache::UseScaledResolveBufferForReading() { - assert_true(IsResolutionScale2X()); - command_processor_.PushTransitionBarrier( - scaled_resolve_buffer_, scaled_resolve_buffer_state_, - D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); - scaled_resolve_buffer_state_ = D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE; - // "UAV -> anything" transition commits the writes implicitly. - scaled_resolve_buffer_uav_writes_commit_needed_ = false; -} +bool TextureCache::MakeScaledResolveRangeCurrent(uint32_t start_unscaled, + uint32_t length_unscaled) { + assert_true(draw_resolution_scale_ > 1); -void TextureCache::UseScaledResolveBufferForWriting() { - assert_true(IsResolutionScale2X()); - if (scaled_resolve_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { - if (scaled_resolve_buffer_uav_writes_commit_needed_) { - command_processor_.PushUAVBarrier(scaled_resolve_buffer_); - scaled_resolve_buffer_uav_writes_commit_needed_ = false; - } - return; + if (!length_unscaled || start_unscaled >= SharedMemory::kBufferSize || + (SharedMemory::kBufferSize - start_unscaled) < length_unscaled) { + // If length is 0, the needed buffer can't be chosen because no buffer is + // needed. + return false; } - command_processor_.PushTransitionBarrier( - scaled_resolve_buffer_, scaled_resolve_buffer_state_, - D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - scaled_resolve_buffer_state_ = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; + + uint32_t draw_resolution_scale_square = + draw_resolution_scale_ * draw_resolution_scale_; + uint64_t start_scaled = + uint64_t(start_unscaled) * draw_resolution_scale_square; + uint64_t length_scaled = + uint64_t(length_unscaled) * draw_resolution_scale_square; + uint64_t last_scaled = start_scaled + (length_scaled - 1); + + // Get one or two buffers that can hold the whole range. + std::array possible_buffer_indices_first = + GetPossibleScaledResolveBufferIndices(start_scaled); + std::array possible_buffer_indices_last = + GetPossibleScaledResolveBufferIndices(last_scaled); + size_t possible_buffer_indices_common[2]; + size_t possible_buffer_indices_common_count = 0; + for (size_t i = 0; i <= size_t(possible_buffer_indices_first[0] != + possible_buffer_indices_first[1]); + ++i) { + size_t possible_buffer_index_first = possible_buffer_indices_first[i]; + for (size_t j = 0; j <= size_t(possible_buffer_indices_last[0] != + possible_buffer_indices_last[1]); + ++j) { + if (possible_buffer_indices_last[j] == possible_buffer_index_first) { + bool possible_buffer_index_already_added = false; + for (size_t k = 0; k < possible_buffer_indices_common_count; ++k) { + if (possible_buffer_indices_common[k] == + possible_buffer_index_first) { + possible_buffer_index_already_added = true; + break; + } + } + if (!possible_buffer_index_already_added) { + assert_true(possible_buffer_indices_common_count < 2); + possible_buffer_indices_common + [possible_buffer_indices_common_count++] = + possible_buffer_index_first; + } + } + } + } + if (!possible_buffer_indices_common_count) { + // Too wide range requested - no buffer that contains both the start and the + // end. + return false; + } + + size_t gigabyte_first = size_t(start_scaled >> 30); + size_t gigabyte_last = size_t(last_scaled >> 30); + + // Choose the buffer that the range will be accessed through. + size_t new_buffer_index; + if (possible_buffer_indices_common_count >= 2) { + // Prefer the buffer that is already used to make less aliasing barriers. + assert_true(gigabyte_first + 1 >= gigabyte_last); + size_t possible_buffer_indices_already_used[2] = {}; + for (size_t i = gigabyte_first; i <= gigabyte_last; ++i) { + size_t gigabyte_current_buffer_index = + scaled_resolve_1gb_buffer_indices_[i]; + for (size_t j = 0; j < possible_buffer_indices_common_count; ++j) { + if (possible_buffer_indices_common[j] == + gigabyte_current_buffer_index) { + ++possible_buffer_indices_already_used[j]; + } + } + } + new_buffer_index = possible_buffer_indices_common[size_t( + possible_buffer_indices_already_used[1] > + possible_buffer_indices_already_used[0])]; + } else { + // The range can be accessed only by one buffer. + new_buffer_index = possible_buffer_indices_common[0]; + } + + // Switch the current buffer for the range. + const ScaledResolveVirtualBuffer* new_buffer = + scaled_resolve_2gb_buffers_[new_buffer_index]; + assert_not_null(new_buffer); + ID3D12Resource* new_buffer_resource = new_buffer->resource(); + for (size_t i = gigabyte_first; i <= gigabyte_last; ++i) { + size_t gigabyte_current_buffer_index = + scaled_resolve_1gb_buffer_indices_[i]; + if (gigabyte_current_buffer_index == new_buffer_index) { + continue; + } + if (gigabyte_current_buffer_index != SIZE_MAX) { + ScaledResolveVirtualBuffer* gigabyte_current_buffer = + scaled_resolve_2gb_buffers_[gigabyte_current_buffer_index]; + assert_not_null(gigabyte_current_buffer); + command_processor_.PushAliasingBarrier( + gigabyte_current_buffer->resource(), new_buffer_resource); + // An aliasing barrier synchronizes and flushes everything. + gigabyte_current_buffer->ClearUAVBarrierPending(); + } + scaled_resolve_1gb_buffer_indices_[i] = new_buffer_index; + } + + scaled_resolve_current_range_start_scaled_ = start_scaled; + scaled_resolve_current_range_length_scaled_ = length_scaled; + return true; } -void TextureCache::CreateScaledResolveBufferUintPow2UAV( - D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t guest_address_bytes, - uint32_t guest_length_bytes, uint32_t element_size_bytes_pow2) { - assert_true(IsResolutionScale2X()); +void TextureCache::TransitionCurrentScaledResolveRange( + D3D12_RESOURCE_STATES new_state) { + assert_true(draw_resolution_scale_ > 1); + ScaledResolveVirtualBuffer& buffer = GetCurrentScaledResolveBuffer(); + command_processor_.PushTransitionBarrier( + buffer.resource(), buffer.SetResourceState(new_state), new_state); +} + +void TextureCache::CreateCurrentScaledResolveRangeUintPow2SRV( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { + assert_true(draw_resolution_scale_ > 1); + size_t buffer_index = GetCurrentScaledResolveBufferIndex(); + const ScaledResolveVirtualBuffer* buffer = + scaled_resolve_2gb_buffers_[buffer_index]; + assert_not_null(buffer); + ui::d3d12::util::CreateBufferTypedSRV( + command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(), + handle, buffer->resource(), + ui::d3d12::util::GetUintPow2DXGIFormat(element_size_bytes_pow2), + uint32_t(scaled_resolve_current_range_length_scaled_ >> + element_size_bytes_pow2), + (scaled_resolve_current_range_start_scaled_ - + (uint64_t(buffer_index) << 30)) >> + element_size_bytes_pow2); +} + +void TextureCache::CreateCurrentScaledResolveRangeUintPow2UAV( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2) { + assert_true(draw_resolution_scale_ > 1); + size_t buffer_index = GetCurrentScaledResolveBufferIndex(); + const ScaledResolveVirtualBuffer* buffer = + scaled_resolve_2gb_buffers_[buffer_index]; + assert_not_null(buffer); ui::d3d12::util::CreateBufferTypedUAV( command_processor_.GetD3D12Context().GetD3D12Provider().GetDevice(), - handle, scaled_resolve_buffer_, + handle, buffer->resource(), ui::d3d12::util::GetUintPow2DXGIFormat(element_size_bytes_pow2), - guest_length_bytes << 2 >> element_size_bytes_pow2, - uint64_t(guest_address_bytes) << 2 >> element_size_bytes_pow2); + uint32_t(scaled_resolve_current_range_length_scaled_ >> + element_size_bytes_pow2), + (scaled_resolve_current_range_start_scaled_ - + (uint64_t(buffer_index) << 30)) >> + element_size_bytes_pow2); } ID3D12Resource* TextureCache::RequestSwapTexture( @@ -1861,7 +2146,7 @@ void TextureCache::LogTextureKeyAction(TextureKey key, const char* action) { "{} {} {}{}x{}x{} {} {} texture with {} {}packed mip level{}, " "base at 0x{:08X}, mips at 0x{:08X}", action, key.tiled ? "tiled" : "linear", - key.scaled_resolve ? "2x-scaled " : "", key.width, key.height, key.depth, + key.scaled_resolve ? "scaled " : "", key.width, key.height, key.depth, dimension_names_[uint32_t(key.dimension)], FormatInfo::Get(key.format)->name, key.mip_max_level + 1, key.packed_mips ? "" : "un", key.mip_max_level != 0 ? "s" : "", @@ -1874,7 +2159,7 @@ void TextureCache::LogTextureAction(const Texture* texture, "{} {} {}{}x{}x{} {} {} texture with {} {}packed mip level{}, " "base at 0x{:08X} (size 0x{:08X}), mips at 0x{:08X} (size 0x{:08X})", action, texture->key.tiled ? "tiled" : "linear", - texture->key.scaled_resolve ? "2x-scaled " : "", texture->key.width, + texture->key.scaled_resolve ? "scaled " : "", texture->key.width, texture->key.height, texture->key.depth, dimension_names_[uint32_t(texture->key.dimension)], FormatInfo::Get(texture->key.format)->name, @@ -1884,11 +2169,11 @@ void TextureCache::LogTextureAction(const Texture* texture, } TextureCache::Texture* TextureCache::FindOrCreateTexture(TextureKey key) { - // Check if the texture is a 2x-scaled resolve texture. - if (IsResolutionScale2X() && key.tiled) { + // Check if the texture is a scaled resolve texture. + if (draw_resolution_scale_ > 1 && key.tiled) { LoadMode load_mode = GetLoadMode(key); if (load_mode != LoadMode::kUnknown && - load_pipelines_2x_[uint32_t(load_mode)] != nullptr) { + load_pipelines_scaled_[uint32_t(load_mode)] != nullptr) { uint32_t base_size = 0, mip_size = 0; texture_util::GetTextureTotalSize( key.dimension, key.width, key.height, key.depth, key.format, @@ -1903,6 +2188,20 @@ TextureCache::Texture* TextureCache::FindOrCreateTexture(TextureKey key) { } } } + uint32_t host_width = key.width; + uint32_t host_height = key.height; + if (key.scaled_resolve) { + host_width *= draw_resolution_scale_; + host_height *= draw_resolution_scale_; + } + // With 3x resolution scaling, a 2D texture may become bigger than the + // Direct3D 11 limit, and with 2x, a 3D one as well. + uint32_t max_host_width_height = GetMaxHostTextureWidthHeight(key.dimension); + uint32_t max_host_depth = GetMaxHostTextureDepth(key.dimension); + if (host_width > max_host_width_height || + host_height > max_host_width_height || key.depth > max_host_depth) { + return nullptr; + } uint64_t map_key = key.GetMapKey(); @@ -1933,12 +2232,8 @@ TextureCache::Texture* TextureCache::FindOrCreateTexture(TextureKey key) { desc.Dimension = D3D12_RESOURCE_DIMENSION_TEXTURE2D; } desc.Alignment = 0; - desc.Width = key.width; - desc.Height = key.height; - if (key.scaled_resolve) { - desc.Width *= 2; - desc.Height *= 2; - } + desc.Width = host_width; + desc.Height = host_height; desc.DepthOrArraySize = key.depth; desc.MipLevels = key.mip_max_level + 1; desc.SampleDesc.Count = 1; @@ -1978,6 +2273,8 @@ TextureCache::Texture* TextureCache::FindOrCreateTexture(TextureKey key) { } texture_used_last_ = texture; texture->mip_offsets[0] = 0; + texture->base_resolved = key.scaled_resolve; + texture->mips_resolved = key.scaled_resolve; uint32_t width_blocks, height_blocks, depth_blocks; uint32_t array_size = key.dimension != xenos::DataDimension::k3D ? key.depth : 1; @@ -2074,14 +2371,17 @@ bool TextureCache::LoadTextureData(Texture* texture) { if (load_mode == LoadMode::kUnknown) { return false; } - bool scaled_resolve = texture->key.scaled_resolve ? true : false; - ID3D12PipelineState* pipeline = scaled_resolve - ? load_pipelines_2x_[uint32_t(load_mode)] - : load_pipelines_[uint32_t(load_mode)]; + uint32_t texture_resolution_scale = + texture->key.scaled_resolve ? draw_resolution_scale_ : 1; + ID3D12PipelineState* pipeline = + texture_resolution_scale > 1 ? load_pipelines_scaled_[uint32_t(load_mode)] + : load_pipelines_[uint32_t(load_mode)]; if (pipeline == nullptr) { return false; } const LoadModeInfo& load_mode_info = load_mode_info_[uint32_t(load_mode)]; + const LoadShaderInfo& load_shader_info = + load_mode_info.shaders[texture_resolution_scale - 1]; // Request uploading of the texture data to the shared memory. // This is also necessary when resolution scale is used - the texture cache @@ -2089,26 +2389,31 @@ bool TextureCache::LoadTextureData(Texture* texture) { // textures! Plus a texture may be unscaled partially, when only a portion of // its pages is invalidated, in this case we'll need the texture from the // shared memory to load the unscaled parts. + // TODO(Triang3l): Load unscaled parts. + bool base_resolved = texture->base_resolved; if (!base_in_sync) { - if (!shared_memory_.RequestRange(texture->key.base_page << 12, - texture->base_size)) { + if (!shared_memory_.RequestRange( + texture->key.base_page << 12, texture->base_size, + texture->key.scaled_resolve ? nullptr : &base_resolved)) { return false; } } + bool mips_resolved = texture->mips_resolved; if (!mips_in_sync) { - if (!shared_memory_.RequestRange(texture->key.mip_page << 12, - texture->mip_size)) { + if (!shared_memory_.RequestRange( + texture->key.mip_page << 12, texture->mip_size, + texture->key.scaled_resolve ? nullptr : &mips_resolved)) { return false; } } - if (scaled_resolve) { + if (texture_resolution_scale > 1) { // Make sure all heaps are created. - if (!EnsureScaledResolveBufferResident(texture->key.base_page << 12, - texture->base_size)) { + if (!EnsureScaledResolveMemoryCommitted(texture->key.base_page << 12, + texture->base_size)) { return false; } - if (!EnsureScaledResolveBufferResident(texture->key.mip_page << 12, - texture->mip_size)) { + if (!EnsureScaledResolveMemoryCommitted(texture->key.mip_page << 12, + texture->mip_size)) { return false; } } @@ -2144,64 +2449,114 @@ bool TextureCache::LoadTextureData(Texture* texture) { // To let the load shaders copy multiple consecutive blocks at once without // having to care about the alignment of the base, all packed mips are untiled // at once, with offsets later applied in CopyTextureRegion. - uint32_t texture_mip_count = texture->key.mip_max_level + 1; - D3D12_PLACED_SUBRESOURCE_FOOTPRINT host_layouts[D3D12_REQ_MIP_LEVELS]; - D3D12_PLACED_SUBRESOURCE_FOOTPRINT host_layout_packed; + // Array slices are within mips (similar to the guest addressing). All + // subresources, including the last one, have both offset and size aligned to + // D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT for simplicity of both array slice + // addressing and writing to the last row. + UINT64 copy_buffer_size = 0; + D3D12_PLACED_SUBRESOURCE_FOOTPRINT + host_unpacked_slice_0_layouts[D3D12_REQ_MIP_LEVELS]; + UINT64 host_unpacked_slice_sizes[D3D12_REQ_MIP_LEVELS]; + D3D12_PLACED_SUBRESOURCE_FOOTPRINT host_packed_slice_0_layout = {}; + UINT64 host_packed_slice_size = 0; + UINT64 host_packed_mips_offset = 0; // If need to load both base and mips, and both are in the packed mip tail, - // but base and mip addresses are different, host_layout_packed is for the - // base level, but mips starting from 1 are placed at this offset from - // host_layout_packed. - UINT64 host_layout_packed_mips_offset = 0; - UINT64 host_slice_size = 0; + // but base and mip addresses are different, host_packed_slice_0_layout and + // host_packed_slice_size are for the base level, and mips are at + // host_packed_slice_0_layout.Offset + host_packed_mips_offset. { - D3D12_RESOURCE_DESC footprint_resource_desc = texture->resource->GetDesc(); + // Using custom calculations instead of GetCopyableFootprints because + // shaders may copy multiple blocks per thread for simplicity. For 3x + // resolution scaling, the number becomes a multiple of 3 rather than a + // power of 2 - so the 256-byte alignment required anyway by Direct3D 12 is + // not enough. GetCopyableFootprints would be needed to be called with an + // overaligned width - but it may exceed 16384 (the maximum Direct3D 12 + // texture size) for 3x resolution scaling, and the function will fail. + DXGI_FORMAT copy_format; + uint32_t copy_block_width; + uint32_t copy_block_height; + uint32_t copy_bytes_per_block; + ui::d3d12::util::GetFormatCopyInfo( + GetDXGIResourceFormat(guest_format, width, height), 0, copy_format, + copy_block_width, copy_block_height, copy_bytes_per_block); if (mip_first < mip_packed) { - host_slice_size = xe::align( - host_slice_size, UINT64(D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT)); - UINT64 host_layouts_size; - device->GetCopyableFootprints( - &footprint_resource_desc, mip_first, - std::min(mip_packed, mip_last + uint32_t(1)) - mip_first, - host_slice_size, host_layouts, nullptr, nullptr, &host_layouts_size); - // Shaders write excess pixels in the end of the row for simplicity (not - // to bound-check every pixel, because multiple pixels may be copied at - // once), but GetCopyableFootprints doesn't align the last row. - host_slice_size += xe::align(host_layouts_size, - UINT64(D3D12_TEXTURE_DATA_PITCH_ALIGNMENT)); + uint32_t width_scaled = width * texture_resolution_scale; + uint32_t height_scaled = height * texture_resolution_scale; + uint32_t host_layout_mip_count = + std::min(mip_packed, mip_last + uint32_t(1)) - mip_first; + for (uint32_t i = 0; i < host_layout_mip_count; ++i) { + D3D12_PLACED_SUBRESOURCE_FOOTPRINT& mip_layout = + host_unpacked_slice_0_layouts[i]; + mip_layout.Offset = copy_buffer_size; + mip_layout.Footprint.Format = copy_format; + uint32_t mip = mip_first + i; + uint32_t mip_copy_width_blocks = + (std::max(width_scaled >> mip, uint32_t(1)) + + (copy_block_width - uint32_t(1))) / + copy_block_width; + uint32_t mip_copy_height_blocks = + (std::max(height_scaled >> mip, uint32_t(1)) + + (copy_block_height - uint32_t(1))) / + copy_block_height; + mip_layout.Footprint.Width = mip_copy_width_blocks * copy_block_width; + mip_layout.Footprint.Height = + mip_copy_height_blocks * copy_block_height; + mip_layout.Footprint.Depth = std::max(depth >> mip, uint32_t(1)); + mip_layout.Footprint.RowPitch = + xe::align(xe::round_up(mip_copy_width_blocks, + load_shader_info.host_x_blocks_per_thread) * + copy_bytes_per_block, + uint32_t(D3D12_TEXTURE_DATA_PITCH_ALIGNMENT)); + UINT64 copy_slice_size = + xe::align(UINT64(mip_layout.Footprint.RowPitch) * + mip_copy_height_blocks * mip_layout.Footprint.Depth, + UINT64(D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT)); + host_unpacked_slice_sizes[i] = copy_slice_size; + copy_buffer_size += copy_slice_size * slice_count; + } } if (mip_last >= mip_packed) { - host_slice_size = xe::align( - host_slice_size, UINT64(D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT)); - UINT64 host_layout_packed_offset = host_slice_size; - footprint_resource_desc.Width = mip_packed_width; - footprint_resource_desc.Height = mip_packed_height; - footprint_resource_desc.DepthOrArraySize = mip_packed_depth; - footprint_resource_desc.MipLevels = 1; - UINT64 host_layout_packed_size; - device->GetCopyableFootprints(&footprint_resource_desc, 0, 1, - host_slice_size, &host_layout_packed, - nullptr, nullptr, &host_layout_packed_size); - host_layout_packed_size = xe::align( - host_layout_packed_size, UINT64(D3D12_TEXTURE_DATA_PITCH_ALIGNMENT)); - host_slice_size += host_layout_packed_size; + host_packed_slice_0_layout.Offset = copy_buffer_size; + host_packed_slice_0_layout.Footprint.Format = copy_format; + uint32_t mip_packed_copy_width_blocks = + (mip_packed_width * texture_resolution_scale + + (copy_block_width - uint32_t(1))) / + copy_block_width; + uint32_t mip_packed_copy_height_blocks = + (mip_packed_height * texture_resolution_scale + + (copy_block_height - uint32_t(1))) / + copy_block_height; + host_packed_slice_0_layout.Footprint.Width = + mip_packed_copy_width_blocks * copy_block_width; + host_packed_slice_0_layout.Footprint.Height = + mip_packed_copy_height_blocks * copy_block_height; + host_packed_slice_0_layout.Footprint.Depth = mip_packed_depth; + host_packed_slice_0_layout.Footprint.RowPitch = + xe::align(xe::round_up(mip_packed_copy_width_blocks, + load_shader_info.host_x_blocks_per_thread) * + copy_bytes_per_block, + uint32_t(D3D12_TEXTURE_DATA_PITCH_ALIGNMENT)); + host_packed_slice_size = + xe::align(UINT64(host_packed_slice_0_layout.Footprint.RowPitch) * + mip_packed_copy_height_blocks * mip_packed_depth, + UINT64(D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT)); + UINT64 host_packed_total_size = host_packed_slice_size * slice_count; + copy_buffer_size += host_packed_total_size; if (mip_packed == 0 && mip_first == 0 && mip_last != 0 && texture->key.base_page != texture->key.mip_page) { // Base and mips are both small enough to be packed, but stored at // different addresses - load different mip tails containing different // data for the base and the mips. Allocate another area for the packed // mips untiled from a different address. - host_slice_size = xe::align( - host_slice_size, UINT64(D3D12_TEXTURE_DATA_PLACEMENT_ALIGNMENT)); - host_layout_packed_mips_offset = - host_slice_size - host_layout_packed_offset; - host_slice_size += host_layout_packed_size; + host_packed_mips_offset = host_packed_total_size; + copy_buffer_size += host_packed_total_size; } } } D3D12_RESOURCE_STATES copy_buffer_state = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; ID3D12Resource* copy_buffer = command_processor_.RequestScratchGPUBuffer( - uint32_t(host_slice_size), copy_buffer_state); + uint32_t(copy_buffer_size), copy_buffer_state); if (copy_buffer == nullptr) { return false; } @@ -2214,15 +2569,14 @@ bool TextureCache::LoadTextureData(Texture* texture) { } // Begin loading. - // Can't address more than 128 megatexels directly on Nvidia - need two - // separate UAV descriptors for base and mips. + // May use different buffers for scaled base and mips, and also can't address + // more than 128 megatexels directly on Nvidia - need two separate UAV + // descriptors for base and mips. bool separate_base_and_mips_descriptors = - scaled_resolve && mip_first == 0 && mip_last != 0; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptor_dest; - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors_source[2]; + texture_resolution_scale > 1 && mip_first == 0 && mip_last != 0; // Destination. uint32_t descriptor_count = 1; - if (scaled_resolve) { + if (texture_resolution_scale > 1) { // Source - base and mips. descriptor_count += separate_base_and_mips_descriptors ? 2 : 1; } else { @@ -2231,162 +2585,171 @@ bool TextureCache::LoadTextureData(Texture* texture) { ++descriptor_count; } } - ui::d3d12::util::DescriptorCPUGPUHandlePair descriptors[3]; - if (!command_processor_.RequestOneUseSingleViewDescriptors(descriptor_count, - descriptors)) { + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptors_allocated[3]; + if (!command_processor_.RequestOneUseSingleViewDescriptors( + descriptor_count, descriptors_allocated)) { + command_processor_.ReleaseScratchGPUBuffer(copy_buffer, copy_buffer_state); return false; } uint32_t descriptor_write_index = 0; - uint32_t uav_bpe_log2 = scaled_resolve ? load_mode_info.uav_bpe_log2_2x - : load_mode_info.uav_bpe_log2; + command_processor_.SetExternalPipeline(pipeline); + command_list.D3DSetComputeRootSignature(load_root_signature_); + // Set up the destination descriptor. assert_true(descriptor_write_index < descriptor_count); - descriptor_dest = descriptors[descriptor_write_index++]; + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_dest = + descriptors_allocated[descriptor_write_index++]; ui::d3d12::util::CreateBufferTypedUAV( device, descriptor_dest.first, copy_buffer, - ui::d3d12::util::GetUintPow2DXGIFormat(uav_bpe_log2), - uint32_t(host_slice_size) >> uav_bpe_log2); - if (scaled_resolve) { - // TODO(Triang3l): Allow partial invalidation of scaled textures - send a - // part of scaled_resolve_pages_ to the shader and choose the source - // according to whether a specific page contains scaled texture data. If - // it's not, duplicate the texels from the unscaled version - will be - // blocky with filtering, but better than nothing. - UseScaledResolveBufferForReading(); - uint32_t descriptor_source_write_index = 0; - if (mip_first == 0) { - assert_true(descriptor_write_index < descriptor_count); - descriptors_source[descriptor_source_write_index] = - descriptors[descriptor_write_index++]; - ui::d3d12::util::CreateBufferTypedSRV( - device, descriptors_source[descriptor_source_write_index++].first, - scaled_resolve_buffer_, - ui::d3d12::util::GetUintPow2DXGIFormat( - load_mode_info.srv_bpe_log2_2x), - texture->base_size << 2 >> load_mode_info.srv_bpe_log2_2x, - uint64_t(texture->key.base_page) << (12 + 2) >> - load_mode_info.srv_bpe_log2_2x); - } - if (mip_last != 0) { - assert_true(descriptor_write_index < descriptor_count); - descriptors_source[descriptor_source_write_index] = - descriptors[descriptor_write_index++]; - ui::d3d12::util::CreateBufferTypedSRV( - device, descriptors_source[descriptor_source_write_index++].first, - scaled_resolve_buffer_, - ui::d3d12::util::GetUintPow2DXGIFormat( - load_mode_info.srv_bpe_log2_2x), - texture->mip_size << 2 >> load_mode_info.srv_bpe_log2_2x, - uint64_t(texture->key.mip_page) << (12 + 2) >> - load_mode_info.srv_bpe_log2_2x); - } - } else { + ui::d3d12::util::GetUintPow2DXGIFormat(load_shader_info.uav_bpe_log2), + uint32_t(copy_buffer_size) >> load_shader_info.uav_bpe_log2); + command_list.D3DSetComputeRootDescriptorTable(2, descriptor_dest.second); + // Set up the unscaled source descriptor (scaled needs two descriptors that + // depend on the buffer being current, so they will be set later - for mips, + // after loading the base is done). + if (texture_resolution_scale <= 1) { shared_memory_.UseForReading(); + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_unscaled_source; if (bindless_resources_used_) { - descriptors_source[0] = + descriptor_unscaled_source = command_processor_.GetSharedMemoryUintPow2BindlessSRVHandlePair( - load_mode_info.srv_bpe_log2); + load_shader_info.srv_bpe_log2); } else { assert_true(descriptor_write_index < descriptor_count); - descriptors_source[0] = descriptors[descriptor_write_index++]; - shared_memory_.WriteUintPow2SRVDescriptor(descriptors_source[0].first, - load_mode_info.srv_bpe_log2); + descriptor_unscaled_source = + descriptors_allocated[descriptor_write_index++]; + shared_memory_.WriteUintPow2SRVDescriptor( + descriptor_unscaled_source.first, load_shader_info.srv_bpe_log2); } + command_list.D3DSetComputeRootDescriptorTable( + 1, descriptor_unscaled_source.second); } - command_processor_.SetComputePipeline(pipeline); - command_list.D3DSetComputeRootSignature(load_root_signature_); - command_list.D3DSetComputeRootDescriptorTable(2, descriptor_dest.second); - // Update LRU caching because the texture will be used by the command list. - MarkTextureUsed(texture); + // Submit the copy buffer population commands. - // Submit commands. - command_processor_.PushTransitionBarrier(texture->resource, texture->state, - D3D12_RESOURCE_STATE_COPY_DEST); - texture->state = D3D12_RESOURCE_STATE_COPY_DEST; auto& cbuffer_pool = command_processor_.GetConstantBufferPool(); LoadConstants load_constants; load_constants.is_3d_endian = uint32_t(is_3d) | (uint32_t(texture->key.endianness) << 1); + uint32_t loop_mip_first = std::min(mip_first, mip_packed); uint32_t loop_mip_last = std::min(mip_last, mip_packed); - if (host_layout_packed_mips_offset) { + if (host_packed_mips_offset) { assert_zero(mip_packed); // Need to load two different packed mip tails for the base and the mips. // loop_mip == 0 - packed base. // loop_mip == 1 - packed mips. loop_mip_last = 1; } - uint32_t descriptor_source_last_index = UINT32_MAX; - for (uint32_t slice = 0; slice < slice_count; ++slice) { - command_processor_.PushTransitionBarrier( - copy_buffer, copy_buffer_state, D3D12_RESOURCE_STATE_UNORDERED_ACCESS); - copy_buffer_state = D3D12_RESOURCE_STATE_UNORDERED_ACCESS; - for (uint32_t loop_mip = loop_mip_first; loop_mip <= loop_mip_last; - ++loop_mip) { - // If need to load two different packed mip tails, there will be two - // iterations of the loop, but both images will have the size of mip 0. - uint32_t mip = (mip_packed != 0 ? loop_mip : 0); - bool is_base; - if (mip_packed == 0) { - is_base = (mip_first == 0 && loop_mip == 0); - } else { - is_base = (mip == 0); + // The loop is slices within mips because the base and the mips may need + // different portions of the scaled resolve virtual address space to be + // available through buffers, and to create a descriptor, the buffer start + // address is required - which may be different for base and mips. + bool scaled_mips_source_set_up = false; + for (uint32_t loop_mip = loop_mip_first; loop_mip <= loop_mip_last; + ++loop_mip) { + // If need to load two different packed mip tails, there will be two + // iterations of the loop, but both images will have the size of mip 0. + uint32_t mip = (mip_packed != 0 ? loop_mip : 0); + bool is_base; + if (mip_packed == 0) { + is_base = (mip_first == 0 && loop_mip == 0); + } else { + is_base = (mip == 0); + } + + uint32_t descriptor_source_index = 0; + if (texture_resolution_scale > 1) { + // Offset already applied in the buffer because more than 512 MB can't be + // directly addresses on Nvidia as R32. + load_constants.guest_base = 0; + if (separate_base_and_mips_descriptors) { + descriptor_source_index = is_base ? 0 : 1; } - uint32_t descriptor_source_index = 0; - if (scaled_resolve) { - // Offset already applied in the buffer because more than 512 MB can't - // be directly addresses on Nvidia. - load_constants.guest_base = 0; - if (separate_base_and_mips_descriptors) { - descriptor_source_index = is_base ? 0 : 1; - } - } else { - load_constants.guest_base = - (is_base ? texture->key.base_page : texture->key.mip_page) << 12; + } else { + load_constants.guest_base = + (is_base ? texture->key.base_page : texture->key.mip_page) << 12; + } + load_constants.guest_base += texture->mip_offsets[mip]; + uint32_t guest_slice_size = texture->slice_sizes[mip]; + load_constants.guest_pitch = texture->key.tiled + ? LoadConstants::kGuestPitchTiled + : texture->pitches[mip]; + + // Set up the base or mips source, also making it accessible if loading from + // scaled resolve memory. + if (texture_resolution_scale > 1 && + (is_base || !scaled_mips_source_set_up)) { + uint32_t source_page = + is_base ? texture->key.base_page : texture->key.mip_page; + uint32_t source_size_unscaled = + is_base ? texture->base_size : texture->mip_size; + if (!MakeScaledResolveRangeCurrent(source_page << 12, + source_size_unscaled)) { + command_processor_.ReleaseScratchGPUBuffer(copy_buffer, + copy_buffer_state); + return false; } - load_constants.guest_base += - texture->mip_offsets[mip] + slice * texture->slice_sizes[mip]; - const D3D12_PLACED_SUBRESOURCE_FOOTPRINT& host_layout = - mip == mip_packed ? host_layout_packed - : host_layouts[mip - mip_first]; - load_constants.guest_pitch = texture->key.tiled - ? LoadConstants::kGuestPitchTiled - : texture->pitches[mip]; - load_constants.host_base = uint32_t(host_layout.Offset); - if (mip_packed == 0 && loop_mip) { - // Two packed mip tails, but this one is for the mips. - load_constants.host_base += uint32_t(host_layout_packed_mips_offset); - } - load_constants.host_pitch = host_layout.Footprint.RowPitch; - uint32_t mip_width, mip_height, mip_depth; - if (mip == mip_packed) { - // Force power of 2 for both the source and the destination if it's the - // mip tail, and it's not on level 0. - mip_width = mip_packed_width; - mip_height = mip_packed_height; - mip_depth = mip_packed_depth; - } else { - mip_width = std::max(width >> mip, uint32_t(1)); - mip_height = std::max(height >> mip, uint32_t(1)); - mip_depth = std::max(depth >> mip, uint32_t(1)); - } - load_constants.size_blocks[0] = - (mip_width + (block_width - 1)) / block_width; - load_constants.size_blocks[1] = - (mip_height + (block_height - 1)) / block_height; - load_constants.size_blocks[2] = mip_depth; - load_constants.height_texels = mip_height; - if (mip == 0) { - load_constants.guest_storage_width_height[0] = - xe::align(load_constants.size_blocks[0], uint32_t(32)); - load_constants.guest_storage_width_height[1] = - xe::align(load_constants.size_blocks[1], uint32_t(32)); - } else { - load_constants.guest_storage_width_height[0] = xe::align( - xe::next_pow2(load_constants.size_blocks[0]), uint32_t(32)); - load_constants.guest_storage_width_height[1] = xe::align( - xe::next_pow2(load_constants.size_blocks[1]), uint32_t(32)); + TransitionCurrentScaledResolveRange( + D3D12_RESOURCE_STATE_NON_PIXEL_SHADER_RESOURCE); + assert_true(descriptor_write_index < descriptor_count); + ui::d3d12::util::DescriptorCpuGpuHandlePair descriptor_scaled_source = + descriptors_allocated[descriptor_write_index++]; + CreateCurrentScaledResolveRangeUintPow2SRV(descriptor_scaled_source.first, + load_shader_info.srv_bpe_log2); + command_list.D3DSetComputeRootDescriptorTable( + 1, descriptor_scaled_source.second); + if (!is_base) { + scaled_mips_source_set_up = true; } + } + + const D3D12_PLACED_SUBRESOURCE_FOOTPRINT& host_slice_0_layout = + mip == mip_packed ? host_packed_slice_0_layout + : host_unpacked_slice_0_layouts[mip - mip_first]; + uint32_t host_slice_size = uint32_t( + mip == mip_packed ? host_packed_slice_size + : host_unpacked_slice_sizes[mip - mip_first]); + load_constants.host_base = uint32_t(host_slice_0_layout.Offset); + if (mip_packed == 0 && loop_mip) { + // Two packed mip tails, but this one is for the mips. + load_constants.host_base += uint32_t(host_packed_mips_offset); + } + load_constants.host_pitch = host_slice_0_layout.Footprint.RowPitch; + + uint32_t mip_width, mip_height, mip_depth; + if (mip == mip_packed) { + // Force power of 2 for both the source and the destination if it's the + // mip tail, and it's not on level 0. + mip_width = mip_packed_width; + mip_height = mip_packed_height; + mip_depth = mip_packed_depth; + } else { + mip_width = std::max(width >> mip, uint32_t(1)); + mip_height = std::max(height >> mip, uint32_t(1)); + mip_depth = std::max(depth >> mip, uint32_t(1)); + } + load_constants.size_blocks[0] = + (mip_width + (block_width - 1)) / block_width; + load_constants.size_blocks[1] = + (mip_height + (block_height - 1)) / block_height; + load_constants.size_blocks[2] = mip_depth; + load_constants.height_texels = mip_height; + if (mip == 0) { + load_constants.guest_storage_width_height[0] = + xe::align(load_constants.size_blocks[0], uint32_t(32)); + load_constants.guest_storage_width_height[1] = + xe::align(load_constants.size_blocks[1], uint32_t(32)); + } else { + load_constants.guest_storage_width_height[0] = + xe::align(xe::next_pow2(load_constants.size_blocks[0]), uint32_t(32)); + load_constants.guest_storage_width_height[1] = + xe::align(xe::next_pow2(load_constants.size_blocks[1]), uint32_t(32)); + } + // Each thread group processes 32x32x1 guest blocks. + uint32_t group_count_x = (load_constants.size_blocks[0] + 31) >> 5; + uint32_t group_count_y = (load_constants.size_blocks[1] + 31) >> 5; + + for (uint32_t slice = 0; slice < slice_count; ++slice) { D3D12_GPU_VIRTUAL_ADDRESS cbuffer_gpu_address; uint8_t* cbuffer_mapping = cbuffer_pool.Request( command_processor_.GetCurrentFrame(), sizeof(load_constants), @@ -2398,64 +2761,82 @@ bool TextureCache::LoadTextureData(Texture* texture) { return false; } std::memcpy(cbuffer_mapping, &load_constants, sizeof(load_constants)); - if (descriptor_source_last_index != descriptor_source_index) { - descriptor_source_last_index = descriptor_source_index; - command_list.D3DSetComputeRootDescriptorTable( - 1, descriptors_source[descriptor_source_index].second); - } command_list.D3DSetComputeRootConstantBufferView(0, cbuffer_gpu_address); + assert_true(copy_buffer_state == D3D12_RESOURCE_STATE_UNORDERED_ACCESS); command_processor_.SubmitBarriers(); - // Each thread group processes 32x32x1 guest blocks. - command_list.D3DDispatch((load_constants.size_blocks[0] + 31) >> 5, - (load_constants.size_blocks[1] + 31) >> 5, + command_list.D3DDispatch(group_count_x, group_count_y, load_constants.size_blocks[2]); + load_constants.guest_base += guest_slice_size; + load_constants.host_base += host_slice_size; } - command_processor_.PushUAVBarrier(copy_buffer); - command_processor_.PushTransitionBarrier(copy_buffer, copy_buffer_state, - D3D12_RESOURCE_STATE_COPY_SOURCE); - copy_buffer_state = D3D12_RESOURCE_STATE_COPY_SOURCE; - command_processor_.SubmitBarriers(); - UINT slice_first_subresource = slice * texture_mip_count; - for (uint32_t mip = mip_first; mip <= mip_last; ++mip) { - D3D12_TEXTURE_COPY_LOCATION location_source, location_dest; - location_source.pResource = copy_buffer; - location_source.Type = D3D12_TEXTURE_COPY_TYPE_PLACED_FOOTPRINT; - location_dest.pResource = texture->resource; - location_dest.Type = D3D12_TEXTURE_COPY_TYPE_SUBRESOURCE_INDEX; - location_dest.SubresourceIndex = slice_first_subresource + mip; - if (mip >= mip_packed) { - location_source.PlacedFootprint = host_layout_packed; - if (mip != 0) { - location_source.PlacedFootprint.Offset += - host_layout_packed_mips_offset; - } - uint32_t mip_offset_blocks_x, mip_offset_blocks_y, mip_offset_z; - texture_util::GetPackedMipOffset(width, height, depth, guest_format, - mip, mip_offset_blocks_x, - mip_offset_blocks_y, mip_offset_z); - D3D12_BOX source_box; - source_box.left = mip_offset_blocks_x * block_width; - source_box.top = mip_offset_blocks_y * block_height; - source_box.front = mip_offset_z; - source_box.right = - source_box.left + - xe::align(std::max(width >> mip, uint32_t(1)), host_block_width); - source_box.bottom = - source_box.top + - xe::align(std::max(height >> mip, uint32_t(1)), host_block_height); - source_box.back = - source_box.front + std::max(depth >> mip, uint32_t(1)); - command_list.CopyTextureRegion(location_dest, 0, 0, 0, location_source, - source_box); - } else { - location_source.PlacedFootprint = host_layouts[mip - mip_first]; - command_list.CopyTexture(location_dest, location_source); + } + + // Update LRU caching because the texture will be used by the command list. + MarkTextureUsed(texture); + + // Submit copying from the copy buffer to the host texture. + command_processor_.PushTransitionBarrier(texture->resource, texture->state, + D3D12_RESOURCE_STATE_COPY_DEST); + texture->state = D3D12_RESOURCE_STATE_COPY_DEST; + command_processor_.PushTransitionBarrier(copy_buffer, copy_buffer_state, + D3D12_RESOURCE_STATE_COPY_SOURCE); + copy_buffer_state = D3D12_RESOURCE_STATE_COPY_SOURCE; + command_processor_.SubmitBarriers(); + uint32_t texture_mip_count = texture->key.mip_max_level + 1; + D3D12_TEXTURE_COPY_LOCATION location_source, location_dest; + location_source.pResource = copy_buffer; + location_source.Type = D3D12_TEXTURE_COPY_TYPE_PLACED_FOOTPRINT; + location_dest.pResource = texture->resource; + location_dest.Type = D3D12_TEXTURE_COPY_TYPE_SUBRESOURCE_INDEX; + for (uint32_t mip = mip_first; mip <= mip_last; ++mip) { + location_dest.SubresourceIndex = mip; + UINT64 host_slice_size; + D3D12_BOX source_box; + const D3D12_BOX* source_box_ptr; + if (mip >= mip_packed) { + location_source.PlacedFootprint = host_packed_slice_0_layout; + if (mip != 0) { + location_source.PlacedFootprint.Offset += host_packed_mips_offset; } + host_slice_size = host_packed_slice_size; + uint32_t mip_offset_blocks_x, mip_offset_blocks_y, mip_offset_z; + texture_util::GetPackedMipOffset(width, height, depth, guest_format, mip, + mip_offset_blocks_x, mip_offset_blocks_y, + mip_offset_z); + source_box.left = mip_offset_blocks_x * block_width; + source_box.top = mip_offset_blocks_y * block_height; + source_box.front = mip_offset_z; + source_box.right = + source_box.left + + xe::align(std::max(width >> mip, uint32_t(1)), host_block_width); + source_box.bottom = + source_box.top + + xe::align(std::max(height >> mip, uint32_t(1)), host_block_height); + source_box.back = source_box.front + std::max(depth >> mip, uint32_t(1)); + source_box_ptr = &source_box; + } else { + uint32_t host_layout_mip_index = mip - mip_first; + location_source.PlacedFootprint = + host_unpacked_slice_0_layouts[host_layout_mip_index]; + host_slice_size = host_unpacked_slice_sizes[host_layout_mip_index]; + source_box_ptr = nullptr; + } + for (uint32_t slice = 0; slice < slice_count; ++slice) { + command_list.D3DCopyTextureRegion(&location_dest, 0, 0, 0, + &location_source, source_box_ptr); + location_dest.SubresourceIndex += texture_mip_count; + location_source.PlacedFootprint.Offset += host_slice_size; } } command_processor_.ReleaseScratchGPUBuffer(copy_buffer, copy_buffer_state); + // Update the source of the texture (resolve vs. CPU or memexport) for + // purposes of handling piecewise gamma emulation via sRGB and for resolution + // scale in sampling offsets. + texture->base_resolved = base_resolved; + texture->mips_resolved = mips_resolved; + // Mark the ranges as uploaded and watch them. This is needed for scaled // resolves as well to detect when the CPU wants to reuse the memory for a // regular texture or a vertex buffer, and thus the scaled resolve version is @@ -2667,12 +3048,16 @@ void TextureCache::ClearBindings() { bool TextureCache::IsRangeScaledResolved(uint32_t start_unscaled, uint32_t length_unscaled) { - if (!IsResolutionScale2X() || length_unscaled == 0) { + if (draw_resolution_scale_ <= 1) { return false; } - start_unscaled &= 0x1FFFFFFF; - length_unscaled = std::min(length_unscaled, 0x20000000 - start_unscaled); + start_unscaled = std::min(start_unscaled, SharedMemory::kBufferSize); + length_unscaled = + std::min(length_unscaled, SharedMemory::kBufferSize - start_unscaled); + if (!length_unscaled) { + return false; + } // Two-level check for faster rejection since resolve targets are usually // placed in relatively small and localized memory portions (confirmed by @@ -2723,7 +3108,7 @@ void TextureCache::ScaledResolveGlobalWatchCallbackThunk( void TextureCache::ScaledResolveGlobalWatchCallback(uint32_t address_first, uint32_t address_last, bool invalidated_by_gpu) { - assert_true(IsResolutionScale2X()); + assert_true(draw_resolution_scale_ > 1); if (invalidated_by_gpu) { // Resolves themselves do exactly the opposite of what this should do. return; diff --git a/src/xenia/gpu/d3d12/texture_cache.h b/src/xenia/gpu/d3d12/texture_cache.h index 465824755..76bd141c2 100644 --- a/src/xenia/gpu/d3d12/texture_cache.h +++ b/src/xenia/gpu/d3d12/texture_cache.h @@ -10,11 +10,14 @@ #ifndef XENIA_GPU_D3D12_TEXTURE_CACHE_H_ #define XENIA_GPU_D3D12_TEXTURE_CACHE_H_ +#include #include #include #include #include +#include +#include "xenia/base/assert.h" #include "xenia/base/mutex.h" #include "xenia/gpu/d3d12/d3d12_shader.h" #include "xenia/gpu/d3d12/d3d12_shared_memory.h" @@ -22,6 +25,7 @@ #include "xenia/gpu/texture_info.h" #include "xenia/gpu/xenos.h" #include "xenia/ui/d3d12/d3d12_api.h" +#include "xenia/ui/d3d12/d3d12_provider.h" namespace xe { namespace gpu { @@ -168,16 +172,18 @@ class TextureCache { }; TextureCache(D3D12CommandProcessor& command_processor, - const RegisterFile& register_file, bool bindless_resources_used, - D3D12SharedMemory& shared_memory); + const RegisterFile& register_file, + D3D12SharedMemory& shared_memory, bool bindless_resources_used, + uint32_t draw_resolution_scale); ~TextureCache(); - bool Initialize(bool edram_rov_used); + bool Initialize(); void Shutdown(); void ClearCache(); void TextureFetchConstantWritten(uint32_t index); + void BeginSubmission(); void BeginFrame(); void EndFrame(); @@ -209,6 +215,16 @@ class TextureCache { uint8_t GetActiveTextureSwizzledSigns(uint32_t index) const { return texture_bindings_[index].swizzled_signs; } + bool IsActiveTextureResolved(uint32_t index) const { + const TextureBinding& binding = texture_bindings_[index]; + if (binding.texture && binding.texture->IsResolved()) { + return true; + } + if (binding.texture_signed && binding.texture_signed->IsResolved()) { + return true; + } + return false; + } void WriteActiveTextureBindfulSRV( const D3D12Shader::TextureBinding& host_shader_binding, D3D12_CPU_DESCRIPTOR_HANDLE handle); @@ -221,26 +237,37 @@ class TextureCache { D3D12_CPU_DESCRIPTOR_HANDLE handle) const; void MarkRangeAsResolved(uint32_t start_unscaled, uint32_t length_unscaled); - - bool IsResolutionScale2X() const { return scaled_resolve_buffer_ != nullptr; } - ID3D12Resource* GetScaledResolveBuffer() const { - return scaled_resolve_buffer_; - } - // Ensures the buffer tiles backing the range are resident. - bool EnsureScaledResolveBufferResident(uint32_t start_unscaled, - uint32_t length_unscaled); - void UseScaledResolveBufferForReading(); - void UseScaledResolveBufferForWriting(); - void MarkScaledResolveBufferUAVWritesCommitNeeded() { - if (scaled_resolve_buffer_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { - scaled_resolve_buffer_uav_writes_commit_needed_ = true; + static uint32_t GetMaxDrawResolutionScale( + const ui::d3d12::D3D12Provider& provider) { + // 31 because 2 GB buffers are used. + if (provider.GetTiledResourcesTier() < D3D12_TILED_RESOURCES_TIER_1 || + provider.GetVirtualAddressBitsPerResource() < 31) { + return 1; } + return kMaxDrawResolutionScale; + } + uint32_t GetDrawResolutionScale() const { return draw_resolution_scale_; } + // Ensures the tiles backing the range in the buffers are allocated. + bool EnsureScaledResolveMemoryCommitted(uint32_t start_unscaled, + uint32_t length_unscaled); + // Makes the specified range of up to 1-2 GB currently accessible on the GPU. + // One draw call can access only at most one range - the same memory is + // accessible through different buffers based on the range needed, so aliasing + // barriers are required. + bool MakeScaledResolveRangeCurrent(uint32_t start_unscaled, + uint32_t length_unscaled); + // These functions create a view of the range specified in the last successful + // MakeScaledResolveRangeCurrent call because that function must be called + // before this. + void CreateCurrentScaledResolveRangeUintPow2SRV( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2); + void CreateCurrentScaledResolveRangeUintPow2UAV( + D3D12_CPU_DESCRIPTOR_HANDLE handle, uint32_t element_size_bytes_pow2); + void TransitionCurrentScaledResolveRange(D3D12_RESOURCE_STATES new_state); + void MarkCurrentScaledResolveRangeUAVWritesCommitNeeded() { + assert_true(draw_resolution_scale_ > 1); + GetCurrentScaledResolveBuffer().SetUAVBarrierPending(); } - // Can't address more than 512 MB on Nvidia, so an offset is required. - void CreateScaledResolveBufferUintPow2UAV(D3D12_CPU_DESCRIPTOR_HANDLE handle, - uint32_t guest_address_bytes, - uint32_t guest_length_bytes, - uint32_t element_size_bytes_pow2); // Returns the ID3D12Resource of the front buffer texture (in // PIXEL_SHADER_RESOURCE state), or nullptr in case of failure, and writes the @@ -251,6 +278,8 @@ class TextureCache { xenos::TextureFormat& format_out); private: + static constexpr uint32_t kMaxDrawResolutionScale = 3; + enum class LoadMode { k8bpb, k16bpb, @@ -281,7 +310,7 @@ class TextureCache { kUnknown = kCount }; - struct LoadModeInfo { + struct LoadShaderInfo { const void* shader; size_t shader_size; // Log2 of the sizes, in bytes, of the source (guest) SRV and the @@ -289,11 +318,15 @@ class TextureCache { // may copy multiple blocks per one invocation. uint32_t srv_bpe_log2; uint32_t uav_bpe_log2; - // Optional shader for loading 2x-scaled resolve targets. - const void* shader_2x; - size_t shader_2x_size; - uint32_t srv_bpe_log2_2x; - uint32_t uav_bpe_log2_2x; + // Number of guest blocks (or texels for uncompressed) along X axis written + // by every compute shader thread - rows in the upload buffer are padded to + // at least this amount. + uint32_t host_x_blocks_per_thread; + }; + + struct LoadModeInfo { + // For different drawing resolution scales. + LoadShaderInfo shaders[kMaxDrawResolutionScale]; }; struct HostFormat { @@ -341,6 +374,12 @@ class TextureCache { ID3D12Resource* resource; uint64_t resource_size; D3D12_RESOURCE_STATES state; + // Whether the most up-to-date base / mips contain pages with data from a + // resolve operation (rather than from the CPU or memexport), primarily for + // choosing between piecewise linear gamma and sRGB when the former is + // emulated with the latter. + bool base_resolved; + bool mips_resolved; uint64_t last_usage_frame; uint64_t last_usage_time; @@ -375,6 +414,8 @@ class TextureCache { bool base_in_sync; // Whether the recent mip data has been loaded from the memory. bool mips_in_sync; + + bool IsResolved() const { return base_resolved || mips_resolved; } }; struct SRVDescriptorCachePage { @@ -427,6 +468,66 @@ class TextureCache { } }; + static uint32_t GetMaxHostTextureWidthHeight(xenos::DataDimension dimension) { + switch (dimension) { + case xenos::DataDimension::k1D: + case xenos::DataDimension::k2DOrStacked: + // 1D and 2D are emulated as 2D arrays. + return D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION; + case xenos::DataDimension::k3D: + return D3D12_REQ_TEXTURE3D_U_V_OR_W_DIMENSION; + case xenos::DataDimension::kCube: + return D3D12_REQ_TEXTURECUBE_DIMENSION; + default: + assert_unhandled_case(dimension); + return 0; + } + } + static uint32_t GetMaxHostTextureDepth(xenos::DataDimension dimension) { + switch (dimension) { + case xenos::DataDimension::k1D: + case xenos::DataDimension::k2DOrStacked: + // 1D and 2D are emulated as 2D arrays. + return D3D12_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION; + case xenos::DataDimension::k3D: + return D3D12_REQ_TEXTURE3D_U_V_OR_W_DIMENSION; + case xenos::DataDimension::kCube: + return D3D12_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION / 6 * 6; + default: + assert_unhandled_case(dimension); + return 0; + } + } + + class ScaledResolveVirtualBuffer { + public: + ScaledResolveVirtualBuffer(ID3D12Resource* resource, + D3D12_RESOURCE_STATES resource_state) + : resource_(resource), resource_state_(resource_state) {} + ID3D12Resource* resource() const { return resource_.Get(); } + D3D12_RESOURCE_STATES SetResourceState(D3D12_RESOURCE_STATES new_state) { + D3D12_RESOURCE_STATES old_state = resource_state_; + if (old_state == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { + uav_barrier_pending_ = false; + } + resource_state_ = new_state; + return old_state; + } + // After writing through a UAV. + void SetUAVBarrierPending() { + if (resource_state_ == D3D12_RESOURCE_STATE_UNORDERED_ACCESS) { + uav_barrier_pending_ = true; + } + } + // After an aliasing barrier (which is even stronger than an UAV barrier). + void ClearUAVBarrierPending() { uav_barrier_pending_ = false; } + + private: + Microsoft::WRL::ComPtr resource_; + D3D12_RESOURCE_STATES resource_state_; + bool uav_barrier_pending_ = false; + }; + // Whether the signed version of the texture has a different representation on // the host than its unsigned version (for example, if it's a fixed-point // texture emulated with a larger host pixel format). @@ -522,6 +623,42 @@ class TextureCache { // an error. void ClearBindings(); + size_t GetScaledResolveBufferCount() const { + assert_true(draw_resolution_scale_ > 1); + // Make sure any range up to 1 GB is accessible through 1 or 2 buffers. + // 2x2 scale buffers - just one 2 GB buffer for all 2 GB. + // 3x3 scale buffers - 4 buffers: + // +0.0 +0.5 +1.0 +1.5 +2.0 +2.5 +3.0 +3.5 +4.0 +4.5 + // |___________________|___________________| + // |___________________|______________| + // Buffer N has an offset of N * 1 GB in the scaled resolve address space. + // The logic is: + // - 2 GB can be accessed through a [0 GB ... 2 GB) buffer - only need one. + // - 2.1 GB needs [0 GB ... 2 GB) and [1 GB ... 2.1 GB) - two buffers. + // - 3 GB needs [0 GB ... 2 GB) and [1 GB ... 3 GB) - two buffers. + // - 3.1 GB needs [0 GB ... 2 GB), [1 GB ... 3 GB) and [2 GB ... 3.1 GB) - + // three buffers. + uint64_t address_space_size = + uint64_t(SharedMemory::kBufferSize) * + (draw_resolution_scale_ * draw_resolution_scale_); + return size_t((address_space_size - 1) >> 30); + } + // Returns indices of two scaled resolve virtual buffers that the location in + // memory may be accessible through. May be the same if it's a location near + // the beginning or the end of the address represented only by one buffer. + std::array GetPossibleScaledResolveBufferIndices( + uint64_t address_scaled) const { + assert_true(draw_resolution_scale_ > 1); + size_t address_gb = size_t(address_scaled >> 30); + size_t max_index = GetScaledResolveBufferCount() - 1; + // In different cases for 3x3: + // +0.0 +0.5 +1.0 +1.5 +2.0 +2.5 +3.0 +3.5 +4.0 +4.5 + // |12________2________|1_________2________| + // |1_________2________|1_________12__| + return std::array{ + std::min(address_gb, max_index), + std::min(std::max(address_gb, size_t(1)) - size_t(1), max_index)}; + } // Checks if there are any pages that contain scaled resolve data within the // range. bool IsRangeScaledResolved(uint32_t start_unscaled, uint32_t length_unscaled); @@ -534,6 +671,18 @@ class TextureCache { void ScaledResolveGlobalWatchCallback(uint32_t address_first, uint32_t address_last, bool invalidated_by_gpu); + // The index is also the gigabyte offset of the buffer from the start of the + // scaled physical memory address space. + size_t GetCurrentScaledResolveBufferIndex() const { + return scaled_resolve_1gb_buffer_indices_ + [scaled_resolve_current_range_start_scaled_ >> 30]; + } + ScaledResolveVirtualBuffer& GetCurrentScaledResolveBuffer() { + ScaledResolveVirtualBuffer* scaled_resolve_buffer = + scaled_resolve_2gb_buffers_[GetCurrentScaledResolveBufferIndex()]; + assert_not_null(scaled_resolve_buffer); + return *scaled_resolve_buffer; + } static const HostFormat host_formats_[64]; @@ -541,14 +690,14 @@ class TextureCache { D3D12CommandProcessor& command_processor_; const RegisterFile& register_file_; - bool bindless_resources_used_; D3D12SharedMemory& shared_memory_; + bool bindless_resources_used_; static const LoadModeInfo load_mode_info_[]; ID3D12RootSignature* load_root_signature_ = nullptr; ID3D12PipelineState* load_pipelines_[size_t(LoadMode::kCount)] = {}; - // Load pipelines for 2x-scaled resolved targets. - ID3D12PipelineState* load_pipelines_2x_[size_t(LoadMode::kCount)] = {}; + // Load pipelines for resolution-scaled resolve targets. + ID3D12PipelineState* load_pipelines_scaled_[size_t(LoadMode::kCount)] = {}; std::unordered_multimap textures_; uint64_t textures_total_size_ = 0; @@ -592,37 +741,73 @@ class TextureCache { }; uint8_t unsupported_format_features_used_[64]; - // The 2 GB tiled buffer for resolved data with 2x resolution scale. - static constexpr uint32_t kScaledResolveBufferSizeLog2 = 31; - static constexpr uint32_t kScaledResolveBufferSize = - 1u << kScaledResolveBufferSizeLog2; - ID3D12Resource* scaled_resolve_buffer_ = nullptr; - D3D12_RESOURCE_STATES scaled_resolve_buffer_state_ = - D3D12_RESOURCE_STATE_UNORDERED_ACCESS; - bool scaled_resolve_buffer_uav_writes_commit_needed_ = false; + uint32_t draw_resolution_scale_ = 1; + // The tiled buffer for resolved data with resolution scaling. + // Because on Direct3D 12 (at least on Windows 10 2004) typed SRV or UAV + // creation fails for offsets above 4 GB, a single tiled 4.5 GB buffer can't + // be used for 3x resolution scaling. + // Instead, "sliding window" buffers allowing to access a single range of up + // to 1 GB (or up to 2 GB, depending on the low bits) at any moment are used. + // Parts of 4.5 GB address space can be accessed through 2 GB buffers as: + // +0.0 +0.5 +1.0 +1.5 +2.0 +2.5 +3.0 +3.5 +4.0 +4.5 + // |___________________|___________________| or + // |___________________|______________| + // (2 GB is also the amount of scaled physical memory with 2x resolution + // scale, and older Intel GPUs, while support tiled resources, only support 31 + // virtual address bits per resource). + // Index is first gigabyte. Only including buffers containing over 1 GB + // (because otherwise the data will be fully contained in another). + // Size is calculated the same as in GetScaledResolveBufferCount. + ScaledResolveVirtualBuffer* + scaled_resolve_2gb_buffers_[(uint64_t(SharedMemory::kBufferSize) * + (kMaxDrawResolutionScale * + kMaxDrawResolutionScale) - + 1) >> + 30] = {}; // Not very big heaps (16 MB) because they are needed pretty sparsely. One - // scaled 1280x720x32bpp texture is slighly bigger than 14 MB. + // 2x-scaled 1280x720x32bpp texture is slighly bigger than 14 MB. static constexpr uint32_t kScaledResolveHeapSizeLog2 = 24; static constexpr uint32_t kScaledResolveHeapSize = - 1 << kScaledResolveHeapSizeLog2; + uint32_t(1) << kScaledResolveHeapSizeLog2; static_assert( (kScaledResolveHeapSize % D3D12_TILED_RESOURCE_TILE_SIZE_IN_BYTES) == 0, "Scaled resolve heap size must be a multiple of Direct3D tile size"); + static_assert( + kScaledResolveHeapSizeLog2 <= SharedMemory::kBufferSizeLog2, + "Scaled resolve heaps are assumed to be wholly mappable irrespective of " + "resolution scale, never truncated, for example, if the scaled resolve " + "address space is 4.5 GB, but the heap size is 1 GB"); + static_assert( + kScaledResolveHeapSizeLog2 <= 30, + "Scaled resolve heaps are assumed to only be wholly mappable to up to " + "two 2 GB buffers"); // Resident portions of the tiled buffer. - ID3D12Heap* scaled_resolve_heaps_[kScaledResolveBufferSize >> - kScaledResolveHeapSizeLog2] = {}; + std::vector scaled_resolve_heaps_; // Number of currently resident portions of the tiled buffer, for profiling. uint32_t scaled_resolve_heap_count_ = 0; // Global watch for scaled resolve data invalidation. SharedMemory::GlobalWatchHandle scaled_resolve_global_watch_handle_ = nullptr; + // Current scaled resolve state. + // For aliasing barrier placement, last owning buffer index for each of 1 GB. + size_t + scaled_resolve_1gb_buffer_indices_[(uint64_t(SharedMemory::kBufferSize) * + kMaxDrawResolutionScale * + kMaxDrawResolutionScale + + ((uint32_t(1) << 30) - 1)) >> + 30]; + // Range used in the last successful MakeScaledResolveRangeCurrent call. + uint64_t scaled_resolve_current_range_start_scaled_; + uint64_t scaled_resolve_current_range_length_scaled_; xe::global_critical_region global_critical_region_; // Bit vector storing whether each 4 KB physical memory page contains scaled - // resolve data. uint32_t rather than uint64_t because parts of it are sent to - // shaders. + // resolve data. uint32_t rather than uint64_t because parts of it can be sent + // to shaders. uint32_t* scaled_resolve_pages_ = nullptr; // Second level of the bit vector for faster rejection of non-scaled textures. - uint64_t scaled_resolve_pages_l2_[(512 << 20) >> (12 + 5 + 6)]; + // >> 12 for 4 KB pages, >> 5 for uint32_t level 1 bits, >> 6 for uint64_t + // level 2 bits. + uint64_t scaled_resolve_pages_l2_[SharedMemory::kBufferSize >> (12 + 5 + 6)]; }; } // namespace d3d12 diff --git a/src/xenia/gpu/draw_util.cc b/src/xenia/gpu/draw_util.cc index ca3e4ed37..315b0a3c9 100644 --- a/src/xenia/gpu/draw_util.cc +++ b/src/xenia/gpu/draw_util.cc @@ -157,7 +157,7 @@ bool IsPixelShaderNeededWithRasterization(const Shader& shader, // // Memory export is an obvious intentional side effect. if (shader.kills_pixels() || shader.writes_depth() || - !shader.memexport_stream_constants().empty() || + shader.is_valid_memexport_used() || (shader.writes_color_target(0) && DoesCoverageDependOnAlpha(regs.Get()))) { return true; @@ -183,13 +183,12 @@ bool IsPixelShaderNeededWithRasterization(const Shader& shader, return false; } -void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, - float pixel_size_y, bool origin_bottom_left, - float x_max, float y_max, bool allow_reverse_z, - bool convert_z_to_float24, +void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale, + bool origin_bottom_left, float x_max, float y_max, + bool allow_reverse_z, bool convert_z_to_float24, + bool full_float24_in_0_to_1, ViewportInfo& viewport_info_out) { - assert_true(pixel_size_x >= 1.0f); - assert_true(pixel_size_y >= 1.0f); + assert_true(resolution_scale >= 1); assert_true(x_max >= 1.0f); assert_true(y_max >= 1.0f); @@ -235,8 +234,9 @@ void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, if (pa_cl_vte_cntl.vport_x_scale_ena) { float pa_cl_vport_xscale = regs[XE_GPU_REG_PA_CL_VPORT_XSCALE].f32; - float viewport_scale_x_abs = std::abs(pa_cl_vport_xscale) * pixel_size_x; - viewport_left = viewport_offset_x * pixel_size_x - viewport_scale_x_abs; + float viewport_scale_x_abs = + std::abs(pa_cl_vport_xscale) * resolution_scale; + viewport_left = viewport_offset_x * resolution_scale - viewport_scale_x_abs; float viewport_right = viewport_left + viewport_scale_x_abs * 2.0f; // Keep the viewport in the positive quarter-plane for simplicity of // clamping to the maximum supported bounds. @@ -268,15 +268,16 @@ void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, // enabled, via the shader. viewport_left = 0.0f; viewport_width = std::min( - float(xenos::kTexture2DCubeMaxWidthHeight) * pixel_size_x, x_max); - ndc_scale_x = (2.0f * pixel_size_x) / viewport_width; + float(xenos::kTexture2DCubeMaxWidthHeight) * resolution_scale, x_max); + ndc_scale_x = (2.0f * resolution_scale) / viewport_width; ndc_offset_x = viewport_offset_x * ndc_scale_x - 1.0f; } if (pa_cl_vte_cntl.vport_y_scale_ena) { float pa_cl_vport_yscale = regs[XE_GPU_REG_PA_CL_VPORT_YSCALE].f32; - float viewport_scale_y_abs = std::abs(pa_cl_vport_yscale) * pixel_size_y; - viewport_top = viewport_offset_y * pixel_size_y - viewport_scale_y_abs; + float viewport_scale_y_abs = + std::abs(pa_cl_vport_yscale) * resolution_scale; + viewport_top = viewport_offset_y * resolution_scale - viewport_scale_y_abs; float viewport_bottom = viewport_top + viewport_scale_y_abs * 2.0f; float cutoff_top = std::fmax(-viewport_top, 0.0f); float cutoff_bottom = std::fmax(viewport_bottom - y_max, 0.0f); @@ -302,17 +303,18 @@ void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, } else { viewport_top = 0.0f; viewport_height = std::min( - float(xenos::kTexture2DCubeMaxWidthHeight) * pixel_size_y, y_max); - ndc_scale_y = (2.0f * pixel_size_y) / viewport_height; + float(xenos::kTexture2DCubeMaxWidthHeight) * resolution_scale, y_max); + ndc_scale_y = (2.0f * resolution_scale) / viewport_height; ndc_offset_y = viewport_offset_y * ndc_scale_y - 1.0f; } // Apply the vertex half-pixel offset via the shader (it must not affect - // clipping, otherwise with SSAA or resolution scale, samples in the left/top - // half will never be covered). + // clipping, otherwise with resolution scale, samples in the left/top half + // will never be covered). if (cvars::half_pixel_offset && !pa_su_vtx_cntl.pix_center) { - ndc_offset_x += (0.5f * 2.0f * pixel_size_x) / viewport_width; - ndc_offset_y += (0.5f * 2.0f * pixel_size_y) / viewport_height; + float half_pixel_offset_ndc_scale = 0.5f * 2.0f * resolution_scale; + ndc_offset_x += half_pixel_offset_ndc_scale / viewport_width; + ndc_offset_y += half_pixel_offset_ndc_scale / viewport_height; } if (origin_bottom_left) { @@ -343,17 +345,27 @@ void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, ndc_scale_z = -ndc_scale_z; ndc_offset_z = 1.0f - ndc_offset_z; } - if (convert_z_to_float24 && - GetDepthControlForCurrentEdramMode(regs).z_enable && + if (GetDepthControlForCurrentEdramMode(regs).z_enable && regs.Get().depth_format == xenos::DepthRenderTargetFormat::kD24FS8) { - // Need to adjust the bounds that the resulting depth values will be clamped - // to after the pixel shader. Preferring adding some error to interpolated Z - // instead if conversion can't be done exactly, without modifying clipping - // bounds by adjusting Z in vertex shaders, as that may cause polygons - // placed explicitly at Z = 0 or Z = W to be clipped. - viewport_z_min = xenos::Float20e4To32(xenos::Float32To20e4(viewport_z_min)); - viewport_z_max = xenos::Float20e4To32(xenos::Float32To20e4(viewport_z_max)); + if (convert_z_to_float24) { + // Need to adjust the bounds that the resulting depth values will be + // clamped to after the pixel shader. Preferring adding some error to + // interpolated Z instead if conversion can't be done exactly, without + // modifying clipping bounds by adjusting Z in vertex shaders, as that may + // cause polygons placed explicitly at Z = 0 or Z = W to be clipped. + viewport_z_min = + xenos::Float20e4To32(xenos::Float32To20e4(viewport_z_min)); + viewport_z_max = + xenos::Float20e4To32(xenos::Float32To20e4(viewport_z_max)); + } + if (full_float24_in_0_to_1) { + // Remap the full [0...2) float24 range to [0...1) support data round-trip + // during render target ownership transfer of EDRAM tiles through depth + // input without unrestricted depth range. + viewport_z_min *= 0.5f; + viewport_z_max *= 0.5f; + } } viewport_info_out.left = viewport_left; @@ -373,6 +385,8 @@ void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, void GetScissor(const RegisterFile& regs, Scissor& scissor_out) { // FIXME(Triang3l): Screen scissor isn't applied here, but it seems to be // unused on Xbox 360 Direct3D 9. + // TODO(Triang3l): Clamp X to RB_SURFACE_INFO::surface_pitch to prevent + // overflow with target-indepdent rasterization (with ROV). auto pa_sc_window_scissor_tl = regs.Get(); auto pa_sc_window_scissor_br = regs.Get(); uint32_t tl_x = pa_sc_window_scissor_tl.tl_x; @@ -455,29 +469,68 @@ xenos::CopySampleSelect SanitizeCopySampleSelect( return copy_sample_select; } +void GetResolveEdramTileSpan(ResolveEdramPackedInfo edram_info, + ResolveAddressPackedInfo address_info, + uint32_t& base_out, uint32_t& row_length_used_out, + uint32_t& rows_out) { + uint32_t x_scale_log2 = + 3 + uint32_t(edram_info.msaa_samples >= xenos::MsaaSamples::k4X) + + edram_info.format_is_64bpp; + uint32_t x0 = (address_info.local_x_div_8 << x_scale_log2) / + xenos::kEdramTileWidthSamples; + uint32_t x1 = (((address_info.local_x_div_8 + address_info.width_div_8) + << x_scale_log2) + + (xenos::kEdramTileWidthSamples - 1)) / + xenos::kEdramTileWidthSamples; + uint32_t y_scale_log2 = + 3 + uint32_t(edram_info.msaa_samples >= xenos::MsaaSamples::k2X); + uint32_t y0 = (address_info.local_y_div_8 << y_scale_log2) / + xenos::kEdramTileHeightSamples; + uint32_t y1 = (((address_info.local_y_div_8 + address_info.height_div_8) + << y_scale_log2) + + (xenos::kEdramTileHeightSamples - 1)) / + xenos::kEdramTileHeightSamples; + base_out = edram_info.base_tiles + y0 * edram_info.pitch_tiles + x0; + row_length_used_out = x1 - x0; + rows_out = y1 - y0; +} + const ResolveCopyShaderInfo resolve_copy_shader_info[size_t(ResolveCopyShaderIndex::kCount)] = { {"Resolve Copy Fast 32bpp 1x/2xMSAA", 1, false, 4, 4, 6, 3}, {"Resolve Copy Fast 32bpp 4xMSAA", 1, false, 4, 4, 6, 3}, {"Resolve Copy Fast 32bpp 2xRes", 2, false, 4, 4, 4, 3}, + {"Resolve Copy Fast 32bpp 3xRes 1x/2xMSAA", 3, false, 3, 3, 4, 3}, + {"Resolve Copy Fast 32bpp 3xRes 4xMSAA", 3, false, 3, 3, 4, 3}, {"Resolve Copy Fast 64bpp 1x/2xMSAA", 1, false, 4, 4, 5, 3}, {"Resolve Copy Fast 64bpp 4xMSAA", 1, false, 3, 4, 5, 3}, {"Resolve Copy Fast 64bpp 2xRes", 2, false, 4, 4, 3, 3}, + {"Resolve Copy Fast 64bpp 3xRes", 3, false, 3, 3, 3, 3}, {"Resolve Copy Full 8bpp", 1, true, 2, 3, 6, 3}, {"Resolve Copy Full 8bpp 2xRes", 2, false, 4, 3, 4, 3}, + {"Resolve Copy Full 8bpp 3xRes", 3, true, 2, 3, 6, 3}, {"Resolve Copy Full 16bpp", 1, true, 2, 3, 5, 3}, {"Resolve Copy Full 16bpp 2xRes", 2, false, 4, 3, 3, 3}, + {"Resolve Copy Full 16bpp from 32bpp 3xRes", 3, true, 2, 3, 5, 3}, + {"Resolve Copy Full 16bpp from 64bpp 3xRes", 3, false, 3, 3, 5, 3}, {"Resolve Copy Full 32bpp", 1, true, 2, 4, 5, 3}, {"Resolve Copy Full 32bpp 2xRes", 2, false, 4, 4, 3, 3}, + {"Resolve Copy Full 32bpp from 32bpp 3xRes", 3, true, 2, 3, 4, 3}, + {"Resolve Copy Full 32bpp from 64bpp 3xRes", 3, false, 3, 3, 4, 3}, {"Resolve Copy Full 64bpp", 1, true, 2, 4, 5, 3}, {"Resolve Copy Full 64bpp 2xRes", 2, false, 4, 4, 3, 3}, + {"Resolve Copy Full 64bpp from 32bpp 3xRes", 3, true, 2, 3, 3, 3}, + {"Resolve Copy Full 64bpp from 64bpp 3xRes", 3, false, 3, 3, 3, 3}, {"Resolve Copy Full 128bpp", 1, true, 2, 4, 4, 3}, {"Resolve Copy Full 128bpp 2xRes", 2, false, 4, 4, 3, 3}, + {"Resolve Copy Full 128bpp from 32bpp 3xRes", 3, true, 2, 4, 3, 3}, + {"Resolve Copy Full 128bpp from 64bpp 3xRes", 3, false, 3, 4, 3, 3}, }; bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, TraceWriter& trace_writer, uint32_t resolution_scale, - bool edram_16_as_minus_1_to_1, ResolveInfo& info_out) { + bool fixed_16_truncated_to_minus_1_to_1, + ResolveInfo& info_out) { auto rb_copy_control = regs.Get(); info_out.rb_copy_control = rb_copy_control; @@ -582,6 +635,15 @@ bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, y1 = xe::align(y1, int32_t(xenos::kResolveAlignmentPixels)); auto rb_surface_info = regs.Get(); + if (rb_surface_info.msaa_samples > xenos::MsaaSamples::k4X) { + // Safety check because a lot of code assumes up to 4x. + assert_always(); + XELOGE( + "{}x MSAA requested by the guest in a resolve, Xenos only supports up " + "to 4x", + uint32_t(1) << uint32_t(rb_surface_info.msaa_samples)); + return false; + } // Clamp to the EDRAM surface pitch (maximum possible surface pitch is also // assumed to be the largest resolvable size). @@ -754,6 +816,22 @@ bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, cvars::resolve_resolution_scale_duplicate_second_pixel && cvars::half_pixel_offset && !regs.Get().pix_center; int32_t exp_bias = is_depth ? 0 : rb_copy_dest_info.copy_dest_exp_bias; + ResolveEdramPackedInfo depth_edram_info; + depth_edram_info.packed = 0; + if (is_depth || rb_copy_control.depth_clear_enable) { + depth_edram_info.pitch_tiles = surface_pitch_tiles; + depth_edram_info.msaa_samples = rb_surface_info.msaa_samples; + depth_edram_info.is_depth = 1; + depth_edram_info.base_tiles = + rb_depth_info.depth_base + edram_base_offset_tiles; + depth_edram_info.format = uint32_t(rb_depth_info.depth_format); + depth_edram_info.format_is_64bpp = 0; + depth_edram_info.duplicate_second_pixel = uint32_t(duplicate_second_pixel); + info_out.depth_original_base = rb_depth_info.depth_base; + } else { + info_out.depth_original_base = 0; + } + info_out.depth_edram_info = depth_edram_info; ResolveEdramPackedInfo color_edram_info; color_edram_info.packed = 0; if (!is_depth) { @@ -771,7 +849,7 @@ bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, color_edram_info.format = uint32_t(color_info.color_format); color_edram_info.format_is_64bpp = is_64bpp; color_edram_info.duplicate_second_pixel = uint32_t(duplicate_second_pixel); - if (edram_16_as_minus_1_to_1 && + if (fixed_16_truncated_to_minus_1_to_1 && (color_info.color_format == xenos::ColorRenderTargetFormat::k_16_16 || color_info.color_format == xenos::ColorRenderTargetFormat::k_16_16_16_16)) { @@ -781,21 +859,11 @@ bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, // to create a new copy info structure with one more bit just for this). exp_bias = std::min(exp_bias + int32_t(5), int32_t(31)); } + info_out.color_original_base = color_info.color_base; + } else { + info_out.color_original_base = 0; } info_out.color_edram_info = color_edram_info; - ResolveEdramPackedInfo depth_edram_info; - depth_edram_info.packed = 0; - if (is_depth || rb_copy_control.depth_clear_enable) { - depth_edram_info.pitch_tiles = surface_pitch_tiles; - depth_edram_info.msaa_samples = rb_surface_info.msaa_samples; - depth_edram_info.is_depth = 1; - depth_edram_info.base_tiles = - rb_depth_info.depth_base + edram_base_offset_tiles; - depth_edram_info.format = uint32_t(rb_depth_info.depth_format); - depth_edram_info.format_is_64bpp = 0; - depth_edram_info.duplicate_second_pixel = uint32_t(duplicate_second_pixel); - } - info_out.depth_edram_info = depth_edram_info; // Patch and write RB_COPY_DEST_INFO. info_out.rb_copy_dest_info = rb_copy_dest_info; @@ -813,7 +881,7 @@ bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, info_out.rb_color_clear = regs[XE_GPU_REG_RB_COLOR_CLEAR].u32; info_out.rb_color_clear_lo = regs[XE_GPU_REG_RB_COLOR_CLEAR_LO].u32; - XELOGGPU( + XELOGD( "Resolve: {},{} <= x,y < {},{}, {} -> {} at 0x{:08X} (first tile at " "0x{:08X}, length 0x{:08X})", x0, y0, x1, y1, @@ -834,64 +902,116 @@ ResolveCopyShaderIndex ResolveInfo::GetCopyShader( bool is_depth = IsCopyingDepth(); ResolveEdramPackedInfo edram_info = is_depth ? depth_edram_info : color_edram_info; + bool source_is_64bpp = !is_depth && color_edram_info.format_is_64bpp != 0; if (is_depth || (!rb_copy_dest_info.copy_dest_exp_bias && xenos::IsSingleCopySampleSelected(address.copy_sample_select) && xenos::IsColorResolveFormatBitwiseEquivalent( xenos::ColorRenderTargetFormat(color_edram_info.format), xenos::ColorFormat(rb_copy_dest_info.copy_dest_format)))) { - bool is_64bpp = is_depth ? false : (color_edram_info.format_is_64bpp != 0); - if (resolution_scale >= 2) { - shader = is_64bpp ? ResolveCopyShaderIndex::kFast64bpp2xRes - : ResolveCopyShaderIndex::kFast32bpp2xRes; - } else { - if (edram_info.msaa_samples >= xenos::MsaaSamples::k4X) { - shader = is_64bpp ? ResolveCopyShaderIndex::kFast64bpp4xMSAA - : ResolveCopyShaderIndex::kFast32bpp4xMSAA; - } else { - shader = is_64bpp ? ResolveCopyShaderIndex::kFast64bpp1x2xMSAA - : ResolveCopyShaderIndex::kFast32bpp1x2xMSAA; - } + switch (resolution_scale) { + case 1: + if (edram_info.msaa_samples >= xenos::MsaaSamples::k4X) { + shader = source_is_64bpp ? ResolveCopyShaderIndex::kFast64bpp4xMSAA + : ResolveCopyShaderIndex::kFast32bpp4xMSAA; + } else { + shader = source_is_64bpp ? ResolveCopyShaderIndex::kFast64bpp1x2xMSAA + : ResolveCopyShaderIndex::kFast32bpp1x2xMSAA; + } + break; + case 2: + shader = source_is_64bpp ? ResolveCopyShaderIndex::kFast64bpp2xRes + : ResolveCopyShaderIndex::kFast32bpp2xRes; + break; + case 3: + if (source_is_64bpp) { + shader = ResolveCopyShaderIndex::kFast64bpp3xRes; + } else { + shader = edram_info.msaa_samples >= xenos::MsaaSamples::k4X + ? ResolveCopyShaderIndex::kFast32bpp3xRes4xMSAA + : ResolveCopyShaderIndex::kFast32bpp3xRes1x2xMSAA; + } + break; + default: + assert_unhandled_case(resolution_scale); } } else { const FormatInfo& dest_format_info = *FormatInfo::Get( xenos::TextureFormat(rb_copy_dest_info.copy_dest_format)); - if (resolution_scale >= 2) { - switch (dest_format_info.bits_per_pixel) { - case 8: - shader = ResolveCopyShaderIndex::kFull8bpp2xRes; - break; - case 16: - shader = ResolveCopyShaderIndex::kFull16bpp2xRes; - break; - case 32: - shader = ResolveCopyShaderIndex::kFull32bpp2xRes; - break; - case 64: - shader = ResolveCopyShaderIndex::kFull64bpp2xRes; - break; - case 128: - shader = ResolveCopyShaderIndex::kFull128bpp2xRes; - break; - } - } else { - switch (dest_format_info.bits_per_pixel) { - case 8: - shader = ResolveCopyShaderIndex::kFull8bpp; - break; - case 16: - shader = ResolveCopyShaderIndex::kFull16bpp; - break; - case 32: - shader = ResolveCopyShaderIndex::kFull32bpp; - break; - case 64: - shader = ResolveCopyShaderIndex::kFull64bpp; - break; - case 128: - shader = ResolveCopyShaderIndex::kFull128bpp; - break; - } + switch (resolution_scale) { + case 1: + switch (dest_format_info.bits_per_pixel) { + case 8: + shader = ResolveCopyShaderIndex::kFull8bpp; + break; + case 16: + shader = ResolveCopyShaderIndex::kFull16bpp; + break; + case 32: + shader = ResolveCopyShaderIndex::kFull32bpp; + break; + case 64: + shader = ResolveCopyShaderIndex::kFull64bpp; + break; + case 128: + shader = ResolveCopyShaderIndex::kFull128bpp; + break; + default: + assert_unhandled_case(dest_format_info.bits_per_pixel); + } + break; + case 2: + switch (dest_format_info.bits_per_pixel) { + case 8: + shader = ResolveCopyShaderIndex::kFull8bpp2xRes; + break; + case 16: + shader = ResolveCopyShaderIndex::kFull16bpp2xRes; + break; + case 32: + shader = ResolveCopyShaderIndex::kFull32bpp2xRes; + break; + case 64: + shader = ResolveCopyShaderIndex::kFull64bpp2xRes; + break; + case 128: + shader = ResolveCopyShaderIndex::kFull128bpp2xRes; + break; + default: + assert_unhandled_case(dest_format_info.bits_per_pixel); + } + break; + case 3: + switch (dest_format_info.bits_per_pixel) { + case 8: + shader = ResolveCopyShaderIndex::kFull8bpp3xRes; + break; + case 16: + shader = source_is_64bpp + ? ResolveCopyShaderIndex::kFull16bppFrom64bpp3xRes + : ResolveCopyShaderIndex::kFull16bppFrom32bpp3xRes; + break; + case 32: + shader = source_is_64bpp + ? ResolveCopyShaderIndex::kFull32bppFrom64bpp3xRes + : ResolveCopyShaderIndex::kFull32bppFrom32bpp3xRes; + break; + case 64: + shader = source_is_64bpp + ? ResolveCopyShaderIndex::kFull64bppFrom64bpp3xRes + : ResolveCopyShaderIndex::kFull64bppFrom32bpp3xRes; + break; + case 128: + shader = source_is_64bpp + ? ResolveCopyShaderIndex::kFull128bppFrom64bpp3xRes + : ResolveCopyShaderIndex::kFull128bppFrom32bpp3xRes; + break; + default: + assert_unhandled_case(dest_format_info.bits_per_pixel); + } + break; + default: + assert_unhandled_case(resolution_scale); } } diff --git a/src/xenia/gpu/draw_util.h b/src/xenia/gpu/draw_util.h index 52b952281..f95dece17 100644 --- a/src/xenia/gpu/draw_util.h +++ b/src/xenia/gpu/draw_util.h @@ -93,10 +93,10 @@ struct ViewportInfo { // a viewport, plus values to multiply-add the returned position by, usable on // host graphics APIs such as Direct3D 11+ and Vulkan, also forcing it to the // Direct3D clip space with 0...W Z rather than -W...W. -void GetHostViewportInfo(const RegisterFile& regs, float pixel_size_x, - float pixel_size_y, bool origin_bottom_left, - float x_max, float y_max, bool allow_reverse_z, - bool convert_z_to_float24, +void GetHostViewportInfo(const RegisterFile& regs, uint32_t resolution_scale, + bool origin_bottom_left, float x_max, float y_max, + bool allow_reverse_z, bool convert_z_to_float24, + bool full_float24_in_0_to_1, ViewportInfo& viewport_info_out); struct Scissor { @@ -107,6 +107,16 @@ struct Scissor { }; void GetScissor(const RegisterFile& regs, Scissor& scissor_out); +// Scales, and shift amounts of the upper 32 bits of the 32x32=64-bit +// multiplication result, for fast division and multiplication by +// EDRAM-tile-related amounts. +constexpr uint32_t kDivideScale3 = 0xAAAAAAABu; +constexpr uint32_t kDivideUpperShift3 = 1; +constexpr uint32_t kDivideScale5 = 0xCCCCCCCDu; +constexpr uint32_t kDivideUpperShift5 = 2; +constexpr uint32_t kDivideScale15 = 0x88888889u; +constexpr uint32_t kDivideUpperShift15 = 3; + // To avoid passing values that the shader won't understand (even though // Direct3D 9 shouldn't pass them anyway). xenos::CopySampleSelect SanitizeCopySampleSelect( @@ -118,11 +128,11 @@ xenos::CopySampleSelect SanitizeCopySampleSelect( union ResolveEdramPackedInfo { struct { - // With offset to the 160x32 region that local_x/y_div_8 are relative to, - // and with 32bpp/64bpp taken into account. + // With 32bpp/64bpp taken into account. uint32_t pitch_tiles : xenos::kEdramPitchTilesBits; xenos::MsaaSamples msaa_samples : xenos::kMsaaSamplesBits; uint32_t is_depth : 1; + // With offset to the 160x32 region that local_x/y_div_8 are relative to. uint32_t base_tiles : xenos::kEdramBaseTilesBits; uint32_t format : xenos::kRenderTargetFormatBits; uint32_t format_is_64bpp : 1; @@ -165,26 +175,45 @@ union ResolveAddressPackedInfo { static_assert(sizeof(ResolveAddressPackedInfo) <= sizeof(uint32_t), "ResolveAddressPackedInfo must be packable in uint32_t"); +// Returns tiles actually covered by a resolve area. Row length used is width of +// the area in tiles, but the pitch between rows is edram_info.pitch_tiles. +void GetResolveEdramTileSpan(ResolveEdramPackedInfo edram_info, + ResolveAddressPackedInfo address_info, + uint32_t& base_out, uint32_t& row_length_used_out, + uint32_t& rows_out); + // For backends with Shader Model 5-like compute, host shaders to use to perform // copying in resolve operations. enum class ResolveCopyShaderIndex { kFast32bpp1x2xMSAA, kFast32bpp4xMSAA, kFast32bpp2xRes, + kFast32bpp3xRes1x2xMSAA, + kFast32bpp3xRes4xMSAA, kFast64bpp1x2xMSAA, kFast64bpp4xMSAA, kFast64bpp2xRes, + kFast64bpp3xRes, kFull8bpp, kFull8bpp2xRes, + kFull8bpp3xRes, kFull16bpp, kFull16bpp2xRes, + kFull16bppFrom32bpp3xRes, + kFull16bppFrom64bpp3xRes, kFull32bpp, kFull32bpp2xRes, + kFull32bppFrom32bpp3xRes, + kFull32bppFrom64bpp3xRes, kFull64bpp, kFull64bpp2xRes, + kFull64bppFrom32bpp3xRes, + kFull64bppFrom64bpp3xRes, kFull128bpp, kFull128bpp2xRes, + kFull128bppFrom32bpp3xRes, + kFull128bppFrom64bpp3xRes, kCount, kUnknown = kCount, @@ -245,10 +274,18 @@ struct ResolveClearShaderConstants { struct ResolveInfo { reg::RB_COPY_CONTROL rb_copy_control; - // color_edram_info and depth_edram_info are set up if copying or clearing - // color and depth respectively, according to RB_COPY_CONTROL. - ResolveEdramPackedInfo color_edram_info; + // depth_edram_info / depth_original_base and color_edram_info / + // color_original_base are set up if copying or clearing color and depth + // respectively, according to RB_COPY_CONTROL. ResolveEdramPackedInfo depth_edram_info; + ResolveEdramPackedInfo color_edram_info; + // Original bases, without adjustment to a 160x32 region for packed offsets, + // for locating host render targets to perform clears if host render targets + // are used for EDRAM emulation - the same as the base that the render target + // will likely used for drawing next, to prevent unneeded tile ownership + // transfers between clears and first usage if clearing a subregion. + uint32_t depth_original_base; + uint32_t color_original_base; ResolveAddressPackedInfo address; @@ -271,6 +308,16 @@ struct ResolveInfo { return rb_copy_control.copy_src_select >= xenos::kMaxColorRenderTargets; } + // See GetResolveEdramTileSpan documentation for explanation. + void GetCopyEdramTileSpan(uint32_t& base_out, uint32_t& row_length_used_out, + uint32_t& rows_out, uint32_t& pitch_out) const { + ResolveEdramPackedInfo edram_info = + IsCopyingDepth() ? depth_edram_info : color_edram_info; + GetResolveEdramTileSpan(edram_info, address, base_out, row_length_used_out, + rows_out); + pitch_out = edram_info.pitch_tiles; + } + ResolveCopyShaderIndex GetCopyShader( uint32_t resolution_scale, ResolveCopyShaderConstants& constants_out, uint32_t& group_count_x_out, uint32_t& group_count_y_out) const; @@ -284,23 +331,10 @@ struct ResolveInfo { } void GetDepthClearShaderConstants( - bool has_float32_copy, ResolveClearShaderConstants& constants_out) const { + ResolveClearShaderConstants& constants_out) const { assert_true(IsClearingDepth()); constants_out.rt_specific.clear_value[0] = rb_depth_clear; - if (has_float32_copy) { - float depth32; - uint32_t depth24 = rb_depth_clear >> 8; - if (xenos::DepthRenderTargetFormat(depth_edram_info.format) == - xenos::DepthRenderTargetFormat::kD24S8) { - depth32 = depth24 * float(1.0f / 16777215.0f); - } else { - depth32 = xenos::Float20e4To32(depth24); - } - constants_out.rt_specific.clear_value[1] = - *reinterpret_cast(&depth32); - } else { - constants_out.rt_specific.clear_value[1] = rb_depth_clear; - } + constants_out.rt_specific.clear_value[1] = rb_depth_clear; constants_out.rt_specific.edram_info = depth_edram_info; constants_out.address_info = address; } @@ -309,9 +343,8 @@ struct ResolveInfo { ResolveClearShaderConstants& constants_out) const { assert_true(IsClearingColor()); // Not doing -32...32 to -1...1 clamping here as a hack for k_16_16 and - // k_16_16_16_16 blending emulation when using traditional host render - // targets as it would be inconsistent with the usual way of clearing with a - // quad. + // k_16_16_16_16 blending emulation when using host render targets as it + // would be inconsistent with the usual way of clearing with a depth quad. // TODO(Triang3l): Check which 32-bit portion is in which register. constants_out.rt_specific.clear_value[0] = rb_color_clear; constants_out.rt_specific.clear_value[1] = rb_color_clear_lo; @@ -338,13 +371,14 @@ struct ResolveInfo { }; // Returns false if there was an error obtaining the info making it totally -// invalid. edram_16_as_minus_1_to_1 is false if 16_16 and 16_16_16_16 color -// render target formats are properly emulated as -32...32, true if emulated as -// snorm, with range limited to -1...1, but with correct blending within that -// range. +// invalid. fixed_16_truncated_to_minus_1_to_1 is false if 16_16 and 16_16_16_16 +// color render target formats are properly emulated as -32...32, true if +// emulated as snorm, with range limited to -1...1, but with correct blending +// within that range. bool GetResolveInfo(const RegisterFile& regs, const Memory& memory, TraceWriter& trace_writer, uint32_t resolution_scale, - bool edram_16_as_minus_1_to_1, ResolveInfo& info_out); + bool fixed_16_truncated_to_minus_1_to_1, + ResolveInfo& info_out); // Taking user configuration - stretching or letterboxing, overscan region to // crop to fill while maintaining the aspect ratio - into account, returns the diff --git a/src/xenia/gpu/dxbc.h b/src/xenia/gpu/dxbc.h index ea4c448e5..c51076cbc 100644 --- a/src/xenia/gpu/dxbc.h +++ b/src/xenia/gpu/dxbc.h @@ -12,6 +12,7 @@ #include #include +#include #include #include "xenia/base/assert.h" @@ -23,6 +24,12 @@ namespace dxbc { // Utilities for generating shader model 5_1 byte code (for Direct3D 12). // +// This file contains only parts of DXBC used by Xenia currently or previously, +// not all of DXBC. If an operation, operand, blob or something else is needed +// for Xenia, but is not here, add it (after reproducing it with FXC to see what +// dependencies - such as STAT fields being modified - and encoding specifics it +// has). +// // IMPORTANT CONTRIBUTION NOTES: // // While DXBC may look like a flexible and high-level representation with highly @@ -92,11 +99,117 @@ namespace dxbc { // Clamping of non-negative values must be done first to the lower bound (using // max), then to the upper bound (using min), to match the saturate modifier // behavior, which results in 0 for NaN. +// +// Sources (apart from reverse engineering of compiled shaders): +// - Hash: +// - DXBCChecksum from GPUOpen-Archive/common-src-ShaderUtils +// - RDEF: +// - d3d12shader.h from the Windows SDK +// - D3D10ShaderObject.h from GPUOpen-Archive/common-src-ShaderUtils +// - ISGN, PCSG, OSGN: +// - d3d12shader.h from the Windows SDK +// - DxbcSignatures.h from DXILConv +// - SHEX: +// - d3d12TokenizedProgramFormat.hpp from the Windows Driver Kit +// - SFI0: +// - DXBCUtils.h from the D3D12 Translation Layer +// - STAT: +// - D3D10ShaderObject.h fromGPUOpen-Archive/common-src-ShaderUtils +// - d3dcompiler_parse_stat from Wine +// - d3d12shader.h from the Windows SDK +// Note that d3d12shader.h contains structures for use with Direct3D reflection +// interfaces, not the DXBC containers themselves. They may have fields removed, +// reordered or added. +// +// Pointers in RDEF and signatures are offsets from the start of the blob (not +// including the FourCC and the size), 0 pointer is considered null when +// applicable. +// +// Even if DXIL emission is added to Xenia, it's still desirable to keep the +// DXBC emitter as a usable option (unless supporting it becomes excessively +// burdensome) - apart from much worse readability of the resulting DXIL code, +// the UWP GPU driver on the Xbox One also doesn't support DXIL. constexpr uint8_t kAlignmentPadding = 0xAB; +constexpr uint32_t MakeFourCC(uint32_t ch0, uint32_t ch1, uint32_t ch2, + uint32_t ch3) { + return uint32_t(ch0) | (uint32_t(ch1) << 8) | (uint32_t(ch2) << 16) | + (uint32_t(ch3) << 24); +} + +struct ContainerHeader { + static constexpr uint32_t kFourCC = MakeFourCC('D', 'X', 'B', 'C'); + static constexpr uint16_t kVersionMajor = 1; + static constexpr uint16_t kVersionMinor = 0; + uint32_t fourcc; + // Of the entire DXBC container including this header, with this set to 0 + // before hashing. Calculate using CalculateDXBCChecksum from + // GPUOpen-Archive/common-src-ShaderUtils. + uint32_t hash[4]; + uint16_t version_major; + uint16_t version_minor; + uint32_t size_bytes; + uint32_t blob_count; + void InitializeIdentification() { + fourcc = kFourCC; + version_major = kVersionMajor; + version_minor = kVersionMinor; + } + // Followed by uint32_t[blob_count] offsets from the start of the container in + // bytes to the start of each blob's header. +}; +static_assert(alignof(ContainerHeader) <= sizeof(uint32_t)); + +struct BlobHeader { + enum class FourCC : uint32_t { + // In order of appearance in a container. + kResourceDefinition = MakeFourCC('R', 'D', 'E', 'F'), + kInputSignature = MakeFourCC('I', 'S', 'G', 'N'), + kPatchConstantSignature = MakeFourCC('P', 'C', 'S', 'G'), + kOutputSignature = MakeFourCC('O', 'S', 'G', 'N'), + kShaderEx = MakeFourCC('S', 'H', 'E', 'X'), + kShaderFeatureInfo = MakeFourCC('S', 'F', 'I', '0'), + kStatistics = MakeFourCC('S', 'T', 'A', 'T'), + }; + FourCC fourcc; + uint32_t size_bytes; +}; +static_assert(alignof(BlobHeader) <= sizeof(uint32_t)); + +// Appends a string to a DWORD stream, returns the DWORD-aligned length. +inline uint32_t AppendAlignedString(std::vector& dest, + const char* source) { + size_t size = std::strlen(source) + 1; + size_t size_aligned = xe::align(size, sizeof(uint32_t)); + size_t dest_position = dest.size(); + dest.resize(dest_position + size_aligned / sizeof(uint32_t)); + std::memcpy(&dest[dest_position], source, size); + // Don't leave uninitialized data, and make sure multiple uses of the + // assembler with the same input give the same DXBC for driver shader caching. + std::memset(reinterpret_cast(&dest[dest_position]) + size, + dxbc::kAlignmentPadding, size_aligned - size); + return uint32_t(size_aligned); +} + +// Returns the length of a string as if it was appended to a DWORD stream, in +// bytes. +inline uint32_t GetAlignedStringLength(const char* source) { + return uint32_t(xe::align(std::strlen(source) + 1, sizeof(uint32_t))); +} + +// D3DCOMPILE subset +enum CompileFlags : uint32_t { + // NoPreshader and PreferFlowControl are set by default for shader model 5_1. + kCompileFlagNoPreshader = 1 << 8, + kCompileFlagPreferFlowControl = 1 << 10, + kCompileFlagIeeeStrictness = 1 << 13, + kCompileFlagEnableUnboundedDescriptorTables = 1 << 20, + kCompileFlagAllResourcesBound = 1 << 21, +}; + // D3D_SHADER_VARIABLE_CLASS -enum class RdefVariableClass : uint32_t { +enum class RdefVariableClass : uint16_t { kScalar, kVector, kMatrixRows, @@ -108,7 +221,7 @@ enum class RdefVariableClass : uint32_t { }; // D3D_SHADER_VARIABLE_TYPE subset -enum class RdefVariableType : uint32_t { +enum class RdefVariableType : uint16_t { kInt = 2, kFloat = 3, kUInt = 19, @@ -122,6 +235,11 @@ enum RdefVariableFlags : uint32_t { kRdefVariableFlagInterfaceParameter = 1 << 3, }; +// D3D_SHADER_CBUFFER_FLAGS +enum RdefCbufferFlags : uint32_t { + kRdefCbufferFlagUserPacked = 1 << 0, +}; + // D3D_CBUFFER_TYPE enum class RdefCbufferType : uint32_t { kCbuffer, @@ -146,8 +264,8 @@ enum class RdefInputType : uint32_t { kUAVRWStructuredWithCounter, }; -// D3D_RESOURCE_RETURN_TYPE -enum class RdefReturnType : uint32_t { +// D3D_RESOURCE_RETURN_TYPE / D3D10_SB_RESOURCE_RETURN_TYPE +enum class ResourceReturnType : uint32_t { kVoid, kUNorm, kSNorm, @@ -159,7 +277,7 @@ enum class RdefReturnType : uint32_t { kContinued, }; -// D3D12_SRV_DIMENSION/D3D12_UAV_DIMENSION +// D3D12_SRV_DIMENSION / D3D12_UAV_DIMENSION enum class RdefDimension : uint32_t { kUnknown = 0, @@ -187,16 +305,144 @@ enum RdefInputFlags : uint32_t { // For constant buffers, UserPacked is set if it was declared as `cbuffer` // rather than `ConstantBuffer` (not dynamically indexable; though // non-uniform dynamic indexing of constant buffers also didn't work on AMD - // drivers in 2018). + // drivers in 2018) - not to be confused with kRdefCbufferFlagUserPacked, + // which is set in a different case. kRdefInputFlagUserPacked = 1 << 0, kRdefInputFlagComparisonSampler = 1 << 1, - kRdefInputFlagComponent0 = 1 << 2, - kRdefInputFlagComponent1 = 1 << 3, - kRdefInputFlagsComponents = - kRdefInputFlagComponent0 | kRdefInputFlagComponent1, + // Texture and typed buffer component count minus 1. + kRdefInputFlagsComponentsShift = 2, + kRdefInputFlags2Component = 1 << kRdefInputFlagsComponentsShift, + kRdefInputFlags3Component = 2 << kRdefInputFlagsComponentsShift, + kRdefInputFlags4Component = 3 << kRdefInputFlagsComponentsShift, kRdefInputFlagUnused = 1 << 4, }; +enum class RdefShaderModel : uint32_t { + kPixelShader5_1 = 0xFFFF0501u, + kVertexShader5_1 = 0xFFFE0501u, + kDomainShader5_1 = 0x44530501u, + kComputeShader5_1 = 0x43530501u, +}; + +// D3D12_SHADER_TYPE_DESC with some differences. +struct RdefType { + RdefVariableClass variable_class; + RdefVariableType variable_type; + // Matrix rows, 1 for other numeric, 0 if not applicable. + uint16_t row_count; + // Vector and matrix columns, 1 for other numerics, 0 if not applicable. + uint16_t column_count; + // 0 if not an array, except for structures which have 1. + uint16_t element_count; + // 0 if not a structure. + uint16_t member_count; + // Null if not a structure. + uint32_t members_ptr; + // Zero. + uint32_t unknown_0[4]; + // uint is called dword when it's scalar (but uint vectors are still uintN). + uint32_t name_ptr; +}; +static_assert(alignof(RdefType) <= sizeof(uint32_t)); + +struct RdefStructureMember { + uint32_t name_ptr; + uint32_t type_ptr; + uint32_t offset_bytes; +}; +static_assert(alignof(RdefStructureMember) <= sizeof(uint32_t)); + +// D3D12_SHADER_VARIABLE_DESC with some differences. +// Used for constants in constant buffers primarily. +struct RdefVariable { + uint32_t name_ptr; + uint32_t start_offset_bytes; + uint32_t size_bytes; + // RdefVariableFlags. + uint32_t flags; + uint32_t type_ptr; + uint32_t default_value_ptr; + // UINT32_MAX if no textures used. + uint32_t start_texture; + // Number of texture slots possibly used, 0 if no textures used. + uint32_t texture_size; + // UINT32_MAX if no textures used. + uint32_t start_sampler; + // Number of sampler slots possibly used, 0 if no textures used. + uint32_t sampler_size; +}; +static_assert(alignof(RdefVariable) <= sizeof(uint32_t)); + +// Sorted by ID. +struct RdefCbuffer { + uint32_t name_ptr; + uint32_t variable_count; + uint32_t variables_ptr; + // 16-byte-aligned. + uint32_t size_vector_aligned_bytes; + RdefCbufferType type; + // RdefCbufferFlags. + uint32_t flags; +}; +static_assert(alignof(RdefCbuffer) <= sizeof(uint32_t)); + +// D3D12_SHADER_INPUT_BIND_DESC with some differences. +// Placed in samplers, SRVs, UAVs, CBVs order, sorted by ID. +struct RdefInputBind { + uint32_t name_ptr; + RdefInputType type; + ResourceReturnType return_type; + RdefDimension dimension; + // 0 for multisampled textures (the sample count is specified in the SRV + // descriptor), constant buffers, ByteAddressBuffers and samplers. + // UINT32_MAX for single-sampled textures and typed buffers. + uint32_t sample_count; + uint32_t bind_point; + // 0 for unbounded. + uint32_t bind_count; + // RdefInputFlags. + uint32_t flags; + // Bind point space and ID added in shader model 5_1. + uint32_t bind_point_space; + uint32_t id; +}; +static_assert(alignof(RdefInputBind) <= sizeof(uint32_t)); + +struct RdefHeader { + enum class FourCC : uint32_t { + // RD11 in Shader Model 5_0 shaders. + k5_0 = MakeFourCC('R', 'D', '1', '1'), + // RD11 with reversed nibbles in Shader Model 5_0 shaders. + k5_1 = 0x25441313u, + }; + uint32_t cbuffer_count; + uint32_t cbuffers_ptr; + uint32_t input_bind_count; + uint32_t input_binds_ptr; + RdefShaderModel shader_model; + // CompileFlags. + uint32_t compile_flags; + uint32_t generator_name_ptr; + FourCC fourcc; + uint32_t sizeof_header_bytes; + uint32_t sizeof_cbuffer_bytes; + uint32_t sizeof_input_bind_bytes; + uint32_t sizeof_variable_bytes; + uint32_t sizeof_type_bytes; + uint32_t sizeof_structure_member_bytes; + // Zero. + uint32_t unknown_0; + void InitializeSizes() { + sizeof_header_bytes = sizeof(*this); + sizeof_cbuffer_bytes = sizeof(RdefCbuffer); + sizeof_input_bind_bytes = sizeof(RdefInputBind); + sizeof_variable_bytes = sizeof(RdefVariable); + sizeof_type_bytes = sizeof(RdefType); + sizeof_structure_member_bytes = sizeof(RdefStructureMember); + } +}; +static_assert(alignof(RdefHeader) <= sizeof(uint32_t)); + // D3D_NAME subset enum class Name : uint32_t { kUndefined = 0, @@ -205,6 +451,7 @@ enum class Name : uint32_t { kCullDistance = 3, kVertexID = 6, kIsFrontFace = 9, + kSampleIndex = 10, kFinalQuadEdgeTessFactor = 11, kFinalQuadInsideTessFactor = 12, kFinalTriEdgeTessFactor = 13, @@ -219,16 +466,27 @@ enum class SignatureRegisterComponentType : uint32_t { kFloat32, }; -// D3D10_INTERNALSHADER_PARAMETER +// D3D_MIN_PRECISION +enum class MinPrecision : uint8_t { + kDefault, + kFloat16, + kFloat2_8, + kSInt16 = 4, + kUInt16, + kAny16 = 0xF0, + kAny10, +}; + +// D3D11_INTERNALSHADER_PARAMETER_11_1 struct SignatureParameter { - // Offset in bytes from the start of the chunk. - uint32_t semantic_name; + uint32_t semantic_name_ptr; uint32_t semantic_index; // kUndefined for pixel shader outputs - inferred from the component type and // what is used in the shader. Name system_value; SignatureRegisterComponentType component_type; - // o#/v# when there's linkage, SV_Target index or -1 in pixel shader output. + // o#/v# when there's linkage, SV_Target index or UINT32_MAX in pixel shader + // output. uint32_t register_index; uint8_t mask; union { @@ -237,17 +495,45 @@ struct SignatureParameter { // For an input signature. uint8_t always_reads_mask; }; + MinPrecision min_precision; }; static_assert(alignof(SignatureParameter) <= sizeof(uint32_t)); // D3D10_INTERNALSHADER_SIGNATURE struct Signature { uint32_t parameter_count; - // Offset in bytes from the start of the chunk. - uint32_t parameter_info_offset; + // If the signature is empty, this still points after the header. + uint32_t parameter_info_ptr; }; static_assert(alignof(Signature) <= sizeof(uint32_t)); +// SHADER_FEATURE +// Low 32 bits. +enum ShaderFeature0 : uint32_t { + kShaderFeature0_Doubles = 1 << 0, + kShaderFeature0_ComputeShadersPlusRawAndStructuredBuffersViaShader_4_X = 1 + << 1, + kShaderFeature0_UAVsAtEveryStage = 1 << 2, + kShaderFeature0_64UAVs = 1 << 3, + kShaderFeature0_MinimumPrecision = 1 << 4, + kShaderFeature0_11_1_DoubleExtensions = 1 << 5, + kShaderFeature0_11_1_ShaderExtensions = 1 << 6, + kShaderFeature0_Level9ComparisonFiltering = 1 << 7, + kShaderFeature0_TiledResources = 1 << 8, + kShaderFeature0_StencilRef = 1 << 9, + kShaderFeature0_InnerCoverage = 1 << 10, + kShaderFeature0_TypedUAVLoadAdditionalFormats = 1 << 11, + kShaderFeature0_ROVs = 1 << 12, + kShaderFeature0_ViewportAndRTArrayIndexFromAnyShaderFeedingRasterizer = 1 + << 13, +}; + +struct ShaderFeatureInfo { + // UINT64 originally, but aligned to 4 rather than 8. + uint32_t feature_flags[2]; +}; +static_assert(alignof(ShaderFeatureInfo) <= sizeof(uint32_t)); + // D3D11_SB_TESSELLATOR_DOMAIN enum class TessellatorDomain : uint32_t { kUndefined, @@ -256,57 +542,88 @@ enum class TessellatorDomain : uint32_t { kQuad, }; -// The STAT chunk (based on Wine d3dcompiler_parse_stat). +// The STAT blob (based on Wine d3dcompiler_parse_stat). struct Statistics { - uint32_t instruction_count; - uint32_t temp_register_count; + // Not increased by declarations and labels. + uint32_t instruction_count; // +0 + uint32_t temp_register_count; // +4 // Unknown in Wine. - uint32_t def_count; - // Only inputs and outputs. - uint32_t dcl_count; - uint32_t float_instruction_count; - uint32_t int_instruction_count; - uint32_t uint_instruction_count; + uint32_t def_count; // +8 + // Only inputs and outputs, not CBVs, SRVs, UAVs and samplers. + uint32_t dcl_count; // +C + uint32_t float_instruction_count; // +10 + uint32_t int_instruction_count; // +14 + uint32_t uint_instruction_count; // +18 // endif, ret. - uint32_t static_flow_control_count; + uint32_t static_flow_control_count; // +1C // if (but not else). - uint32_t dynamic_flow_control_count; + uint32_t dynamic_flow_control_count; // +20 // Unknown in Wine. - uint32_t macro_instruction_count; - uint32_t temp_array_count; - uint32_t array_instruction_count; - uint32_t cut_instruction_count; - uint32_t emit_instruction_count; - uint32_t texture_normal_instructions; - uint32_t texture_load_instructions; - uint32_t texture_comp_instructions; - uint32_t texture_bias_instructions; - uint32_t texture_gradient_instructions; + uint32_t macro_instruction_count; // +24 + uint32_t temp_array_count; // +28 + uint32_t array_instruction_count; // +2C + uint32_t cut_instruction_count; // +30 + uint32_t emit_instruction_count; // +34 + uint32_t texture_normal_instructions; // +38 + uint32_t texture_load_instructions; // +3C + uint32_t texture_comp_instructions; // +40 + uint32_t texture_bias_instructions; // +44 + uint32_t texture_gradient_instructions; // +48 // Not including indexable temp load/store. - uint32_t mov_instruction_count; + uint32_t mov_instruction_count; // +4C // Unknown in Wine. - uint32_t movc_instruction_count; - uint32_t conversion_instruction_count; + uint32_t movc_instruction_count; // +50 + uint32_t conversion_instruction_count; // +54 // Unknown in Wine. - uint32_t unknown_22; - uint32_t input_primitive; - uint32_t gs_output_topology; - uint32_t gs_max_output_vertex_count; - uint32_t unknown_26; + uint32_t unknown_22; // +58 + uint32_t input_primitive; // +5C + uint32_t gs_output_topology; // +60 + uint32_t gs_max_output_vertex_count; // +64 + uint32_t unknown_26; // +68 // Unknown in Wine, but confirmed by testing. - uint32_t lod_instructions; - uint32_t unknown_28; - uint32_t unknown_29; - uint32_t c_control_points; - uint32_t hs_output_primitive; - uint32_t hs_partitioning; - TessellatorDomain tessellator_domain; + uint32_t lod_instructions; // +6C + uint32_t unknown_28; // +70 + uint32_t unknown_29; // +74 + uint32_t c_control_points; // +78 + uint32_t hs_output_primitive; // +7C + uint32_t hs_partitioning; // +80 + TessellatorDomain tessellator_domain; // +84 // Unknown in Wine. - uint32_t c_barrier_instructions; + uint32_t c_barrier_instructions; // +88 // Unknown in Wine. - uint32_t c_interlocked_instructions; + uint32_t c_interlocked_instructions; // +8C // Unknown in Wine, but confirmed by testing. - uint32_t c_texture_store_instructions; + uint32_t c_texture_store_instructions; // +90 +}; +static_assert(alignof(Statistics) <= sizeof(uint32_t)); + +// A shader blob begins with a version token and the shader length in dwords +// (including the version token and the length token itself). + +// D3D10_SB_TOKENIZED_PROGRAM_TYPE +enum class ProgramType : uint32_t { + kPixelShader, + kVertexShader, + kGeometryShader, + kHullShader, + kDomainShader, + kComputeShader, +}; + +constexpr uint32_t VersionToken(ProgramType program_type, + uint32_t major_version, + uint32_t minor_version) { + return (uint32_t(program_type) << 16) | (major_version << 4) | minor_version; +} + +// D3D10_SB_CUSTOMDATA_CLASS +enum class CustomDataClass : uint32_t { + kComment, + kDebugInfo, + kOpaque, + kDclImmediateConstantBuffer, + kShaderMessage, + kShaderClipPlaneConstantMappingsForDX9, }; // D3D10_SB_OPERAND_TYPE subset @@ -325,27 +642,37 @@ enum class OperandType : uint32_t { kInputPrimitiveID = 11, kOutputDepth = 12, kNull = 13, + kOutputCoverageMask = 15, kInputControlPoint = 25, kInputDomainPoint = 28, kUnorderedAccessView = 30, + kInputThreadGroupID = 33, + kInputThreadIDInGroup = 34, kInputCoverageMask = 35, kOutputDepthLessEqual = 39, + kOutputStencilRef = 41, }; // D3D10_SB_OPERAND_INDEX_DIMENSION -constexpr uint32_t GetOperandIndexDimension(OperandType type) { +constexpr uint32_t GetOperandIndexDimension(OperandType type, + bool in_dcl = false) { switch (type) { case OperandType::kTemp: case OperandType::kInput: + // FIXME(Triang3l): kInput has a dimensionality of 2 in the control point + // phase of hull shaders, however, currently the translator isn't used to + // emit them - if code where this matters is emitted by Xenia, the actual + // dimensionality will need to be stored in OperandAddress itself. case OperandType::kOutput: case OperandType::kLabel: return 1; case OperandType::kIndexableTemp: + case OperandType::kInputControlPoint: + return 2; case OperandType::kSampler: case OperandType::kResource: - case OperandType::kInputControlPoint: case OperandType::kUnorderedAccessView: - return 2; + return in_dcl ? 3 : 2; case OperandType::kConstantBuffer: return 3; default: @@ -361,19 +688,21 @@ enum class OperandDimension : uint32_t { }; constexpr OperandDimension GetOperandDimension(OperandType type, - bool dest_in_dcl = false) { + bool in_dcl = false) { switch (type) { case OperandType::kSampler: + return in_dcl ? OperandDimension::kVector : OperandDimension::kNoData; case OperandType::kLabel: case OperandType::kNull: return OperandDimension::kNoData; case OperandType::kInputPrimitiveID: case OperandType::kOutputDepth: + case OperandType::kOutputCoverageMask: case OperandType::kOutputDepthLessEqual: + case OperandType::kOutputStencilRef: return OperandDimension::kScalar; case OperandType::kInputCoverageMask: - return dest_in_dcl ? OperandDimension::kScalar - : OperandDimension::kVector; + return in_dcl ? OperandDimension::kScalar : OperandDimension::kVector; default: return OperandDimension::kVector; } @@ -444,12 +773,14 @@ struct OperandAddress { index_2d_(index_2d), index_3d_(index_3d) {} - OperandDimension GetDimension(bool dest_in_dcl = false) const { - return GetOperandDimension(type_, dest_in_dcl); + OperandDimension GetDimension(bool in_dcl = false) const { + return GetOperandDimension(type_, in_dcl); } - uint32_t GetIndexDimension() const { return GetOperandIndexDimension(type_); } - uint32_t GetOperandTokenTypeAndIndex() const { - uint32_t index_dimension = GetIndexDimension(); + uint32_t GetIndexDimension(bool in_dcl = false) const { + return GetOperandIndexDimension(type_, in_dcl); + } + uint32_t GetOperandTokenTypeAndIndex(bool in_dcl = false) const { + uint32_t index_dimension = GetIndexDimension(in_dcl); uint32_t operand_token = (uint32_t(type_) << 12) | (index_dimension << 20); if (index_dimension > 0) { operand_token |= uint32_t(index_1d_.GetRepresentation()) << 22; @@ -462,9 +793,9 @@ struct OperandAddress { } return operand_token; } - uint32_t GetLength() const { + uint32_t GetLength(bool in_dcl = false) const { uint32_t length = 0; - uint32_t index_dimension = GetIndexDimension(); + uint32_t index_dimension = GetIndexDimension(in_dcl); if (index_dimension > 0) { length += index_1d_.GetLength(); if (index_dimension > 1) { @@ -476,8 +807,8 @@ struct OperandAddress { } return length; } - void Write(std::vector& code) const { - uint32_t index_dimension = GetIndexDimension(); + void Write(std::vector& code, bool in_dcl = false) const { + uint32_t index_dimension = GetIndexDimension(in_dcl); if (index_dimension > 0) { index_1d_.Write(code); if (index_dimension > 1) { @@ -508,6 +839,10 @@ struct Dest : OperandAddress { // Ignored for 0-component and 1-component operand types. uint32_t write_mask_; + // Input destinations (v*) are for use only in declarations. Vector input + // declarations use read masks instead of swizzle (resource declarations still + // use swizzle when they're vector, however). + explicit Dest(OperandType type, uint32_t write_mask = 0b1111, Index index_1d = Index(), Index index_2d = Index(), Index index_3d = Index()) @@ -517,6 +852,9 @@ struct Dest : OperandAddress { static Dest R(uint32_t index, uint32_t write_mask = 0b1111) { return Dest(OperandType::kTemp, write_mask, index); } + static Dest V(uint32_t index, uint32_t read_mask = 0b1111) { + return Dest(OperandType::kInput, read_mask, index); + } static Dest O(Index index, uint32_t write_mask = 0b1111) { return Dest(OperandType::kOutput, write_mask, index); } @@ -524,19 +862,42 @@ struct Dest : OperandAddress { uint32_t write_mask = 0b1111) { return Dest(OperandType::kIndexableTemp, write_mask, index_1d, index_2d); } + static Dest VPrim() { return Dest(OperandType::kInputPrimitiveID, 0b0001); } static Dest ODepth() { return Dest(OperandType::kOutputDepth, 0b0001); } static Dest Null() { return Dest(OperandType::kNull, 0b0000); } + static Dest OMask() { return Dest(OperandType::kOutputCoverageMask, 0b0001); } + static Dest VICP(uint32_t control_point_count, uint32_t element, + uint32_t read_mask = 0b1111) { + return Dest(OperandType::kInputControlPoint, read_mask, control_point_count, + element); + } + static Dest VDomain(uint32_t read_mask) { + return Dest(OperandType::kInputDomainPoint, read_mask); + } static Dest U(uint32_t index_1d, Index index_2d, uint32_t write_mask = 0b1111) { return Dest(OperandType::kUnorderedAccessView, write_mask, index_1d, index_2d); } + static Dest VThreadGroupID(uint32_t read_mask) { + return Dest(OperandType::kInputThreadGroupID, read_mask); + } + static Dest VThreadIDInGroup(uint32_t read_mask) { + return Dest(OperandType::kInputThreadIDInGroup, read_mask); + } + static Dest VCoverage() { + return Dest(OperandType::kInputCoverageMask, 0b0001); + } static Dest ODepthLE() { return Dest(OperandType::kOutputDepthLessEqual, 0b0001); } + static Dest OStencilRef() { + return Dest(OperandType::kOutputStencilRef, 0b0001); + } - uint32_t GetMask() const { - switch (GetDimension()) { + uint32_t GetMask(bool in_dcl = false) const { + OperandDimension dimension = GetDimension(in_dcl); + switch (dimension) { case OperandDimension::kNoData: return 0b0000; case OperandDimension::kScalar: @@ -544,7 +905,7 @@ struct Dest : OperandAddress { case OperandDimension::kVector: return write_mask_; default: - assert_unhandled_case(GetDimension()); + assert_unhandled_case(dimension); return 0b0000; } } @@ -564,13 +925,15 @@ struct Dest : OperandAddress { } return UINT32_MAX; } - uint32_t GetMaskSingleComponent() const { - return GetMaskSingleComponent(GetMask()); + uint32_t GetMaskSingleComponent(bool in_dcl = false) const { + return GetMaskSingleComponent(GetMask(in_dcl)); } - uint32_t GetLength() const { return 1 + OperandAddress::GetLength(); } + uint32_t GetLength(bool in_dcl = false) const { + return 1 + OperandAddress::GetLength(in_dcl); + } void Write(std::vector& code, bool in_dcl = false) const { - uint32_t operand_token = GetOperandTokenTypeAndIndex(); + uint32_t operand_token = GetOperandTokenTypeAndIndex(in_dcl); OperandDimension dimension = GetDimension(in_dcl); operand_token |= uint32_t(dimension); if (dimension == OperandDimension::kVector) { @@ -579,7 +942,7 @@ struct Dest : OperandAddress { (uint32_t(ComponentSelection::kMask) << 2) | (write_mask_ << 4); } code.push_back(operand_token); - OperandAddress::Write(code); + OperandAddress::Write(code, in_dcl); } }; @@ -607,6 +970,10 @@ struct Src : OperandAddress { absolute_(false), negate_(false) {} + // For creating instances for use in declarations. + struct DclT {}; + static constexpr DclT Dcl; + static Src R(uint32_t index, uint32_t swizzle = kXYZW) { return Src(OperandType::kTemp, swizzle, index); } @@ -648,20 +1015,31 @@ struct Src : OperandAddress { static Src S(uint32_t index_1d, Index index_2d) { return Src(OperandType::kSampler, kXXXX, index_1d, index_2d); } + static Src S(DclT, uint32_t id, uint32_t lower_bound, uint32_t upper_bound) { + return Src(OperandType::kSampler, kXYZW, id, lower_bound, upper_bound); + } static Src T(uint32_t index_1d, Index index_2d, uint32_t swizzle = kXYZW) { return Src(OperandType::kResource, swizzle, index_1d, index_2d); } - static Src CB(uint32_t index_1d, Index index_2d, Index index_3d, + static Src T(DclT, uint32_t id, uint32_t lower_bound, uint32_t upper_bound) { + return Src(OperandType::kResource, kXYZW, id, lower_bound, upper_bound); + } + static Src CB(uint32_t id, Index index, Index location, uint32_t swizzle = kXYZW) { - return Src(OperandType::kConstantBuffer, swizzle, index_1d, index_2d, - index_3d); + return Src(OperandType::kConstantBuffer, swizzle, id, index, location); + } + static Src CB(DclT, uint32_t id, uint32_t lower_bound, uint32_t upper_bound) { + return Src(OperandType::kConstantBuffer, kXYZW, id, lower_bound, + upper_bound); } static Src Label(uint32_t index) { return Src(OperandType::kLabel, kXXXX, index); } static Src VPrim() { return Src(OperandType::kInputPrimitiveID, kXXXX); } - static Src VICP(Index index_1d, Index index_2d, uint32_t swizzle = kXYZW) { - return Src(OperandType::kInputControlPoint, swizzle, index_1d, index_2d); + static Src VICP(Index control_point, Index element, + uint32_t swizzle = kXYZW) { + return Src(OperandType::kInputControlPoint, swizzle, control_point, + element); } static Src VDomain(uint32_t swizzle = kXYZW) { return Src(OperandType::kInputDomainPoint, swizzle); @@ -669,6 +1047,16 @@ struct Src : OperandAddress { static Src U(uint32_t index_1d, Index index_2d, uint32_t swizzle = kXYZW) { return Src(OperandType::kUnorderedAccessView, swizzle, index_1d, index_2d); } + static Src U(DclT, uint32_t id, uint32_t lower_bound, uint32_t upper_bound) { + return Src(OperandType::kUnorderedAccessView, kXYZW, id, lower_bound, + upper_bound); + } + static Src VThreadGroupID(uint32_t swizzle = kXYZW) { + return Src(OperandType::kInputThreadGroupID, swizzle); + } + static Src VThreadIDInGroup(uint32_t swizzle = kXYZW) { + return Src(OperandType::kInputThreadIDInGroup, swizzle); + } static Src VCoverage() { return Src(OperandType::kInputCoverageMask, kXXXX); } [[nodiscard]] Src WithModifiers(bool absolute, bool negate) const { @@ -712,14 +1100,15 @@ struct Src : OperandAddress { return new_src; } - uint32_t GetLength(uint32_t mask, bool force_vector = false) const { + uint32_t GetLength(uint32_t mask, bool force_vector = false, + bool in_dcl = false) const { bool is_vector = force_vector || (mask != 0b0000 && Dest::GetMaskSingleComponent(mask) == UINT32_MAX); if (type_ == OperandType::kImmediate32) { return is_vector ? 5 : 2; } - return ((absolute_ || negate_) ? 2 : 1) + OperandAddress::GetLength(); + return ((absolute_ || negate_) ? 2 : 1) + OperandAddress::GetLength(in_dcl); } static constexpr uint32_t GetModifiedImmediate(uint32_t value, bool is_integer, bool absolute, @@ -749,8 +1138,8 @@ struct Src : OperandAddress { absolute_, negate_); } void Write(std::vector& code, bool is_integer, uint32_t mask, - bool force_vector = false) const { - uint32_t operand_token = GetOperandTokenTypeAndIndex(); + bool force_vector = false, bool in_dcl = false) const { + uint32_t operand_token = GetOperandTokenTypeAndIndex(in_dcl); uint32_t mask_single_component = Dest::GetMaskSingleComponent(mask); uint32_t select_component = mask_single_component != UINT32_MAX ? mask_single_component : 0; @@ -774,7 +1163,7 @@ struct Src : OperandAddress { code.push_back(GetModifiedImmediate(select_component, is_integer)); } } else { - switch (GetDimension()) { + switch (GetDimension(in_dcl)) { case OperandDimension::kScalar: if (is_vector) { operand_token |= uint32_t(OperandDimension::kVector) | @@ -823,11 +1212,81 @@ struct Src : OperandAddress { code.push_back(uint32_t(ExtendedOperandType::kModifier) | (uint32_t(modifier) << 6)); } - OperandAddress::Write(code); + OperandAddress::Write(code, in_dcl); } } }; +// D3D10_SB_GLOBAL_FLAGS_MASK +enum GlobalFlags : uint32_t { + // Permit the driver to reorder arithmetic operations for optimization. + kGlobalFlagRefactoringAllowed = 1 << 11, + kGlobalFlagEnableDoublePrecisionFloatOps = 1 << 12, + kGlobalFlagForceEarlyDepthStencil = 1 << 13, + // Enable RAW and structured buffers in non-CS 4.x shaders. Not needed on 5.x. + kGlobalFlagEnableRawAndStructuredBuffers = 1 << 14, + // Direct3D 11.1. + // Skip optimizations of shader IL when translating to native code. + kGlobalFlagSkipOptimization = 1 << 15, + kGlobalFlagEnableMinimumPrecision = 1 << 16, + // Enable 11.1 double-precision floating-point instruction extensions. Not + // needed on 5.1. + kGlobalFlagEnableDoubleExtensions = 1 << 17, + // Enable 11.1 non-double instruction extensions. Not needed on 5.1. + kGlobalFlagEnableShaderExtensions = 1 << 18, + // Direct3D 12. + kGlobalFlagAllResourcesBound = 1 << 19, +}; + +// D3D10_SB_SAMPLER_MODE +enum class SamplerMode : uint32_t { + kDefault, + kComparison, + kMono, +}; + +// D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN +enum class ConstantBufferAccessPattern : uint32_t { + kImmediateIndexed, + kDynamicIndexed, +}; + +// D3D10_SB_INTERPOLATION_MODE +enum class InterpolationMode : uint32_t { + kUndefined, + kConstant, + kLinear, + kLinearCentroid, + kLinearNoPerspective, + kLinearNoPerspectiveCentroid, + kLinearSample, + kLinearNoPerspectiveSample, +}; + +// D3D10_SB_RESOURCE_DIMENSION +enum class ResourceDimension : uint32_t { + kUnknown, + kBuffer, + kTexture1D, + kTexture2D, + kTexture2DMS, + kTexture3D, + kTextureCube, + kTexture1DArray, + kTexture2DArray, + kTexture2DMSArray, + kTextureCubeArray, + kRawBuffer, + kStructuredBuffer, +}; + +// D3D11_SB_RESOURCE_FLAGS_MASK +enum UAVFlags : uint32_t { + kUAVFlagGloballyCoherentAccess = 1 << 16, + kUAVFlagRasterizerOrderedAccess = 1 << 17, + kUAVFlagHasOrderPreservingCounter = 1 << 23, +}; + // D3D10_SB_OPCODE_TYPE subset enum class Opcode : uint32_t { kAdd = 0, @@ -866,12 +1325,15 @@ enum class Opcode : uint32_t { kIShL = 41, kIToF = 43, kLabel = 44, + kLd = 45, + kLdMS = 46, kLog = 47, kLoop = 48, kLT = 49, kMAd = 50, kMin = 51, kMax = 52, + kCustomData = 53, kMov = 54, kMovC = 55, kMul = 56, @@ -889,6 +1351,7 @@ enum class Opcode : uint32_t { kSqRt = 75, kSwitch = 76, kSinCos = 77, + kUDiv = 78, kULT = 79, kUGE = 80, kUMul = 81, @@ -898,6 +1361,19 @@ enum class Opcode : uint32_t { kUShR = 85, kUToF = 86, kXOr = 87, + kDclResource = 88, + kDclConstantBuffer = 89, + kDclSampler = 90, + kDclInput = 95, + kDclInputSGV = 96, + kDclInputPS = 98, + kDclInputPSSGV = 99, + kDclInputPSSIV = 100, + kDclOutput = 101, + kDclOutputSIV = 103, + kDclTemps = 104, + kDclIndexableTemp = 105, + kDclGlobalFlags = 106, kLOD = 108, kDerivRTXCoarse = 122, kDerivRTXFine = 123, @@ -907,10 +1383,17 @@ enum class Opcode : uint32_t { kF32ToF16 = 130, kF16ToF32 = 131, kFirstBitHi = 135, + kFirstBitLo = 136, kUBFE = 138, kIBFE = 139, kBFI = 140, kBFRev = 141, + kDclInputControlPointCount = 147, + kDclTessDomain = 149, + kDclThreadGroup = 155, + kDclUnorderedAccessViewTyped = 156, + kDclUnorderedAccessViewRaw = 157, + kDclResourceRaw = 161, kLdUAVTyped = 163, kStoreUAVTyped = 164, kLdRaw = 165, @@ -946,6 +1429,20 @@ constexpr uint32_t SampleControlsExtendedOpcodeToken(int32_t aoffimmi_u, (extended ? (uint32_t(1) << 31) : 0); } +constexpr uint32_t ResourceReturnTypeToken(ResourceReturnType x, + ResourceReturnType y, + ResourceReturnType z, + ResourceReturnType w) { + return uint32_t(x) | (uint32_t(y) << 4) | (uint32_t(z) << 8) | + (uint32_t(w) << 12); +} + +// Even if a texture or a typed buffer has less than 4 components, it has the +// same return type specified for all 4 in its dcl instruction. +constexpr uint32_t ResourceReturnTypeX4Token(ResourceReturnType xyzw) { + return ResourceReturnTypeToken(xyzw, xyzw, xyzw, xyzw); +} + // Assembler appending to the shader program code vector. class Assembler { public: @@ -1129,6 +1626,58 @@ class Assembler { label.Write(code_, true, 0b0000); // Doesn't count towards stat_.instruction_count. } + void OpLd(const Dest& dest, const Src& address, uint32_t address_mask, + const Src& resource, int32_t aoffimmi_u = 0, int32_t aoffimmi_v = 0, + int32_t aoffimmi_w = 0) { + uint32_t dest_write_mask = dest.GetMask(); + uint32_t sample_controls = 0; + if (aoffimmi_u || aoffimmi_v || aoffimmi_w) { + sample_controls = + SampleControlsExtendedOpcodeToken(aoffimmi_u, aoffimmi_v, aoffimmi_w); + } + uint32_t operands_length = dest.GetLength() + + address.GetLength(address_mask, true) + + resource.GetLength(dest_write_mask, true); + code_.reserve(code_.size() + 1 + (sample_controls ? 1 : 0) + + operands_length); + code_.push_back(OpcodeToken(Opcode::kLd, operands_length, false, + sample_controls ? 1 : 0)); + if (sample_controls) { + code_.push_back(sample_controls); + } + dest.Write(code_); + address.Write(code_, false, address_mask, true); + resource.Write(code_, false, dest_write_mask, true); + ++stat_.instruction_count; + ++stat_.texture_load_instructions; + } + void OpLdMS(const Dest& dest, const Src& address, uint32_t address_mask, + const Src& resource, const Src& sample_index, + int32_t aoffimmi_u = 0, int32_t aoffimmi_v = 0) { + uint32_t dest_write_mask = dest.GetMask(); + uint32_t sample_controls = 0; + if (aoffimmi_u || aoffimmi_v) { + sample_controls = + SampleControlsExtendedOpcodeToken(aoffimmi_u, aoffimmi_v, 0); + } + uint32_t operands_length = dest.GetLength() + + address.GetLength(address_mask, true) + + resource.GetLength(dest_write_mask, true) + + sample_index.GetLength(0b0000); + code_.reserve(code_.size() + 1 + (sample_controls ? 1 : 0) + + operands_length); + code_.push_back(OpcodeToken(Opcode::kLdMS, operands_length, false, + sample_controls ? 1 : 0)); + if (sample_controls) { + code_.push_back(sample_controls); + } + dest.Write(code_); + address.Write(code_, false, address_mask, true); + resource.Write(code_, false, dest_write_mask, true); + sample_index.Write(code_, true, 0b0000); + ++stat_.instruction_count; + ++stat_.texture_load_instructions; + } void OpLog(const Dest& dest, const Src& src, bool saturate = false) { EmitAluOp(Opcode::kLog, 0b0, dest, src, saturate); ++stat_.float_instruction_count; @@ -1157,6 +1706,25 @@ class Assembler { EmitAluOp(Opcode::kMax, 0b00, dest, src0, src1, saturate); ++stat_.float_instruction_count; } + // Returns a pointer for writing the custom data to. + void* OpCustomData(CustomDataClass custom_data_class, uint32_t length_bytes) { + uint32_t length_bytes_aligned = + xe::align(length_bytes, uint32_t(sizeof(uint32_t))); + uint32_t total_length_dwords = length_bytes_aligned / sizeof(uint32_t) + 2; + size_t offset_dwords = code_.size(); + code_.resize(offset_dwords + total_length_dwords); + uint32_t* data = code_.data() + offset_dwords; + // Different opcode encoding (no size). + *(data++) = + uint32_t(Opcode::kCustomData) | (uint32_t(custom_data_class) << 11); + *(data++) = total_length_dwords; + // Don't leave uninitialized data, and make sure multiple uses of the + // assembler with the same input give the same DXBC for driver shader + // caching. + std::memset(reinterpret_cast(data) + length_bytes, + dxbc::kAlignmentPadding, length_bytes_aligned - length_bytes); + return data; + } void OpMov(const Dest& dest, const Src& src, bool saturate = false) { EmitAluOp(Opcode::kMov, 0b0, dest, src, saturate); if (dest.type_ == OperandType::kIndexableTemp || @@ -1294,6 +1862,11 @@ class Assembler { EmitAluOp(Opcode::kSinCos, 0b0, dest_sin, dest_cos, src, saturate); ++stat_.float_instruction_count; } + void OpUDiv(const Dest& dest_quotient, const Dest& dest_remainder, + const Src& src0, const Src& src1) { + EmitAluOp(Opcode::kUDiv, 0b11, dest_quotient, dest_remainder, src0, src1); + ++stat_.uint_instruction_count; + } void OpULT(const Dest& dest, const Src& src0, const Src& src1) { EmitAluOp(Opcode::kULT, 0b11, dest, src0, src1); ++stat_.uint_instruction_count; @@ -1332,6 +1905,122 @@ class Assembler { EmitAluOp(Opcode::kXOr, 0b11, dest, src0, src1); ++stat_.uint_instruction_count; } + void OpDclResource(ResourceDimension dimension, uint32_t return_type_token, + const Src& operand, uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 3 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclResource, 2 + operands_length) | + (uint32_t(dimension) << 11)); + operand.Write(code_, false, 0b1111, false, true); + code_.push_back(return_type_token); + code_.push_back(space); + } + // The order of constant buffer declarations in a shader indicates their + // relative priority from highest to lowest (hint to driver). + void OpDclConstantBuffer(const Src& operand, uint32_t size_vectors, + ConstantBufferAccessPattern access_pattern = + ConstantBufferAccessPattern::kImmediateIndexed, + uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 3 + operands_length); + code_.push_back( + OpcodeToken(Opcode::kDclConstantBuffer, 2 + operands_length) | + (uint32_t(access_pattern) << 11)); + operand.Write(code_, false, 0b1111, false, true); + code_.push_back(size_vectors); + code_.push_back(space); + } + void OpDclSampler(const Src& operand, + SamplerMode mode = SamplerMode::kDefault, + uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclSampler, 1 + operands_length) | + (uint32_t(mode) << 11)); + operand.Write(code_, false, 0b1111, false, true); + code_.push_back(space); + } + void OpDclInput(const Dest& operand) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 1 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclInput, operands_length)); + operand.Write(code_, true); + ++stat_.dcl_count; + } + void OpDclInputSGV(const Dest& operand, Name name) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclInputSGV, 1 + operands_length)); + operand.Write(code_, true); + code_.push_back(uint32_t(name)); + ++stat_.dcl_count; + } + void OpDclInputPS(InterpolationMode interpolation_mode, const Dest& operand) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 1 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclInputPS, operands_length) | + (uint32_t(interpolation_mode) << 11)); + operand.Write(code_, true); + ++stat_.dcl_count; + } + void OpDclInputPSSGV(const Dest& operand, Name name) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 2 + operands_length); + // Constant interpolation mode is set in FXC output at least for + // SV_IsFrontFace, despite the comment in d3d12TokenizedProgramFormat.hpp + // saying bits 11:23 are ignored. + code_.push_back(OpcodeToken(Opcode::kDclInputPSSGV, 1 + operands_length) | + (uint32_t(InterpolationMode::kConstant) << 11)); + operand.Write(code_, true); + code_.push_back(uint32_t(name)); + ++stat_.dcl_count; + } + void OpDclInputPSSIV(InterpolationMode interpolation_mode, + const Dest& operand, Name name) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclInputPSSIV, 1 + operands_length) | + (uint32_t(interpolation_mode) << 11)); + operand.Write(code_, true); + code_.push_back(uint32_t(name)); + ++stat_.dcl_count; + } + void OpDclOutput(const Dest& operand) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 1 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclOutput, operands_length)); + operand.Write(code_, true); + ++stat_.dcl_count; + } + void OpDclOutputSIV(const Dest& operand, Name name) { + uint32_t operands_length = operand.GetLength(true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclOutputSIV, 1 + operands_length)); + operand.Write(code_, true); + code_.push_back(uint32_t(name)); + ++stat_.dcl_count; + } + // Returns the index of the count written in the code_ vector. + size_t OpDclTemps(uint32_t count) { + code_.reserve(code_.size() + 2); + code_.push_back(OpcodeToken(Opcode::kDclTemps, 1)); + code_.push_back(count); + stat_.temp_register_count = count; + return code_.size() - 1; + } + void OpDclIndexableTemp(uint32_t index, uint32_t count, + uint32_t component_count) { + code_.reserve(code_.size() + 4); + code_.push_back(OpcodeToken(Opcode::kDclIndexableTemp, 3)); + code_.push_back(index); + code_.push_back(count); + code_.push_back(component_count); + stat_.temp_array_count += count; + } + // flags are GlobalFlags. + void OpDclGlobalFlags(uint32_t flags) { + code_.push_back(OpcodeToken(Opcode::kDclGlobalFlags, 0) | flags); + } void OpLOD(const Dest& dest, const Src& address, uint32_t address_components, const Src& resource, const Src& sampler) { uint32_t dest_write_mask = dest.GetMask(); @@ -1382,6 +2071,10 @@ class Assembler { EmitAluOp(Opcode::kFirstBitHi, 0b1, dest, src); ++stat_.uint_instruction_count; } + void OpFirstBitLo(const Dest& dest, const Src& src) { + EmitAluOp(Opcode::kFirstBitLo, 0b1, dest, src); + ++stat_.uint_instruction_count; + } void OpUBFE(const Dest& dest, const Src& width, const Src& offset, const Src& src) { EmitAluOp(Opcode::kUBFE, 0b111, dest, width, offset, src); @@ -1401,6 +2094,56 @@ class Assembler { EmitAluOp(Opcode::kBFRev, 0b1, dest, src); ++stat_.uint_instruction_count; } + void OpDclInputControlPointCount(uint32_t count) { + code_.push_back(OpcodeToken(Opcode::kDclInputControlPointCount, 0) | + (count << 11)); + stat_.c_control_points = count; + } + void OpDclTessDomain(TessellatorDomain domain) { + code_.push_back(OpcodeToken(Opcode::kDclTessDomain, 0) | + (uint32_t(domain) << 11)); + stat_.tessellator_domain = domain; + } + void OpDclThreadGroup(uint32_t x, uint32_t y, uint32_t z) { + code_.reserve(code_.size() + 4); + code_.push_back(OpcodeToken(Opcode::kDclThreadGroup, 3)); + code_.push_back(x); + code_.push_back(y); + code_.push_back(z); + } + // Possible flags are kUAVFlagGloballyCoherentAccess and + // kUAVFlagRasterizerOrderedAccess. + void OpDclUnorderedAccessViewTyped(ResourceDimension dimension, + uint32_t flags, uint32_t return_type_token, + const Src& operand, uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 3 + operands_length); + code_.push_back( + OpcodeToken(Opcode::kDclUnorderedAccessViewTyped, 2 + operands_length) | + (uint32_t(dimension) << 11) | flags); + operand.Write(code_, false, 0b1111, false, true); + code_.push_back(return_type_token); + code_.push_back(space); + } + // Possible flags are kUAVFlagGloballyCoherentAccess and + // kUAVFlagRasterizerOrderedAccess. + void OpDclUnorderedAccessViewRaw(uint32_t flags, const Src& operand, + uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back( + OpcodeToken(Opcode::kDclUnorderedAccessViewRaw, 1 + operands_length) | + flags); + operand.Write(code_, true, 0b1111, false, true); + code_.push_back(space); + } + void OpDclResourceRaw(const Src& operand, uint32_t space = 0) { + uint32_t operands_length = operand.GetLength(0b1111, false, true); + code_.reserve(code_.size() + 2 + operands_length); + code_.push_back(OpcodeToken(Opcode::kDclResourceRaw, 1 + operands_length)); + operand.Write(code_, true, 0b1111, false, true); + code_.push_back(space); + } void OpLdUAVTyped(const Dest& dest, const Src& address, uint32_t address_components, const Src& uav) { uint32_t dest_write_mask = dest.GetMask(); diff --git a/src/xenia/gpu/dxbc_shader_translator.cc b/src/xenia/gpu/dxbc_shader_translator.cc index f813b46cf..154a64e86 100644 --- a/src/xenia/gpu/dxbc_shader_translator.cc +++ b/src/xenia/gpu/dxbc_shader_translator.cc @@ -15,12 +15,13 @@ #include #include "third_party/dxbc/DXBCChecksum.h" -#include "third_party/dxbc/d3d12TokenizedProgramFormat.hpp" #include "xenia/base/assert.h" #include "xenia/base/cvar.h" #include "xenia/base/math.h" #include "xenia/gpu/dxbc_shader.h" +#include "xenia/gpu/xenos.h" +#include "xenia/ui/graphics_provider.h" DEFINE_bool(dxbc_switch, true, "Use switch rather than if for flow control. Turning this off or " @@ -64,15 +65,22 @@ using namespace ucode; // S#/T#/U# binding index, and the second is the s#/t#/u# register index // within its space. -DxbcShaderTranslator::DxbcShaderTranslator(uint32_t vendor_id, - bool bindless_resources_used, - bool edram_rov_used, - bool force_emit_source_map) - : a_(shader_code_, stat_), +DxbcShaderTranslator::DxbcShaderTranslator( + ui::GraphicsProvider::GpuVendorID vendor_id, bool bindless_resources_used, + bool edram_rov_used, bool gamma_render_target_as_srgb, + bool msaa_2x_supported, uint32_t draw_resolution_scale, + bool force_emit_source_map) + : a_(shader_code_, statistics_), + ao_(shader_object_, statistics_), vendor_id_(vendor_id), bindless_resources_used_(bindless_resources_used), - edram_rov_used_(edram_rov_used) { - emit_source_map_ = force_emit_source_map || cvars::dxbc_source_map; + edram_rov_used_(edram_rov_used), + gamma_render_target_as_srgb_(gamma_render_target_as_srgb), + msaa_2x_supported_(msaa_2x_supported), + draw_resolution_scale_(draw_resolution_scale), + emit_source_map_(force_emit_source_map || cvars::dxbc_source_map) { + assert_true(draw_resolution_scale >= 1); + assert_true(draw_resolution_scale <= 3); // Don't allocate again and again for the first shader. shader_code_.reserve(8192); shader_object_.reserve(16384); @@ -91,21 +99,23 @@ std::vector DxbcShaderTranslator::CreateDepthOnlyPixelShader() { return translation.translated_binary(); } -uint64_t DxbcShaderTranslator::GetDefaultModification( - xenos::ShaderType shader_type, uint32_t dynamic_addressable_register_count, +uint64_t DxbcShaderTranslator::GetDefaultVertexShaderModification( + uint32_t dynamic_addressable_register_count, Shader::HostVertexShaderType host_vertex_shader_type) const { Modification shader_modification; - shader_modification.dynamic_addressable_register_count = + shader_modification.vertex.dynamic_addressable_register_count = dynamic_addressable_register_count; - switch (shader_type) { - case xenos::ShaderType::kVertex: - shader_modification.host_vertex_shader_type = host_vertex_shader_type; - break; - case xenos::ShaderType::kPixel: - shader_modification.depth_stencil_mode = - Modification::DepthStencilMode::kNoModifiers; - break; - } + shader_modification.vertex.host_vertex_shader_type = host_vertex_shader_type; + return shader_modification.value; +} + +uint64_t DxbcShaderTranslator::GetDefaultPixelShaderModification( + uint32_t dynamic_addressable_register_count) const { + Modification shader_modification; + shader_modification.pixel.dynamic_addressable_register_count = + dynamic_addressable_register_count; + shader_modification.pixel.depth_stencil_mode = + Modification::DepthStencilMode::kNoModifiers; return shader_modification.value; } @@ -155,16 +165,21 @@ void DxbcShaderTranslator::Reset() { memexport_alloc_current_count_ = 0; - std::memset(&stat_, 0, sizeof(stat_)); + std::memset(&shader_feature_info_, 0, sizeof(shader_feature_info_)); + std::memset(&statistics_, 0, sizeof(statistics_)); } uint32_t DxbcShaderTranslator::GetModificationRegisterCount() const { - return GetDxbcShaderModification().dynamic_addressable_register_count; + Modification modification = GetDxbcShaderModification(); + return is_vertex_shader() + ? modification.vertex.dynamic_addressable_register_count + : modification.pixel.dynamic_addressable_register_count; } bool DxbcShaderTranslator::UseSwitchForControlFlow() const { // Xenia crashes on Intel HD Graphics 4000 with switch. - return cvars::dxbc_switch && vendor_id_ != 0x8086; + return cvars::dxbc_switch && + vendor_id_ != ui::GraphicsProvider::GpuVendorID::kIntel; } uint32_t DxbcShaderTranslator::PushSystemTemp(uint32_t zero_mask, @@ -365,7 +380,7 @@ void DxbcShaderTranslator::StartVertexOrDomainShader() { // Remember that x# are only accessible via mov load or store - use a // temporary variable if need to do any computations! Shader::HostVertexShaderType host_vertex_shader_type = - GetDxbcShaderModification().host_vertex_shader_type; + GetDxbcShaderModification().vertex.host_vertex_shader_type; switch (host_vertex_shader_type) { case Shader::HostVertexShaderType::kVertex: StartVertexShader_LoadVertexIndex(); @@ -553,64 +568,48 @@ void DxbcShaderTranslator::StartPixelShader() { bool uses_register_dynamic_addressing = current_shader().uses_register_dynamic_addressing(); - if (!edram_rov_used_ && current_shader().writes_depth()) { - // Initialize the depth output if used, which must be written to regardless - // of the taken execution path. - a_.OpMov(dxbc::Dest::ODepth(), dxbc::Src::LF(0.0f)); - } - uint32_t interpolator_count = std::min(xenos::kMaxInterpolators, register_count()); if (interpolator_count != 0) { // Copy interpolants to GPRs. - if (edram_rov_used_) { - uint32_t centroid_temp = - uses_register_dynamic_addressing ? PushSystemTemp() : UINT32_MAX; - system_constants_used_ |= 1ull - << kSysConst_InterpolatorSamplingPattern_Index; - dxbc::Src sampling_pattern_src( - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_InterpolatorSamplingPattern_Vec) - .Select(kSysConst_InterpolatorSamplingPattern_Comp)); - for (uint32_t i = 0; i < interpolator_count; ++i) { - // With GPR dynamic addressing, first evaluate to centroid_temp r#, then - // store to the x#. - uint32_t centroid_register = - uses_register_dynamic_addressing ? centroid_temp : i; - // Check if the input needs to be interpolated at center (if the bit is - // set). - a_.OpAnd(dxbc::Dest::R(centroid_register, 0b0001), sampling_pattern_src, - dxbc::Src::LU(uint32_t(1) << i)); - a_.OpIf(bool(xenos::SampleLocation::kCenter), - dxbc::Src::R(centroid_register, dxbc::Src::kXXXX)); - // At center. - a_.OpMov(uses_register_dynamic_addressing ? dxbc::Dest::X(0, i) - : dxbc::Dest::R(i), - dxbc::Src::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); - a_.OpElse(); - // At centroid. Not really important that 2x MSAA is emulated using - // ForcedSampleCount 4 - what matters is that the sample position will - // be within the primitive, and the value will not be extrapolated. - a_.OpEvalCentroid( - dxbc::Dest::R(centroid_register), - dxbc::Src::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); - if (uses_register_dynamic_addressing) { - a_.OpMov(dxbc::Dest::X(0, i), dxbc::Src::R(centroid_register)); - } - a_.OpEndIf(); - } - if (centroid_temp != UINT32_MAX) { - PopSystemTemp(); - } - } else { - // SSAA instead of MSAA without ROV - everything is interpolated at - // samples, can't extrapolate. - for (uint32_t i = 0; i < interpolator_count; ++i) { - a_.OpMov(uses_register_dynamic_addressing ? dxbc::Dest::X(0, i) - : dxbc::Dest::R(i), - dxbc::Src::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); + uint32_t centroid_temp = + uses_register_dynamic_addressing ? PushSystemTemp() : UINT32_MAX; + system_constants_used_ |= 1ull + << kSysConst_InterpolatorSamplingPattern_Index; + dxbc::Src sampling_pattern_src( + dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + kSysConst_InterpolatorSamplingPattern_Vec) + .Select(kSysConst_InterpolatorSamplingPattern_Comp)); + for (uint32_t i = 0; i < interpolator_count; ++i) { + // With GPR dynamic addressing, first evaluate to centroid_temp r#, then + // store to the x#. + uint32_t centroid_register = + uses_register_dynamic_addressing ? centroid_temp : i; + // Check if the input needs to be interpolated at center (if the bit is + // set). + a_.OpAnd(dxbc::Dest::R(centroid_register, 0b0001), sampling_pattern_src, + dxbc::Src::LU(uint32_t(1) << i)); + a_.OpIf(bool(xenos::SampleLocation::kCenter), + dxbc::Src::R(centroid_register, dxbc::Src::kXXXX)); + // At center. + a_.OpMov(uses_register_dynamic_addressing ? dxbc::Dest::X(0, i) + : dxbc::Dest::R(i), + dxbc::Src::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); + a_.OpElse(); + // At centroid. Not really important that 2x MSAA is emulated using + // ForcedSampleCount 4 - what matters is that the sample position will + // be within the primitive, and the value will not be extrapolated. + a_.OpEvalCentroid( + dxbc::Dest::R(centroid_register), + dxbc::Src::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); + if (uses_register_dynamic_addressing) { + a_.OpMov(dxbc::Dest::X(0, i), dxbc::Src::R(centroid_register)); } + a_.OpEndIf(); + } + if (centroid_temp != UINT32_MAX) { + PopSystemTemp(); } // Write pixel parameters - screen (XY absolute value) and point sprite (ZW @@ -630,51 +629,26 @@ void DxbcShaderTranslator::StartPixelShader() { { // XY - floored pixel position (Direct3D VPOS) in the absolute value, // faceness as X sign bit. Using Z as scratch register now. - if (edram_rov_used_) { - // Get XY address of the current host pixel as float. - in_position_used_ |= 0b0011; - a_.OpRoundZ(dxbc::Dest::R(param_gen_temp, 0b0011), - dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition))); + // Get XY address of the current host pixel as float (no matter whether + // the position is pixel-rate or sample-rate also due to float24 depth + // conversion requirements, it will be rounded the same). Rounding down, + // and taking the absolute value (because the sign bit of X stores the + // faceness), so in case the host GPU for some reason has quads used for + // derivative calculation at odd locations, the left and top edges will + // have correct derivative magnitude and LODs. + in_position_used_ |= 0b0011; + a_.OpRoundNI(dxbc::Dest::R(param_gen_temp, 0b0011), + dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition))); + if (draw_resolution_scale_ > 1) { // Revert resolution scale - after truncating, so if the pixel position // is passed to tfetch (assuming the game doesn't round it by itself), // it will be sampled with higher resolution too. - // Check if resolution scale is 2x2 and multiply by 0.5 in this case. - system_constants_used_ |= 1ull - << kSysConst_EdramResolutionSquareScale_Index; - a_.OpIEq(dxbc::Dest::R(param_gen_temp, 0b0100), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::LU(4)); - a_.OpIf(true, dxbc::Src::R(param_gen_temp, dxbc::Src::kZZZZ)); - { - a_.OpMul(dxbc::Dest::R(param_gen_temp, 0b0011), - dxbc::Src::R(param_gen_temp), dxbc::Src::LF(0.5f)); - } - a_.OpEndIf(); - } else { - // Get XY address of the current SSAA sample by converting - // SV_Position.xy to an integer. - in_position_used_ |= 0b0011; - a_.OpFToU(dxbc::Dest::R(param_gen_temp, 0b0011), - dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition))); - // Undo SSAA that is used instead of MSAA - since it's used as a - // workaround for MSAA emulation, guest pixel position must be the same - // for all samples, so this should be done is integers (or before - // truncating). - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpUShR( - dxbc::Dest::R(param_gen_temp, 0b0011), dxbc::Src::R(param_gen_temp), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec, - kSysConst_SampleCountLog2_Comp | - ((kSysConst_SampleCountLog2_Comp + 1) << 2))); - // Convert the integer position to float Direct3D 9 VPOS. - a_.OpUToF(dxbc::Dest::R(param_gen_temp, 0b0011), - dxbc::Src::R(param_gen_temp)); + a_.OpMul(dxbc::Dest::R(param_gen_temp, 0b0011), + dxbc::Src::R(param_gen_temp), + dxbc::Src::LF(1.0f / draw_resolution_scale_)); } + a_.OpMov(dxbc::Dest::R(param_gen_temp, 0b0011), + dxbc::Src::R(param_gen_temp).Abs()); // Check if faceness applies to the current primitive type. system_constants_used_ |= 1ull << kSysConst_Flags_Index; a_.OpAnd(dxbc::Dest::R(param_gen_temp, 0b0100), @@ -688,11 +662,12 @@ void DxbcShaderTranslator::StartPixelShader() { // Negate modifier flips the sign bit even for 0 - set it to minus for // backfaces. in_front_face_used_ = true; - a_.OpMovC(dxbc::Dest::R(param_gen_temp, 0b0001), - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), - dxbc::Src::kXXXX), - dxbc::Src::R(param_gen_temp, dxbc::Src::kXXXX), - -dxbc::Src::R(param_gen_temp, dxbc::Src::kXXXX)); + a_.OpMovC( + dxbc::Dest::R(param_gen_temp, 0b0001), + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kXXXX), + dxbc::Src::R(param_gen_temp, dxbc::Src::kXXXX), + -dxbc::Src::R(param_gen_temp, dxbc::Src::kXXXX)); } a_.OpEndIf(); // ZW - UV within a point sprite in the absolute value, at centroid if @@ -700,27 +675,22 @@ void DxbcShaderTranslator::StartPixelShader() { dxbc::Dest point_coord_r_zw_dest(dxbc::Dest::R(param_gen_temp, 0b1100)); dxbc::Src point_coord_v_xxxy_src(dxbc::Src::V( uint32_t(InOutRegister::kPSInPointParameters), 0b01000000)); - if (edram_rov_used_) { - system_constants_used_ |= - 1ull << kSysConst_InterpolatorSamplingPattern_Index; - a_.OpUBFE(dxbc::Dest::R(param_gen_temp, 0b0100), dxbc::Src::LU(1), - param_gen_index_src, - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_InterpolatorSamplingPattern_Vec) - .Select(kSysConst_InterpolatorSamplingPattern_Comp)); - a_.OpIf(bool(xenos::SampleLocation::kCenter), - dxbc::Src::R(param_gen_temp, dxbc::Src::kZZZZ)); - // At center. - a_.OpMov(point_coord_r_zw_dest, point_coord_v_xxxy_src); - a_.OpElse(); - // At centroid. - a_.OpEvalCentroid(point_coord_r_zw_dest, point_coord_v_xxxy_src); - a_.OpEndIf(); - } else { - // At the SSAA sample. - a_.OpMov(point_coord_r_zw_dest, point_coord_v_xxxy_src); - } + system_constants_used_ |= 1ull + << kSysConst_InterpolatorSamplingPattern_Index; + a_.OpUBFE(dxbc::Dest::R(param_gen_temp, 0b0100), dxbc::Src::LU(1), + param_gen_index_src, + dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + kSysConst_InterpolatorSamplingPattern_Vec) + .Select(kSysConst_InterpolatorSamplingPattern_Comp)); + a_.OpIf(bool(xenos::SampleLocation::kCenter), + dxbc::Src::R(param_gen_temp, dxbc::Src::kZZZZ)); + // At center. + a_.OpMov(point_coord_r_zw_dest, point_coord_v_xxxy_src); + a_.OpElse(); + // At centroid. + a_.OpEvalCentroid(point_coord_r_zw_dest, point_coord_v_xxxy_src); + a_.OpEndIf(); // Write ps_param_gen to the specified GPR. dxbc::Src param_gen_src(dxbc::Src::R(param_gen_temp)); if (uses_register_dynamic_addressing) { @@ -1118,106 +1088,160 @@ void DxbcShaderTranslator::CompleteShaderCode() { } std::vector DxbcShaderTranslator::CompleteTranslation() { + // Because of shader_object_.resize(), pointers can't be kept persistently + // here! Resizing also zeroes the memory. + // Write the code epilogue. CompleteShaderCode(); shader_object_.clear(); - uint32_t has_pcsg = IsDxbcDomainShader() ? 1 : 0; + // 6 or 7 blobs - RDEF, ISGN, optionally PCSG, OSGN, SHEX, SFI0, STAT. + // Whether SFI0 is needed at this point is not known, always writing it. + uint32_t blob_count = 6 + uint32_t(IsDxbcDomainShader()); + // Allocate space for the header and the blob offsets. + shader_object_.resize(sizeof(dxbc::ContainerHeader) / sizeof(uint32_t) + + blob_count); - // Write the shader object header. - shader_object_.push_back('CBXD'); - // Checksum (set later). - for (uint32_t i = 0; i < 4; ++i) { - shader_object_.push_back(0); - } - shader_object_.push_back(1); - // Size (set later). - shader_object_.push_back(0); - // 5 or 6 chunks - RDEF, ISGN, optionally PCSG, OSGN, SHEX, STAT. - shader_object_.push_back(5 + has_pcsg); - // Chunk offsets (set later). - for (uint32_t i = 0; i < shader_object_[7]; ++i) { - shader_object_.push_back(0); + uint32_t blob_offset_position_dwords = + sizeof(dxbc::ContainerHeader) / sizeof(uint32_t); + uint32_t blob_position_dwords = uint32_t(shader_object_.size()); + constexpr uint32_t kBlobHeaderSizeDwords = + sizeof(dxbc::BlobHeader) / sizeof(uint32_t); + + // Resource definition. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords); + WriteResourceDefinition(); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kResourceDefinition; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; } - uint32_t chunk_position_dwords; - - // Write Resource DEFinitions. - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[8] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('FEDR'); - shader_object_.push_back(0); - WriteResourceDefinitions(); - shader_object_[chunk_position_dwords + 1] = - (uint32_t(shader_object_.size()) - chunk_position_dwords - 2) * - sizeof(uint32_t); - - // Write Input SiGNature. - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[9] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('NGSI'); - shader_object_.push_back(0); + // Input signature. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords); WriteInputSignature(); - shader_object_[chunk_position_dwords + 1] = - (uint32_t(shader_object_.size()) - chunk_position_dwords - 2) * - sizeof(uint32_t); - - // Write Patch Constant SiGnature. - if (has_pcsg) { - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[10] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('GSCP'); - shader_object_.push_back(0); - WritePatchConstantSignature(); - shader_object_[chunk_position_dwords + 1] = - (uint32_t(shader_object_.size()) - chunk_position_dwords - 2) * - sizeof(uint32_t); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kInputSignature; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; } - // Write Output SiGNature. - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[10 + has_pcsg] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('NGSO'); - shader_object_.push_back(0); + // Patch constant signature. + if (IsDxbcDomainShader()) { + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords); + WritePatchConstantSignature(); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kPatchConstantSignature; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; + } + } + + // Output signature. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords); WriteOutputSignature(); - shader_object_[chunk_position_dwords + 1] = - (uint32_t(shader_object_.size()) - chunk_position_dwords - 2) * - sizeof(uint32_t); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kOutputSignature; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; + } - // Write SHader EXtended. - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[11 + has_pcsg] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('XEHS'); - shader_object_.push_back(0); + // Shader program. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords); WriteShaderCode(); - shader_object_[chunk_position_dwords + 1] = - (uint32_t(shader_object_.size()) - chunk_position_dwords - 2) * - sizeof(uint32_t); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kShaderEx; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; + } - // Write STATistics. - chunk_position_dwords = uint32_t(shader_object_.size()); - shader_object_[12 + has_pcsg] = chunk_position_dwords * sizeof(uint32_t); - shader_object_.push_back('TATS'); - shader_object_.push_back(sizeof(stat_)); - shader_object_.resize(shader_object_.size() + - sizeof(stat_) / sizeof(uint32_t)); - std::memcpy(&shader_object_[chunk_position_dwords + 2], &stat_, - sizeof(stat_)); + // Shader feature info. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords + + sizeof(dxbc::ShaderFeatureInfo) / sizeof(uint32_t)); + std::memcpy( + shader_object_.data() + blob_position_dwords + kBlobHeaderSizeDwords, + &shader_feature_info_, sizeof(shader_feature_info_)); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kShaderFeatureInfo; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; + } - // Fill the remaining fields of the header and copy bytes out. - uint32_t shader_object_size = + // Statistics. + shader_object_[blob_offset_position_dwords] = + uint32_t(blob_position_dwords * sizeof(uint32_t)); + shader_object_.resize(blob_position_dwords + kBlobHeaderSizeDwords + + sizeof(dxbc::Statistics) / sizeof(uint32_t)); + std::memcpy( + shader_object_.data() + blob_position_dwords + kBlobHeaderSizeDwords, + &statistics_, sizeof(statistics_)); + { + auto& blob_header = *reinterpret_cast( + shader_object_.data() + blob_position_dwords); + blob_header.fourcc = dxbc::BlobHeader::FourCC::kStatistics; + blob_position_dwords = uint32_t(shader_object_.size()); + blob_header.size_bytes = + (blob_position_dwords - kBlobHeaderSizeDwords) * sizeof(uint32_t) - + shader_object_[blob_offset_position_dwords++]; + } + + // Header. + uint32_t shader_object_size_bytes = uint32_t(shader_object_.size() * sizeof(uint32_t)); - shader_object_[6] = shader_object_size; - // The checksum includes the size field, so it must be the last. - CalculateDXBCChecksum(reinterpret_cast(shader_object_.data()), - shader_object_size, - reinterpret_cast(&shader_object_[1])); + { + auto& container_header = + *reinterpret_cast(shader_object_.data()); + container_header.InitializeIdentification(); + container_header.size_bytes = shader_object_size_bytes; + container_header.blob_count = blob_count; + CalculateDXBCChecksum( + reinterpret_cast(shader_object_.data()), + static_cast(shader_object_size_bytes), + reinterpret_cast(&container_header.hash)); + } + // TODO(Triang3l): Avoid copy? std::vector shader_object_bytes; - shader_object_bytes.resize(shader_object_size); + shader_object_bytes.resize(shader_object_size_bytes); std::memcpy(shader_object_bytes.data(), shader_object_.data(), - shader_object_size); + shader_object_size_bytes); return shader_object_bytes; } @@ -1265,7 +1289,6 @@ void DxbcShaderTranslator::EmitInstructionDisassembly() { if (!emit_source_map_) { return; } - const char* source = instruction_disassembly_buffer_.buffer(); uint32_t length = uint32_t(instruction_disassembly_buffer_.length()); // Trim leading spaces and trailing new line. @@ -1279,22 +1302,10 @@ void DxbcShaderTranslator::EmitInstructionDisassembly() { if (length == 0) { return; } - - uint32_t length_dwords = - (length + 1 + (sizeof(uint32_t) - 1)) / sizeof(uint32_t); - shader_code_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_CUSTOMDATA) | - ENCODE_D3D10_SB_CUSTOMDATA_CLASS(D3D10_SB_CUSTOMDATA_COMMENT)); - shader_code_.push_back(2 + length_dwords); - size_t offset_dwords = shader_code_.size(); - shader_code_.resize(offset_dwords + length_dwords); - char* target = reinterpret_cast(&shader_code_[offset_dwords]); - std::memcpy(target, source, length); - target[length] = '\0'; - // Don't leave uninitialized data, and make sure multiple invocations of the - // translator for the same Xenos shader give the same DXBC. - std::memset(target + length + 1, dxbc::kAlignmentPadding, - length_dwords * sizeof(uint32_t) - length - 1); + char* dest = reinterpret_cast( + a_.OpCustomData(dxbc::CustomDataClass::kComment, length + 1)); + std::memcpy(dest, source, length); + dest[length] = '\0'; } dxbc::Src DxbcShaderTranslator::LoadOperand(const InstructionOperand& operand, @@ -1496,11 +1507,12 @@ void DxbcShaderTranslator::StoreResult(const InstructionResult& result, } else { dest = dxbc::Dest::ODepth(); } - // Depth outside [0, 1] is not safe for use with the ROV code and with - // 20e4-as-32 conversion. Though 20e4 float depth can store values between - // 1 and 2, it's a very unusual case. Direct3D 10+ SV_Depth, however, can - // accept any values, including specials, when the depth buffer is - // floating-point; but depth is clamped to the viewport bounds anyway. + // Depth outside [0, 1] is not safe for use with the ROV code, with + // 20e4-as-32 conversion and with 0...1 to 0...0.5 float24 remapping. + // Though 20e4 float depth can store values between 1 and 2, it's a very + // unusual case. Direct3D 10+ SV_Depth, however, can accept any values, + // including specials, when the depth buffer is floating-point; but depth + // is clamped to the viewport bounds anyway. is_clamped = true; break; } @@ -1892,509 +1904,448 @@ void DxbcShaderTranslator::ProcessAllocInstruction( } } -uint32_t DxbcShaderTranslator::AppendString(std::vector& dest, - const char* source) { - size_t size = std::strlen(source) + 1; - size_t size_aligned = xe::align(size, sizeof(uint32_t)); - size_t dest_position = dest.size(); - dest.resize(dest_position + size_aligned / sizeof(uint32_t)); - std::memcpy(&dest[dest_position], source, size); - // Don't leave uninitialized data, and make sure multiple invocations of the - // translator for the same Xenos shader give the same DXBC. - std::memset(reinterpret_cast(&dest[dest_position]) + size, - dxbc::kAlignmentPadding, size_aligned - size); - return uint32_t(size_aligned); -} - -const DxbcShaderTranslator::RdefType DxbcShaderTranslator::rdef_types_[size_t( - DxbcShaderTranslator::RdefTypeIndex::kCount)] = { - // kFloat - {"float", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kFloat, - 1, 1, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kFloat2 - {"float2", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 2, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kFloat3 - {"float3", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 3, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kFloat4 - {"float4", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 4, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kInt - {"int", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kInt, 1, - 1, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kUint - {"uint", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kUInt, 1, - 1, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kUint2 - {"uint2", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 2, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kUint4 - {"uint4", dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 4, 0, 0, RdefTypeIndex::kUnknown, nullptr}, - // kFloat4Array4 - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 4, 4, 0, RdefTypeIndex::kFloat4, nullptr}, - // kFloat4Array6 - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 4, 6, 0, RdefTypeIndex::kFloat4, nullptr}, - // kFloat4ConstantArray - float constants - size written dynamically. - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kFloat, - 1, 4, 0, 0, RdefTypeIndex::kFloat4, nullptr}, - // kUint4Array2 - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 4, 2, 0, RdefTypeIndex::kUint4, nullptr}, - // kUint4Array8 - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 4, 8, 0, RdefTypeIndex::kUint4, nullptr}, - // kUint4Array48 - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 4, 48, 0, RdefTypeIndex::kUint4, nullptr}, - // kUint4DescriptorIndexArray - bindless descriptor indices - size written - // dynamically. - {nullptr, dxbc::RdefVariableClass::kVector, dxbc::RdefVariableType::kUInt, - 1, 4, 0, 0, RdefTypeIndex::kUint4, nullptr}, +const DxbcShaderTranslator::ShaderRdefType + DxbcShaderTranslator::rdef_types_[size_t( + DxbcShaderTranslator::ShaderRdefTypeIndex::kCount)] = { + // kFloat + {"float", dxbc::RdefVariableClass::kScalar, + dxbc::RdefVariableType::kFloat, 1, 1, 0, + ShaderRdefTypeIndex::kUnknown}, + // kFloat2 + {"float2", dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 2, 0, + ShaderRdefTypeIndex::kUnknown}, + // kFloat3 + {"float3", dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 3, 0, + ShaderRdefTypeIndex::kUnknown}, + // kFloat4 + {"float4", dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 4, 0, + ShaderRdefTypeIndex::kUnknown}, + // kInt + {"int", dxbc::RdefVariableClass::kScalar, dxbc::RdefVariableType::kInt, + 1, 1, 0, ShaderRdefTypeIndex::kUnknown}, + // kUint + {"dword", dxbc::RdefVariableClass::kScalar, + dxbc::RdefVariableType::kUInt, 1, 1, 0, ShaderRdefTypeIndex::kUnknown}, + // kUint2 + {"uint2", dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 2, 0, ShaderRdefTypeIndex::kUnknown}, + // kUint4 + {"uint4", dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 4, 0, ShaderRdefTypeIndex::kUnknown}, + // kFloat4Array4 + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 4, 4, ShaderRdefTypeIndex::kFloat4}, + // kFloat4Array6 + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 4, 6, ShaderRdefTypeIndex::kFloat4}, + // kFloat4ConstantArray - float constants - size written dynamically. + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kFloat, 1, 4, 0, ShaderRdefTypeIndex::kFloat4}, + // kUint4Array2 + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 4, 2, ShaderRdefTypeIndex::kUint4}, + // kUint4Array8 + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 4, 8, ShaderRdefTypeIndex::kUint4}, + // kUint4Array48 + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 4, 48, ShaderRdefTypeIndex::kUint4}, + // kUint4DescriptorIndexArray - bindless descriptor indices - size + // written + // dynamically. + {nullptr, dxbc::RdefVariableClass::kVector, + dxbc::RdefVariableType::kUInt, 1, 4, 0, ShaderRdefTypeIndex::kUint4}, }; const DxbcShaderTranslator::SystemConstantRdef DxbcShaderTranslator:: system_constant_rdef_[DxbcShaderTranslator::kSysConst_Count] = { - {"xe_flags", RdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_tessellation_factor_range", RdefTypeIndex::kFloat2, + {"xe_flags", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_tessellation_factor_range", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, - {"xe_line_loop_closing_index", RdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_line_loop_closing_index", ShaderRdefTypeIndex::kUint, + sizeof(uint32_t)}, - {"xe_vertex_index_endian", RdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_vertex_base_index", RdefTypeIndex::kInt, sizeof(int32_t)}, - {"xe_point_size", RdefTypeIndex::kFloat2, sizeof(float) * 2}, + {"xe_vertex_index_endian", ShaderRdefTypeIndex::kUint, + sizeof(uint32_t)}, + {"xe_vertex_base_index", ShaderRdefTypeIndex::kInt, sizeof(int32_t)}, + {"xe_point_size", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, - {"xe_point_size_min_max", RdefTypeIndex::kFloat2, sizeof(float) * 2}, - {"xe_point_screen_to_ndc", RdefTypeIndex::kFloat2, sizeof(float) * 2}, + {"xe_point_size_min_max", ShaderRdefTypeIndex::kFloat2, + sizeof(float) * 2}, + {"xe_point_screen_to_ndc", ShaderRdefTypeIndex::kFloat2, + sizeof(float) * 2}, - {"xe_user_clip_planes", RdefTypeIndex::kFloat4Array6, + {"xe_user_clip_planes", ShaderRdefTypeIndex::kFloat4Array6, sizeof(float) * 4 * 6}, - {"xe_ndc_scale", RdefTypeIndex::kFloat3, sizeof(float) * 3}, - {"xe_interpolator_sampling_pattern", RdefTypeIndex::kUint, + {"xe_ndc_scale", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, + {"xe_interpolator_sampling_pattern", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_ndc_offset", RdefTypeIndex::kFloat3, sizeof(float) * 3}, - {"xe_ps_param_gen", RdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_ndc_offset", ShaderRdefTypeIndex::kFloat3, sizeof(float) * 3}, + {"xe_ps_param_gen", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_texture_swizzled_signs", RdefTypeIndex::kUint4Array2, + {"xe_texture_swizzled_signs", ShaderRdefTypeIndex::kUint4Array2, sizeof(uint32_t) * 4 * 2}, - {"xe_sample_count_log2", RdefTypeIndex::kUint2, sizeof(uint32_t) * 2}, - {"xe_alpha_test_reference", RdefTypeIndex::kFloat, sizeof(float)}, - {"xe_alpha_to_mask", RdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_textures_resolved", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_sample_count_log2", ShaderRdefTypeIndex::kUint2, + sizeof(uint32_t) * 2}, + {"xe_alpha_test_reference", ShaderRdefTypeIndex::kFloat, sizeof(float)}, - {"xe_color_exp_bias", RdefTypeIndex::kFloat4, sizeof(float) * 4}, + {"xe_color_exp_bias", ShaderRdefTypeIndex::kFloat4, sizeof(float) * 4}, - {"xe_color_output_map", RdefTypeIndex::kUint4, sizeof(uint32_t) * 4}, - - {"xe_edram_resolution_square_scale", RdefTypeIndex::kUint, - sizeof(uint32_t)}, - {"xe_edram_pitch_tiles", RdefTypeIndex::kUint, sizeof(uint32_t)}, - {"xe_edram_depth_range", RdefTypeIndex::kFloat2, sizeof(float) * 2}, - - {"xe_edram_poly_offset_front", RdefTypeIndex::kFloat2, - sizeof(float) * 2}, - {"xe_edram_poly_offset_back", RdefTypeIndex::kFloat2, + {"xe_alpha_to_mask", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_edram_pitch_tiles", ShaderRdefTypeIndex::kUint, sizeof(uint32_t)}, + {"xe_edram_depth_range", ShaderRdefTypeIndex::kFloat2, sizeof(float) * 2}, - {"xe_edram_depth_base_dwords", RdefTypeIndex::kUint, sizeof(uint32_t), - sizeof(float) * 3}, + {"xe_edram_poly_offset_front", ShaderRdefTypeIndex::kFloat2, + sizeof(float) * 2}, + {"xe_edram_poly_offset_back", ShaderRdefTypeIndex::kFloat2, + sizeof(float) * 2}, - {"xe_edram_stencil", RdefTypeIndex::kUint4Array2, + {"xe_edram_depth_base_dwords", ShaderRdefTypeIndex::kUint, + sizeof(uint32_t), sizeof(float) * 3}, + + {"xe_edram_stencil", ShaderRdefTypeIndex::kUint4Array2, sizeof(uint32_t) * 4 * 2}, - {"xe_edram_rt_base_dwords_scaled", RdefTypeIndex::kUint4, + {"xe_edram_rt_base_dwords_scaled", ShaderRdefTypeIndex::kUint4, sizeof(uint32_t) * 4}, - {"xe_edram_rt_format_flags", RdefTypeIndex::kUint4, + {"xe_edram_rt_format_flags", ShaderRdefTypeIndex::kUint4, sizeof(uint32_t) * 4}, - {"xe_edram_rt_clamp", RdefTypeIndex::kFloat4Array4, + {"xe_edram_rt_clamp", ShaderRdefTypeIndex::kFloat4Array4, sizeof(float) * 4 * 4}, - {"xe_edram_rt_keep_mask", RdefTypeIndex::kUint4Array2, + {"xe_edram_rt_keep_mask", ShaderRdefTypeIndex::kUint4Array2, sizeof(uint32_t) * 4 * 2}, - {"xe_edram_rt_blend_factors_ops", RdefTypeIndex::kUint4, + {"xe_edram_rt_blend_factors_ops", ShaderRdefTypeIndex::kUint4, sizeof(uint32_t) * 4}, - {"xe_edram_blend_constant", RdefTypeIndex::kFloat4, sizeof(float) * 4}, + {"xe_edram_blend_constant", ShaderRdefTypeIndex::kFloat4, + sizeof(float) * 4}, }; -void DxbcShaderTranslator::WriteResourceDefinitions() { - uint32_t chunk_position_dwords = uint32_t(shader_object_.size()); - uint32_t new_offset; +void DxbcShaderTranslator::WriteResourceDefinition() { + // Because of shader_object_.resize(), pointers can't be kept persistently + // here! Resizing also zeroes the memory. + + uint32_t blob_position_dwords = uint32_t(shader_object_.size()); + uint32_t name_ptr; const Shader::ConstantRegisterMap& constant_register_map = current_shader().constant_register_map(); - // *************************************************************************** - // Header - // *************************************************************************** - - // Constant buffer count. - shader_object_.push_back(cbuffer_count_); - // Constant buffer offset (set later). - shader_object_.push_back(0); - // Bindful resource count. - uint32_t resource_count = srv_count_ + uav_count_ + cbuffer_count_; - if (!sampler_bindings_.empty()) { - if (bindless_resources_used_) { - ++resource_count; - } else { - resource_count += uint32_t(sampler_bindings_.size()); - } - } - shader_object_.push_back(resource_count); - // Bindful resource buffer offset (set later). - shader_object_.push_back(0); - if (IsDxbcVertexShader()) { - // vs_5_1 - shader_object_.push_back(0xFFFE0501u); - } else if (IsDxbcDomainShader()) { - // ds_5_1 - shader_object_.push_back(0x44530501u); - } else { - assert_true(is_pixel_shader()); - // ps_5_1 - shader_object_.push_back(0xFFFF0501u); - } - // Compiler flags - default for SM 5.1 (no preshader, prefer flow control), - // and also skip optimization and IEEE strictness. - shader_object_.push_back(0x2504); - // Generator offset (directly after the RDEF header in our case). - shader_object_.push_back(60); - // RD11, but with nibbles inverted (unlike in SM 5.0). - shader_object_.push_back(0x25441313); - // Unknown fields. - shader_object_.push_back(60); - shader_object_.push_back(24); - // Was 32 in SM 5.0. - shader_object_.push_back(40); - shader_object_.push_back(40); - shader_object_.push_back(36); - shader_object_.push_back(12); - shader_object_.push_back(0); + // Allocate space for the header, will fill when all pointers and counts are + // known. + shader_object_.resize(shader_object_.size() + + sizeof(dxbc::RdefHeader) / sizeof(uint32_t)); // Generator name. - AppendString(shader_object_, "Xenia"); + dxbc::AppendAlignedString(shader_object_, "Xenia"); // *************************************************************************** // Constant types // *************************************************************************** // Type names. - new_offset = (uint32_t(shader_object_.size()) - chunk_position_dwords) * - sizeof(uint32_t); - uint32_t type_name_offsets[size_t(RdefTypeIndex::kCount)]; - for (uint32_t i = 0; i < uint32_t(RdefTypeIndex::kCount); ++i) { - const RdefType& type = rdef_types_[i]; + name_ptr = (uint32_t(shader_object_.size()) - blob_position_dwords) * + sizeof(uint32_t); + uint32_t type_name_ptrs[size_t(ShaderRdefTypeIndex::kCount)]; + for (uint32_t i = 0; i < uint32_t(ShaderRdefTypeIndex::kCount); ++i) { + const ShaderRdefType& type = rdef_types_[i]; if (type.name == nullptr) { // Array - use the name of the element type. - type_name_offsets[i] = - type_name_offsets[uint32_t(type.array_element_type)]; + assert_true(uint32_t(type.array_element_type) < i); + type_name_ptrs[i] = type_name_ptrs[uint32_t(type.array_element_type)]; continue; } - type_name_offsets[i] = new_offset; - new_offset += AppendString(shader_object_, type.name); + type_name_ptrs[i] = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, type.name); } // Types. uint32_t types_position_dwords = uint32_t(shader_object_.size()); - const uint32_t type_size_dwords = 9; - uint32_t types_offset = - (types_position_dwords - chunk_position_dwords) * sizeof(uint32_t); - const uint32_t type_size = type_size_dwords * sizeof(uint32_t); - for (uint32_t i = 0; i < uint32_t(RdefTypeIndex::kCount); ++i) { - const RdefType& type = rdef_types_[i]; - shader_object_.push_back(uint32_t(type.variable_class) | - (uint32_t(type.variable_type) << 16)); - shader_object_.push_back(type.row_count | (type.column_count << 16)); - switch (RdefTypeIndex(i)) { - case RdefTypeIndex::kFloat4ConstantArray: - // Declaring a 0-sized array may not be safe, so write something valid - // even if they aren't used. - shader_object_.push_back( - std::max(constant_register_map.float_count, uint32_t(1))); - break; - case RdefTypeIndex::kUint4DescriptorIndexArray: - shader_object_.push_back(std::max( - uint32_t((GetBindlessResourceCount() + 3) >> 2), uint32_t(1))); - break; - default: - shader_object_.push_back(type.element_count | - (type.struct_member_count << 16)); - } - // Struct member offset (set later). - shader_object_.push_back(0); - // Unknown. - shader_object_.push_back(0); - shader_object_.push_back(0); - shader_object_.push_back(0); - shader_object_.push_back(0); - shader_object_.push_back(type_name_offsets[i]); - } - -#if 0 - // Structure members. Structures are not used currently, but were used in the - // past, so the code is kept here. - for (uint32_t i = 0; i < uint32_t(RdefTypeIndex::kCount); ++i) { - const RdefType& type = rdef_types_[i]; - const RdefStructMember* struct_members = type.struct_members; - if (struct_members == nullptr) { - continue; - } - uint32_t struct_member_position_dwords = uint32_t(shader_object_.size()); - shader_object_[types_position_dwords + i * type_size_dwords + 3] = - (struct_member_position_dwords - chunk_position_dwords) * - sizeof(uint32_t); - uint32_t struct_member_count = type.struct_member_count; - // Reserve space for names and write types and offsets. - for (uint32_t j = 0; j < struct_member_count; ++j) { - shader_object_.push_back(0); - shader_object_.push_back(types_offset + - uint32_t(struct_members[j].type) * type_size); - shader_object_.push_back(struct_members[j].offset); - } - // Write member names. - new_offset = (uint32_t(shader_object_.size()) - chunk_position_dwords) * - sizeof(uint32_t); - for (uint32_t j = 0; j < struct_member_count; ++j) { - shader_object_[struct_member_position_dwords + j * 3] = new_offset; - new_offset += AppendString(shader_object_, struct_members[j].name); + uint32_t types_ptr = + (types_position_dwords - blob_position_dwords) * sizeof(uint32_t); + shader_object_.resize(types_position_dwords + + sizeof(dxbc::RdefType) / sizeof(uint32_t) * + uint32_t(ShaderRdefTypeIndex::kCount)); + { + auto types = reinterpret_cast(shader_object_.data() + + types_position_dwords); + for (uint32_t i = 0; i < uint32_t(ShaderRdefTypeIndex::kCount); ++i) { + dxbc::RdefType& type = types[i]; + const ShaderRdefType& translator_type = rdef_types_[i]; + type.variable_class = translator_type.variable_class; + type.variable_type = translator_type.variable_type; + type.row_count = translator_type.row_count; + type.column_count = translator_type.column_count; + switch (ShaderRdefTypeIndex(i)) { + case ShaderRdefTypeIndex::kFloat4ConstantArray: + // Declaring a 0-sized array may not be safe, so write something valid + // even if they aren't used. + type.element_count = std::max( + uint16_t(constant_register_map.float_count), uint16_t(1)); + break; + case ShaderRdefTypeIndex::kUint4DescriptorIndexArray: + type.element_count = std::max( + uint16_t((GetBindlessResourceCount() + 3) >> 2), uint16_t(1)); + break; + default: + type.element_count = translator_type.element_count; + } + type.name_ptr = type_name_ptrs[i]; } } -#endif // *************************************************************************** // Constants // *************************************************************************** // Names. - new_offset = (uint32_t(shader_object_.size()) - chunk_position_dwords) * - sizeof(uint32_t); - uint32_t constant_name_offsets_system[kSysConst_Count]; + name_ptr = (uint32_t(shader_object_.size()) - blob_position_dwords) * + sizeof(uint32_t); + uint32_t constant_name_ptrs_system[kSysConst_Count]; if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { for (uint32_t i = 0; i < kSysConst_Count; ++i) { - constant_name_offsets_system[i] = new_offset; - new_offset += AppendString(shader_object_, system_constant_rdef_[i].name); + constant_name_ptrs_system[i] = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, + system_constant_rdef_[i].name); } } - uint32_t constant_name_offset_float = new_offset; + uint32_t constant_name_ptr_float = name_ptr; if (cbuffer_index_float_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_float_constants"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_float_constants"); } - uint32_t constant_name_offset_bool = new_offset; - uint32_t constant_name_offset_loop = new_offset; + uint32_t constant_name_ptr_bool = name_ptr; + uint32_t constant_name_ptr_loop = name_ptr; if (cbuffer_index_bool_loop_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_bool_constants"); - constant_name_offset_loop = new_offset; - new_offset += AppendString(shader_object_, "xe_loop_constants"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_bool_constants"); + constant_name_ptr_loop = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_loop_constants"); } - uint32_t constant_name_offset_fetch = new_offset; + uint32_t constant_name_ptr_fetch = name_ptr; if (cbuffer_index_fetch_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_fetch_constants"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_fetch_constants"); } - uint32_t constant_name_offset_descriptor_indices = new_offset; + uint32_t constant_name_ptr_descriptor_indices = name_ptr; if (cbuffer_index_descriptor_indices_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_descriptor_indices"); + name_ptr += + dxbc::AppendAlignedString(shader_object_, "xe_descriptor_indices"); } - const uint32_t constant_size = 10 * sizeof(uint32_t); - // System constants. - uint32_t constant_offset_system = new_offset; + uint32_t constant_position_dwords_system = uint32_t(shader_object_.size()); if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { - uint32_t system_cbuffer_constant_offset = 0; + shader_object_.resize(constant_position_dwords_system + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t) * + kSysConst_Count); + auto constants_system = reinterpret_cast( + shader_object_.data() + constant_position_dwords_system); + uint32_t constant_offset_system = 0; for (uint32_t i = 0; i < kSysConst_Count; ++i) { - const SystemConstantRdef& constant = system_constant_rdef_[i]; - shader_object_.push_back(constant_name_offsets_system[i]); - shader_object_.push_back(system_cbuffer_constant_offset); - shader_object_.push_back(constant.size); - shader_object_.push_back((system_constants_used_ & (1ull << i)) - ? dxbc::kRdefVariableFlagUsed - : 0); - shader_object_.push_back(types_offset + - uint32_t(constant.type) * type_size); - // Default value (always 0). - shader_object_.push_back(0); - // Unknown. - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - system_cbuffer_constant_offset += constant.size + constant.padding_after; - new_offset += constant_size; + dxbc::RdefVariable& constant_system = constants_system[i]; + const SystemConstantRdef& translator_constant_system = + system_constant_rdef_[i]; + constant_system.name_ptr = constant_name_ptrs_system[i]; + constant_system.start_offset_bytes = constant_offset_system; + constant_system.size_bytes = translator_constant_system.size; + constant_system.flags = (system_constants_used_ & (uint64_t(1) << i)) + ? dxbc::kRdefVariableFlagUsed + : 0; + constant_system.type_ptr = + types_ptr + + sizeof(dxbc::RdefType) * uint32_t(translator_constant_system.type); + constant_system.start_texture = UINT32_MAX; + constant_system.start_sampler = UINT32_MAX; + constant_offset_system += translator_constant_system.size + + translator_constant_system.padding_after; } } // Float constants. - uint32_t constant_offset_float = new_offset; + uint32_t constant_position_dwords_float = uint32_t(shader_object_.size()); if (cbuffer_index_float_constants_ != kBindingIndexUnallocated) { assert_not_zero(constant_register_map.float_count); - shader_object_.push_back(constant_name_offset_float); - shader_object_.push_back(0); - shader_object_.push_back(constant_register_map.float_count * 4 * - sizeof(float)); - shader_object_.push_back(dxbc::kRdefVariableFlagUsed); - shader_object_.push_back(types_offset + - uint32_t(RdefTypeIndex::kFloat4ConstantArray) * - type_size); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - new_offset += constant_size; + shader_object_.resize(constant_position_dwords_float + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t)); + auto& constant_float = *reinterpret_cast( + shader_object_.data() + constant_position_dwords_float); + constant_float.name_ptr = constant_name_ptr_float; + constant_float.size_bytes = + sizeof(float) * 4 * constant_register_map.float_count; + constant_float.flags = dxbc::kRdefVariableFlagUsed; + constant_float.type_ptr = + types_ptr + sizeof(dxbc::RdefType) * + uint32_t(ShaderRdefTypeIndex::kFloat4ConstantArray); + constant_float.start_texture = UINT32_MAX; + constant_float.start_sampler = UINT32_MAX; } // Bool and loop constants. - uint32_t constant_offset_bool_loop = new_offset; + uint32_t constant_position_dwords_bool_loop = uint32_t(shader_object_.size()); if (cbuffer_index_bool_loop_constants_ != kBindingIndexUnallocated) { - shader_object_.push_back(constant_name_offset_bool); - shader_object_.push_back(0); - shader_object_.push_back(2 * 4 * sizeof(uint32_t)); - shader_object_.push_back(dxbc::kRdefVariableFlagUsed); - shader_object_.push_back(types_offset + - uint32_t(RdefTypeIndex::kUint4Array2) * type_size); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - new_offset += constant_size; + shader_object_.resize(constant_position_dwords_bool_loop + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t) * 2); + auto constants_bool_loop = reinterpret_cast( + shader_object_.data() + constant_position_dwords_bool_loop); - shader_object_.push_back(constant_name_offset_loop); - shader_object_.push_back(2 * 4 * sizeof(uint32_t)); - shader_object_.push_back(8 * 4 * sizeof(uint32_t)); - shader_object_.push_back(dxbc::kRdefVariableFlagUsed); - shader_object_.push_back(types_offset + - uint32_t(RdefTypeIndex::kUint4Array8) * type_size); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - new_offset += constant_size; + constants_bool_loop[0].name_ptr = constant_name_ptr_bool; + constants_bool_loop[0].size_bytes = sizeof(uint32_t) * 4 * 2; + for (size_t i = 0; i < xe::countof(constant_register_map.bool_bitmap); + ++i) { + if (constant_register_map.bool_bitmap[i]) { + constants_bool_loop[0].flags |= dxbc::kRdefVariableFlagUsed; + break; + } + } + constants_bool_loop[0].type_ptr = + types_ptr + + sizeof(dxbc::RdefType) * uint32_t(ShaderRdefTypeIndex::kUint4Array2); + constants_bool_loop[0].start_texture = UINT32_MAX; + constants_bool_loop[0].start_sampler = UINT32_MAX; + + constants_bool_loop[1].name_ptr = constant_name_ptr_loop; + constants_bool_loop[1].start_offset_bytes = sizeof(uint32_t) * 4 * 2; + constants_bool_loop[1].size_bytes = sizeof(uint32_t) * 4 * 8; + constants_bool_loop[1].flags = + constant_register_map.loop_bitmap ? dxbc::kRdefVariableFlagUsed : 0; + constants_bool_loop[1].type_ptr = + types_ptr + + sizeof(dxbc::RdefType) * uint32_t(ShaderRdefTypeIndex::kUint4Array8); + constants_bool_loop[1].start_texture = UINT32_MAX; + constants_bool_loop[1].start_sampler = UINT32_MAX; } // Fetch constants. - uint32_t constant_offset_fetch = new_offset; + uint32_t constant_position_dwords_fetch = uint32_t(shader_object_.size()); if (cbuffer_index_fetch_constants_ != kBindingIndexUnallocated) { - shader_object_.push_back(constant_name_offset_fetch); - shader_object_.push_back(0); - shader_object_.push_back(32 * 6 * sizeof(uint32_t)); - shader_object_.push_back(dxbc::kRdefVariableFlagUsed); - shader_object_.push_back( - types_offset + uint32_t(RdefTypeIndex::kUint4Array48) * type_size); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - new_offset += constant_size; + shader_object_.resize(constant_position_dwords_fetch + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t)); + auto& constant_fetch = *reinterpret_cast( + shader_object_.data() + constant_position_dwords_fetch); + constant_fetch.name_ptr = constant_name_ptr_fetch; + constant_fetch.size_bytes = sizeof(uint32_t) * 6 * 32; + constant_fetch.flags = dxbc::kRdefVariableFlagUsed; + constant_fetch.type_ptr = + types_ptr + + sizeof(dxbc::RdefType) * uint32_t(ShaderRdefTypeIndex::kUint4Array48); + constant_fetch.start_texture = UINT32_MAX; + constant_fetch.start_sampler = UINT32_MAX; } // Bindless description indices. - uint32_t constant_offset_descriptor_indices = new_offset; + uint32_t constant_position_dwords_descriptor_indices = + uint32_t(shader_object_.size()); if (cbuffer_index_descriptor_indices_ != kBindingIndexUnallocated) { assert_not_zero(GetBindlessResourceCount()); - shader_object_.push_back(constant_name_offset_descriptor_indices); - shader_object_.push_back(0); - shader_object_.push_back( - xe::align(GetBindlessResourceCount(), uint32_t(4)) * sizeof(uint32_t)); - shader_object_.push_back(dxbc::kRdefVariableFlagUsed); - shader_object_.push_back( - types_offset + - uint32_t(RdefTypeIndex::kUint4DescriptorIndexArray) * type_size); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(0); - new_offset += constant_size; + shader_object_.resize(constant_position_dwords_descriptor_indices + + sizeof(dxbc::RdefVariable) / sizeof(uint32_t)); + auto& constant_descriptor_indices = *reinterpret_cast( + shader_object_.data() + constant_position_dwords_descriptor_indices); + constant_descriptor_indices.name_ptr = constant_name_ptr_descriptor_indices; + constant_descriptor_indices.size_bytes = + sizeof(uint32_t) * xe::align(GetBindlessResourceCount(), uint32_t(4)); + constant_descriptor_indices.flags = dxbc::kRdefVariableFlagUsed; + constant_descriptor_indices.type_ptr = + types_ptr + + sizeof(dxbc::RdefType) * + uint32_t(ShaderRdefTypeIndex::kUint4DescriptorIndexArray); + constant_descriptor_indices.start_texture = UINT32_MAX; + constant_descriptor_indices.start_sampler = UINT32_MAX; } // *************************************************************************** // Constant buffers // *************************************************************************** - // Write the names. - new_offset = (uint32_t(shader_object_.size()) - chunk_position_dwords) * - sizeof(uint32_t); - uint32_t cbuffer_name_offset_system = new_offset; + // Names. + name_ptr = (uint32_t(shader_object_.size()) - blob_position_dwords) * + sizeof(uint32_t); + uint32_t cbuffer_name_ptr_system = name_ptr; if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_system_cbuffer"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_system_cbuffer"); } - uint32_t cbuffer_name_offset_float = new_offset; + uint32_t cbuffer_name_ptr_float = name_ptr; if (cbuffer_index_float_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_float_cbuffer"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_float_cbuffer"); } - uint32_t cbuffer_name_offset_bool_loop = new_offset; + uint32_t cbuffer_name_ptr_bool_loop = name_ptr; if (cbuffer_index_bool_loop_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_bool_loop_cbuffer"); + name_ptr += + dxbc::AppendAlignedString(shader_object_, "xe_bool_loop_cbuffer"); } - uint32_t cbuffer_name_offset_fetch = new_offset; + uint32_t cbuffer_name_ptr_fetch = name_ptr; if (cbuffer_index_fetch_constants_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_fetch_cbuffer"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_fetch_cbuffer"); } - uint32_t cbuffer_name_offset_descriptor_indices = new_offset; + uint32_t cbuffer_name_ptr_descriptor_indices = name_ptr; if (cbuffer_index_descriptor_indices_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_descriptor_indices_cbuffer"); + name_ptr += dxbc::AppendAlignedString(shader_object_, + "xe_descriptor_indices_cbuffer"); } - // Write the offset to the header. - shader_object_[chunk_position_dwords + 1] = new_offset; - - // Write all the constant buffers, sorted by their binding index. - for (uint32_t i = 0; i < cbuffer_count_; ++i) { - if (i == cbuffer_index_system_constants_) { - shader_object_.push_back(cbuffer_name_offset_system); - shader_object_.push_back(kSysConst_Count); - shader_object_.push_back(constant_offset_system); - shader_object_.push_back( - uint32_t(xe::align(sizeof(SystemConstants), 4 * sizeof(uint32_t)))); - shader_object_.push_back(uint32_t(dxbc::RdefCbufferType::kCbuffer)); - // No D3D_SHADER_CBUFFER_FLAGS. - shader_object_.push_back(0); - } else if (i == cbuffer_index_float_constants_) { - assert_not_zero(constant_register_map.float_count); - shader_object_.push_back(cbuffer_name_offset_float); - shader_object_.push_back(1); - shader_object_.push_back(constant_offset_float); - shader_object_.push_back(constant_register_map.float_count * 4 * - sizeof(float)); - shader_object_.push_back(uint32_t(dxbc::RdefCbufferType::kCbuffer)); - shader_object_.push_back(0); - } else if (i == cbuffer_index_bool_loop_constants_) { - shader_object_.push_back(cbuffer_name_offset_bool_loop); - // Bool constants and loop constants are separate for easier debugging. - shader_object_.push_back(2); - shader_object_.push_back(constant_offset_bool_loop); - shader_object_.push_back((2 + 8) * 4 * sizeof(uint32_t)); - shader_object_.push_back(uint32_t(dxbc::RdefCbufferType::kCbuffer)); - shader_object_.push_back(0); - } else if (i == cbuffer_index_fetch_constants_) { - shader_object_.push_back(cbuffer_name_offset_fetch); - shader_object_.push_back(1); - shader_object_.push_back(constant_offset_fetch); - shader_object_.push_back(32 * 6 * sizeof(uint32_t)); - shader_object_.push_back(uint32_t(dxbc::RdefCbufferType::kCbuffer)); - shader_object_.push_back(0); - } else if (i == cbuffer_index_descriptor_indices_) { - assert_not_zero(GetBindlessResourceCount()); - shader_object_.push_back(cbuffer_name_offset_descriptor_indices); - shader_object_.push_back(1); - shader_object_.push_back(constant_offset_descriptor_indices); - shader_object_.push_back( - xe::align(GetBindlessResourceCount(), uint32_t(4)) * - sizeof(uint32_t)); - shader_object_.push_back(uint32_t(dxbc::RdefCbufferType::kCbuffer)); - shader_object_.push_back(0); - } else { - assert_unhandled_case(i); + // All the constant buffers, sorted by their binding index. + uint32_t cbuffers_position_dwords = uint32_t(shader_object_.size()); + shader_object_.resize(cbuffers_position_dwords + sizeof(dxbc::RdefCbuffer) / + sizeof(uint32_t) * + cbuffer_count_); + { + auto cbuffers = reinterpret_cast( + shader_object_.data() + cbuffers_position_dwords); + for (uint32_t i = 0; i < cbuffer_count_; ++i) { + dxbc::RdefCbuffer& cbuffer = cbuffers[i]; + cbuffer.type = dxbc::RdefCbufferType::kCbuffer; + if (i == cbuffer_index_system_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_system; + cbuffer.variable_count = kSysConst_Count; + cbuffer.variables_ptr = + (constant_position_dwords_system - blob_position_dwords) * + sizeof(uint32_t); + cbuffer.size_vector_aligned_bytes = + uint32_t(xe::align(sizeof(SystemConstants), sizeof(uint32_t) * 4)); + } else if (i == cbuffer_index_float_constants_) { + assert_not_zero(constant_register_map.float_count); + cbuffer.name_ptr = cbuffer_name_ptr_float; + cbuffer.variable_count = 1; + cbuffer.variables_ptr = + (constant_position_dwords_float - blob_position_dwords) * + sizeof(uint32_t); + cbuffer.size_vector_aligned_bytes = + sizeof(float) * 4 * constant_register_map.float_count; + } else if (i == cbuffer_index_bool_loop_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_bool_loop; + cbuffer.variable_count = 2; + cbuffer.variables_ptr = + (constant_position_dwords_bool_loop - blob_position_dwords) * + sizeof(uint32_t); + cbuffer.size_vector_aligned_bytes = sizeof(uint32_t) * 4 * (2 + 8); + } else if (i == cbuffer_index_fetch_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_fetch; + cbuffer.variable_count = 1; + cbuffer.variables_ptr = + (constant_position_dwords_fetch - blob_position_dwords) * + sizeof(uint32_t); + cbuffer.size_vector_aligned_bytes = sizeof(uint32_t) * 6 * 32; + } else if (i == cbuffer_index_descriptor_indices_) { + assert_not_zero(GetBindlessResourceCount()); + cbuffer.name_ptr = cbuffer_name_ptr_descriptor_indices; + cbuffer.variable_count = 1; + cbuffer.variables_ptr = (constant_position_dwords_descriptor_indices - + blob_position_dwords) * + sizeof(uint32_t); + cbuffer.size_vector_aligned_bytes = + sizeof(uint32_t) * + xe::align(GetBindlessResourceCount(), uint32_t(4)); + } else { + assert_unhandled_case(i); + } } } @@ -2402,269 +2353,271 @@ void DxbcShaderTranslator::WriteResourceDefinitions() { // Bindings, in s#, t#, u#, cb# order // *************************************************************************** - // Write used resource names, except for constant buffers because we have - // their names already. - new_offset = (uint32_t(shader_object_.size()) - chunk_position_dwords) * - sizeof(uint32_t); - uint32_t sampler_name_offset = new_offset; + // Names, except for constant buffers because their names are written already. + name_ptr = (uint32_t(shader_object_.size()) - blob_position_dwords) * + sizeof(uint32_t); + uint32_t sampler_name_ptr = name_ptr; if (!sampler_bindings_.empty()) { if (bindless_resources_used_) { - new_offset += AppendString(shader_object_, "xe_samplers"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_samplers"); } else { for (uint32_t i = 0; i < uint32_t(sampler_bindings_.size()); ++i) { - new_offset += - AppendString(shader_object_, sampler_bindings_[i].name.c_str()); + name_ptr += dxbc::AppendAlignedString( + shader_object_, sampler_bindings_[i].name.c_str()); } } } - uint32_t shared_memory_srv_name_offset = new_offset; + uint32_t shared_memory_srv_name_ptr = name_ptr; if (srv_index_shared_memory_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_shared_memory_srv"); + name_ptr += + dxbc::AppendAlignedString(shader_object_, "xe_shared_memory_srv"); } - uint32_t bindless_textures_2d_name_offset = new_offset; - uint32_t bindless_textures_3d_name_offset = new_offset; - uint32_t bindless_textures_cube_name_offset = new_offset; + uint32_t bindless_textures_2d_name_ptr = name_ptr; + uint32_t bindless_textures_3d_name_ptr = name_ptr; + uint32_t bindless_textures_cube_name_ptr = name_ptr; if (bindless_resources_used_) { if (srv_index_bindless_textures_2d_ != kBindingIndexUnallocated) { - bindless_textures_2d_name_offset = new_offset; - new_offset += AppendString(shader_object_, "xe_textures_2d"); + bindless_textures_2d_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_textures_2d"); } if (srv_index_bindless_textures_3d_ != kBindingIndexUnallocated) { - bindless_textures_3d_name_offset = new_offset; - new_offset += AppendString(shader_object_, "xe_textures_3d"); + bindless_textures_3d_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_textures_3d"); } if (srv_index_bindless_textures_cube_ != kBindingIndexUnallocated) { - bindless_textures_cube_name_offset = new_offset; - new_offset += AppendString(shader_object_, "xe_textures_cube"); + bindless_textures_cube_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_textures_cube"); } } else { for (TextureBinding& texture_binding : texture_bindings_) { - texture_binding.bindful_srv_rdef_name_offset = new_offset; - new_offset += AppendString(shader_object_, texture_binding.name.c_str()); + texture_binding.bindful_srv_rdef_name_ptr = name_ptr; + name_ptr += dxbc::AppendAlignedString(shader_object_, + texture_binding.name.c_str()); } } - uint32_t shared_memory_uav_name_offset = new_offset; + uint32_t shared_memory_uav_name_ptr = name_ptr; if (uav_index_shared_memory_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_shared_memory_uav"); + name_ptr += + dxbc::AppendAlignedString(shader_object_, "xe_shared_memory_uav"); } - uint32_t edram_name_offset = new_offset; + uint32_t edram_name_ptr = name_ptr; if (uav_index_edram_ != kBindingIndexUnallocated) { - new_offset += AppendString(shader_object_, "xe_edram"); + name_ptr += dxbc::AppendAlignedString(shader_object_, "xe_edram"); } - // Write the offset to the header. - shader_object_[chunk_position_dwords + 3] = new_offset; + uint32_t bindings_position_dwords = uint32_t(shader_object_.size()); // Samplers. if (!sampler_bindings_.empty()) { + uint32_t samplers_position_dwords = uint32_t(shader_object_.size()); + shader_object_.resize( + samplers_position_dwords + + sizeof(dxbc::RdefInputBind) / sizeof(uint32_t) * + (bindless_resources_used_ ? 1 : sampler_bindings_.size())); + auto samplers = reinterpret_cast( + shader_object_.data() + samplers_position_dwords); if (bindless_resources_used_) { // Bindless sampler heap. - shader_object_.push_back(sampler_name_offset); - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kSampler)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kVoid)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kUnknown)); - // Multisampling not applicable. - shader_object_.push_back(0); - // Registers s0:*. - shader_object_.push_back(0); - // Unbounded number of bindings. - shader_object_.push_back(0); - // No dxbc::RdefInputFlags. - shader_object_.push_back(0); - // Register space 0. - shader_object_.push_back(0); - // Sampler ID S0. - shader_object_.push_back(0); + samplers[0].name_ptr = sampler_name_ptr; + samplers[0].type = dxbc::RdefInputType::kSampler; } else { // Bindful samplers. - uint32_t sampler_current_name_offset = sampler_name_offset; - for (uint32_t i = 0; i < uint32_t(sampler_bindings_.size()); ++i) { - const SamplerBinding& sampler_binding = sampler_bindings_[i]; - shader_object_.push_back(sampler_current_name_offset); - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kSampler)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kVoid)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kUnknown)); - // Multisampling not applicable. - shader_object_.push_back(0); - // Register s[i]. - shader_object_.push_back(i); - // One binding. - shader_object_.push_back(1); - // No dxbc::RdefInputFlags. - shader_object_.push_back(0); - // Register space 0. - shader_object_.push_back(0); - // Sampler ID S[i]. - shader_object_.push_back(i); - sampler_current_name_offset += - GetStringLength(sampler_binding.name.c_str()); + uint32_t sampler_current_name_ptr = sampler_name_ptr; + for (size_t i = 0; i < sampler_bindings_.size(); ++i) { + dxbc::RdefInputBind& sampler = samplers[i]; + sampler.name_ptr = sampler_current_name_ptr; + sampler.type = dxbc::RdefInputType::kSampler; + sampler.bind_point = uint32_t(i); + sampler.bind_count = 1; + sampler.id = uint32_t(i); + sampler_current_name_ptr += + dxbc::GetAlignedStringLength(sampler_bindings_[i].name.c_str()); } } } // Shader resource views, sorted by binding index. - for (uint32_t i = 0; i < srv_count_; ++i) { - if (i == srv_index_shared_memory_) { - // Shared memory (when memexport isn't used in the pipeline). - shader_object_.push_back(shared_memory_srv_name_offset); - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kByteAddress)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kMixed)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kSRVBuffer)); - // Multisampling not applicable. - shader_object_.push_back(0); - shader_object_.push_back(uint32_t(SRVMainRegister::kSharedMemory)); - // One binding. - shader_object_.push_back(1); - // No dxbc::RdefInputFlags. - shader_object_.push_back(0); - shader_object_.push_back(uint32_t(SRVSpace::kMain)); - } else { - uint32_t texture_name_offset; - dxbc::RdefDimension texture_dimension; - uint32_t texture_register; - uint32_t texture_register_count; - SRVSpace texture_register_space; - if (bindless_resources_used_) { - // Bindless texture heap. - if (i == srv_index_bindless_textures_3d_) { - texture_name_offset = bindless_textures_3d_name_offset; - texture_dimension = dxbc::RdefDimension::kSRVTexture3D; - texture_register_space = SRVSpace::kBindlessTextures3D; - } else if (i == srv_index_bindless_textures_cube_) { - texture_name_offset = bindless_textures_cube_name_offset; - texture_dimension = dxbc::RdefDimension::kSRVTextureCube; - texture_register_space = SRVSpace::kBindlessTexturesCube; - } else { - assert_true(i == srv_index_bindless_textures_2d_); - texture_name_offset = bindless_textures_2d_name_offset; - texture_dimension = dxbc::RdefDimension::kSRVTexture2DArray; - texture_register_space = SRVSpace::kBindlessTextures2DArray; - } - texture_register = 0; - texture_register_count = 0; + uint32_t srvs_position_dwords = uint32_t(shader_object_.size()); + shader_object_.resize(srvs_position_dwords + sizeof(dxbc::RdefInputBind) / + sizeof(uint32_t) * + srv_count_); + { + auto srvs = reinterpret_cast(shader_object_.data() + + srvs_position_dwords); + for (uint32_t i = 0; i < srv_count_; ++i) { + dxbc::RdefInputBind& srv = srvs[i]; + srv.id = i; + if (i == srv_index_shared_memory_) { + // Shared memory (when memexport isn't used in the pipeline). + srv.name_ptr = shared_memory_srv_name_ptr; + srv.type = dxbc::RdefInputType::kByteAddress; + srv.return_type = dxbc::ResourceReturnType::kMixed; + srv.dimension = dxbc::RdefDimension::kSRVBuffer; + srv.bind_point = uint32_t(SRVMainRegister::kSharedMemory); + srv.bind_count = 1; + srv.bind_point_space = uint32_t(SRVSpace::kMain); } else { - // Bindful texture. - auto it = texture_bindings_for_bindful_srv_indices_.find(i); - assert_true(it != texture_bindings_for_bindful_srv_indices_.end()); - uint32_t texture_binding_index = it->second; - const TextureBinding& texture_binding = - texture_bindings_[texture_binding_index]; - texture_name_offset = texture_binding.bindful_srv_rdef_name_offset; - switch (texture_binding.dimension) { - case xenos::FetchOpDimension::k3DOrStacked: - texture_dimension = dxbc::RdefDimension::kSRVTexture3D; - break; - case xenos::FetchOpDimension::kCube: - texture_dimension = dxbc::RdefDimension::kSRVTextureCube; - break; - default: - assert_true(texture_binding.dimension == - xenos::FetchOpDimension::k2D); - texture_dimension = dxbc::RdefDimension::kSRVTexture2DArray; - } - texture_register = uint32_t(SRVMainRegister::kBindfulTexturesStart) + + // Bindful texture or bindless textures. + srv.type = dxbc::RdefInputType::kTexture; + srv.return_type = dxbc::ResourceReturnType::kFloat; + srv.sample_count = UINT32_MAX; + srv.flags = dxbc::kRdefInputFlags4Component; + if (bindless_resources_used_) { + // Bindless texture heap. + if (i == srv_index_bindless_textures_3d_) { + srv.name_ptr = bindless_textures_3d_name_ptr; + srv.dimension = dxbc::RdefDimension::kSRVTexture3D; + srv.bind_point_space = uint32_t(SRVSpace::kBindlessTextures3D); + } else if (i == srv_index_bindless_textures_cube_) { + srv.name_ptr = bindless_textures_cube_name_ptr; + srv.dimension = dxbc::RdefDimension::kSRVTextureCube; + srv.bind_point_space = uint32_t(SRVSpace::kBindlessTexturesCube); + } else { + assert_true(i == srv_index_bindless_textures_2d_); + srv.name_ptr = bindless_textures_2d_name_ptr; + srv.dimension = dxbc::RdefDimension::kSRVTexture2DArray; + srv.bind_point_space = uint32_t(SRVSpace::kBindlessTextures2DArray); + } + } else { + // Bindful texture. + auto it = texture_bindings_for_bindful_srv_indices_.find(i); + assert_true(it != texture_bindings_for_bindful_srv_indices_.end()); + uint32_t texture_binding_index = it->second; + const TextureBinding& texture_binding = + texture_bindings_[texture_binding_index]; + srv.name_ptr = texture_binding.bindful_srv_rdef_name_ptr; + switch (texture_binding.dimension) { + case xenos::FetchOpDimension::k3DOrStacked: + srv.dimension = dxbc::RdefDimension::kSRVTexture3D; + break; + case xenos::FetchOpDimension::kCube: + srv.dimension = dxbc::RdefDimension::kSRVTextureCube; + break; + default: + assert_true(texture_binding.dimension == + xenos::FetchOpDimension::k2D); + srv.dimension = dxbc::RdefDimension::kSRVTexture2DArray; + } + srv.bind_point = uint32_t(SRVMainRegister::kBindfulTexturesStart) + texture_binding_index; - texture_register_count = 1; - texture_register_space = SRVSpace::kMain; + srv.bind_count = 1; + srv.bind_point_space = uint32_t(SRVSpace::kMain); + } } - shader_object_.push_back(texture_name_offset); - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kTexture)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kFloat)); - shader_object_.push_back(uint32_t(texture_dimension)); - // Not multisampled. - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(texture_register); - shader_object_.push_back(texture_register_count); - // 4-component. - shader_object_.push_back(dxbc::kRdefInputFlagsComponents); - shader_object_.push_back(uint32_t(texture_register_space)); } - // SRV ID T[i]. - shader_object_.push_back(i); } // Unordered access views, sorted by binding index. - for (uint32_t i = 0; i < uav_count_; ++i) { - if (i == uav_index_shared_memory_) { - // Shared memory (when memexport is used in the pipeline). - shader_object_.push_back(shared_memory_uav_name_offset); - shader_object_.push_back( - uint32_t(dxbc::RdefInputType::kUAVRWByteAddress)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kMixed)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kUAVBuffer)); - // Multisampling not applicable. - shader_object_.push_back(0); - shader_object_.push_back(uint32_t(UAVRegister::kSharedMemory)); - // One binding. - shader_object_.push_back(1); - // No dxbc::RdefInputFlags. - shader_object_.push_back(0); - // Register space 0. - shader_object_.push_back(0); - } else if (i == uav_index_edram_) { - // EDRAM R32_UINT buffer. - shader_object_.push_back(edram_name_offset); - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kUAVRWTyped)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kUInt)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kUAVBuffer)); - // Not multisampled. - shader_object_.push_back(0xFFFFFFFFu); - shader_object_.push_back(uint32_t(UAVRegister::kEdram)); - // One binding. - shader_object_.push_back(1); - // No dxbc::RdefInputFlags. - shader_object_.push_back(0); - // Register space 0. - shader_object_.push_back(0); - } else { - assert_unhandled_case(i); + uint32_t uavs_position_dwords = uint32_t(shader_object_.size()); + shader_object_.resize(uavs_position_dwords + sizeof(dxbc::RdefInputBind) / + sizeof(uint32_t) * + uav_count_); + { + auto uavs = reinterpret_cast(shader_object_.data() + + uavs_position_dwords); + for (uint32_t i = 0; i < uav_count_; ++i) { + dxbc::RdefInputBind& uav = uavs[i]; + uav.bind_count = 1; + uav.id = i; + if (i == uav_index_shared_memory_) { + // Shared memory (when memexport is used in the pipeline). + uav.name_ptr = shared_memory_uav_name_ptr; + uav.type = dxbc::RdefInputType::kUAVRWByteAddress; + uav.return_type = dxbc::ResourceReturnType::kMixed; + uav.dimension = dxbc::RdefDimension::kUAVBuffer; + uav.bind_point = uint32_t(UAVRegister::kSharedMemory); + } else if (i == uav_index_edram_) { + // EDRAM R32_UINT buffer. + uav.name_ptr = edram_name_ptr; + uav.type = dxbc::RdefInputType::kUAVRWTyped; + uav.return_type = dxbc::ResourceReturnType::kUInt; + uav.dimension = dxbc::RdefDimension::kUAVBuffer; + uav.sample_count = UINT32_MAX; + uav.bind_point = uint32_t(UAVRegister::kEdram); + } else { + assert_unhandled_case(i); + } } - // UAV ID U[i]. - shader_object_.push_back(i); } // Constant buffers. - for (uint32_t i = 0; i < cbuffer_count_; ++i) { - uint32_t register_index = 0; - if (i == cbuffer_index_system_constants_) { - shader_object_.push_back(cbuffer_name_offset_system); - register_index = uint32_t(CbufferRegister::kSystemConstants); - } else if (i == cbuffer_index_float_constants_) { - shader_object_.push_back(cbuffer_name_offset_float); - register_index = uint32_t(CbufferRegister::kFloatConstants); - } else if (i == cbuffer_index_bool_loop_constants_) { - shader_object_.push_back(cbuffer_name_offset_bool_loop); - register_index = uint32_t(CbufferRegister::kBoolLoopConstants); - } else if (i == cbuffer_index_fetch_constants_) { - shader_object_.push_back(cbuffer_name_offset_fetch); - register_index = uint32_t(CbufferRegister::kFetchConstants); - } else if (i == cbuffer_index_descriptor_indices_) { - shader_object_.push_back(cbuffer_name_offset_descriptor_indices); - register_index = uint32_t(CbufferRegister::kDescriptorIndices); - } else { - assert_unhandled_case(i); + uint32_t cbuffer_binding_position_dwords = uint32_t(shader_object_.size()); + shader_object_.resize(cbuffer_binding_position_dwords + + sizeof(dxbc::RdefInputBind) / sizeof(uint32_t) * + cbuffer_count_); + { + auto cbuffers = reinterpret_cast( + shader_object_.data() + cbuffer_binding_position_dwords); + for (uint32_t i = 0; i < cbuffer_count_; ++i) { + dxbc::RdefInputBind& cbuffer = cbuffers[i]; + cbuffer.type = dxbc::RdefInputType::kCbuffer; + cbuffer.bind_count = 1; + // Like `cbuffer`, don't need `ConstantBuffer` properties. + cbuffer.flags = dxbc::kRdefInputFlagUserPacked; + cbuffer.id = i; + if (i == cbuffer_index_system_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_system; + cbuffer.bind_point = uint32_t(CbufferRegister::kSystemConstants); + } else if (i == cbuffer_index_float_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_float; + cbuffer.bind_point = uint32_t(CbufferRegister::kFloatConstants); + } else if (i == cbuffer_index_bool_loop_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_bool_loop; + cbuffer.bind_point = uint32_t(CbufferRegister::kBoolLoopConstants); + } else if (i == cbuffer_index_fetch_constants_) { + cbuffer.name_ptr = cbuffer_name_ptr_fetch; + cbuffer.bind_point = uint32_t(CbufferRegister::kFetchConstants); + } else if (i == cbuffer_index_descriptor_indices_) { + cbuffer.name_ptr = cbuffer_name_ptr_descriptor_indices; + cbuffer.bind_point = uint32_t(CbufferRegister::kDescriptorIndices); + } else { + assert_unhandled_case(i); + } } - shader_object_.push_back(uint32_t(dxbc::RdefInputType::kCbuffer)); - shader_object_.push_back(uint32_t(dxbc::RdefReturnType::kVoid)); - shader_object_.push_back(uint32_t(dxbc::RdefDimension::kUnknown)); - // Multisampling not applicable. - shader_object_.push_back(0); - shader_object_.push_back(register_index); - // One binding. - shader_object_.push_back(1); - // Like `cbuffer`, don't need `ConstantBuffer` properties. - shader_object_.push_back(dxbc::kRdefInputFlagUserPacked); - // Register space 0. - shader_object_.push_back(0); - // CBV ID CB[i]. - shader_object_.push_back(i); + } + + uint32_t bindings_end_position_dwords = uint32_t(shader_object_.size()); + + // *************************************************************************** + // Header + // *************************************************************************** + + { + auto& header = *reinterpret_cast(shader_object_.data() + + blob_position_dwords); + header.cbuffer_count = cbuffer_count_; + header.cbuffers_ptr = + (cbuffers_position_dwords - blob_position_dwords) * sizeof(uint32_t); + header.input_bind_count = + (bindings_end_position_dwords - bindings_position_dwords) * + sizeof(uint32_t) / sizeof(dxbc::RdefInputBind); + header.input_binds_ptr = + (bindings_position_dwords - blob_position_dwords) * sizeof(uint32_t); + if (IsDxbcVertexShader()) { + header.shader_model = dxbc::RdefShaderModel::kVertexShader5_1; + } else if (IsDxbcDomainShader()) { + header.shader_model = dxbc::RdefShaderModel::kDomainShader5_1; + } else { + assert_true(is_pixel_shader()); + header.shader_model = dxbc::RdefShaderModel::kPixelShader5_1; + } + header.compile_flags = dxbc::kCompileFlagNoPreshader | + dxbc::kCompileFlagPreferFlowControl | + dxbc::kCompileFlagIeeeStrictness; + if (bindless_resources_used_) { + header.compile_flags |= dxbc::kCompileFlagEnableUnboundedDescriptorTables; + } + // Generator name placed directly after the header. + header.generator_name_ptr = sizeof(dxbc::RdefHeader); + header.fourcc = dxbc::RdefHeader::FourCC::k5_1; + header.InitializeSizes(); } } void DxbcShaderTranslator::WriteInputSignature() { // Because of shader_object_.resize(), pointers can't be kept persistently - // here! Resize also zeroes the memory. - uint32_t chunk_position = uint32_t(shader_object_.size()); + // here! Resizing also zeroes the memory. + uint32_t blob_position = uint32_t(shader_object_.size()); // Reserve space for the header. shader_object_.resize(shader_object_.size() + sizeof(dxbc::Signature) / sizeof(uint32_t)); @@ -2689,13 +2642,13 @@ void DxbcShaderTranslator::WriteInputSignature() { // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); { auto& vertex_id = *reinterpret_cast( shader_object_.data() + vertex_id_position); - vertex_id.semantic_name = semantic_offset; + vertex_id.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "SV_VertexID"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "SV_VertexID"); } else if (IsDxbcDomainShader()) { // Control point indices, byte-swapped, biased according to the base index // and converted to float by the host vertex and hull shaders @@ -2720,13 +2673,13 @@ void DxbcShaderTranslator::WriteInputSignature() { // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); { auto& control_point_index = *reinterpret_cast( shader_object_.data() + control_point_index_position); - control_point_index.semantic_name = semantic_offset; + control_point_index.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "XEVERTEXID"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "XEVERTEXID"); } else if (is_pixel_shader()) { // Written dynamically, so assume it's always used if it can be written to // any interpolator register. @@ -2814,56 +2767,87 @@ void DxbcShaderTranslator::WriteInputSignature() { is_front_face.system_value = dxbc::Name::kIsFrontFace; is_front_face.component_type = dxbc::SignatureRegisterComponentType::kUInt32; - is_front_face.register_index = uint32_t(InOutRegister::kPSInFrontFace); + is_front_face.register_index = + uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex); is_front_face.mask = 0b0001; is_front_face.always_reads_mask = in_front_face_used_ ? 0b0001 : 0b0000; } + // Sample index (SV_SampleIndex) for safe memexport with sample-rate + // shading. + size_t sample_index_position = SIZE_MAX; + if (current_shader().is_valid_memexport_used() && IsSampleRate()) { + size_t sample_index_position = shader_object_.size(); + shader_object_.resize(shader_object_.size() + kParameterDwords); + ++parameter_count; + { + auto& sample_index = *reinterpret_cast( + shader_object_.data() + sample_index_position); + sample_index.system_value = dxbc::Name::kSampleIndex; + sample_index.component_type = + dxbc::SignatureRegisterComponentType::kUInt32; + sample_index.register_index = + uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex); + sample_index.mask = 0b0010; + sample_index.always_reads_mask = 0b0010; + } + } + // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); { auto interpolators = reinterpret_cast( shader_object_.data() + interpolator_position); for (uint32_t i = 0; i < xenos::kMaxInterpolators; ++i) { - interpolators[i].semantic_name = semantic_offset; + interpolators[i].semantic_name_ptr = semantic_offset; } auto& point_parameters = *reinterpret_cast( shader_object_.data() + point_parameters_position); - point_parameters.semantic_name = semantic_offset; + point_parameters.semantic_name_ptr = semantic_offset; auto& clip_space_zw = *reinterpret_cast( shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_name = semantic_offset; + clip_space_zw.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "TEXCOORD"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "TEXCOORD"); { auto& position = *reinterpret_cast( shader_object_.data() + position_position); - position.semantic_name = semantic_offset; + position.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "SV_Position"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "SV_Position"); { auto& is_front_face = *reinterpret_cast( shader_object_.data() + is_front_face_position); - is_front_face.semantic_name = semantic_offset; + is_front_face.semantic_name_ptr = semantic_offset; + } + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_IsFrontFace"); + if (sample_index_position != SIZE_MAX) { + { + auto& sample_index = *reinterpret_cast( + shader_object_.data() + sample_index_position); + sample_index.semantic_name_ptr = semantic_offset; + } + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_SampleIndex"); } - semantic_offset += AppendString(shader_object_, "SV_IsFrontFace"); } // Header. { auto& header = *reinterpret_cast(shader_object_.data() + - chunk_position); + blob_position); header.parameter_count = parameter_count; - header.parameter_info_offset = sizeof(dxbc::Signature); + header.parameter_info_ptr = sizeof(dxbc::Signature); } } void DxbcShaderTranslator::WritePatchConstantSignature() { assert_true(IsDxbcDomainShader()); // Because of shader_object_.resize(), pointers can't be kept persistently - // here! Resize also zeroes the memory. - uint32_t chunk_position = uint32_t(shader_object_.size()); + // here! Resizing also zeroes the memory. + uint32_t blob_position = uint32_t(shader_object_.size()); // Reserve space for the header. shader_object_.resize(shader_object_.size() + sizeof(dxbc::Signature) / sizeof(uint32_t)); @@ -2880,7 +2864,7 @@ void DxbcShaderTranslator::WritePatchConstantSignature() { uint32_t tess_factor_inside_count = 0; dxbc::Name tess_factor_inside_system_value = dxbc::Name::kUndefined; Shader::HostVertexShaderType host_vertex_shader_type = - GetDxbcShaderModification().host_vertex_shader_type; + GetDxbcShaderModification().vertex.host_vertex_shader_type; switch (host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainCPIndexed: case Shader::HostVertexShaderType::kTriangleDomainPatchIndexed: @@ -2945,37 +2929,38 @@ void DxbcShaderTranslator::WritePatchConstantSignature() { // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); { auto tess_factors_edge = reinterpret_cast( shader_object_.data() + tess_factor_edge_position); for (uint32_t i = 0; i < tess_factor_edge_count; ++i) { - tess_factors_edge[i].semantic_name = semantic_offset; + tess_factors_edge[i].semantic_name_ptr = semantic_offset; } } - semantic_offset += AppendString(shader_object_, "SV_TessFactor"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "SV_TessFactor"); { auto tess_factors_inside = reinterpret_cast( shader_object_.data() + tess_factor_inside_position); for (uint32_t i = 0; i < tess_factor_inside_count; ++i) { - tess_factors_inside[i].semantic_name = semantic_offset; + tess_factors_inside[i].semantic_name_ptr = semantic_offset; } } - semantic_offset += AppendString(shader_object_, "SV_InsideTessFactor"); + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_InsideTessFactor"); // Header. { auto& header = *reinterpret_cast(shader_object_.data() + - chunk_position); + blob_position); header.parameter_count = parameter_count; - header.parameter_info_offset = sizeof(dxbc::Signature); + header.parameter_info_ptr = sizeof(dxbc::Signature); } } void DxbcShaderTranslator::WriteOutputSignature() { // Because of shader_object_.resize(), pointers can't be kept persistently - // here! Resize also zeroes the memory. - uint32_t chunk_position = uint32_t(shader_object_.size()); + // here! Resizing also zeroes the memory. + uint32_t blob_position = uint32_t(shader_object_.size()); // Reserve space for the header. shader_object_.resize(shader_object_.size() + sizeof(dxbc::Signature) / sizeof(uint32_t)); @@ -3095,67 +3080,90 @@ void DxbcShaderTranslator::WriteOutputSignature() { // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); { auto interpolators = reinterpret_cast( shader_object_.data() + interpolator_position); for (uint32_t i = 0; i < xenos::kMaxInterpolators; ++i) { - interpolators[i].semantic_name = semantic_offset; + interpolators[i].semantic_name_ptr = semantic_offset; } auto& point_parameters = *reinterpret_cast( shader_object_.data() + point_parameters_position); - point_parameters.semantic_name = semantic_offset; + point_parameters.semantic_name_ptr = semantic_offset; auto& clip_space_zw = *reinterpret_cast( shader_object_.data() + clip_space_zw_position); - clip_space_zw.semantic_name = semantic_offset; + clip_space_zw.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "TEXCOORD"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "TEXCOORD"); { auto& position = *reinterpret_cast( shader_object_.data() + position_position); - position.semantic_name = semantic_offset; + position.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "SV_Position"); + semantic_offset += dxbc::AppendAlignedString(shader_object_, "SV_Position"); { auto& clip_distance_0123 = *reinterpret_cast( shader_object_.data() + clip_distance_0123_position); - clip_distance_0123.semantic_name = semantic_offset; + clip_distance_0123.semantic_name_ptr = semantic_offset; auto& clip_distance_45 = *reinterpret_cast( shader_object_.data() + clip_distance_45_position); - clip_distance_45.semantic_name = semantic_offset; + clip_distance_45.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "SV_ClipDistance"); + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_ClipDistance"); { auto& cull_distance = *reinterpret_cast( shader_object_.data() + cull_distance_position); - cull_distance.semantic_name = semantic_offset; + cull_distance.semantic_name_ptr = semantic_offset; } - semantic_offset += AppendString(shader_object_, "SV_CullDistance"); + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_CullDistance"); } else if (is_pixel_shader()) { if (!edram_rov_used_) { + uint32_t color_targets_written = current_shader().writes_color_targets(); + // Color render targets (SV_Target#). size_t target_position = SIZE_MAX; - if (current_shader().writes_color_targets()) { + uint32_t color_targets_written_count = + xe::bit_count(color_targets_written); + if (color_targets_written) { target_position = shader_object_.size(); - shader_object_.resize(shader_object_.size() + 4 * kParameterDwords); - parameter_count += 4; + shader_object_.resize(shader_object_.size() + + color_targets_written_count * kParameterDwords); + parameter_count += color_targets_written_count; auto targets = reinterpret_cast( shader_object_.data() + target_position); - for (uint32_t i = 0; i < 4; ++i) { - dxbc::SignatureParameter& target = targets[i]; + uint32_t target_index = 0; + for (uint32_t i = 0; i < xenos::kMaxColorRenderTargets; ++i) { + if (!(color_targets_written & (uint32_t(1) << i))) { + continue; + } + dxbc::SignatureParameter& target = targets[target_index++]; target.semantic_index = i; target.component_type = dxbc::SignatureRegisterComponentType::kFloat32; target.register_index = i; target.mask = 0b1111; - // All are always written because X360 RTs are dynamically remapped to - // D3D12 RTs to make RT indices consecutive. } } + // Coverage output for alpha to mask (SV_Coverage). + size_t coverage_position = SIZE_MAX; + if (color_targets_written & 0b1) { + coverage_position = shader_object_.size(); + shader_object_.resize(shader_object_.size() + kParameterDwords); + ++parameter_count; + auto& coverage = *reinterpret_cast( + shader_object_.data() + coverage_position); + coverage.component_type = dxbc::SignatureRegisterComponentType::kUInt32; + coverage.register_index = UINT32_MAX; + coverage.mask = 0b0001; + coverage.never_writes_mask = 0b1110; + } + // Depth (SV_Depth or SV_DepthLessEqual). Modification::DepthStencilMode depth_stencil_mode = - GetDxbcShaderModification().depth_stencil_mode; + GetDxbcShaderModification().pixel.depth_stencil_mode; size_t depth_position = SIZE_MAX; if (current_shader().writes_depth() || DSV_IsWritingFloat24Depth()) { depth_position = shader_object_.size(); @@ -3171,32 +3179,43 @@ void DxbcShaderTranslator::WriteOutputSignature() { // Semantic names. uint32_t semantic_offset = - uint32_t((shader_object_.size() - chunk_position) * sizeof(uint32_t)); + uint32_t((shader_object_.size() - blob_position) * sizeof(uint32_t)); if (target_position != SIZE_MAX) { { auto targets = reinterpret_cast( shader_object_.data() + target_position); - for (uint32_t i = 0; i < 4; ++i) { - targets[i].semantic_name = semantic_offset; + for (uint32_t i = 0; i < color_targets_written_count; ++i) { + targets[i].semantic_name_ptr = semantic_offset; } } - semantic_offset += AppendString(shader_object_, "SV_Target"); + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_Target"); + } + if (coverage_position != SIZE_MAX) { + { + auto& coverage = *reinterpret_cast( + shader_object_.data() + coverage_position); + coverage.semantic_name_ptr = semantic_offset; + } + semantic_offset += + dxbc::AppendAlignedString(shader_object_, "SV_Coverage"); } if (depth_position != SIZE_MAX) { { auto& depth = *reinterpret_cast( shader_object_.data() + depth_position); - depth.semantic_name = semantic_offset; + depth.semantic_name_ptr = semantic_offset; } const char* depth_semantic_name; if (!current_shader().writes_depth() && - GetDxbcShaderModification().depth_stencil_mode == + GetDxbcShaderModification().pixel.depth_stencil_mode == Modification::DepthStencilMode::kFloat24Truncating) { depth_semantic_name = "SV_DepthLessEqual"; } else { depth_semantic_name = "SV_Depth"; } - semantic_offset += AppendString(shader_object_, depth_semantic_name); + semantic_offset += + dxbc::AppendAlignedString(shader_object_, depth_semantic_name); } } } @@ -3204,88 +3223,68 @@ void DxbcShaderTranslator::WriteOutputSignature() { // Header. { auto& header = *reinterpret_cast(shader_object_.data() + - chunk_position); + blob_position); header.parameter_count = parameter_count; - header.parameter_info_offset = sizeof(dxbc::Signature); + header.parameter_info_ptr = sizeof(dxbc::Signature); } } void DxbcShaderTranslator::WriteShaderCode() { - uint32_t chunk_position_dwords = uint32_t(shader_object_.size()); + uint32_t blob_position_dwords = uint32_t(shader_object_.size()); - uint32_t shader_type; + dxbc::ProgramType program_type; if (IsDxbcVertexShader()) { - shader_type = D3D10_SB_VERTEX_SHADER; + program_type = dxbc::ProgramType::kVertexShader; } else if (IsDxbcDomainShader()) { - shader_type = D3D11_SB_DOMAIN_SHADER; + program_type = dxbc::ProgramType::kDomainShader; } else { assert_true(is_pixel_shader()); - shader_type = D3D10_SB_PIXEL_SHADER; + program_type = dxbc::ProgramType::kPixelShader; } - shader_object_.push_back( - ENCODE_D3D10_SB_TOKENIZED_PROGRAM_VERSION_TOKEN(shader_type, 5, 1)); + shader_object_.push_back(dxbc::VersionToken(program_type, 5, 1)); // Reserve space for the length token. shader_object_.push_back(0); - // Declarations (don't increase the instruction count stat, and only inputs - // and outputs are counted in dcl_count). - // - // Binding declarations have 3D-indexed operands with XYZW swizzle, the first - // index being the binding ID (local to the shader), the second being the - // lower register index bound, and the third being the highest register index - // bound. Also dcl_ instructions for bindings are followed by the register - // space index. - // - // Inputs/outputs have 1D-indexed operands with a component mask and a - // register index. - Modification shader_modification = GetDxbcShaderModification(); if (IsDxbcDomainShader()) { // Not using control point data since Xenos only has a vertex shader acting // as both vertex shader and domain shader. - stat_.c_control_points = 3; - stat_.tessellator_domain = dxbc::TessellatorDomain::kTriangle; - switch (shader_modification.host_vertex_shader_type) { + uint32_t control_point_count = 3; + dxbc::TessellatorDomain tessellator_domain = + dxbc::TessellatorDomain::kTriangle; + switch (shader_modification.vertex.host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainCPIndexed: case Shader::HostVertexShaderType::kTriangleDomainPatchIndexed: - stat_.c_control_points = 3; - stat_.tessellator_domain = dxbc::TessellatorDomain::kTriangle; + control_point_count = 3; + tessellator_domain = dxbc::TessellatorDomain::kTriangle; break; case Shader::HostVertexShaderType::kQuadDomainCPIndexed: case Shader::HostVertexShaderType::kQuadDomainPatchIndexed: - stat_.c_control_points = 4; - stat_.tessellator_domain = dxbc::TessellatorDomain::kQuad; + control_point_count = 4; + tessellator_domain = dxbc::TessellatorDomain::kQuad; break; default: // TODO(Triang3l): Support line patches. - assert_unhandled_case(shader_modification.host_vertex_shader_type); + assert_unhandled_case( + shader_modification.vertex.host_vertex_shader_type); EmitTranslationError( "Unsupported host vertex shader type in WriteShaderCode"); } - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE( - D3D11_SB_OPCODE_DCL_INPUT_CONTROL_POINT_COUNT) | - ENCODE_D3D11_SB_INPUT_CONTROL_POINT_COUNT(stat_.c_control_points) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(1)); - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D11_SB_OPCODE_DCL_TESS_DOMAIN) | - ENCODE_D3D11_SB_TESS_DOMAIN(uint32_t(stat_.tessellator_domain)) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(1)); + ao_.OpDclInputControlPointCount(control_point_count); + ao_.OpDclTessDomain(tessellator_domain); } // Don't allow refactoring when converting to native code to maintain position // invariance (needed even in pixel shaders for oDepth invariance). - uint32_t global_flags_opcode = - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_GLOBAL_FLAGS) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(1); + uint32_t global_flags = 0; if (is_pixel_shader() && - GetDxbcShaderModification().depth_stencil_mode == + GetDxbcShaderModification().pixel.depth_stencil_mode == Modification::DepthStencilMode::kEarlyHint && !edram_rov_used_ && current_shader().implicit_early_z_write_allowed()) { - global_flags_opcode |= D3D11_SB_GLOBAL_FLAG_FORCE_EARLY_DEPTH_STENCIL; + global_flags |= dxbc::kGlobalFlagForceEarlyDepthStencil; } - shader_object_.push_back(global_flags_opcode); + ao_.OpDclGlobalFlags(global_flags); // Constant buffers, from most frequenly accessed to least frequently accessed // (the order is a hint to the driver according to the DXBC header). @@ -3293,107 +3292,55 @@ void DxbcShaderTranslator::WriteShaderCode() { const Shader::ConstantRegisterMap& constant_register_map = current_shader().constant_register_map(); assert_not_zero(constant_register_map.float_count); - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_CONSTANT_BUFFER) | - ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN( - constant_register_map.float_dynamic_addressing - ? D3D10_SB_CONSTANT_BUFFER_DYNAMIC_INDEXED - : D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_CONSTANT_BUFFER, kSwizzleXYZW, 3)); - shader_object_.push_back(cbuffer_index_float_constants_); - shader_object_.push_back(uint32_t(CbufferRegister::kFloatConstants)); - shader_object_.push_back(uint32_t(CbufferRegister::kFloatConstants)); - shader_object_.push_back(constant_register_map.float_count); - shader_object_.push_back(0); + ao_.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_float_constants_, + uint32_t(CbufferRegister::kFloatConstants), + uint32_t(CbufferRegister::kFloatConstants)), + constant_register_map.float_count, + constant_register_map.float_dynamic_addressing + ? dxbc::ConstantBufferAccessPattern::kDynamicIndexed + : dxbc::ConstantBufferAccessPattern::kImmediateIndexed); } if (cbuffer_index_system_constants_ != kBindingIndexUnallocated) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_CONSTANT_BUFFER) | - ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN( - D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_CONSTANT_BUFFER, kSwizzleXYZW, 3)); - shader_object_.push_back(cbuffer_index_system_constants_); - shader_object_.push_back(uint32_t(CbufferRegister::kSystemConstants)); - shader_object_.push_back(uint32_t(CbufferRegister::kSystemConstants)); - shader_object_.push_back((sizeof(SystemConstants) + 15) >> 4); - shader_object_.push_back(0); + ao_.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + uint32_t(CbufferRegister::kSystemConstants)), + (sizeof(SystemConstants) + 15) >> 4); } if (cbuffer_index_fetch_constants_ != kBindingIndexUnallocated) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_CONSTANT_BUFFER) | - ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN( - D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_CONSTANT_BUFFER, kSwizzleXYZW, 3)); - shader_object_.push_back(cbuffer_index_fetch_constants_); - shader_object_.push_back(uint32_t(CbufferRegister::kFetchConstants)); - shader_object_.push_back(uint32_t(CbufferRegister::kFetchConstants)); - shader_object_.push_back(48); - shader_object_.push_back(0); + ao_.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_fetch_constants_, + uint32_t(CbufferRegister::kFetchConstants), + uint32_t(CbufferRegister::kFetchConstants)), + 48); } if (cbuffer_index_descriptor_indices_ != kBindingIndexUnallocated) { assert_not_zero(GetBindlessResourceCount()); - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_CONSTANT_BUFFER) | - ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN( - D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_CONSTANT_BUFFER, kSwizzleXYZW, 3)); - shader_object_.push_back(cbuffer_index_descriptor_indices_); - shader_object_.push_back(uint32_t(CbufferRegister::kDescriptorIndices)); - shader_object_.push_back(uint32_t(CbufferRegister::kDescriptorIndices)); - shader_object_.push_back((GetBindlessResourceCount() + 3) >> 2); - shader_object_.push_back(0); + ao_.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_descriptor_indices_, + uint32_t(CbufferRegister::kDescriptorIndices), + uint32_t(CbufferRegister::kDescriptorIndices)), + (GetBindlessResourceCount() + 3) >> 2); } if (cbuffer_index_bool_loop_constants_ != kBindingIndexUnallocated) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_CONSTANT_BUFFER) | - ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN( - D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_CONSTANT_BUFFER, kSwizzleXYZW, 3)); - shader_object_.push_back(cbuffer_index_bool_loop_constants_); - shader_object_.push_back(uint32_t(CbufferRegister::kBoolLoopConstants)); - shader_object_.push_back(uint32_t(CbufferRegister::kBoolLoopConstants)); - shader_object_.push_back(10); - shader_object_.push_back(0); + ao_.OpDclConstantBuffer( + dxbc::Src::CB(dxbc::Src::Dcl, cbuffer_index_bool_loop_constants_, + uint32_t(CbufferRegister::kBoolLoopConstants), + uint32_t(CbufferRegister::kBoolLoopConstants)), + 2 + 8); } // Samplers. if (!sampler_bindings_.empty()) { if (bindless_resources_used_) { // Bindless sampler heap. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_SAMPLER) | - ENCODE_D3D10_SB_SAMPLER_MODE(D3D10_SB_SAMPLER_MODE_DEFAULT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(6)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_SAMPLER, kSwizzleXYZW, 3)); - shader_object_.push_back(0); - shader_object_.push_back(0); - shader_object_.push_back(UINT32_MAX); - shader_object_.push_back(0); + ao_.OpDclSampler(dxbc::Src::S(dxbc::Src::Dcl, 0, 0, UINT32_MAX)); } else { // Bindful samplers. for (uint32_t i = 0; i < uint32_t(sampler_bindings_.size()); ++i) { const SamplerBinding& sampler_binding = sampler_bindings_[i]; - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_SAMPLER) | - ENCODE_D3D10_SB_SAMPLER_MODE(D3D10_SB_SAMPLER_MODE_DEFAULT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(6)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_SAMPLER, kSwizzleXYZW, 3)); - shader_object_.push_back(i); - shader_object_.push_back(i); - shader_object_.push_back(i); - shader_object_.push_back(0); + ao_.OpDclSampler(dxbc::Src::S(dxbc::Src::Dcl, i, i, i)); } } } @@ -3402,33 +3349,29 @@ void DxbcShaderTranslator::WriteShaderCode() { for (uint32_t i = 0; i < srv_count_; ++i) { if (i == srv_index_shared_memory_) { // Shared memory ByteAddressBuffer. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D11_SB_OPCODE_DCL_RESOURCE_RAW) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(6)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_RESOURCE, kSwizzleXYZW, 3)); - shader_object_.push_back(srv_index_shared_memory_); - shader_object_.push_back(uint32_t(SRVMainRegister::kSharedMemory)); - shader_object_.push_back(uint32_t(SRVMainRegister::kSharedMemory)); - shader_object_.push_back(uint32_t(SRVSpace::kMain)); + ao_.OpDclResourceRaw( + dxbc::Src::T(dxbc::Src::Dcl, srv_index_shared_memory_, + uint32_t(SRVMainRegister::kSharedMemory), + uint32_t(SRVMainRegister::kSharedMemory)), + uint32_t(SRVSpace::kMain)); } else { // Texture or texture heap. - D3D10_SB_RESOURCE_DIMENSION texture_srv_dimension; - uint32_t texture_register_first, texture_register_last; + dxbc::ResourceDimension texture_dimension; + uint32_t texture_register_lower_bound, texture_register_upper_bound; SRVSpace texture_register_space; if (bindless_resources_used_) { // Bindless texture heap. - texture_register_first = 0; - texture_register_last = UINT32_MAX; + texture_register_lower_bound = 0; + texture_register_upper_bound = UINT32_MAX; if (i == srv_index_bindless_textures_3d_) { - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURE3D; + texture_dimension = dxbc::ResourceDimension::kTexture3D; texture_register_space = SRVSpace::kBindlessTextures3D; } else if (i == srv_index_bindless_textures_cube_) { - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURECUBE; + texture_dimension = dxbc::ResourceDimension::kTextureCube; texture_register_space = SRVSpace::kBindlessTexturesCube; } else { assert_true(i == srv_index_bindless_textures_2d_); - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURE2DARRAY; + texture_dimension = dxbc::ResourceDimension::kTexture2DArray; texture_register_space = SRVSpace::kBindlessTextures2DArray; } } else { @@ -3440,36 +3383,28 @@ void DxbcShaderTranslator::WriteShaderCode() { texture_bindings_[texture_binding_index]; switch (texture_binding.dimension) { case xenos::FetchOpDimension::k3DOrStacked: - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURE3D; + texture_dimension = dxbc::ResourceDimension::kTexture3D; break; case xenos::FetchOpDimension::kCube: - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURECUBE; + texture_dimension = dxbc::ResourceDimension::kTextureCube; break; default: assert_true(texture_binding.dimension == xenos::FetchOpDimension::k2D); - texture_srv_dimension = D3D10_SB_RESOURCE_DIMENSION_TEXTURE2DARRAY; + texture_dimension = dxbc::ResourceDimension::kTexture2DArray; } - texture_register_first = texture_register_last = + texture_register_lower_bound = uint32_t(SRVMainRegister::kBindfulTexturesStart) + texture_binding_index; + texture_register_upper_bound = texture_register_lower_bound; texture_register_space = SRVSpace::kMain; } - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_RESOURCE) | - ENCODE_D3D10_SB_RESOURCE_DIMENSION(texture_srv_dimension) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D10_SB_OPERAND_TYPE_RESOURCE, kSwizzleXYZW, 3)); - shader_object_.push_back(i); - shader_object_.push_back(texture_register_first); - shader_object_.push_back(texture_register_last); - shader_object_.push_back( - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_FLOAT, 0) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_FLOAT, 1) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_FLOAT, 2) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_FLOAT, 3)); - shader_object_.push_back(uint32_t(texture_register_space)); + ao_.OpDclResource( + texture_dimension, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kFloat), + dxbc::Src::T(dxbc::Src::Dcl, i, texture_register_lower_bound, + texture_register_upper_bound), + uint32_t(texture_register_space)); } } @@ -3477,36 +3412,24 @@ void DxbcShaderTranslator::WriteShaderCode() { for (uint32_t i = 0; i < uav_count_; ++i) { if (i == uav_index_shared_memory_) { // Shared memory RWByteAddressBuffer. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE( - D3D11_SB_OPCODE_DCL_UNORDERED_ACCESS_VIEW_RAW) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(6)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW, kSwizzleXYZW, 3)); - shader_object_.push_back(uav_index_shared_memory_); - shader_object_.push_back(uint32_t(UAVRegister::kSharedMemory)); - shader_object_.push_back(uint32_t(UAVRegister::kSharedMemory)); - shader_object_.push_back(0); + if (!is_pixel_shader()) { + shader_feature_info_.feature_flags[0] |= + dxbc::kShaderFeature0_UAVsAtEveryStage; + } + ao_.OpDclUnorderedAccessViewRaw( + 0, dxbc::Src::U(dxbc::Src::Dcl, uav_index_shared_memory_, + uint32_t(UAVRegister::kSharedMemory), + uint32_t(UAVRegister::kSharedMemory))); } else if (i == uav_index_edram_) { // EDRAM buffer R32_UINT rasterizer-ordered view. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE( - D3D11_SB_OPCODE_DCL_UNORDERED_ACCESS_VIEW_TYPED) | - ENCODE_D3D10_SB_RESOURCE_DIMENSION( - D3D10_SB_RESOURCE_DIMENSION_BUFFER) | - D3D11_SB_RASTERIZER_ORDERED_ACCESS | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(7)); - shader_object_.push_back(EncodeVectorSwizzledOperand( - D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW, kSwizzleXYZW, 3)); - shader_object_.push_back(uav_index_edram_); - shader_object_.push_back(uint32_t(UAVRegister::kEdram)); - shader_object_.push_back(uint32_t(UAVRegister::kEdram)); - shader_object_.push_back( - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_UINT, 0) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_UINT, 1) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_UINT, 2) | - ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(D3D10_SB_RETURN_TYPE_UINT, 3)); - shader_object_.push_back(0); + shader_feature_info_.feature_flags[0] |= dxbc::kShaderFeature0_ROVs; + ao_.OpDclUnorderedAccessViewTyped( + dxbc::ResourceDimension::kBuffer, + dxbc::kUAVFlagRasterizerOrderedAccess, + dxbc::ResourceReturnTypeX4Token(dxbc::ResourceReturnType::kUInt), + dxbc::Src::U(dxbc::Src::Dcl, uav_index_edram_, + uint32_t(UAVRegister::kEdram), + uint32_t(UAVRegister::kEdram))); } else { assert_unhandled_case(i); } @@ -3517,27 +3440,16 @@ void DxbcShaderTranslator::WriteShaderCode() { if (IsDxbcDomainShader()) { if (in_domain_location_used_) { // Domain location input. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(2)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D11_SB_OPERAND_TYPE_INPUT_DOMAIN_POINT, - in_domain_location_used_, 0)); - ++stat_.dcl_count; + ao_.OpDclInput(dxbc::Dest::VDomain(in_domain_location_used_)); } if (in_primitive_id_used_) { // Primitive (patch) index input. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(2)); - shader_object_.push_back( - EncodeScalarOperand(D3D10_SB_OPERAND_TYPE_INPUT_PRIMITIVEID, 0)); - ++stat_.dcl_count; + ao_.OpDclInput(dxbc::Dest::VPrim()); } if (in_control_point_index_used_) { // Control point indices as float input. - uint32_t control_point_array_size; - switch (shader_modification.host_vertex_shader_type) { + uint32_t control_point_array_size = 3; + switch (shader_modification.vertex.host_vertex_shader_type) { case Shader::HostVertexShaderType::kTriangleDomainCPIndexed: control_point_array_size = 3; break; @@ -3546,96 +3458,51 @@ void DxbcShaderTranslator::WriteShaderCode() { break; default: // TODO(Triang3l): Support line patches. - assert_unhandled_case(shader_modification.host_vertex_shader_type); + assert_unhandled_case( + shader_modification.vertex.host_vertex_shader_type); EmitTranslationError( "Unsupported host vertex shader type in " "StartVertexOrDomainShader"); - control_point_array_size = 0; - } - if (control_point_array_size) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back(EncodeVectorMaskedOperand( - D3D11_SB_OPERAND_TYPE_INPUT_CONTROL_POINT, 0b0001, 2)); - shader_object_.push_back(control_point_array_size); - shader_object_.push_back( - uint32_t(InOutRegister::kDSInControlPointIndex)); - ++stat_.dcl_count; } + ao_.OpDclInput(dxbc::Dest::VICP( + control_point_array_size, + uint32_t(InOutRegister::kDSInControlPointIndex), 0b0001)); } } else { if (register_count()) { // Unswapped vertex index input (only X component). - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_SGV) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_INPUT, 0b0001, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kVSInVertexIndex)); - shader_object_.push_back(ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_VERTEX_ID)); - ++stat_.dcl_count; + ao_.OpDclInputSGV( + dxbc::Dest::V(uint32_t(InOutRegister::kVSInVertexIndex), 0b0001), + dxbc::Name::kVertexID); } } // Interpolator output. for (uint32_t i = 0; i < xenos::kMaxInterpolators; ++i) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_OUTPUT, 0b1111, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kVSDSOutInterpolators) + - i); - ++stat_.dcl_count; + ao_.OpDclOutput( + dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutInterpolators) + i)); } // Point parameters output. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_OUTPUT, 0b0111, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kVSDSOutPointParameters)); - ++stat_.dcl_count; + ao_.OpDclOutput(dxbc::Dest::O( + uint32_t(InOutRegister::kVSDSOutPointParameters), 0b0111)); // Clip space Z and W output. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_OUTPUT, 0b0011, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kVSDSOutClipSpaceZW)); - ++stat_.dcl_count; + ao_.OpDclOutput( + dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutClipSpaceZW), 0b0011)); // Position output. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT_SIV) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_OUTPUT, 0b1111, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kVSDSOutPosition)); - shader_object_.push_back(ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_POSITION)); - ++stat_.dcl_count; + ao_.OpDclOutputSIV(dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutPosition)), + dxbc::Name::kPosition); // Clip distance outputs. for (uint32_t i = 0; i < 2; ++i) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT_SIV) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back(EncodeVectorMaskedOperand( - D3D10_SB_OPERAND_TYPE_OUTPUT, i ? 0b0011 : 0b1111, 1)); - shader_object_.push_back( - uint32_t(InOutRegister::kVSDSOutClipDistance0123) + i); - shader_object_.push_back( - ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_CLIP_DISTANCE)); - ++stat_.dcl_count; + ao_.OpDclOutputSIV( + dxbc::Dest::O(uint32_t(InOutRegister::kVSDSOutClipDistance0123) + i, + i ? 0b0011 : 0b1111), + dxbc::Name::kClipDistance); } // Cull distance output. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT_SIV) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_OUTPUT, 0b0100, 1)); - shader_object_.push_back( - uint32_t(InOutRegister::kVSDSOutClipDistance45AndCullDistance)); - shader_object_.push_back(ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_CULL_DISTANCE)); - ++stat_.dcl_count; + ao_.OpDclOutputSIV( + dxbc::Dest::O( + uint32_t(InOutRegister::kVSDSOutClipDistance45AndCullDistance), + 0b0100), + dxbc::Name::kCullDistance); } else if (is_pixel_shader()) { bool is_writing_float24_depth = DSV_IsWritingFloat24Depth(); bool shader_writes_depth = current_shader().writes_depth(); @@ -3644,41 +3511,23 @@ void DxbcShaderTranslator::WriteShaderCode() { uint32_t interpolator_count = std::min(xenos::kMaxInterpolators, register_count()); for (uint32_t i = 0; i < interpolator_count; ++i) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_PS) | - ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE( - D3D10_SB_INTERPOLATION_LINEAR) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_INPUT, 0b1111, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kPSInInterpolators) + - i); - ++stat_.dcl_count; + ao_.OpDclInputPS( + dxbc::InterpolationMode::kLinear, + dxbc::Dest::V(uint32_t(InOutRegister::kPSInInterpolators) + i)); } if (register_count()) { // Point parameters input (only coordinates, not size, needed). - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_PS) | - ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE( - D3D10_SB_INTERPOLATION_LINEAR) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_INPUT, 0b0011, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kPSInPointParameters)); - ++stat_.dcl_count; + ao_.OpDclInputPS( + dxbc::InterpolationMode::kLinear, + dxbc::Dest::V(uint32_t(InOutRegister::kPSInPointParameters), + 0b0011)); } } if (edram_rov_used_) { // Z and W in clip space, for per-sample depth. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_PS) | - ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE( - D3D10_SB_INTERPOLATION_LINEAR) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_INPUT, 0b0011, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kPSInClipSpaceZW)); - ++stat_.dcl_count; + ao_.OpDclInputPS( + dxbc::InterpolationMode::kLinear, + dxbc::Dest::V(uint32_t(InOutRegister::kPSInClipSpaceZW), 0b0011)); } if (in_position_used_) { // Position input (XY needed for ps_param_gen, Z needed for non-ROV @@ -3689,119 +3538,90 @@ void DxbcShaderTranslator::WriteShaderCode() { // with SV_DepthLessEqual, per-sample (or centroid, but this isn't // applicable here) position is mandatory. However, with depth output, on // the guest, there's only one depth value for the whole pixel. - D3D10_SB_INTERPOLATION_MODE position_interpolation_mode = - is_writing_float24_depth && !shader_writes_depth - ? D3D10_SB_INTERPOLATION_LINEAR_NOPERSPECTIVE_SAMPLE - : D3D10_SB_INTERPOLATION_LINEAR_NOPERSPECTIVE; - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_PS_SIV) | - ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE( - position_interpolation_mode) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back(EncodeVectorMaskedOperand( - D3D10_SB_OPERAND_TYPE_INPUT, in_position_used_, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kPSInPosition)); - shader_object_.push_back(ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_POSITION)); - ++stat_.dcl_count; + ao_.OpDclInputPSSIV( + (is_writing_float24_depth && !shader_writes_depth) + ? dxbc::InterpolationMode::kLinearNoPerspectiveSample + : dxbc::InterpolationMode::kLinearNoPerspective, + dxbc::Dest::V(uint32_t(InOutRegister::kPSInPosition), + in_position_used_), + dxbc::Name::kPosition); } - if (in_front_face_used_) { - // Is front face. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT_PS_SGV) | - // This needs to be set according to FXC output, despite the - // description in d3d12TokenizedProgramFormat.hpp saying bits 11:23 - // are ignored. - ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE( - D3D10_SB_INTERPOLATION_CONSTANT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - shader_object_.push_back( - EncodeVectorMaskedOperand(D3D10_SB_OPERAND_TYPE_INPUT, 0b0001, 1)); - shader_object_.push_back(uint32_t(InOutRegister::kPSInFrontFace)); - shader_object_.push_back( - ENCODE_D3D10_SB_NAME(D3D10_SB_NAME_IS_FRONT_FACE)); - ++stat_.dcl_count; + bool sample_rate_memexport = + current_shader().is_valid_memexport_used() && IsSampleRate(); + // Sample-rate shading can't be done with UAV-only rendering (sample-rate + // shading is only needed for float24 depth conversion when using a float32 + // host depth buffer). + assert_false(sample_rate_memexport && edram_rov_used_); + uint32_t front_face_and_sample_index_mask = + uint32_t(in_front_face_used_) | (uint32_t(sample_rate_memexport) << 1); + if (front_face_and_sample_index_mask) { + // Is front face, sample index. + ao_.OpDclInputPSSGV( + dxbc::Dest::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + front_face_and_sample_index_mask), + dxbc::Name::kIsFrontFace); } if (edram_rov_used_) { // Sample coverage input. - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(2)); - shader_object_.push_back( - EncodeScalarOperand(D3D11_SB_OPERAND_TYPE_INPUT_COVERAGE_MASK, 0)); - ++stat_.dcl_count; + ao_.OpDclInput(dxbc::Dest::VCoverage()); } else { - if (current_shader().writes_color_targets()) { - // Color output. - for (uint32_t i = 0; i < 4; ++i) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(3)); - shader_object_.push_back(EncodeVectorMaskedOperand( - D3D10_SB_OPERAND_TYPE_OUTPUT, 0b1111, 1)); - shader_object_.push_back(i); - ++stat_.dcl_count; + if (sample_rate_memexport) { + // Sample coverage input. + ao_.OpDclInput(dxbc::Dest::VCoverage()); + } + // Color output. + uint32_t color_targets_written = current_shader().writes_color_targets(); + for (uint32_t i = 0; i < xenos::kMaxColorRenderTargets; ++i) { + if (color_targets_written & (uint32_t(1) << i)) { + ao_.OpDclOutput(dxbc::Dest::O(i)); } } + // Coverage output for alpha to mask. + if (color_targets_written & 0b1) { + ao_.OpDclOutput(dxbc::Dest::OMask()); + } // Depth output. if (is_writing_float24_depth || shader_writes_depth) { - D3D10_SB_OPERAND_TYPE depth_operand_type; if (!shader_writes_depth && - GetDxbcShaderModification().depth_stencil_mode == + GetDxbcShaderModification().pixel.depth_stencil_mode == Modification::DepthStencilMode::kFloat24Truncating) { - depth_operand_type = D3D11_SB_OPERAND_TYPE_OUTPUT_DEPTH_LESS_EQUAL; + ao_.OpDclOutput(dxbc::Dest::ODepthLE()); } else { - depth_operand_type = D3D10_SB_OPERAND_TYPE_OUTPUT_DEPTH; + ao_.OpDclOutput(dxbc::Dest::ODepth()); } - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_OUTPUT) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(2)); - shader_object_.push_back(EncodeScalarOperand(depth_operand_type, 0)); - ++stat_.dcl_count; } } } // Temporary registers - guest general-purpose registers if not using dynamic // indexing and Xenia internal registers. - stat_.temp_register_count = system_temp_count_max_; + uint32_t temp_register_count = system_temp_count_max_; if (!is_depth_only_pixel_shader_ && !current_shader().uses_register_dynamic_addressing()) { - stat_.temp_register_count += register_count(); + temp_register_count += register_count(); } - if (stat_.temp_register_count != 0) { - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_TEMPS) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(2)); - shader_object_.push_back(stat_.temp_register_count); + if (temp_register_count) { + ao_.OpDclTemps(temp_register_count); } - // General-purpose registers if using dynamic indexing (x0). if (!is_depth_only_pixel_shader_ && current_shader().uses_register_dynamic_addressing()) { - assert_true(register_count() != 0); - shader_object_.push_back( - ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_DCL_INDEXABLE_TEMP) | - ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(4)); - // x0. - shader_object_.push_back(0); - shader_object_.push_back(register_count()); - // 4 components in each. - shader_object_.push_back(4); - stat_.temp_array_count += register_count(); + assert_not_zero(register_count()); + ao_.OpDclIndexableTemp(0, register_count(), 4); } // Write the translated shader code. size_t code_size_dwords = shader_code_.size(); - // So [] won't crash in case the size is zero somehow. - if (code_size_dwords != 0) { + if (code_size_dwords) { shader_object_.resize(shader_object_.size() + code_size_dwords); - std::memcpy(&shader_object_[shader_object_.size() - code_size_dwords], - shader_code_.data(), code_size_dwords * sizeof(uint32_t)); + std::memcpy( + shader_object_.data() + (shader_object_.size() - code_size_dwords), + shader_code_.data(), code_size_dwords * sizeof(uint32_t)); } // Write the length. - shader_object_[chunk_position_dwords + 1] = - uint32_t(shader_object_.size()) - chunk_position_dwords; + shader_object_[blob_position_dwords + 1] = + uint32_t(shader_object_.size()) - blob_position_dwords; } } // namespace gpu diff --git a/src/xenia/gpu/dxbc_shader_translator.h b/src/xenia/gpu/dxbc_shader_translator.h index 11fc98fc5..f513b2a22 100644 --- a/src/xenia/gpu/dxbc_shader_translator.h +++ b/src/xenia/gpu/dxbc_shader_translator.h @@ -10,6 +10,7 @@ #ifndef XENIA_GPU_DXBC_SHADER_TRANSLATOR_H_ #define XENIA_GPU_DXBC_SHADER_TRANSLATOR_H_ +#include #include #include #include @@ -18,6 +19,7 @@ #include "xenia/base/string_buffer.h" #include "xenia/gpu/dxbc.h" #include "xenia/gpu/shader_translator.h" +#include "xenia/ui/graphics_provider.h" namespace xe { namespace gpu { @@ -43,15 +45,19 @@ namespace gpu { // SEE THE NOTES DXBC.H BEFORE WRITING ANYTHING RELATED TO DXBC! class DxbcShaderTranslator : public ShaderTranslator { public: - DxbcShaderTranslator(uint32_t vendor_id, bool bindless_resources_used, - bool edram_rov_used, bool force_emit_source_map = false); + DxbcShaderTranslator(ui::GraphicsProvider::GpuVendorID vendor_id, + bool bindless_resources_used, bool edram_rov_used, + bool gamma_render_target_as_srgb = false, + bool msaa_2x_supported = true, + uint32_t draw_resolution_scale = 1, + bool force_emit_source_map = false); ~DxbcShaderTranslator() override; union Modification { // If anything in this is structure is changed in a way not compatible with // the previous layout, invalidate the pipeline storages by increasing this // version number (0xYYYYMMDD)! - static constexpr uint32_t kVersion = 0x20201219; + static constexpr uint32_t kVersion = 0x20210425; enum class DepthStencilMode : uint32_t { kNoModifiers, @@ -79,15 +85,19 @@ class DxbcShaderTranslator : public ShaderTranslator { kFloat24Rounding, }; - struct { - // Both - dynamically indexable register count from SQ_PROGRAM_CNTL. + struct VertexShaderModification { + // Dynamically indexable register count from SQ_PROGRAM_CNTL. uint32_t dynamic_addressable_register_count : 8; - // VS - pipeline stage and input configuration. + // Pipeline stage and input configuration. Shader::HostVertexShaderType host_vertex_shader_type : Shader::kHostVertexShaderTypeBitCount; - // PS, non-ROV - depth / stencil output mode. + } vertex; + struct PixelShaderModification { + // Dynamically indexable register count from SQ_PROGRAM_CNTL. + uint32_t dynamic_addressable_register_count : 8; + // Non-ROV - depth / stencil output mode. DepthStencilMode depth_stencil_mode : 2; - }; + } pixel; uint64_t value = 0; Modification(uint64_t modification_value = 0) : value(modification_value) {} @@ -116,16 +126,16 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysFlag_UserClipPlane5_Shift, kSysFlag_KillIfAnyVertexKilled_Shift, kSysFlag_PrimitivePolygonal_Shift, + kSysFlag_DepthFloat24_Shift, kSysFlag_AlphaPassIfLess_Shift, kSysFlag_AlphaPassIfEqual_Shift, kSysFlag_AlphaPassIfGreater_Shift, - kSysFlag_Color0Gamma_Shift, - kSysFlag_Color1Gamma_Shift, - kSysFlag_Color2Gamma_Shift, - kSysFlag_Color3Gamma_Shift, + kSysFlag_ConvertColor0ToGamma_Shift, + kSysFlag_ConvertColor1ToGamma_Shift, + kSysFlag_ConvertColor2ToGamma_Shift, + kSysFlag_ConvertColor3ToGamma_Shift, kSysFlag_ROVDepthStencil_Shift, - kSysFlag_ROVDepthFloat24_Shift, kSysFlag_ROVDepthPassIfLess_Shift, kSysFlag_ROVDepthPassIfEqual_Shift, kSysFlag_ROVDepthPassIfGreater_Shift, @@ -133,7 +143,7 @@ class DxbcShaderTranslator : public ShaderTranslator { // depth test passes. kSysFlag_ROVDepthWrite_Shift, kSysFlag_ROVStencilTest_Shift, - // If the depth/stencil test has failed, but resulted in a stencil value + // If the depth / stencil test has failed, but resulted in a stencil value // that is different than the one currently in the depth buffer, write it // anyway and don't run the rest of the shader (to check if the sample may // be discarded some way) - use when alpha test and alpha to coverage are @@ -159,15 +169,15 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysFlag_UserClipPlane5 = 1u << kSysFlag_UserClipPlane5_Shift, kSysFlag_KillIfAnyVertexKilled = 1u << kSysFlag_KillIfAnyVertexKilled_Shift, kSysFlag_PrimitivePolygonal = 1u << kSysFlag_PrimitivePolygonal_Shift, + kSysFlag_DepthFloat24 = 1u << kSysFlag_DepthFloat24_Shift, kSysFlag_AlphaPassIfLess = 1u << kSysFlag_AlphaPassIfLess_Shift, kSysFlag_AlphaPassIfEqual = 1u << kSysFlag_AlphaPassIfEqual_Shift, kSysFlag_AlphaPassIfGreater = 1u << kSysFlag_AlphaPassIfGreater_Shift, - kSysFlag_Color0Gamma = 1u << kSysFlag_Color0Gamma_Shift, - kSysFlag_Color1Gamma = 1u << kSysFlag_Color1Gamma_Shift, - kSysFlag_Color2Gamma = 1u << kSysFlag_Color2Gamma_Shift, - kSysFlag_Color3Gamma = 1u << kSysFlag_Color3Gamma_Shift, + kSysFlag_ConvertColor0ToGamma = 1u << kSysFlag_ConvertColor0ToGamma_Shift, + kSysFlag_ConvertColor1ToGamma = 1u << kSysFlag_ConvertColor1ToGamma_Shift, + kSysFlag_ConvertColor2ToGamma = 1u << kSysFlag_ConvertColor2ToGamma_Shift, + kSysFlag_ConvertColor3ToGamma = 1u << kSysFlag_ConvertColor3ToGamma_Shift, kSysFlag_ROVDepthStencil = 1u << kSysFlag_ROVDepthStencil_Shift, - kSysFlag_ROVDepthFloat24 = 1u << kSysFlag_ROVDepthFloat24_Shift, kSysFlag_ROVDepthPassIfLess = 1u << kSysFlag_ROVDepthPassIfLess_Shift, kSysFlag_ROVDepthPassIfEqual = 1u << kSysFlag_ROVDepthPassIfEqual_Shift, kSysFlag_ROVDepthPassIfGreater = 1u << kSysFlag_ROVDepthPassIfGreater_Shift, @@ -226,21 +236,20 @@ class DxbcShaderTranslator : public ShaderTranslator { // components of each of the 32 used texture fetch constants. uint32_t texture_swizzled_signs[8]; - // Log2 of X and Y sample size. For SSAA with RTV/DSV, this is used to get - // VPOS to pass to the game's shader. For MSAA with ROV, this is used for - // EDRAM address calculation. + // Whether the contents of each texture in fetch constants comes from a + // resolve operation. + uint32_t textures_resolved; + // Log2 of X and Y sample size. Used for alpha to mask, and for MSAA with + // ROV, this is used for EDRAM address calculation. uint32_t sample_count_log2[2]; float alpha_test_reference; + + float color_exp_bias[4]; + // If alpha to mask is disabled, the entire alpha_to_mask value must be 0. // If alpha to mask is enabled, bits 0:7 are sample offsets, and bit 8 must // be 1. uint32_t alpha_to_mask; - - float color_exp_bias[4]; - - uint32_t color_output_map[4]; - - uint32_t edram_resolution_square_scale; uint32_t edram_pitch_tiles; union { struct { @@ -341,8 +350,8 @@ class DxbcShaderTranslator : public ShaderTranslator { (1 << kMaxTextureBindingIndexBits) - 1; struct TextureBinding { uint32_t bindful_srv_index; - // Temporary for WriteResourceDefinitions. - uint32_t bindful_srv_rdef_name_offset; + // Temporary for WriteResourceDefinition. + uint32_t bindful_srv_rdef_name_ptr; uint32_t bindless_descriptor_index; uint32_t fetch_constant; // Stacked and 3D are separate TextureBindings, even for bindless for null @@ -413,16 +422,64 @@ class DxbcShaderTranslator : public ShaderTranslator { float& clamp_alpha_high, uint32_t& keep_mask_low, uint32_t& keep_mask_high); - uint64_t GetDefaultModification( - xenos::ShaderType shader_type, + uint64_t GetDefaultVertexShaderModification( uint32_t dynamic_addressable_register_count, Shader::HostVertexShaderType host_vertex_shader_type = Shader::HostVertexShaderType::kVertex) const override; + uint64_t GetDefaultPixelShaderModification( + uint32_t dynamic_addressable_register_count) const override; // Creates a special pixel shader without color outputs - this resets the // state of the translator. std::vector CreateDepthOnlyPixelShader(); + // Common functions useful not only for the translator, but also for render + // target reinterpretation. + + // Converts the color value externally clamped to [0, 31.875] to 7e3 floating + // point, with zeros in bits 10:31, rounding to the nearest even. Source and + // destination may be the same, temporary must be different than both. + static void PreClampedFloat32To7e3(dxbc::Assembler& a, uint32_t f10_temp, + uint32_t f10_temp_component, + uint32_t f32_temp, + uint32_t f32_temp_component, + uint32_t temp_temp, + uint32_t temp_temp_component); + // Same as PreClampedFloat32To7e3, but clamps the input to [0, 31.875]. + static void UnclampedFloat32To7e3(dxbc::Assembler& a, uint32_t f10_temp, + uint32_t f10_temp_component, + uint32_t f32_temp, + uint32_t f32_temp_component, + uint32_t temp_temp, + uint32_t temp_temp_component); + // Converts the 7e3 number in bits [f10_shift, f10_shift + 10) to a 32-bit + // float. Two temporaries must be different, but one can be the same as the + // source. The destination may be anything writable. + static void Float7e3To32(dxbc::Assembler& a, const dxbc::Dest& f32, + uint32_t f10_temp, uint32_t f10_temp_component, + uint32_t f10_shift, uint32_t temp1_temp, + uint32_t temp1_temp_component, uint32_t temp2_temp, + uint32_t temp2_temp_component); + // Converts the depth value externally clamped to the representable [0, 2) + // range to 20e4 floating point, with zeros in bits 24:31, rounding to the + // nearest even. Source and destination may be the same, temporary must be + // different than both. If remap_from_0_to_0_5 is true, it's assumed that + // 0...1 is pre-remapped to 0...0.5 on the input. + static void PreClampedDepthTo20e4( + dxbc::Assembler& a, uint32_t f24_temp, uint32_t f24_temp_component, + uint32_t f32_temp, uint32_t f32_temp_component, uint32_t temp_temp, + uint32_t temp_temp_component, bool remap_from_0_to_0_5); + // Converts the 20e4 number in bits [f24_shift, f24_shift + 10) to a 32-bit + // float. Two temporaries must be different, but one can be the same as the + // source. The destination may be anything writable. If remap_to_0_to_0_5 is + // true, 0...1 in float24 will be remaped to 0...0.5 in float32. + static void Depth20e4To32(dxbc::Assembler& a, const dxbc::Dest& f32, + uint32_t f24_temp, uint32_t f24_temp_component, + uint32_t f24_shift, uint32_t temp1_temp, + uint32_t temp1_temp_component, uint32_t temp2_temp, + uint32_t temp2_temp_component, + bool remap_to_0_to_0_5); + protected: void Reset() override; @@ -451,102 +508,124 @@ class DxbcShaderTranslator : public ShaderTranslator { private: enum : uint32_t { - kSysConst_Flags_Index = 0, + // Indices. + + kSysConst_Flags_Index, + kSysConst_TessellationFactorRange_Index, + kSysConst_LineLoopClosingIndex_Index, + + kSysConst_VertexIndexEndian_Index, + kSysConst_VertexBaseIndex_Index, + kSysConst_PointSize_Index, + + kSysConst_PointSizeMinMax_Index, + kSysConst_PointScreenToNDC_Index, + + kSysConst_UserClipPlanes_Index, + + kSysConst_NDCScale_Index, + kSysConst_InterpolatorSamplingPattern_Index, + + kSysConst_NDCOffset_Index, + kSysConst_PSParamGen_Index, + + kSysConst_TextureSwizzledSigns_Index, + + kSysConst_TexturesResolved_Index, + kSysConst_SampleCountLog2_Index, + kSysConst_AlphaTestReference_Index, + + kSysConst_ColorExpBias_Index, + + kSysConst_AlphaToMask_Index, + kSysConst_EdramPitchTiles_Index, + kSysConst_EdramDepthRange_Index, + + kSysConst_EdramPolyOffsetFront_Index, + kSysConst_EdramPolyOffsetBack_Index, + + kSysConst_EdramDepthBaseDwords_Index, + + kSysConst_EdramStencil_Index, + + kSysConst_EdramRTBaseDwordsScaled_Index, + + kSysConst_EdramRTFormatFlags_Index, + + kSysConst_EdramRTClamp_Index, + + kSysConst_EdramRTKeepMask_Index, + + kSysConst_EdramRTBlendFactorsOps_Index, + + kSysConst_EdramBlendConstant_Index, + + kSysConst_Count, + + // Vectors. + kSysConst_Flags_Vec = 0, kSysConst_Flags_Comp = 0, - kSysConst_TessellationFactorRange_Index = kSysConst_Flags_Index + 1, kSysConst_TessellationFactorRange_Vec = kSysConst_Flags_Vec, kSysConst_TessellationFactorRange_Comp = 1, - kSysConst_LineLoopClosingIndex_Index = - kSysConst_TessellationFactorRange_Index + 1, kSysConst_LineLoopClosingIndex_Vec = kSysConst_Flags_Vec, kSysConst_LineLoopClosingIndex_Comp = 3, - kSysConst_VertexIndexEndian_Index = - kSysConst_LineLoopClosingIndex_Index + 1, kSysConst_VertexIndexEndian_Vec = kSysConst_LineLoopClosingIndex_Vec + 1, kSysConst_VertexIndexEndian_Comp = 0, - kSysConst_VertexBaseIndex_Index = kSysConst_VertexIndexEndian_Index + 1, kSysConst_VertexBaseIndex_Vec = kSysConst_VertexIndexEndian_Vec, kSysConst_VertexBaseIndex_Comp = 1, - kSysConst_PointSize_Index = kSysConst_VertexBaseIndex_Index + 1, kSysConst_PointSize_Vec = kSysConst_VertexIndexEndian_Vec, kSysConst_PointSize_Comp = 2, - kSysConst_PointSizeMinMax_Index = kSysConst_PointSize_Index + 1, kSysConst_PointSizeMinMax_Vec = kSysConst_PointSize_Vec + 1, kSysConst_PointSizeMinMax_Comp = 0, - kSysConst_PointScreenToNDC_Index = kSysConst_PointSizeMinMax_Index + 1, kSysConst_PointScreenToNDC_Vec = kSysConst_PointSizeMinMax_Vec, kSysConst_PointScreenToNDC_Comp = 2, - kSysConst_UserClipPlanes_Index = kSysConst_PointScreenToNDC_Index + 1, // 6 vectors. kSysConst_UserClipPlanes_Vec = kSysConst_PointScreenToNDC_Vec + 1, - kSysConst_NDCScale_Index = kSysConst_UserClipPlanes_Index + 1, kSysConst_NDCScale_Vec = kSysConst_UserClipPlanes_Vec + 6, kSysConst_NDCScale_Comp = 0, - kSysConst_InterpolatorSamplingPattern_Index = kSysConst_NDCScale_Index + 1, kSysConst_InterpolatorSamplingPattern_Vec = kSysConst_NDCScale_Vec, kSysConst_InterpolatorSamplingPattern_Comp = 3, - kSysConst_NDCOffset_Index = kSysConst_InterpolatorSamplingPattern_Index + 1, kSysConst_NDCOffset_Vec = kSysConst_InterpolatorSamplingPattern_Vec + 1, kSysConst_NDCOffset_Comp = 0, - kSysConst_PSParamGen_Index = kSysConst_NDCOffset_Index + 1, kSysConst_PSParamGen_Vec = kSysConst_NDCOffset_Vec, kSysConst_PSParamGen_Comp = 3, - kSysConst_TextureSwizzledSigns_Index = kSysConst_PSParamGen_Index + 1, // 2 vectors. kSysConst_TextureSwizzledSigns_Vec = kSysConst_PSParamGen_Vec + 1, - kSysConst_SampleCountLog2_Index = kSysConst_TextureSwizzledSigns_Index + 1, - kSysConst_SampleCountLog2_Vec = kSysConst_TextureSwizzledSigns_Vec + 2, - kSysConst_SampleCountLog2_Comp = 0, - kSysConst_AlphaTestReference_Index = kSysConst_SampleCountLog2_Index + 1, - kSysConst_AlphaTestReference_Vec = kSysConst_SampleCountLog2_Vec, - kSysConst_AlphaTestReference_Comp = 2, - kSysConst_AlphaToMask_Index = kSysConst_AlphaTestReference_Index + 1, - kSysConst_AlphaToMask_Vec = kSysConst_SampleCountLog2_Vec, - kSysConst_AlphaToMask_Comp = 3, + kSysConst_TexturesResolved_Vec = kSysConst_TextureSwizzledSigns_Vec + 2, + kSysConst_TexturesResolved_Comp = 0, + kSysConst_SampleCountLog2_Vec = kSysConst_TexturesResolved_Vec, + kSysConst_SampleCountLog2_Comp = 1, + kSysConst_AlphaTestReference_Vec = kSysConst_TexturesResolved_Vec, + kSysConst_AlphaTestReference_Comp = 3, - kSysConst_ColorExpBias_Index = kSysConst_AlphaToMask_Index + 1, - kSysConst_ColorExpBias_Vec = kSysConst_AlphaToMask_Vec + 1, + kSysConst_ColorExpBias_Vec = kSysConst_AlphaTestReference_Vec + 1, - kSysConst_ColorOutputMap_Index = kSysConst_ColorExpBias_Index + 1, - kSysConst_ColorOutputMap_Vec = kSysConst_ColorExpBias_Vec + 1, - - kSysConst_EdramResolutionSquareScale_Index = - kSysConst_ColorOutputMap_Index + 1, - kSysConst_EdramResolutionSquareScale_Vec = kSysConst_ColorOutputMap_Vec + 1, - kSysConst_EdramResolutionSquareScale_Comp = 0, - kSysConst_EdramPitchTiles_Index = - kSysConst_EdramResolutionSquareScale_Index + 1, - kSysConst_EdramPitchTiles_Vec = kSysConst_EdramResolutionSquareScale_Vec, + kSysConst_AlphaToMask_Vec = kSysConst_ColorExpBias_Vec + 1, + kSysConst_AlphaToMask_Comp = 0, + kSysConst_EdramPitchTiles_Vec = kSysConst_AlphaToMask_Vec, kSysConst_EdramPitchTiles_Comp = 1, - kSysConst_EdramDepthRange_Index = kSysConst_EdramPitchTiles_Index + 1, - kSysConst_EdramDepthRange_Vec = kSysConst_EdramResolutionSquareScale_Vec, + kSysConst_EdramDepthRange_Vec = kSysConst_AlphaToMask_Vec, kSysConst_EdramDepthRangeScale_Comp = 2, kSysConst_EdramDepthRangeOffset_Comp = 3, - kSysConst_EdramPolyOffsetFront_Index = kSysConst_EdramDepthRange_Index + 1, kSysConst_EdramPolyOffsetFront_Vec = kSysConst_EdramDepthRange_Vec + 1, kSysConst_EdramPolyOffsetFrontScale_Comp = 0, kSysConst_EdramPolyOffsetFrontOffset_Comp = 1, - kSysConst_EdramPolyOffsetBack_Index = - kSysConst_EdramPolyOffsetFront_Index + 1, kSysConst_EdramPolyOffsetBack_Vec = kSysConst_EdramPolyOffsetFront_Vec, kSysConst_EdramPolyOffsetBackScale_Comp = 2, kSysConst_EdramPolyOffsetBackOffset_Comp = 3, - kSysConst_EdramDepthBaseDwords_Index = - kSysConst_EdramPolyOffsetBack_Index + 1, kSysConst_EdramDepthBaseDwords_Vec = kSysConst_EdramPolyOffsetBack_Vec + 1, kSysConst_EdramDepthBaseDwords_Comp = 0, - kSysConst_EdramStencil_Index = kSysConst_EdramDepthBaseDwords_Index + 1, // 2 vectors. kSysConst_EdramStencil_Vec = kSysConst_EdramDepthBaseDwords_Vec + 1, kSysConst_EdramStencil_Front_Vec = kSysConst_EdramStencil_Vec, @@ -556,31 +635,20 @@ class DxbcShaderTranslator : public ShaderTranslator { kSysConst_EdramStencil_WriteMask_Comp, kSysConst_EdramStencil_FuncOps_Comp, - kSysConst_EdramRTBaseDwordsScaled_Index = kSysConst_EdramStencil_Index + 1, kSysConst_EdramRTBaseDwordsScaled_Vec = kSysConst_EdramStencil_Vec + 2, - kSysConst_EdramRTFormatFlags_Index = - kSysConst_EdramRTBaseDwordsScaled_Index + 1, kSysConst_EdramRTFormatFlags_Vec = kSysConst_EdramRTBaseDwordsScaled_Vec + 1, - kSysConst_EdramRTClamp_Index = kSysConst_EdramRTFormatFlags_Index + 1, // 4 vectors. kSysConst_EdramRTClamp_Vec = kSysConst_EdramRTFormatFlags_Vec + 1, - kSysConst_EdramRTKeepMask_Index = kSysConst_EdramRTClamp_Index + 1, // 2 vectors (render targets 01 and 23). kSysConst_EdramRTKeepMask_Vec = kSysConst_EdramRTClamp_Vec + 4, - kSysConst_EdramRTBlendFactorsOps_Index = - kSysConst_EdramRTKeepMask_Index + 1, kSysConst_EdramRTBlendFactorsOps_Vec = kSysConst_EdramRTKeepMask_Vec + 2, - kSysConst_EdramBlendConstant_Index = - kSysConst_EdramRTBlendFactorsOps_Index + 1, kSysConst_EdramBlendConstant_Vec = kSysConst_EdramRTBlendFactorsOps_Vec + 1, - - kSysConst_Count = kSysConst_EdramBlendConstant_Index + 1 }; static_assert(kSysConst_Count <= 64, "Too many system constants, can't use uint64_t for usage bits"); @@ -611,75 +679,25 @@ class DxbcShaderTranslator : public ShaderTranslator { kPSInPointParameters = kPSInInterpolators + xenos::kMaxInterpolators, kPSInClipSpaceZW, kPSInPosition, - kPSInFrontFace, + // nointerpolation inputs. SV_IsFrontFace (X) is always present for + // ps_param_gen, SV_SampleIndex (Y) is conditional (only for memexport when + // sample-rate shading is otherwise needed anyway due to depth conversion). + kPSInFrontFaceAndSampleIndex, }; - static constexpr uint32_t kSwizzleXYZW = 0b11100100; - static constexpr uint32_t kSwizzleXXXX = 0b00000000; - static constexpr uint32_t kSwizzleYYYY = 0b01010101; - static constexpr uint32_t kSwizzleZZZZ = 0b10101010; - static constexpr uint32_t kSwizzleWWWW = 0b11111111; - - // Operand encoding, with 32-bit immediate indices by default. None of the - // arguments must be shifted when calling. - static constexpr uint32_t EncodeZeroComponentOperand( - uint32_t type, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_0_COMPONENT. - return 0 | (type << 12) | (index_dimension << 20) | - (index_representation_0 << 22) | (index_representation_1 << 25) | - (index_representation_0 << 28); - } - static constexpr uint32_t EncodeScalarOperand( - uint32_t type, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_1_COMPONENT. - return 1 | (type << 12) | (index_dimension << 20) | - (index_representation_0 << 22) | (index_representation_1 << 25) | - (index_representation_0 << 28); - } - // For writing to vectors. Mask literal can be written as 0bWZYX. - static constexpr uint32_t EncodeVectorMaskedOperand( - uint32_t type, uint32_t mask, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_4_COMPONENT, D3D10_SB_OPERAND_4_COMPONENT_MASK_MODE. - return 2 | (0 << 2) | (mask << 4) | (type << 12) | (index_dimension << 20) | - (index_representation_0 << 22) | (index_representation_1 << 25) | - (index_representation_2 << 28); - } - // For reading from vectors. Swizzle can be written as 0bWWZZYYXX. - static constexpr uint32_t EncodeVectorSwizzledOperand( - uint32_t type, uint32_t swizzle, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_4_COMPONENT, D3D10_SB_OPERAND_4_COMPONENT_SWIZZLE_MODE. - return 2 | (1 << 2) | (swizzle << 4) | (type << 12) | - (index_dimension << 20) | (index_representation_0 << 22) | - (index_representation_1 << 25) | (index_representation_2 << 28); - } - // For reading a single component of a vector as a 4-component vector. - static constexpr uint32_t EncodeVectorReplicatedOperand( - uint32_t type, uint32_t component, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_4_COMPONENT, D3D10_SB_OPERAND_4_COMPONENT_SWIZZLE_MODE. - return 2 | (1 << 2) | (component << 4) | (component << 6) | - (component << 8) | (component << 10) | (type << 12) | - (index_dimension << 20) | (index_representation_0 << 22) | - (index_representation_1 << 25) | (index_representation_2 << 28); - } - // For reading scalars from vectors. - static constexpr uint32_t EncodeVectorSelectOperand( - uint32_t type, uint32_t component, uint32_t index_dimension, - uint32_t index_representation_0 = 0, uint32_t index_representation_1 = 0, - uint32_t index_representation_2 = 0) { - // D3D10_SB_OPERAND_4_COMPONENT, D3D10_SB_OPERAND_4_COMPONENT_SELECT_1_MODE. - return 2 | (2 << 2) | (component << 4) | (type << 12) | - (index_dimension << 20) | (index_representation_0 << 22) | - (index_representation_1 << 25) | (index_representation_2 << 28); + // Offset should be offsetof(SystemConstants, field). Swizzle values are + // relative to the first component in the vector according to offsetof - to + // request a scalar, use XXXX swizzle, and if it's at +4 in its 16-byte + // vector, it will be turned into YYYY, and so on. + // TODO(Triang3l): Index to enum class. + dxbc::Src LoadSystemConstant(uint32_t index, size_t offset, + uint32_t swizzle) { + system_constants_used_ |= uint64_t(1) << index; + uint32_t first_component = uint32_t((offset >> 2) & 3); + return dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + uint32_t(offset >> 4), + first_component * 0b01010101 + swizzle); } Modification GetDxbcShaderModification() const { @@ -688,12 +706,12 @@ class DxbcShaderTranslator : public ShaderTranslator { bool IsDxbcVertexShader() const { return is_vertex_shader() && - GetDxbcShaderModification().host_vertex_shader_type == + GetDxbcShaderModification().vertex.host_vertex_shader_type == Shader::HostVertexShaderType::kVertex; } bool IsDxbcDomainShader() const { return is_vertex_shader() && - GetDxbcShaderModification().host_vertex_shader_type != + GetDxbcShaderModification().vertex.host_vertex_shader_type != Shader::HostVertexShaderType::kVertex; } @@ -716,19 +734,24 @@ class DxbcShaderTranslator : public ShaderTranslator { uint32_t piece_temp_component, uint32_t accumulator_temp, uint32_t accumulator_temp_component); - // Converts the depth value externally clamped to the representable [0, 2) - // range to 20e4 floating point, with zeros in bits 24:31, rounding to the - // nearest even. Source and destination may be the same, temporary must be - // different than both. - void PreClampedDepthTo20e4(uint32_t d24_temp, uint32_t d24_temp_component, - uint32_t d32_temp, uint32_t d32_temp_component, - uint32_t temp_temp, uint32_t temp_temp_component); + bool IsSampleRate() const { + assert_true(is_pixel_shader()); + return DSV_IsWritingFloat24Depth() && !current_shader().writes_depth(); + } bool IsDepthStencilSystemTempUsed() const { // See system_temp_depth_stencil_ documentation for explanation of cases. - if (edram_rov_used_) { - return current_shader().writes_depth() || ROV_IsDepthStencilEarly(); + if (current_shader().writes_depth()) { + // With host render targets, the depth format may be float24, in this + // case, need to multiply it by 0.5 since 0...1 of the guest is stored as + // 0...0.5 on the host, and also to convert it. + // With ROV, need to store it to write later. + return true; } - return current_shader().writes_depth() && DSV_IsWritingFloat24Depth(); + if (edram_rov_used_ && ROV_IsDepthStencilEarly()) { + // Calculated in the beginning, written possibly in the end. + return true; + } + return false; } // Whether the current non-ROV pixel shader should convert the depth to 20e4. bool DSV_IsWritingFloat24Depth() const { @@ -736,7 +759,7 @@ class DxbcShaderTranslator : public ShaderTranslator { return false; } Modification::DepthStencilMode depth_stencil_mode = - GetDxbcShaderModification().depth_stencil_mode; + GetDxbcShaderModification().pixel.depth_stencil_mode; return depth_stencil_mode == Modification::DepthStencilMode::kFloat24Truncating || depth_stencil_mode == @@ -746,7 +769,7 @@ class DxbcShaderTranslator : public ShaderTranslator { // 2x2 quads. bool ROV_IsDepthStencilEarly() const { return !is_depth_only_pixel_shader_ && !current_shader().writes_depth() && - current_shader().memexport_stream_constants().empty(); + !current_shader().is_valid_memexport_used(); } // Converts the depth value to 24-bit (storing the result in bits 0:23 and // zeros in 24:31, not creating room for stencil - since this may be involved @@ -756,7 +779,7 @@ class DxbcShaderTranslator : public ShaderTranslator { void ROV_DepthTo24Bit(uint32_t d24_temp, uint32_t d24_temp_component, uint32_t d32_temp, uint32_t d32_temp_component, uint32_t temp_temp, uint32_t temp_temp_component); - // Does all the depth/stencil-related things, including or not including + // Does all the related to depth / stencil, including or not including // writing based on whether it's late, or on whether it's safe to do it early. // Updates system_temp_rov_params_ result and coverage if allowed and safe, // updates system_temp_depth_stencil_, and if early and the coverage is empty @@ -807,18 +830,23 @@ class DxbcShaderTranslator : public ShaderTranslator { const dxbc::Src& is_signed); void ExportToMemory(); void CompleteVertexOrDomainShader(); - // Discards the SSAA sample if it's masked out by alpha to coverage. - void CompletePixelShader_WriteToRTVs_AlphaToMask(); + // For RTV, adds the sample to coverage_temp.coverage_temp_component if it + // passes alpha to mask (except for sample 0, which overwrites the output to + // initialize it). + // For ROV, masks the sample away from coverage_temp.coverage_temp_component + // if it doesn't pass alpha to mask. + // threshold_offset and temp.temp_component can be the same if needed. + void CompletePixelShader_AlphaToMaskSample( + uint32_t sample_index, float threshold_base, dxbc::Src threshold_offset, + float threshold_offset_scale, uint32_t coverage_temp, + uint32_t coverage_temp_component, uint32_t temp, uint32_t temp_component); + // Performs alpha to coverage if necessary, for RTV, writing to oMask, and for + // ROV, updating the low (coverage) bits of system_temp_rov_params_.x. Done + // manually even for RTV to maintain the guest dithering pattern and because + // alpha can be exponent-biased. + void CompletePixelShader_AlphaToMask(); void CompletePixelShader_WriteToRTVs(); void CompletePixelShader_DSV_DepthTo24Bit(); - // Masks the sample away from system_temp_rov_params_.x if it's not covered. - // threshold_offset and temp.temp_component can be the same if needed. - void CompletePixelShader_ROV_AlphaToMaskSample( - uint32_t sample_index, float threshold_base, dxbc::Src threshold_offset, - float threshold_offset_scale, uint32_t temp, uint32_t temp_component); - // Performs alpha to coverage if necessary, updating the low (coverage) bits - // of system_temp_rov_params_.x. - void CompletePixelShader_ROV_AlphaToMask(); void CompletePixelShader_WriteToROV(); void CompletePixelShader(); @@ -928,15 +956,7 @@ class DxbcShaderTranslator : public ShaderTranslator { void ProcessScalarAluOperation(const ParsedAluInstruction& instr, bool& predicate_written); - // Appends a string to a DWORD stream, returns the DWORD-aligned length. - static uint32_t AppendString(std::vector& dest, const char* source); - // Returns the length of a string as if it was appended to a DWORD stream, in - // bytes. - static uint32_t GetStringLength(const char* source) { - return uint32_t(xe::align(std::strlen(source) + 1, sizeof(uint32_t))); - } - - void WriteResourceDefinitions(); + void WriteResourceDefinition(); void WriteInputSignature(); void WritePatchConstantSignature(); void WriteOutputSignature(); @@ -944,16 +964,22 @@ class DxbcShaderTranslator : public ShaderTranslator { // Executable instructions - generated during translation. std::vector shader_code_; - // Complete shader object, with all the needed chunks and dcl_ instructions - + // Complete shader object, with all the needed blobs and dcl_ instructions - // generated in the end of translation. std::vector shader_object_; - // The statistics chunk. - dxbc::Statistics stat_; + // Optional Direct3D features used by the shader. + dxbc::ShaderFeatureInfo shader_feature_info_; + // The statistics blob. + dxbc::Statistics statistics_; - // Assembler for shader_code_ and stat_ (must be placed after them for correct - // initialization order). + // Assembler for shader_code_ and statistics_ (must be placed after them for + // correct initialization order). dxbc::Assembler a_; + // Assembler for shader_object_ and statistics_, for declarations before the + // shader code that depend on info gathered during translation (must be placed + // after them for correct initialization order). + dxbc::Assembler ao_; // Buffer for instruction disassembly comments. StringBuffer instruction_disassembly_buffer_; @@ -963,7 +989,7 @@ class DxbcShaderTranslator : public ShaderTranslator { bool emit_source_map_; // Vendor ID of the GPU manufacturer, for toggling unsupported features. - uint32_t vendor_id_; + ui::GraphicsProvider::GpuVendorID vendor_id_; // Whether textures and samplers should be bindless. bool bindless_resources_used_; @@ -971,12 +997,23 @@ class DxbcShaderTranslator : public ShaderTranslator { // Whether the output merger should be emulated in pixel shaders. bool edram_rov_used_; + // Whether with RTV-based output-merger, k_8_8_8_8_GAMMA render targets are + // represented as host sRGB. + bool gamma_render_target_as_srgb_; + + // Whether 2x MSAA is emulated using real 2x MSAA rather than two samples of + // 4x MSAA. + bool msaa_2x_supported_; + + // Guest pixel host width / height. + uint32_t draw_resolution_scale_; + // Is currently writing the empty depth-only pixel shader, for // CompleteTranslation. bool is_depth_only_pixel_shader_ = false; // Data types used in constants buffers. Listed in dependency order. - enum class RdefTypeIndex { + enum class ShaderRdefTypeIndex { kFloat, kFloat2, kFloat3, @@ -1005,26 +1042,17 @@ class DxbcShaderTranslator : public ShaderTranslator { kUnknown = kCount }; - struct RdefStructMember { - const char* name; - RdefTypeIndex type; - uint32_t offset; - }; - - struct RdefType { + struct ShaderRdefType { // Name ignored for arrays. const char* name; dxbc::RdefVariableClass variable_class; dxbc::RdefVariableType variable_type; - uint32_t row_count; - uint32_t column_count; - // 0 for primitive types, 1 for structures, array size for arrays. - uint32_t element_count; - uint32_t struct_member_count; - RdefTypeIndex array_element_type; - const RdefStructMember* struct_members; + uint16_t row_count; + uint16_t column_count; + uint16_t element_count; + ShaderRdefTypeIndex array_element_type; }; - static const RdefType rdef_types_[size_t(RdefTypeIndex::kCount)]; + static const ShaderRdefType rdef_types_[size_t(ShaderRdefTypeIndex::kCount)]; static constexpr uint32_t kBindingIndexUnallocated = UINT32_MAX; @@ -1039,7 +1067,7 @@ class DxbcShaderTranslator : public ShaderTranslator { struct SystemConstantRdef { const char* name; - RdefTypeIndex type; + ShaderRdefTypeIndex type; uint32_t size; uint32_t padding_after; }; @@ -1074,35 +1102,38 @@ class DxbcShaderTranslator : public ShaderTranslator { // not: // X - Bit masks: // 0:3 - Per-sample coverage at the current stage of the shader's execution. - // Affected by things like SV_Coverage, early or late depth/stencil + // Affected by things like SV_Coverage, early or late depth / stencil // (always resets bits for failing, no matter if need to defer writing), // alpha to coverage. - // 4:7 - Depth write deferred mask - when early depth/stencil resulted in a + // 4:7 - Depth write deferred mask - when early depth / stencil resulted in a // different value for the sample (like different stencil if the test // failed), but can't write it before running the shader because it's // not known if the sample will be discarded by the shader, alphatest or // AtoC. - // Early depth/stencil rejection of the pixel is possible when both 0:3 and + // Early depth / stencil rejection of the pixel is possible when both 0:3 and // 4:7 are zero. // 8:11 - Whether color buffers have been written to, if not written on the // taken execution path, don't export according to Direct3D 9 register // documentation (some games rely on this behavior). - // Y - Absolute resolution-scaled EDRAM offset for depth/stencil, in dwords. + // Y - Absolute resolution-scaled EDRAM offset for depth / stencil, in dwords. // Z - Base-relative resolution-scaled EDRAM offset for 32bpp color data, in // dwords. // W - Base-relative resolution-scaled EDRAM offset for 64bpp color data, in // dwords. uint32_t system_temp_rov_params_; // Two purposes: - // - When writing to oDepth, and either using ROV or converting the depth to - // float24: X also used to hold the depth written by the shader, - // later used as a temporary during depth/stencil testing. + // - When writing to oDepth: X also used to hold the depth written by the + // shader, which, for host render targets, if the depth buffer is float24, + // needs to be remapped from guest 0...1 to host 0...0.5 and, if needed, + // converted to float24 precision; and for ROV, needs to be written in the + // end of the shader. // - Otherwise, when using ROV output with ROV_IsDepthStencilEarly being true: - // New per-sample depth/stencil values, generated during early depth/stencil - // test (actual writing checks coverage bits). + // New per-sample depth / stencil values, generated during early + // depth / stencil test (actual writing checks coverage bits). uint32_t system_temp_depth_stencil_; - // Up to 4 color outputs in pixel shaders (because of exponent bias, alpha - // test and remapping, and also for ROV writing). + // Up to 4 color outputs in pixel shaders (needs to be readable, because of + // alpha test, alpha to coverage, exponent bias, gamma, and also for ROV + // writing). uint32_t system_temps_color_[4]; // Bits containing whether each eM# has been written, for up to 16 streams, or @@ -1114,7 +1145,7 @@ class DxbcShaderTranslator : public ShaderTranslator { // eM# in each `alloc export`, or UINT32_MAX if not used. uint32_t system_temps_memexport_data_[Shader::kMaxMemExports][5]; - // Vector ALU or fetch result/scratch (since Xenos write masks can contain + // Vector ALU or fetch result / scratch (since Xenos write masks can contain // swizzles). uint32_t system_temp_result_; // Temporary register ID for previous scalar result, program counter, diff --git a/src/xenia/gpu/dxbc_shader_translator_fetch.cc b/src/xenia/gpu/dxbc_shader_translator_fetch.cc index 92bf89f0a..571501f28 100644 --- a/src/xenia/gpu/dxbc_shader_translator_fetch.cc +++ b/src/xenia/gpu/dxbc_shader_translator_fetch.cc @@ -17,7 +17,7 @@ #include "xenia/base/math.h" #include "xenia/base/string.h" #include "xenia/gpu/dxbc_shader_translator.h" -#include "xenia/gpu/gpu_flags.h" +#include "xenia/gpu/render_target_cache.h" namespace xe { namespace gpu { @@ -480,7 +480,7 @@ uint32_t DxbcShaderTranslator::FindOrAddTextureBinding( } else { new_texture_binding.bindful_srv_index = kBindingIndexUnallocated; } - new_texture_binding.bindful_srv_rdef_name_offset = 0; + new_texture_binding.bindful_srv_rdef_name_ptr = 0; // Consistently 0 if not bindless as it may be used for hashing. new_texture_binding.bindless_descriptor_index = bindless_resources_used_ ? GetBindlessResourceCount() : 0; @@ -653,26 +653,6 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( if (grad_operand_temp_pushed) { PopSystemTemp(); } - if (!edram_rov_used_ && cvars::ssaa_scale_gradients) { - // Scale the gradients to guest pixels with SSAA. - uint32_t ssaa_scale_temp = PushSystemTemp(); - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpMovC(dxbc::Dest::R(ssaa_scale_temp, - (used_result_nonzero_components & 0b0011) | - (used_result_nonzero_components >> 2)), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec, - kSysConst_SampleCountLog2_Comp | - ((kSysConst_SampleCountLog2_Comp + 1) << 2)), - dxbc::Src::LF(2.0f), dxbc::Src::LF(1.0f)); - a_.OpMul( - dxbc::Dest::R(system_temp_result_, used_result_nonzero_components), - dxbc::Src::R(system_temp_result_), - dxbc::Src::R(ssaa_scale_temp, 0b01000100)); - // Release ssaa_scale_temp. - PopSystemTemp(); - } StoreResult(instr.result, dxbc::Src::R(system_temp_result_)); return; } @@ -726,20 +706,22 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( float offsets[4] = {}; // MSDN doesn't list offsets as getCompTexLOD parameters. if (instr.opcode != FetchOpcode::kGetTextureComputedLod) { - // Add a small epsilon to the offset (1/4 the fixed-point texture coordinate - // ULP - shouldn't significantly effect the fixed-point conversion) to - // resolve ambiguity when fetching point-sampled textures between texels. - // This applies to both normalized (Banjo-Kazooie Xbox Live Arcade logo, - // coordinates interpolated between vertices with half-pixel offset) and - // unnormalized (Halo 3 lighting G-buffer reading, ps_param_gen pixels) - // coordinates. On Nvidia Pascal, without this adjustment, blockiness is - // visible in both cases. Possibly there is a better way, however, an - // attempt was made to error-correct division by adding the difference - // between original and re-denormalized coordinates, but on Nvidia, `mul` - // and internal multiplication in texture sampling apparently round - // differently, so `mul` gives a value that would be floored as expected, - // but the left/upper pixel is still sampled instead. - const float rounding_offset = 1.0f / 1024.0f; + // Add a small epsilon to the offset (1.5/4 the fixed-point texture + // coordinate ULP - shouldn't significantly effect the fixed-point + // conversion; 1/4 is also not enough with 3x resolution scaling very + // noticeably on the weapon in Halo 3) to resolve ambiguity when fetching + // point-sampled textures between texels. This applies to both normalized + // (Banjo-Kazooie Xbox Live Arcade logo, coordinates interpolated between + // vertices with half-pixel offset) and unnormalized (Halo 3 lighting + // G-buffer reading, ps_param_gen pixels) coordinates. On Nvidia Pascal, + // without this adjustment, blockiness is visible in both cases. Possibly + // there is a better way, however, an attempt was made to error-correct + // division by adding the difference between original and re-denormalized + // coordinates, but on Nvidia, `mul` and internal multiplication in texture + // sampling apparently round differently, so `mul` gives a value that would + // be floored as expected, but the left/upper pixel is still sampled + // instead. + const float rounding_offset = 1.5f / 1024.0f; switch (instr.dimension) { case xenos::FetchOpDimension::k1D: offsets[0] = instr.attributes.offset_x + rounding_offset; @@ -916,6 +898,8 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( dxbc::Src::R(size_and_is_3d_temp)); } } + bool revert_resolution_scale = draw_resolution_scale_ > 1 && + cvars::draw_resolution_scaled_texture_offsets; if (instr.opcode == FetchOpcode::kGetTextureWeights) { // FIXME(Triang3l): Mip lerp factor needs to be calculated, and the @@ -937,10 +921,59 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( LoadOperand(instr.operands[0], used_result_nonzero_components, coord_operand_temp_pushed); dxbc::Src coord_src(coord_operand); + // If needed, apply the resolution scale to the width / height and the + // unnormalized coordinates. + uint32_t resolution_scaled_result_components = + revert_resolution_scale ? used_result_nonzero_components & 0b0011 + : 0b0000; + uint32_t resolution_scaled_coord_components = + instr.attributes.unnormalized_coordinates + ? resolution_scaled_result_components + : 0b0000; + uint32_t resolution_scaled_size_components = + size_needed_components & resolution_scaled_result_components; + if (resolution_scaled_coord_components || + resolution_scaled_size_components) { + if (resolution_scaled_coord_components && + (coord_src.type_ != dxbc::OperandType::kTemp || + coord_src.index_1d_.index_ != system_temp_result_)) { + // Use system_temp_result_ as a temporary for conditionally + // resolution-scaled coordinates. + a_.OpMov( + dxbc::Dest::R(system_temp_result_, used_result_nonzero_components), + coord_src); + coord_src = dxbc::Src::R(system_temp_result_); + } + // Using system_temp_result_.w as a temporary for the flag indicating + // whether the texture was resolved - not involved in coordinate + // calculations. + assert_zero(used_result_nonzero_components & 0b1000); + a_.OpAnd(dxbc::Dest::R(system_temp_result_, 0b1000), + LoadSystemConstant(kSysConst_TexturesResolved_Index, + offsetof(SystemConstants, textures_resolved), + dxbc::Src::kXXXX), + dxbc::Src::LU(uint32_t(1) << tfetch_index)); + a_.OpIf(true, dxbc::Src::R(system_temp_result_, dxbc::Src::kWWWW)); + // The texture is resolved - scale the coordinates and the size. + dxbc::Src resolution_scale_src( + dxbc::Src::LF(float(draw_resolution_scale_))); + if (resolution_scaled_coord_components) { + a_.OpMul(dxbc::Dest::R(system_temp_result_, + resolution_scaled_coord_components), + coord_src, resolution_scale_src); + } + if (resolution_scaled_size_components) { + a_.OpMul(dxbc::Dest::R(size_and_is_3d_temp, + resolution_scaled_size_components), + dxbc::Src::R(size_and_is_3d_temp), resolution_scale_src); + } + a_.OpEndIf(); + } uint32_t offsets_needed = offsets_not_zero & used_result_nonzero_components; if (!instr.attributes.unnormalized_coordinates || offsets_needed) { // Using system_temp_result_ as a temporary for coordinate denormalization - // and offsetting. + // and offsetting. May already contain the coordinates loaded if + // resolution scaling was applied to the coordinates. coord_src = dxbc::Src::R(system_temp_result_); dxbc::Dest coord_dest( dxbc::Dest::R(system_temp_result_, used_result_nonzero_components)); @@ -1017,15 +1050,54 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( normalized_components = 0b0111; break; } + uint32_t normalized_components_with_offsets = + normalized_components & offsets_not_zero; + uint32_t normalized_components_with_scaled_offsets = + revert_resolution_scale ? normalized_components_with_offsets & 0b0011 + : 0; + uint32_t normalized_components_with_unscaled_offsets = + normalized_components_with_offsets & + ~normalized_components_with_scaled_offsets; + uint32_t normalized_components_without_offsets = + normalized_components & ~normalized_components_with_offsets; if (instr.attributes.unnormalized_coordinates) { // Unnormalized coordinates - normalize XY, and if 3D, normalize Z. assert_not_zero(normalized_components); assert_true((size_needed_components & normalized_components) == normalized_components); - if (offsets_not_zero & normalized_components) { + if (normalized_components_with_offsets) { + // Apply the offsets to components to normalize where needed, or just + // copy the components to coord_and_sampler_temp where not. // FIXME(Triang3l): Offsets need to be applied at the LOD being fetched. - a_.OpAdd(dxbc::Dest::R(coord_and_sampler_temp, normalized_components), - coord_operand, dxbc::Src::LP(offsets)); + if (normalized_components_with_scaled_offsets) { + // Using coord_and_sampler_temp.w as a temporary for the needed + // resolution scale inverse - sampler not loaded yet. + a_.OpAnd( + dxbc::Dest::R(coord_and_sampler_temp, 0b1000), + LoadSystemConstant(kSysConst_TexturesResolved_Index, + offsetof(SystemConstants, textures_resolved), + dxbc::Src::kXXXX), + dxbc::Src::LU(uint32_t(1) << tfetch_index)); + a_.OpMovC(dxbc::Dest::R(coord_and_sampler_temp, 0b1000), + dxbc::Src::R(coord_and_sampler_temp, dxbc::Src::kWWWW), + dxbc::Src::LF(1.0f / draw_resolution_scale_), + dxbc::Src::LF(1.0f)); + a_.OpMAd(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_with_scaled_offsets), + dxbc::Src::LP(offsets), + dxbc::Src::R(coord_and_sampler_temp, dxbc::Src::kWWWW), + coord_operand); + } + if (normalized_components_with_unscaled_offsets) { + a_.OpAdd(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_with_unscaled_offsets), + coord_operand, dxbc::Src::LP(offsets)); + } + if (normalized_components_without_offsets) { + a_.OpMov(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_without_offsets), + coord_operand); + } assert_not_zero(normalized_components & 0b011); a_.OpDiv(dxbc::Dest::R(coord_and_sampler_temp, normalized_components & 0b011), @@ -1055,27 +1127,48 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( } else { // Normalized coordinates - apply offsets to XY or copy them to // coord_and_sampler_temp, and if stacked, denormalize Z. - uint32_t coords_with_offset = offsets_not_zero & normalized_components; - if (coords_with_offset) { + if (normalized_components_with_offsets) { // FIXME(Triang3l): Offsets need to be applied at the LOD being fetched. - assert_true((size_needed_components & coords_with_offset) == - coords_with_offset); - a_.OpDiv(dxbc::Dest::R(coord_and_sampler_temp, coords_with_offset), + assert_true( + (size_needed_components & normalized_components_with_offsets) == + normalized_components_with_offsets); + a_.OpDiv(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_with_offsets), dxbc::Src::LP(offsets), dxbc::Src::R(size_and_is_3d_temp)); - a_.OpAdd(dxbc::Dest::R(coord_and_sampler_temp, coords_with_offset), - coord_operand, dxbc::Src::R(coord_and_sampler_temp)); + if (normalized_components_with_scaled_offsets) { + // Using coord_and_sampler_temp.w as a temporary for the needed + // resolution scale inverse - sampler not loaded yet. + a_.OpAnd( + dxbc::Dest::R(coord_and_sampler_temp, 0b1000), + LoadSystemConstant(kSysConst_TexturesResolved_Index, + offsetof(SystemConstants, textures_resolved), + dxbc::Src::kXXXX), + dxbc::Src::LU(uint32_t(1) << tfetch_index)); + a_.OpMovC(dxbc::Dest::R(coord_and_sampler_temp, 0b1000), + dxbc::Src::R(coord_and_sampler_temp, dxbc::Src::kWWWW), + dxbc::Src::LF(1.0f / draw_resolution_scale_), + dxbc::Src::LF(1.0f)); + a_.OpMAd(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_with_scaled_offsets), + dxbc::Src::R(coord_and_sampler_temp), + dxbc::Src::R(coord_and_sampler_temp, dxbc::Src::kWWWW), + coord_operand); + } + if (normalized_components_with_unscaled_offsets) { + a_.OpAdd(dxbc::Dest::R(coord_and_sampler_temp, + normalized_components_with_unscaled_offsets), + coord_operand, dxbc::Src::R(coord_and_sampler_temp)); + } } - uint32_t coords_without_offset = - ~coords_with_offset & normalized_components; // 3D/stacked without offset is handled separately. - if (coords_without_offset & 0b011) { + if (normalized_components_without_offsets & 0b011) { a_.OpMov(dxbc::Dest::R(coord_and_sampler_temp, - coords_without_offset & 0b011), + normalized_components_without_offsets & 0b011), coord_operand); } if (instr.dimension == xenos::FetchOpDimension::k3DOrStacked) { assert_true((size_needed_components & 0b1100) == 0b1100); - if (coords_with_offset & 0b100) { + if (normalized_components_with_offsets & 0b100) { // Denormalize and offset Z (re-apply the offset not to lose precision // as a result of division) if stacked. a_.OpIf(false, dxbc::Src::R(size_and_is_3d_temp, dxbc::Src::kWWWW)); @@ -1418,27 +1511,12 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( a_.OpExp(lod_dest, lod_src); // FIXME(Triang3l): Gradient exponent adjustment is currently not done // in getCompTexLOD, so don't do it here too. - bool ssaa_scale_gradients = - !instr.attributes.use_register_gradients && !edram_rov_used_ && - cvars::ssaa_scale_gradients; #if 0 // Extract gradient exponent biases from the fetch constant and merge // them with the LOD bias. a_.OpIBFE(dxbc::Dest::R(grad_h_lod_temp, 0b0011), dxbc::Src::LU(5), dxbc::Src::LU(22, 27, 0, 0), RequestTextureFetchConstantWord(tfetch_index, 4)); - if (ssaa_scale_gradients) { - // Adjust the gradient scales to include the SSAA scale. - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpIAdd(dxbc::Dest::R(grad_h_lod_temp, 0b0011), - dxbc::Src::R(grad_h_lod_temp), - dxbc::Src::CB( - cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec, - kSysConst_SampleCountLog2_Comp | - ((kSysConst_SampleCountLog2_Comp + 1) << 2))); - } a_.OpIMAd(dxbc::Dest::R(grad_h_lod_temp, 0b0011), dxbc::Src::R(grad_h_lod_temp), dxbc::Src::LI(int32_t(1) << 23), dxbc::Src::LF(1.0f)); @@ -1446,32 +1524,6 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( dxbc::Src::R(grad_h_lod_temp, dxbc::Src::kYYYY)); a_.OpMul(lod_dest, lod_src, dxbc::Src::R(grad_h_lod_temp, dxbc::Src::kXXXX)); -#else - if (ssaa_scale_gradients) { - // Adjust the gradient scales in each direction to include the SSAA - // scale - for ddy scale, grad_v_temp.w, not grad_h_lod_temp.w, must - // be used. - // ddy. - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpMovC(dxbc::Dest::R(grad_v_temp, 0b1000), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec) - .Select(kSysConst_SampleCountLog2_Comp + 1), - dxbc::Src::LF(2.0f), dxbc::Src::LF(1.0f)); - a_.OpMul(dxbc::Dest::R(grad_v_temp, 0b1000), lod_src, - dxbc::Src::R(grad_v_temp, dxbc::Src::kWWWW)); - // ddx (after ddy handling, because the ddy code uses lod_src, and - // it's being overwritten now). - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpIf(true, - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec) - .Select(kSysConst_SampleCountLog2_Comp)); - a_.OpMul(lod_dest, lod_src, dxbc::Src::LF(2.0f)); - a_.OpEndIf(); - } #endif // Obtain the gradients and apply biases to them. if (instr.attributes.use_register_gradients) { @@ -1531,13 +1583,8 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( dxbc::Src::R(grad_v_temp), dxbc::Src::R(grad_v_temp, dxbc::Src::kWWWW)); #else - // With SSAA gradient scaling, the scale is separate in each - // direction. a_.OpMul(dxbc::Dest::R(grad_v_temp, grad_mask), - dxbc::Src::R(grad_v_temp), - ssaa_scale_gradients - ? dxbc::Src::R(grad_v_temp, dxbc::Src::kWWWW) - : lod_src); + dxbc::Src::R(grad_v_temp), lod_src); #endif } if (instr.dimension == xenos::FetchOpDimension::k1D) { @@ -2007,8 +2054,56 @@ void DxbcShaderTranslator::ProcessTextureFetchInstruction( a_.OpBreak(); a_.OpCase(dxbc::Src::LU(uint32_t(xenos::TextureSign::kGamma))); uint32_t gamma_temp = PushSystemTemp(); + if (gamma_render_target_as_srgb_) { + // Check if the texture has sRGB rather that piecewise linear gamma. + // More likely that it's just a texture with PWL, put this case in the + // `if`, with `else` for sRGB resolved render targets. + a_.OpAnd( + dxbc::Dest::R(gamma_temp, 0b0001), + LoadSystemConstant(kSysConst_TexturesResolved_Index, + offsetof(SystemConstants, textures_resolved), + dxbc::Src::kXXXX), + dxbc::Src::LU(uint32_t(1) << tfetch_index)); + a_.OpIf(false, dxbc::Src::R(gamma_temp, dxbc::Src::kXXXX)); + } + // Convert from piecewise linear. ConvertPWLGamma(false, system_temp_result_, i, system_temp_result_, i, gamma_temp, 0, gamma_temp, 1); + if (gamma_render_target_as_srgb_) { + a_.OpElse(); + // Convert from sRGB. + a_.OpMov(component_dest, component_src, true); + a_.OpGE(dxbc::Dest::R(gamma_temp, 0b0001), + dxbc::Src::LF(RenderTargetCache::kSrgbToLinearThreshold), + component_src); + a_.OpIf(true, dxbc::Src::R(gamma_temp, dxbc::Src::kXXXX)); + // sRGB <= kSrgbToLinearThreshold case - linear scale. + a_.OpMul(component_dest, component_src, + dxbc::Src::LF(1.0f / + RenderTargetCache::kSrgbToLinearDenominator1)); + a_.OpElse(); + // sRGB > kSrgbToLinearThreshold case. + // 0 and 1 must be exactly achievable - only convert when the + // saturated value is < 1. + a_.OpLT(dxbc::Dest::R(gamma_temp, 0b0001), component_src, + dxbc::Src::LF(1.0f)); + a_.OpIf(true, dxbc::Src::R(gamma_temp, dxbc::Src::kXXXX)); + a_.OpMAd(component_dest, component_src, + dxbc::Src::LF(1.0f / + RenderTargetCache::kSrgbToLinearDenominator2), + dxbc::Src::LF(RenderTargetCache::kSrgbToLinearOffset / + RenderTargetCache::kSrgbToLinearDenominator2)); + a_.OpLog(component_dest, component_src); + a_.OpMul(component_dest, component_src, + dxbc::Src::LF(RenderTargetCache::kSrgbToLinearExponent)); + a_.OpExp(component_dest, component_src); + // Close the < 1 check. + a_.OpEndIf(); + // Close the sRGB <= kSrgbToLinearThreshold check. + a_.OpEndIf(); + // Close the PWL or sRGB check. + a_.OpEndIf(); + } // Release gamma_temp. PopSystemTemp(); a_.OpBreak(); diff --git a/src/xenia/gpu/dxbc_shader_translator_memexport.cc b/src/xenia/gpu/dxbc_shader_translator_memexport.cc index ce39e21b1..5959989e7 100644 --- a/src/xenia/gpu/dxbc_shader_translator_memexport.cc +++ b/src/xenia/gpu/dxbc_shader_translator_memexport.cc @@ -7,6 +7,8 @@ ****************************************************************************** */ +#include "xenia/base/assert.h" +#include "xenia/gpu/draw_util.h" #include "xenia/gpu/dxbc_shader_translator.h" namespace xe { @@ -100,40 +102,94 @@ void DxbcShaderTranslator::ExportToMemory() { // Safety check if the shared memory is bound as UAV. system_constants_used_ |= 1ull << kSysConst_Flags_Index; - a_.OpAnd(dxbc::Dest::R(control_temp, 0b0001), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_Flags_Vec) - .Select(kSysConst_Flags_Comp), - dxbc::Src::LU(kSysFlag_SharedMemoryIsUAV)); + a_.OpUBFE(dxbc::Dest::R(control_temp, 0b0001), dxbc::Src::LU(1), + dxbc::Src::LU(kSysFlag_SharedMemoryIsUAV_Shift), + dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + kSysConst_Flags_Vec) + .Select(kSysConst_Flags_Comp)); + // Open the `if` with the uniform condition for the shared memory buffer being + // bound as a UAV (more fine-grained checks are vector and likely divergent). + a_.OpIf(true, dxbc::Src::R(control_temp, dxbc::Src::kXXXX)); + + // Check more fine-grained limitations. + // The flag in control_temp.x can be 0 or 1 for simplicity, not necessarily + // 0 or 0xFFFFFFFF. + bool inner_condition_provided = false; if (is_pixel_shader()) { - // Disable memexport in pixel shaders with supersampling since VPOS is - // ambiguous. - if (edram_rov_used_) { - system_constants_used_ |= 1ull - << kSysConst_EdramResolutionSquareScale_Index; - a_.OpULT(dxbc::Dest::R(control_temp, 0b0010), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::LU(2)); - a_.OpAnd(dxbc::Dest::R(control_temp, 0b0001), - dxbc::Src::R(control_temp, dxbc::Src::kXXXX), - dxbc::Src::R(control_temp, dxbc::Src::kYYYY)); - } else { - // Enough to check just Y because it's scaled for both 2x and 4x. - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpMovC(dxbc::Dest::R(control_temp, 0b0001), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec) - .Select(kSysConst_SampleCountLog2_Comp + 1), - dxbc::Src::LU(0), dxbc::Src::R(control_temp, dxbc::Src::kXXXX)); + if (draw_resolution_scale_ > 1) { + // Only do memexport for one host pixel in a guest pixel. + // For 2x - (1, 1) because it's covered with half-pixel offset that + // becomes full-pixel. + // For 3x - also (1, 1) because it's still covered with half-pixel offset, + // but close to the center. + in_position_used_ |= 0b0011; + a_.OpFToU( + dxbc::Dest::R(control_temp, 0b0110), + dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition), 0b0100 << 2)); + switch (draw_resolution_scale_) { + case 2: + a_.OpAnd(dxbc::Dest::R(control_temp, 0b0110), + dxbc::Src::R(control_temp), dxbc::Src::LU(1)); + // No need to do IEq - already 1 for right / bottom, 0 for left / top. + break; + case 3: + // xy % 3 == 1. + for (uint32_t i = 1; i <= 2; ++i) { + a_.OpUMul(dxbc::Dest::R(control_temp, 0b1000), dxbc::Dest::Null(), + dxbc::Src::R(control_temp).Select(i), + dxbc::Src::LU(draw_util::kDivideScale3)); + a_.OpUShR(dxbc::Dest::R(control_temp, 0b1000), + dxbc::Src::R(control_temp, dxbc::Src::kWWWW), + dxbc::Src::LU(draw_util::kDivideUpperShift3)); + a_.OpIMAd(dxbc::Dest::R(control_temp, 1 << i), + dxbc::Src::R(control_temp, dxbc::Src::kWWWW), + dxbc::Src::LI(-3), dxbc::Src::R(control_temp).Select(i)); + } + a_.OpIEq(dxbc::Dest::R(control_temp, 0b0110), + dxbc::Src::R(control_temp), dxbc::Src::LU(1)); + break; + default: + assert_unhandled_case(draw_resolution_scale_); + } + a_.OpAnd(dxbc::Dest::R(control_temp, + inner_condition_provided ? 0b0010 : 0b0001), + dxbc::Src::R(control_temp, dxbc::Src::kYYYY), + dxbc::Src::R(control_temp, dxbc::Src::kZZZZ)); + if (inner_condition_provided) { + // Merge with the previous condition in control_temp.x. + a_.OpAnd(dxbc::Dest::R(control_temp, 0b0001), + dxbc::Src::R(control_temp, dxbc::Src::kXXXX), + dxbc::Src::R(control_temp, dxbc::Src::kYYYY)); + } + inner_condition_provided = true; + } + // With sample-rate shading (with float24 conversion), only do memexport + // from one sample (as the shader is invoked multiple times for a pixel), + // if SV_SampleIndex == firstbit_lo(SV_Coverage). For zero coverage, + // firstbit_lo returns 0xFFFFFFFF. + if (IsSampleRate()) { + a_.OpFirstBitLo(dxbc::Dest::R(control_temp, 0b0010), + dxbc::Src::VCoverage()); + a_.OpIEq( + dxbc::Dest::R(control_temp, + inner_condition_provided ? 0b0010 : 0b0001), + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kYYYY), + dxbc::Src::R(control_temp, dxbc::Src::kYYYY)); + if (inner_condition_provided) { + // Merge with the previous condition in control_temp.x. + a_.OpAnd(dxbc::Dest::R(control_temp, 0b0001), + dxbc::Src::R(control_temp, dxbc::Src::kXXXX), + dxbc::Src::R(control_temp, dxbc::Src::kYYYY)); + } + inner_condition_provided = true; } } - // Check if memexport can be done. - a_.OpIf(true, dxbc::Src::R(control_temp, dxbc::Src::kXXXX)); + // Open the inner (vector) conditional if needed. + if (inner_condition_provided) { + a_.OpIf(true, dxbc::Src::R(control_temp, dxbc::Src::kXXXX)); + } // control_temp.x is now free. for (uint32_t i = 0; i < Shader::kMaxMemExports; ++i) { @@ -462,7 +518,12 @@ void DxbcShaderTranslator::ExportToMemory() { // control_temp.y is now free. } - // Close the memexport possibility check. + // Close the inner memexport possibility conditional. + if (inner_condition_provided) { + a_.OpEndIf(); + } + + // Close the outer memexport possibility conditional. a_.OpEndIf(); // Release control_temp. diff --git a/src/xenia/gpu/dxbc_shader_translator_om.cc b/src/xenia/gpu/dxbc_shader_translator_om.cc index 1f8944f58..38a6bf9a3 100644 --- a/src/xenia/gpu/dxbc_shader_translator_om.cc +++ b/src/xenia/gpu/dxbc_shader_translator_om.cc @@ -9,8 +9,11 @@ #include "xenia/gpu/dxbc_shader_translator.h" +#include + #include "xenia/base/assert.h" #include "xenia/base/math.h" +#include "xenia/gpu/draw_util.h" namespace xe { namespace gpu { @@ -153,30 +156,69 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { // system_temp_rov_params_.w - for 64bpp color (base-relative). // *************************************************************************** - // Extract the resolution scale as log2(scale)/2 specific for 1 (-> 0) and - // 4 (-> 1) to a temp SGPR. - uint32_t resolution_scale_log2_temp = PushSystemTemp(); - system_constants_used_ |= 1ull << kSysConst_EdramResolutionSquareScale_Index; - a_.OpUShR(dxbc::Dest::R(resolution_scale_log2_temp, 0b0001), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::LU(2)); - // Convert the pixel position (if resolution scale is 4, this will be 2x2 - // bigger) to integer to system_temp_rov_params_.zw. - // system_temp_rov_params_.z = X host pixel position as uint - // system_temp_rov_params_.w = Y host pixel position as uint - in_position_used_ |= 0b0011; - a_.OpFToU(dxbc::Dest::R(system_temp_rov_params_, 0b1100), - dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition), 0b01000000)); - // Revert the resolution scale to convert the position to guest pixels. - // system_temp_rov_params_.z = X guest pixel position / sample width - // system_temp_rov_params_.w = Y guest pixel position / sample height - a_.OpUShR(dxbc::Dest::R(system_temp_rov_params_, 0b1100), - dxbc::Src::R(system_temp_rov_params_), - dxbc::Src::R(resolution_scale_log2_temp, dxbc::Src::kXXXX)); - + uint32_t resolution_scale_host_pixel_temp = UINT32_MAX; + if (draw_resolution_scale_ > 1) { + // Convert the host pixel position to integer to + // resolution_scale_host_pixel_temp.xy. + // resolution_scale_host_pixel_temp.x = X host pixel position as uint + // resolution_scale_host_pixel_temp.y = Y host pixel position as uint + resolution_scale_host_pixel_temp = PushSystemTemp(); + in_position_used_ |= 0b0011; + a_.OpFToU(dxbc::Dest::R(resolution_scale_host_pixel_temp, 0b0011), + dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition))); + // Revert the resolution scale to convert the position to guest pixels. + // system_temp_rov_params_.z = X guest pixel position / sample width + // system_temp_rov_params_.w = Y guest pixel position / sample height + // Also, get the linear host pixel index within the guest pixel. + // resolution_scale_host_pixel_temp.x = host pixel linear index + switch (draw_resolution_scale_) { + case 2: + // Guest pixel index. + a_.OpUShR(dxbc::Dest::R(system_temp_rov_params_, 0b1100), + dxbc::Src::R(resolution_scale_host_pixel_temp, 0b0100 << 4), + dxbc::Src::LU(1)); + // Host pixel index within the guest pixel. + a_.OpAnd( + dxbc::Dest::R(resolution_scale_host_pixel_temp, 0b0001), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kXXXX), + dxbc::Src::LU(1)); + a_.OpBFI( + dxbc::Dest::R(resolution_scale_host_pixel_temp, 0b0001), + dxbc::Src::LU(1), dxbc::Src::LU(1), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kYYYY), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kXXXX)); + break; + case 3: + // Guest pixel index. + a_.OpUMul(dxbc::Dest::R(system_temp_rov_params_, 0b1100), + dxbc::Dest::Null(), + dxbc::Src::R(resolution_scale_host_pixel_temp, 0b0100 << 4), + dxbc::Src::LU(draw_util::kDivideScale3)); + a_.OpUShR(dxbc::Dest::R(system_temp_rov_params_, 0b1100), + dxbc::Src::R(system_temp_rov_params_), + dxbc::Src::LU(draw_util::kDivideUpperShift3)); + // Host pixel index. + a_.OpIMAd(dxbc::Dest::R(resolution_scale_host_pixel_temp, 0b0011), + dxbc::Src::R(system_temp_rov_params_, 0b1110), + dxbc::Src::LI(-3), + dxbc::Src::R(resolution_scale_host_pixel_temp)); + a_.OpUMAd( + dxbc::Dest::R(resolution_scale_host_pixel_temp, 0b0001), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kYYYY), + dxbc::Src::LU(3), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kXXXX)); + break; + default: + assert_unhandled_case(draw_resolution_scale_); + } + } else { + // Convert the host pixel position to integer to system_temp_rov_params_.zw. + // system_temp_rov_params_.z = X host pixel position as uint + // system_temp_rov_params_.w = Y host pixel position as uint + in_position_used_ |= 0b0011; + a_.OpFToU(dxbc::Dest::R(system_temp_rov_params_, 0b1100), + dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition), 0b01000000)); + } // Convert the position from pixels to samples. // system_temp_rov_params_.z = X guest sample 0 position // system_temp_rov_params_.w = Y guest sample 0 position @@ -189,13 +231,13 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { (kSysConst_SampleCountLog2_Comp << 4) | ((kSysConst_SampleCountLog2_Comp + 1) << 6))); // Get 80x16 samples tile index - start dividing X by 80 by getting the high - // part of the result of multiplication of X by 0xCCCCCCCD into X. - // system_temp_rov_params_.x = (X * 0xCCCCCCCD) >> 32, or X / 80 * 64 + // part of the result of multiplication of X by kDivideScale5 into X. + // system_temp_rov_params_.x = (X * kDivideScale5) >> 32 // system_temp_rov_params_.z = X guest sample 0 position // system_temp_rov_params_.w = Y guest sample 0 position a_.OpUMul(dxbc::Dest::R(system_temp_rov_params_, 0b0001), dxbc::Dest::Null(), dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kZZZZ), - dxbc::Src::LU(0xCCCCCCCDu)); + dxbc::Src::LU(draw_util::kDivideScale5)); // Get 80x16 samples tile index - finish dividing X by 80 and divide Y by 16 // into system_temp_rov_params_.xy. // system_temp_rov_params_.x = X tile position @@ -204,7 +246,7 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { // system_temp_rov_params_.w = Y guest sample 0 position a_.OpUShR(dxbc::Dest::R(system_temp_rov_params_, 0b0011), dxbc::Src::R(system_temp_rov_params_, 0b00001100), - dxbc::Src::LU(6, 4, 0, 0)); + dxbc::Src::LU(draw_util::kDivideUpperShift5 + 4, 4, 0, 0)); // Get the tile index to system_temp_rov_params_.y. // system_temp_rov_params_.x = X tile position // system_temp_rov_params_.y = tile index @@ -297,38 +339,24 @@ void DxbcShaderTranslator::StartPixelShader_LoadROVParameters() { uint32_t(CbufferRegister::kSystemConstants), kSysConst_EdramDepthBaseDwords_Vec) .Select(kSysConst_EdramDepthBaseDwords_Comp)); - - // Apply the resolution scale. - a_.OpIf(true, dxbc::Src::R(resolution_scale_log2_temp, dxbc::Src::kXXXX)); - // Release resolution_scale_log2_temp. - PopSystemTemp(); - { - dxbc::Dest offsets_dest(dxbc::Dest::R( - system_temp_rov_params_, any_color_targets_written ? 0b0110 : 0b0010)); - // Scale the offsets by the resolution scale. + if (draw_resolution_scale_ > 1) { + assert_true(resolution_scale_host_pixel_temp != UINT32_MAX); + // Apply the resolution scale and the host pixel offset within the guest + // sample. // system_temp_rov_params_.y = scaled 32bpp depth/stencil first host pixel // address // system_temp_rov_params_.z = scaled 32bpp color first host pixel offset if // needed - a_.OpIShL(offsets_dest, dxbc::Src::R(system_temp_rov_params_), - dxbc::Src::LU(2)); - // Add host pixel offsets. - // system_temp_rov_params_.y = scaled 32bpp depth/stencil address - // system_temp_rov_params_.z = scaled 32bpp color offset if needed - in_position_used_ |= 0b0011; - for (uint32_t i = 0; i < 2; ++i) { - // Convert a position component to integer. - a_.OpFToU(dxbc::Dest::R(system_temp_rov_params_, 0b0001), - dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition)).Select(i)); - // Insert the host pixel offset on each axis. - a_.OpBFI(offsets_dest, dxbc::Src::LU(1), dxbc::Src::LU(i), - dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), - dxbc::Src::R(system_temp_rov_params_)); - } + a_.OpUMAd(dxbc::Dest::R(system_temp_rov_params_, + any_color_targets_written ? 0b0110 : 0b0010), + dxbc::Src::R(system_temp_rov_params_), + dxbc::Src::LU(draw_resolution_scale_ * draw_resolution_scale_), + dxbc::Src::R(resolution_scale_host_pixel_temp, dxbc::Src::kXXXX)); + // Release resolution_scale_host_pixel_temp. + PopSystemTemp(); + } else { + assert_true(resolution_scale_host_pixel_temp == UINT32_MAX); } - // Close the resolution scale conditional. - a_.OpEndIf(); - if (any_color_targets_written) { // Get the 64bpp color offset to system_temp_rov_params_.w. // TODO(Triang3l): Find some game that aliases 64bpp with 32bpp to emulate @@ -521,7 +549,7 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { (1ull << kSysConst_EdramPolyOffsetBack_Index); a_.OpMovC( dxbc::Dest::R(temp, 0b1100), - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), dxbc::Src::kXXXX), dxbc::Src::CB(cbuffer_index_system_constants_, uint32_t(CbufferRegister::kSystemConstants), @@ -800,8 +828,9 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // Check the current face to get the reference and apply the read mask. in_front_face_used_ = true; - a_.OpIf(true, dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), - dxbc::Src::kXXXX)); + a_.OpIf(true, dxbc::Src::V( + uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kXXXX)); system_constants_used_ |= 1ull << kSysConst_EdramStencil_Index; for (uint32_t j = 0; j < 2; ++j) { if (j) { @@ -847,11 +876,12 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // sample_temp.y = stencil function and operations in_front_face_used_ = true; system_constants_used_ |= 1ull << kSysConst_EdramStencil_Index; - a_.OpMovC(sample_temp_y_dest, - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), - dxbc::Src::kXXXX), - stencil_front_src.Select(kSysConst_EdramStencil_FuncOps_Comp), - stencil_back_src.Select(kSysConst_EdramStencil_FuncOps_Comp)); + a_.OpMovC( + sample_temp_y_dest, + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kXXXX), + stencil_front_src.Select(kSysConst_EdramStencil_FuncOps_Comp), + stencil_back_src.Select(kSysConst_EdramStencil_FuncOps_Comp)); // Mask the resulting bits with the ones that should pass (the comparison // function is in the low 3 bits of the constant, and only ANDing 3-bit // values with it, so safe not to UBFE the function). @@ -915,7 +945,7 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { system_constants_used_ |= 1ull << kSysConst_EdramStencil_Index; a_.OpMovC( sample_temp_x_dest, - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), dxbc::Src::kXXXX), stencil_front_src.Select(kSysConst_EdramStencil_Reference_Comp), stencil_back_src.Select(kSysConst_EdramStencil_Reference_Comp)); @@ -968,11 +998,12 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // sample_temp.y = stencil write mask in_front_face_used_ = true; system_constants_used_ |= 1ull << kSysConst_EdramStencil_Index; - a_.OpMovC(sample_temp_y_dest, - dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFace), - dxbc::Src::kXXXX), - stencil_front_src.Select(kSysConst_EdramStencil_WriteMask_Comp), - stencil_back_src.Select(kSysConst_EdramStencil_WriteMask_Comp)); + a_.OpMovC( + sample_temp_y_dest, + dxbc::Src::V(uint32_t(InOutRegister::kPSInFrontFaceAndSampleIndex), + dxbc::Src::kXXXX), + stencil_front_src.Select(kSysConst_EdramStencil_WriteMask_Comp), + stencil_back_src.Select(kSysConst_EdramStencil_WriteMask_Comp)); // Apply the write mask to the new stencil, also dropping the upper 24 // bits. // sample_temp.x = masked new stencil @@ -1090,15 +1121,11 @@ void DxbcShaderTranslator::ROV_DepthStencilTest() { // Go to the next sample (samples are at +0, +80, +1, +81, so need to do // +80, -79, +80 and -81 after each sample). - system_constants_used_ |= 1ull - << kSysConst_EdramResolutionSquareScale_Index; - a_.OpIMAd(dxbc::Dest::R(system_temp_rov_params_, 0b0010), - dxbc::Src::LI((i & 1) ? -78 - i : 80), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY)); + a_.OpIAdd(dxbc::Dest::R(system_temp_rov_params_, 0b0010), + dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), + dxbc::Src::LI(((i & 1) ? -78 - i : 80) * + (int32_t(draw_resolution_scale_) * + int32_t(draw_resolution_scale_)))); } if (ROV_IsDepthStencilEarly()) { @@ -1243,56 +1270,9 @@ void DxbcShaderTranslator::ROV_UnpackColor( // packed color which shouldn't be touched until G and B are converted if // packed_temp and color_temp are the same. for (int32_t i = 2; i >= 0; --i) { - dxbc::Dest color_component_dest(dxbc::Dest::R(color_temp, 1 << i)); - dxbc::Src color_component_src(dxbc::Src::R(color_temp).Select(i)); - // Unpack the exponent to the temp. - a_.OpUBFE(temp1_dest, dxbc::Src::LU(3), dxbc::Src::LU(i * 10 + 7), - packed_temp_low); - // Unpack the mantissa to the result. - a_.OpUBFE(color_component_dest, dxbc::Src::LU(7), dxbc::Src::LU(i * 10), - packed_temp_low); - // Check if the number is denormalized. - a_.OpIf(false, temp1_src); - { - // Check if the number is non-zero (if the mantissa isn't zero - the - // exponent is known to be zero at this point). - a_.OpIf(true, color_component_src); - { - // Normalize the mantissa. - // Note that HLSL firstbithigh(x) is compiled to DXBC like: - // `x ? 31 - firstbit_hi(x) : -1` - // (returns the index from the LSB, not the MSB, but -1 for zero too). - // temp = firstbit_hi(mantissa) - a_.OpFirstBitHi(temp1_dest, color_component_src); - // temp = 7 - (31 - firstbit_hi(mantissa)) - // Or, if expanded: - // temp = firstbit_hi(mantissa) - 24 - a_.OpIAdd(temp1_dest, temp1_src, dxbc::Src::LI(-24)); - // mantissa = mantissa << (7 - firstbithigh(mantissa)) - // AND 0x7F not needed after this - BFI will do it. - a_.OpIShL(color_component_dest, color_component_src, temp1_src); - // Get the normalized exponent. - // exponent = 1 - (7 - firstbithigh(mantissa)) - a_.OpIAdd(temp1_dest, dxbc::Src::LI(1), -temp1_src); - } - // The number is zero. - a_.OpElse(); - { - // Set the unbiased exponent to -124 for zero - 124 will be added - // later, resulting in zero float32. - a_.OpMov(temp1_dest, dxbc::Src::LI(-124)); - } - // Close the non-zero check. - a_.OpEndIf(); - } - // Close the denormal check. - a_.OpEndIf(); - // Bias the exponent and move it to the correct location in f32. - a_.OpIMAd(temp1_dest, temp1_src, dxbc::Src::LI(1 << 23), - dxbc::Src::LI(124 << 23)); - // Combine the mantissa and the exponent. - a_.OpBFI(color_component_dest, dxbc::Src::LU(7), dxbc::Src::LU(16), - color_component_src, temp1_src); + Float7e3To32(a_, dxbc::Dest::R(color_temp, 1 << i), packed_temp, + packed_temp_components, i * 10, color_temp, i, temp1, + temp1_component); } } a_.OpBreak(); @@ -1443,54 +1423,17 @@ void DxbcShaderTranslator::ROV_PackPreClampedColor( a_.OpCase(dxbc::Src::LU(ROV_AddColorFormatFlags( xenos::ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16))); { - for (uint32_t i = 0; i < 3; ++i) { - dxbc::Src color_component_src(dxbc::Src::R(color_temp).Select(i)); - // Check if the number is too small to be represented as normalized 7e3. - // temp2 = f32 < 2^-2 - a_.OpULT(temp2_dest, color_component_src, dxbc::Src::LU(0x3E800000)); - // Handle denormalized numbers separately. - a_.OpIf(true, temp2_src); - { - // temp2 = f32 >> 23 - a_.OpUShR(temp2_dest, color_component_src, dxbc::Src::LU(23)); - // temp2 = 125 - (f32 >> 23) - a_.OpIAdd(temp2_dest, dxbc::Src::LI(125), -temp2_src); - // Don't allow the shift to overflow, since in DXBC the lower 5 bits of - // the shift amount are used. - // temp2 = min(125 - (f32 >> 23), 24) - a_.OpUMin(temp2_dest, temp2_src, dxbc::Src::LU(24)); - // biased_f32 = (f32 & 0x7FFFFF) | 0x800000 - a_.OpBFI(temp1_dest, dxbc::Src::LU(9), dxbc::Src::LU(23), - dxbc::Src::LU(1), color_component_src); - // biased_f32 = - // ((f32 & 0x7FFFFF) | 0x800000) >> min(125 - (f32 >> 23), 24) - a_.OpUShR(temp1_dest, temp1_src, temp2_src); - } - // Not denormalized? - a_.OpElse(); - { - // Bias the exponent. - // biased_f32 = f32 + (-124 << 23) - // (left shift of a negative value is undefined behavior) - a_.OpIAdd(temp1_dest, color_component_src, dxbc::Src::LU(0xC2000000u)); - } - // Close the denormal check. - a_.OpEndIf(); - // Build the 7e3 number. - // temp2 = (biased_f32 >> 16) & 1 - a_.OpUBFE(temp2_dest, dxbc::Src::LU(1), dxbc::Src::LU(16), temp1_src); - // f10 = biased_f32 + 0x7FFF - a_.OpIAdd(temp1_dest, temp1_src, dxbc::Src::LU(0x7FFF)); - // f10 = biased_f32 + 0x7FFF + ((biased_f32 >> 16) & 1) - a_.OpIAdd(temp1_dest, temp1_src, temp2_src); - // f10 = ((biased_f32 + 0x7FFF + ((biased_f32 >> 16) & 1)) >> 16) & 0x3FF - a_.OpUBFE(i ? temp1_dest : packed_dest_low, dxbc::Src::LU(10), - dxbc::Src::LU(16), temp1_src); - // Pack the upper components. - if (i) { - a_.OpBFI(packed_dest_low, dxbc::Src::LU(10), dxbc::Src::LU(i * 10), - temp1_src, packed_src_low); - } + // Convert red directly to the destination, which may be the same as the + // source, but PreClampedFloat32To7e3 allows that. + PreClampedFloat32To7e3(a_, packed_temp, packed_temp_components, color_temp, + 0, temp1, temp1_component); + for (uint32_t i = 1; i < 3; ++i) { + // Convert green and blue to a temporary register and insert them into the + // result. + PreClampedFloat32To7e3(a_, temp1, temp1_component, color_temp, i, temp2, + temp2_component); + a_.OpBFI(packed_dest_low, dxbc::Src::LU(10), dxbc::Src::LU(i * 10), + temp1_src, packed_src_low); } // Denormalize the alpha and convert it to fixed-point. a_.OpMAd(temp1_dest, dxbc::Src::R(color_temp, dxbc::Src::kWWWW), @@ -1744,137 +1687,6 @@ void DxbcShaderTranslator::ROV_HandleAlphaBlendFactorCases( a_.OpBreak(); } -void DxbcShaderTranslator::CompletePixelShader_WriteToRTVs_AlphaToMask() { - // Check if alpha to coverage can be done at all in this shader. - if (!current_shader().writes_color_target(0)) { - return; - } - - // Check if alpha to coverage is enabled. - system_constants_used_ |= 1ull << kSysConst_AlphaToMask_Index; - a_.OpIf(true, dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_AlphaToMask_Vec) - .Select(kSysConst_AlphaToMask_Comp)); - - uint32_t temp = PushSystemTemp(); - dxbc::Dest temp_x_dest(dxbc::Dest::R(temp, 0b0001)); - dxbc::Src temp_x_src(dxbc::Src::R(temp, dxbc::Src::kXXXX)); - dxbc::Dest temp_y_dest(dxbc::Dest::R(temp, 0b0010)); - dxbc::Src temp_y_src(dxbc::Src::R(temp, dxbc::Src::kYYYY)); - dxbc::Dest temp_z_dest(dxbc::Dest::R(temp, 0b0100)); - dxbc::Src temp_z_src(dxbc::Src::R(temp, dxbc::Src::kZZZZ)); - - // Convert SSAA sample position to integer to temp.xy (not caring about the - // resolution scale because it's not supported anywhere on the RTV output - // path). - in_position_used_ |= 0b0011; - a_.OpFToU(dxbc::Dest::R(temp, 0b0011), - dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition))); - - // Check if SSAA is enabled. - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpIf(true, dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec) - .Select(kSysConst_SampleCountLog2_Comp + 1)); - { - // Check if SSAA is 4x or 2x. - system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; - a_.OpIf(true, dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_SampleCountLog2_Vec) - .Select(kSysConst_SampleCountLog2_Comp)); - { - // 4x SSAA. - // Build the sample index in temp.z where X is the low bit and Y is the - // high bit, for calculation of the dithering base according to the sample - // position (left/right and top/bottom). - a_.OpAnd(temp_z_dest, temp_y_src, dxbc::Src::LU(1)); - a_.OpBFI(temp_z_dest, dxbc::Src::LU(31), dxbc::Src::LU(1), temp_z_src, - temp_x_src); - // Top-left sample base: 0.75. - // Top-right sample base: 0.5. - // Bottom-left sample base: 0.25. - // Bottom-right sample base: 1.0. - // The threshold would be 1 - frac(0.25 + 0.25 * (x | (y << 1))) - offset. - // Multiplication here will result in exactly 1 (power of 2 multiplied by - // an integer). - // Calculate the base. - a_.OpUToF(temp_z_dest, temp_z_src); - a_.OpMAd(temp_z_dest, temp_z_src, dxbc::Src::LF(0.25f), - dxbc::Src::LF(0.25f)); - a_.OpFrc(temp_z_dest, temp_z_src); - a_.OpAdd(temp_z_dest, dxbc::Src::LF(1.0f), -temp_z_src); - // Get the dithering threshold offset index for the guest pixel to temp.x, - // Y - low bit of offset index, X - high bit. - a_.OpUBFE(dxbc::Dest::R(temp, 0b0011), dxbc::Src::LU(1), dxbc::Src::LU(1), - dxbc::Src::R(temp)); - a_.OpBFI(temp_x_dest, dxbc::Src::LU(1), dxbc::Src::LU(1), temp_x_src, - temp_y_src); - // Write the offset scale to temp.y. - a_.OpMov(temp_y_dest, dxbc::Src::LF(-1.0f / 16.0f)); - } - a_.OpElse(); - { - // 2x SSAA. - // Check if the top (base 0.5) or the bottom (base 1.0) sample to temp.z, - // and also extract the guest pixel Y parity to temp.y. - a_.OpUBFE(dxbc::Dest::R(temp, 0b0110), dxbc::Src::LU(1), - dxbc::Src::LU(0, 1, 0, 0), temp_y_src); - a_.OpMovC(temp_z_dest, temp_z_src, dxbc::Src::LF(1.0f), - dxbc::Src::LF(0.5f)); - // Get the dithering threshold offset index for the guest pixel to temp.x, - // Y - low bit of offset index, X - high bit. - a_.OpBFI(temp_x_dest, dxbc::Src::LU(1), dxbc::Src::LU(1), temp_x_src, - temp_y_src); - // Write the offset scale to temp.y. - a_.OpMov(temp_y_dest, dxbc::Src::LF(-1.0f / 8.0f)); - } - // Close the 4x check. - a_.OpEndIf(); - } - // SSAA is disabled. - a_.OpElse(); - { - // Write the base 1.0 to temp.z. - a_.OpMov(temp_z_dest, dxbc::Src::LF(1.0f)); - // Get the dithering threshold offset index for the guest pixel to temp.x, - // Y - low bit of offset index, X - high bit. - a_.OpAnd(temp_y_dest, temp_y_src, dxbc::Src::LU(1)); - a_.OpBFI(temp_x_dest, dxbc::Src::LU(1), dxbc::Src::LU(1), temp_x_src, - temp_y_src); - // Write the offset scale to temp.y. - a_.OpMov(temp_y_dest, dxbc::Src::LF(-1.0f / 4.0f)); - } - // Close the 2x/4x check. - a_.OpEndIf(); - - // Extract the dithering offset to temp.x for the quad pixel index. - a_.OpIShL(temp_x_dest, temp_x_src, dxbc::Src::LU(1)); - system_constants_used_ |= 1ull << kSysConst_AlphaToMask_Index; - a_.OpUBFE(temp_x_dest, dxbc::Src::LU(2), temp_x_src, - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_AlphaToMask_Vec) - .Select(kSysConst_AlphaToMask_Comp)); - a_.OpUToF(temp_x_dest, temp_x_src); - // Combine the base and the offset to temp.x. - a_.OpMAd(temp_x_dest, temp_x_src, temp_y_src, temp_z_src); - // Check if alpha of oC0 is at or greater than the threshold (handling NaN - // according to the Direct3D 11.3 functional specification, as not covered). - a_.OpGE(temp_x_dest, dxbc::Src::R(system_temps_color_[0], dxbc::Src::kWWWW), - temp_x_src); - // Discard the SSAA sample if it's not covered. - a_.OpDiscard(false, temp_x_src); - - // Release temp. - PopSystemTemp(); - - // Close the alpha to coverage check. - a_.OpEndIf(); -} - void DxbcShaderTranslator::CompletePixelShader_WriteToRTVs() { uint32_t shader_writes_color_targets = current_shader().writes_color_targets(); @@ -1882,9 +1694,6 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToRTVs() { return; } - // Check if this sample needs to be discarded by alpha to coverage. - CompletePixelShader_WriteToRTVs_AlphaToMask(); - uint32_t gamma_temp = PushSystemTemp(); for (uint32_t i = 0; i < 4; ++i) { if (!(shader_writes_color_targets & (1 << i))) { @@ -1899,89 +1708,78 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToRTVs() { uint32_t(CbufferRegister::kSystemConstants), kSysConst_ColorExpBias_Vec) .Select(i)); - // Convert to gamma space - this is incorrect, since it must be done after - // blending on the Xbox 360, but this is just one of many blending issues in - // the RTV path. - system_constants_used_ |= 1ull << kSysConst_Flags_Index; - a_.OpAnd(dxbc::Dest::R(gamma_temp, 0b0001), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_Flags_Vec) - .Select(kSysConst_Flags_Comp), - dxbc::Src::LU(kSysFlag_Color0Gamma << i)); - a_.OpIf(true, dxbc::Src::R(gamma_temp, dxbc::Src::kXXXX)); - for (uint32_t j = 0; j < 3; ++j) { - ConvertPWLGamma(true, system_temps_color_[i], j, system_temps_color_[i], - j, gamma_temp, 0, gamma_temp, 1); + if (!gamma_render_target_as_srgb_) { + // Convert to gamma space - this is incorrect, since it must be done after + // blending on the Xbox 360, but this is just one of many blending issues + // in the RTV path. + system_constants_used_ |= 1ull << kSysConst_Flags_Index; + a_.OpAnd(dxbc::Dest::R(gamma_temp, 0b0001), + dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + kSysConst_Flags_Vec) + .Select(kSysConst_Flags_Comp), + dxbc::Src::LU(kSysFlag_ConvertColor0ToGamma << i)); + a_.OpIf(true, dxbc::Src::R(gamma_temp, dxbc::Src::kXXXX)); + for (uint32_t j = 0; j < 3; ++j) { + ConvertPWLGamma(true, system_temps_color_[i], j, system_temps_color_[i], + j, gamma_temp, 0, gamma_temp, 1); + } + a_.OpEndIf(); } - a_.OpEndIf(); + // Copy the color from a readable temp register to an output register. + a_.OpMov(dxbc::Dest::O(i), dxbc::Src::R(system_temps_color_[i])); } // Release gamma_temp. PopSystemTemp(); - - // Remap guest render target indices to host since because on the host, the - // indices of the bound render targets are consecutive. This is done using 16 - // movc instructions because indexable temps are known to be causing - // performance issues on some Nvidia GPUs. In the map, the components are host - // render target indices, and the values are the guest ones. - uint32_t remap_movc_mask_temp = PushSystemTemp(); - uint32_t remap_movc_target_temp = PushSystemTemp(); - system_constants_used_ |= 1ull << kSysConst_ColorOutputMap_Index; - // Host RT i, guest RT j. - for (uint32_t i = 0; i < 4; ++i) { - // mask = map.iiii == (0, 1, 2, 3) - a_.OpIEq(dxbc::Dest::R(remap_movc_mask_temp, shader_writes_color_targets), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_ColorOutputMap_Vec) - .Select(i), - dxbc::Src::LU(0, 1, 2, 3)); - bool guest_rt_first = true; - for (uint32_t j = 0; j < 4; ++j) { - // If map.i == j, move guest color j to the temporary host color. - if (!(shader_writes_color_targets & (1 << j))) { - continue; - } - a_.OpMovC(dxbc::Dest::R(remap_movc_target_temp), - dxbc::Src::R(remap_movc_mask_temp).Select(j), - dxbc::Src::R(system_temps_color_[j]), - guest_rt_first ? dxbc::Src::LF(0.0f) - : dxbc::Src::R(remap_movc_target_temp)); - guest_rt_first = false; - } - // Write the remapped color to host render target i. - a_.OpMov(dxbc::Dest::O(i), dxbc::Src::R(remap_movc_target_temp)); - } - // Release remap_movc_mask_temp and remap_movc_target_temp. - PopSystemTemp(2); } void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { + bool shader_writes_depth = current_shader().writes_depth(); + if (!DSV_IsWritingFloat24Depth()) { + if (shader_writes_depth) { + // If not converting, but the shader writes depth explicitly, for float24, + // need to scale it from guest 0...1 to host 0...0.5 to support + // reinterpretation round trips as viewport scaling doesn't apply to + // oDepth. + system_constants_used_ |= 1ull << kSysConst_Flags_Index; + a_.OpAnd(dxbc::Dest::R(system_temp_depth_stencil_, 0b0010), + dxbc::Src::CB(cbuffer_index_system_constants_, + uint32_t(CbufferRegister::kSystemConstants), + kSysConst_Flags_Vec) + .Select(kSysConst_Flags_Comp), + dxbc::Src::LU(kSysFlag_DepthFloat24)); + a_.OpIf(true, dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kYYYY)); + a_.OpMul(dxbc::Dest::R(system_temp_depth_stencil_, 0b0001), + dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kXXXX), + dxbc::Src::LF(0.5f)); + a_.OpEndIf(); + // Write the depth from the temporary to the system depth output. + a_.OpMov(dxbc::Dest::ODepth(), + dxbc::Src::R(system_temp_depth_stencil_, dxbc::Src::kXXXX)); + } return; } - bool shader_writes_depth = current_shader().writes_depth(); - uint32_t temp; if (shader_writes_depth) { // The depth is already written to system_temp_depth_stencil_.x and clamped // to 0...1 with NaNs dropped (saturating in StoreResult); yzw are free. temp = system_temp_depth_stencil_; } else { - // Need a temporary variable; copy the sample's depth input to it and - // saturate it (in Direct3D 11, depth is clamped to the viewport bounds - // after the pixel shader, and SV_Position.z contains the unclamped depth, - // which may be outside the viewport's depth range if it's biased); though - // it will be clamped to the viewport bounds anyway, but to be able to make - // the assumption of it being clamped while working with the bit - // representation. + // Need a temporary variable; remap the sample's depth input from host + // 0...0.5 back to guest 0...1 for conversion purposes to it and saturate it + // (in Direct3D 11, depth is clamped to the viewport bounds after the pixel + // shader, and SV_Position.z contains the unclamped depth, which may be + // outside the viewport's depth range if it's biased); though it will be + // clamped to the viewport bounds anyway, but to be able to make the + // assumption of it being clamped while working with the bit representation. temp = PushSystemTemp(); in_position_used_ |= 0b0100; - a_.OpMov( + a_.OpMul( dxbc::Dest::R(temp, 0b0001), dxbc::Src::V(uint32_t(InOutRegister::kPSInPosition), dxbc::Src::kZZZZ), - true); + dxbc::Src::LF(2.0f), true); } dxbc::Dest temp_x_dest(dxbc::Dest::R(temp, 0b0001)); @@ -1989,7 +1787,7 @@ void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { dxbc::Dest temp_y_dest(dxbc::Dest::R(temp, 0b0010)); dxbc::Src temp_y_src(dxbc::Src::R(temp, dxbc::Src::kYYYY)); - if (GetDxbcShaderModification().depth_stencil_mode == + if (GetDxbcShaderModification().pixel.depth_stencil_mode == Modification::DepthStencilMode::kFloat24Truncating) { // Simplified conversion, always less than or equal to the original value - // just drop the lower bits. @@ -2023,8 +1821,11 @@ void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { // temp.y = 23 at exponent -34. a_.OpIMax(temp_y_dest, temp_y_src, dxbc::Src::LI(3)); // Truncate the mantissa - fill the low bits with zeros. - a_.OpBFI(truncate_dest, temp_y_src, dxbc::Src::LU(0), dxbc::Src::LU(0), + // temp.x = result in 0...1 range + a_.OpBFI(temp_x_dest, temp_y_src, dxbc::Src::LU(0), dxbc::Src::LU(0), temp_x_src); + // Remap from guest 0...1 to host 0...0.5. + a_.OpMul(truncate_dest, temp_x_src, dxbc::Src::LF(0.5f)); } // The number is not representable as float24 after truncation - zero. a_.OpElse(); @@ -2032,57 +1833,10 @@ void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { // Close the non-zero result check. a_.OpEndIf(); } else { - // Properly convert to 20e4, with rounding to the nearest even. - PreClampedDepthTo20e4(temp, 0, temp, 0, temp, 1); - // Convert back to float32. - // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp - // Unpack the exponent to temp.y. - a_.OpUShR(temp_y_dest, temp_x_src, dxbc::Src::LU(20)); - // Unpack the mantissa to temp.x. - a_.OpAnd(temp_x_dest, temp_x_src, dxbc::Src::LU(0xFFFFF)); - // Check if the number is denormalized. - a_.OpIf(false, temp_y_src); - { - // Check if the number is non-zero (if the mantissa isn't zero - the - // exponent is known to be zero at this point). - a_.OpIf(true, temp_x_src); - { - // Normalize the mantissa. - // Note that HLSL firstbithigh(x) is compiled to DXBC like: - // `x ? 31 - firstbit_hi(x) : -1` - // (returns the index from the LSB, not the MSB, but -1 for zero too). - // temp.y = firstbit_hi(mantissa) - a_.OpFirstBitHi(temp_y_dest, temp_x_src); - // temp.y = 20 - firstbithigh(mantissa) - // Or: - // temp.y = 20 - (31 - firstbit_hi(mantissa)) - a_.OpIAdd(temp_y_dest, temp_y_src, dxbc::Src::LI(20 - 31)); - // mantissa = mantissa << (20 - firstbithigh(mantissa)) - // AND 0xFFFFF not needed after this - BFI will do it. - a_.OpIShL(temp_x_dest, temp_x_src, temp_y_src); - // Get the normalized exponent. - // exponent = 1 - (20 - firstbithigh(mantissa)) - a_.OpIAdd(temp_y_dest, dxbc::Src::LI(1), -temp_y_src); - } - // The number is zero. - a_.OpElse(); - { - // Set the unbiased exponent to -112 for zero - 112 will be added later, - // resulting in zero float32. - a_.OpMov(temp_y_dest, dxbc::Src::LI(-112)); - } - // Close the non-zero check. - a_.OpEndIf(); - } - // Close the denormal check. - a_.OpEndIf(); - // Bias the exponent and move it to the correct location in float32 to - // temp.y. - a_.OpIMAd(temp_y_dest, temp_y_src, dxbc::Src::LI(1 << 23), - dxbc::Src::LI(112 << 23)); - // Combine the mantissa and the exponent into the result. - a_.OpBFI(dxbc::Dest::ODepth(), dxbc::Src::LU(20), dxbc::Src::LU(3), - temp_x_src, temp_y_src); + // Properly convert to 20e4, with rounding to the nearest even (the bias was + // pre-applied by multiplying by 2), then convert back restoring the bias. + PreClampedDepthTo20e4(a_, temp, 0, temp, 0, temp, 1, false); + Depth20e4To32(a_, dxbc::Dest::ODepth(), temp, 0, 0, temp, 0, temp, 1, true); } if (!shader_writes_depth) { @@ -2091,9 +1845,10 @@ void DxbcShaderTranslator::CompletePixelShader_DSV_DepthTo24Bit() { } } -void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMaskSample( +void DxbcShaderTranslator::CompletePixelShader_AlphaToMaskSample( uint32_t sample_index, float threshold_base, dxbc::Src threshold_offset, - float threshold_offset_scale, uint32_t temp, uint32_t temp_component) { + float threshold_offset_scale, uint32_t coverage_temp, + uint32_t coverage_temp_component, uint32_t temp, uint32_t temp_component) { dxbc::Dest temp_dest(dxbc::Dest::R(temp, 1 << temp_component)); dxbc::Src temp_src(dxbc::Src::R(temp).Select(temp_component)); // Calculate the threshold. @@ -2103,22 +1858,50 @@ void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMaskSample( // according to the Direct3D 11.3 functional specification, as not covered). a_.OpGE(temp_dest, dxbc::Src::R(system_temps_color_[0], dxbc::Src::kWWWW), temp_src); - // Keep all bits in system_temp_rov_params_.x but the ones that need to be - // removed in case of failure (coverage and deferred depth/stencil write are - // removed). - a_.OpOr(temp_dest, temp_src, - dxbc::Src::LU(~(uint32_t(0b00010001) << sample_index))); - // Clear the coverage for samples that have failed the test. - a_.OpAnd(dxbc::Dest::R(system_temp_rov_params_, 0b0001), - dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), temp_src); + dxbc::Dest coverage_dest( + dxbc::Dest::R(coverage_temp, 1 << coverage_temp_component)); + dxbc::Src coverage_src( + dxbc::Src::R(coverage_temp).Select(coverage_temp_component)); + if (edram_rov_used_) { + assert_true(coverage_temp != temp || + coverage_temp_component != temp_component); + // Keep all bits in but the ones that need to be removed in case of failure. + // For ROV, the test must effect not only the coverage bits, but also the + // deferred depth/stencil write bits since the coverage is zeroed for + // samples that have failed the depth/stencil test, but stencil may still + // require writing - but if the sample is discarded by alpha to coverage, it + // must not be written at all. + a_.OpOr(temp_dest, temp_src, + dxbc::Src::LU(~(uint32_t(0b00010001) << sample_index))); + // Clear the coverage for samples that have failed the test. + a_.OpAnd(coverage_dest, coverage_src, temp_src); + } else { + if (sample_index) { + // Not first sample - add. + a_.OpAnd(temp_dest, temp_src, dxbc::Src::LU(uint32_t(1) << sample_index)); + a_.OpOr(coverage_dest, coverage_src, temp_src); + } else { + // First sample - initialize. + assert_true(coverage_temp != temp || + coverage_temp_component != temp_component); + a_.OpAnd(coverage_dest, temp_src, + dxbc::Src::LU(uint32_t(1) << sample_index)); + } + } } -void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMask() { +void DxbcShaderTranslator::CompletePixelShader_AlphaToMask() { // Check if alpha to coverage can be done at all in this shader. if (!current_shader().writes_color_target(0)) { return; } + if (!edram_rov_used_) { + // Initialize the output coverage for the case if alpha to mask is not + // enabled - it needs to be written on every execution path. + a_.OpMov(dxbc::Dest::OMask(), dxbc::Src::LU(UINT32_MAX)); + } + // Check if alpha to coverage is enabled. system_constants_used_ |= 1ull << kSysConst_AlphaToMask_Index; a_.OpIf(true, dxbc::Src::CB(cbuffer_index_system_constants_, @@ -2151,11 +1934,11 @@ void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMask() { .Select(kSysConst_AlphaToMask_Comp)); a_.OpUToF(temp_x_dest, temp_x_src); - // The test must effect not only the coverage bits, but also the deferred - // depth/stencil write bits since the coverage is zeroed for samples that have - // failed the depth/stencil test, but stencil may still require writing - but - // if the sample is discarded by alpha to coverage, it must not be written at - // all. + // Write the result to temp.z for RTV or to system_temp_rov_params_.x for ROV. + // temp.x = alpha to coverage offset as float 0.0...3.0. + // temp.z = without ROV, accumulated coverage. + uint32_t coverage_temp = edram_rov_used_ ? system_temp_rov_params_ : temp; + uint32_t coverage_temp_component = edram_rov_used_ ? 0 : 2; // Check if MSAA is enabled. system_constants_used_ |= 1ull << kSysConst_SampleCountLog2_Index; @@ -2171,37 +1954,58 @@ void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMask() { kSysConst_SampleCountLog2_Vec) .Select(kSysConst_SampleCountLog2_Comp)); // 4x MSAA. - CompletePixelShader_ROV_AlphaToMaskSample(0, 0.75f, temp_x_src, - 1.0f / 16.0f, temp, 1); - CompletePixelShader_ROV_AlphaToMaskSample(1, 0.25f, temp_x_src, - 1.0f / 16.0f, temp, 1); - CompletePixelShader_ROV_AlphaToMaskSample(2, 0.5f, temp_x_src, 1.0f / 16.0f, - temp, 1); - CompletePixelShader_ROV_AlphaToMaskSample(3, 1.0f, temp_x_src, 1.0f / 16.0f, - temp, 1); - // 2x MSAA. + // Sample 0 must be checked first - CompletePixelShader_AlphaToMaskSample + // initializes the result for sample index 0. + CompletePixelShader_AlphaToMaskSample(0, 0.75f, temp_x_src, 1.0f / 16.0f, + coverage_temp, + coverage_temp_component, temp, 1); + CompletePixelShader_AlphaToMaskSample(1, 0.25f, temp_x_src, 1.0f / 16.0f, + coverage_temp, + coverage_temp_component, temp, 1); + CompletePixelShader_AlphaToMaskSample(2, 0.5f, temp_x_src, 1.0f / 16.0f, + coverage_temp, + coverage_temp_component, temp, 1); + CompletePixelShader_AlphaToMaskSample(3, 1.0f, temp_x_src, 1.0f / 16.0f, + coverage_temp, + coverage_temp_component, temp, 1); + // 2x MSAA (as 2x or samples 0 and 3 of 4x). a_.OpElse(); - CompletePixelShader_ROV_AlphaToMaskSample(0, 0.5f, temp_x_src, 1.0f / 8.0f, - temp, 1); - CompletePixelShader_ROV_AlphaToMaskSample(1, 1.0f, temp_x_src, 1.0f / 8.0f, - temp, 1); + CompletePixelShader_AlphaToMaskSample(0, 0.5f, temp_x_src, 1.0f / 8.0f, + coverage_temp, + coverage_temp_component, temp, 1); + CompletePixelShader_AlphaToMaskSample( + (!edram_rov_used_ && !msaa_2x_supported_) ? 3 : 1, 1.0f, temp_x_src, + 1.0f / 8.0f, coverage_temp, coverage_temp_component, temp, 1); // Close the 4x check. a_.OpEndIf(); } // MSAA is disabled. a_.OpElse(); - CompletePixelShader_ROV_AlphaToMaskSample(0, 1.0f, temp_x_src, 1.0f / 4.0f, - temp, 1); + CompletePixelShader_AlphaToMaskSample(0, 1.0f, temp_x_src, 1.0f / 4.0f, + coverage_temp, coverage_temp_component, + temp, 1); // Close the 2x/4x check. a_.OpEndIf(); - // Check if any sample is still covered (the mask includes both 0:3 and 4:7 - // parts because there may be samples which passed alpha to coverage, but not - // stencil test, and the stencil buffer needs to be modified - in this case, - // samples would be dropped in 0:3, but not in 4:7). - a_.OpAnd(temp_x_dest, dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), - dxbc::Src::LU(0b11111111)); - a_.OpRetC(false, temp_x_src); + // Check if any sample is still covered and return to avoid unneeded work (the + // driver's shader compiler may place return after a discard, but it will + // likely not place one during SV_Coverage assignment - that's what the AMD + // compiler does, at least). Then, if needed, write the coverage value. + if (edram_rov_used_) { + // The mask includes both 0:3 and 4:7 parts because there may be samples + // which passed alpha to coverage, but not stencil test, and the stencil + // buffer needs to be modified - in this case, samples would be dropped in + // 0:3, but not in 4:7). + a_.OpAnd(temp_x_dest, + dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kXXXX), + dxbc::Src::LU(0b11111111)); + a_.OpRetC(false, temp_x_src); + } else { + dxbc::Src coverage_src( + dxbc::Src::R(coverage_temp, coverage_temp_component)); + a_.OpDiscard(false, coverage_src); + a_.OpMov(dxbc::Dest::OMask(), coverage_src); + } // Release temp. PopSystemTemp(); @@ -2211,9 +2015,6 @@ void DxbcShaderTranslator::CompletePixelShader_ROV_AlphaToMask() { } void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { - // Discard samples with alpha to coverage. - CompletePixelShader_ROV_AlphaToMask(); - uint32_t temp = PushSystemTemp(); dxbc::Dest temp_x_dest(dxbc::Dest::R(temp, 0b0001)); dxbc::Src temp_x_src(dxbc::Src::R(temp, dxbc::Src::kXXXX)); @@ -2224,6 +2025,9 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { dxbc::Dest temp_w_dest(dxbc::Dest::R(temp, 0b1000)); dxbc::Src temp_w_src(dxbc::Src::R(temp, dxbc::Src::kWWWW)); + uint32_t resolution_scale_square = + draw_resolution_scale_ * draw_resolution_scale_; + // Do late depth/stencil test (which includes writing) if needed or deferred // depth writing. if (ROV_IsDepthStencilEarly()) { @@ -2252,15 +2056,10 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { // Go to the next sample (samples are at +0, +80, +1, +81, so need to do // +80, -79, +80 and -81 after each sample). if (i < 3) { - system_constants_used_ |= 1ull - << kSysConst_EdramResolutionSquareScale_Index; - a_.OpIMAd(dxbc::Dest::R(system_temp_rov_params_, 0b0010), - dxbc::Src::LI((i & 1) ? -78 - i : 80), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY)); + a_.OpIAdd( + dxbc::Dest::R(system_temp_rov_params_, 0b0010), + dxbc::Src::R(system_temp_rov_params_, dxbc::Src::kYYYY), + dxbc::Src::LI(((i & 1) ? -78 - i : 80) * resolution_scale_square)); } } } else { @@ -3134,16 +2933,12 @@ void DxbcShaderTranslator::CompletePixelShader_WriteToROV() { // Go to the next sample (samples are at +0, +80, +1, +81, so need to do // +80, -79, +80 and -81 after each sample). - system_constants_used_ |= 1ull - << kSysConst_EdramResolutionSquareScale_Index; - a_.OpIMAd(dxbc::Dest::R(system_temp_rov_params_, 0b1100), - dxbc::Src::LI(0, 0, (j & 1) ? -78 - j : 80, - ((j & 1) ? -78 - j : 80) * 2), - dxbc::Src::CB(cbuffer_index_system_constants_, - uint32_t(CbufferRegister::kSystemConstants), - kSysConst_EdramResolutionSquareScale_Vec) - .Select(kSysConst_EdramResolutionSquareScale_Comp), - dxbc::Src::R(system_temp_rov_params_)); + int32_t next_sample_distance = + ((j & 1) ? -78 - j : 80) * int32_t(resolution_scale_square); + a_.OpIAdd( + dxbc::Dest::R(system_temp_rov_params_, 0b1100), + dxbc::Src::R(system_temp_rov_params_), + dxbc::Src::LI(0, 0, next_sample_distance, next_sample_distance * 2)); } // Revert adding the EDRAM bases of the render target to @@ -3241,6 +3036,9 @@ void DxbcShaderTranslator::CompletePixelShader() { PopSystemTemp(); } + // Discard samples with alpha to coverage. + CompletePixelShader_AlphaToMask(); + // Write the values to the render targets. Not applying the exponent bias yet // because the original 0 to 1 alpha value is needed for alpha to coverage, // which is done differently for ROV and RTV/DSV. @@ -3252,66 +3050,301 @@ void DxbcShaderTranslator::CompletePixelShader() { } } -void DxbcShaderTranslator::PreClampedDepthTo20e4(uint32_t d24_temp, - uint32_t d24_temp_component, - uint32_t d32_temp, - uint32_t d32_temp_component, - uint32_t temp_temp, - uint32_t temp_temp_component) { - assert_true(temp_temp != d24_temp || - temp_temp_component != d24_temp_component); - assert_true(temp_temp != d32_temp || - temp_temp_component != d32_temp_component); +void DxbcShaderTranslator::PreClampedFloat32To7e3( + dxbc::Assembler& a, uint32_t f10_temp, uint32_t f10_temp_component, + uint32_t f32_temp, uint32_t f32_temp_component, uint32_t temp_temp, + uint32_t temp_temp_component) { + assert_true(temp_temp != f10_temp || + temp_temp_component != f10_temp_component); + assert_true(temp_temp != f32_temp || + temp_temp_component != f32_temp_component); // Source and destination may be the same. - dxbc::Dest d24_dest(dxbc::Dest::R(d24_temp, 1 << d24_temp_component)); - dxbc::Src d24_src(dxbc::Src::R(d24_temp).Select(d24_temp_component)); - dxbc::Src d32_src(dxbc::Src::R(d32_temp).Select(d32_temp_component)); + dxbc::Dest f10_dest(dxbc::Dest::R(f10_temp, 1 << f10_temp_component)); + dxbc::Src f10_src(dxbc::Src::R(f10_temp).Select(f10_temp_component)); + dxbc::Src f32_src(dxbc::Src::R(f32_temp).Select(f32_temp_component)); dxbc::Dest temp_dest(dxbc::Dest::R(temp_temp, 1 << temp_temp_component)); dxbc::Src temp_src(dxbc::Src::R(temp_temp).Select(temp_temp_component)); - // CFloat24 from d3dref9.dll. + // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp + // Assuming the color is already clamped to [0, 31.875]. + + // Check if the number is too small to be represented as normalized 20e4. + // temp = f32 < 2^-2 + a.OpULT(temp_dest, f32_src, dxbc::Src::LU(0x3E800000)); + // Handle denormalized numbers separately. + a.OpIf(true, temp_src); + { + // temp = f32 >> 23 + a.OpUShR(temp_dest, f32_src, dxbc::Src::LU(23)); + // temp = 125 - (f32 >> 23) + a.OpIAdd(temp_dest, dxbc::Src::LI(125), -temp_src); + // Don't allow the shift to overflow, since in DXBC the lower 5 bits of the + // shift amount are used. + // temp = min(125 - (f32 >> 23), 24) + a.OpUMin(temp_dest, temp_src, dxbc::Src::LU(24)); + // biased_f32 = (f32 & 0x7FFFFF) | 0x800000 + a.OpBFI(f10_dest, dxbc::Src::LU(9), dxbc::Src::LU(23), dxbc::Src::LU(1), + f32_src); + // biased_f32 = ((f32 & 0x7FFFFF) | 0x800000) >> min(125 - (f32 >> 23), 24) + a.OpUShR(f10_dest, f10_src, temp_src); + } + // Not denormalized? + a.OpElse(); + { + // Bias the exponent. + // biased_f32 = f32 + (-124 << 23) + // (left shift of a negative value is undefined behavior) + a.OpIAdd(f10_dest, f32_src, dxbc::Src::LU(0xC2000000u)); + } + // Close the denormal check. + a.OpEndIf(); + // Build the 7e3 number. + // temp = (biased_f32 >> 16) & 1 + a.OpUBFE(temp_dest, dxbc::Src::LU(1), dxbc::Src::LU(16), f10_src); + // f10 = biased_f32 + 0x7FFF + a.OpIAdd(f10_dest, f10_src, dxbc::Src::LU(0x7FFF)); + // f10 = biased_f32 + 0x7FFF + ((biased_f32 >> 16) & 1) + a.OpIAdd(f10_dest, f10_src, temp_src); + // f24 = ((biased_f32 + 0x7FFF + ((biased_f32 >> 16) & 1)) >> 16) & 0x3FF + a.OpUBFE(f10_dest, dxbc::Src::LU(10), dxbc::Src::LU(16), f10_src); +} + +void DxbcShaderTranslator::UnclampedFloat32To7e3( + dxbc::Assembler& a, uint32_t f10_temp, uint32_t f10_temp_component, + uint32_t f32_temp, uint32_t f32_temp_component, uint32_t temp_temp, + uint32_t temp_temp_component) { + // Source and destination might be the same or different, just like in + // PreClampedFloat32To7e3 - clamp to the destination and use it as source. + a.OpMax(dxbc::Dest::R(f10_temp, 1 << f10_temp_component), + dxbc::Src::R(f32_temp).Select(f32_temp_component), + dxbc::Src::LF(0.0f)); + a.OpMin(dxbc::Dest::R(f10_temp, 1 << f10_temp_component), + dxbc::Src::R(f10_temp).Select(f10_temp_component), + dxbc::Src::LF(31.875f)); + PreClampedFloat32To7e3(a, f10_temp, f10_temp_component, f10_temp, + f10_temp_component, temp_temp, temp_temp_component); +} + +void DxbcShaderTranslator::Float7e3To32( + dxbc::Assembler& a, const dxbc::Dest& f32, uint32_t f10_temp, + uint32_t f10_temp_component, uint32_t f10_shift, uint32_t temp1_temp, + uint32_t temp1_temp_component, uint32_t temp2_temp, + uint32_t temp2_temp_component) { + assert_true(f10_shift <= (32 - 10)); + assert_true(temp1_temp != temp2_temp || + temp1_temp_component != temp2_temp_component); + // Source may be the same as temp1 or temp2. + dxbc::Dest exponent_dest( + dxbc::Dest::R(temp1_temp, 1 << temp1_temp_component)); + dxbc::Src exponent_src(dxbc::Src::R(temp1_temp).Select(temp1_temp_component)); + dxbc::Dest mantissa_dest( + dxbc::Dest::R(temp2_temp, 1 << temp2_temp_component)); + dxbc::Src mantissa_src(dxbc::Src::R(temp2_temp).Select(temp2_temp_component)); + + // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp + + if (!(f10_temp == temp1_temp && f10_temp_component == temp1_temp_component)) { + // Unpack the exponent before the mantissa if that doesn't overwrite the + // source. + a.OpUBFE(exponent_dest, dxbc::Src::LU(3), dxbc::Src::LU(f10_shift + 7), + dxbc::Src::R(f10_temp).Select(f10_temp_component)); + } + // Unpack the mantissa. + a.OpUBFE(mantissa_dest, dxbc::Src::LU(7), dxbc::Src::LU(f10_shift), + dxbc::Src::R(f10_temp).Select(f10_temp_component)); + if (f10_temp == temp1_temp && f10_temp_component == temp1_temp_component) { + // Unpack the exponent after the mantissa if doing that before the mantissa + // would overwrite the source. + a.OpUBFE(exponent_dest, dxbc::Src::LU(3), dxbc::Src::LU(f10_shift + 7), + dxbc::Src::R(f10_temp).Select(f10_temp_component)); + } + // Check if the number is denormalized. + a.OpIf(false, exponent_src); + { + // Check if the number is non-zero (if the mantissa isn't zero - the + // exponent is known to be zero at this point). + a.OpIf(true, mantissa_src); + { + // Normalize the mantissa. + // Note that HLSL firstbithigh(x) is compiled to DXBC like: + // `x ? 31 - firstbit_hi(x) : -1` + // (returns the index from the LSB, not the MSB, but -1 for zero too). + // exponent = firstbit_hi(mantissa) + a.OpFirstBitHi(exponent_dest, mantissa_src); + // exponent = 7 - firstbithigh(mantissa) + // Or: + // exponent = 7 - (31 - firstbit_hi(mantissa)) + a.OpIAdd(exponent_dest, exponent_src, dxbc::Src::LI(7 - 31)); + // mantissa = mantissa << (7 - firstbithigh(mantissa)) + // AND 0x7F not needed after this - BFI will do it. + a.OpIShL(mantissa_dest, mantissa_src, exponent_src); + // Get the normalized exponent. + // exponent = 1 - (7 - firstbithigh(mantissa)) + a.OpIAdd(exponent_dest, dxbc::Src::LI(1), -exponent_src); + } + // The number is zero. + a.OpElse(); + { + // Set the unbiased exponent to -124 for zero - 124 will be added later, + // resulting in zero float32. + a.OpMov(exponent_dest, dxbc::Src::LI(-124)); + } + // Close the non-zero check. + a.OpEndIf(); + } + // Close the denormal check. + a.OpEndIf(); + // Bias the exponent and move it to the correct location in f32. + a.OpIMAd(exponent_dest, exponent_src, dxbc::Src::LI(1 << 23), + dxbc::Src::LI(124 << 23)); + // Combine the mantissa and the exponent. + a.OpBFI(f32, dxbc::Src::LU(7), dxbc::Src::LU(23 - 7), mantissa_src, + exponent_src); +} + +void DxbcShaderTranslator::PreClampedDepthTo20e4( + dxbc::Assembler& a, uint32_t f24_temp, uint32_t f24_temp_component, + uint32_t f32_temp, uint32_t f32_temp_component, uint32_t temp_temp, + uint32_t temp_temp_component, bool remap_from_0_to_0_5) { + assert_true(temp_temp != f24_temp || + temp_temp_component != f24_temp_component); + assert_true(temp_temp != f32_temp || + temp_temp_component != f32_temp_component); + // Source and destination may be the same. + dxbc::Dest f24_dest(dxbc::Dest::R(f24_temp, 1 << f24_temp_component)); + dxbc::Src f24_src(dxbc::Src::R(f24_temp).Select(f24_temp_component)); + dxbc::Src f32_src(dxbc::Src::R(f32_temp).Select(f32_temp_component)); + dxbc::Dest temp_dest(dxbc::Dest::R(temp_temp, 1 << temp_temp_component)); + dxbc::Src temp_src(dxbc::Src::R(temp_temp).Select(temp_temp_component)); + + // CFloat24 from d3dref9.dll + + // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp // Assuming the depth is already clamped to [0, 2) (in all places, the depth // is written with the saturate flag set). + uint32_t remap_bias = uint32_t(remap_from_0_to_0_5); + // Check if the number is too small to be represented as normalized 20e4. // temp = f32 < 2^-14 - a_.OpULT(temp_dest, d32_src, dxbc::Src::LU(0x38800000)); + a.OpULT(temp_dest, f32_src, dxbc::Src::LU(0x38800000 - (remap_bias << 23))); // Handle denormalized numbers separately. - a_.OpIf(true, temp_src); + a.OpIf(true, temp_src); { // temp = f32 >> 23 - a_.OpUShR(temp_dest, d32_src, dxbc::Src::LU(23)); + a.OpUShR(temp_dest, f32_src, dxbc::Src::LU(23)); // temp = 113 - (f32 >> 23) - a_.OpIAdd(temp_dest, dxbc::Src::LI(113), -temp_src); + a.OpIAdd(temp_dest, dxbc::Src::LI(113 - remap_bias), -temp_src); // Don't allow the shift to overflow, since in DXBC the lower 5 bits of the // shift amount are used (otherwise 0 becomes 8). // temp = min(113 - (f32 >> 23), 24) - a_.OpUMin(temp_dest, temp_src, dxbc::Src::LU(24)); + a.OpUMin(temp_dest, temp_src, dxbc::Src::LU(24)); // biased_f32 = (f32 & 0x7FFFFF) | 0x800000 - a_.OpBFI(d24_dest, dxbc::Src::LU(9), dxbc::Src::LU(23), dxbc::Src::LU(1), - d32_src); + a.OpBFI(f24_dest, dxbc::Src::LU(9), dxbc::Src::LU(23), dxbc::Src::LU(1), + f32_src); // biased_f32 = ((f32 & 0x7FFFFF) | 0x800000) >> min(113 - (f32 >> 23), 24) - a_.OpUShR(d24_dest, d24_src, temp_src); + a.OpUShR(f24_dest, f24_src, temp_src); } // Not denormalized? - a_.OpElse(); + a.OpElse(); { // Bias the exponent. // biased_f32 = f32 + (-112 << 23) // (left shift of a negative value is undefined behavior) - a_.OpIAdd(d24_dest, d32_src, dxbc::Src::LU(0xC8000000u)); + a.OpIAdd(f24_dest, f32_src, + dxbc::Src::LU(0xC8000000u + (remap_bias << 23))); } // Close the denormal check. - a_.OpEndIf(); + a.OpEndIf(); // Build the 20e4 number. // temp = (biased_f32 >> 3) & 1 - a_.OpUBFE(temp_dest, dxbc::Src::LU(1), dxbc::Src::LU(3), d24_src); + a.OpUBFE(temp_dest, dxbc::Src::LU(1), dxbc::Src::LU(3), f24_src); // f24 = biased_f32 + 3 - a_.OpIAdd(d24_dest, d24_src, dxbc::Src::LU(3)); + a.OpIAdd(f24_dest, f24_src, dxbc::Src::LU(3)); // f24 = biased_f32 + 3 + ((biased_f32 >> 3) & 1) - a_.OpIAdd(d24_dest, d24_src, temp_src); + a.OpIAdd(f24_dest, f24_src, temp_src); // f24 = ((biased_f32 + 3 + ((biased_f32 >> 3) & 1)) >> 3) & 0xFFFFFF - a_.OpUBFE(d24_dest, dxbc::Src::LU(24), dxbc::Src::LU(3), d24_src); + a.OpUBFE(f24_dest, dxbc::Src::LU(24), dxbc::Src::LU(3), f24_src); +} + +void DxbcShaderTranslator::Depth20e4To32( + dxbc::Assembler& a, const dxbc::Dest& f32, uint32_t f24_temp, + uint32_t f24_temp_component, uint32_t f24_shift, uint32_t temp1_temp, + uint32_t temp1_temp_component, uint32_t temp2_temp, + uint32_t temp2_temp_component, bool remap_to_0_to_0_5) { + assert_true(f24_shift <= (32 - 24)); + assert_true(temp1_temp != temp2_temp || + temp1_temp_component != temp2_temp_component); + // Source may be the same as temp1 or temp2. + dxbc::Dest exponent_dest( + dxbc::Dest::R(temp1_temp, 1 << temp1_temp_component)); + dxbc::Src exponent_src(dxbc::Src::R(temp1_temp).Select(temp1_temp_component)); + dxbc::Dest mantissa_dest( + dxbc::Dest::R(temp2_temp, 1 << temp2_temp_component)); + dxbc::Src mantissa_src(dxbc::Src::R(temp2_temp).Select(temp2_temp_component)); + + // CFloat24 from d3dref9.dll + + // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp + + uint32_t remap_bias = uint32_t(remap_to_0_to_0_5); + + if (!(f24_temp == temp1_temp && f24_temp_component == temp1_temp_component)) { + // Unpack the exponent before the mantissa if that doesn't overwrite the + // source. + a.OpUBFE(exponent_dest, dxbc::Src::LU(4), dxbc::Src::LU(f24_shift + 20), + dxbc::Src::R(f24_temp).Select(f24_temp_component)); + } + // Unpack the mantissa. + a.OpUBFE(mantissa_dest, dxbc::Src::LU(20), dxbc::Src::LU(f24_shift), + dxbc::Src::R(f24_temp).Select(f24_temp_component)); + if (f24_temp == temp1_temp && f24_temp_component == temp1_temp_component) { + // Unpack the exponent after the mantissa if doing that before the mantissa + // would overwrite the source. + a.OpUBFE(exponent_dest, dxbc::Src::LU(4), dxbc::Src::LU(f24_shift + 20), + dxbc::Src::R(f24_temp).Select(f24_temp_component)); + } + // Check if the number is denormalized. + a.OpIf(false, exponent_src); + { + // Check if the number is non-zero (if the mantissa isn't zero - the + // exponent is known to be zero at this point). + a.OpIf(true, mantissa_src); + { + // Normalize the mantissa. + // Note that HLSL firstbithigh(x) is compiled to DXBC like: + // `x ? 31 - firstbit_hi(x) : -1` + // (returns the index from the LSB, not the MSB, but -1 for zero too). + // exponent = firstbit_hi(mantissa) + a.OpFirstBitHi(exponent_dest, mantissa_src); + // exponent = 20 - firstbithigh(mantissa) + // Or: + // exponent = 20 - (31 - firstbit_hi(mantissa)) + a.OpIAdd(exponent_dest, exponent_src, dxbc::Src::LI(20 - 31)); + // mantissa = mantissa << (20 - firstbithigh(mantissa)) + // AND 0xFFFFF not needed after this - BFI will do it. + a.OpIShL(mantissa_dest, mantissa_src, exponent_src); + // Get the normalized exponent. + // exponent = 1 - (20 - firstbithigh(mantissa)) + a.OpIAdd(exponent_dest, dxbc::Src::LI(1), -exponent_src); + } + // The number is zero. + a.OpElse(); + { + // Set the unbiased exponent to -112 for zero - 112 will be added later + // (taking the range remap bias into account), resulting in zero float32. + a.OpMov(exponent_dest, dxbc::Src::LI(-int32_t(112 - remap_bias))); + } + // Close the non-zero check. + a.OpEndIf(); + } + // Close the denormal check. + a.OpEndIf(); + // Bias the exponent and move it to the correct location in f32, and also + // remap from guest 0...1 to host 0...0.5 if needed. + a.OpIMAd(exponent_dest, exponent_src, dxbc::Src::LI(1 << 23), + dxbc::Src::LI((112 - remap_bias) << 23)); + // Combine the mantissa and the exponent. + a.OpBFI(f32, dxbc::Src::LU(20), dxbc::Src::LU(23 - 20), mantissa_src, + exponent_src); } void DxbcShaderTranslator::ROV_DepthTo24Bit(uint32_t d24_temp, @@ -3330,22 +3363,22 @@ void DxbcShaderTranslator::ROV_DepthTo24Bit(uint32_t d24_temp, uint32_t(CbufferRegister::kSystemConstants), kSysConst_Flags_Vec) .Select(kSysConst_Flags_Comp), - dxbc::Src::LU(kSysFlag_ROVDepthFloat24)); + dxbc::Src::LU(kSysFlag_DepthFloat24)); // Convert according to the format. a_.OpIf(true, dxbc::Src::R(temp_temp).Select(temp_temp_component)); { // 20e4 conversion. - PreClampedDepthTo20e4(d24_temp, d24_temp_component, d32_temp, - d32_temp_component, temp_temp, temp_temp_component); + PreClampedDepthTo20e4(a_, d24_temp, d24_temp_component, d32_temp, + d32_temp_component, temp_temp, temp_temp_component, + false); } a_.OpElse(); { // Unorm24 conversion. dxbc::Dest d24_dest(dxbc::Dest::R(d24_temp, 1 << d24_temp_component)); dxbc::Src d24_src(dxbc::Src::R(d24_temp).Select(d24_temp_component)); - // Multiply by float(0xFFFFFF). a_.OpMul(d24_dest, dxbc::Src::R(d32_temp).Select(d32_temp_component), - dxbc::Src::LF(16777215.0f)); + dxbc::Src::LF(float(0xFFFFFF))); // Round to the nearest even integer. This seems to be the correct way: // rounding towards zero gives 0xFF instead of 0x100 in clear shaders in, // for instance, Halo 3, but other clear shaders in it are also broken if diff --git a/src/xenia/gpu/gpu_flags.cc b/src/xenia/gpu/gpu_flags.cc index 9a234712c..5f73fd3c2 100644 --- a/src/xenia/gpu/gpu_flags.cc +++ b/src/xenia/gpu/gpu_flags.cc @@ -40,71 +40,9 @@ DEFINE_bool( "be fully covered when MSAA is used with fullscreen passes.", "GPU"); -DEFINE_bool( - ssaa_scale_gradients, true, - "When using SSAA instead of native MSAA, adjust texture coordinate " - "derivatives used for mipmap selection, and getGradients results, to guest " - "pixels as if true MSAA rather than SSAA was used.\n" - "Reduces bandwidth usage of texture fetching.", - "GPU"); - -DEFINE_string( - depth_float24_conversion, "", - "Method for converting 32-bit Z values to 20e4 floating point when using " - "host depth buffers without native 20e4 support (when not using rasterizer-" - "ordered views / fragment shader interlocks to perform depth testing " - "manually).\n" - "Use: [any, on_copy, truncate, round]\n" - " on_copy:\n" - " Do depth testing at host precision, converting when copying between " - "host depth buffers and the EDRAM buffer to support reinterpretation, " - "maintaining two copies, in both host and 20e4 formats, for reloading data " - "to host depth buffers when it wasn't overwritten.\n" - " + Highest performance, allows early depth test and writing.\n" - " + Host MSAA is possible with pixel-rate shading where supported.\n" - " - EDRAM > RAM > EDRAM depth buffer round trip done in certain games " - "(such as GTA IV) destroys precision irreparably, causing artifacts if " - "another rendering pass is done after the EDRAM reupload.\n" - " truncate:\n" - " Convert to 20e4 directly in pixel shaders, always rounding down.\n" - " + Good performance, conservative early depth test is possible.\n" - " + No precision loss when anything changes in the storage of the depth " - "buffer, EDRAM > RAM > EDRAM copying preserves precision.\n" - " - Rounding mode is incorrect, sometimes giving results smaller than " - "they should be - may cause inaccuracy especially in edge cases when the " - "game wants to write an exact value.\n" - " - Host MSAA is only possible at SSAA speed, with per-sample shading.\n" - " round:\n" - " Convert to 20e4 directly in pixel shaders, correctly rounding to the " - "nearest even.\n" - " + Highest accuracy.\n" - " - Significantly limited performance, early depth test is not possible.\n" - " - Host MSAA is only possible at SSAA speed, with per-sample shading.\n" - " Any other value:\n" - " Choose what is considered the most optimal (currently \"on_copy\").", - "GPU"); - DEFINE_int32(query_occlusion_fake_sample_count, 1000, "If set to -1 no sample counts are written, games may hang. Else, " "the sample count of every tile will be incremented on every " "EVENT_WRITE_ZPD by this number. Setting this to 0 means " "everything is reported as occluded.", "GPU"); - -namespace xe { -namespace gpu { -namespace flags { - -DepthFloat24Conversion GetDepthFloat24Conversion() { - if (cvars::depth_float24_conversion == "truncate") { - return DepthFloat24Conversion::kOnOutputTruncating; - } - if (cvars::depth_float24_conversion == "round") { - return DepthFloat24Conversion::kOnOutputRounding; - } - return DepthFloat24Conversion::kOnCopy; -} - -} // namespace flags -} // namespace gpu -} // namespace xe diff --git a/src/xenia/gpu/gpu_flags.h b/src/xenia/gpu/gpu_flags.h index f1710d107..5ae64b76e 100644 --- a/src/xenia/gpu/gpu_flags.h +++ b/src/xenia/gpu/gpu_flags.h @@ -22,71 +22,6 @@ DECLARE_bool(gpu_allow_invalid_fetch_constants); DECLARE_bool(half_pixel_offset); -DECLARE_bool(ssaa_scale_gradients); - -DECLARE_string(depth_float24_conversion); - DECLARE_int32(query_occlusion_fake_sample_count); -namespace xe { -namespace gpu { -namespace flags { - -enum class DepthFloat24Conversion { - // Doing depth test at the host precision, converting to 20e4 to support - // reinterpretation, but keeping a separate EDRAM view containing depth values - // in the host format. When copying from the EDRAM buffer to host depth - // buffers, writing the stored host pixel if stored_f24 == to_f24(stored_host) - // (otherwise it was overwritten by something else, like clearing, or a color - // buffer; this is inexact though, and will incorrectly load pixels that were - // overwritten by something else in the EDRAM, but turned out to have the same - // value on the guest as before - an outdated host-precision value will be - // loaded in these cases instead). - // - // EDRAM > RAM, then reusing the EDRAM region for something else > EDRAM round - // trip destroys precision beyond repair. - // - // Full host early Z and MSAA with pixel-rate shading are supported. - kOnCopy, - // Converting the depth to the closest host value representable exactly as a - // 20e4 float in pixel shaders, to support invariance in cases when the guest - // reuploads a previously resolved depth buffer to the EDRAM, rounding towards - // zero (which contradicts the rounding used by the Direct3D 9 reference - // rasterizer, but allows less-than-or-equal pixel shader depth output to be - // used to preserve most of early Z culling when the game is using reversed - // depth, which is the usual way of doing depth testing on the Xbox 360 and of - // utilizing the advantages of a floating-point encoding). - // - // With MSAA, pixel shaders must run at sample frequency - otherwise, if the - // depth is the same for the entire pixel, intersections of polygons cannot be - // antialiased. - // - // Important usage note: When using this mode, bounds of the fixed-function - // viewport must be converted to and back from float24 too (preferably using - // correct rounding to the nearest even, to reduce the error already caused by - // truncation rather than to amplify it). This ensures that clamping to the - // viewport bounds, which happens after the pixel shader even if it overwrites - // the resulting depth, is never done to a value not representable as float24 - // (for example, if the minimum Z is a number too small to be represented as - // float24, but not zero, it won't be possible to write what should become - // 0x000000 to the depth buffer). Note that this may add some error to the - // depth values from the rasterizer; however, modifying Z in the vertex shader - // to make interpolated depth values would cause clipping to be done to - // different bounds, which may be more undesirable, especially in cases when Z - // is explicitly set to a value like 0 or W (in such cases, the adjusted - // polygon may go outside 0...W in clip space and disappear). - kOnOutputTruncating, - // Similar to kOnOutputTruncating, but rounding to the nearest even, more - // correctly, however, because the resulting depth can be bigger than the - // original host value, early depth testing can't be used at all. Same - // viewport usage rules apply. - kOnOutputRounding, -}; - -DepthFloat24Conversion GetDepthFloat24Conversion(); - -} // namespace flags -} // namespace gpu -} // namespace xe - #endif // XENIA_GPU_GPU_FLAGS_H_ diff --git a/src/xenia/gpu/render_target_cache.cc b/src/xenia/gpu/render_target_cache.cc new file mode 100644 index 000000000..72ed63e57 --- /dev/null +++ b/src/xenia/gpu/render_target_cache.cc @@ -0,0 +1,1407 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/gpu/render_target_cache.h" + +#include +#include +#include +#include +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/base/cvar.h" +#include "xenia/base/logging.h" +#include "xenia/base/math.h" +#include "xenia/gpu/draw_util.h" +#include "xenia/gpu/register_file.h" +#include "xenia/gpu/registers.h" +#include "xenia/gpu/xenos.h" + +DEFINE_bool( + depth_transfer_not_equal_test, true, + "When transferring data between depth render targets, use the \"not " + "equal\" test to avoid writing rewriting depth via shader depth output if " + "it's the same as the one currently in the depth buffer in case of round " + "trips of the data.\n" + "Settings this to true may make transfer round trips more friendly to " + "depth compression depending on how the GPU implements it (as arbitrary " + "depth output may result in it being disabled completely), which is " + "beneficial to subsequent rendering, while setting this to false may " + "reduce bandwidth usage during transfers as the previous depth won't need " + "to be read.", + "GPU"); +DEFINE_string( + depth_float24_conversion, "", + "Method for converting 32-bit Z values to 20e4 floating point when using " + "host depth buffers without native 20e4 support (when not using rasterizer-" + "ordered views / fragment shader interlocks to perform depth testing " + "manually).\n" + "Use: [any, on_copy, truncate, round]\n" + " on_copy:\n" + " Do depth testing at host precision, converting when copying between " + "color and depth buffers (or between depth buffers of different formats) " + "to support reinterpretation, but keeps the last host depth buffer used " + "for each EDRAM range and reloads the host precision value if it's still " + "up to date after the EDRAM range was used with a different pixel format.\n" + " + Highest performance, allows early depth test and writing.\n" + " + Host MSAA is possible with pixel-rate shading where supported.\n" + " - EDRAM > RAM > EDRAM depth buffer round trip done in certain games " + "(such as GTA IV) destroys precision irreparably, causing artifacts if " + "another rendering pass is done after the EDRAM reupload.\n" + " truncate:\n" + " Convert to 20e4 directly in pixel shaders, always rounding down.\n" + " + Average performance, conservative early depth test is possible.\n" + " + No precision loss when anything changes in the storage of the depth " + "buffer, EDRAM > RAM > EDRAM copying preserves precision.\n" + " - Rounding mode is incorrect, sometimes giving results smaller than " + "they should be - may cause inaccuracy especially in edge cases when the " + "game wants to write an exact value.\n" + " - Host MSAA is only possible at SSAA speed, with per-sample shading.\n" + " round:\n" + " Convert to 20e4 directly in pixel shaders, correctly rounding to the " + "nearest even.\n" + " + Highest accuracy.\n" + " - Significantly limited performance, early depth test is not possible.\n" + " - Host MSAA is only possible at SSAA speed, with per-sample shading.\n" + " Any other value:\n" + " Choose what is considered the most optimal (currently \"on_copy\").", + "GPU"); +DEFINE_int32( + draw_resolution_scale, 1, + "Integer pixel width and height scale used for scaling the rendering " + "resolution opaquely to the game.\n" + "1, 2 and 3 may be supported, but support of anything above 1 depends on " + "the device properties, such as whether it supports sparse binding / tiled " + "resources, the number of virtual address bits per resource, and other " + "factors.\n" + "Various effects and parts of game rendering pipelines may work " + "incorrectly as pixels become ambiguous from the game's perspective and " + "because half-pixel offset (which normally doesn't affect coverage when " + "MSAA isn't used) becomes full-pixel.", + "GPU"); +DEFINE_bool( + draw_resolution_scaled_texture_offsets, true, + "Apply offsets from texture fetch instructions taking resolution scale " + "into account for render-to-texture, for more correct shadow filtering, " + "bloom, etc., in some cases.", + "GPU"); +// Disabled by default because of full-screen effects that occur when game +// shaders assume piecewise linear, much more severe than blending-related +// issues. +DEFINE_bool( + gamma_render_target_as_srgb, false, + "When the host can't write piecewise linear gamma directly with correct " + "blending, use sRGB output on the host for conceptually correct blending " + "in linear color space (to prevent issues such as bright squares around " + "bullet holes and overly dark lighting in Halo 3) while having slightly " + "different precision distribution in the render target and severely " + "incorrect values if the game accesses the resulting colors directly as " + "raw data (the whole screen in The Orange Box, for instance, since when " + "the first loading bar appears).", + "GPU"); +DEFINE_bool( + mrt_edram_used_range_clamp_to_min, true, + "With host render targets, if multiple render targets are bound, estimate " + "the EDRAM range modified in any of them to be not bigger than the " + "distance between any two render targets in the EDRAM, rather than " + "allowing the last one claim the rest of the EDRAM.\n" + "Has effect primarily on draws without viewport clipping.\n" + "Setting this to false results in higher accuracy in rare cases, but may " + "increase the amount of copying that needs to be done sometimes.", + "GPU"); +DEFINE_bool( + native_2x_msaa, true, + "Use host 2x MSAA when available. Can be disabled for scalability testing " + "on host GPU APIs where 2x is not mandatory, in this case, 2 samples of 4x " + "MSAA will be used instead (with similar or worse quality and higher " + "memory usage).", + "GPU"); +DEFINE_bool( + native_stencil_value_output, true, + "Use pixel shader stencil reference output where available for purposes " + "like copying between render targets. Can be disabled for scalability " + "testing, in this case, much more expensive drawing of 8 quads will be " + "done.", + "GPU"); +DEFINE_bool( + snorm16_render_target_full_range, true, + "When the host can only support 16_16 and 16_16_16_16 render targets as " + "-1...1, remap -32...32 to -1...1 to use the full possible range of " + "values, at the expense of multiplicative blending correctness.", + "GPU"); + +namespace xe { +namespace gpu { + +uint32_t RenderTargetCache::Transfer::GetRangeRectangles( + uint32_t start_tiles, uint32_t end_tiles, uint32_t base_tiles, + uint32_t pitch_tiles, xenos::MsaaSamples msaa_samples, bool is_64bpp, + Rectangle* rectangles_out, const Rectangle* cutout) { + assert_true(start_tiles <= end_tiles); + assert_true(base_tiles <= start_tiles); + assert_not_zero(pitch_tiles); + if (start_tiles == end_tiles) { + return 0; + } + uint32_t tile_width = + xenos::kEdramTileWidthSamples >> + (uint32_t(msaa_samples >= xenos::MsaaSamples::k4X) + uint32_t(is_64bpp)); + uint32_t tile_height = xenos::kEdramTileHeightSamples >> + uint32_t(msaa_samples >= xenos::MsaaSamples::k2X); + // If the first and / or the last rows have the same X spans as the middle + // part, merge them with it. + uint32_t rectangle_count = 0; + uint32_t local_start = start_tiles - base_tiles; + uint32_t local_end = end_tiles - base_tiles; + // Inclusive. + uint32_t rows_start = local_start / pitch_tiles; + // Exclusive. + uint32_t rows_end = (local_end + (pitch_tiles - 1)) / pitch_tiles; + uint32_t row_first_start = local_start - rows_start * pitch_tiles; + uint32_t row_last_end = pitch_tiles - (rows_end * pitch_tiles - local_end); + uint32_t rows = rows_end - rows_start; + if (rows == 1 || row_first_start) { + Rectangle rectangle_first; + rectangle_first.x_pixels = row_first_start * tile_width; + rectangle_first.y_pixels = rows_start * tile_height; + rectangle_first.width_pixels = + ((rows == 1 ? row_last_end : pitch_tiles) - row_first_start) * + tile_width; + rectangle_first.height_pixels = tile_height; + rectangle_count += AddRectangle( + rectangle_first, + rectangles_out ? rectangles_out + rectangle_count : nullptr, cutout); + if (rows == 1) { + return rectangle_count; + } + } + uint32_t mid_rows_start = rows_start + 1; + uint32_t mid_rows = rows - 2; + if (!row_first_start) { + --mid_rows_start; + ++mid_rows; + } + if (row_last_end == pitch_tiles) { + ++mid_rows; + } + if (mid_rows) { + Rectangle rectangle_mid; + rectangle_mid.x_pixels = 0; + rectangle_mid.y_pixels = mid_rows_start * tile_height; + rectangle_mid.width_pixels = pitch_tiles * tile_width; + rectangle_mid.height_pixels = mid_rows * tile_height; + rectangle_count += AddRectangle( + rectangle_mid, + rectangles_out ? rectangles_out + rectangle_count : nullptr, cutout); + } + if (row_last_end != pitch_tiles) { + Rectangle rectangle_last; + rectangle_last.x_pixels = 0; + rectangle_last.y_pixels = (rows_end - 1) * tile_height; + rectangle_last.width_pixels = row_last_end * tile_width; + rectangle_last.height_pixels = tile_height; + rectangle_count += AddRectangle( + rectangle_last, + rectangles_out ? rectangles_out + rectangle_count : nullptr, cutout); + } + assert_true(rectangle_count <= (cutout ? kMaxRectanglesWithCutout + : kMaxRectanglesWithoutCutout)); + return rectangle_count; +} + +uint32_t RenderTargetCache::Transfer::AddRectangle(const Rectangle& rectangle, + Rectangle* rectangles_out, + const Rectangle* cutout) { + uint32_t rectangle_right = rectangle.x_pixels + rectangle.width_pixels; + uint32_t rectangle_bottom = rectangle.y_pixels + rectangle.height_pixels; + // If nothing to cut out (no region specified, or no intersection - if the + // cutout region is in the middle on Y, but completely to the left / right on + // X, don't split), add the whole rectangle. + if (!cutout || !cutout->width_pixels || !cutout->height_pixels || + cutout->x_pixels >= rectangle_right || + cutout->x_pixels + cutout->width_pixels <= rectangle.x_pixels || + cutout->y_pixels >= rectangle_bottom || + cutout->y_pixels + cutout->height_pixels <= rectangle.y_pixels) { + if (rectangles_out) { + rectangles_out[0] = rectangle; + } + return 1; + } + uint32_t rectangle_count = 0; + uint32_t cutout_right = cutout->x_pixels + cutout->width_pixels; + uint32_t cutout_bottom = cutout->y_pixels + cutout->height_pixels; + // Upper part after cutout. + if (cutout->y_pixels > rectangle.y_pixels) { + // The completely outside case has already been checked. + assert_true(cutout->y_pixels < rectangle_bottom); + if (rectangles_out) { + Rectangle& rectangle_upper = rectangles_out[rectangle_count]; + rectangle_upper.x_pixels = rectangle.x_pixels; + rectangle_upper.y_pixels = rectangle.y_pixels; + rectangle_upper.width_pixels = rectangle.width_pixels; + // cutout->y_pixels is already known to be < rectangle_bottom, no need for + // min(cutout->y_pixels - rectangle.y_pixels, rectangle.height_pixels). + rectangle_upper.height_pixels = cutout->y_pixels - rectangle.y_pixels; + } + ++rectangle_count; + } + // Middle part after cutout. + uint32_t middle_top = std::max(cutout->y_pixels, rectangle.y_pixels); + uint32_t middle_height = + std::min(cutout_bottom, rectangle_bottom) - middle_top; + // Middle left. + if (cutout->x_pixels > rectangle.x_pixels) { + assert_true(cutout->x_pixels < rectangle_right); + if (rectangles_out) { + Rectangle& rectangle_middle_left = rectangles_out[rectangle_count]; + rectangle_middle_left.x_pixels = rectangle.x_pixels; + rectangle_middle_left.y_pixels = middle_top; + rectangle_middle_left.width_pixels = + cutout->x_pixels - rectangle.x_pixels; + rectangle_middle_left.height_pixels = middle_height; + } + ++rectangle_count; + } + // Middle right. + if (cutout_right < rectangle_right) { + assert_true(cutout_right > rectangle.x_pixels); + if (rectangles_out) { + Rectangle& rectangle_middle_right = rectangles_out[rectangle_count]; + rectangle_middle_right.x_pixels = cutout_right; + rectangle_middle_right.y_pixels = middle_top; + rectangle_middle_right.width_pixels = rectangle_right - cutout_right; + rectangle_middle_right.height_pixels = middle_height; + } + ++rectangle_count; + } + // Lower part after cutout. + if (cutout_bottom < rectangle_bottom) { + assert_true(cutout_bottom > rectangle.y_pixels); + if (rectangles_out) { + Rectangle& rectangle_upper = rectangles_out[rectangle_count]; + rectangle_upper.x_pixels = rectangle.x_pixels; + rectangle_upper.y_pixels = cutout_bottom; + rectangle_upper.width_pixels = rectangle.width_pixels; + rectangle_upper.height_pixels = rectangle_bottom - cutout_bottom; + } + ++rectangle_count; + } + assert_true(rectangle_count <= kMaxCutoutBorderRectangles); + return rectangle_count; +} + +RenderTargetCache::~RenderTargetCache() { ShutdownCommon(); } + +void RenderTargetCache::InitializeCommon() { + assert_true(ownership_ranges_.empty()); + ownership_ranges_.emplace( + std::piecewise_construct, std::forward_as_tuple(uint32_t(0)), + std::forward_as_tuple(xenos::kEdramTileCount, RenderTargetKey(), + RenderTargetKey(), RenderTargetKey())); +} + +void RenderTargetCache::ShutdownCommon() { + ownership_ranges_.clear(); + + for (const auto& render_target_pair : render_targets_) { + if (render_target_pair.second) { + delete render_target_pair.second; + } + } + render_targets_.clear(); +} + +void RenderTargetCache::ClearCache() { + // Keep only render targets currently owning any EDRAM data. + if (!render_targets_.empty()) { + std::unordered_set + used_render_targets; + for (const auto& ownership_range_pair : ownership_ranges_) { + const OwnershipRange& ownership_range = ownership_range_pair.second; + if (!ownership_range.render_target.IsEmpty()) { + used_render_targets.emplace(ownership_range.render_target); + } + if (!ownership_range.host_depth_render_target_unorm24.IsEmpty()) { + used_render_targets.emplace( + ownership_range.host_depth_render_target_unorm24); + } + if (!ownership_range.host_depth_render_target_float24.IsEmpty()) { + used_render_targets.emplace( + ownership_range.host_depth_render_target_float24); + } + } + if (render_targets_.size() != used_render_targets.size()) { + typename decltype(render_targets_)::iterator it_next; + for (auto it = render_targets_.begin(); it != render_targets_.end(); + it = it_next) { + it_next = std::next(it); + if (!it->second) { + render_targets_.erase(it); + continue; + } + if (used_render_targets.find(it->second->key()) == + used_render_targets.end()) { + delete it->second; + render_targets_.erase(it); + } + } + } + } +} + +void RenderTargetCache::BeginFrame() { ResetAccumulatedRenderTargets(); } + +bool RenderTargetCache::Update(bool is_rasterization_done, + uint32_t shader_writes_color_targets) { + const RegisterFile& regs = register_file(); + bool interlock_barrier_only = GetPath() == Path::kPixelShaderInterlock; + + auto rb_surface_info = regs.Get(); + xenos::MsaaSamples msaa_samples = rb_surface_info.msaa_samples; + assert_true(msaa_samples <= xenos::MsaaSamples::k4X); + if (msaa_samples > xenos::MsaaSamples::k4X) { + // Safety check because a lot of code assumes up to 4x. + assert_always(); + XELOGE("{}x MSAA requested by the guest, Xenos only supports up to 4x", + uint32_t(1) << uint32_t(msaa_samples)); + return false; + } + uint32_t msaa_samples_x_log2 = + uint32_t(msaa_samples >= xenos::MsaaSamples::k4X); + uint32_t pitch_pixels = rb_surface_info.surface_pitch; + // surface_pitch 0 should be handled in disabling rasterization (hopefully + // it's safe to assume that). + assert_true(pitch_pixels || !is_rasterization_done); + if (!pitch_pixels) { + is_rasterization_done = false; + } else if (pitch_pixels > xenos::kTexture2DCubeMaxWidthHeight) { + XELOGE( + "Surface pitch {} larger than the maximum texture width {} specified " + "by the guest", + pitch_pixels, xenos::kTexture2DCubeMaxWidthHeight); + return false; + } + uint32_t pitch_tiles_at_32bpp = ((pitch_pixels << msaa_samples_x_log2) + + (xenos::kEdramTileWidthSamples - 1)) / + xenos::kEdramTileWidthSamples; + if (!interlock_barrier_only) { + uint32_t pitch_pixels_tile_aligned_scaled = + pitch_tiles_at_32bpp * + (xenos::kEdramTileWidthSamples >> msaa_samples_x_log2) * + GetResolutionScale(); + uint32_t max_render_target_width = GetMaxRenderTargetWidth(); + if (pitch_pixels_tile_aligned_scaled > max_render_target_width) { + // TODO(Triang3l): If really needed for some game on some device, clamp + // the pitch and generate multiple ranges (each for every row of tiles) + // with gaps for padding. Very few PowerVR GPUs have 4096, not 8192, as + // the limit, though with 8192 (on Mali) the actual limit for Xenia is + // 8160 because tile padding is stored - but 8192 should be extremely rare + // anyway. + XELOGE( + "Surface pitch aligned to EDRAM tiles and resolution-scaled {} " + "larger than the maximum host render target width {}", + pitch_pixels_tile_aligned_scaled, max_render_target_width); + return false; + } + } + + uint32_t rts_remaining; + uint32_t rt_index; + + // Get used render targets. + // [0] is depth / stencil where relevant, [1...4] is color. + // Depth / stencil testing / writing is before color in the pipeline. + uint32_t depth_and_color_rts_used_bits = 0; + // depth_and_color_rts_used_bits -> EDRAM base. + uint32_t edram_bases[1 + xenos::kMaxColorRenderTargets]; + uint32_t host_relevant_formats[1 + xenos::kMaxColorRenderTargets]; + uint32_t rts_are_64bpp = 0; + uint32_t color_rts_are_gamma = 0; + if (is_rasterization_done) { + auto rb_depthcontrol = regs.Get(); + if (rb_depthcontrol.z_enable || rb_depthcontrol.stencil_enable) { + depth_and_color_rts_used_bits |= 1; + auto rb_depth_info = regs.Get(); + // std::min for safety, to avoid negative numbers in case it's completely + // wrong. + edram_bases[0] = + std::min(rb_depth_info.depth_base, xenos::kEdramTileCount); + // With pixel shader interlock, always the same addressing disregarding + // the format. + host_relevant_formats[0] = + interlock_barrier_only ? 0 : uint32_t(rb_depth_info.depth_format); + } + if (regs.Get().edram_mode == + xenos::ModeControl::kColorDepth) { + uint32_t rb_color_mask = regs[XE_GPU_REG_RB_COLOR_MASK].u32; + rts_remaining = shader_writes_color_targets; + while (xe::bit_scan_forward(rts_remaining, &rt_index)) { + rts_remaining &= ~(uint32_t(1) << rt_index); + auto color_info = regs.Get( + reg::RB_COLOR_INFO::rt_register_indices[rt_index]); + xenos::ColorRenderTargetFormat color_format = + regs.Get( + reg::RB_COLOR_INFO::rt_register_indices[rt_index]) + .color_format; + if ((rb_color_mask >> (rt_index * 4)) & + ((uint32_t(1) << xenos::GetColorRenderTargetFormatComponentCount( + color_format)) - + 1)) { + uint32_t rt_bit_index = 1 + rt_index; + depth_and_color_rts_used_bits |= uint32_t(1) << rt_bit_index; + edram_bases[rt_bit_index] = + std::min(color_info.color_base, xenos::kEdramTileCount); + bool is_64bpp = xenos::IsColorRenderTargetFormat64bpp(color_format); + if (is_64bpp) { + rts_are_64bpp |= uint32_t(1) << rt_bit_index; + } + if (color_format == xenos::ColorRenderTargetFormat::k_8_8_8_8_GAMMA) { + color_rts_are_gamma |= uint32_t(1) << rt_index; + } + xenos::ColorRenderTargetFormat color_host_relevant_format; + if (interlock_barrier_only) { + // Only changes in mapping between coordinates and addresses are + // interesting (along with access overlap between draw calls), thus + // only pixel size is relevant. + color_host_relevant_format = + is_64bpp ? xenos::ColorRenderTargetFormat::k_16_16_16_16 + : xenos::ColorRenderTargetFormat::k_8_8_8_8; + } else { + color_host_relevant_format = GetHostRelevantColorFormat( + xenos::GetStorageColorFormat(color_format)); + } + host_relevant_formats[rt_bit_index] = + uint32_t(color_host_relevant_format); + } + } + } + } + // Eliminate other bound render targets if their EDRAM base conflicts with + // another render target - it's an error in most host implementations to bind + // the same render target into multiple slots, also the behavior would be + // unpredictable if that happens. + // Depth is considered the least important as it's earlier in the pipeline + // (issues caused by color and depth render target collisions haven't been + // found yet), but render targets with smaller index are considered more + // important - specifically, because of the usage in the lighting pass of + // Halo 3, which can be checked in the vertical look calibration sequence in + // the beginning of the game: if render target 0 is removed in favor of 1, the + // UNSC servicemen and the world will be too dark, like fully in shadow - + // especially prominent on the helmet. This happens because the shader picks + // between two render targets to write dynamically (though with a static, bool + // constant condition), but all other state is set up in a way that implies + // the same render target being bound twice. On Direct3D 9, if you don't write + // to a color pixel shader output on the control flow that was taken, the + // render target will not be written to. However, this has been relaxed in + // Direct3D 10, where if the shader declares an output, it's assumed to be + // always written (or with an undefined value otherwise). + rts_remaining = depth_and_color_rts_used_bits & ~(uint32_t(1)); + while (xe::bit_scan_forward(rts_remaining, &rt_index)) { + rts_remaining &= ~(uint32_t(1) << rt_index); + uint32_t edram_base = edram_bases[rt_index]; + uint32_t rts_other_remaining = + depth_and_color_rts_used_bits & + (~((uint32_t(1) << (rt_index + 1)) - 1) | uint32_t(1)); + uint32_t rt_other_index; + while (xe::bit_scan_forward(rts_other_remaining, &rt_other_index)) { + rts_other_remaining &= ~(uint32_t(1) << rt_other_index); + if (edram_bases[rt_other_index] == edram_base) { + depth_and_color_rts_used_bits &= ~(uint32_t(1) << rt_other_index); + } + } + } + + // Clear ownership transfers before adding any. + if (!interlock_barrier_only) { + for (size_t i = 0; i < xe::countof(last_update_transfers_); ++i) { + last_update_transfers_[i].clear(); + } + } + + if (!depth_and_color_rts_used_bits) { + // Nothing to bind, don't waste time on things like memexport-only draws - + // just check if old bindings can still be used. + std::memset(last_update_used_render_targets_, 0, + sizeof(last_update_used_render_targets_)); + if (are_accumulated_render_targets_valid_) { + for (size_t i = 0; + i < xe::countof(last_update_accumulated_render_targets_); ++i) { + const RenderTarget* render_target = + last_update_accumulated_render_targets_[i]; + if (!render_target) { + continue; + } + RenderTargetKey rt_key = render_target->key(); + if (rt_key.pitch_tiles_at_32bpp != pitch_tiles_at_32bpp || + rt_key.msaa_samples != msaa_samples) { + are_accumulated_render_targets_valid_ = false; + break; + } + } + } + if (!are_accumulated_render_targets_valid_) { + std::memset(last_update_accumulated_render_targets_, 0, + sizeof(last_update_accumulated_render_targets_)); + last_update_accumulated_color_targets_are_gamma_ = 0; + } + return true; + } + + // Estimate height used by render targets (for color for writes, for depth / + // stencil for both reads and writes) from various sources. + uint32_t height_used = + GetRenderTargetHeight(pitch_tiles_at_32bpp, msaa_samples); + int32_t window_y_offset = + regs.Get().window_y_offset; + auto pa_cl_vte_cntl = regs.Get(); + if (pa_cl_vte_cntl.vport_y_scale_ena) { + float viewport_bottom = 0.0f; + if (pa_cl_vte_cntl.vport_y_offset_ena) { + viewport_bottom += regs[XE_GPU_REG_PA_CL_VPORT_YOFFSET].f32; + } + if (regs.Get().vtx_window_offset_enable) { + viewport_bottom += float(window_y_offset); + } + viewport_bottom += std::abs(regs[XE_GPU_REG_PA_CL_VPORT_YSCALE].f32); + uint32_t viewport_bottom_fixed = uint32_t(std::max( + draw_util::FloatToD3D11Fixed16p8(viewport_bottom), int32_t(0))); + uint32_t viewport_bottom_pixels = viewport_bottom_fixed >> 8; + // Without MSAA, the center must be covered - according to the top-left + // rasterization rule, for the bottom, the test is exclusive. If the last + // row is included in the viewport only partially, check if its center is + // precisely potentially covered to round - to more safely catch, for + // example, if the game does something with the half-pixel offset through + // the viewport. + // With MSAA, it's less likely that the game will use the viewport to + // manipulate the half-pixel offset - different host implementations may + // also use different sample positions (up to the topmost row - possible to + // set such sample positions in PC APIs), so just check if the last row's + // area is at least slightly covered. + if ((viewport_bottom_fixed & uint32_t(0xFF)) > + uint32_t(msaa_samples != xenos::MsaaSamples::k1X ? 0 : 0x80)) { + ++viewport_bottom_pixels; + } + height_used = std::min(height_used, viewport_bottom_pixels); + } + uint32_t scissor_bottom = regs.Get().br_y; + if (!regs.Get().window_offset_disable) { + scissor_bottom = uint32_t( + std::max(int32_t(scissor_bottom) + window_y_offset, int32_t(0))); + } + height_used = std::min(height_used, scissor_bottom); + + // Sorted by EDRAM base and then by index in the pipeline - for simplicity, + // treat render targets placed closer to the end of the EDRAM as truncating + // the previous one (and in case multiple render targets are placed at the + // same EDRAM base, though normally this shouldn't happen, treat the color + // ones as more important than the depth one, which may be not needed and just + // a leftover if the draw, for instance, has depth / stencil happening to be + // always passing and never writing with the current state, and also because + // depth testing has to happen before the color is written). Overall it's + // normal for estimated EDRAM ranges of render targets to intersect if drawing + // without a viewport (as there's nothing to clamp the estimated height) and + // multiple render targets are bound. + std::pair + edram_bases_sorted[1 + xenos::kMaxColorRenderTargets]; + uint32_t edram_bases_sorted_count = 0; + rts_remaining = depth_and_color_rts_used_bits; + while (xe::bit_scan_forward(rts_remaining, &rt_index)) { + rts_remaining &= ~(uint32_t(1) << rt_index); + edram_bases_sorted[edram_bases_sorted_count++] = + std::make_pair(edram_bases[rt_index], rt_index); + } + std::sort(edram_bases_sorted, edram_bases_sorted + edram_bases_sorted_count); + uint32_t rt_max_distance_tiles = xenos::kEdramTileCount; + if (cvars::mrt_edram_used_range_clamp_to_min) { + for (uint32_t i = 1; i < edram_bases_sorted_count; ++i) { + rt_max_distance_tiles = + std::min(rt_max_distance_tiles, edram_bases_sorted[i].first - + edram_bases_sorted[i - 1].first); + } + } + + // Make sure all the needed render targets are created, and gather lengths of + // ranges used by each render target. + RenderTargetKey rt_keys[1 + xenos::kMaxColorRenderTargets]; + RenderTarget* rts[1 + xenos::kMaxColorRenderTargets]; + uint32_t rt_lengths_tiles[1 + xenos::kMaxColorRenderTargets]; + uint32_t length_used_tiles_at_32bpp = + ((height_used << uint32_t(msaa_samples >= xenos::MsaaSamples::k2X)) + + (xenos::kEdramTileHeightSamples - 1)) / + xenos::kEdramTileHeightSamples * pitch_tiles_at_32bpp; + for (uint32_t i = 0; i < edram_bases_sorted_count; ++i) { + const std::pair& rt_base_index = edram_bases_sorted[i]; + uint32_t rt_base = rt_base_index.first; + uint32_t rt_bit_index = rt_base_index.second; + RenderTargetKey& rt_key = rt_keys[rt_bit_index]; + rt_key.base_tiles = rt_base; + rt_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; + rt_key.msaa_samples = msaa_samples; + rt_key.is_depth = rt_bit_index == 0; + rt_key.host_relevant_format = host_relevant_formats[rt_bit_index]; + if (!interlock_barrier_only) { + RenderTarget* render_target = GetOrCreateRenderTarget(rt_key); + if (!render_target) { + return false; + } + rts[rt_bit_index] = render_target; + } + rt_lengths_tiles[i] = std::min( + std::min( + length_used_tiles_at_32bpp << ((rts_are_64bpp >> rt_bit_index) & 1), + rt_max_distance_tiles), + ((i + 1 < edram_bases_sorted_count) ? edram_bases_sorted[i + 1].first + : xenos::kEdramTileCount) - + rt_base); + } + + if (interlock_barrier_only) { + // Because a full pixel shader interlock barrier may clear the ownership map + // (since it flushes all previous writes, and there's no need for another + // barrier if an overlap is encountered later between pre-barrier and + // post-barrier usages), check if any overlap requiring a barrier happens, + // and then insert the barrier if needed. + bool interlock_barrier_needed = false; + for (uint32_t i = 0; i < edram_bases_sorted_count; ++i) { + const std::pair& rt_base_index = + edram_bases_sorted[i]; + if (WouldOwnershipChangeRequireTransfers(rt_keys[rt_base_index.second], + rt_base_index.first, + rt_lengths_tiles[i])) { + interlock_barrier_needed = true; + break; + } + } + if (interlock_barrier_needed) { + RequestPixelShaderInterlockBarrier(); + } + } + + // From now on ownership transfers should succeed for simplicity and + // consistency, even if they fail in the implementation (just ignore that and + // draw with whatever contents currently are in the render target in this + // case). + + for (uint32_t i = 0; i < edram_bases_sorted_count; ++i) { + const std::pair& rt_base_index = edram_bases_sorted[i]; + uint32_t rt_bit_index = rt_base_index.second; + ChangeOwnership( + rt_keys[rt_bit_index], rt_base_index.first, rt_lengths_tiles[i], + interlock_barrier_only ? nullptr + : &last_update_transfers_[rt_bit_index]); + } + + if (interlock_barrier_only) { + // No copying transfers or render target bindings - only needed the barrier. + return true; + } + + // If everything succeeded, update the used render targets. + for (uint32_t i = 0; i < 1 + xenos::kMaxColorRenderTargets; ++i) { + last_update_used_render_targets_[i] = + (depth_and_color_rts_used_bits & (uint32_t(1) << i)) ? rts[i] : nullptr; + } + if (are_accumulated_render_targets_valid_) { + // Check if the only re-enabling a previously bound render target. + for (uint32_t i = 0; i < 1 + xenos::kMaxColorRenderTargets; ++i) { + RenderTarget* current_rt = + (depth_and_color_rts_used_bits & (uint32_t(1) << i)) ? rts[i] + : nullptr; + const RenderTarget* accumulated_rt = + last_update_accumulated_render_targets_[i]; + if (!accumulated_rt) { + if (current_rt) { + // Binding a totally new render target - won't keep the existing + // render pass anyway, no much need to try to re-enable previously + // disabled render targets in other slots as well, even though that + // would be valid. + are_accumulated_render_targets_valid_ = false; + break; + } + // Append the new render target. + last_update_accumulated_render_targets_[i] = current_rt; + continue; + } + if (current_rt) { + if (current_rt != accumulated_rt) { + // Changing a render target in a slot. + are_accumulated_render_targets_valid_ = false; + break; + } + } else { + RenderTargetKey accumulated_rt_key = accumulated_rt->key(); + if (accumulated_rt_key.pitch_tiles_at_32bpp != pitch_tiles_at_32bpp || + accumulated_rt_key.msaa_samples != msaa_samples) { + // The previously bound render target is incompatible with the + // current surface info. + are_accumulated_render_targets_valid_ = false; + break; + } + } + } + // Make sure the same render target isn't bound into two different slots + // over time. + for (uint32_t i = 1; are_accumulated_render_targets_valid_ && + i < 1 + xenos::kMaxColorRenderTargets; + ++i) { + const RenderTarget* render_target = + last_update_accumulated_render_targets_[i]; + if (!render_target) { + continue; + } + for (uint32_t j = 0; j < i; ++j) { + if (last_update_accumulated_render_targets_[j] == render_target) { + are_accumulated_render_targets_valid_ = false; + break; + } + } + } + } + if (!are_accumulated_render_targets_valid_) { + std::memcpy(last_update_accumulated_render_targets_, + last_update_used_render_targets_, + sizeof(last_update_accumulated_render_targets_)); + last_update_accumulated_color_targets_are_gamma_ = 0; + are_accumulated_render_targets_valid_ = true; + } + // Only update color space of render targets that actually matter here, don't + // disable gamma emulation (which may require ending the render pass) on the + // host, for example, if making a depth-only draw between color draws with a + // gamma target. + uint32_t color_rts_used_bits = depth_and_color_rts_used_bits >> 1; + // Ignore any render targets dropped before in this function for any reason. + color_rts_are_gamma &= color_rts_used_bits; + last_update_accumulated_color_targets_are_gamma_ = + (last_update_accumulated_color_targets_are_gamma_ & + ~color_rts_used_bits) | + color_rts_are_gamma; + + return true; +} + +uint32_t RenderTargetCache::GetLastUpdateBoundRenderTargets( + uint32_t* depth_and_color_formats_out) const { + if (GetPath() != Path::kHostRenderTargets) { + if (depth_and_color_formats_out) { + std::memset(depth_and_color_formats_out, 0, + sizeof(uint32_t) * (1 + xenos::kMaxColorRenderTargets)); + } + return 0; + } + uint32_t rts_used = 0; + for (uint32_t i = 0; i < 1 + xenos::kMaxColorRenderTargets; ++i) { + const RenderTarget* render_target = + last_update_accumulated_render_targets_[i]; + if (!render_target) { + if (depth_and_color_formats_out) { + depth_and_color_formats_out[i] = 0; + } + continue; + } + rts_used |= uint32_t(1) << i; + if (depth_and_color_formats_out) { + depth_and_color_formats_out[i] = + render_target->key().host_relevant_format; + } + } + return rts_used; +} + +RenderTargetCache::DepthFloat24Conversion +RenderTargetCache::GetConfigDepthFloat24Conversion() { + if (cvars::depth_float24_conversion == "truncate") { + return DepthFloat24Conversion::kOnOutputTruncating; + } + if (cvars::depth_float24_conversion == "round") { + return DepthFloat24Conversion::kOnOutputRounding; + } + return DepthFloat24Conversion::kOnCopy; +} + +uint32_t RenderTargetCache::GetRenderTargetHeight( + uint32_t pitch_tiles_at_32bpp, xenos::MsaaSamples msaa_samples) const { + assert_not_zero(pitch_tiles_at_32bpp); + // Down to the end of EDRAM. + uint32_t tile_rows = (xenos::kEdramTileCount + (pitch_tiles_at_32bpp - 1)) / + pitch_tiles_at_32bpp; + // Clamp to the guest limit (tile padding should exceed it) and to the host + // limit (tile padding mustn't exceed it). + static_assert( + !(xenos::kTexture2DCubeMaxWidthHeight % xenos::kEdramTileHeightSamples), + "Maximum guest render target height is assumed to always be a multiple " + "of an EDRAM tile height"); + uint32_t resolution_scale = GetResolutionScale(); + uint32_t max_height_scaled = + std::min(xenos::kTexture2DCubeMaxWidthHeight * resolution_scale, + GetMaxRenderTargetHeight()); + uint32_t msaa_samples_y_log2 = + uint32_t(msaa_samples >= xenos::MsaaSamples::k2X); + uint32_t tile_height_samples_scaled = + xenos::kEdramTileHeightSamples * resolution_scale; + tile_rows = std::min(tile_rows, (max_height_scaled << msaa_samples_y_log2) / + tile_height_samples_scaled); + assert_not_zero(tile_rows); + return tile_rows * (xenos::kEdramTileHeightSamples >> msaa_samples_y_log2); +} + +void RenderTargetCache::GetResolveCopyRectanglesToDump( + uint32_t base, uint32_t row_length, uint32_t rows, uint32_t pitch, + std::vector& rectangles_out) const { + rectangles_out.clear(); + assert_true(row_length <= pitch); + row_length = std::min(row_length, pitch); + if (!row_length || !rows) { + return; + } + uint32_t resolve_area_end = base + (rows - 1) * pitch + row_length; + // Collect render targets owning ranges within the specified rectangle. The + // first render target in the range may be before the lower_bound, only being + // in the range with its tail. + auto it = ownership_ranges_.lower_bound(base); + if (it != ownership_ranges_.cbegin()) { + auto it_pre = std::prev(it); + if (it_pre->second.end_tiles > base) { + it = it_pre; + } + } + for (; it != ownership_ranges_.cend(); ++it) { + uint32_t range_global_start = std::max(it->first, base); + if (range_global_start >= resolve_area_end) { + break; + } + RenderTargetKey rt_key = it->second.render_target; + if (rt_key.IsEmpty()) { + continue; + } + // Merge with other render target ranges with the same current ownership, + // but different depth ownership, since it's not relevant to resolving. + while (it != ownership_ranges_.cend()) { + auto it_next = std::next(it); + if (it_next == ownership_ranges_.cend() || + it_next->first >= resolve_area_end || + it_next->second.render_target != rt_key) { + break; + } + it = it_next; + } + + uint32_t range_local_start = std::max(range_global_start, base) - base; + uint32_t range_local_end = + std::min(it->second.end_tiles, resolve_area_end) - base; + assert_true(range_local_start < range_local_end); + + uint32_t rows_start = range_local_start / pitch; + uint32_t rows_end = (range_local_end + (pitch - 1)) / pitch; + uint32_t row_first_start = range_local_start - rows_start * pitch; + if (row_first_start >= row_length) { + // The first row starts within the pitch padding. + if (rows_start + 1 < rows_end) { + // Multiple rows - start at the second. + ++rows_start; + row_first_start = 0; + } else { + // Single row - nothing to dump. + continue; + } + } + + auto it_rt = render_targets_.find(rt_key); + assert_true(it_rt != render_targets_.cend()); + assert_not_null(it_rt->second); + // Don't include pitch padding in the last row. + rectangles_out.emplace_back( + it_rt->second, rows_start, rows_end - rows_start, row_first_start, + std::min(pitch - (rows_end * pitch - range_local_end), row_length)); + } +} + +bool RenderTargetCache::PrepareHostRenderTargetsResolveClear( + const draw_util::ResolveInfo& resolve_info, + Transfer::Rectangle& clear_rectangle_out, + RenderTarget*& depth_render_target_out, + std::vector& depth_transfers_out, + RenderTarget*& color_render_target_out, + std::vector& color_transfers_out) { + assert_true(GetPath() == Path::kHostRenderTargets); + + uint32_t pitch_tiles_at_32bpp; + uint32_t base_offset_tiles_at_32bpp; + xenos::MsaaSamples msaa_samples; + if (resolve_info.IsClearingDepth()) { + pitch_tiles_at_32bpp = resolve_info.depth_edram_info.pitch_tiles; + base_offset_tiles_at_32bpp = resolve_info.depth_edram_info.base_tiles - + resolve_info.depth_original_base; + msaa_samples = resolve_info.depth_edram_info.msaa_samples; + } else if (resolve_info.IsClearingColor()) { + pitch_tiles_at_32bpp = resolve_info.color_edram_info.pitch_tiles; + base_offset_tiles_at_32bpp = resolve_info.color_edram_info.base_tiles - + resolve_info.color_original_base; + if (resolve_info.color_edram_info.format_is_64bpp) { + assert_zero(pitch_tiles_at_32bpp & 1); + pitch_tiles_at_32bpp >>= 1; + assert_zero(base_offset_tiles_at_32bpp & 1); + base_offset_tiles_at_32bpp >>= 1; + } + msaa_samples = resolve_info.color_edram_info.msaa_samples; + } else { + return false; + } + assert_true(msaa_samples <= xenos::MsaaSamples::k4X); + if (!pitch_tiles_at_32bpp) { + return false; + } + uint32_t msaa_samples_x_log2 = + uint32_t(msaa_samples >= xenos::MsaaSamples::k4X); + uint32_t msaa_samples_y_log2 = + uint32_t(msaa_samples >= xenos::MsaaSamples::k2X); + if (pitch_tiles_at_32bpp > + ((xenos::kTexture2DCubeMaxWidthHeight << msaa_samples_x_log2) + + (xenos::kEdramTileWidthSamples - 1)) / + xenos::kEdramTileWidthSamples) { + XELOGE( + "Surface pitch in 80-sample groups {} at {}x MSAA larger than the " + "maximum texture width {} specified by the guest in a resolve", + pitch_tiles_at_32bpp, uint32_t(1) << uint32_t(msaa_samples), + xenos::kTexture2DCubeMaxWidthHeight); + return false; + } + uint32_t pitch_pixels = + pitch_tiles_at_32bpp * + (xenos::kEdramTileWidthSamples >> msaa_samples_x_log2); + uint32_t pitch_pixels_scaled = pitch_pixels * GetResolutionScale(); + uint32_t max_render_target_width = GetMaxRenderTargetWidth(); + if (pitch_pixels_scaled > max_render_target_width) { + // TODO(Triang3l): If really needed for some game on some device, clamp the + // pitch the same way as explained in the comment in Update. + XELOGE( + "Surface pitch aligned to EDRAM tiles and resolution-scaled {} larger " + "than the maximum host render target width {} in a resolve", + pitch_pixels_scaled, max_render_target_width); + return false; + } + + uint32_t render_target_height_pixels = + GetRenderTargetHeight(pitch_tiles_at_32bpp, msaa_samples); + uint32_t base_offset_rows_at_32bpp = + base_offset_tiles_at_32bpp / pitch_tiles_at_32bpp; + Transfer::Rectangle clear_rectangle; + clear_rectangle.x_pixels = + std::min((base_offset_tiles_at_32bpp - + base_offset_rows_at_32bpp * pitch_tiles_at_32bpp) * + (xenos::kEdramTileWidthSamples >> msaa_samples_x_log2) + + resolve_info.address.local_x_div_8 * uint32_t(8), + pitch_pixels); + clear_rectangle.y_pixels = + std::min(base_offset_rows_at_32bpp * + (xenos::kEdramTileHeightSamples >> msaa_samples_y_log2) + + resolve_info.address.local_y_div_8 * uint32_t(8), + render_target_height_pixels); + clear_rectangle.width_pixels = + std::min(resolve_info.address.width_div_8 * uint32_t(8), + pitch_pixels - clear_rectangle.x_pixels); + clear_rectangle.height_pixels = + std::min(resolve_info.address.height_div_8 * uint32_t(8), + render_target_height_pixels - clear_rectangle.y_pixels); + if (!clear_rectangle.width_pixels || !clear_rectangle.height_pixels) { + // Outside the pitch / height (or initially specified as 0). + return false; + } + + // Change ownership of the tiles containing the area to be cleared, so the + // up-to-date host render target for the cleared range will be the cleared + // one. + uint32_t clear_start_tiles_at_32bpp = + ((clear_rectangle.y_pixels << msaa_samples_y_log2) / + xenos::kEdramTileHeightSamples) * + pitch_tiles_at_32bpp + + (clear_rectangle.x_pixels << msaa_samples_x_log2) / + xenos::kEdramTileWidthSamples; + uint32_t clear_length_tiles_at_32bpp = + (((clear_rectangle.y_pixels + clear_rectangle.height_pixels - 1) + << msaa_samples_y_log2) / + xenos::kEdramTileHeightSamples) * + pitch_tiles_at_32bpp + + ((clear_rectangle.x_pixels + clear_rectangle.width_pixels - 1) + << msaa_samples_x_log2) / + xenos::kEdramTileWidthSamples + + 1 - clear_start_tiles_at_32bpp; + uint32_t depth_clear_start_tiles = + resolve_info.IsClearingDepth() + ? std::min( + resolve_info.depth_original_base + clear_start_tiles_at_32bpp, + xenos::kEdramTileCount) + : xenos::kEdramTileCount; + uint32_t color_clear_start_tiles = + resolve_info.IsClearingColor() + ? std::min(resolve_info.color_original_base + + (clear_start_tiles_at_32bpp + << resolve_info.color_edram_info.format_is_64bpp), + xenos::kEdramTileCount) + : xenos::kEdramTileCount; + uint32_t depth_clear_end_tiles = + std::min(depth_clear_start_tiles + clear_length_tiles_at_32bpp, + xenos::kEdramTileCount); + uint32_t color_clear_end_tiles = + std::min(color_clear_start_tiles + + (clear_length_tiles_at_32bpp + << resolve_info.color_edram_info.format_is_64bpp), + xenos::kEdramTileCount); + // Prevent overlap. + if (depth_clear_start_tiles < color_clear_start_tiles) { + depth_clear_end_tiles = + std::min(depth_clear_end_tiles, color_clear_start_tiles); + } else { + color_clear_end_tiles = + std::min(color_clear_end_tiles, depth_clear_start_tiles); + } + + RenderTargetKey depth_render_target_key; + RenderTarget* depth_render_target = nullptr; + if (depth_clear_start_tiles < depth_clear_end_tiles) { + depth_render_target_key.base_tiles = resolve_info.depth_original_base; + depth_render_target_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; + depth_render_target_key.msaa_samples = msaa_samples; + depth_render_target_key.is_depth = 1; + depth_render_target_key.host_relevant_format = + resolve_info.depth_edram_info.format; + depth_render_target = GetOrCreateRenderTarget(depth_render_target_key); + if (!depth_render_target) { + depth_render_target_key = RenderTargetKey(); + depth_clear_start_tiles = depth_clear_end_tiles; + } + } + RenderTargetKey color_render_target_key; + RenderTarget* color_render_target = nullptr; + if (color_clear_start_tiles < color_clear_end_tiles) { + color_render_target_key.base_tiles = resolve_info.color_original_base; + color_render_target_key.pitch_tiles_at_32bpp = pitch_tiles_at_32bpp; + color_render_target_key.msaa_samples = msaa_samples; + color_render_target_key.is_depth = 0; + color_render_target_key.host_relevant_format = + uint32_t(GetHostRelevantColorFormat(xenos::ColorRenderTargetFormat( + resolve_info.color_edram_info.format))); + color_render_target = GetOrCreateRenderTarget(color_render_target_key); + if (!color_render_target) { + color_render_target_key = RenderTargetKey(); + color_clear_start_tiles = color_clear_end_tiles; + } + } + if (depth_clear_start_tiles >= depth_clear_end_tiles && + color_clear_start_tiles >= color_clear_end_tiles) { + // The region turned out to be outside the EDRAM, or there's complete + // overlap, shouldn't be happening. Or failed to create both render targets. + return false; + } + + clear_rectangle_out = clear_rectangle; + depth_render_target_out = depth_render_target; + depth_transfers_out.clear(); + if (depth_render_target) { + ChangeOwnership(depth_render_target_key, depth_clear_start_tiles, + depth_clear_end_tiles - depth_clear_start_tiles, + &depth_transfers_out, &clear_rectangle); + } + color_render_target_out = color_render_target; + color_transfers_out.clear(); + if (color_render_target) { + ChangeOwnership(color_render_target_key, color_clear_start_tiles, + color_clear_end_tiles - color_clear_start_tiles, + &color_transfers_out, &clear_rectangle); + } + return true; +} + +RenderTargetCache::RenderTarget* +RenderTargetCache::PrepareFullEdram1280xRenderTargetForSnapshotRestoration( + xenos::ColorRenderTargetFormat color_format) { + assert_true(GetPath() == Path::kHostRenderTargets); + uint32_t resolution_scale = GetResolutionScale(); + constexpr uint32_t kPitchTilesAt32bpp = 16; + constexpr uint32_t kWidth = + kPitchTilesAt32bpp * xenos::kEdramTileWidthSamples; + if (kWidth * resolution_scale > GetMaxRenderTargetWidth()) { + return nullptr; + } + // Same render target height is used for 32bpp and 64bpp to allow mixing them. + constexpr uint32_t kHeightTileRows = + xenos::kEdramTileCount / kPitchTilesAt32bpp; + static_assert( + kPitchTilesAt32bpp * kHeightTileRows == xenos::kEdramTileCount, + "Using width of the render target for EDRAM snapshot restoration that is " + "expected to result in the last row being fully utilized."); + constexpr uint32_t kHeight = kHeightTileRows * xenos::kEdramTileHeightSamples; + static_assert( + kHeight <= xenos::kTexture2DCubeMaxWidthHeight, + "Using width of the render target for EDRAM snapshot restoration that is " + "expect to fully cover the EDRAM without exceeding the maximum guest " + "render target height."); + if (kHeight * resolution_scale > GetMaxRenderTargetHeight()) { + return nullptr; + } + RenderTargetKey render_target_key; + render_target_key.pitch_tiles_at_32bpp = kPitchTilesAt32bpp; + render_target_key.host_relevant_format = uint32_t( + GetHostRelevantColorFormat(xenos::GetStorageColorFormat(color_format))); + RenderTarget* render_target = GetOrCreateRenderTarget(render_target_key); + if (!render_target) { + return nullptr; + } + // Change ownership, but don't transfer the contents - they will be replaced + // anyway. + ownership_ranges_.clear(); + ownership_ranges_.emplace( + std::piecewise_construct, std::forward_as_tuple(uint32_t(0)), + std::forward_as_tuple(xenos::kEdramTileCount, render_target_key, + RenderTargetKey(), RenderTargetKey())); + return render_target; +} + +void RenderTargetCache::PixelShaderInterlockFullEdramBarrierPlaced() { + assert_true(GetPath() == Path::kPixelShaderInterlock); + // Clear ownership - any overlap of data written before the barrier is safe. + OwnershipRange empty_range(xenos::kEdramTileCount, RenderTargetKey(), + RenderTargetKey(), RenderTargetKey()); + if (ownership_ranges_.size() == 1) { + // Do not reallocate map elements if not needed (either nothing drawn since + // the last barrier, or all of the EDRAM is owned by one render target). + // The ownership map contains no gaps - the first element should always be + // at 0. + assert_true(!ownership_ranges_.begin()->first); + OwnershipRange& all_edram_range = ownership_ranges_.begin()->second; + assert_true(all_edram_range.end_tiles == xenos::kEdramTileCount); + all_edram_range = empty_range; + return; + } + ownership_ranges_.clear(); + ownership_ranges_.emplace(0, empty_range); +} + +RenderTargetCache::RenderTarget* RenderTargetCache::GetOrCreateRenderTarget( + RenderTargetKey key) { + assert_true(GetPath() == Path::kHostRenderTargets); + auto it_rt = render_targets_.find(key); + RenderTarget* render_target; + if (it_rt != render_targets_.end()) { + render_target = it_rt->second; + } else { + render_target = CreateRenderTarget(key); + uint32_t width = key.GetWidth(); + uint32_t height = + GetRenderTargetHeight(key.pitch_tiles_at_32bpp, key.msaa_samples); + if (render_target) { + XELOGGPU( + "Created a {}x{} {}xMSAA {} render target with guest format {} at " + "EDRAM base {}", + width, height, uint32_t(1) << uint32_t(key.msaa_samples), + key.is_depth ? "depth" : "color", key.host_relevant_format, + key.base_tiles); + } else { + XELOGE( + "Failed to create a {}x{} {}xMSAA {} render target with guest format " + "{} at EDRAM base {}", + width, height, uint32_t(1) << uint32_t(key.msaa_samples), + key.is_depth ? "depth" : "color", key.host_relevant_format, + key.base_tiles); + } + // Insert even if failed to create, not to try to create again. + render_targets_.emplace(key, render_target); + } + return render_target; +} + +bool RenderTargetCache::WouldOwnershipChangeRequireTransfers( + RenderTargetKey dest, uint32_t start_tiles, uint32_t length_tiles) const { + assert_true(start_tiles >= dest.base_tiles); + assert_true(length_tiles <= (xenos::kEdramTileCount - start_tiles)); + if (length_tiles == 0) { + return false; + } + bool host_depth_encoding_different = + dest.is_depth && GetPath() == Path::kHostRenderTargets && + IsHostDepthEncodingDifferent(dest.GetDepthFormat()); + // The map contains consecutive ranges, merged if the adjacent ones are the + // same. Find the range starting at >= the start. A portion of the range + // preceding it may be intersecting the render target's range (or even fully + // contain it). + uint32_t end_tiles = start_tiles + length_tiles; + auto it = ownership_ranges_.lower_bound(start_tiles); + if (it != ownership_ranges_.begin()) { + auto it_pre = std::prev(it); + if (it_pre->second.end_tiles > start_tiles) { + it = it_pre; + } + } + for (; it != ownership_ranges_.end(); ++it) { + if (it->first >= end_tiles) { + // Outside the touched range already. + break; + } + if (it->second.IsOwnedBy(dest, host_depth_encoding_different)) { + // Already owned by the needed render target - no need to transfer + // anything. + continue; + } + RenderTargetKey transfer_source = it->second.render_target; + // Only perform the transfer when actually changing the latest owner, not + // just the latest host depth owner - the transfer source is expected to + // be different than the destination. + if (!transfer_source.IsEmpty() && transfer_source != dest) { + return true; + } + } + return false; +} + +void RenderTargetCache::ChangeOwnership( + RenderTargetKey dest, uint32_t start_tiles, uint32_t length_tiles, + std::vector* transfers_append_out, + const Transfer::Rectangle* resolve_clear_cutout) { + assert_true(start_tiles >= dest.base_tiles); + assert_true(length_tiles <= (xenos::kEdramTileCount - start_tiles)); + if (length_tiles == 0) { + return; + } + uint32_t dest_pitch_tiles = dest.GetPitchTiles(); + bool dest_is_64bpp = dest.Is64bpp(); + + bool host_depth_encoding_different = + dest.is_depth && GetPath() == Path::kHostRenderTargets && + IsHostDepthEncodingDifferent(dest.GetDepthFormat()); + // The map contains consecutive ranges, merged if the adjacent ones are the + // same. Find the range starting at >= the start. A portion of the range + // preceding it may be intersecting the render target's range (or even fully + // contain it) - split it into the untouched head and the claimed tail if + // needed. + uint32_t end_tiles = start_tiles + length_tiles; + auto it = ownership_ranges_.lower_bound(start_tiles); + if (it != ownership_ranges_.begin()) { + auto it_pre = std::prev(it); + if (it_pre->second.end_tiles > start_tiles && + !it_pre->second.IsOwnedBy(dest, host_depth_encoding_different)) { + // Different render target overlapping the range - split the head. + ownership_ranges_.emplace(start_tiles, it_pre->second); + it_pre->second.end_tiles = start_tiles; + // Let the next loop do the transfer and needed merging and splitting + // starting from the added tail. + it = std::next(it_pre); + } + } + while (it != ownership_ranges_.end()) { + if (it->first >= end_tiles) { + // Outside the touched range already. + break; + } + if (it->second.IsOwnedBy(dest, host_depth_encoding_different)) { + // Already owned by the needed render target - no need to transfer + // anything. + ++it; + continue; + } + // Take over the current range. Handle the tail - may be outside the range + // (split in this case) or within it. + if (it->second.end_tiles > end_tiles) { + // Split the tail. + ownership_ranges_.emplace(end_tiles, it->second); + it->second.end_tiles = end_tiles; + } + if (transfers_append_out) { + RenderTargetKey transfer_source = it->second.render_target; + // Only perform the copying when actually changing the latest owner, not + // just the latest host depth owner - the transfer source is expected to + // be different than the destination. + if (!transfer_source.IsEmpty() && transfer_source != dest) { + uint32_t transfer_end_tiles = std::min(it->second.end_tiles, end_tiles); + if (!resolve_clear_cutout || + Transfer::GetRangeRectangles(it->first, transfer_end_tiles, + dest.base_tiles, dest_pitch_tiles, + dest.msaa_samples, dest_is_64bpp, + nullptr, resolve_clear_cutout)) { + RenderTargetKey transfer_host_depth_source = + host_depth_encoding_different + ? it->second + .host_depth_render_targets[dest.host_relevant_format] + : RenderTargetKey(); + if (transfer_host_depth_source == transfer_source) { + // Same render target, don't provide a separate host depth source. + transfer_host_depth_source = RenderTargetKey(); + } + if (!transfers_append_out->empty() && + transfers_append_out->back().end_tiles == it->first && + transfers_append_out->back().source->key() == transfer_source && + ((transfers_append_out->back().host_depth_source == nullptr) == + transfer_host_depth_source.IsEmpty()) && + (transfer_host_depth_source.IsEmpty() || + transfers_append_out->back().host_depth_source->key() == + transfer_host_depth_source)) { + // Extend the last transfer if, for example, transferring color, but + // host depth is different. + transfers_append_out->back().end_tiles = transfer_end_tiles; + } else { + auto transfer_source_rt_it = render_targets_.find(transfer_source); + if (transfer_source_rt_it != render_targets_.end()) { + assert_not_null(transfer_source_rt_it->second); + auto transfer_host_depth_source_rt_it = + !transfer_host_depth_source.IsEmpty() + ? render_targets_.find(transfer_host_depth_source) + : render_targets_.end(); + if (transfer_host_depth_source.IsEmpty() || + transfer_host_depth_source_rt_it != render_targets_.end()) { + assert_false(transfer_host_depth_source_rt_it != + render_targets_.end() && + !transfer_host_depth_source_rt_it->second); + transfers_append_out->emplace_back( + it->first, transfer_end_tiles, + transfer_source_rt_it->second, + transfer_host_depth_source_rt_it != render_targets_.end() + ? transfer_host_depth_source_rt_it->second + : nullptr); + } + } + } + } + } + } + // Claim the current range. + it->second.render_target = dest; + if (host_depth_encoding_different) { + it->second.host_depth_render_targets[dest.host_relevant_format] = dest; + } + // Check if can merge with the next range after claiming. + std::map::iterator it_next; + if (it != ownership_ranges_.end()) { + it_next = std::next(it); + if (it_next != ownership_ranges_.end() && + it_next->second.AreOwnersSame(it->second)) { + // Merge with the next range. + it->second.end_tiles = it_next->second.end_tiles; + auto it_after = std::next(it_next); + ownership_ranges_.erase(it_next); + it_next = it_after; + } + } else { + it_next = ownership_ranges_.end(); + } + // Check if can merge with the previous range after claiming and merging + // with the next (thus obtaining the correct end pointer). + if (it != ownership_ranges_.begin()) { + auto it_prev = std::prev(it); + if (it_prev->second.AreOwnersSame(it->second)) { + it_prev->second.end_tiles = it->second.end_tiles; + ownership_ranges_.erase(it); + } + } + it = it_next; + } +} + +} // namespace gpu +} // namespace xe diff --git a/src/xenia/gpu/render_target_cache.h b/src/xenia/gpu/render_target_cache.h new file mode 100644 index 000000000..bd4def049 --- /dev/null +++ b/src/xenia/gpu/render_target_cache.h @@ -0,0 +1,651 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_GPU_RENDER_TARGET_CACHE_H_ +#define XENIA_GPU_RENDER_TARGET_CACHE_H_ + +#include +#include +#include +#include +#include +#include + +#include "third_party/fmt/include/fmt/format.h" +#include "xenia/base/assert.h" +#include "xenia/base/cvar.h" +#include "xenia/gpu/draw_util.h" +#include "xenia/gpu/register_file.h" +#include "xenia/gpu/xenos.h" + +DECLARE_bool(depth_transfer_not_equal_test); +DECLARE_int32(draw_resolution_scale); +DECLARE_bool(draw_resolution_scaled_texture_offsets); +DECLARE_bool(gamma_render_target_as_srgb); +DECLARE_bool(native_2x_msaa); +DECLARE_bool(native_stencil_value_output); +DECLARE_bool(snorm16_render_target_full_range); + +namespace xe { +namespace gpu { + +class RenderTargetCache { + public: + // High-level emulation logic implementation path. + enum class Path { + // Approximate method using conventional host render targets and copying + // ("transferring ownership" of tiles) between render targets to support + // aliasing. + // + // May be irreparably inaccurate, completely at the mercy of the host API's + // fixed-function output-merger, primarily because it has to perform + // blending - and when using a different pixel format, it will behave + // differently (the most important factor here is the range - it's clamped + // for normalized formats, but not for floating-point ones). + // + // On a Direct3D 11-level device, formats which can be mapped directly + // (disregarding things like blending internal precision details): + // - 8_8_8_8 + // - 2_10_10_10 + // - 32_FLOAT + // - 32_32_FLOAT + // - D24S8 + // Can be mapped directly, but require handling in shaders: + // - D24FS8 with truncated SV_DepthLessEqual output (or SV_Depth, which is + // suboptimal, as it prevents early depth / stencil from working). To + // support bit-exact reinterpretation to and from D24F for unmodified + // areas using pixel shader depth output without unrestricted depth range, + // 0...1 of the guest depth should be mapped to 0...0.5 on the host in the + // viewport and conversion. + // Can be mapped directly, but not supporting rare edge cases: + // - 16_16_FLOAT, k_16_16_16_16_FLOAT - the Xenos float16 doesn't have + // special values. + // Significant differences: + // - 8_8_8_8_GAMMA - the piecewise linear gamma curve is very different than + // sRGB, one possible path is conversion in shaders (resulting in + // incorrect blending, especially visible on decals in Halo 3), another is + // using sRGB render targets and either conversion on resolve or reading + // the resolved data as a true sRGB texture (incorrect when the game + // accesses the data directly, like The Orange Box). + // - 2_10_10_10_FLOAT - ranges significantly different than in float16, much + // smaller RGB range, and alpha is fixed-point and has only 2 bits. + // - 16_16, 16_16_16_16 - has -32 to 32 range, not -1 to 1 - need either to + // truncate the range for blending to work correctly, or divide by 32 in + // shaders breaking multiplication in blending. + kHostRenderTargets, + + // Custom output-merger implementation, with full per-pixel and per-sample + // control, however, only available on hosts with raster-ordered writes from + // pixel shaders. + kPixelShaderInterlock, + }; + + enum class DepthFloat24Conversion { + // Doing depth test at the host precision, converting to 20e4 to support + // reinterpretation, but keeping track of both the last color (or non-20e4 + // depth) value (let's call it stored_f24) and the last host depth value + // (stored_host) for each EDRAM pixel, reloading the last host depth value + // if stored_f24 == to_f24(stored_host) (otherwise it was overwritten by + // something else, like clearing, or an actually used color buffer; this is + // inexact though, and will incorrectly load pixels that were overwritten by + // something else in the EDRAM, but turned out to have the same value on the + // guest as before - an outdated host-precision value will be loaded in + // these cases instead). + // + // EDRAM > RAM, then reusing the EDRAM region for something else > EDRAM + // round trip destroys precision beyond repair. + // + // Full host early Z and MSAA with pixel-rate shading are supported. + kOnCopy, + // Converting the depth to the closest host value representable exactly as a + // 20e4 float in pixel shaders, to support invariance in cases when the + // guest reuploads a previously resolved depth buffer to the EDRAM, rounding + // towards zero (which contradicts the rounding used by the Direct3D 9 + // reference rasterizer, but allows less-than-or-equal pixel shader depth + // output to be used to preserve most of early Z culling when the game is + // using reversed depth, which is the usual way of doing depth testing on + // the Xbox 360 and of utilizing the advantages of a floating-point + // encoding). + // + // With MSAA, pixel shaders must run at sample frequency - otherwise, if the + // depth is the same for the entire pixel, intersections of polygons cannot + // be antialiased. + // + // Important usage note: When using this mode, bounds of the fixed-function + // viewport must be converted to and back from float24 too (preferably using + // correct rounding to the nearest even, to reduce the error already caused + // by truncation rather than to amplify it). This ensures that clamping to + // the viewport bounds, which happens after the pixel shader even if it + // overwrites the resulting depth, is never done to a value not + // representable as float24 (for example, if the minimum Z is a number too + // small to be represented as float24, but not zero, it won't be possible to + // write what should become 0x000000 to the depth buffer). Note that this + // may add some error to the depth values from the rasterizer; however, + // modifying Z in the vertex shader to make interpolated depth values would + // cause clipping to be done to different bounds, which may be more + // undesirable, especially in cases when Z is explicitly set to a value like + // 0 or W (in such cases, the adjusted polygon may go outside 0...W in clip + // space and disappear). + kOnOutputTruncating, + // Similar to kOnOutputTruncating, but rounding to the nearest even, more + // correctly, however, because the resulting depth can be bigger than the + // original host value, early depth testing can't be used at all. Same + // viewport usage rules apply. + kOnOutputRounding, + }; + + // Useful host-specific values. + // sRGB conversion from the Direct3D 11.3 functional specification. + static constexpr float kSrgbToLinearDenominator1 = 12.92f; + static constexpr float kSrgbToLinearDenominator2 = 1.055f; + static constexpr float kSrgbToLinearExponent = 2.4f; + static constexpr float kSrgbToLinearOffset = 0.055f; + static constexpr float kSrgbToLinearThreshold = 0.04045f; + static constexpr float SrgbToLinear(float srgb) { + // 0 and 1 must be exactly achievable, also convert NaN to 0. + if (!(srgb > 0.0f)) { + return 0.0f; + } + if (!(srgb < 1.0f)) { + return 1.0f; + } + if (srgb <= kSrgbToLinearThreshold) { + return srgb / kSrgbToLinearDenominator1; + } + return std::pow((srgb + kSrgbToLinearOffset) / kSrgbToLinearDenominator2, + kSrgbToLinearExponent); + } + + virtual ~RenderTargetCache(); + + virtual Path GetPath() const = 0; + + virtual uint32_t GetResolutionScale() const = 0; + + // Virtual (both the common code and the implementation may do something + // here), don't call from destructors (does work not needed for shutdown + // also). + virtual void ClearCache(); + + virtual void BeginFrame(); + + virtual bool Update(bool is_rasterization_done, + uint32_t shader_writes_color_targets); + + // Returns bits where 0 is whether a depth render target is currently bound on + // the host and 1... are whether the same applies to color render targets, and + // "host-relevant" formats of each. + uint32_t GetLastUpdateBoundRenderTargets( + uint32_t* depth_and_color_formats_out = nullptr) const; + + protected: + RenderTargetCache(const RegisterFile& register_file) + : register_file_(register_file) {} + + const RegisterFile& register_file() const { return register_file_; } + + // Call last in implementation-specific initialization (when things like path + // are initialized by the implementation). + void InitializeCommon(); + // Call last in implementation-specific shutdown, also callable from the + // destructor. + void ShutdownCommon(); + + // For host render targets, implemented via transfer of ownership of EDRAM + // 80x16-sample tiles between host render targets. When a range is + // transferred, its data is copied, bit-exactly from the guest's perspective + // (when dangerous, such as because of non-propagated NaN, primarily in the + // float16 case, by drawing to an integer view of the render target texture), + // from the previous host render target to the new one, by drawing rectangles + // with a pixel shader converting the previous host render target to a guest + // bit pattern, reinterpreting it in the new format. If depth is emulated with + // float32, this may lead to loss of data - specifically for depth, both guest + // format ownership and float32 ownership are tracked, and to let color data + // overwrite depth data, loading during ownership transfer is done from + // intersections of the current guest ownership ranges and float32 ownership + // ranges. Ownership transfer happens when a render target is needed - based + // on the current viewport; or, if no viewport is available, ownership of the + // rest of the EDRAM is transferred. + + union RenderTargetKey { + struct { + // [0, 2047]. + uint32_t base_tiles : xenos::kEdramBaseTilesBits - 1; // 11 + // At 4x MSAA (2 horizontal samples), max. align(8192 * 2, 80) / 80 = 205. + // For pitch at 64bpp, multiply by 2 (or use GetPitchTiles). + uint32_t pitch_tiles_at_32bpp : 8; // 19 + xenos::MsaaSamples msaa_samples : xenos::kMsaaSamplesBits; // 21 + uint32_t is_depth : 1; // 22 + // Not always the original format - blending precision ignored, formats + // handled through the same render targets on the host are normalized, and + // with pixel shader interlock, replaced with some single 32bpp or 64bpp + // format because it's only needed for addressing. + uint32_t host_relevant_format : xenos::kRenderTargetFormatBits; // 26 + }; + uint32_t key = 0; + struct Hasher { + size_t operator()(const RenderTargetKey& key) const { + return std::hash{}(key.key); + } + }; + bool operator==(const RenderTargetKey& other_key) const { + return key == other_key.key; + } + bool operator!=(const RenderTargetKey& other_key) const { + return !(*this == other_key); + } + + bool IsEmpty() const { + // Meaningless when pitch_tiles_at_32bpp == 0, but for comparison + // purposes, only treat everything being 0 as a special case. + return key == 0; + } + + xenos::ColorRenderTargetFormat GetColorFormat() const { + assert_false(is_depth); + return xenos::ColorRenderTargetFormat(host_relevant_format); + } + xenos::DepthRenderTargetFormat GetDepthFormat() const { + assert_true(is_depth); + return xenos::DepthRenderTargetFormat(host_relevant_format); + } + bool Is64bpp() const { + if (is_depth) { + return false; + } + return xenos::IsColorRenderTargetFormat64bpp(GetColorFormat()); + } + + uint32_t GetPitchTiles() const { + return pitch_tiles_at_32bpp << uint32_t(Is64bpp()); + } + uint32_t GetWidth() const { + return pitch_tiles_at_32bpp * + (xenos::kEdramTileWidthSamples >> + uint32_t(msaa_samples >= xenos::MsaaSamples::k4X)); + } + + std::string GetDebugName() const { + return fmt::format( + "RT @ {}t, <{}t>, {}xMSAA, {}", base_tiles, GetPitchTiles(), + uint32_t(1) << uint32_t(msaa_samples), + is_depth ? xenos::GetDepthRenderTargetFormatName(GetDepthFormat()) + : xenos::GetColorRenderTargetFormatName(GetColorFormat())); + } + }; + + class RenderTarget { + public: + virtual ~RenderTarget() = default; + // Exclusive ownership, plus no point in moving (only allocated via new). + RenderTarget(const RenderTarget& render_target) = delete; + RenderTarget& operator=(const RenderTarget& render_target) = delete; + RenderTarget(RenderTarget&& render_target) = delete; + RenderTarget& operator=(RenderTarget&& render_target) = delete; + RenderTargetKey key() const { return key_; } + + protected: + RenderTarget(RenderTargetKey key) : key_(key) {} + + private: + RenderTargetKey key_; + }; + + struct Transfer { + uint32_t start_tiles; + uint32_t end_tiles; + RenderTarget* source; + RenderTarget* host_depth_source; + Transfer(uint32_t start_tiles, uint32_t end_tiles, RenderTarget* source, + RenderTarget* host_depth_source) + : start_tiles(start_tiles), + end_tiles(end_tiles), + source(source), + host_depth_source(host_depth_source) { + assert_true(start_tiles < end_tiles); + } + struct Rectangle { + uint32_t x_pixels; + uint32_t y_pixels; + uint32_t width_pixels; + uint32_t height_pixels; + }; + static constexpr uint32_t kMaxRectanglesWithoutCutout = 3; + static constexpr uint32_t kMaxCutoutBorderRectangles = 4; + static constexpr uint32_t kMaxRectanglesWithCutout = + kMaxRectanglesWithoutCutout * kMaxCutoutBorderRectangles; + // Cutout can be specified for resolve clears - not to transfer areas that + // will be cleared to a single value anyway. + static uint32_t GetRangeRectangles(uint32_t start_tiles, uint32_t end_tiles, + uint32_t base_tiles, + uint32_t pitch_tiles, + xenos::MsaaSamples msaa_samples, + bool is_64bpp, Rectangle* rectangles_out, + const Rectangle* cutout = nullptr); + uint32_t GetRectangles(uint32_t base_tiles, uint32_t pitch_tiles, + xenos::MsaaSamples msaa_samples, bool is_64bpp, + Rectangle* rectangles_out, + const Rectangle* cutout = nullptr) const { + return GetRangeRectangles(start_tiles, end_tiles, base_tiles, pitch_tiles, + msaa_samples, is_64bpp, rectangles_out, cutout); + } + bool AreSourcesSame(const Transfer& other_transfer) const { + return source == other_transfer.source && + host_depth_source == other_transfer.host_depth_source; + } + + private: + static uint32_t AddRectangle(const Rectangle& rectangle, + Rectangle* rectangles_out, + const Rectangle* cutout = nullptr); + }; + + struct ResolveCopyDumpRectangle { + RenderTarget* render_target; + // If rows == 1: + // Row row_first span: + // [row_first_start, row_last_end) + // If rows > 1: + // Row row_first + row span: + // [row_first_start, row_length_used) + // Rows [row_first + 1, row_first + rows - 1) span: + // [row * pitch, row * pitch + row_length_used) + // Row row_first + rows - 1 span: + // [row * pitch, row * pitch + row_last_end) + uint32_t row_first; + uint32_t rows; + uint32_t row_first_start; + uint32_t row_last_end; + ResolveCopyDumpRectangle(RenderTarget* render_target, uint32_t row_first, + uint32_t rows, uint32_t row_first_start, + uint32_t row_last_end) + : render_target(render_target), + row_first(row_first), + rows(rows), + row_first_start(row_first_start), + row_last_end(row_last_end) {} + struct Dispatch { + uint32_t offset; + uint32_t width_tiles; + uint32_t height_tiles; + }; + static constexpr uint32_t kMaxDispatches = 3; + uint32_t GetDispatches(uint32_t pitch_tiles, uint32_t row_length_used, + Dispatch* dispatches_out) const { + if (!rows) { + return 0; + } + // If the first and / or the last rows have the same X spans as the middle + // part, merge them with it. + uint32_t dispatch_count = 0; + if (rows == 1 || row_first_start) { + Dispatch& dispatch_first = dispatches_out[dispatch_count++]; + dispatch_first.offset = row_first * pitch_tiles + row_first_start; + dispatch_first.width_tiles = + (rows == 1 ? row_last_end : row_length_used) - row_first_start; + dispatch_first.height_tiles = 1; + if (rows == 1) { + return dispatch_count; + } + } + uint32_t mid_row_first = row_first + 1; + uint32_t mid_rows = rows - 2; + if (!row_first_start) { + --mid_row_first; + ++mid_rows; + } + if (row_last_end == row_length_used) { + ++mid_rows; + } + if (mid_rows) { + Dispatch& dispatch_mid = dispatches_out[dispatch_count++]; + dispatch_mid.offset = mid_row_first * pitch_tiles; + dispatch_mid.width_tiles = row_length_used; + dispatch_mid.height_tiles = mid_rows; + } + if (row_last_end != row_length_used) { + Dispatch& dispatch_last = dispatches_out[dispatch_count++]; + dispatch_last.offset = (row_first + rows - 1) * pitch_tiles; + dispatch_last.width_tiles = row_last_end; + dispatch_last.height_tiles = 1; + } + return dispatch_count; + } + }; + + static DepthFloat24Conversion GetConfigDepthFloat24Conversion(); + + virtual uint32_t GetMaxRenderTargetWidth() const = 0; + virtual uint32_t GetMaxRenderTargetHeight() const = 0; + + // Returns the height of a render target that's needed and can be created, + // taking guest and host limits into account. EDRAM base and 32bpp/64bpp are + // not taken into account, the same height is used for all render targets even + // if the implementation supports mixed-size render targets, so the + // implementation can freely disable individual render targets and let the + // other ones use the newly available space without restarting the whole + // render pass (on Vulkan, the actually used height is specified in + // VkFramebuffer). + uint32_t GetRenderTargetHeight(uint32_t pitch_tiles_at_32bpp, + xenos::MsaaSamples msaa_samples) const; + + // Normalizes the format if it's fine to use the same render target textures + // for the provided and the returned guest formats. + // xenos::GetStorageColorFormat is supposed to be done before calling, so + // redoing what it does in the implementations is not needed. + virtual xenos::ColorRenderTargetFormat GetHostRelevantColorFormat( + xenos::ColorRenderTargetFormat format) const { + return format; + } + + virtual RenderTarget* CreateRenderTarget(RenderTargetKey key) = 0; + + // Whether depth buffer is encoded differently on the host, thus after + // aliasing naively, precision may be lost - host depth must only be + // overwritten if the new guest value is different than the current host depth + // when converted to the guest format (this catches the usual case of + // overwriting the depth buffer for clearing it mostly). Sonic the Hedgehog's + // intro cutscene, for example, has a good example of corruption that happens + // if this is not handled - the upper 1280x384 pixels are rendered in a very + // "striped" way if the depth precision is lost (if this is made always return + // false). + virtual bool IsHostDepthEncodingDifferent( + xenos::DepthRenderTargetFormat format) const = 0; + + void ResetAccumulatedRenderTargets() { + are_accumulated_render_targets_valid_ = false; + } + RenderTarget* const* last_update_accumulated_render_targets() const { + assert_true(GetPath() == Path::kHostRenderTargets); + return last_update_accumulated_render_targets_; + } + uint32_t last_update_accumulated_color_targets_are_gamma() const { + assert_true(GetPath() == Path::kHostRenderTargets); + return last_update_accumulated_color_targets_are_gamma_; + } + + const std::vector* last_update_transfers() const { + assert_true(GetPath() == Path::kHostRenderTargets); + return last_update_transfers_; + } + + // Returns mappings between ranges within the specified tile rectangle (not + // render target texture rectangle - textures may have any pitch they need) + // from ResolveInfo::GetCopyEdramTileSpan and render targets owning them to + // rectangles_out. + void GetResolveCopyRectanglesToDump( + uint32_t base, uint32_t row_length, uint32_t rows, uint32_t pitch, + std::vector& rectangles_out) const; + + // Sets up the needed render targets and transfers to perform a clear in a + // resolve operation via a host render target clear. resolve_info is expected + // to be obtained via draw_util::GetResolveInfo. Returns whether any clears + // need to be done (false in both empty and error cases). + // TODO(Triang3l): Try to defer clears until the first draw in the next pass + // (if it uses one or both render targets being cleared) for tile-based GPUs. + bool PrepareHostRenderTargetsResolveClear( + const draw_util::ResolveInfo& resolve_info, + Transfer::Rectangle& clear_rectangle_out, + RenderTarget*& depth_render_target_out, + std::vector& depth_transfers_out, + RenderTarget*& color_render_target_out, + std::vector& color_transfers_out); + + // For restoring EDRAM contents from frame traces, obtains or creates a render + // target at base 0 with of 1280 (only 1 sample and color because copying + // between MSAA render targets and buffers is not possible in Direct3D 12, and + // depth may require additional format conversions, not needed really) and + // transfers ownership of the entire EDRAM to that render target. If a + // full-EDRAM render target can't be created (for instance, due to size + // limitations on the host), nullptr is returned. + RenderTarget* PrepareFullEdram1280xRenderTargetForSnapshotRestoration( + xenos::ColorRenderTargetFormat color_format); + + // For pixel shader interlock. + + virtual void RequestPixelShaderInterlockBarrier() {} + + // To be called by the implementation when interlocked writes to all of the + // EDRAM memory are committed with a memory barrier. + void PixelShaderInterlockFullEdramBarrierPlaced(); + + private: + const RegisterFile& register_file_; + + // For host render targets. + + struct OwnershipRange { + uint32_t end_tiles; + // Need to store keys, not pointers to render targets themselves, because + // ownership transfer is also what's used to determine when to place + // barriers with pixel shader interlock, and in this case there are no host + // render targets. + // Render target this range is last used by. + RenderTargetKey render_target; + // Last host-side depth render targets that used this range even if it has + // been used by a different render target since then, only used if the + // respective format has a different encoding on the host. They are tracked + // separately, overwritten if the host value converted to the guest format + // becomes out of sync with the guest value. Even if the host uses float32 + // to emulate both unorm24 and float24 (Vulkan on AMD), the unorm24 and + // float24 render targets are tracked separately from each other, so + // switching between unorm24 and float24 for the same depth data (clearing + // of most render targets is done through unorm24 without a viewport - very + // common) is not destructive as well (f32tof24(host_f32) == guest_f24 does + // not imply f32tou24(host_f32) == guest_u24, thus aliasing float24 with + // unorm24 through the same float32 buffer will drop the precision of the + // float32 value to that of an unorm24 with a totally wrong value). If the + // range hasn't been used yet (render_target.IsEmpty() == true), these are + // empty too. + union { + struct { + RenderTargetKey host_depth_render_target_unorm24; + RenderTargetKey host_depth_render_target_float24; + }; + RenderTargetKey host_depth_render_targets[2]; + }; + OwnershipRange(uint32_t end_tiles, RenderTargetKey render_target, + RenderTargetKey host_depth_render_target_unorm24, + RenderTargetKey host_depth_render_target_float24) + : end_tiles(end_tiles), + render_target(render_target), + host_depth_render_target_unorm24(host_depth_render_target_unorm24), + host_depth_render_target_float24(host_depth_render_target_float24) {} + bool IsOwnedBy(RenderTargetKey key, + bool host_depth_encoding_different) const { + if (render_target != key) { + // Last time used for something else. If it's a depth render target with + // different host depth encoding, might have been overwritten by color, + // or by a depth render target of a different format. + return false; + } + if (host_depth_encoding_different && !key.is_depth && + host_depth_render_targets[key.host_relevant_format] != key) { + // Depth encoding is the same, but different addressing is needed. + return false; + } + return true; + } + bool AreOwnersSame(const OwnershipRange& other_range) const { + return render_target == other_range.render_target && + host_depth_render_target_unorm24 == + other_range.host_depth_render_target_unorm24 && + host_depth_render_target_float24 == + other_range.host_depth_render_target_float24; + } + }; + + RenderTarget* GetOrCreateRenderTarget(RenderTargetKey key); + + // Checks if changing ownership of the range to the specified render target + // would require transferring data - primarily for barrier placement on the + // pixel shader interlock path (where transfers do not involve copying, but + // barriers are still needed before accessing ranges written before the + // barrier and addressed by different target-independent rasterization pixel + // positions. + bool WouldOwnershipChangeRequireTransfers(RenderTargetKey dest, + uint32_t start_tiles, + uint32_t length_tiles) const; + // Updates ownership_ranges_, adds the transfers needed for the ownership + // change to transfers_append_out if it's not null. + void ChangeOwnership( + RenderTargetKey dest, uint32_t start_tiles, uint32_t length_tiles, + std::vector* transfers_append_out, + const Transfer::Rectangle* resolve_clear_cutout = nullptr); + + // If failed to create, may contain nullptr to prevent attempting to create a + // render target twice. + std::unordered_map + render_targets_; + + // Map of host render targets currently containing the most up-to-date version + // of the tile. Has no gaps, unused parts are represented by empty render + // target keys. + // TODO(Triang3l): Pool allocator (or a custom red-black tree with one even), + // since standard containers use dynamic allocation for elements, though + // changes to this throughout a frame are pretty rare. + std::map ownership_ranges_; + + // Render targets actually used by the draw call with the last successful + // update. 0 is depth, color starting from 1, nullptr if not bound. + // Only valid for non-pixel-shader-interlock paths. + RenderTarget* + last_update_used_render_targets_[1 + xenos::kMaxColorRenderTargets]; + // Render targets used by the draw call with the last successful update or + // previous updates, unless a different or a totally new one was bound (or + // surface info was changed), to avoid unneeded render target switching (which + // is especially undesirable on tile-based GPUs) in the implementation if + // simply disabling depth / stencil test or color writes and then re-enabling + // (Banjo-Kazooie does this often with color). Must also be used to determine + // whether it's safe to enable depth / stencil or writing to a specific color + // render target in the pipeline for this draw call. + // Only valid for non-pixel-shader-interlock paths. + RenderTarget* + last_update_accumulated_render_targets_[1 + + xenos::kMaxColorRenderTargets]; + // Whether the color render targets (in bits 0...3) from the last successful + // update have k_8_8_8_8_GAMMA format, for sRGB emulation on the host if + // needed. + uint32_t last_update_accumulated_color_targets_are_gamma_; + // If false, the next update must copy last_update_used_render_targets_ to + // last_update_accumulated_render_targets_ - it's not beneficial or even + // incorrect to keep the previously bound render targets. + bool are_accumulated_render_targets_valid_ = false; + // After an update (for simplicity, even an unsuccessful update invalidates + // this), contains needed ownership transfer sources for each of the current + // render targets. They are reordered so for one source, all transfers are + // consecutive in the array. + std::vector + last_update_transfers_[1 + xenos::kMaxColorRenderTargets]; +}; + +} // namespace gpu +} // namespace xe + +#endif // XENIA_GPU_RENDER_TARGET_CACHE_H_ diff --git a/src/xenia/gpu/shader.h b/src/xenia/gpu/shader.h index ad9701b7d..f2f944155 100644 --- a/src/xenia/gpu/shader.h +++ b/src/xenia/gpu/shader.h @@ -836,6 +836,9 @@ class Shader { const std::set& memexport_stream_constants() const { return memexport_stream_constants_; } + bool is_valid_memexport_used() const { + return !memexport_stream_constants_.empty(); + } // Labels that jumps (explicit or from loops) can be done to. const std::set& label_addresses() const { return label_addresses_; } @@ -892,8 +895,7 @@ class Shader { // TODO(Triang3l): Investigate what happens to memexport when the pixel // fails the depth/stencil test, but in Direct3D 11 UAV writes disable early // depth/stencil. - return !kills_pixels() && !writes_depth() && - memexport_stream_constants().empty(); + return !kills_pixels() && !writes_depth() && !is_valid_memexport_used(); } // Whether each color render target is written to on any execution path. diff --git a/src/xenia/gpu/shader_compiler_main.cc b/src/xenia/gpu/shader_compiler_main.cc index 93c826ade..2ab319533 100644 --- a/src/xenia/gpu/shader_compiler_main.cc +++ b/src/xenia/gpu/shader_compiler_main.cc @@ -12,6 +12,7 @@ #include #include +#include "xenia/base/assert.h" #include "xenia/base/cvar.h" #include "xenia/base/logging.h" #include "xenia/base/main.h" @@ -115,8 +116,8 @@ int shader_compiler_main(const std::vector& args) { } else if (cvars::shader_output_type == "dxbc" || cvars::shader_output_type == "dxbctext") { translator = std::make_unique( - 0, cvars::shader_output_bindless_resources, - cvars::shader_output_dxbc_rov); + ui::GraphicsProvider::GpuVendorID(0), + cvars::shader_output_bindless_resources, cvars::shader_output_dxbc_rov); } else { // Just output microcode disassembly generated during microcode information // gathering. @@ -152,8 +153,19 @@ int shader_compiler_main(const std::vector& args) { Shader::HostVertexShaderType::kQuadDomainPatchIndexed; } } - uint64_t modification = translator->GetDefaultModification( - shader_type, 64, host_vertex_shader_type); + uint64_t modification; + switch (shader_type) { + case xenos::ShaderType::kVertex: + modification = translator->GetDefaultVertexShaderModification( + 64, host_vertex_shader_type); + break; + case xenos::ShaderType::kPixel: + modification = translator->GetDefaultPixelShaderModification(64); + break; + default: + assert_unhandled_case(shader_type); + return 1; + } Shader::Translation* translation = shader->GetOrCreateTranslation(modification); diff --git a/src/xenia/gpu/shader_translator.h b/src/xenia/gpu/shader_translator.h index d5d3677d5..ee0f0221a 100644 --- a/src/xenia/gpu/shader_translator.h +++ b/src/xenia/gpu/shader_translator.h @@ -29,13 +29,16 @@ class ShaderTranslator { public: virtual ~ShaderTranslator(); - virtual uint64_t GetDefaultModification( - xenos::ShaderType shader_type, + virtual uint64_t GetDefaultVertexShaderModification( uint32_t dynamic_addressable_register_count, Shader::HostVertexShaderType host_vertex_shader_type = Shader::HostVertexShaderType::kVertex) const { return 0; } + virtual uint64_t GetDefaultPixelShaderModification( + uint32_t dynamic_addressable_register_count) const { + return 0; + } // AnalyzeUcode must be done on the shader before translating! bool TranslateAnalyzedShader(Shader::Translation& translation); diff --git a/src/xenia/gpu/shared_memory.cc b/src/xenia/gpu/shared_memory.cc index b358abcf8..0e47bd912 100644 --- a/src/xenia/gpu/shared_memory.cc +++ b/src/xenia/gpu/shared_memory.cc @@ -249,7 +249,8 @@ void SharedMemory::FireWatches(uint32_t page_first, uint32_t page_last, } } -void SharedMemory::RangeWrittenByGpu(uint32_t start, uint32_t length) { +void SharedMemory::RangeWrittenByGpu(uint32_t start, uint32_t length, + bool is_resolve) { if (length == 0 || start >= kBufferSize) { return; } @@ -264,7 +265,7 @@ void SharedMemory::RangeWrittenByGpu(uint32_t start, uint32_t length) { // Mark the range as valid (so pages are not reuploaded until modified by the // CPU) and watch it so the CPU can reuse it and this will be caught. - MakeRangeValid(start, length, true); + MakeRangeValid(start, length, true, is_resolve); } bool SharedMemory::AllocateSparseHostGpuMemoryRange( @@ -276,7 +277,9 @@ bool SharedMemory::AllocateSparseHostGpuMemoryRange( } void SharedMemory::MakeRangeValid(uint32_t start, uint32_t length, - bool written_by_gpu) { + bool written_by_gpu, + bool written_by_gpu_resolve) { + assert_false(written_by_gpu_resolve && !written_by_gpu); if (length == 0 || start >= kBufferSize) { return; } @@ -305,6 +308,11 @@ void SharedMemory::MakeRangeValid(uint32_t start, uint32_t length, } else { block.valid_and_gpu_written &= ~valid_bits; } + if (written_by_gpu_resolve) { + block.valid_and_gpu_resolved |= valid_bits; + } else { + block.valid_and_gpu_resolved &= ~valid_bits; + } } } @@ -339,9 +347,13 @@ void SharedMemory::UnlinkWatchRange(WatchRange* range) { watch_range_first_free_ = range; } -bool SharedMemory::RequestRange(uint32_t start, uint32_t length) { +bool SharedMemory::RequestRange(uint32_t start, uint32_t length, + bool* any_data_resolved_out) { if (!length) { // Some texture or buffer is empty, for example - safe to draw in this case. + if (any_data_resolved_out) { + *any_data_resolved_out = false; + } return true; } if (start > kBufferSize || (kBufferSize - start) < length) { @@ -358,19 +370,29 @@ bool SharedMemory::RequestRange(uint32_t start, uint32_t length) { uint32_t page_last = (start + length - 1) >> page_size_log2_; upload_ranges_.clear(); + bool any_data_resolved = false; uint32_t block_first = page_first >> 6; uint32_t block_last = page_last >> 6; uint32_t range_start = UINT32_MAX; { auto global_lock = global_critical_region_.Acquire(); for (uint32_t i = block_first; i <= block_last; ++i) { - uint64_t block_valid = system_page_flags_[i].valid; + const SystemPageFlagsBlock& block = system_page_flags_[i]; + uint64_t block_valid = block.valid; + uint64_t block_resolved = block.valid_and_gpu_resolved; // Consider pages in the block outside the requested range valid. if (i == block_first) { - block_valid |= (uint64_t(1) << (page_first & 63)) - 1; + uint64_t block_before = (uint64_t(1) << (page_first & 63)) - 1; + block_valid |= block_before; + block_resolved &= ~block_before; } if (i == block_last && (page_last & 63) != 63) { - block_valid |= ~((uint64_t(1) << ((page_last & 63) + 1)) - 1); + uint64_t block_inside = (uint64_t(1) << ((page_last & 63) + 1)) - 1; + block_valid |= ~block_inside; + block_resolved &= block_inside; + } + if (block_resolved) { + any_data_resolved = true; } while (true) { @@ -406,6 +428,9 @@ bool SharedMemory::RequestRange(uint32_t start, uint32_t length) { upload_ranges_.push_back( std::make_pair(range_start, page_last + 1 - range_start)); } + if (any_data_resolved_out) { + *any_data_resolved_out = any_data_resolved; + } if (upload_ranges_.empty()) { return true; } @@ -470,6 +495,7 @@ std::pair SharedMemory::MemoryInvalidationCallback( SystemPageFlagsBlock& block = system_page_flags_[i]; block.valid &= ~invalidate_bits; block.valid_and_gpu_written &= ~invalidate_bits; + block.valid_and_gpu_resolved &= ~invalidate_bits; } FireWatches(page_first, page_last, false); diff --git a/src/xenia/gpu/shared_memory.h b/src/xenia/gpu/shared_memory.h index 98719b670..2c3b67fa9 100644 --- a/src/xenia/gpu/shared_memory.h +++ b/src/xenia/gpu/shared_memory.h @@ -74,7 +74,8 @@ class SharedMemory { // Checks if the range has been updated, uploads new data if needed and // ensures the host GPU memory backing the range are resident. Returns true if // the range has been fully updated and is usable. - bool RequestRange(uint32_t start, uint32_t length); + bool RequestRange(uint32_t start, uint32_t length, + bool* any_data_resolved_out = nullptr); // Marks the range and, if not exact_range, potentially its surroundings // (to up to the first GPU-written page, as an access violation exception @@ -90,7 +91,7 @@ class SharedMemory { // be called, to make sure, if the GPU writes don't overwrite *everything* in // the pages they touch, the CPU data is properly loaded to the unmodified // regions in those pages. - void RangeWrittenByGpu(uint32_t start, uint32_t length); + void RangeWrittenByGpu(uint32_t start, uint32_t length, bool is_resolve); protected: SharedMemory(Memory& memory); @@ -119,7 +120,8 @@ class SharedMemory { uint32_t length_allocations); // Mark the memory range as updated and protect it. - void MakeRangeValid(uint32_t start, uint32_t length, bool written_by_gpu); + void MakeRangeValid(uint32_t start, uint32_t length, bool written_by_gpu, + bool written_by_gpu_resolve); // Uploads a range of host pages - only called if host GPU sparse memory // allocation succeeded if needed. While uploading, MarkRangeValid must be @@ -188,6 +190,9 @@ class SharedMemory { // Subset of valid pages - whether each page in the GPU buffer contains data // that was written on the GPU, thus should not be invalidated spuriously. uint64_t valid_and_gpu_written; + // Subset of valid_and_gpu_written - whether each page in the GPU buffer + // contains data written specifically by resolving from EDRAM. + uint64_t valid_and_gpu_resolved; }; // Flags for each 64 system pages, interleaved as blocks, so bit scan can be // used to quickly extract ranges. diff --git a/src/xenia/gpu/spirv_shader_translator.h b/src/xenia/gpu/spirv_shader_translator.h index 9d1de5837..6c3c86526 100644 --- a/src/xenia/gpu/spirv_shader_translator.h +++ b/src/xenia/gpu/spirv_shader_translator.h @@ -60,13 +60,16 @@ class SpirvShaderTranslator : public ShaderTranslator { // Not storing anything else in modifications (as this shader translator is // being replaced anyway). - uint64_t GetDefaultModification( - xenos::ShaderType shader_type, + uint64_t GetDefaultVertexShaderModification( uint32_t dynamic_addressable_register_count, Shader::HostVertexShaderType host_vertex_shader_type = Shader::HostVertexShaderType::kVertex) const override { return dynamic_addressable_register_count; } + uint64_t GetDefaultPixelShaderModification( + uint32_t dynamic_addressable_register_count) const override { + return dynamic_addressable_register_count; + } protected: uint32_t GetModificationRegisterCount() const override { diff --git a/src/xenia/gpu/vulkan/pipeline_cache.cc b/src/xenia/gpu/vulkan/pipeline_cache.cc index 1fbe5681c..9bf106a3b 100644 --- a/src/xenia/gpu/vulkan/pipeline_cache.cc +++ b/src/xenia/gpu/vulkan/pipeline_cache.cc @@ -1071,8 +1071,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateShaderStages( VulkanShader::VulkanTranslation* vertex_shader_translation = static_cast( vertex_shader->GetOrCreateTranslation( - shader_translator_->GetDefaultModification( - xenos::ShaderType::kVertex, + shader_translator_->GetDefaultVertexShaderModification( vertex_shader->GetDynamicAddressableRegisterCount( regs.sq_program_cntl.vs_num_reg)))); if (!vertex_shader_translation->is_translated() && @@ -1085,8 +1084,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateShaderStages( if (pixel_shader) { pixel_shader_translation = static_cast( pixel_shader->GetOrCreateTranslation( - shader_translator_->GetDefaultModification( - xenos::ShaderType::kPixel, + shader_translator_->GetDefaultPixelShaderModification( pixel_shader->GetDynamicAddressableRegisterCount( regs.sq_program_cntl.ps_num_reg)))); if (!pixel_shader_translation->is_translated() && diff --git a/src/xenia/gpu/xenos.cc b/src/xenia/gpu/xenos.cc index faaf4818d..4d4a279b5 100644 --- a/src/xenia/gpu/xenos.cc +++ b/src/xenia/gpu/xenos.cc @@ -17,6 +17,26 @@ namespace xe { namespace gpu { namespace xenos { +// https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp + +float Float7e3To32(uint32_t f10) { + f10 &= 0x3FF; + if (!f10) { + return 0.0f; + } + uint32_t mantissa = f10 & 0x7F; + uint32_t exponent = f10 >> 7; + if (!exponent) { + // Normalize the value in the resulting float. + // do { Exponent--; Mantissa <<= 1; } while ((Mantissa & 0x80) == 0) + uint32_t mantissa_lzcnt = xe::lzcnt(mantissa) - (32 - 8); + exponent = uint32_t(1 - int32_t(mantissa_lzcnt)); + mantissa = (mantissa << mantissa_lzcnt) & 0x7F; + } + uint32_t f32 = ((exponent + 124) << 23) | (mantissa << 3); + return *reinterpret_cast(&f32); +} + // Based on CFloat24 from d3dref9.dll and the 6e4 code from: // https://github.com/Microsoft/DirectXTex/blob/master/DirectXTex/DirectXTexConvert.cpp // 6e4 has a different exponent bias allowing [0,512) values, 20e4 allows [0,2). @@ -54,7 +74,7 @@ float Float20e4To32(uint32_t f24) { // Normalize the value in the resulting float. // do { Exponent--; Mantissa <<= 1; } while ((Mantissa & 0x100000) == 0) uint32_t mantissa_lzcnt = xe::lzcnt(mantissa) - (32 - 21); - exponent = uint32_t(1 - mantissa_lzcnt); + exponent = uint32_t(1 - int32_t(mantissa_lzcnt)); mantissa = (mantissa << mantissa_lzcnt) & 0xFFFFF; } uint32_t f32 = ((exponent + 112) << 23) | (mantissa << 3); diff --git a/src/xenia/gpu/xenos.h b/src/xenia/gpu/xenos.h index f30e0b5c8..ddc7d43bf 100644 --- a/src/xenia/gpu/xenos.h +++ b/src/xenia/gpu/xenos.h @@ -300,14 +300,38 @@ constexpr bool IsColorRenderTargetFormat64bpp(ColorRenderTargetFormat format) { inline uint32_t GetColorRenderTargetFormatComponentCount( ColorRenderTargetFormat format) { switch (format) { - case ColorRenderTargetFormat::k_32_FLOAT: - return 1; + case ColorRenderTargetFormat::k_8_8_8_8: + case ColorRenderTargetFormat::k_8_8_8_8_GAMMA: + case ColorRenderTargetFormat::k_2_10_10_10: + case ColorRenderTargetFormat::k_2_10_10_10_FLOAT: + case ColorRenderTargetFormat::k_16_16_16_16: + case ColorRenderTargetFormat::k_16_16_16_16_FLOAT: + case ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + case ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: + return 4; case ColorRenderTargetFormat::k_16_16: case ColorRenderTargetFormat::k_16_16_FLOAT: case ColorRenderTargetFormat::k_32_32_FLOAT: return 2; + case ColorRenderTargetFormat::k_32_FLOAT: + return 1; default: - return 4; + assert_unhandled_case(format); + return 0; + } +} + +// Returns the version of the format with the same packing and meaning of values +// stored in it, but without blending precision modifiers. +constexpr ColorRenderTargetFormat GetStorageColorFormat( + ColorRenderTargetFormat format) { + switch (format) { + case ColorRenderTargetFormat::k_2_10_10_10_AS_10_10_10_10: + return ColorRenderTargetFormat::k_2_10_10_10; + case ColorRenderTargetFormat::k_2_10_10_10_FLOAT_AS_16_16_16_16: + return ColorRenderTargetFormat::k_2_10_10_10_FLOAT; + default: + return format; } } @@ -319,12 +343,26 @@ enum class DepthRenderTargetFormat : uint32_t { const char* GetDepthRenderTargetFormatName(DepthRenderTargetFormat format); +// Converts Xenos floating-point 7e3 color value in bits 0:9 (not clamping) to +// an IEEE-754 32-bit floating-point number. +float Float7e3To32(uint32_t f10); +// Converts 24-bit unorm depth in the value (not clamping) to an IEEE-754 32-bit +// floating-point number. // Converts an IEEE-754 32-bit floating-point number to Xenos floating-point // depth, rounding to the nearest even. uint32_t Float32To20e4(float f32); // Converts Xenos floating-point depth in bits 0:23 (not clamping) to an // IEEE-754 32-bit floating-point number. float Float20e4To32(uint32_t f24); +// Converts 24-bit unorm depth in the value (not clamping) to an IEEE-754 32-bit +// floating-point number. +constexpr float UNorm24To32(uint32_t n24) { + // Not 1.0f / 16777215.0f as that gives an incorrect result (like for a very + // common 0xC00000 which clears 2_10_10_10 to 0001). Division by 2^24 is just + // an exponent shift though, thus exact. + // Division by 16777215.0f behaves this way. + return float(n24 + (n24 >> 23)) * (1.0f / float(1 << 24)); +} constexpr uint32_t kColorRenderTargetFormatBits = 4; constexpr uint32_t kDepthRenderTargetFormatBits = 1; @@ -343,8 +381,9 @@ constexpr uint32_t kEdramPitchPixelsBits = 14; // Xbox 360 only 11 make sense, but to avoid bounds checks). constexpr uint32_t kEdramBaseTilesBits = 12; -inline uint32_t GetSurfacePitchTiles(uint32_t pitch_pixels, - MsaaSamples msaa_samples, bool is_64bpp) { +constexpr uint32_t GetSurfacePitchTiles(uint32_t pitch_pixels, + MsaaSamples msaa_samples, + bool is_64bpp) { uint32_t pitch_samples = pitch_pixels << uint32_t(msaa_samples >= MsaaSamples::k4X); uint32_t pitch_tiles = @@ -362,25 +401,6 @@ inline uint32_t GetSurfacePitchTiles(uint32_t pitch_pixels, // multiplied by 2 for 64bpp. constexpr uint32_t kEdramPitchTilesBits = 10; -// Returns the maximum height of a render target, in pixels, that may fit in the -// EDRAM starting from the specified base address, until the end of the EDRAM or -// the specified tile (for instance, until the next render target). -inline uint32_t GetMaxRenderTargetHeight( - uint32_t base_tiles, uint32_t pitch_pixels, MsaaSamples msaa_samples, - bool is_64bpp, uint32_t until_tile = kEdramTileCount) { - if (base_tiles >= until_tile) { - return 0; - } - uint32_t pitch_tiles = - GetSurfacePitchTiles(pitch_pixels, msaa_samples, is_64bpp); - if (!pitch_tiles) { - return 0; - } - return ((until_tile - base_tiles) / pitch_tiles) * - (kEdramTileHeightSamples >> - uint32_t(msaa_samples >= MsaaSamples::k2X)); -} - constexpr uint32_t kFormatBits = 6; // a2xx_sq_surfaceformat + diff --git a/src/xenia/ui/d3d12/d3d12_api.h b/src/xenia/ui/d3d12/d3d12_api.h index 8f29317d9..1f22fcaf7 100644 --- a/src/xenia/ui/d3d12/d3d12_api.h +++ b/src/xenia/ui/d3d12/d3d12_api.h @@ -19,6 +19,8 @@ #include #include #include +// For Microsoft::WRL::ComPtr. +#include #include "third_party/DirectXShaderCompiler/include/dxc/dxcapi.h" #include "third_party/DirectXShaderCompiler/projects/dxilconv/include/DxbcConverter.h" diff --git a/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.cc b/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.cc new file mode 100644 index 000000000..a5fb2a5e2 --- /dev/null +++ b/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.cc @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#include "xenia/ui/d3d12/d3d12_cpu_descriptor_pool.h" + +#include +#include + +#include "xenia/base/logging.h" + +namespace xe { +namespace ui { +namespace d3d12 { + +D3D12CpuDescriptorPool::Descriptor +D3D12CpuDescriptorPool::AllocateDescriptor() { + if (!freed_indices_.empty()) { + size_t index = freed_indices_.back(); + freed_indices_.pop_back(); + return Descriptor(shared_from_this(), index); + } + uint32_t heap_size = uint32_t(1) << heap_size_log2_; + if (!heaps_.empty() && last_heap_allocated_ < heap_size) { + return Descriptor(shared_from_this(), + (heaps_.size() - 1) * heap_size + last_heap_allocated_++); + } + D3D12_DESCRIPTOR_HEAP_DESC descriptor_heap_desc; + descriptor_heap_desc.Type = type_; + descriptor_heap_desc.NumDescriptors = heap_size; + descriptor_heap_desc.Flags = D3D12_DESCRIPTOR_HEAP_FLAG_NONE; + descriptor_heap_desc.NodeMask = 0; + ID3D12DescriptorHeap* descriptor_heap; + if (FAILED(provider_.GetDevice()->CreateDescriptorHeap( + &descriptor_heap_desc, IID_PPV_ARGS(&descriptor_heap)))) { + XELOGE( + "Failed to create a non-shader-visible descriptor heap for {} " + "descriptors", + heap_size); + return Descriptor(); + } + heaps_.push_back(descriptor_heap); + last_heap_allocated_ = 1; + return Descriptor(shared_from_this(), (heaps_.size() - 1) * heap_size); +} + +} // namespace d3d12 +} // namespace ui +} // namespace xe diff --git a/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.h b/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.h new file mode 100644 index 000000000..3062ec540 --- /dev/null +++ b/src/xenia/ui/d3d12/d3d12_cpu_descriptor_pool.h @@ -0,0 +1,119 @@ +/** + ****************************************************************************** + * Xenia : Xbox 360 Emulator Research Project * + ****************************************************************************** + * Copyright 2021 Ben Vanik. All rights reserved. * + * Released under the BSD license - see LICENSE in the root for more details. * + ****************************************************************************** + */ + +#ifndef XENIA_UI_D3D12_D3D12_CPU_DESCRIPTOR_POOL_H_ +#define XENIA_UI_D3D12_D3D12_CPU_DESCRIPTOR_POOL_H_ + +#include +#include +#include +#include + +#include "xenia/base/assert.h" +#include "xenia/ui/d3d12/d3d12_provider.h" + +namespace xe { +namespace ui { +namespace d3d12 { + +// Single-descriptor pool with reference counting and unique ownership of +// allocations, safe to use in environments where the order of releasing of the +// descriptor heap and of allocated descriptors is undefined. +class D3D12CpuDescriptorPool + : public std::enable_shared_from_this { + public: + class Descriptor { + public: + Descriptor() = default; + // shared_ptr to ensure correct release order with between render targets + // and descriptor pools. + Descriptor(std::shared_ptr pool, size_t index) + : pool_(pool), index_(index) {} + // Owns a descriptor in the pool exclusively. + Descriptor(const Descriptor& descriptor) = delete; + Descriptor& operator=(const Descriptor& descriptor) = delete; + Descriptor(Descriptor&& descriptor) { + pool_ = std::move(descriptor.pool_); + index_ = descriptor.index_; + } + Descriptor& operator=(Descriptor&& descriptor) { + if (IsValid() && pool_ == descriptor.pool_ && + index_ == descriptor.index_) { + // If moving to self, don't free. + return *this; + } + Free(); + pool_ = std::move(descriptor.pool_); + index_ = descriptor.index_; + return *this; + } + ~Descriptor() { Free(); } + void Free() { + if (!pool_) { + return; + } + pool_->FreeDescriptor(index_); + pool_.reset(); + } + bool IsValid() const { return pool_.get() != nullptr; } + operator bool() const { return IsValid(); } + D3D12_CPU_DESCRIPTOR_HANDLE GetHandle() const { + assert_true(IsValid()); + return pool_->GetHandle(index_); + } + + private: + std::shared_ptr pool_; + size_t index_ = 0; + }; + + D3D12CpuDescriptorPool(const ui::d3d12::D3D12Provider& provider, + D3D12_DESCRIPTOR_HEAP_TYPE type, + uint32_t heap_size_log2) + : provider_(provider), type_(type), heap_size_log2_(heap_size_log2) { + assert_true(heap_size_log2 <= 31); + } + D3D12CpuDescriptorPool(const D3D12CpuDescriptorPool& pool) = delete; + D3D12CpuDescriptorPool& operator=(const D3D12CpuDescriptorPool& pool) = + delete; + // No point in moving, created only via make_shared. + D3D12CpuDescriptorPool(D3D12CpuDescriptorPool&& pool) = delete; + D3D12CpuDescriptorPool& operator=(D3D12CpuDescriptorPool&& pool) = delete; + ~D3D12CpuDescriptorPool() { + for (ID3D12DescriptorHeap* heap : heaps_) { + heap->Release(); + } + } + + Descriptor AllocateDescriptor(); + + private: + void FreeDescriptor(size_t index) { freed_indices_.push_back(index); } + + D3D12_CPU_DESCRIPTOR_HANDLE GetHandle(size_t index) const { + D3D12_CPU_DESCRIPTOR_HANDLE heap_start = + heaps_[index >> heap_size_log2_]->GetCPUDescriptorHandleForHeapStart(); + uint32_t heap_local_index = + uint32_t(index & ((uint32_t(1) << heap_size_log2_) - 1)); + return provider_.OffsetDescriptor(type_, heap_start, heap_local_index); + } + + const ui::d3d12::D3D12Provider& provider_; + D3D12_DESCRIPTOR_HEAP_TYPE type_; + uint32_t heap_size_log2_; + std::vector heaps_; + std::vector freed_indices_; + uint32_t last_heap_allocated_ = 0; +}; + +} // namespace d3d12 +} // namespace ui +} // namespace xe + +#endif // XENIA_UI_D3D12_D3D12_CPU_DESCRIPTOR_POOL_H_ diff --git a/src/xenia/ui/d3d12/d3d12_provider.cc b/src/xenia/ui/d3d12/d3d12_provider.cc index d1f6594ca..b1e34f977 100644 --- a/src/xenia/ui/d3d12/d3d12_provider.cc +++ b/src/xenia/ui/d3d12/d3d12_provider.cc @@ -21,6 +21,8 @@ DEFINE_bool(d3d12_debug, false, "Enable Direct3D 12 and DXGI debug layer.", "D3D12"); DEFINE_bool(d3d12_break_on_error, false, "Break on Direct3D 12 validation errors.", "D3D12"); +DEFINE_bool(d3d12_break_on_warning, false, + "Break on Direct3D 12 validation warnings.", "D3D12"); DEFINE_int32(d3d12_adapter, -1, "Index of the DXGI adapter to use. " "-1 for any physical adapter, -2 for WARP software rendering.", @@ -200,14 +202,20 @@ bool D3D12Provider::Initialize() { } // Configure the DXGI debug info queue. - if (cvars::d3d12_break_on_error) { + if (cvars::d3d12_break_on_error || cvars::d3d12_break_on_warning) { IDXGIInfoQueue* dxgi_info_queue; if (SUCCEEDED(pfn_dxgi_get_debug_interface1_( 0, IID_PPV_ARGS(&dxgi_info_queue)))) { - dxgi_info_queue->SetBreakOnSeverity( - DXGI_DEBUG_ALL, DXGI_INFO_QUEUE_MESSAGE_SEVERITY_CORRUPTION, TRUE); - dxgi_info_queue->SetBreakOnSeverity( - DXGI_DEBUG_ALL, DXGI_INFO_QUEUE_MESSAGE_SEVERITY_ERROR, TRUE); + if (cvars::d3d12_break_on_error) { + dxgi_info_queue->SetBreakOnSeverity( + DXGI_DEBUG_ALL, DXGI_INFO_QUEUE_MESSAGE_SEVERITY_CORRUPTION, TRUE); + dxgi_info_queue->SetBreakOnSeverity( + DXGI_DEBUG_ALL, DXGI_INFO_QUEUE_MESSAGE_SEVERITY_ERROR, TRUE); + } + if (cvars::d3d12_break_on_warning) { + dxgi_info_queue->SetBreakOnSeverity( + DXGI_DEBUG_ALL, DXGI_INFO_QUEUE_MESSAGE_SEVERITY_WARNING, TRUE); + } dxgi_info_queue->Release(); } } @@ -273,7 +281,7 @@ bool D3D12Provider::Initialize() { dxgi_factory->Release(); return false; } - adapter_vendor_id_ = adapter_desc.VendorId; + adapter_vendor_id_ = GpuVendorID(adapter_desc.VendorId); int adapter_name_mb_size = WideCharToMultiByte( CP_UTF8, 0, adapter_desc.Description, -1, nullptr, 0, nullptr, nullptr); if (adapter_name_mb_size != 0) { @@ -282,7 +290,7 @@ bool D3D12Provider::Initialize() { if (WideCharToMultiByte(CP_UTF8, 0, adapter_desc.Description, -1, adapter_name_mb, adapter_name_mb_size, nullptr, nullptr) != 0) { - XELOGD3D("DXGI adapter: {} (vendor {:04X}, device {:04X})", + XELOGD3D("DXGI adapter: {} (vendor 0x{:04X}, device 0x{:04X})", adapter_name_mb, adapter_desc.VendorId, adapter_desc.DeviceId); } } @@ -307,9 +315,20 @@ bool D3D12Provider::Initialize() { D3D12_MESSAGE_ID d3d12_info_queue_denied_messages[] = { // Xbox 360 vertex fetch is explicit in shaders. D3D12_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, + // Bug in the debug layer (fixed in some version of Windows) - gaps in + // render target bindings must be represented with a fully typed RTV + // descriptor and DXGI_FORMAT_UNKNOWN in the pipeline state, but older + // debug layer versions give a format mismatch error in this case. + D3D12_MESSAGE_ID_RENDER_TARGET_FORMAT_MISMATCH_PIPELINE_STATE, // Render targets and shader exports don't have to match on the Xbox // 360. D3D12_MESSAGE_ID_CREATEGRAPHICSPIPELINESTATE_RENDERTARGETVIEW_NOT_SET, + // Arbitrary scissor can be specified by the guest, also it can be + // explicitly used to disable drawing. + D3D12_MESSAGE_ID_DRAW_EMPTY_SCISSOR_RECTANGLE, + // Arbitrary clear values can be specified by the guest. + D3D12_MESSAGE_ID_CLEARRENDERTARGETVIEW_MISMATCHINGCLEARVALUE, + D3D12_MESSAGE_ID_CLEARDEPTHSTENCILVIEW_MISMATCHINGCLEARVALUE, }; D3D12_INFO_QUEUE_FILTER d3d12_info_queue_filter = {}; d3d12_info_queue_filter.DenyList.NumSeverities = @@ -325,6 +344,10 @@ bool D3D12Provider::Initialize() { TRUE); d3d12_info_queue->SetBreakOnSeverity(D3D12_MESSAGE_SEVERITY_ERROR, TRUE); } + if (cvars::d3d12_break_on_warning) { + d3d12_info_queue->SetBreakOnSeverity(D3D12_MESSAGE_SEVERITY_WARNING, + TRUE); + } d3d12_info_queue->Release(); } @@ -373,14 +396,10 @@ bool D3D12Provider::Initialize() { direct_queue_ = direct_queue; // Get descriptor sizes for each type. - descriptor_size_view_ = device->GetDescriptorHandleIncrementSize( - D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); - descriptor_size_sampler_ = device->GetDescriptorHandleIncrementSize( - D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER); - descriptor_size_rtv_ = - device->GetDescriptorHandleIncrementSize(D3D12_DESCRIPTOR_HEAP_TYPE_RTV); - descriptor_size_dsv_ = - device->GetDescriptorHandleIncrementSize(D3D12_DESCRIPTOR_HEAP_TYPE_DSV); + for (uint32_t i = 0; i < D3D12_DESCRIPTOR_HEAP_TYPE_NUM_TYPES; ++i) { + descriptor_sizes_[i] = + device->GetDescriptorHandleIncrementSize(D3D12_DESCRIPTOR_HEAP_TYPE(i)); + } // Check if optional features are supported. // D3D12_HEAP_FLAG_CREATE_NOT_ZEROED requires Windows 10 2004 (indicated by @@ -391,13 +410,16 @@ bool D3D12Provider::Initialize() { &options7, sizeof(options7)))) { heap_flag_create_not_zeroed_ = D3D12_HEAP_FLAG_CREATE_NOT_ZEROED; } + ps_specified_stencil_reference_supported_ = false; rasterizer_ordered_views_supported_ = false; resource_binding_tier_ = D3D12_RESOURCE_BINDING_TIER_1; tiled_resources_tier_ = D3D12_TILED_RESOURCES_TIER_NOT_SUPPORTED; D3D12_FEATURE_DATA_D3D12_OPTIONS options; if (SUCCEEDED(device->CheckFeatureSupport(D3D12_FEATURE_D3D12_OPTIONS, &options, sizeof(options)))) { - rasterizer_ordered_views_supported_ = options.ROVsSupported ? true : false; + ps_specified_stencil_reference_supported_ = + bool(options.PSSpecifiedStencilRefSupported); + rasterizer_ordered_views_supported_ = bool(options.ROVsSupported); resource_binding_tier_ = options.ResourceBindingTier; tiled_resources_tier_ = options.TiledResourcesTier; } @@ -421,6 +443,7 @@ bool D3D12Provider::Initialize() { "Direct3D 12 device and OS features:\n" "* Max GPU virtual address bits per resource: {}\n" "* Non-zeroed heap creation: {}\n" + "* Pixel-shader-specified stencil reference: {}\n" "* Programmable sample positions: tier {}\n" "* Rasterizer-ordered views: {}\n" "* Resource binding: tier {}\n" @@ -428,6 +451,7 @@ bool D3D12Provider::Initialize() { virtual_address_bits_per_resource_, (heap_flag_create_not_zeroed_ & D3D12_HEAP_FLAG_CREATE_NOT_ZEROED) ? "yes" : "no", + ps_specified_stencil_reference_supported_ ? "yes" : "no", uint32_t(programmable_sample_positions_tier_), rasterizer_ordered_views_supported_ ? "yes" : "no", uint32_t(resource_binding_tier_), uint32_t(tiled_resources_tier_)); diff --git a/src/xenia/ui/d3d12/d3d12_provider.h b/src/xenia/ui/d3d12/d3d12_provider.h index 255d42a3d..089712b78 100644 --- a/src/xenia/ui/d3d12/d3d12_provider.h +++ b/src/xenia/ui/d3d12/d3d12_provider.h @@ -41,33 +41,50 @@ class D3D12Provider : public GraphicsProvider { ID3D12Device* GetDevice() const { return device_; } ID3D12CommandQueue* GetDirectQueue() const { return direct_queue_; } - uint32_t GetViewDescriptorSize() const { return descriptor_size_view_; } - uint32_t GetSamplerDescriptorSize() const { return descriptor_size_sampler_; } - uint32_t GetRTVDescriptorSize() const { return descriptor_size_rtv_; } - uint32_t GetDSVDescriptorSize() const { return descriptor_size_dsv_; } + uint32_t GetDescriptorSize(D3D12_DESCRIPTOR_HEAP_TYPE type) const { + return descriptor_sizes_[type]; + } + uint32_t GetViewDescriptorSize() const { + return GetDescriptorSize(D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV); + } + uint32_t GetSamplerDescriptorSize() const { + return GetDescriptorSize(D3D12_DESCRIPTOR_HEAP_TYPE_SAMPLER); + } + uint32_t GetRTVDescriptorSize() const { + return GetDescriptorSize(D3D12_DESCRIPTOR_HEAP_TYPE_RTV); + } + uint32_t GetDSVDescriptorSize() const { + return GetDescriptorSize(D3D12_DESCRIPTOR_HEAP_TYPE_DSV); + } + template + T OffsetDescriptor(D3D12_DESCRIPTOR_HEAP_TYPE type, T start, + uint32_t index) const { + start.ptr += index * GetDescriptorSize(type); + return start; + } template T OffsetViewDescriptor(T start, uint32_t index) const { - start.ptr += index * descriptor_size_view_; + start.ptr += index * GetViewDescriptorSize(); return start; } template T OffsetSamplerDescriptor(T start, uint32_t index) const { - start.ptr += index * descriptor_size_sampler_; + start.ptr += index * GetSamplerDescriptorSize(); return start; } template T OffsetRTVDescriptor(T start, uint32_t index) const { - start.ptr += index * descriptor_size_rtv_; + start.ptr += index * GetRTVDescriptorSize(); return start; } template T OffsetDSVDescriptor(T start, uint32_t index) const { - start.ptr += index * descriptor_size_dsv_; + start.ptr += index * GetDSVDescriptorSize(); return start; } // Adapter info. - uint32_t GetAdapterVendorID() const { return adapter_vendor_id_; } + GpuVendorID GetAdapterVendorID() const { return adapter_vendor_id_; } // Device features. D3D12_HEAP_FLAGS GetHeapFlagCreateNotZeroed() const { @@ -77,6 +94,9 @@ class D3D12Provider : public GraphicsProvider { GetProgrammableSamplePositionsTier() const { return programmable_sample_positions_tier_; } + bool IsPSSpecifiedStencilReferenceSupported() const { + return ps_specified_stencil_reference_supported_; + } bool AreRasterizerOrderedViewsSupported() const { return rasterizer_ordered_views_supported_; } @@ -155,15 +175,13 @@ class D3D12Provider : public GraphicsProvider { ID3D12Device* device_ = nullptr; ID3D12CommandQueue* direct_queue_ = nullptr; - uint32_t descriptor_size_view_; - uint32_t descriptor_size_sampler_; - uint32_t descriptor_size_rtv_; - uint32_t descriptor_size_dsv_; + uint32_t descriptor_sizes_[D3D12_DESCRIPTOR_HEAP_TYPE_NUM_TYPES]; - uint32_t adapter_vendor_id_; + GpuVendorID adapter_vendor_id_; D3D12_HEAP_FLAGS heap_flag_create_not_zeroed_; D3D12_PROGRAMMABLE_SAMPLE_POSITIONS_TIER programmable_sample_positions_tier_; + bool ps_specified_stencil_reference_supported_; bool rasterizer_ordered_views_supported_; D3D12_RESOURCE_BINDING_TIER resource_binding_tier_; D3D12_TILED_RESOURCES_TIER tiled_resources_tier_; diff --git a/src/xenia/ui/d3d12/d3d12_util.cc b/src/xenia/ui/d3d12/d3d12_util.cc index caea2b296..45905d1be 100644 --- a/src/xenia/ui/d3d12/d3d12_util.cc +++ b/src/xenia/ui/d3d12/d3d12_util.cc @@ -127,6 +127,189 @@ void CreateBufferTypedUAV(ID3D12Device* device, device->CreateUnorderedAccessView(buffer, nullptr, &desc, handle); } +void GetFormatCopyInfo(DXGI_FORMAT format, uint32_t plane, + DXGI_FORMAT& copy_format_out, uint32_t& block_width_out, + uint32_t& block_height_out, + uint32_t& bytes_per_block_out) { + DXGI_FORMAT copy_format = format; + uint32_t block_width = 1; + uint32_t block_height = 1; + bool divide_by_block_size = false; + uint32_t bytes_per_block = 1; + switch (format) { + case DXGI_FORMAT_R32G32B32A32_TYPELESS: + case DXGI_FORMAT_R32G32B32A32_FLOAT: + case DXGI_FORMAT_R32G32B32A32_UINT: + case DXGI_FORMAT_R32G32B32A32_SINT: + bytes_per_block = 16; + break; + case DXGI_FORMAT_R32G32B32_TYPELESS: + case DXGI_FORMAT_R32G32B32_FLOAT: + case DXGI_FORMAT_R32G32B32_UINT: + case DXGI_FORMAT_R32G32B32_SINT: + bytes_per_block = 12; + break; + case DXGI_FORMAT_R16G16B16A16_TYPELESS: + case DXGI_FORMAT_R16G16B16A16_FLOAT: + case DXGI_FORMAT_R16G16B16A16_UNORM: + case DXGI_FORMAT_R16G16B16A16_UINT: + case DXGI_FORMAT_R16G16B16A16_SNORM: + case DXGI_FORMAT_R16G16B16A16_SINT: + case DXGI_FORMAT_R32G32_TYPELESS: + case DXGI_FORMAT_R32G32_FLOAT: + case DXGI_FORMAT_R32G32_UINT: + case DXGI_FORMAT_R32G32_SINT: + case DXGI_FORMAT_Y416: + bytes_per_block = 8; + break; + case DXGI_FORMAT_R32G8X24_TYPELESS: + case DXGI_FORMAT_D32_FLOAT_S8X24_UINT: + case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS: + case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT: + case DXGI_FORMAT_R24G8_TYPELESS: + case DXGI_FORMAT_D24_UNORM_S8_UINT: + case DXGI_FORMAT_R24_UNORM_X8_TYPELESS: + case DXGI_FORMAT_X24_TYPELESS_G8_UINT: + if (plane) { + copy_format = DXGI_FORMAT_R8_TYPELESS; + bytes_per_block = 1; + } else { + copy_format = DXGI_FORMAT_R32_TYPELESS; + bytes_per_block = 4; + } + break; + case DXGI_FORMAT_R10G10B10A2_TYPELESS: + case DXGI_FORMAT_R10G10B10A2_UNORM: + case DXGI_FORMAT_R10G10B10A2_UINT: + case DXGI_FORMAT_R11G11B10_FLOAT: + case DXGI_FORMAT_R8G8B8A8_TYPELESS: + case DXGI_FORMAT_R8G8B8A8_UNORM: + case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB: + case DXGI_FORMAT_R8G8B8A8_UINT: + case DXGI_FORMAT_R8G8B8A8_SNORM: + case DXGI_FORMAT_R8G8B8A8_SINT: + case DXGI_FORMAT_R16G16_TYPELESS: + case DXGI_FORMAT_R16G16_FLOAT: + case DXGI_FORMAT_R16G16_UNORM: + case DXGI_FORMAT_R16G16_UINT: + case DXGI_FORMAT_R16G16_SNORM: + case DXGI_FORMAT_R16G16_SINT: + case DXGI_FORMAT_R32_TYPELESS: + case DXGI_FORMAT_D32_FLOAT: + case DXGI_FORMAT_R32_FLOAT: + case DXGI_FORMAT_R32_UINT: + case DXGI_FORMAT_R32_SINT: + case DXGI_FORMAT_R9G9B9E5_SHAREDEXP: + case DXGI_FORMAT_B8G8R8A8_UNORM: + case DXGI_FORMAT_B8G8R8X8_UNORM: + case DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM: + case DXGI_FORMAT_B8G8R8A8_TYPELESS: + case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB: + case DXGI_FORMAT_B8G8R8X8_TYPELESS: + case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB: + case DXGI_FORMAT_AYUV: + case DXGI_FORMAT_Y410: + bytes_per_block = 4; + break; + case DXGI_FORMAT_R8G8_TYPELESS: + case DXGI_FORMAT_R8G8_UNORM: + case DXGI_FORMAT_R8G8_UINT: + case DXGI_FORMAT_R8G8_SNORM: + case DXGI_FORMAT_R8G8_SINT: + case DXGI_FORMAT_R16_TYPELESS: + case DXGI_FORMAT_R16_FLOAT: + case DXGI_FORMAT_D16_UNORM: + case DXGI_FORMAT_R16_UNORM: + case DXGI_FORMAT_R16_UINT: + case DXGI_FORMAT_R16_SNORM: + case DXGI_FORMAT_R16_SINT: + case DXGI_FORMAT_B5G6R5_UNORM: + case DXGI_FORMAT_B5G5R5A1_UNORM: + case DXGI_FORMAT_A8P8: + case DXGI_FORMAT_B4G4R4A4_UNORM: + bytes_per_block = 2; + break; + case DXGI_FORMAT_R8_TYPELESS: + case DXGI_FORMAT_R8_UNORM: + case DXGI_FORMAT_R8_UINT: + case DXGI_FORMAT_R8_SNORM: + case DXGI_FORMAT_R8_SINT: + case DXGI_FORMAT_A8_UNORM: + case DXGI_FORMAT_AI44: + case DXGI_FORMAT_IA44: + case DXGI_FORMAT_P8: + bytes_per_block = 1; + break; + // R1_UNORM is not supported in Direct3D 12. + case DXGI_FORMAT_R8G8_B8G8_UNORM: + case DXGI_FORMAT_G8R8_G8B8_UNORM: + case DXGI_FORMAT_Y210: + case DXGI_FORMAT_Y216: + // Failed to GetCopyableFootprints for Y210 and Y216 on Intel UHD Graphics + // 630. + block_width = 2; + bytes_per_block = 4; + break; + case DXGI_FORMAT_BC1_TYPELESS: + case DXGI_FORMAT_BC1_UNORM: + case DXGI_FORMAT_BC1_UNORM_SRGB: + case DXGI_FORMAT_BC4_TYPELESS: + case DXGI_FORMAT_BC4_UNORM: + case DXGI_FORMAT_BC4_SNORM: + block_width = 4; + block_height = 4; + bytes_per_block = 8; + break; + case DXGI_FORMAT_BC2_TYPELESS: + case DXGI_FORMAT_BC2_UNORM: + case DXGI_FORMAT_BC2_UNORM_SRGB: + case DXGI_FORMAT_BC3_TYPELESS: + case DXGI_FORMAT_BC3_UNORM: + case DXGI_FORMAT_BC3_UNORM_SRGB: + case DXGI_FORMAT_BC5_TYPELESS: + case DXGI_FORMAT_BC5_UNORM: + case DXGI_FORMAT_BC5_SNORM: + case DXGI_FORMAT_BC6H_TYPELESS: + case DXGI_FORMAT_BC6H_UF16: + case DXGI_FORMAT_BC6H_SF16: + case DXGI_FORMAT_BC7_TYPELESS: + case DXGI_FORMAT_BC7_UNORM: + case DXGI_FORMAT_BC7_UNORM_SRGB: + block_width = 4; + block_height = 4; + bytes_per_block = 16; + break; + // NV12, P010, P016, 420_OPAQUE and NV11 are not handled here because of + // differences that need to be handled externally. + // For future reference, if needed: + // - Width and height of planes 1 and 2 are divided by the block size in the + // footprint itself (unlike in block-compressed textures, where the + // dimensions are merely aligned). + // - Rows are aligned to the placement alignment (512) rather than the pitch + // alignment (256) for some reason (to match the Direct3D 11 layout + // without explicit planes, requiring the plane data to be laid out in + // some specific way defined on MSDN within each row, though Direct3D 12 + // possibly doesn't have such requirement, but investigation needed. + // - NV12: R8_TYPELESS plane 0, R8G8_TYPELESS plane 1. + // - P010, P016: R16_TYPELESS plane 0, R16G16_TYPELESS plane 1. Failed to + // GetCopyableFootprints for P016 on Nvidia GeForce GTX 1070. + // - 420_OPAQUE: Single R8_TYPELESS plane. + // - NV11: Failed to GetCopyableFootprints on both Nvidia GeForce GTX 1070 + // and Intel UHD Graphics 630. + case DXGI_FORMAT_YUY2: + block_width = 2; + bytes_per_block = 2; + break; + // P208, V208 and V408 are not supported in Direct3D 12. + default: + assert_unhandled_case(format); + } + copy_format_out = copy_format; + block_width_out = block_width; + block_height_out = block_height; + bytes_per_block_out = bytes_per_block; +} + } // namespace util } // namespace d3d12 } // namespace ui diff --git a/src/xenia/ui/d3d12/d3d12_util.h b/src/xenia/ui/d3d12/d3d12_util.h index 6798f4f1c..ceaed7839 100644 --- a/src/xenia/ui/d3d12/d3d12_util.h +++ b/src/xenia/ui/d3d12/d3d12_util.h @@ -19,7 +19,7 @@ namespace ui { namespace d3d12 { namespace util { -using DescriptorCPUGPUHandlePair = +using DescriptorCpuGpuHandlePair = std::pair; extern const D3D12_HEAP_PROPERTIES kHeapPropertiesDefault; @@ -93,6 +93,14 @@ void CreateBufferTypedUAV(ID3D12Device* device, ID3D12Resource* buffer, DXGI_FORMAT format, uint32_t num_elements, uint64_t first_element = 0); +// For cases where GetCopyableFootprints isn't usable (such as when the size +// needs to be overaligned beyond the maximum texture size), providing data +// needed to compute the copyable footprints manually. +void GetFormatCopyInfo(DXGI_FORMAT format, uint32_t plane, + DXGI_FORMAT& copy_format_out, uint32_t& block_width_out, + uint32_t& block_height_out, + uint32_t& bytes_per_block_out); + } // namespace util } // namespace d3d12 } // namespace ui diff --git a/src/xenia/ui/graphics_provider.h b/src/xenia/ui/graphics_provider.h index b0ebc9d3a..ccb9ab771 100644 --- a/src/xenia/ui/graphics_provider.h +++ b/src/xenia/ui/graphics_provider.h @@ -23,6 +23,17 @@ class Window; // according to the rules of the backing graphics API. class GraphicsProvider { public: + enum class GpuVendorID { + kAMD = 0x1002, + kApple = 0x106B, + kArm = 0x13B5, + kImagination = 0x1010, + kIntel = 0x8086, + kMicrosoft = 0x1414, + kNvidia = 0x10DE, + kQualcomm = 0x5143, + }; + virtual ~GraphicsProvider() = default; // The 'main' window of an application, used to query provider information. diff --git a/third_party/dxbc/d3d12TokenizedProgramFormat.hpp b/third_party/dxbc/d3d12TokenizedProgramFormat.hpp deleted file mode 100644 index 0fb259507..000000000 --- a/third_party/dxbc/d3d12TokenizedProgramFormat.hpp +++ /dev/null @@ -1,2612 +0,0 @@ -#pragma once -// Xenia: removed winapifamily.h dependency. - -// ---------------------------------------------------------------------------- -// -// D3D11 Tokenized Program Format -// -// Copyright (c) Microsoft Corporation. -// -// ---------------------------------------------------------------------------- -// -// High Level Goals -// -// - Serve as the runtime/DDI representation for all D3D11 tokenized code, -// for all classes of programs, including pixel program, vertex program, -// geometry program, etc. -// -// - Any information that HLSL needs to give to drivers is encoded in -// this token format in some form. -// -// - Enable common tools and source code for managing all tokenizable -// program formats. -// -// - Support extensible token definitions, allowing full customizations for -// specific program classes, while maintaining general conventions for all -// program models. -// -// - Binary backwards compatible with D3D10. Any token name that was originally -// defined with "D3D10" in it is unchanged; D3D11 only adds new tokens. -// -// ---------------------------------------------------------------------------- -// -// Low Level Feature Summary -// -// - DWORD based tokens always, for simplicity -// - Opcode token is generally a single DWORD, though there is a bit indicating -// if extended information (extra DWORD(s)) are present -// - Operand tokens are a completely self contained, extensible format, -// with scalar and 4-vector data types as first class citizens, but -// allowance for extension to n-component vectors. -// - Initial operand token identifies register type, register file -// structure/dimensionality and mode of indexing for each dimension, -// and choice of component selection mechanism (i.e. mask vs. swizzle etc). -// - Optional additional extended operand tokens can defined things like -// modifiers (which are not needed by default). -// - Operand's immediate index value(s), if needed, appear as subsequent DWORD -// values, and if relative addressing is specified, an additional completely -// self contained operand definition appears nested in the token sequence. -// -// ---------------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Version Token (VerTok) -// -// [07:00] minor version number (0-255) -// [15:08] major version number (0-255) -// [31:16] D3D10_SB_TOKENIZED_PROGRAM_TYPE -// -// ---------------------------------------------------------------------------- - -typedef enum D3D10_SB_TOKENIZED_PROGRAM_TYPE -{ - D3D10_SB_PIXEL_SHADER = 0, - D3D10_SB_VERTEX_SHADER = 1, - D3D10_SB_GEOMETRY_SHADER = 2, - - // D3D11 Shaders - D3D11_SB_HULL_SHADER = 3, - D3D11_SB_DOMAIN_SHADER = 4, - D3D11_SB_COMPUTE_SHADER = 5, - - D3D11_SB_RESERVED0 = 0xFFF0 -} D3D10_SB_TOKENIZED_PROGRAM_TYPE; - -#define D3D10_SB_TOKENIZED_PROGRAM_TYPE_MASK 0xffff0000 -#define D3D10_SB_TOKENIZED_PROGRAM_TYPE_SHIFT 16 - -// DECODER MACRO: Retrieve program type from version token -#define DECODE_D3D10_SB_TOKENIZED_PROGRAM_TYPE(VerTok) ((D3D10_SB_TOKENIZED_PROGRAM_TYPE)(((VerTok)&D3D10_SB_TOKENIZED_PROGRAM_TYPE_MASK)>>D3D10_SB_TOKENIZED_PROGRAM_TYPE_SHIFT)) - -#define D3D10_SB_TOKENIZED_PROGRAM_MAJOR_VERSION_MASK 0x000000f0 -#define D3D10_SB_TOKENIZED_PROGRAM_MAJOR_VERSION_SHIFT 4 -#define D3D10_SB_TOKENIZED_PROGRAM_MINOR_VERSION_MASK 0x0000000f - -// DECODER MACRO: Retrieve major version # from version token -#define DECODE_D3D10_SB_TOKENIZED_PROGRAM_MAJOR_VERSION(VerTok) (((VerTok)&D3D10_SB_TOKENIZED_PROGRAM_MAJOR_VERSION_MASK)>>D3D10_SB_TOKENIZED_PROGRAM_MAJOR_VERSION_SHIFT) -// DECODER MACRO: Retrieve minor version # from version token -#define DECODE_D3D10_SB_TOKENIZED_PROGRAM_MINOR_VERSION(VerTok) ((VerTok)&D3D10_SB_TOKENIZED_PROGRAM_MINOR_VERSION_MASK) - -// ENCODER MACRO: Create complete VerTok -#define ENCODE_D3D10_SB_TOKENIZED_PROGRAM_VERSION_TOKEN(ProgType,MajorVer,MinorVer) ((((ProgType)<> D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH_SHIFT) - -// ENCODER MACRO: Store instruction length -// portion of OpcodeToken0, in # of DWORDs -// including the opcode token(s). -// Valid range is 1-127. -#define ENCODE_D3D10_SB_TOKENIZED_INSTRUCTION_LENGTH(Length) (((Length)<>D3D10_SB_INSTRUCTION_TEST_BOOLEAN_SHIFT)) -// ENCODER MACRO: Store "zero" or "nonzero" in the opcode -// specific control range of OpcodeToken0 -#define ENCODE_D3D10_SB_INSTRUCTION_TEST_BOOLEAN(Boolean) (((Boolean)<>D3D11_SB_INSTRUCTION_PRECISE_VALUES_SHIFT)) -// ENCODER MACRO: Given a set of -// D3D10_SB_OPERAND_4_COMPONENT_[X|Y|Z|W] values -// or'd together, encode them in OpcodeToken0. -#define ENCODE_D3D11_SB_INSTRUCTION_PRECISE_VALUES(ComponentMask) (((ComponentMask)<>D3D10_SB_RESINFO_INSTRUCTION_RETURN_TYPE_SHIFT)) -// ENCODER MACRO: Encode the return type for the resinfo instruction -// in the opcode specific control range of OpcodeToken0 -#define ENCODE_D3D10_SB_RESINFO_INSTRUCTION_RETURN_TYPE(ReturnType) (((ReturnType)<> D3D10_SB_OPCODE_EXTENDED_SHIFT) -// ENCODER MACRO: Store in OpcodeToken0 whether the opcode is extended -// by an additional opcode token. -#define ENCODE_D3D10_SB_OPCODE_EXTENDED(bExtended) (((bExtended)!=0)?D3D10_SB_OPCODE_EXTENDED_MASK:0) - -// ---------------------------------------------------------------------------- -// Extended Opcode Format (OpcodeToken1) -// -// If bit31 of an opcode token is set, the -// opcode has an additional extended opcode token DWORD -// directly following OpcodeToken0. Other tokens -// expected for the opcode, such as the operand -// token(s) always follow -// OpcodeToken0 AND OpcodeToken1..n (extended -// opcode tokens, if present). -// -// [05:00] D3D10_SB_EXTENDED_OPCODE_TYPE -// [30:06] if([05:00] == D3D10_SB_EXTENDED_OPCODE_SAMPLE_CONTROLS) -// { -// This custom opcode contains controls for SAMPLE. -// [08:06] Ignored, 0. -// [12:09] U texel immediate offset (4 bit 2's comp) (0 default) -// [16:13] V texel immediate offset (4 bit 2's comp) (0 default) -// [20:17] W texel immediate offset (4 bit 2's comp) (0 default) -// [30:14] Ignored, 0. -// } -// else if( [05:00] == D3D11_SB_EXTENDED_OPCODE_RESOURCE_DIM ) -// { -// [10:06] D3D10_SB_RESOURCE_DIMENSION -// [22:11] When dimension is D3D11_SB_RESOURCE_DIMENSION_STRUCTURED_BUFFER this holds the buffer stride, otherwise 0 -// [30:23] Ignored, 0. -// } -// else if( [05:00] == D3D11_SB_EXTENDED_OPCODE_RESOURCE_RETURN_TYPE ) -// { -// [09:06] D3D10_SB_RESOURCE_RETURN_TYPE for component X -// [13:10] D3D10_SB_RESOURCE_RETURN_TYPE for component Y -// [17:14] D3D10_SB_RESOURCE_RETURN_TYPE for component Z -// [21:18] D3D10_SB_RESOURCE_RETURN_TYPE for component W -// [30:22] Ignored, 0. -// } -// else -// { -// [30:04] Ignored, 0. -// } -// [31] 0 normally. 1 there is another extended opcode. Any number -// of extended opcode tokens can be chained. It is possible that some extended -// opcode tokens could include multiple DWORDS - that is defined -// on a case by case basis. -// -// ---------------------------------------------------------------------------- -typedef enum D3D10_SB_EXTENDED_OPCODE_TYPE -{ - D3D10_SB_EXTENDED_OPCODE_EMPTY = 0, - D3D10_SB_EXTENDED_OPCODE_SAMPLE_CONTROLS = 1, - D3D11_SB_EXTENDED_OPCODE_RESOURCE_DIM = 2, - D3D11_SB_EXTENDED_OPCODE_RESOURCE_RETURN_TYPE = 3, -} D3D10_SB_EXTENDED_OPCODE_TYPE; -#define D3D11_SB_MAX_SIMULTANEOUS_EXTENDED_OPCODES 3 - -#define D3D10_SB_EXTENDED_OPCODE_TYPE_MASK 0x0000003f - -// DECODER MACRO: Given an extended opcode -// token (OpcodeToken1), figure out what type -// of token it is (from D3D10_SB_EXTENDED_OPCODE_TYPE enum) -// to be able to interpret the rest of the token's contents. -#define DECODE_D3D10_SB_EXTENDED_OPCODE_TYPE(OpcodeToken1) ((D3D10_SB_EXTENDED_OPCODE_TYPE)((OpcodeToken1)&D3D10_SB_EXTENDED_OPCODE_TYPE_MASK)) - -// ENCODER MACRO: Store extended opcode token -// type in OpcodeToken1. -#define ENCODE_D3D10_SB_EXTENDED_OPCODE_TYPE(ExtOpcodeType) ((ExtOpcodeType)&D3D10_SB_EXTENDED_OPCODE_TYPE_MASK) - -typedef enum D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_COORD -{ - D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_U = 0, - D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_V = 1, - D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_W = 2, -} D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_COORD; -#define D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_COORD_MASK (3) -#define D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_SHIFT(Coord) (9+4*((Coord)&D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_COORD_MASK)) -#define D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_MASK(Coord) (0x0000000f<>(D3D10_SB_IMMEDIATE_ADDRESS_OFFSET_SHIFT(Coord)))) - -// ENCODER MACRO: Store the immediate texel address offset -// for U or V or W Coord (D3D10_SB_ADDRESS_OFFSET_COORD) in an extended -// opcode token (OpcodeToken1) that has extended opcode -// type == D3D10_SB_EXTENDED_OPCODE_SAMPLE_CONTROLS (opcode type encoded separately) -// A 2's complement number is expected as input, from which the LSB 4 bits are extracted. -#define ENCODE_IMMEDIATE_D3D10_SB_ADDRESS_OFFSET(Coord,ImmediateOffset) (((ImmediateOffset)<>D3D11_SB_EXTENDED_RESOURCE_DIMENSION_SHIFT)) - -// ENCODER MACRO: Store resource dimension -// (D3D10_SB_RESOURCE_DIMENSION enum) into a -// an extended resource declaration token (D3D11_SB_EXTENDED_OPCODE_RESOURCE_DIM) -#define ENCODE_D3D11_SB_EXTENDED_RESOURCE_DIMENSION(ResourceDim) (((ResourceDim)<>D3D11_SB_EXTENDED_RESOURCE_DIMENSION_STRUCTURE_STRIDE_SHIFT) - -// ENCODER MACRO: Store resource dimension structure stride -// (12-bit unsigned integer) into a -// an extended resource declaration token (D3D11_SB_EXTENDED_OPCODE_RESOURCE_DIM) -#define ENCODE_D3D11_SB_EXTENDED_RESOURCE_DIMENSION_STRUCTURE_STRIDE(Stride) (((Stride)<> \ - (Component * D3D10_SB_RESOURCE_RETURN_TYPE_NUMBITS + D3D11_SB_EXTENDED_RESOURCE_RETURN_TYPE_SHIFT))&D3D10_SB_RESOURCE_RETURN_TYPE_MASK)) - -// ENCODER MACRO: Generate a resource return type for a component in an extended -// resource delcaration token (D3D11_SB_EXTENDED_OPCODE_RESOURCE_RETURN_TYPE) -#define ENCODE_D3D11_SB_EXTENDED_RESOURCE_RETURN_TYPE(ReturnType, Component) \ - (((ReturnType)&D3D10_SB_RESOURCE_RETURN_TYPE_MASK) << (Component * D3D10_SB_RESOURCE_RETURN_TYPE_NUMBITS + D3D11_SB_EXTENDED_RESOURCE_RETURN_TYPE_SHIFT)) - -// ---------------------------------------------------------------------------- -// Custom-Data Block Format -// -// DWORD 0 (CustomDataDescTok): -// [10:00] == D3D10_SB_OPCODE_CUSTOMDATA -// [31:11] == D3D10_SB_CUSTOMDATA_CLASS -// -// DWORD 1: -// 32-bit unsigned integer count of number -// of DWORDs in custom-data block, -// including DWORD 0 and DWORD 1. -// So the minimum value is 0x00000002, -// meaning empty custom-data. -// -// Layout of custom-data contents, for the various meta-data classes, -// not defined in this file. -// -// ---------------------------------------------------------------------------- - -typedef enum D3D10_SB_CUSTOMDATA_CLASS -{ - D3D10_SB_CUSTOMDATA_COMMENT = 0, - D3D10_SB_CUSTOMDATA_DEBUGINFO, - D3D10_SB_CUSTOMDATA_OPAQUE, - D3D10_SB_CUSTOMDATA_DCL_IMMEDIATE_CONSTANT_BUFFER, - D3D11_SB_CUSTOMDATA_SHADER_MESSAGE, - D3D11_SB_CUSTOMDATA_SHADER_CLIP_PLANE_CONSTANT_MAPPINGS_FOR_DX9, -} D3D10_SB_CUSTOMDATA_CLASS; - -#define D3D10_SB_CUSTOMDATA_CLASS_MASK 0xfffff800 -#define D3D10_SB_CUSTOMDATA_CLASS_SHIFT 11 -// DECODER MACRO: Find out what class of custom-data is present. -// The contents of the custom-data block are defined -// for each class of custom-data. -#define DECODE_D3D10_SB_CUSTOMDATA_CLASS(CustomDataDescTok) ((D3D10_SB_CUSTOMDATA_CLASS)(((CustomDataDescTok)&D3D10_SB_CUSTOMDATA_CLASS_MASK)>>D3D10_SB_CUSTOMDATA_CLASS_SHIFT)) -// ENCODER MACRO: Create complete CustomDataDescTok -#define ENCODE_D3D10_SB_CUSTOMDATA_CLASS(CustomDataClass) (ENCODE_D3D10_SB_OPCODE_TYPE(D3D10_SB_OPCODE_CUSTOMDATA)|(((CustomDataClass)<= D3D10_SB_OPERAND_INDEX_1D ) -// D3D10_SB_OPERAND_INDEX_REPRESENTATION for first operand index -// else -// Ignored, 0 -// [27:25] if( [21:20] >= D3D10_SB_OPERAND_INDEX_2D ) -// D3D10_SB_OPERAND_INDEX_REPRESENTATION for second operand index -// else -// Ignored, 0 -// [30:28] if( [21:20] == D3D10_SB_OPERAND_INDEX_3D ) -// D3D10_SB_OPERAND_INDEX_REPRESENTATION for third operand index -// else -// Ignored, 0 -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. -// -// ---------------------------------------------------------------------------- - -// Number of components in data vector referred to by operand. -typedef enum D3D10_SB_OPERAND_NUM_COMPONENTS -{ - D3D10_SB_OPERAND_0_COMPONENT = 0, - D3D10_SB_OPERAND_1_COMPONENT = 1, - D3D10_SB_OPERAND_4_COMPONENT = 2, - D3D10_SB_OPERAND_N_COMPONENT = 3 // unused for now -} D3D10_SB_OPERAND_NUM_COMPONENTS; -#define D3D10_SB_OPERAND_NUM_COMPONENTS_MASK 0x00000003 - -// DECODER MACRO: Extract from OperandToken0 how many components -// the data vector referred to by the operand contains. -// (D3D10_SB_OPERAND_NUM_COMPONENTS enum) -#define DECODE_D3D10_SB_OPERAND_NUM_COMPONENTS(OperandToken0) ((D3D10_SB_OPERAND_NUM_COMPONENTS)((OperandToken0)&D3D10_SB_OPERAND_NUM_COMPONENTS_MASK)) - -// ENCODER MACRO: Define in OperandToken0 how many components -// the data vector referred to by the operand contains. -// (D3D10_SB_OPERAND_NUM_COMPONENTS enum). -#define ENCODE_D3D10_SB_OPERAND_NUM_COMPONENTS(NumComp) ((NumComp)&D3D10_SB_OPERAND_NUM_COMPONENTS_MASK) - -typedef enum D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE -{ - D3D10_SB_OPERAND_4_COMPONENT_MASK_MODE = 0, // mask 4 components - D3D10_SB_OPERAND_4_COMPONENT_SWIZZLE_MODE = 1, // swizzle 4 components - D3D10_SB_OPERAND_4_COMPONENT_SELECT_1_MODE = 2, // select 1 of 4 components -} D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE; - -#define D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE_MASK 0x0000000c -#define D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE_SHIFT 2 - -// DECODER MACRO: For an operand representing 4component data, -// extract from OperandToken0 the method for selecting data from -// the 4 components (D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE). -#define DECODE_D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE(OperandToken0) ((D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE)(((OperandToken0)&D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE_MASK)>>D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE_SHIFT)) - -// ENCODER MACRO: For an operand representing 4component data, -// encode in OperandToken0 a value from D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE -#define ENCODE_D3D10_SB_OPERAND_4_COMPONENT_SELECTION_MODE(SelectionMode) (((SelectionMode)<>(D3D10_SB_OPERAND_4_COMPONENT_SWIZZLE_SHIFT+2*((DestComp)&D3D10_SB_4_COMPONENT_NAME_MASK)))&D3D10_SB_4_COMPONENT_NAME_MASK)) - -// ENCODER MACRO: Generate a 4 component swizzle given -// 4 D3D10_SB_4_COMPONENT_NAME source values for dest -// components x, y, z, w respectively. -#define ENCODE_D3D10_SB_OPERAND_4_COMPONENT_SWIZZLE(XSrc,YSrc,ZSrc,WSrc) ((((XSrc)&D3D10_SB_4_COMPONENT_NAME_MASK)| \ - (((YSrc)&D3D10_SB_4_COMPONENT_NAME_MASK)<<2)| \ - (((ZSrc)&D3D10_SB_4_COMPONENT_NAME_MASK)<<4)| \ - (((WSrc)&D3D10_SB_4_COMPONENT_NAME_MASK)<<6) \ - )<>D3D10_SB_OPERAND_4_COMPONENT_SELECT_1_SHIFT)) - -// ENCODER MACRO: Given a D3D10_SB_4_COMPONENT_NAME selecting -// a single component for D3D10_SB_OPERAND_4_COMPONENT_SELECT_1_MODE, -// encode it into OperandToken0 -#define ENCODE_D3D10_SB_OPERAND_4_COMPONENT_SELECT_1(SelectedComp) (((SelectedComp)<>D3D10_SB_OPERAND_TYPE_SHIFT)) - -// ENCODER MACRO: Store operand type in OperandToken0. -#define ENCODE_D3D10_SB_OPERAND_TYPE(OperandType) (((OperandType)<>D3D10_SB_OPERAND_INDEX_DIMENSION_SHIFT)) - -// ENCODER MACRO: Store operand index dimension -// (D3D10_SB_OPERAND_INDEX_DIMENSION enum) in OperandToken0. -#define ENCODE_D3D10_SB_OPERAND_INDEX_DIMENSION(OperandIndexDim) (((OperandIndexDim)<>D3D10_SB_OPERAND_INDEX_REPRESENTATION_SHIFT(Dim))) - -// ENCODER MACRO: Store in OperandToken0 what representation -// an operand index is provided as (D3D10_SB_OPERAND_INDEX_REPRESENTATION enum), -// for index dimension [0], [1] or [2], depending on D3D10_SB_OPERAND_INDEX_DIMENSION. -#define ENCODE_D3D10_SB_OPERAND_INDEX_REPRESENTATION(Dim,IndexRepresentation) (((IndexRepresentation)<>D3D10_SB_OPERAND_EXTENDED_SHIFT) - -// ENCODER MACRO: Store in OperandToken0 whether the operand is extended -// by an additional operand token. -#define ENCODE_D3D10_SB_OPERAND_EXTENDED(bExtended) (((bExtended)!=0)?D3D10_SB_OPERAND_EXTENDED_MASK:0) - -// ---------------------------------------------------------------------------- -// Extended Instruction Operand Format (OperandToken1) -// -// If bit31 of an operand token is set, the -// operand has additional data in a second DWORD -// directly following OperandToken0. Other tokens -// expected for the operand, such as immmediate -// values or relative address operands (full -// operands in themselves) always follow -// OperandToken0 AND OperandToken1..n (extended -// operand tokens, if present). -// -// [05:00] D3D10_SB_EXTENDED_OPERAND_TYPE -// [16:06] if([05:00] == D3D10_SB_EXTENDED_OPERAND_MODIFIER) -// { -// [13:06] D3D10_SB_OPERAND_MODIFIER -// [16:14] Min Precision: D3D11_SB_OPERAND_MIN_PRECISION -// [17:17] Non-uniform: D3D12_SB_OPERAND_NON_UNIFORM -// } -// else -// { -// [17:06] Ignored, 0. -// } -// [30:18] Ignored, 0. -// [31] 0 normally. 1 if second order extended operand definition, -// meaning next DWORD contains yet ANOTHER extended operand -// description. Currently no second order extensions defined. -// This would be useful if a particular extended operand does -// not have enough space to store the required information in -// a single token and so is extended further. -// -// ---------------------------------------------------------------------------- - -typedef enum D3D10_SB_EXTENDED_OPERAND_TYPE -{ - D3D10_SB_EXTENDED_OPERAND_EMPTY = 0, // Might be used if this - // enum is full and - // further extended opcode - // is needed. - D3D10_SB_EXTENDED_OPERAND_MODIFIER = 1, -} D3D10_SB_EXTENDED_OPERAND_TYPE; -#define D3D10_SB_EXTENDED_OPERAND_TYPE_MASK 0x0000003f - -// DECODER MACRO: Given an extended operand -// token (OperandToken1), figure out what type -// of token it is (from D3D10_SB_EXTENDED_OPERAND_TYPE enum) -// to be able to interpret the rest of the token's contents. -#define DECODE_D3D10_SB_EXTENDED_OPERAND_TYPE(OperandToken1) ((D3D10_SB_EXTENDED_OPERAND_TYPE)((OperandToken1)&D3D10_SB_EXTENDED_OPERAND_TYPE_MASK)) - -// ENCODER MACRO: Store extended operand token -// type in OperandToken1. -#define ENCODE_D3D10_SB_EXTENDED_OPERAND_TYPE(ExtOperandType) ((ExtOperandType)&D3D10_SB_EXTENDED_OPERAND_TYPE_MASK) - -typedef enum D3D10_SB_OPERAND_MODIFIER -{ - D3D10_SB_OPERAND_MODIFIER_NONE = 0, // Nop. This is the implied - // default if the extended - // operand is not present for - // an operand for which source - // modifiers are meaningful - D3D10_SB_OPERAND_MODIFIER_NEG = 1, // Negate - D3D10_SB_OPERAND_MODIFIER_ABS = 2, // Absolute value, abs() - D3D10_SB_OPERAND_MODIFIER_ABSNEG = 3, // -abs() -} D3D10_SB_OPERAND_MODIFIER; -#define D3D10_SB_OPERAND_MODIFIER_MASK 0x00003fc0 -#define D3D10_SB_OPERAND_MODIFIER_SHIFT 6 - -// DECODER MACRO: Given a D3D10_SB_EXTENDED_OPERAND_MODIFIER -// extended token (OperandToken1), determine the source modifier -// (D3D10_SB_OPERAND_MODIFIER enum) -#define DECODE_D3D10_SB_OPERAND_MODIFIER(OperandToken1) ((D3D10_SB_OPERAND_MODIFIER)(((OperandToken1)&D3D10_SB_OPERAND_MODIFIER_MASK)>>D3D10_SB_OPERAND_MODIFIER_SHIFT)) - -// ENCODER MACRO: Generate a complete source modifier extended token -// (OperandToken1), given D3D10_SB_OPERAND_MODIFIER enum (the -// ext. operand type is also set to D3D10_SB_EXTENDED_OPERAND_MODIFIER). -#define ENCODE_D3D10_SB_EXTENDED_OPERAND_MODIFIER(SourceMod) ((((SourceMod)<> D3D11_SB_OPERAND_MIN_PRECISION_SHIFT)) - -// ENCODER MACRO: Encode minimum precision for execution -// into the extended operand token, OperandToken1 -#define ENCODE_D3D11_SB_OPERAND_MIN_PRECISION(MinPrecision) (((MinPrecision)<< D3D11_SB_OPERAND_MIN_PRECISION_SHIFT)& D3D11_SB_OPERAND_MIN_PRECISION_MASK) - - -// Non-uniform extended operand modifier. -#define D3D12_SB_OPERAND_NON_UNIFORM_MASK 0x00020000 -#define D3D12_SB_OPERAND_NON_UNIFORM_SHIFT 17 - -// DECODER MACRO: For an OperandToken1 that can specify a non-uniform operand -#define DECODE_D3D12_SB_OPERAND_NON_UNIFORM(OperandToken1) (((OperandToken1)& D3D12_SB_OPERAND_NON_UNIFORM_MASK)>> D3D12_SB_OPERAND_NON_UNIFORM_SHIFT) - -// ENCODER MACRO: Encode non-uniform state into the extended operand token, OperandToken1 -#define ENCODE_D3D12_SB_OPERAND_NON_UNIFORM(NonUniform) (((NonUniform)<< D3D12_SB_OPERAND_NON_UNIFORM_SHIFT)& D3D12_SB_OPERAND_NON_UNIFORM_MASK) - - -#define D3D10_SB_OPERAND_DOUBLE_EXTENDED_MASK 0x80000000 -#define D3D10_SB_OPERAND_DOUBLE_EXTENDED_SHIFT 31 -// DECODER MACRO: Determine if an extended operand token -// (OperandToken1) is further extended by yet another token -// (OperandToken2). Currently there are no secondary -// extended operand tokens. -#define DECODE_IS_D3D10_SB_OPERAND_DOUBLE_EXTENDED(OperandToken1) (((OperandToken1)&D3D10_SB_OPERAND_DOUBLE_EXTENDED_MASK)>>D3D10_SB_OPERAND_DOUBLE_EXTENDED_SHIFT) - -// ENCODER MACRO: Store in OperandToken1 whether the operand is extended -// by an additional operand token. Currently there are no secondary -// extended operand tokens. -#define ENCODE_D3D10_SB_OPERAND_DOUBLE_EXTENDED(bExtended) (((bExtended)!=0)?D3D10_SB_OPERAND_DOUBLE_EXTENDED_MASK:0) - -// ---------------------------------------------------------------------------- -// Name Token (NameToken) (used in declaration statements) -// -// [15:00] D3D10_SB_NAME enumeration -// [31:16] Reserved, 0 -// -// ---------------------------------------------------------------------------- -#define D3D10_SB_NAME_MASK 0x0000ffff - -// DECODER MACRO: Get the name from NameToken -#define DECODE_D3D10_SB_NAME(NameToken) ((D3D10_SB_NAME)((NameToken)&D3D10_SB_NAME_MASK)) - -// ENCODER MACRO: Generate a complete NameToken given a D3D10_SB_NAME -#define ENCODE_D3D10_SB_NAME(Name) ((Name)&D3D10_SB_NAME_MASK) - -//--------------------------------------------------------------------- -// Declaration Statements -// -// Declarations start with a standard opcode token, -// having opcode type being D3D10_SB_OPCODE_DCL*. -// Each particular declaration type has custom -// operand token(s), described below. -//--------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Global Flags Declaration -// -// OpcodeToken0: -// -// [10:00] D3D10_SB_OPCODE_DCL_GLOBAL_FLAGS -// [11:11] Refactoring allowed if bit set. -// [12:12] Enable double precision float ops. -// [13:13] Force early depth-stencil test. -// [14:14] Enable RAW and structured buffers in non-CS 4.x shaders. -// [15:15] Skip optimizations of shader IL when translating to native code -// [16:16] Enable minimum-precision data types -// [17:17] Enable 11.1 double-precision floating-point instruction extensions -// [18:18] Enable 11.1 non-double instruction extensions -// [23:19] Reserved for future flags. -// [30:24] Instruction length in DWORDs including the opcode token. == 1 -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by no operands. -// -// ---------------------------------------------------------------------------- -#define D3D10_SB_GLOBAL_FLAG_REFACTORING_ALLOWED (1<<11) -#define D3D11_SB_GLOBAL_FLAG_ENABLE_DOUBLE_PRECISION_FLOAT_OPS (1<<12) -#define D3D11_SB_GLOBAL_FLAG_FORCE_EARLY_DEPTH_STENCIL (1<<13) -#define D3D11_SB_GLOBAL_FLAG_ENABLE_RAW_AND_STRUCTURED_BUFFERS (1<<14) -#define D3D11_1_SB_GLOBAL_FLAG_SKIP_OPTIMIZATION (1<<15) -#define D3D11_1_SB_GLOBAL_FLAG_ENABLE_MINIMUM_PRECISION (1<<16) -#define D3D11_1_SB_GLOBAL_FLAG_ENABLE_DOUBLE_EXTENSIONS (1<<17) -#define D3D11_1_SB_GLOBAL_FLAG_ENABLE_SHADER_EXTENSIONS (1<<18) -#define D3D12_SB_GLOBAL_FLAG_ALL_RESOURCES_BOUND (1<<19) - -#define D3D10_SB_GLOBAL_FLAGS_MASK 0x00fff800 - -// DECODER MACRO: Get global flags -#define DECODE_D3D10_SB_GLOBAL_FLAGS(OpcodeToken0) ((OpcodeToken0)&D3D10_SB_GLOBAL_FLAGS_MASK) - -// ENCODER MACRO: Encode global flags -#define ENCODE_D3D10_SB_GLOBAL_FLAGS(Flags) ((Flags)&D3D10_SB_GLOBAL_FLAGS_MASK) - -// ---------------------------------------------------------------------------- -// Resource Declaration (non multisampled) -// -// OpcodeToken0: -// -// [10:00] D3D10_SB_OPCODE_DCL_RESOURCE -// [15:11] D3D10_SB_RESOURCE_DIMENSION -// [23:16] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 2 operands on Shader Models 4.0 through 5.0: -// (1) an operand, starting with OperandToken0, defining which -// t# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is being declared. -// (2) a Resource Return Type token (ResourceReturnTypeToken) -// -// OpcodeToken0 is followed by 3 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// t# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (t[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of resources in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the t# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (t[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of resource within space (may be dynamically indexed) -// (2) a Resource Return Type token (ResourceReturnTypeToken) -// (3) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- -#define D3D10_SB_RESOURCE_DIMENSION_MASK 0x0000F800 -#define D3D10_SB_RESOURCE_DIMENSION_SHIFT 11 - -// DECODER MACRO: Given a resource declaration token, -// (OpcodeToken0), determine the resource dimension -// (D3D10_SB_RESOURCE_DIMENSION enum) -#define DECODE_D3D10_SB_RESOURCE_DIMENSION(OpcodeToken0) ((D3D10_SB_RESOURCE_DIMENSION)(((OpcodeToken0)&D3D10_SB_RESOURCE_DIMENSION_MASK)>>D3D10_SB_RESOURCE_DIMENSION_SHIFT)) - -// ENCODER MACRO: Store resource dimension -// (D3D10_SB_RESOURCE_DIMENSION enum) into a -// a resource declaration token (OpcodeToken0) -#define ENCODE_D3D10_SB_RESOURCE_DIMENSION(ResourceDim) (((ResourceDim)<[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of resources in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the t# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (t[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of resource within space (may be dynamically indexed) -// (2) a Resource Return Type token (ResourceReturnTypeToken) -// (3) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- - -// use same macro for encoding/decoding resource dimension aas the non-msaa declaration - -#define D3D10_SB_RESOURCE_SAMPLE_COUNT_MASK 0x07F0000 -#define D3D10_SB_RESOURCE_SAMPLE_COUNT_SHIFT 16 - -// DECODER MACRO: Given a resource declaration token, -// (OpcodeToken0), determine the resource sample count (1..127) -#define DECODE_D3D10_SB_RESOURCE_SAMPLE_COUNT(OpcodeToken0) ((UINT)(((OpcodeToken0)&D3D10_SB_RESOURCE_SAMPLE_COUNT_MASK)>>D3D10_SB_RESOURCE_SAMPLE_COUNT_SHIFT)) - -// ENCODER MACRO: Store resource sample count up to 127 into a -// a resource declaration token (OpcodeToken0) -#define ENCODE_D3D10_SB_RESOURCE_SAMPLE_COUNT(SampleCount) (((SampleCount > 127 ? 127 : SampleCount)<> \ - (Component * D3D10_SB_RESOURCE_RETURN_TYPE_NUMBITS))&D3D10_SB_RESOURCE_RETURN_TYPE_MASK)) - -// ENCODER MACRO: Generate a resource return type for a component -#define ENCODE_D3D10_SB_RESOURCE_RETURN_TYPE(ReturnType, Component) \ - (((ReturnType)&D3D10_SB_RESOURCE_RETURN_TYPE_MASK) << (Component * D3D10_SB_RESOURCE_RETURN_TYPE_NUMBITS)) - -// ---------------------------------------------------------------------------- -// Sampler Declaration -// -// OpcodeToken0: -// -// [10:00] D3D10_SB_OPCODE_DCL_SAMPLER -// [14:11] D3D10_SB_SAMPLER_MODE -// [23:15] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 1 operand on Shader Models 4.0 through 5.0: -// (1) Operand starting with OperandToken0, defining which sampler -// (D3D10_SB_OPERAND_TYPE_SAMPLER) register # is being declared. -// -// OpcodeToken0 is followed by 2 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// s# register (D3D10_SB_OPERAND_TYPE_SAMPLER) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (s[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of samplers in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the s# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (s[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of sampler within space (may be dynamically indexed) -// (2) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- -typedef enum D3D10_SB_SAMPLER_MODE -{ - D3D10_SB_SAMPLER_MODE_DEFAULT = 0, - D3D10_SB_SAMPLER_MODE_COMPARISON = 1, - D3D10_SB_SAMPLER_MODE_MONO = 2, -} D3D10_SB_SAMPLER_MODE; - -#define D3D10_SB_SAMPLER_MODE_MASK 0x00007800 -#define D3D10_SB_SAMPLER_MODE_SHIFT 11 - -// DECODER MACRO: Find out if a Constant Buffer is going to be indexed or not -#define DECODE_D3D10_SB_SAMPLER_MODE(OpcodeToken0) ((D3D10_SB_SAMPLER_MODE)(((OpcodeToken0)&D3D10_SB_SAMPLER_MODE_MASK)>>D3D10_SB_SAMPLER_MODE_SHIFT)) - -// ENCODER MACRO: Generate a resource return type for a component -#define ENCODE_D3D10_SB_SAMPLER_MODE(SamplerMode) (((SamplerMode)<>D3D10_SB_INPUT_INTERPOLATION_MODE_SHIFT)) - -// ENCODER MACRO: Encode interpolation mode for a register. -#define ENCODE_D3D10_SB_INPUT_INTERPOLATION_MODE(InterpolationMode) (((InterpolationMode)<[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of constant buffers in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the cb#[] is used in shader instructions: (cb[][]) -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of constant buffer within space (may be dynamically indexed) -// 3 : location of vector within constant buffer being referenced, -// which may also be dynamically indexed, with no access pattern flag required. -// (2) a DWORD indicating the size of the constant buffer as a count of 16-byte vectors. -// Each vector is 32-bit*4 elements == 128-bits == 16 bytes. -// If the size is specified as 0, the CB size is not known (any size CB -// can be bound to the slot). -// (3) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- - -typedef enum D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN -{ - D3D10_SB_CONSTANT_BUFFER_IMMEDIATE_INDEXED = 0, - D3D10_SB_CONSTANT_BUFFER_DYNAMIC_INDEXED = 1 -} D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN; - -#define D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN_MASK 0x00000800 -#define D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN_SHIFT 11 - -// DECODER MACRO: Find out if a Constant Buffer is going to be indexed or not -#define DECODE_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN(OpcodeToken0) ((D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN)(((OpcodeToken0)&D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN_MASK)>>D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN_SHIFT)) - -// ENCODER MACRO: Encode the access pattern for the Constant Buffer -#define ENCODE_D3D10_SB_D3D10_SB_CONSTANT_BUFFER_ACCESS_PATTERN(AccessPattern) (((AccessPattern)<>D3D10_SB_GS_INPUT_PRIMITIVE_SHIFT)) - -// ENCODER MACRO: Store primitive topology -// (D3D10_SB_PRIMITIVE enum) into a -// a primitive topology declaration token (OpcodeToken0) -#define ENCODE_D3D10_SB_GS_INPUT_PRIMITIVE(Prim) (((Prim)<>D3D10_SB_GS_OUTPUT_PRIMITIVE_TOPOLOGY_SHIFT)) - -// ENCODER MACRO: Store primitive topology -// (D3D10_SB_PRIMITIVE_TOPOLOGY enum) into a -// a primitive topology declaration token (OpcodeToken0) -#define ENCODE_D3D10_SB_GS_OUTPUT_PRIMITIVE_TOPOLOGY(PrimTopology) (((PrimTopology)<>D3D11_SB_INPUT_CONTROL_POINT_COUNT_SHIFT)) - -// ENCODER MACRO: Store input control point count into a declaration token -#define ENCODE_D3D11_SB_INPUT_CONTROL_POINT_COUNT(Count) (((Count)<>D3D11_SB_OUTPUT_CONTROL_POINT_COUNT_SHIFT)) - -// ENCODER MACRO: Store output control point count into a declaration token -#define ENCODE_D3D11_SB_OUTPUT_CONTROL_POINT_COUNT(Count) (((Count)<>D3D11_SB_TESS_DOMAIN_SHIFT)) - -// ENCODER MACRO: Store tessellator domain -// (D3D11_SB_TESSELLATOR_DOMAIN enum) into a -// a tessellator domain declaration token (OpcodeToken0) -#define ENCODE_D3D11_SB_TESS_DOMAIN(Domain) (((Domain)<>D3D11_SB_TESS_PARTITIONING_SHIFT)) - -// ENCODER MACRO: Store tessellator partitioning -// (D3D11_SB_TESSELLATOR_PARTITIONING enum) into a -// a tessellator partitioning declaration token (OpcodeToken0) -#define ENCODE_D3D11_SB_TESS_PARTITIONING(Partitioning) (((Partitioning)<>D3D11_SB_TESS_OUTPUT_PRIMITIVE_SHIFT)) - -// ENCODER MACRO: Store tessellator output primitive -// (D3D11_SB_TESSELLATOR_OUTPUT_PRIMITIVE enum) into a -// a tessellator output primitive declaration token (OpcodeToken0) -#define ENCODE_D3D11_SB_TESS_OUTPUT_PRIMITIVE(OutputPrimitive) (((OutputPrimitive)<>D3D10_SB_INSTRUCTION_RETURN_TYPE_SHIFT)) -// ENCODER MACRO: Encode the return type for instructions -// in the opcode specific control range of OpcodeToken0 -#define ENCODE_D3D10_SB_INSTRUCTION_RETURN_TYPE(ReturnType) (((ReturnType)<>D3D11_SB_INTERFACE_INDEXED_BIT_SHIFT) ? true : false) -#define ENCODE_D3D11_SB_INTERFACE_INDEXED_BIT(IndexedBit) (((IndexedBit)<>D3D11_SB_INTERFACE_TABLE_LENGTH_SHIFT)) -#define ENCODE_D3D11_SB_INTERFACE_TABLE_LENGTH(TableLength) (((TableLength)<>D3D11_SB_INTERFACE_ARRAY_LENGTH_SHIFT)) -#define ENCODE_D3D11_SB_INTERFACE_ARRAY_LENGTH(ArrayLength) (((ArrayLength)<[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of UAV's in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the u# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (u[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of uav within space (may be dynamically indexed) -// (2) a Resource Return Type token (ResourceReturnTypeToken) -// (3) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- -// UAV access scope flags -#define D3D11_SB_GLOBALLY_COHERENT_ACCESS 0x00010000 -#define D3D11_SB_ACCESS_COHERENCY_MASK 0x00010000 - -// DECODER MACRO: Retrieve flags for sync instruction from OpcodeToken0. -#define DECODE_D3D11_SB_ACCESS_COHERENCY_FLAGS(OperandToken0) ((OperandToken0)&D3D11_SB_ACCESS_COHERENCY_MASK) - -// ENCODER MACRO: Given a set of sync instruciton flags, encode them in OpcodeToken0. -#define ENCODE_D3D11_SB_ACCESS_COHERENCY_FLAGS(Flags) ((Flags)&D3D11_SB_ACCESS_COHERENCY_MASK) - -// Additional UAV access flags -#define D3D11_SB_RASTERIZER_ORDERED_ACCESS 0x00020000 - -// Resource flags mask. Use to retrieve all resource flags, including the order preserving counter. -#define D3D11_SB_RESOURCE_FLAGS_MASK (D3D11_SB_GLOBALLY_COHERENT_ACCESS|D3D11_SB_RASTERIZER_ORDERED_ACCESS|D3D11_SB_UAV_HAS_ORDER_PRESERVING_COUNTER) - -// DECODER MACRO: Retrieve UAV access flags for from OpcodeToken0. -#define DECODE_D3D11_SB_RESOURCE_FLAGS(OperandToken0) ((OperandToken0)&D3D11_SB_RESOURCE_FLAGS_MASK) - -// ENCODER MACRO: Given UAV access flags, encode them in OpcodeToken0. -#define ENCODE_D3D11_SB_RESOURCE_FLAGS(Flags) ((Flags)&D3D11_SB_RESOURCE_FLAGS_MASK) - -// ---------------------------------------------------------------------------- -// Raw Unordered Access View Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_UNORDERED_ACCESS_VIEW_RAW -// [15:11] Ignored, 0 -// [16:16] D3D11_SB_GLOBALLY_COHERENT_ACCESS or 0 (LOCALLY_COHERENT) -// [17:17] D3D11_SB_RASTERIZER_ORDERED_ACCESS or 0 -// [23:18] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 1 operand on Shader Models 4.0 through 5.0: -// (1) an operand, starting with OperandToken0, defining which -// u# register (D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW) is being declared. -// -// OpcodeToken0 is followed by 2 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// u# register (D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (u[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of UAV's in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the u# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (u[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of uav within space (may be dynamically indexed) -// (2) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Structured Unordered Access View Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_UNORDERED_ACCESS_VIEW_STRUCTURED -// [15:11] Ignored, 0 -// [16:16] D3D11_SB_GLOBALLY_COHERENT_ACCESS or 0 (LOCALLY_COHERENT) -// [17:17] D3D11_SB_RASTERIZER_ORDERED_ACCESS or 0 -// [22:18] Ignored, 0 -// [23:23] D3D11_SB_UAV_HAS_ORDER_PRESERVING_COUNTER or 0 -// -// The presence of this flag means that if a UAV is bound to the -// corresponding slot, it must have been created with -// D3D11_BUFFER_UAV_FLAG_COUNTER at the API. Also, the shader -// can contain either imm_atomic_alloc or _consume instructions -// operating on the given UAV. -// -// If this flag is not present, the shader can still contain -// either imm_atomic_alloc or imm_atomic_consume instructions for -// this UAV. But if such instructions are present in this case, -// and a UAV is bound corresponding slot, it must have been created -// with the D3D11_BUFFER_UAV_FLAG_APPEND flag at the API. -// Append buffers have a counter as well, but values returned -// to the shader are only valid for the lifetime of the shader -// invocation. -// -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 2 operands: -// (1) an operand, starting with OperandToken0, defining which -// u# register (D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW) is -// being declared. -// (2) a DWORD indicating UINT32 byte stride -// -// OpcodeToken0 is followed by 3 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// u# register (D3D11_SB_OPERAND_TYPE_UNORDERED_ACCESS_VIEW) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (u[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of UAV's in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the u# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (u[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of uav within space (may be dynamically indexed) -// (2) a DWORD indicating UINT32 byte stride -// (3) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- -// UAV flags -#define D3D11_SB_UAV_HAS_ORDER_PRESERVING_COUNTER 0x00800000 -#define D3D11_SB_UAV_FLAGS_MASK 0x00800000 - -// DECODER MACRO: Retrieve flags about UAV from OpcodeToken0. -#define DECODE_D3D11_SB_UAV_FLAGS(OperandToken0) ((OperandToken0)&D3D11_SB_UAV_FLAGS_MASK) - -// ENCODER MACRO: Given a set of UAV flags, encode them in OpcodeToken0. -#define ENCODE_D3D11_SB_UAV_FLAGS(Flags) ((Flags)&D3D11_SB_UAV_FLAGS_MASK) - -// ---------------------------------------------------------------------------- -// Raw Thread Group Shared Memory Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_THREAD_GROUP_SHARED_MEMORY_RAW -// [23:11] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 2 operands: -// (1) an operand, starting with OperandToken0, defining which -// g# register (D3D11_SB_OPERAND_TYPE_THREAD_GROUP_SHARED_MEMORY) is being declared. -// (2) a DWORD indicating the element count, # of 32-bit scalars.. -// -// ---------------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Structured Thread Group Shared Memory Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_THREAD_GROUP_SHARED_MEMORY_STRUCTURED -// [23:11] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 3 operands: -// (1) an operand, starting with OperandToken0, defining which -// g# register (D3D11_SB_OPERAND_TYPE_THREAD_GROUP_SHARED_MEMORY) is -// being declared. -// (2) a DWORD indicating UINT32 struct byte stride -// (3) a DWORD indicating UINT32 struct count -// -// ---------------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Raw Shader Resource View Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_RESOURCE_RAW -// [23:11] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 1 operand: -// (1) an operand, starting with OperandToken0, defining which -// t# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is being declared. -// -// OpcodeToken0 is followed by 2 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// t# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (t[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of resources in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the t# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (t[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of resource within space (may be dynamically indexed) -// (2) a DWORD indicating the space index. -// -// ---------------------------------------------------------------------------- - -// ---------------------------------------------------------------------------- -// Structured Shader Resource View Declaration -// -// OpcodeToken0: -// -// [10:00] D3D11_SB_OPCODE_DCL_RESOURCE_STRUCTURED -// [23:11] Ignored, 0 -// [30:24] Instruction length in DWORDs including the opcode token. -// [31] 0 normally. 1 if extended operand definition, meaning next DWORD -// contains extended operand description. This dcl is currently not -// extended. -// -// OpcodeToken0 is followed by 2 operands: -// (1) an operand, starting with OperandToken0, defining which -// g# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is -// being declared. -// (2) a DWORD indicating UINT32 struct byte stride -// -// OpcodeToken0 is followed by 3 operands on Shader Model 5.1 and later: -// (1) an operand, starting with OperandToken0, defining which -// t# register (D3D10_SB_OPERAND_TYPE_RESOURCE) is being declared. -// The indexing dimension for the register must be D3D10_SB_OPERAND_INDEX_DIMENSION_3D, -// and the meaning of the index dimensions are as follows: (t[:]) -// 1 : variable ID being declared -// 2 : the lower bound of the range of resources in the space -// 3 : the upper bound (inclusive) of this range -// As opposed to when the t# is used in shader instructions, where the register -// must be D3D10_SB_OPERAND_INDEX_DIMENSION_2D, and the meaning of the index -// dimensions are as follows: (t[]): -// 1 : variable ID being used (matches dcl) -// 2 : absolute index of resource within space (may be dynamically indexed) -// (2) a DWORD indicating UINT32 struct byte stride -// (3) a DWORD indicating the space index. -// -// ----------------------------------------------------------------------------