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Ringbuffer init fix

This commit is contained in:
Cesys 2017-03-25 20:00:48 -07:00
parent 9d721df061
commit 8c4ca35a35
2 changed files with 2 additions and 0 deletions
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1
src/xenia/gpu/command_processor.cc
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@ -229,6 +229,7 @@ bool CommandProcessor::SetupContext() { return true; }
void CommandProcessor::ShutdownContext() { context_.reset(); } void CommandProcessor::ShutdownContext() { context_.reset(); }
void CommandProcessor::InitializeRingBuffer(uint32_t ptr, uint32_t log2_size) { void CommandProcessor::InitializeRingBuffer(uint32_t ptr, uint32_t log2_size) {
read_ptr_index_ = 0;
primary_buffer_ptr_ = ptr; primary_buffer_ptr_ = ptr;
primary_buffer_size_ = uint32_t(std::pow(2u, log2_size)); primary_buffer_size_ = uint32_t(std::pow(2u, log2_size));
} }

1
src/xenia/gpu/vulkan/pipeline_cache.cc
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@ -1074,6 +1074,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateInputAssemblyState(
} }
// TODO(benvanik): no way to specify in Vulkan? // TODO(benvanik): no way to specify in Vulkan?
assert_true(regs.multi_prim_ib_reset_index == 0xFFFF || assert_true(regs.multi_prim_ib_reset_index == 0xFFFF ||
regs.multi_prim_ib_reset_index == 0xFFFFFF ||
regs.multi_prim_ib_reset_index == 0xFFFFFFFF); regs.multi_prim_ib_reset_index == 0xFFFFFFFF);
// glPrimitiveRestartIndex(regs.multi_prim_ib_reset_index); // glPrimitiveRestartIndex(regs.multi_prim_ib_reset_index);