From 8aa4b9372a33933308a55b63add1791f63077e86 Mon Sep 17 00:00:00 2001 From: Wunkolo Date: Fri, 3 May 2024 20:41:10 -0700 Subject: [PATCH] [a64] Fix memory address generation --- src/xenia/cpu/backend/a64/a64_seq_memory.cc | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/xenia/cpu/backend/a64/a64_seq_memory.cc b/src/xenia/cpu/backend/a64/a64_seq_memory.cc index 54ac1177a..12b625c01 100644 --- a/src/xenia/cpu/backend/a64/a64_seq_memory.cc +++ b/src/xenia/cpu/backend/a64/a64_seq_memory.cc @@ -49,7 +49,8 @@ XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset, if (xe::memory::allocation_granularity() > 0x1000) { // Emulate the 4 KB physical address offset in 0xE0000000+ when can't do // it via memory mapping. - e.CMP(guest.reg().toW(), 0xE0000000 - offset_const); + e.MOV(W1, 0xE0000000 - offset_const); + e.CMP(guest.reg().toW(), W1); e.CSET(X0, Cond::HS); e.LSL(X0, X0, 12); e.ADD(X0, X0, guest.reg()); @@ -59,8 +60,9 @@ XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset, // TODO(benvanik): find a way to avoid doing this. e.MOV(W0, guest.reg().toW()); } - e.ADD(address_register, e.GetMembaseReg(), X0); - e.ADD(address_register, address_register, offset_const); + e.MOV(address_register, offset_const); + e.ADD(address_register, X0, address_register); + e.ADD(address_register, address_register, e.GetMembaseReg()); return address_register; // return e.GetMembaseReg() + e.rax + offset_const; } @@ -92,7 +94,8 @@ XReg ComputeMemoryAddress(A64Emitter& e, const T& guest, if (xe::memory::allocation_granularity() > 0x1000) { // Emulate the 4 KB physical address offset in 0xE0000000+ when can't do // it via memory mapping. - e.CMP(guest.reg().toW(), 0xE0000000); + e.MOV(W1, 0xE0000000); + e.CMP(guest.reg().toW(), W1); e.CSET(X0, Cond::HS); e.LSL(X0, X0, 12); e.ADD(X0, X0, guest);