Last of the integer memory instructions and a lot of the fp ones.
This commit is contained in:
Ben Vanik
parent
9dcf2d27fb
commit
7fed5cf579
78
TODO.md
78
TODO.md
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@ -44,92 +44,18 @@ KeBugCheck:
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```
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rlwimix
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rldiclx
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addcx
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addex
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addicx
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andisx
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cntlzdx
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dcbf
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dcbz
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divdux
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divdx
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divwx
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eieio
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eqvx
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extshx
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extswx
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fabsx
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faddsx
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faddx
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fcfidx
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fcmpu
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fctidzx
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fctiwzx
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fdivsx
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fdivx
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fmaddsx
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fmaddx
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fmrx
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fmsubsx
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fmsubx
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fmulsx
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fmulx
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fnegx
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fnmsubsx
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fnmsubx
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frspx
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fselx
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fsqrtx
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fsubsx
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fsubx
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ldarx
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ldx
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lwarx
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stwcx
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lfd
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lfdx
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lfs
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lfsu
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lfsux
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lfsx
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lha
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lhax
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lhzu
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lhzx
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lwa
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lwarx
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lwax
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lwbrx
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lwzux
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mftb
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mulldx
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nandx
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negx
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orcx
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rldiclx
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rldicrx
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rldimix
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rlwnmx
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sldx
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sradix
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sradx
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srawx
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srdx
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srwx
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stbx
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stdcx
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stdx
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stfd
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stfdu
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stfdx
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stfiwx
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stfs
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stfsu
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stfsx
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stwbrx
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stwcx
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stwux
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subfcx
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subfzex
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sync
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```
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### XER CA bit (carry)
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@ -83,13 +83,16 @@ public:
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llvm::Value* gpr_value(uint32_t n);
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void update_gpr_value(uint32_t n, llvm::Value* value);
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llvm::Value* fpr_value(uint32_t n);
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void update_fpr_value(uint32_t n, llvm::Value* value);
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llvm::Value* GetMembase();
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llvm::Value* GetMemoryAddress(uint32_t cia, llvm::Value* addr);
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llvm::Value* ReadMemory(
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uint32_t cia, llvm::Value* addr, uint32_t size, bool extend);
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uint32_t cia, llvm::Value* addr, uint32_t size, bool acquire = false);
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void WriteMemory(
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uint32_t cia, llvm::Value* addr, uint32_t size, llvm::Value* value);
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uint32_t cia, llvm::Value* addr, uint32_t size, llvm::Value* value,
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bool release = false);
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private:
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void GenerateSharedBlocks();
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@ -128,6 +131,7 @@ private:
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llvm::Value* ctr;
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llvm::Value* cr[8];
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llvm::Value* gpr[32];
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llvm::Value* fpr[32];
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} locals_;
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};
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@ -182,9 +182,34 @@ XEEMITTER(ldx, 0x7C00002A, X )(FunctionGenerator& g, IRBuilder<>& b, I
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return 1;
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}
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XEDISASMR(lha, 0xA8000000, D )(InstrData& i, InstrDisasm& d) {
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d.Init("lha", "Load Halfword Algebraic", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.D.RT, InstrRegister::kWrite);
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if (i.D.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
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return d.Finish();
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}
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XEEMITTER(lha, 0xA8000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + EXTS(D)
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// RT <- EXTS(MEM(EA, 2))
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Value* ea = b.getInt64(XEEXTS16(i.D.DS));
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if (i.D.RA) {
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ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
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}
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Value* v = b.CreateSExt(g.ReadMemory(i.address, ea, 2, false),
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b.getInt64Ty());
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g.update_gpr_value(i.D.RT, v);
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return 0;
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}
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XEEMITTER(lhau, 0xAC000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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@ -197,9 +222,34 @@ XEEMITTER(lhaux, 0x7C0002EE, X )(FunctionGenerator& g, IRBuilder<>& b, I
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return 1;
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}
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XEDISASMR(lhax, 0x7C0002AE, X )(InstrData& i, InstrDisasm& d) {
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d.Init("lhax", "Load Halfword Algebraic Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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if (i.X.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(lhax, 0x7C0002AE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + (RB)
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// RT <- EXTS(MEM(EA, 2))
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Value* ea = g.gpr_value(i.X.RB);
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if (i.X.RA) {
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ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
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}
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Value* v = b.CreateSExt(g.ReadMemory(i.address, ea, 2, false),
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b.getInt64Ty());
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g.update_gpr_value(i.X.RT, v);
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return 0;
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}
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XEDISASMR(lhz, 0xA0000000, D )(InstrData& i, InstrDisasm& d) {
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@ -231,24 +281,103 @@ XEEMITTER(lhz, 0xA0000000, D )(FunctionGenerator& g, IRBuilder<>& b, I
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return 0;
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}
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XEDISASMR(lhzu, 0xA4000000, D )(InstrData& i, InstrDisasm& d) {
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d.Init("lhzu", "Load Halfword and Zero with Update", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.D.RT, InstrRegister::kWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kReadWrite);
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d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
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return d.Finish();
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}
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XEEMITTER(lhzu, 0xA4000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// EA <- (RA) + EXTS(D)
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// RT <- i48.0 || MEM(EA, 2)
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// RA <- EA
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Value* ea = b.CreateAdd(g.gpr_value(i.D.RA), b.getInt64(XEEXTS16(i.D.DS)));
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Value* v = g.ReadMemory(i.address, ea, 2, false);
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g.update_gpr_value(i.D.RT, v);
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g.update_gpr_value(i.D.RA, ea);
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return 0;
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}
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XEDISASMR(lhzux, 0x7C00026E, X )(InstrData& i, InstrDisasm& d) {
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d.Init("lhzux", "Load Halfword and Zero with Update Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(lhzux, 0x7C00026E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// EA <- (RA) + (RB)
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// RT <- i48.0 || MEM(EA, 2)
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// RA <- EA
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Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
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Value* v = g.ReadMemory(i.address, ea, 2, false);
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g.update_gpr_value(i.X.RT, v);
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g.update_gpr_value(i.X.RA, ea);
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return 0;
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}
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XEDISASMR(lhzx, 0x7C00022E, X )(InstrData& i, InstrDisasm& d) {
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d.Init("lhzx", "Load Halfword and Zero Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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if (i.X.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(lhzx, 0x7C00022E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + (RB)
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// RT <- i48.0 || MEM(EA, 2)
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Value* ea = g.gpr_value(i.X.RB);
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if (i.X.RA) {
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ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
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}
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Value* v = g.ReadMemory(i.address, ea, 2, false);
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g.update_gpr_value(i.X.RT, v);
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return 0;
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}
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XEDISASMR(lwa, 0xE8000002, DS )(InstrData& i, InstrDisasm& d) {
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d.Init("lwa", "Load Word Algebraic", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.DS.RT, InstrRegister::kWrite);
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if (i.D.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.DS.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddSImmOperand(XEEXTS16(i.DS.DS << 2), 2);
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return d.Finish();
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}
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XEEMITTER(lwa, 0xE8000002, DS )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + EXTS(D || 00)
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// RT <- EXTS(MEM(EA, 4))
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Value* ea = b.getInt64(XEEXTS16(i.DS.DS << 2));
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if (i.DS.RA) {
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ea = b.CreateAdd(g.gpr_value(i.DS.RA), ea);
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}
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Value* v = b.CreateSExt(g.ReadMemory(i.address, ea, 4, false),
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b.getInt64Ty());
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g.update_gpr_value(i.DS.RT, v);
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return 0;
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}
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XEDISASMR(lwaux, 0x7C0002EA, X )(InstrData& i, InstrDisasm& d) {
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@ -351,9 +480,24 @@ XEEMITTER(lwzu, 0x84000000, D )(FunctionGenerator& g, IRBuilder<>& b, I
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return 0;
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}
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XEDISASMR(lwzux, 0x7C00006E, X )(InstrData& i, InstrDisasm& d) {
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d.Init("lwzux", "Load Word and Zero with Update Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(lwzux, 0x7C00006E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// EA <- (RA) + (RB)
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// RT <- i32.0 || MEM(EA, 4)
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// RA <- EA
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Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
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Value* v = g.ReadMemory(i.address, ea, 4, false);
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g.update_gpr_value(i.X.RT, v);
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g.update_gpr_value(i.X.RA, ea);
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return 0;
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}
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XEDISASMR(lwzx, 0x7C00002E, X )(InstrData& i, InstrDisasm& d) {
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@ -536,14 +680,53 @@ XEEMITTER(stdu, 0xF8000001, DS )(FunctionGenerator& g, IRBuilder<>& b, I
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return 0;
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}
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XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
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d.Init("stdux", "Store Doubleword with Update Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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if (i.DS.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(stdux, 0x7C00016A, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + (RB)
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// MEM(EA, 8) <- (RS)
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Value* ea = g.gpr_value(i.X.RB);
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if (i.X.RA) {
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ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
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}
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Value* v = g.gpr_value(i.X.RT);
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g.WriteMemory(i.address, ea, 8, v);
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return 0;
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}
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XEDISASMR(stdx, 0x7C00012A, X )(InstrData& i, InstrDisasm& d) {
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d.Init("stdx", "Store Doubleword Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(stdx, 0x7C00012A, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// EA <- (RA) + (RB)
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// MEM(EA, 8) <- (RS)
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// RA <- EA
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Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
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Value* v = g.gpr_value(i.X.RT);
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g.WriteMemory(i.address, ea, 8, v);
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g.update_gpr_value(i.X.RA, ea);
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return 0;
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}
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XEDISASMR(sth, 0xB0000000, D )(InstrData& i, InstrDisasm& d) {
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@ -831,9 +1014,38 @@ XEEMITTER(ldarx, 0x7C0000A8, X )(FunctionGenerator& g, IRBuilder<>& b, I
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return 1;
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}
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XEDISASMR(lwarx, 0x7C000028, X )(InstrData& i, InstrDisasm& d) {
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d.Init("lwarx", "Load Word And Reserve Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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if (i.X.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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}
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XEEMITTER(lwarx, 0x7C000028, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
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XEINSTRNOTIMPLEMENTED();
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return 1;
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// if RA = 0 then
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// b <- 0
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// else
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// b <- (RA)
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// EA <- b + (RB)
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// RESERVE <- 1
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// RESERVE_LENGTH <- 4
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// RESERVE_ADDR <- real_addr(EA)
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// RT <- i32.0 || MEM(EA, 4)
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// TODO(benvanik): make this right
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Value* ea = g.gpr_value(i.X.RB);
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if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
|
||||
}
|
||||
Value* v = g.ReadMemory(i.address, ea, 4, /* acquire */ true);
|
||||
g.update_gpr_value(i.X.RT, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEEMITTER(stdcx, 0x7C0001AD, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
|
|
@ -841,9 +1053,40 @@ XEEMITTER(stdcx, 0x7C0001AD, X )(FunctionGenerator& g, IRBuilder<>& b, I
|
|||
return 1;
|
||||
}
|
||||
|
||||
XEDISASMR(stwcx, 0x7C00012D, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stwcx", "Store Word Conditional Indexed",
|
||||
InstrDisasm::kRc);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
|
||||
if (i.D.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stwcx, 0x7C00012D, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// RESERVE stuff...
|
||||
// MEM(EA, 4) <- (RS)[32:63]
|
||||
// n <- 1 if store performed
|
||||
// CR0[LT GT EQ SO] = 0b00 || n || XER[SO]
|
||||
|
||||
// TODO(benvanik): make this right
|
||||
|
||||
Value* ea = b.getInt64(XEEXTS16(i.D.DS));
|
||||
if (i.D.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.gpr_value(i.D.RT);
|
||||
g.WriteMemory(i.address, ea, 4, v, /* release */ true);
|
||||
// TODO(benvanik): update CR0
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEEMITTER(sync, 0x7C0004AC, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
|
|
@ -854,92 +1097,447 @@ XEEMITTER(sync, 0x7C0004AC, X )(FunctionGenerator& g, IRBuilder<>& b, I
|
|||
|
||||
// Floating-point load (A-19)
|
||||
|
||||
XEDISASMR(lfd, 0xC8000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfd", "Load Floating-Point Double", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kWrite);
|
||||
if (i.D.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfd, 0xC8000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + EXTS(D)
|
||||
// FRT <- MEM(EA, 8)
|
||||
|
||||
Value* ea = b.getInt64(XEEXTS16(i.D.DS));
|
||||
if (i.D.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.ReadMemory(i.address, ea, 8, false);
|
||||
v = b.CreateBitCast(v, b.getDoubleTy());
|
||||
g.update_fpr_value(i.D.RT, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfdu, 0xCC000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfdu", "Load Floating-Point Double with Update", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kReadWrite);
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfdu, 0xCC000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + EXTS(D)
|
||||
// FRT <- MEM(EA, 8)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.D.RA), b.getInt64(XEEXTS16(i.D.DS)));
|
||||
Value* v = g.ReadMemory(i.address, ea, 8, false);
|
||||
v = b.CreateBitCast(v, b.getDoubleTy());
|
||||
g.update_fpr_value(i.D.RT, v);
|
||||
g.update_gpr_value(i.D.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfdux, 0x7C0004EE, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfdux", "Load Floating-Point Double with Update Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfdux, 0x7C0004EE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + (RB)
|
||||
// FRT <- MEM(EA, 8)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
|
||||
Value* v = g.ReadMemory(i.address, ea, 8, false);
|
||||
v = b.CreateBitCast(v, b.getDoubleTy());
|
||||
g.update_fpr_value(i.X.RT, v);
|
||||
g.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfdx, 0x7C0004AE, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfdx", "Load Floating-Point Double Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kWrite);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfdx, 0x7C0004AE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// FRT <- MEM(EA, 8)
|
||||
|
||||
Value* ea = g.gpr_value(i.X.RB);
|
||||
if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
|
||||
}
|
||||
Value* v = g.ReadMemory(i.address, ea, 8, false);
|
||||
v = b.CreateBitCast(v, b.getDoubleTy());
|
||||
g.update_fpr_value(i.X.RT, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfs, 0xC0000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfs", "Load Floating-Point Single", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kWrite);
|
||||
if (i.D.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfs, 0xC0000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + EXTS(D)
|
||||
// FRT <- DOUBLE(MEM(EA, 4))
|
||||
|
||||
Value* ea = b.getInt64(XEEXTS16(i.D.DS));
|
||||
if (i.D.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.ReadMemory(i.address, ea, 4, false);
|
||||
v = b.CreateFPExt(b.CreateBitCast(v, b.getFloatTy()), b.getDoubleTy());
|
||||
g.update_fpr_value(i.D.RT, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfsu, 0xC4000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfsu", "Load Floating-Point Single with Update", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kReadWrite);
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfsu, 0xC4000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + EXTS(D)
|
||||
// FRT <- DOUBLE(MEM(EA, 4))
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.D.RA), b.getInt64(XEEXTS16(i.D.DS)));
|
||||
Value* v = g.ReadMemory(i.address, ea, 4, false);
|
||||
v = b.CreateFPExt(b.CreateBitCast(v, b.getFloatTy()), b.getDoubleTy());
|
||||
g.update_fpr_value(i.D.RT, v);
|
||||
g.update_gpr_value(i.D.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfsux, 0x7C00046E, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfsux", "Load Floating-Point Single with Update Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfsux, 0x7C00046E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + (RB)
|
||||
// FRT <- DOUBLE(MEM(EA, 4))
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
|
||||
Value* v = g.ReadMemory(i.address, ea, 4, false);
|
||||
v = b.CreateFPExt(b.CreateBitCast(v, b.getFloatTy()), b.getDoubleTy());
|
||||
g.update_fpr_value(i.X.RT, v);
|
||||
g.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(lfsx, 0x7C00042E, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("lfsx", "Load Floating-Point Single Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kWrite);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(lfsx, 0x7C00042E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// FRT <- DOUBLE(MEM(EA, 4))
|
||||
|
||||
Value* ea = g.gpr_value(i.X.RB);
|
||||
if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
|
||||
}
|
||||
Value* v = g.ReadMemory(i.address, ea, 4, false);
|
||||
v = b.CreateFPExt(b.CreateBitCast(v, b.getFloatTy()), b.getDoubleTy());
|
||||
g.update_fpr_value(i.X.RT, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
// Floating-point store (A-20)
|
||||
|
||||
XEDISASMR(stfd, 0xD8000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfd", "Store Floating-Point Double", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kRead);
|
||||
if (i.D.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfd, 0xD8000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + EXTS(D)
|
||||
// MEM(EA, 8) <- (FRS)
|
||||
|
||||
Value* ea = b.getInt64(XEEXTS16(i.D.DS));
|
||||
if (i.D.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.fpr_value(i.D.RT);
|
||||
v = b.CreateBitCast(v, b.getInt64Ty());
|
||||
g.WriteMemory(i.address, ea, 8, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfdu, 0xDC000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfdu", "Store Floating-Point Double with Update", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kRead);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kReadWrite);
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfdu, 0xDC000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + EXTS(D)
|
||||
// MEM(EA, 8) <- (FRS)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.D.RA),
|
||||
b.getInt64(XEEXTS16(i.D.DS)));
|
||||
Value* v = g.fpr_value(i.D.RT);
|
||||
v = b.CreateBitCast(v, b.getInt64Ty());
|
||||
g.WriteMemory(i.address, ea, 8, v);
|
||||
g.update_gpr_value(i.D.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfdux, 0x7C0005EE, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfdux", "Store Floating-Point Double with Update Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kRead);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfdux, 0x7C0005EE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + (RB)
|
||||
// MEM(EA, 8) <- (FRS)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
|
||||
Value* v = g.fpr_value(i.X.RT);
|
||||
v = b.CreateBitCast(v, b.getInt64Ty());
|
||||
g.WriteMemory(i.address, ea, 8, v);
|
||||
g.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfdx, 0x7C0005AE, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfdx", "Store Floating-Point Double Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kRead);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfdx, 0x7C0005AE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// MEM(EA, 8) <- (FRS)
|
||||
|
||||
Value* ea = g.gpr_value(i.X.RB);
|
||||
if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
|
||||
}
|
||||
Value* v = g.fpr_value(i.X.RT);
|
||||
v = b.CreateBitCast(v, b.getInt64Ty());
|
||||
g.WriteMemory(i.address, ea, 8, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfiwx, 0x7C0007AE, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfiwx", "Store Floating-Point as Integer Word Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kRead);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfiwx, 0x7C0007AE, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// MEM(EA, 4) <- (FRS)[32:63]
|
||||
|
||||
Value* ea = g.gpr_value(i.X.RB);
|
||||
if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.fpr_value(i.X.RT);
|
||||
v = b.CreateBitCast(v, b.getInt64Ty());
|
||||
g.WriteMemory(i.address, ea, 4, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfs, 0xD0000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfs", "Store Floating-Point Single", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kRead);
|
||||
if (i.D.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfs, 0xD0000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + EXTS(D)
|
||||
// MEM(EA, 4) <- SINGLE(FRS)
|
||||
|
||||
Value* ea = b.getInt64(XEEXTS16(i.D.DS));
|
||||
if (i.D.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.D.RA), ea);
|
||||
}
|
||||
Value* v = g.fpr_value(i.D.RT);
|
||||
v = b.CreateBitCast(b.CreateFPTrunc(v, b.getFloatTy()), b.getInt32Ty());
|
||||
g.WriteMemory(i.address, ea, 4, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfsu, 0xD4000000, D )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfsu", "Store Floating-Point Single with Update", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.D.RT, InstrRegister::kRead);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.D.RA, InstrRegister::kReadWrite);
|
||||
d.AddSImmOperand(XEEXTS16(i.D.DS), 2);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfsu, 0xD4000000, D )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + EXTS(D)
|
||||
// MEM(EA, 4) <- SINGLE(FRS)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.D.RA),
|
||||
b.getInt64(XEEXTS16(i.D.DS)));
|
||||
Value* v = g.fpr_value(i.D.RT);
|
||||
v = b.CreateBitCast(b.CreateFPTrunc(v, b.getFloatTy()), b.getInt32Ty());
|
||||
g.WriteMemory(i.address, ea, 4, v);
|
||||
g.update_gpr_value(i.D.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfsux, 0x7C00056E, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfsux", "Store Floating-Point Single with Update Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kRead);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfsux, 0x7C00056E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// EA <- (RA) + (RB)
|
||||
// MEM(EA, 4) <- SINGLE(FRS)
|
||||
// RA <- EA
|
||||
|
||||
Value* ea = b.CreateAdd(g.gpr_value(i.X.RA), g.gpr_value(i.X.RB));
|
||||
Value* v = g.fpr_value(i.X.RT);
|
||||
v = b.CreateBitCast(b.CreateFPTrunc(v, b.getFloatTy()), b.getInt32Ty());
|
||||
g.WriteMemory(i.address, ea, 4, v);
|
||||
g.update_gpr_value(i.X.RA, ea);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
XEDISASMR(stfsx, 0x7C00052E, X )(InstrData& i, InstrDisasm& d) {
|
||||
d.Init("stfsx", "Store Floating-Point Single Indexed", 0);
|
||||
d.AddRegOperand(InstrRegister::kFPR, i.X.RT, InstrRegister::kRead);
|
||||
if (i.X.RA) {
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
|
||||
} else {
|
||||
d.AddUImmOperand(0, 1);
|
||||
}
|
||||
d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
|
||||
return d.Finish();
|
||||
}
|
||||
XEEMITTER(stfsx, 0x7C00052E, X )(FunctionGenerator& g, IRBuilder<>& b, InstrData& i) {
|
||||
XEINSTRNOTIMPLEMENTED();
|
||||
return 1;
|
||||
// if RA = 0 then
|
||||
// b <- 0
|
||||
// else
|
||||
// b <- (RA)
|
||||
// EA <- b + (RB)
|
||||
// MEM(EA, 4) <- SINGLE(FRS)
|
||||
|
||||
Value* ea = g.gpr_value(i.X.RB);
|
||||
if (i.X.RA) {
|
||||
ea = b.CreateAdd(g.gpr_value(i.X.RA), ea);
|
||||
}
|
||||
Value* v = g.fpr_value(i.X.RT);
|
||||
v = b.CreateBitCast(b.CreateFPTrunc(v, b.getFloatTy()), b.getInt32Ty());
|
||||
g.WriteMemory(i.address, ea, 4, v);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -998,36 +1596,36 @@ void RegisterEmitCategoryMemory() {
|
|||
XEREGISTERINSTR(ldu, 0xE8000001);
|
||||
XEREGISTEREMITTER(ldux, 0x7C00006A);
|
||||
XEREGISTEREMITTER(ldx, 0x7C00002A);
|
||||
XEREGISTEREMITTER(lha, 0xA8000000);
|
||||
XEREGISTERINSTR(lha, 0xA8000000);
|
||||
XEREGISTEREMITTER(lhau, 0xAC000000);
|
||||
XEREGISTEREMITTER(lhaux, 0x7C0002EE);
|
||||
XEREGISTEREMITTER(lhax, 0x7C0002AE);
|
||||
XEREGISTERINSTR(lhax, 0x7C0002AE);
|
||||
XEREGISTERINSTR(lhz, 0xA0000000);
|
||||
XEREGISTEREMITTER(lhzu, 0xA4000000);
|
||||
XEREGISTEREMITTER(lhzux, 0x7C00026E);
|
||||
XEREGISTEREMITTER(lhzx, 0x7C00022E);
|
||||
XEREGISTEREMITTER(lwa, 0xE8000002);
|
||||
XEREGISTEREMITTER(lwaux, 0x7C0002EA);
|
||||
XEREGISTEREMITTER(lwax, 0x7C0002AA);
|
||||
XEREGISTERINSTR(lhzu, 0xA4000000);
|
||||
XEREGISTERINSTR(lhzux, 0x7C00026E);
|
||||
XEREGISTERINSTR(lhzx, 0x7C00022E);
|
||||
XEREGISTERINSTR(lwa, 0xE8000002);
|
||||
XEREGISTERINSTR(lwaux, 0x7C0002EA);
|
||||
XEREGISTERINSTR(lwax, 0x7C0002AA);
|
||||
XEREGISTERINSTR(lwz, 0x80000000);
|
||||
XEREGISTERINSTR(lwzu, 0x84000000);
|
||||
XEREGISTEREMITTER(lwzux, 0x7C00006E);
|
||||
XEREGISTERINSTR(lwzux, 0x7C00006E);
|
||||
XEREGISTERINSTR(lwzx, 0x7C00002E);
|
||||
XEREGISTERINSTR(stb, 0x98000000);
|
||||
XEREGISTERINSTR(stbu, 0x9C000000);
|
||||
XEREGISTEREMITTER(stbux, 0x7C0001EE);
|
||||
XEREGISTEREMITTER(stbx, 0x7C0001AE);
|
||||
XEREGISTERINSTR(stbux, 0x7C0001EE);
|
||||
XEREGISTERINSTR(stbx, 0x7C0001AE);
|
||||
XEREGISTERINSTR(std, 0xF8000000);
|
||||
XEREGISTERINSTR(stdu, 0xF8000001);
|
||||
XEREGISTEREMITTER(stdux, 0x7C00016A);
|
||||
XEREGISTEREMITTER(stdx, 0x7C00012A);
|
||||
XEREGISTERINSTR(stdux, 0x7C00016A);
|
||||
XEREGISTERINSTR(stdx, 0x7C00012A);
|
||||
XEREGISTERINSTR(sth, 0xB0000000);
|
||||
XEREGISTERINSTR(sthu, 0xB4000000);
|
||||
XEREGISTEREMITTER(sthux, 0x7C00036E);
|
||||
XEREGISTERINSTR(sthux, 0x7C00036E);
|
||||
XEREGISTERINSTR(sthx, 0x7C00032E);
|
||||
XEREGISTERINSTR(stw, 0x90000000);
|
||||
XEREGISTERINSTR(stwu, 0x94000000);
|
||||
XEREGISTEREMITTER(stwux, 0x7C00016E);
|
||||
XEREGISTERINSTR(stwux, 0x7C00016E);
|
||||
XEREGISTERINSTR(stwx, 0x7C00012E);
|
||||
XEREGISTEREMITTER(lhbrx, 0x7C00062C);
|
||||
XEREGISTEREMITTER(lwbrx, 0x7C00042C);
|
||||
|
|
@ -1044,27 +1642,27 @@ void RegisterEmitCategoryMemory() {
|
|||
XEREGISTEREMITTER(eieio, 0x7C0006AC);
|
||||
XEREGISTEREMITTER(isync, 0x4C00012C);
|
||||
XEREGISTEREMITTER(ldarx, 0x7C0000A8);
|
||||
XEREGISTEREMITTER(lwarx, 0x7C000028);
|
||||
XEREGISTERINSTR(lwarx, 0x7C000028);
|
||||
XEREGISTEREMITTER(stdcx, 0x7C0001AD);
|
||||
XEREGISTEREMITTER(stwcx, 0x7C00012D);
|
||||
XEREGISTERINSTR(stwcx, 0x7C00012D);
|
||||
XEREGISTEREMITTER(sync, 0x7C0004AC);
|
||||
XEREGISTEREMITTER(lfd, 0xC8000000);
|
||||
XEREGISTEREMITTER(lfdu, 0xCC000000);
|
||||
XEREGISTEREMITTER(lfdux, 0x7C0004EE);
|
||||
XEREGISTEREMITTER(lfdx, 0x7C0004AE);
|
||||
XEREGISTEREMITTER(lfs, 0xC0000000);
|
||||
XEREGISTEREMITTER(lfsu, 0xC4000000);
|
||||
XEREGISTEREMITTER(lfsux, 0x7C00046E);
|
||||
XEREGISTEREMITTER(lfsx, 0x7C00042E);
|
||||
XEREGISTEREMITTER(stfd, 0xD8000000);
|
||||
XEREGISTEREMITTER(stfdu, 0xDC000000);
|
||||
XEREGISTEREMITTER(stfdux, 0x7C0005EE);
|
||||
XEREGISTEREMITTER(stfdx, 0x7C0005AE);
|
||||
XEREGISTEREMITTER(stfiwx, 0x7C0007AE);
|
||||
XEREGISTEREMITTER(stfs, 0xD0000000);
|
||||
XEREGISTEREMITTER(stfsu, 0xD4000000);
|
||||
XEREGISTEREMITTER(stfsux, 0x7C00056E);
|
||||
XEREGISTEREMITTER(stfsx, 0x7C00052E);
|
||||
XEREGISTERINSTR(lfd, 0xC8000000);
|
||||
XEREGISTERINSTR(lfdu, 0xCC000000);
|
||||
XEREGISTERINSTR(lfdux, 0x7C0004EE);
|
||||
XEREGISTERINSTR(lfdx, 0x7C0004AE);
|
||||
XEREGISTERINSTR(lfs, 0xC0000000);
|
||||
XEREGISTERINSTR(lfsu, 0xC4000000);
|
||||
XEREGISTERINSTR(lfsux, 0x7C00046E);
|
||||
XEREGISTERINSTR(lfsx, 0x7C00042E);
|
||||
XEREGISTERINSTR(stfd, 0xD8000000);
|
||||
XEREGISTERINSTR(stfdu, 0xDC000000);
|
||||
XEREGISTERINSTR(stfdux, 0x7C0005EE);
|
||||
XEREGISTERINSTR(stfdx, 0x7C0005AE);
|
||||
XEREGISTERINSTR(stfiwx, 0x7C0007AE);
|
||||
XEREGISTERINSTR(stfs, 0xD0000000);
|
||||
XEREGISTERINSTR(stfsu, 0xD4000000);
|
||||
XEREGISTERINSTR(stfsux, 0x7C00056E);
|
||||
XEREGISTERINSTR(stfsx, 0x7C00052E);
|
||||
XEREGISTEREMITTER(dcbf, 0x7C0000AC);
|
||||
XEREGISTEREMITTER(dcbst, 0x7C00006C);
|
||||
XEREGISTERINSTR(dcbt, 0x7C00022C);
|
||||
|
|
|
|||
|
|
@ -77,6 +77,9 @@ FunctionGenerator::FunctionGenerator(
|
|||
for (size_t n = 0; n < XECOUNT(locals_.gpr); n++) {
|
||||
locals_.gpr[n] = NULL;
|
||||
}
|
||||
for (size_t n = 0; n < XECOUNT(locals_.fpr); n++) {
|
||||
locals_.fpr[n] = NULL;
|
||||
}
|
||||
|
||||
if (FLAGS_log_codegen) {
|
||||
printf("%s:\n", fn->name());
|
||||
|
|
@ -548,6 +551,15 @@ void FunctionGenerator::SetupLocals() {
|
|||
}
|
||||
gpr_t >>= 2;
|
||||
}
|
||||
|
||||
uint64_t fpr_t = access_bits_.fpr;
|
||||
for (int n = 0; n < 32; n++) {
|
||||
if (fpr_t & 3) {
|
||||
xesnprintfa(name, XECOUNT(name), "f%d", n);
|
||||
locals_.fpr[n] = SetupLocal(b.getDoubleTy(), name);
|
||||
}
|
||||
fpr_t >>= 2;
|
||||
}
|
||||
}
|
||||
|
||||
Value* FunctionGenerator::SetupLocal(llvm::Type* type, const char* name) {
|
||||
|
|
@ -611,7 +623,6 @@ void FunctionGenerator::FillRegisters() {
|
|||
b.getInt8Ty()), cr_n);
|
||||
}
|
||||
|
||||
// Note that we skip zero.
|
||||
for (size_t n = 0; n < XECOUNT(locals_.gpr); n++) {
|
||||
if (locals_.gpr[n]) {
|
||||
b.CreateStore(LoadStateValue(
|
||||
|
|
@ -619,6 +630,14 @@ void FunctionGenerator::FillRegisters() {
|
|||
b.getInt64Ty()), locals_.gpr[n]);
|
||||
}
|
||||
}
|
||||
|
||||
for (size_t n = 0; n < XECOUNT(locals_.fpr); n++) {
|
||||
if (locals_.fpr[n]) {
|
||||
b.CreateStore(LoadStateValue(
|
||||
offsetof(xe_ppc_state_t, f) + 8 * n,
|
||||
b.getDoubleTy()), locals_.fpr[n]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void FunctionGenerator::SpillRegisters() {
|
||||
|
|
@ -672,7 +691,6 @@ void FunctionGenerator::SpillRegisters() {
|
|||
cr);
|
||||
}
|
||||
|
||||
// Note that we skip zero.
|
||||
for (uint32_t n = 0; n < XECOUNT(locals_.gpr); n++) {
|
||||
Value* v = locals_.gpr[n];
|
||||
if (v) {
|
||||
|
|
@ -682,6 +700,16 @@ void FunctionGenerator::SpillRegisters() {
|
|||
b.CreateLoad(locals_.gpr[n]));
|
||||
}
|
||||
}
|
||||
|
||||
for (uint32_t n = 0; n < XECOUNT(locals_.fpr); n++) {
|
||||
Value* v = locals_.fpr[n];
|
||||
if (v) {
|
||||
StoreStateValue(
|
||||
offsetof(xe_ppc_state_t, f) + 8 * n,
|
||||
b.getDoubleTy(),
|
||||
b.CreateLoad(locals_.fpr[n]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Value* FunctionGenerator::xer_value() {
|
||||
|
|
@ -879,6 +907,21 @@ void FunctionGenerator::update_gpr_value(uint32_t n, Value* value) {
|
|||
b.CreateStore(value, locals_.gpr[n]);
|
||||
}
|
||||
|
||||
Value* FunctionGenerator::fpr_value(uint32_t n) {
|
||||
XEASSERT(n >= 0 && n < 32);
|
||||
XEASSERTNOTNULL(locals_.fpr[n]);
|
||||
IRBuilder<>& b = *builder_;
|
||||
return b.CreateLoad(locals_.fpr[n]);
|
||||
}
|
||||
|
||||
void FunctionGenerator::update_fpr_value(uint32_t n, Value* value) {
|
||||
XEASSERT(n >= 0 && n < 32);
|
||||
XEASSERTNOTNULL(locals_.fpr[n]);
|
||||
IRBuilder<>& b = *builder_;
|
||||
value = b.CreateFPExtOrFPTrunc(value, b.getDoubleTy());
|
||||
b.CreateStore(value, locals_.fpr[n]);
|
||||
}
|
||||
|
||||
Value* FunctionGenerator::GetMembase() {
|
||||
Value* v = gen_module_->getGlobalVariable("xe_memory_base");
|
||||
return builder_->CreateLoad(v);
|
||||
|
|
@ -916,7 +959,7 @@ Value* FunctionGenerator::GetMemoryAddress(uint32_t cia, Value* addr) {
|
|||
}
|
||||
|
||||
Value* FunctionGenerator::ReadMemory(
|
||||
uint32_t cia, Value* addr, uint32_t size, bool extend) {
|
||||
uint32_t cia, Value* addr, uint32_t size, bool acquire) {
|
||||
IRBuilder<>& b = *builder_;
|
||||
|
||||
Type* dataTy = NULL;
|
||||
|
|
@ -945,7 +988,13 @@ Value* FunctionGenerator::ReadMemory(
|
|||
|
||||
Value* address = GetMemoryAddress(cia, addr);
|
||||
Value* ptr = b.CreatePointerCast(address, pointerTy);
|
||||
Value* value = b.CreateLoad(ptr);
|
||||
LoadInst* load_value = b.CreateLoad(ptr);
|
||||
if (acquire) {
|
||||
load_value->setAlignment(size);
|
||||
load_value->setVolatile(true);
|
||||
load_value->setAtomic(Acquire);
|
||||
}
|
||||
Value* value = load_value;
|
||||
|
||||
// Swap after loading.
|
||||
// TODO(benvanik): find a way to avoid this!
|
||||
|
|
@ -959,7 +1008,7 @@ Value* FunctionGenerator::ReadMemory(
|
|||
}
|
||||
|
||||
void FunctionGenerator::WriteMemory(
|
||||
uint32_t cia, Value* addr, uint32_t size, Value* value) {
|
||||
uint32_t cia, Value* addr, uint32_t size, Value* value, bool release) {
|
||||
IRBuilder<>& b = *builder_;
|
||||
|
||||
Type* dataTy = NULL;
|
||||
|
|
@ -1002,5 +1051,10 @@ void FunctionGenerator::WriteMemory(
|
|||
value = b.CreateCall(bswap, value);
|
||||
}
|
||||
|
||||
b.CreateStore(value, ptr);
|
||||
StoreInst* store_value = b.CreateStore(value, ptr);
|
||||
if (release) {
|
||||
store_value->setAlignment(size);
|
||||
store_value->setVolatile(true);
|
||||
store_value->setAtomic(Release);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
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Reference in New Issue