diff --git a/src/alloy/alloy-private.h b/src/alloy/alloy-private.h index a22be71c4..8888e7b1c 100644 --- a/src/alloy/alloy-private.h +++ b/src/alloy/alloy-private.h @@ -14,7 +14,6 @@ #include - DECLARE_bool(debug); DECLARE_bool(always_disasm); @@ -23,10 +22,4 @@ DECLARE_bool(validate_hir); DECLARE_uint64(break_on_instruction); DECLARE_uint64(break_on_memory); - -namespace alloy { - -} // namespace alloy - - #endif // ALLOY_ALLOY_PRIVATE_H_ diff --git a/src/alloy/alloy.cc b/src/alloy/alloy.cc index bae955976..e5b135a9e 100644 --- a/src/alloy/alloy.cc +++ b/src/alloy/alloy.cc @@ -12,7 +12,6 @@ using namespace alloy; - #if 0 && DEBUG #define DEFAULT_DEBUG_FLAG true #else @@ -20,15 +19,16 @@ using namespace alloy; #endif DEFINE_bool(debug, DEFAULT_DEBUG_FLAG, - "Allow debugging and retain debug information."); -DEFINE_bool(always_disasm, false, + "Allow debugging and retain debug information."); +DEFINE_bool( + always_disasm, false, "Always add debug info to functions, even when no debugger is attached."); DEFINE_bool(validate_hir, false, - "Perform validation checks on the HIR during compilation."); + "Perform validation checks on the HIR during compilation."); // Breakpoints: DEFINE_uint64(break_on_instruction, 0, - "int3 before the given guest address is executed."); + "int3 before the given guest address is executed."); DEFINE_uint64(break_on_memory, 0, - "int3 on read/write to the given memory address."); + "int3 on read/write to the given memory address."); diff --git a/src/alloy/alloy.h b/src/alloy/alloy.h index 72dbf7c06..f35589381 100644 --- a/src/alloy/alloy.h +++ b/src/alloy/alloy.h @@ -18,10 +18,4 @@ #include #include - -namespace alloy { - -} // namespace alloy - - #endif // ALLOY_ALLOY_H_ diff --git a/src/alloy/arena.cc b/src/alloy/arena.cc index fe08f8c31..638adeabf 100644 --- a/src/alloy/arena.cc +++ b/src/alloy/arena.cc @@ -9,13 +9,10 @@ #include -using namespace alloy; +namespace alloy { - -Arena::Arena(size_t chunk_size) : - chunk_size_(chunk_size), - head_chunk_(NULL), active_chunk_(NULL) { -} +Arena::Arena(size_t chunk_size) + : chunk_size_(chunk_size), head_chunk_(NULL), active_chunk_(NULL) {} Arena::~Arena() { Reset(); @@ -48,7 +45,7 @@ void* Arena::Alloc(size_t size) { if (active_chunk_->capacity - active_chunk_->offset < size + 4096) { Chunk* next = active_chunk_->next; if (!next) { - XEASSERT(size < chunk_size_); // need to support larger chunks + XEASSERT(size < chunk_size_); // need to support larger chunks next = new Chunk(chunk_size_); active_chunk_->next = next; } @@ -88,9 +85,8 @@ void* Arena::CloneContents() { return result; } -Arena::Chunk::Chunk(size_t chunk_size) : - next(NULL), - capacity(chunk_size), buffer(0), offset(0) { +Arena::Chunk::Chunk(size_t chunk_size) + : next(NULL), capacity(chunk_size), buffer(0), offset(0) { buffer = (uint8_t*)xe_malloc(capacity); } @@ -99,3 +95,5 @@ Arena::Chunk::~Chunk() { xe_free(buffer); } } + +} // namespace alloy diff --git a/src/alloy/arena.h b/src/alloy/arena.h index 2041f1375..862622deb 100644 --- a/src/alloy/arena.h +++ b/src/alloy/arena.h @@ -12,12 +12,10 @@ #include - namespace alloy { - class Arena { -public: + public: Arena(size_t chunk_size = 4 * 1024 * 1024); ~Arena(); @@ -25,33 +23,32 @@ public: void DebugFill(); void* Alloc(size_t size); - template T* Alloc() { + template + T* Alloc() { return (T*)Alloc(sizeof(T)); } void* CloneContents(); -private: + private: class Chunk { - public: + public: Chunk(size_t chunk_size); ~Chunk(); - Chunk* next; + Chunk* next; - size_t capacity; - uint8_t* buffer; - size_t offset; + size_t capacity; + uint8_t* buffer; + size_t offset; }; -private: - size_t chunk_size_; - Chunk* head_chunk_; - Chunk* active_chunk_; + private: + size_t chunk_size_; + Chunk* head_chunk_; + Chunk* active_chunk_; }; - } // namespace alloy - #endif // ALLOY_ARENA_H_ diff --git a/src/alloy/backend/assembler.cc b/src/alloy/backend/assembler.cc index 54e32c76a..935118fc3 100644 --- a/src/alloy/backend/assembler.cc +++ b/src/alloy/backend/assembler.cc @@ -11,22 +11,16 @@ #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +Assembler::Assembler(Backend* backend) : backend_(backend) {} -Assembler::Assembler(Backend* backend) : - backend_(backend) { -} +Assembler::~Assembler() { Reset(); } -Assembler::~Assembler() { - Reset(); -} +int Assembler::Initialize() { return 0; } -int Assembler::Initialize() { - return 0; -} +void Assembler::Reset() {} -void Assembler::Reset() { -} +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/assembler.h b/src/alloy/backend/assembler.h index 9652bee37..b9f6ed788 100644 --- a/src/alloy/backend/assembler.h +++ b/src/alloy/backend/assembler.h @@ -12,27 +12,25 @@ #include - namespace alloy { namespace hir { class HIRBuilder; -} +} // namespace hir namespace runtime { class DebugInfo; class Function; class FunctionInfo; class Runtime; -} -} +} // namespace runtime +} // namespace alloy namespace alloy { namespace backend { class Backend; - class Assembler { -public: + public: Assembler(Backend* backend); virtual ~Assembler(); @@ -40,18 +38,16 @@ public: virtual void Reset(); - virtual int Assemble( - runtime::FunctionInfo* symbol_info, hir::HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - runtime::Function** out_function) = 0; + virtual int Assemble(runtime::FunctionInfo* symbol_info, + hir::HIRBuilder* builder, uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, + runtime::Function** out_function) = 0; -protected: + protected: Backend* backend_; }; - } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_ASSEMBLER_H_ diff --git a/src/alloy/backend/backend.cc b/src/alloy/backend/backend.cc index d49fb713e..e28100522 100644 --- a/src/alloy/backend/backend.cc +++ b/src/alloy/backend/backend.cc @@ -11,26 +11,22 @@ #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +using alloy::runtime::Runtime; -Backend::Backend(Runtime* runtime) : - runtime_(runtime) { +Backend::Backend(Runtime* runtime) : runtime_(runtime) { xe_zero_struct(&machine_info_, sizeof(machine_info_)); } -Backend::~Backend() { -} +Backend::~Backend() {} -int Backend::Initialize() { - return 0; -} +int Backend::Initialize() { return 0; } -void* Backend::AllocThreadData() { - return NULL; -} +void* Backend::AllocThreadData() { return NULL; } -void Backend::FreeThreadData(void* thread_data) { -} +void Backend::FreeThreadData(void* thread_data) {} + +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/backend.h b/src/alloy/backend/backend.h index b6c2c431e..7f3124646 100644 --- a/src/alloy/backend/backend.h +++ b/src/alloy/backend/backend.h @@ -13,17 +13,19 @@ #include #include - -namespace alloy { namespace runtime { class Runtime; } } +namespace alloy { +namespace runtime { +class Runtime; +} // namespace runtime +} // namespace alloy namespace alloy { namespace backend { class Assembler; - class Backend { -public: + public: Backend(runtime::Runtime* runtime); virtual ~Backend(); @@ -37,14 +39,12 @@ public: virtual Assembler* CreateAssembler() = 0; -protected: + protected: runtime::Runtime* runtime_; MachineInfo machine_info_; }; - } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_BACKEND_H_ diff --git a/src/alloy/backend/ivm/ivm_assembler.cc b/src/alloy/backend/ivm/ivm_assembler.cc index 0431f7ab2..67d8c63b2 100644 --- a/src/alloy/backend/ivm/ivm_assembler.cc +++ b/src/alloy/backend/ivm/ivm_assembler.cc @@ -17,21 +17,19 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::ivm; -using namespace alloy::hir; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +namespace ivm { +using alloy::hir::HIRBuilder; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; -IVMAssembler::IVMAssembler(Backend* backend) : - source_map_arena_(128 * 1024), - Assembler(backend) { -} +IVMAssembler::IVMAssembler(Backend* backend) + : source_map_arena_(128 * 1024), Assembler(backend) {} IVMAssembler::~IVMAssembler() { - alloy::tracing::WriteEvent(EventType::AssemblerDeinit({ - })); + alloy::tracing::WriteEvent(EventType::AssemblerDeinit({})); } int IVMAssembler::Initialize() { @@ -40,8 +38,7 @@ int IVMAssembler::Initialize() { return result; } - alloy::tracing::WriteEvent(EventType::AssemblerInit({ - })); + alloy::tracing::WriteEvent(EventType::AssemblerInit({})); return result; } @@ -53,10 +50,10 @@ void IVMAssembler::Reset() { Assembler::Reset(); } -int IVMAssembler::Assemble( - FunctionInfo* symbol_info, HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - Function** out_function) { +int IVMAssembler::Assemble(FunctionInfo* symbol_info, HIRBuilder* builder, + uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, + Function** out_function) { IVMFunction* fn = new IVMFunction(symbol_info); fn->set_debug_info(debug_info); @@ -89,13 +86,13 @@ int IVMAssembler::Assemble( auto block = builder->first_block(); while (block) { - Label* label = block->label_head; + auto label = block->label_head; while (label) { label->tag = (void*)(0x80000000 | ctx.intcode_count); label = label->next; } - Instr* i = block->instr_head; + auto i = block->instr_head; while (i) { int result = TranslateIntCodes(ctx, i); i = i->next; @@ -108,7 +105,8 @@ int IVMAssembler::Assemble( // Fixup label references. LabelRef* label_ref = ctx.label_ref_head; while (label_ref) { - label_ref->instr->src1_reg = (uint32_t)(intptr_t)label_ref->label->tag & ~0x80000000; + label_ref->instr->src1_reg = + (uint32_t)(intptr_t)label_ref->label->tag & ~0x80000000; label_ref = label_ref->next; } @@ -117,3 +115,7 @@ int IVMAssembler::Assemble( *out_function = fn; return 0; } + +} // namespace ivm +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/ivm/ivm_assembler.h b/src/alloy/backend/ivm/ivm_assembler.h index 5da5a2412..04f4c142d 100644 --- a/src/alloy/backend/ivm/ivm_assembler.h +++ b/src/alloy/backend/ivm/ivm_assembler.h @@ -14,14 +14,12 @@ #include - namespace alloy { namespace backend { namespace ivm { - class IVMAssembler : public Assembler { -public: + public: IVMAssembler(Backend* backend); virtual ~IVMAssembler(); @@ -29,21 +27,19 @@ public: virtual void Reset(); - virtual int Assemble( - runtime::FunctionInfo* symbol_info, hir::HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - runtime::Function** out_function); + virtual int Assemble(runtime::FunctionInfo* symbol_info, + hir::HIRBuilder* builder, uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, + runtime::Function** out_function); -private: - Arena intcode_arena_; - Arena source_map_arena_; - Arena scratch_arena_; + private: + Arena intcode_arena_; + Arena source_map_arena_; + Arena scratch_arena_; }; - } // namespace ivm } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_IVM_IVM_ASSEMBLER_H_ diff --git a/src/alloy/backend/ivm/ivm_backend.cc b/src/alloy/backend/ivm/ivm_backend.cc index 67703f7d4..7f738142a 100644 --- a/src/alloy/backend/ivm/ivm_backend.cc +++ b/src/alloy/backend/ivm/ivm_backend.cc @@ -13,20 +13,15 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::ivm; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +namespace ivm { +using alloy::runtime::Runtime; -IVMBackend::IVMBackend(Runtime* runtime) : - Backend(runtime) { -} +IVMBackend::IVMBackend(Runtime* runtime) : Backend(runtime) {} -IVMBackend::~IVMBackend() { - alloy::tracing::WriteEvent(EventType::Deinit({ - })); -} +IVMBackend::~IVMBackend() { alloy::tracing::WriteEvent(EventType::Deinit({})); } int IVMBackend::Initialize() { int result = Backend::Initialize(); @@ -35,34 +30,28 @@ int IVMBackend::Initialize() { } machine_info_.register_sets[0] = { - 0, - "gpr", - MachineInfo::RegisterSet::INT_TYPES, - 16, + 0, "gpr", MachineInfo::RegisterSet::INT_TYPES, 16, }; machine_info_.register_sets[1] = { - 1, - "vec", - MachineInfo::RegisterSet::FLOAT_TYPES | - MachineInfo::RegisterSet::VEC_TYPES, - 16, + 1, "vec", MachineInfo::RegisterSet::FLOAT_TYPES | + MachineInfo::RegisterSet::VEC_TYPES, + 16, }; - alloy::tracing::WriteEvent(EventType::Init({ - })); + alloy::tracing::WriteEvent(EventType::Init({})); return result; } -void* IVMBackend::AllocThreadData() { - return new IVMStack(); -} +void* IVMBackend::AllocThreadData() { return new IVMStack(); } void IVMBackend::FreeThreadData(void* thread_data) { auto stack = (IVMStack*)thread_data; delete stack; } -Assembler* IVMBackend::CreateAssembler() { - return new IVMAssembler(this); -} +Assembler* IVMBackend::CreateAssembler() { return new IVMAssembler(this); } + +} // namespace ivm +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/ivm/ivm_backend.h b/src/alloy/backend/ivm/ivm_backend.h index 8ed333838..5311e56f2 100644 --- a/src/alloy/backend/ivm/ivm_backend.h +++ b/src/alloy/backend/ivm/ivm_backend.h @@ -14,17 +14,14 @@ #include - namespace alloy { namespace backend { namespace ivm { - #define ALLOY_HAS_IVM_BACKEND 1 - class IVMBackend : public Backend { -public: + public: IVMBackend(runtime::Runtime* runtime); virtual ~IVMBackend(); @@ -36,10 +33,8 @@ public: virtual Assembler* CreateAssembler(); }; - } // namespace ivm } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_IVM_IVM_BACKEND_H_ diff --git a/src/alloy/backend/ivm/ivm_function.cc b/src/alloy/backend/ivm/ivm_function.cc index 88306b228..4ed6a13b9 100644 --- a/src/alloy/backend/ivm/ivm_function.cc +++ b/src/alloy/backend/ivm/ivm_function.cc @@ -14,17 +14,21 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::ivm; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +namespace ivm { +using alloy::runtime::Breakpoint; +using alloy::runtime::FunctionInfo; +using alloy::runtime::ThreadState; -IVMFunction::IVMFunction(FunctionInfo* symbol_info) : - register_count_(0), intcode_count_(0), intcodes_(0), - source_map_count_(0), source_map_(0), - Function(symbol_info) { -} +IVMFunction::IVMFunction(FunctionInfo* symbol_info) + : register_count_(0), + intcode_count_(0), + intcodes_(0), + source_map_count_(0), + source_map_(0), + Function(symbol_info) {} IVMFunction::~IVMFunction() { xe_free(intcodes_); @@ -57,8 +61,7 @@ int IVMFunction::AddBreakpointImpl(Breakpoint* breakpoint) { } // TEMP breakpoints always overwrite normal ones. - if (!i->debug_flags || - breakpoint->type() == Breakpoint::TEMP_TYPE) { + if (!i->debug_flags || breakpoint->type() == Breakpoint::TEMP_TYPE) { uint64_t breakpoint_ptr = (uint64_t)breakpoint; i->src2_reg = (uint32_t)breakpoint_ptr; i->src3_reg = (uint32_t)(breakpoint_ptr >> 32); @@ -127,8 +130,8 @@ int IVMFunction::CallImpl(ThreadState* thread_state, uint64_t return_address) { volatile int* suspend_flag_address = thread_state->suspend_flag_address(); - // TODO(benvanik): DID_CARRY -- need HIR to set a OPCODE_FLAG_SET_CARRY - // or something so the fns can set an ics flag. +// TODO(benvanik): DID_CARRY -- need HIR to set a OPCODE_FLAG_SET_CARRY +// or something so the fns can set an ics flag. #ifdef TRACE_SOURCE_OFFSET size_t source_index = 0; @@ -177,3 +180,7 @@ int IVMFunction::CallImpl(ThreadState* thread_state, uint64_t return_address) { return 0; } + +} // namespace ivm +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/ivm/ivm_intcode.cc b/src/alloy/backend/ivm/ivm_intcode.cc index 109bb19a9..27ea32345 100644 --- a/src/alloy/backend/ivm/ivm_intcode.cc +++ b/src/alloy/backend/ivm/ivm_intcode.cc @@ -14,26 +14,29 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::ivm; -using namespace alloy::hir; -using namespace alloy::runtime; - - // TODO(benvanik): reimplement packing functions #include - // TODO(benvanik): make a compile time flag? //#define DYNAMIC_REGISTER_ACCESS_CHECK(address) false -#define DYNAMIC_REGISTER_ACCESS_CHECK(address) ((address & 0xFF000000) == 0x7F000000) - +#define DYNAMIC_REGISTER_ACCESS_CHECK(address) \ + ((address & 0xFF000000) == 0x7F000000) namespace alloy { namespace backend { namespace ivm { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::hir::Instr; +using alloy::hir::Label; +using alloy::hir::OpcodeInfo; +using alloy::hir::OpcodeSignatureType; +using alloy::hir::TypeName; +using alloy::hir::Value; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; #define IPRINT #define IFLUSH() @@ -46,27 +49,21 @@ namespace ivm { //#define DFLUSH() fflush(stdout) #if XE_CPU_BIGENDIAN -#define VECB16(v,n) (v.b16[n]) -#define VECS8(v,n) (v.s8[n]) -#define VECI4(v,n) (v.i4[n]) -#define VECF4(v,n) (v.f4[n]) +#define VECB16(v, n) (v.b16[n]) +#define VECS8(v, n) (v.s8[n]) +#define VECI4(v, n) (v.i4[n]) +#define VECF4(v, n) (v.f4[n]) #else static const uint8_t __vector_b16_table[16] = { - 3, 2, 1, 0, - 7, 6, 5, 4, - 11, 10, 9, 8, - 15, 14, 13, 12, + 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12, }; static const uint8_t __vector_s8_table[8] = { - 1, 0, - 3, 2, - 5, 4, - 7, 6, + 1, 0, 3, 2, 5, 4, 7, 6, }; -#define VECB16(v,n) (v.b16[__vector_b16_table[(n)]]) -#define VECS8(v,n) (v.s8[__vector_s8_table[(n)]]) -#define VECI4(v,n) (v.i4[(n)]) -#define VECF4(v,n) (v.f4[(n)]) +#define VECB16(v, n) (v.b16[__vector_b16_table[(n)]]) +#define VECS8(v, n) (v.s8[__vector_s8_table[(n)]]) +#define VECI4(v, n) (v.i4[(n)]) +#define VECF4(v, n) (v.f4[(n)]) #endif uint32_t IntCode_INT_LOAD_CONSTANT(IntCodeState& ics, const IntCode* i) { @@ -136,25 +133,25 @@ uint32_t AllocDynamicRegister(TranslationContext& ctx, Value* value) { } } -uint32_t AllocOpRegister( - TranslationContext& ctx, OpcodeSignatureType sig_type, Instr::Op* op) { +uint32_t AllocOpRegister(TranslationContext& ctx, OpcodeSignatureType sig_type, + Instr::Op* op) { switch (sig_type) { - case OPCODE_SIG_TYPE_X: - // Nothing. - return 0; - case OPCODE_SIG_TYPE_L: - return AllocLabel(ctx, op->label); - case OPCODE_SIG_TYPE_O: - return AllocConstant(ctx, (uint64_t)op->offset); - case OPCODE_SIG_TYPE_S: - return AllocConstant(ctx, (uint64_t)op->symbol_info); - case OPCODE_SIG_TYPE_V: - Value* value = op->value; - if (value->IsConstant()) { - return AllocConstant(ctx, value); - } else { - return AllocDynamicRegister(ctx, value); - } + case OPCODE_SIG_TYPE_X: + // Nothing. + return 0; + case OPCODE_SIG_TYPE_L: + return AllocLabel(ctx, op->label); + case OPCODE_SIG_TYPE_O: + return AllocConstant(ctx, (uint64_t)op->offset); + case OPCODE_SIG_TYPE_S: + return AllocConstant(ctx, (uint64_t)op->symbol_info); + case OPCODE_SIG_TYPE_V: + Value* value = op->value; + if (value->IsConstant()) { + return AllocConstant(ctx, value); + } else { + return AllocDynamicRegister(ctx, value); + } } return 0; } @@ -228,9 +225,7 @@ int Translate_COMMENT(TranslationContext& ctx, Instr* i) { return 0; } -uint32_t IntCode_NOP(IntCodeState& ics, const IntCode* i) { - return IA_NEXT; -} +uint32_t IntCode_NOP(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } int Translate_NOP(TranslationContext& ctx, Instr* i) { return DispatchToC(ctx, i, IntCode_NOP); } @@ -297,13 +292,10 @@ uint32_t IntCode_DEBUG_BREAK_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_DEBUG_BREAK_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_DEBUG_BREAK_TRUE_I8, - IntCode_DEBUG_BREAK_TRUE_I16, - IntCode_DEBUG_BREAK_TRUE_I32, - IntCode_DEBUG_BREAK_TRUE_I64, - IntCode_DEBUG_BREAK_TRUE_F32, - IntCode_DEBUG_BREAK_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_DEBUG_BREAK_TRUE_I8, IntCode_DEBUG_BREAK_TRUE_I16, + IntCode_DEBUG_BREAK_TRUE_I32, IntCode_DEBUG_BREAK_TRUE_I64, + IntCode_DEBUG_BREAK_TRUE_F32, IntCode_DEBUG_BREAK_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -311,12 +303,12 @@ int Translate_DEBUG_BREAK_TRUE(TranslationContext& ctx, Instr* i) { uint32_t IntCode_TRAP(IntCodeState& ics, const IntCode* i) { // TODO(benvanik): post software interrupt to debugger. switch (i->flags) { - case 20: - // 0x0FE00014 is a 'debug print' where r3 = buffer r4 = length - break; - case 22: - // Always trap? - break; + case 20: + // 0x0FE00014 is a 'debug print' where r3 = buffer r4 = length + break; + case 22: + // Always trap? + break; } __debugbreak(); return IA_NEXT; @@ -363,13 +355,9 @@ uint32_t IntCode_TRAP_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_TRAP_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_TRAP_TRUE_I8, - IntCode_TRAP_TRUE_I16, - IntCode_TRAP_TRUE_I32, - IntCode_TRAP_TRUE_I64, - IntCode_TRAP_TRUE_F32, - IntCode_TRAP_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_TRAP_TRUE_I8, IntCode_TRAP_TRUE_I16, IntCode_TRAP_TRUE_I32, + IntCode_TRAP_TRUE_I64, IntCode_TRAP_TRUE_F32, IntCode_TRAP_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -435,18 +423,15 @@ uint32_t IntCode_CALL_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_CALL_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_CALL_TRUE_I8, - IntCode_CALL_TRUE_I16, - IntCode_CALL_TRUE_I32, - IntCode_CALL_TRUE_I64, - IntCode_CALL_TRUE_F32, - IntCode_CALL_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_CALL_TRUE_I8, IntCode_CALL_TRUE_I16, IntCode_CALL_TRUE_I32, + IntCode_CALL_TRUE_I64, IntCode_CALL_TRUE_F32, IntCode_CALL_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_CALL_INDIRECT_XX(IntCodeState& ics, const IntCode* i, uint32_t reg) { +uint32_t IntCode_CALL_INDIRECT_XX(IntCodeState& ics, const IntCode* i, + uint32_t reg) { uint64_t target = ics.rf[reg].u32; // Check if return address - if so, return. @@ -514,13 +499,10 @@ uint32_t IntCode_CALL_INDIRECT_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_CALL_INDIRECT_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_CALL_INDIRECT_TRUE_I8, - IntCode_CALL_INDIRECT_TRUE_I16, - IntCode_CALL_INDIRECT_TRUE_I32, - IntCode_CALL_INDIRECT_TRUE_I64, - IntCode_CALL_INDIRECT_TRUE_F32, - IntCode_CALL_INDIRECT_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_CALL_INDIRECT_TRUE_I8, IntCode_CALL_INDIRECT_TRUE_I16, + IntCode_CALL_INDIRECT_TRUE_I32, IntCode_CALL_INDIRECT_TRUE_I64, + IntCode_CALL_INDIRECT_TRUE_F32, IntCode_CALL_INDIRECT_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -577,13 +559,9 @@ uint32_t IntCode_RETURN_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_RETURN_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_RETURN_TRUE_I8, - IntCode_RETURN_TRUE_I16, - IntCode_RETURN_TRUE_I32, - IntCode_RETURN_TRUE_I64, - IntCode_RETURN_TRUE_F32, - IntCode_RETURN_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_RETURN_TRUE_I8, IntCode_RETURN_TRUE_I16, IntCode_RETURN_TRUE_I32, + IntCode_RETURN_TRUE_I64, IntCode_RETURN_TRUE_F32, IntCode_RETURN_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -644,13 +622,9 @@ uint32_t IntCode_BRANCH_TRUE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_BRANCH_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_BRANCH_TRUE_I8, - IntCode_BRANCH_TRUE_I16, - IntCode_BRANCH_TRUE_I32, - IntCode_BRANCH_TRUE_I64, - IntCode_BRANCH_TRUE_F32, - IntCode_BRANCH_TRUE_F64, - IntCode_INVALID_TYPE, + IntCode_BRANCH_TRUE_I8, IntCode_BRANCH_TRUE_I16, IntCode_BRANCH_TRUE_I32, + IntCode_BRANCH_TRUE_I64, IntCode_BRANCH_TRUE_F32, IntCode_BRANCH_TRUE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -693,13 +667,10 @@ uint32_t IntCode_BRANCH_FALSE_F64(IntCodeState& ics, const IntCode* i) { } int Translate_BRANCH_FALSE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_BRANCH_FALSE_I8, - IntCode_BRANCH_FALSE_I16, - IntCode_BRANCH_FALSE_I32, - IntCode_BRANCH_FALSE_I64, - IntCode_BRANCH_FALSE_F32, - IntCode_BRANCH_FALSE_F64, - IntCode_INVALID_TYPE, + IntCode_BRANCH_FALSE_I8, IntCode_BRANCH_FALSE_I16, + IntCode_BRANCH_FALSE_I32, IntCode_BRANCH_FALSE_I64, + IntCode_BRANCH_FALSE_F32, IntCode_BRANCH_FALSE_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -734,13 +705,9 @@ uint32_t IntCode_ASSIGN_V128(IntCodeState& ics, const IntCode* i) { } int Translate_ASSIGN(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ASSIGN_I8, - IntCode_ASSIGN_I16, - IntCode_ASSIGN_I32, - IntCode_ASSIGN_I64, - IntCode_ASSIGN_F32, - IntCode_ASSIGN_F64, - IntCode_ASSIGN_V128, + IntCode_ASSIGN_I8, IntCode_ASSIGN_I16, IntCode_ASSIGN_I32, + IntCode_ASSIGN_I64, IntCode_ASSIGN_F32, IntCode_ASSIGN_F64, + IntCode_ASSIGN_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -779,13 +746,31 @@ uint32_t IntCode_ZERO_EXTEND_I32_TO_I64(IntCodeState& ics, const IntCode* i) { } int Translate_ZERO_EXTEND(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ASSIGN_I8, IntCode_ZERO_EXTEND_I8_TO_I16, IntCode_ZERO_EXTEND_I8_TO_I32, IntCode_ZERO_EXTEND_I8_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_ASSIGN_I16, IntCode_ZERO_EXTEND_I16_TO_I32, IntCode_ZERO_EXTEND_I16_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I32, IntCode_ZERO_EXTEND_I32_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I8, IntCode_ZERO_EXTEND_I8_TO_I16, + IntCode_ZERO_EXTEND_I8_TO_I32, IntCode_ZERO_EXTEND_I8_TO_I64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I16, IntCode_ZERO_EXTEND_I16_TO_I32, + IntCode_ZERO_EXTEND_I16_TO_I64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I32, IntCode_ZERO_EXTEND_I32_TO_I64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -817,13 +802,31 @@ uint32_t IntCode_SIGN_EXTEND_I32_TO_I64(IntCodeState& ics, const IntCode* i) { } int Translate_SIGN_EXTEND(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ASSIGN_I8, IntCode_SIGN_EXTEND_I8_TO_I16, IntCode_SIGN_EXTEND_I8_TO_I32, IntCode_SIGN_EXTEND_I8_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_ASSIGN_I16, IntCode_SIGN_EXTEND_I16_TO_I32, IntCode_SIGN_EXTEND_I16_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I32, IntCode_SIGN_EXTEND_I32_TO_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I8, IntCode_SIGN_EXTEND_I8_TO_I16, + IntCode_SIGN_EXTEND_I8_TO_I32, IntCode_SIGN_EXTEND_I8_TO_I64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I16, IntCode_SIGN_EXTEND_I16_TO_I32, + IntCode_SIGN_EXTEND_I16_TO_I64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I32, IntCode_SIGN_EXTEND_I32_TO_I64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -855,13 +858,31 @@ uint32_t IntCode_TRUNCATE_I64_TO_I32(IntCodeState& ics, const IntCode* i) { } int Translate_TRUNCATE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ASSIGN_I8, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_TRUNCATE_I16_TO_I8, IntCode_ASSIGN_I16, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_TRUNCATE_I32_TO_I8, IntCode_TRUNCATE_I32_TO_I16, IntCode_ASSIGN_I32, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_TRUNCATE_I64_TO_I8, IntCode_TRUNCATE_I64_TO_I16, IntCode_TRUNCATE_I64_TO_I32, IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I8, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_TRUNCATE_I16_TO_I8, + IntCode_ASSIGN_I16, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_TRUNCATE_I32_TO_I8, IntCode_TRUNCATE_I32_TO_I16, + IntCode_ASSIGN_I32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_TRUNCATE_I64_TO_I8, + IntCode_TRUNCATE_I64_TO_I16, IntCode_TRUNCATE_I64_TO_I32, + IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -898,13 +919,31 @@ uint32_t IntCode_CONVERT_F64_TO_F32(IntCodeState& ics, const IntCode* i) { int Translate_CONVERT(TranslationContext& ctx, Instr* i) { // Can do more as needed. static IntCodeFn fns[] = { - IntCode_ASSIGN_I8, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_ASSIGN_I16, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I32, IntCode_INVALID_TYPE, IntCode_CONVERT_I32_TO_F32, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, IntCode_CONVERT_I64_TO_F64, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_CONVERT_F32_TO_I32, IntCode_INVALID_TYPE, IntCode_ASSIGN_F32, IntCode_CONVERT_F32_TO_F64, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_CONVERT_F64_TO_I32, IntCode_CONVERT_F64_TO_I64, IntCode_CONVERT_F64_TO_F32, IntCode_ASSIGN_F64, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_ASSIGN_V128, + IntCode_ASSIGN_I8, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I16, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I32, IntCode_INVALID_TYPE, + IntCode_CONVERT_I32_TO_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_I64, IntCode_INVALID_TYPE, + IntCode_CONVERT_I64_TO_F64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_CONVERT_F32_TO_I32, IntCode_INVALID_TYPE, + IntCode_ASSIGN_F32, IntCode_CONVERT_F32_TO_F64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_CONVERT_F64_TO_I32, + IntCode_CONVERT_F64_TO_I64, IntCode_CONVERT_F64_TO_F32, + IntCode_ASSIGN_F64, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ASSIGN_V128, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -914,18 +953,18 @@ uint32_t IntCode_ROUND_F32(IntCodeState& ics, const IntCode* i) { float src1 = ics.rf[i->src1_reg].f32; float dest = src1; switch (i->flags) { - case ROUND_TO_ZERO: - dest = truncf(src1); - break; - case ROUND_TO_NEAREST: - dest = roundf(src1); - break; - case ROUND_TO_MINUS_INFINITY: - dest = floorf(src1); - break; - case ROUND_TO_POSITIVE_INFINITY: - dest = ceilf(src1); - break; + case ROUND_TO_ZERO: + dest = truncf(src1); + break; + case ROUND_TO_NEAREST: + dest = roundf(src1); + break; + case ROUND_TO_MINUS_INFINITY: + dest = floorf(src1); + break; + case ROUND_TO_POSITIVE_INFINITY: + dest = ceilf(src1); + break; } ics.rf[i->dest_reg].f32 = dest; return IA_NEXT; @@ -934,18 +973,18 @@ uint32_t IntCode_ROUND_F64(IntCodeState& ics, const IntCode* i) { double src1 = ics.rf[i->src1_reg].f64; double dest = src1; switch (i->flags) { - case ROUND_TO_ZERO: - dest = trunc(src1); - break; - case ROUND_TO_NEAREST: - dest = round(src1); - break; - case ROUND_TO_MINUS_INFINITY: - dest = floor(src1); - break; - case ROUND_TO_POSITIVE_INFINITY: - dest = ceil(src1); - break; + case ROUND_TO_ZERO: + dest = trunc(src1); + break; + case ROUND_TO_NEAREST: + dest = round(src1); + break; + case ROUND_TO_MINUS_INFINITY: + dest = floor(src1); + break; + case ROUND_TO_POSITIVE_INFINITY: + dest = ceil(src1); + break; } ics.rf[i->dest_reg].f64 = dest; return IA_NEXT; @@ -966,7 +1005,8 @@ uint32_t IntCode_ROUND_V128_NEAREST(IntCodeState& ics, const IntCode* i) { } return IA_NEXT; } -uint32_t IntCode_ROUND_V128_MINUS_INFINITY(IntCodeState& ics, const IntCode* i) { +uint32_t IntCode_ROUND_V128_MINUS_INFINITY(IntCodeState& ics, + const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t n = 0; n < 4; n++) { @@ -974,7 +1014,8 @@ uint32_t IntCode_ROUND_V128_MINUS_INFINITY(IntCodeState& ics, const IntCode* i) } return IA_NEXT; } -uint32_t IntCode_ROUND_V128_POSITIVE_INFINTIY(IntCodeState& ics, const IntCode* i) { +uint32_t IntCode_ROUND_V128_POSITIVE_INFINTIY(IntCodeState& ics, + const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t n = 0; n < 4; n++) { @@ -985,21 +1026,15 @@ uint32_t IntCode_ROUND_V128_POSITIVE_INFINTIY(IntCodeState& ics, const IntCode* int Translate_ROUND(TranslationContext& ctx, Instr* i) { if (i->dest->type == VEC128_TYPE) { static IntCodeFn fns[] = { - IntCode_ROUND_V128_ZERO, - IntCode_ROUND_V128_NEAREST, - IntCode_ROUND_V128_MINUS_INFINITY, - IntCode_ROUND_V128_POSITIVE_INFINTIY, + IntCode_ROUND_V128_ZERO, IntCode_ROUND_V128_NEAREST, + IntCode_ROUND_V128_MINUS_INFINITY, IntCode_ROUND_V128_POSITIVE_INFINTIY, }; return DispatchToC(ctx, i, fns[i->flags]); } else { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_ROUND_F32, - IntCode_ROUND_F64, - IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_ROUND_F32, IntCode_ROUND_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -1008,19 +1043,19 @@ int Translate_ROUND(TranslationContext& ctx, Instr* i) { uint32_t IntCode_VECTOR_CONVERT_I2F_S(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECF4(dest,0) = (float)(int32_t)VECI4(src1,0); - VECF4(dest,1) = (float)(int32_t)VECI4(src1,1); - VECF4(dest,2) = (float)(int32_t)VECI4(src1,2); - VECF4(dest,3) = (float)(int32_t)VECI4(src1,3); + VECF4(dest, 0) = (float)(int32_t)VECI4(src1, 0); + VECF4(dest, 1) = (float)(int32_t)VECI4(src1, 1); + VECF4(dest, 2) = (float)(int32_t)VECI4(src1, 2); + VECF4(dest, 3) = (float)(int32_t)VECI4(src1, 3); return IA_NEXT; } uint32_t IntCode_VECTOR_CONVERT_I2F_U(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECF4(dest,0) = (float)(uint32_t)VECI4(src1,0); - VECF4(dest,1) = (float)(uint32_t)VECI4(src1,1); - VECF4(dest,2) = (float)(uint32_t)VECI4(src1,2); - VECF4(dest,3) = (float)(uint32_t)VECI4(src1,3); + VECF4(dest, 0) = (float)(uint32_t)VECI4(src1, 0); + VECF4(dest, 1) = (float)(uint32_t)VECI4(src1, 1); + VECF4(dest, 2) = (float)(uint32_t)VECI4(src1, 2); + VECF4(dest, 3) = (float)(uint32_t)VECI4(src1, 3); return IA_NEXT; } int Translate_VECTOR_CONVERT_I2F(TranslationContext& ctx, Instr* i) { @@ -1035,15 +1070,15 @@ uint32_t IntCode_VECTOR_CONVERT_F2I(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; if (i->flags & ARITHMETIC_UNSIGNED) { - VECI4(dest,0) = (uint32_t)VECF4(src1,0); - VECI4(dest,1) = (uint32_t)VECF4(src1,1); - VECI4(dest,2) = (uint32_t)VECF4(src1,2); - VECI4(dest,3) = (uint32_t)VECF4(src1,3); + VECI4(dest, 0) = (uint32_t)VECF4(src1, 0); + VECI4(dest, 1) = (uint32_t)VECF4(src1, 1); + VECI4(dest, 2) = (uint32_t)VECF4(src1, 2); + VECI4(dest, 3) = (uint32_t)VECF4(src1, 3); } else { - VECI4(dest,0) = (int32_t)VECF4(src1,0); - VECI4(dest,1) = (int32_t)VECF4(src1,1); - VECI4(dest,2) = (int32_t)VECF4(src1,2); - VECI4(dest,3) = (int32_t)VECF4(src1,3); + VECI4(dest, 0) = (int32_t)VECF4(src1, 0); + VECI4(dest, 1) = (int32_t)VECF4(src1, 1); + VECI4(dest, 2) = (int32_t)VECF4(src1, 2); + VECI4(dest, 3) = (int32_t)VECF4(src1, 3); } return IA_NEXT; } @@ -1054,26 +1089,26 @@ uint32_t IntCode_VECTOR_CONVERT_F2I_SAT(IntCodeState& ics, const IntCode* i) { for (int n = 0; n < 4; n++) { float src = src1.f4[n]; if (src < 0) { - VECI4(dest,n) = 0; + VECI4(dest, n) = 0; ics.did_saturate = 1; } else if (src > UINT_MAX) { - VECI4(dest,n) = UINT_MAX; + VECI4(dest, n) = UINT_MAX; ics.did_saturate = 1; } else { - VECI4(dest,n) = (uint32_t)src; + VECI4(dest, n) = (uint32_t)src; } } } else { for (int n = 0; n < 4; n++) { float src = src1.f4[n]; if (src < INT_MIN) { - VECI4(dest,n) = INT_MIN; + VECI4(dest, n) = INT_MIN; ics.did_saturate = 1; } else if (src > INT_MAX) { - VECI4(dest,n) = INT_MAX; + VECI4(dest, n) = INT_MAX; ics.did_saturate = 1; } else { - VECI4(dest,n) = (int32_t)src; + VECI4(dest, n) = (int32_t)src; } } } @@ -1088,49 +1123,49 @@ int Translate_VECTOR_CONVERT_F2I(TranslationContext& ctx, Instr* i) { } static uint8_t __lvsl_table[17][16] = { - { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, - { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, - { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, - { 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, - { 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, - { 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, - { 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, - { 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, - { 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, - { 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, - {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, - {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, - {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, - {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, - {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, - {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, - {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, + {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, + {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, + {4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, + {5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, + {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, + {7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, + {8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, + {9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, + {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, + {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, + {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, + {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, + {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, + {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, + {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, }; static uint8_t __lvsr_table[17][16] = { - {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, - {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, - {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, - {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, - {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, - {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, - {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, - { 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, - { 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, - { 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, - { 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, - { 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, - { 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, - { 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, - { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, - { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, - { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31}, + {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, + {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, + {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, + {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, + {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, + {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, + {9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, + {8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, + {7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, + {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, + {5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, + {4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, + {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, + {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, + {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, }; uint32_t IntCode_LOAD_VECTOR_SHL(IntCodeState& ics, const IntCode* i) { int8_t sh = MIN(16, ics.rf[i->src1_reg].i8); vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 16; n++) { - VECB16(dest,n) = __lvsl_table[sh][n]; + VECB16(dest, n) = __lvsl_table[sh][n]; } return IA_NEXT; } @@ -1142,7 +1177,7 @@ uint32_t IntCode_LOAD_VECTOR_SHR(IntCodeState& ics, const IntCode* i) { int8_t sh = MIN(16, ics.rf[i->src1_reg].i8); vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 16; n++) { - VECB16(dest,n) = __lvsr_table[sh][n]; + VECB16(dest, n) = __lvsr_table[sh][n]; } return IA_NEXT; } @@ -1188,18 +1223,15 @@ uint32_t IntCode_LOAD_LOCAL_F64(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_LOAD_LOCAL_V128(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].v128 = *((vec128_t*)(ics.locals + ics.rf[i->src1_reg].u32)); + ics.rf[i->dest_reg].v128 = + *((vec128_t*)(ics.locals + ics.rf[i->src1_reg].u32)); return IA_NEXT; } int Translate_LOAD_LOCAL(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_LOAD_LOCAL_I8, - IntCode_LOAD_LOCAL_I16, - IntCode_LOAD_LOCAL_I32, - IntCode_LOAD_LOCAL_I64, - IntCode_LOAD_LOCAL_F32, - IntCode_LOAD_LOCAL_F64, - IntCode_LOAD_LOCAL_V128, + IntCode_LOAD_LOCAL_I8, IntCode_LOAD_LOCAL_I16, IntCode_LOAD_LOCAL_I32, + IntCode_LOAD_LOCAL_I64, IntCode_LOAD_LOCAL_F32, IntCode_LOAD_LOCAL_F64, + IntCode_LOAD_LOCAL_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -1229,119 +1261,136 @@ uint32_t IntCode_STORE_LOCAL_F64(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_STORE_LOCAL_V128(IntCodeState& ics, const IntCode* i) { - *((vec128_t*)(ics.locals + ics.rf[i->src1_reg].u32)) = ics.rf[i->src2_reg].v128; + *((vec128_t*)(ics.locals + ics.rf[i->src1_reg].u32)) = + ics.rf[i->src2_reg].v128; return IA_NEXT; } int Translate_STORE_LOCAL(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_STORE_LOCAL_I8, - IntCode_STORE_LOCAL_I16, - IntCode_STORE_LOCAL_I32, - IntCode_STORE_LOCAL_I64, - IntCode_STORE_LOCAL_F32, - IntCode_STORE_LOCAL_F64, - IntCode_STORE_LOCAL_V128, + IntCode_STORE_LOCAL_I8, IntCode_STORE_LOCAL_I16, + IntCode_STORE_LOCAL_I32, IntCode_STORE_LOCAL_I64, + IntCode_STORE_LOCAL_F32, IntCode_STORE_LOCAL_F64, + IntCode_STORE_LOCAL_V128, }; return DispatchToC(ctx, i, fns[i->src2.value->type]); } uint32_t IntCode_LOAD_CONTEXT_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = *((int8_t*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%d (%X) = ctx i8 +%d\n", ics.rf[i->dest_reg].i8, ics.rf[i->dest_reg].u8, ics.rf[i->src1_reg].u64); + DPRINT("%d (%X) = ctx i8 +%d\n", ics.rf[i->dest_reg].i8, + ics.rf[i->dest_reg].u8, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_I16(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i16 = *((int16_t*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%d (%X) = ctx i16 +%d\n", ics.rf[i->dest_reg].i16, ics.rf[i->dest_reg].u16, ics.rf[i->src1_reg].u64); + ics.rf[i->dest_reg].i16 = + *((int16_t*)(ics.context + ics.rf[i->src1_reg].u64)); + DPRINT("%d (%X) = ctx i16 +%d\n", ics.rf[i->dest_reg].i16, + ics.rf[i->dest_reg].u16, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_I32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i32 = *((int32_t*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%d (%X) = ctx i32 +%d\n", ics.rf[i->dest_reg].i32, ics.rf[i->dest_reg].u32, ics.rf[i->src1_reg].u64); + ics.rf[i->dest_reg].i32 = + *((int32_t*)(ics.context + ics.rf[i->src1_reg].u64)); + DPRINT("%d (%X) = ctx i32 +%d\n", ics.rf[i->dest_reg].i32, + ics.rf[i->dest_reg].u32, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_I64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i64 = *((int64_t*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%lld (%llX) = ctx i64 +%d\n", ics.rf[i->dest_reg].i64, ics.rf[i->dest_reg].u64, ics.rf[i->src1_reg].u64); + ics.rf[i->dest_reg].i64 = + *((int64_t*)(ics.context + ics.rf[i->src1_reg].u64)); + DPRINT("%lld (%llX) = ctx i64 +%d\n", ics.rf[i->dest_reg].i64, + ics.rf[i->dest_reg].u64, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].f32 = *((float*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%e (%X) = ctx f32 +%d\n", ics.rf[i->dest_reg].f32, ics.rf[i->dest_reg].u32, ics.rf[i->src1_reg].u64); + DPRINT("%e (%X) = ctx f32 +%d\n", ics.rf[i->dest_reg].f32, + ics.rf[i->dest_reg].u32, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].f64 = *((double*)(ics.context + ics.rf[i->src1_reg].u64)); - DPRINT("%lle (%llX) = ctx f64 +%d\n", ics.rf[i->dest_reg].f64, ics.rf[i->dest_reg].u64, ics.rf[i->src1_reg].u64); + DPRINT("%lle (%llX) = ctx f64 +%d\n", ics.rf[i->dest_reg].f64, + ics.rf[i->dest_reg].u64, ics.rf[i->src1_reg].u64); return IA_NEXT; } uint32_t IntCode_LOAD_CONTEXT_V128(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].v128 = *((vec128_t*)(ics.context + ics.rf[i->src1_reg].u64)); + ics.rf[i->dest_reg].v128 = + *((vec128_t*)(ics.context + ics.rf[i->src1_reg].u64)); DPRINT("[%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X] = ctx v128 +%d\n", - VECF4(ics.rf[i->dest_reg].v128,0), VECF4(ics.rf[i->dest_reg].v128,1), VECF4(ics.rf[i->dest_reg].v128,2), VECF4(ics.rf[i->dest_reg].v128,3), - VECI4(ics.rf[i->dest_reg].v128,0), VECI4(ics.rf[i->dest_reg].v128,1), VECI4(ics.rf[i->dest_reg].v128,2), VECI4(ics.rf[i->dest_reg].v128,3), + VECF4(ics.rf[i->dest_reg].v128, 0), VECF4(ics.rf[i->dest_reg].v128, 1), + VECF4(ics.rf[i->dest_reg].v128, 2), VECF4(ics.rf[i->dest_reg].v128, 3), + VECI4(ics.rf[i->dest_reg].v128, 0), VECI4(ics.rf[i->dest_reg].v128, 1), + VECI4(ics.rf[i->dest_reg].v128, 2), VECI4(ics.rf[i->dest_reg].v128, 3), ics.rf[i->src1_reg].u64); return IA_NEXT; } int Translate_LOAD_CONTEXT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_LOAD_CONTEXT_I8, - IntCode_LOAD_CONTEXT_I16, - IntCode_LOAD_CONTEXT_I32, - IntCode_LOAD_CONTEXT_I64, - IntCode_LOAD_CONTEXT_F32, - IntCode_LOAD_CONTEXT_F64, - IntCode_LOAD_CONTEXT_V128, + IntCode_LOAD_CONTEXT_I8, IntCode_LOAD_CONTEXT_I16, + IntCode_LOAD_CONTEXT_I32, IntCode_LOAD_CONTEXT_I64, + IntCode_LOAD_CONTEXT_F32, IntCode_LOAD_CONTEXT_F64, + IntCode_LOAD_CONTEXT_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } uint32_t IntCode_STORE_CONTEXT_I8(IntCodeState& ics, const IntCode* i) { *((int8_t*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].i8; - DPRINT("ctx i8 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].i8, ics.rf[i->src2_reg].u8); + DPRINT("ctx i8 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].i8, ics.rf[i->src2_reg].u8); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_I16(IntCodeState& ics, const IntCode* i) { - *((int16_t*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].i16; - DPRINT("ctx i16 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].i16, ics.rf[i->src2_reg].u16); + *((int16_t*)(ics.context + ics.rf[i->src1_reg].u64)) = + ics.rf[i->src2_reg].i16; + DPRINT("ctx i16 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].i16, ics.rf[i->src2_reg].u16); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_I32(IntCodeState& ics, const IntCode* i) { - *((int32_t*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].i32; - DPRINT("ctx i32 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].i32, ics.rf[i->src2_reg].u32); + *((int32_t*)(ics.context + ics.rf[i->src1_reg].u64)) = + ics.rf[i->src2_reg].i32; + DPRINT("ctx i32 +%d = %d (%X)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].i32, ics.rf[i->src2_reg].u32); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_I64(IntCodeState& ics, const IntCode* i) { - *((int64_t*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].i64; - DPRINT("ctx i64 +%d = %lld (%llX)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].i64, ics.rf[i->src2_reg].u64); + *((int64_t*)(ics.context + ics.rf[i->src1_reg].u64)) = + ics.rf[i->src2_reg].i64; + DPRINT("ctx i64 +%d = %lld (%llX)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].i64, ics.rf[i->src2_reg].u64); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_F32(IntCodeState& ics, const IntCode* i) { *((float*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].f32; - DPRINT("ctx f32 +%d = %e (%X)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].f32, ics.rf[i->src2_reg].u32); + DPRINT("ctx f32 +%d = %e (%X)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].f32, ics.rf[i->src2_reg].u32); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_F64(IntCodeState& ics, const IntCode* i) { *((double*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].f64; - DPRINT("ctx f64 +%d = %lle (%llX)\n", ics.rf[i->src1_reg].u64, ics.rf[i->src2_reg].f64, ics.rf[i->src2_reg].u64); + DPRINT("ctx f64 +%d = %lle (%llX)\n", ics.rf[i->src1_reg].u64, + ics.rf[i->src2_reg].f64, ics.rf[i->src2_reg].u64); return IA_NEXT; } uint32_t IntCode_STORE_CONTEXT_V128(IntCodeState& ics, const IntCode* i) { - *((vec128_t*)(ics.context + ics.rf[i->src1_reg].u64)) = ics.rf[i->src2_reg].v128; - DPRINT("ctx v128 +%d = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", ics.rf[i->src1_reg].u64, - VECF4(ics.rf[i->src2_reg].v128,0), VECF4(ics.rf[i->src2_reg].v128,1), VECF4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3), - VECI4(ics.rf[i->src2_reg].v128,0), VECI4(ics.rf[i->src2_reg].v128,1), VECI4(ics.rf[i->src2_reg].v128,2), VECI4(ics.rf[i->src2_reg].v128,3)); + *((vec128_t*)(ics.context + ics.rf[i->src1_reg].u64)) = + ics.rf[i->src2_reg].v128; + DPRINT("ctx v128 +%d = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", + ics.rf[i->src1_reg].u64, VECF4(ics.rf[i->src2_reg].v128, 0), + VECF4(ics.rf[i->src2_reg].v128, 1), VECF4(ics.rf[i->src2_reg].v128, 2), + VECF4(ics.rf[i->src2_reg].v128, 3), VECI4(ics.rf[i->src2_reg].v128, 0), + VECI4(ics.rf[i->src2_reg].v128, 1), VECI4(ics.rf[i->src2_reg].v128, 2), + VECI4(ics.rf[i->src2_reg].v128, 3)); return IA_NEXT; } int Translate_STORE_CONTEXT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_STORE_CONTEXT_I8, - IntCode_STORE_CONTEXT_I16, - IntCode_STORE_CONTEXT_I32, - IntCode_STORE_CONTEXT_I64, - IntCode_STORE_CONTEXT_F32, - IntCode_STORE_CONTEXT_F64, - IntCode_STORE_CONTEXT_V128, + IntCode_STORE_CONTEXT_I8, IntCode_STORE_CONTEXT_I16, + IntCode_STORE_CONTEXT_I32, IntCode_STORE_CONTEXT_I64, + IntCode_STORE_CONTEXT_F32, IntCode_STORE_CONTEXT_F64, + IntCode_STORE_CONTEXT_V128, }; return DispatchToC(ctx, i, fns[i->src2.value->type]); } @@ -1352,10 +1401,8 @@ uint32_t IntCode_LOAD_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.thread_state->memory()->LoadI8(address); return IA_NEXT; } - DPRINT("%d (%X) = load.i8 %.8X\n", - *((int8_t*)(ics.membase + address)), - *((uint8_t*)(ics.membase + address)), - address); + DPRINT("%d (%X) = load.i8 %.8X\n", *((int8_t*)(ics.membase + address)), + *((uint8_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].i8 = *((int8_t*)(ics.membase + address)); return IA_NEXT; @@ -1367,10 +1414,8 @@ uint32_t IntCode_LOAD_I16(IntCodeState& ics, const IntCode* i) { XESWAP16(ics.thread_state->memory()->LoadI16(address)); return IA_NEXT; } - DPRINT("%d (%X) = load.i16 %.8X\n", - *((int16_t*)(ics.membase + address)), - *((uint16_t*)(ics.membase + address)), - address); + DPRINT("%d (%X) = load.i16 %.8X\n", *((int16_t*)(ics.membase + address)), + *((uint16_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].i16 = *((int16_t*)(ics.membase + address)); return IA_NEXT; @@ -1383,10 +1428,8 @@ uint32_t IntCode_LOAD_I32(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } DFLUSH(); - DPRINT("%d (%X) = load.i32 %.8X\n", - *((int32_t*)(ics.membase + address)), - *((uint32_t*)(ics.membase + address)), - address); + DPRINT("%d (%X) = load.i32 %.8X\n", *((int32_t*)(ics.membase + address)), + *((uint32_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].i32 = *((int32_t*)(ics.membase + address)); return IA_NEXT; @@ -1398,30 +1441,24 @@ uint32_t IntCode_LOAD_I64(IntCodeState& ics, const IntCode* i) { XESWAP64(ics.thread_state->memory()->LoadI64(address)); return IA_NEXT; } - DPRINT("%lld (%llX) = load.i64 %.8X\n", - *((int64_t*)(ics.membase + address)), - *((uint64_t*)(ics.membase + address)), - address); + DPRINT("%lld (%llX) = load.i64 %.8X\n", *((int64_t*)(ics.membase + address)), + *((uint64_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].i64 = *((int64_t*)(ics.membase + address)); return IA_NEXT; } uint32_t IntCode_LOAD_F32(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; - DPRINT("%e (%X) = load.f32 %.8X\n", - *((float*)(ics.membase + address)), - *((uint64_t*)(ics.membase + address)), - address); + DPRINT("%e (%X) = load.f32 %.8X\n", *((float*)(ics.membase + address)), + *((uint64_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].f32 = *((float*)(ics.membase + address)); return IA_NEXT; } uint32_t IntCode_LOAD_F64(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; - DPRINT("%lle (%llX) = load.f64 %.8X\n", - *((double*)(ics.membase + address)), - *((uint64_t*)(ics.membase + address)), - address); + DPRINT("%lle (%llX) = load.f64 %.8X\n", *((double*)(ics.membase + address)), + *((uint64_t*)(ics.membase + address)), address); DFLUSH(); ics.rf[i->dest_reg].f64 = *((double*)(ics.membase + address)); return IA_NEXT; @@ -1430,24 +1467,19 @@ uint32_t IntCode_LOAD_V128(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = *((uint32_t*)(ics.membase + address + n * 4)); + VECI4(dest, n) = *((uint32_t*)(ics.membase + address + n * 4)); } DPRINT("[%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X] = load.v128 %.8X\n", - VECF4(dest,0), VECF4(dest,1), VECF4(dest,2), VECF4(dest,3), - VECI4(dest,0), VECI4(dest,1), VECI4(dest,2), VECI4(dest,3), + VECF4(dest, 0), VECF4(dest, 1), VECF4(dest, 2), VECF4(dest, 3), + VECI4(dest, 0), VECI4(dest, 1), VECI4(dest, 2), VECI4(dest, 3), address); DFLUSH(); return IA_NEXT; } int Translate_LOAD(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_LOAD_I8, - IntCode_LOAD_I16, - IntCode_LOAD_I32, - IntCode_LOAD_I64, - IntCode_LOAD_F32, - IntCode_LOAD_F64, - IntCode_LOAD_V128, + IntCode_LOAD_I8, IntCode_LOAD_I16, IntCode_LOAD_I32, IntCode_LOAD_I64, + IntCode_LOAD_F32, IntCode_LOAD_F64, IntCode_LOAD_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -1462,8 +1494,8 @@ uint32_t IntCode_STORE_I8(IntCodeState& ics, const IntCode* i) { ics.thread_state->memory()->StoreI8(address, ics.rf[i->src2_reg].i8); return IA_NEXT; } - DPRINT("store.i8 %.8X = %d (%X)\n", - address, ics.rf[i->src2_reg].i8, ics.rf[i->src2_reg].u8); + DPRINT("store.i8 %.8X = %d (%X)\n", address, ics.rf[i->src2_reg].i8, + ics.rf[i->src2_reg].u8); DFLUSH(); *((int8_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i8; MarkPageDirty(ics, address); @@ -1476,8 +1508,8 @@ uint32_t IntCode_STORE_I16(IntCodeState& ics, const IntCode* i) { XESWAP16(ics.rf[i->src2_reg].i16)); return IA_NEXT; } - DPRINT("store.i16 %.8X = %d (%X)\n", - address, ics.rf[i->src2_reg].i16, ics.rf[i->src2_reg].u16); + DPRINT("store.i16 %.8X = %d (%X)\n", address, ics.rf[i->src2_reg].i16, + ics.rf[i->src2_reg].u16); DFLUSH(); *((int16_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i16; MarkPageDirty(ics, address); @@ -1490,8 +1522,8 @@ uint32_t IntCode_STORE_I32(IntCodeState& ics, const IntCode* i) { XESWAP32(ics.rf[i->src2_reg].i32)); return IA_NEXT; } - DPRINT("store.i32 %.8X = %d (%X)\n", - address, ics.rf[i->src2_reg].i32, ics.rf[i->src2_reg].u32); + DPRINT("store.i32 %.8X = %d (%X)\n", address, ics.rf[i->src2_reg].i32, + ics.rf[i->src2_reg].u32); DFLUSH(); *((int32_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i32; MarkPageDirty(ics, address); @@ -1504,8 +1536,8 @@ uint32_t IntCode_STORE_I64(IntCodeState& ics, const IntCode* i) { XESWAP64(ics.rf[i->src2_reg].i64)); return IA_NEXT; } - DPRINT("store.i64 %.8X = %lld (%llX)\n", - address, ics.rf[i->src2_reg].i64, ics.rf[i->src2_reg].u64); + DPRINT("store.i64 %.8X = %lld (%llX)\n", address, ics.rf[i->src2_reg].i64, + ics.rf[i->src2_reg].u64); DFLUSH(); *((int64_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i64; MarkPageDirty(ics, address); @@ -1513,8 +1545,8 @@ uint32_t IntCode_STORE_I64(IntCodeState& ics, const IntCode* i) { } uint32_t IntCode_STORE_F32(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; - DPRINT("store.f32 %.8X = %e (%X)\n", - address, ics.rf[i->src2_reg].f32, ics.rf[i->src2_reg].u32); + DPRINT("store.f32 %.8X = %e (%X)\n", address, ics.rf[i->src2_reg].f32, + ics.rf[i->src2_reg].u32); DFLUSH(); *((float*)(ics.membase + address)) = ics.rf[i->src2_reg].f32; MarkPageDirty(ics, address); @@ -1522,8 +1554,8 @@ uint32_t IntCode_STORE_F32(IntCodeState& ics, const IntCode* i) { } uint32_t IntCode_STORE_F64(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; - DPRINT("store.f64 %.8X = %lle (%llX)\n", - address, ics.rf[i->src2_reg].f64, ics.rf[i->src2_reg].u64); + DPRINT("store.f64 %.8X = %lle (%llX)\n", address, ics.rf[i->src2_reg].f64, + ics.rf[i->src2_reg].u64); DFLUSH(); *((double*)(ics.membase + address)) = ics.rf[i->src2_reg].f64; MarkPageDirty(ics, address); @@ -1532,9 +1564,11 @@ uint32_t IntCode_STORE_F64(IntCodeState& ics, const IntCode* i) { uint32_t IntCode_STORE_V128(IntCodeState& ics, const IntCode* i) { uint32_t address = ics.rf[i->src1_reg].u32; DPRINT("store.v128 %.8X = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", - address, - VECF4(ics.rf[i->src2_reg].v128,0), VECF4(ics.rf[i->src2_reg].v128,1), VECF4(ics.rf[i->src2_reg].v128,2), VECF4(ics.rf[i->src2_reg].v128,3), - VECI4(ics.rf[i->src2_reg].v128,0), VECI4(ics.rf[i->src2_reg].v128,1), VECI4(ics.rf[i->src2_reg].v128,2), VECI4(ics.rf[i->src2_reg].v128,3)); + address, VECF4(ics.rf[i->src2_reg].v128, 0), + VECF4(ics.rf[i->src2_reg].v128, 1), VECF4(ics.rf[i->src2_reg].v128, 2), + VECF4(ics.rf[i->src2_reg].v128, 3), VECI4(ics.rf[i->src2_reg].v128, 0), + VECI4(ics.rf[i->src2_reg].v128, 1), VECI4(ics.rf[i->src2_reg].v128, 2), + VECI4(ics.rf[i->src2_reg].v128, 3)); DFLUSH(); *((vec128_t*)(ics.membase + address)) = ics.rf[i->src2_reg].v128; MarkPageDirty(ics, address); @@ -1542,13 +1576,9 @@ uint32_t IntCode_STORE_V128(IntCodeState& ics, const IntCode* i) { } int Translate_STORE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_STORE_I8, - IntCode_STORE_I16, - IntCode_STORE_I32, - IntCode_STORE_I64, - IntCode_STORE_F32, - IntCode_STORE_F64, - IntCode_STORE_V128, + IntCode_STORE_I8, IntCode_STORE_I16, IntCode_STORE_I32, + IntCode_STORE_I64, IntCode_STORE_F32, IntCode_STORE_F64, + IntCode_STORE_V128, }; return DispatchToC(ctx, i, fns[i->src2.value->type]); } @@ -1561,22 +1591,26 @@ int Translate_PREFETCH(TranslationContext& ctx, Instr* i) { } uint32_t IntCode_MAX_I8_I8(IntCodeState& ics, const IntCode* i) { - int8_t a = ics.rf[i->src1_reg].i8; int8_t b = ics.rf[i->src2_reg].i8; + int8_t a = ics.rf[i->src1_reg].i8; + int8_t b = ics.rf[i->src2_reg].i8; ics.rf[i->dest_reg].i8 = MAX(a, b); return IA_NEXT; } uint32_t IntCode_MAX_I16_I16(IntCodeState& ics, const IntCode* i) { - int16_t a = ics.rf[i->src1_reg].i16; int16_t b = ics.rf[i->src2_reg].i16; + int16_t a = ics.rf[i->src1_reg].i16; + int16_t b = ics.rf[i->src2_reg].i16; ics.rf[i->dest_reg].i16 = MAX(a, b); return IA_NEXT; } uint32_t IntCode_MAX_I32_I32(IntCodeState& ics, const IntCode* i) { - int32_t a = ics.rf[i->src1_reg].i32; int32_t b = ics.rf[i->src2_reg].i32; + int32_t a = ics.rf[i->src1_reg].i32; + int32_t b = ics.rf[i->src2_reg].i32; ics.rf[i->dest_reg].i32 = MAX(a, b); return IA_NEXT; } uint32_t IntCode_MAX_I64_I64(IntCodeState& ics, const IntCode* i) { - int64_t a = ics.rf[i->src1_reg].i64; int64_t b = ics.rf[i->src2_reg].i64; + int64_t a = ics.rf[i->src1_reg].i64; + int64_t b = ics.rf[i->src2_reg].i64; ics.rf[i->dest_reg].i64 = MAX(a, b); return IA_NEXT; } @@ -1601,34 +1635,34 @@ uint32_t IntCode_MAX_V128_V128(IntCodeState& ics, const IntCode* i) { } int Translate_MAX(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MAX_I8_I8, - IntCode_MAX_I16_I16, - IntCode_MAX_I32_I32, - IntCode_MAX_I64_I64, - IntCode_MAX_F32_F32, - IntCode_MAX_F64_F64, - IntCode_MAX_V128_V128, + IntCode_MAX_I8_I8, IntCode_MAX_I16_I16, IntCode_MAX_I32_I32, + IntCode_MAX_I64_I64, IntCode_MAX_F32_F32, IntCode_MAX_F64_F64, + IntCode_MAX_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } uint32_t IntCode_MIN_I8_I8(IntCodeState& ics, const IntCode* i) { - int8_t a = ics.rf[i->src1_reg].i8; int8_t b = ics.rf[i->src2_reg].i8; + int8_t a = ics.rf[i->src1_reg].i8; + int8_t b = ics.rf[i->src2_reg].i8; ics.rf[i->dest_reg].i8 = MIN(a, b); return IA_NEXT; } uint32_t IntCode_MIN_I16_I16(IntCodeState& ics, const IntCode* i) { - int16_t a = ics.rf[i->src1_reg].i16; int16_t b = ics.rf[i->src2_reg].i16; + int16_t a = ics.rf[i->src1_reg].i16; + int16_t b = ics.rf[i->src2_reg].i16; ics.rf[i->dest_reg].i16 = MIN(a, b); return IA_NEXT; } uint32_t IntCode_MIN_I32_I32(IntCodeState& ics, const IntCode* i) { - int32_t a = ics.rf[i->src1_reg].i32; int32_t b = ics.rf[i->src2_reg].i32; + int32_t a = ics.rf[i->src1_reg].i32; + int32_t b = ics.rf[i->src2_reg].i32; ics.rf[i->dest_reg].i32 = MIN(a, b); return IA_NEXT; } uint32_t IntCode_MIN_I64_I64(IntCodeState& ics, const IntCode* i) { - int64_t a = ics.rf[i->src1_reg].i64; int64_t b = ics.rf[i->src2_reg].i64; + int64_t a = ics.rf[i->src1_reg].i64; + int64_t b = ics.rf[i->src2_reg].i64; ics.rf[i->dest_reg].i64 = MIN(a, b); return IA_NEXT; } @@ -1653,61 +1687,53 @@ uint32_t IntCode_MIN_V128_V128(IntCodeState& ics, const IntCode* i) { } int Translate_MIN(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MIN_I8_I8, - IntCode_MIN_I16_I16, - IntCode_MIN_I32_I32, - IntCode_MIN_I64_I64, - IntCode_MIN_F32_F32, - IntCode_MIN_F64_F64, - IntCode_MIN_V128_V128, + IntCode_MIN_I8_I8, IntCode_MIN_I16_I16, IntCode_MIN_I32_I32, + IntCode_MIN_I64_I64, IntCode_MIN_F32_F32, IntCode_MIN_F64_F64, + IntCode_MIN_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } uint32_t IntCode_SELECT_I8(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].i8 : ics.rf[i->src3_reg].i8; + ics.rf[i->dest_reg].i8 = + ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].i8 : ics.rf[i->src3_reg].i8; return IA_NEXT; } uint32_t IntCode_SELECT_I16(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].i16 : ics.rf[i->src3_reg].i16; + ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].i16 + : ics.rf[i->src3_reg].i16; return IA_NEXT; } uint32_t IntCode_SELECT_I32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].i32 : ics.rf[i->src3_reg].i32; + ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].i32 + : ics.rf[i->src3_reg].i32; return IA_NEXT; } uint32_t IntCode_SELECT_I64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].i64 : ics.rf[i->src3_reg].i64; + ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].i64 + : ics.rf[i->src3_reg].i64; return IA_NEXT; } uint32_t IntCode_SELECT_F32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].f32 : ics.rf[i->src3_reg].f32; + ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].f32 + : ics.rf[i->src3_reg].f32; return IA_NEXT; } uint32_t IntCode_SELECT_F64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].f64 : ics.rf[i->src3_reg].f64; + ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].f64 + : ics.rf[i->src3_reg].f64; return IA_NEXT; } uint32_t IntCode_SELECT_V128(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].v128 = ics.rf[i->src1_reg].i8 ? - ics.rf[i->src2_reg].v128 : ics.rf[i->src3_reg].v128; + ics.rf[i->dest_reg].v128 = ics.rf[i->src1_reg].i8 ? ics.rf[i->src2_reg].v128 + : ics.rf[i->src3_reg].v128; return IA_NEXT; } int Translate_SELECT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_SELECT_I8, - IntCode_SELECT_I16, - IntCode_SELECT_I32, - IntCode_SELECT_I64, - IntCode_SELECT_F32, - IntCode_SELECT_F64, - IntCode_SELECT_V128, + IntCode_SELECT_I8, IntCode_SELECT_I16, IntCode_SELECT_I32, + IntCode_SELECT_I64, IntCode_SELECT_F32, IntCode_SELECT_F64, + IntCode_SELECT_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -1743,13 +1769,9 @@ uint32_t IntCode_IS_TRUE_V128(IntCodeState& ics, const IntCode* i) { } int Translate_IS_TRUE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_IS_TRUE_I8, - IntCode_IS_TRUE_I16, - IntCode_IS_TRUE_I32, - IntCode_IS_TRUE_I64, - IntCode_IS_TRUE_F32, - IntCode_IS_TRUE_F64, - IntCode_IS_TRUE_V128, + IntCode_IS_TRUE_I8, IntCode_IS_TRUE_I16, IntCode_IS_TRUE_I32, + IntCode_IS_TRUE_I64, IntCode_IS_TRUE_F32, IntCode_IS_TRUE_F64, + IntCode_IS_TRUE_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -1785,203 +1807,349 @@ uint32_t IntCode_IS_FALSE_V128(IntCodeState& ics, const IntCode* i) { } int Translate_IS_FALSE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_IS_FALSE_I8, - IntCode_IS_FALSE_I16, - IntCode_IS_FALSE_I32, - IntCode_IS_FALSE_I64, - IntCode_IS_FALSE_F32, - IntCode_IS_FALSE_F64, - IntCode_IS_FALSE_V128, + IntCode_IS_FALSE_I8, IntCode_IS_FALSE_I16, IntCode_IS_FALSE_I32, + IntCode_IS_FALSE_I64, IntCode_IS_FALSE_F32, IntCode_IS_FALSE_F64, + IntCode_IS_FALSE_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_EQ_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 == ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_EQ_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 == ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_EQ_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 == ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_EQ_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 == ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_EQ_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 == ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_EQ_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 == ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_EQ_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 == ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_EQ_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 == ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_EQ_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 == ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_EQ_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 == ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_EQ_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 == ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_EQ_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 == ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_EQ(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_EQ_I8_I8, - IntCode_COMPARE_EQ_I16_I16, - IntCode_COMPARE_EQ_I32_I32, - IntCode_COMPARE_EQ_I64_I64, - IntCode_COMPARE_EQ_F32_F32, - IntCode_COMPARE_EQ_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_EQ_I8_I8, IntCode_COMPARE_EQ_I16_I16, + IntCode_COMPARE_EQ_I32_I32, IntCode_COMPARE_EQ_I64_I64, + IntCode_COMPARE_EQ_F32_F32, IntCode_COMPARE_EQ_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_NE_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 != ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_NE_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 != ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_NE_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 != ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_NE_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 != ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_NE_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 != ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_NE_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 != ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_NE_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 != ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_NE_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 != ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_NE_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 != ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_NE_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 != ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_NE_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 != ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_NE_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 != ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_NE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_NE_I8_I8, - IntCode_COMPARE_NE_I16_I16, - IntCode_COMPARE_NE_I32_I32, - IntCode_COMPARE_NE_I64_I64, - IntCode_COMPARE_NE_F32_F32, - IntCode_COMPARE_NE_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_NE_I8_I8, IntCode_COMPARE_NE_I16_I16, + IntCode_COMPARE_NE_I32_I32, IntCode_COMPARE_NE_I64_I64, + IntCode_COMPARE_NE_F32_F32, IntCode_COMPARE_NE_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_SLT_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 < ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLT_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 < ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLT_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 < ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLT_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 < ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLT_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 < ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLT_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 < ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_SLT_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 < ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLT_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 < ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLT_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 < ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLT_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 < ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLT_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 < ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLT_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 < ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_SLT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_SLT_I8_I8, - IntCode_COMPARE_SLT_I16_I16, - IntCode_COMPARE_SLT_I32_I32, - IntCode_COMPARE_SLT_I64_I64, - IntCode_COMPARE_SLT_F32_F32, - IntCode_COMPARE_SLT_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_SLT_I8_I8, IntCode_COMPARE_SLT_I16_I16, + IntCode_COMPARE_SLT_I32_I32, IntCode_COMPARE_SLT_I64_I64, + IntCode_COMPARE_SLT_F32_F32, IntCode_COMPARE_SLT_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_SLE_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 <= ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLE_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 <= ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLE_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 <= ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLE_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 <= ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLE_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 <= ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SLE_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 <= ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_SLE_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 <= ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLE_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 <= ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLE_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 <= ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLE_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 <= ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLE_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 <= ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SLE_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 <= ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_SLE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_SLE_I8_I8, - IntCode_COMPARE_SLE_I16_I16, - IntCode_COMPARE_SLE_I32_I32, - IntCode_COMPARE_SLE_I64_I64, - IntCode_COMPARE_SLE_F32_F32, - IntCode_COMPARE_SLE_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_SLE_I8_I8, IntCode_COMPARE_SLE_I16_I16, + IntCode_COMPARE_SLE_I32_I32, IntCode_COMPARE_SLE_I64_I64, + IntCode_COMPARE_SLE_F32_F32, IntCode_COMPARE_SLE_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_SGT_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 > ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGT_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 > ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGT_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 > ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGT_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 > ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGT_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 > ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGT_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 > ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_SGT_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 > ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGT_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 > ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGT_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 > ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGT_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 > ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGT_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 > ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGT_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 > ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_SGT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_SGT_I8_I8, - IntCode_COMPARE_SGT_I16_I16, - IntCode_COMPARE_SGT_I32_I32, - IntCode_COMPARE_SGT_I64_I64, - IntCode_COMPARE_SGT_F32_F32, - IntCode_COMPARE_SGT_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_SGT_I8_I8, IntCode_COMPARE_SGT_I16_I16, + IntCode_COMPARE_SGT_I32_I32, IntCode_COMPARE_SGT_I64_I64, + IntCode_COMPARE_SGT_F32_F32, IntCode_COMPARE_SGT_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_SGE_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 >= ics.rf[i->src2_reg].i8; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGE_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 >= ics.rf[i->src2_reg].i16; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGE_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 >= ics.rf[i->src2_reg].i32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGE_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 >= ics.rf[i->src2_reg].i64; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGE_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 >= ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_SGE_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 >= ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_SGE_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 >= ics.rf[i->src2_reg].i8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGE_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i16 >= ics.rf[i->src2_reg].i16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGE_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i32 >= ics.rf[i->src2_reg].i32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGE_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i64 >= ics.rf[i->src2_reg].i64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGE_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 >= ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_SGE_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 >= ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_SGE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_SGE_I8_I8, - IntCode_COMPARE_SGE_I16_I16, - IntCode_COMPARE_SGE_I32_I32, - IntCode_COMPARE_SGE_I64_I64, - IntCode_COMPARE_SGE_F32_F32, - IntCode_COMPARE_SGE_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_SGE_I8_I8, IntCode_COMPARE_SGE_I16_I16, + IntCode_COMPARE_SGE_I32_I32, IntCode_COMPARE_SGE_I64_I64, + IntCode_COMPARE_SGE_F32_F32, IntCode_COMPARE_SGE_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_ULT_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 < ics.rf[i->src2_reg].u8; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULT_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 < ics.rf[i->src2_reg].u16; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULT_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 < ics.rf[i->src2_reg].u32; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULT_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 < ics.rf[i->src2_reg].u64; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULT_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 < ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULT_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 < ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_ULT_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 < ics.rf[i->src2_reg].u8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULT_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 < ics.rf[i->src2_reg].u16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULT_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 < ics.rf[i->src2_reg].u32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULT_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 < ics.rf[i->src2_reg].u64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULT_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 < ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULT_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 < ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_ULT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_ULT_I8_I8, - IntCode_COMPARE_ULT_I16_I16, - IntCode_COMPARE_ULT_I32_I32, - IntCode_COMPARE_ULT_I64_I64, - IntCode_COMPARE_ULT_F32_F32, - IntCode_COMPARE_ULT_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_ULT_I8_I8, IntCode_COMPARE_ULT_I16_I16, + IntCode_COMPARE_ULT_I32_I32, IntCode_COMPARE_ULT_I64_I64, + IntCode_COMPARE_ULT_F32_F32, IntCode_COMPARE_ULT_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_ULE_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 <= ics.rf[i->src2_reg].u8; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULE_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 <= ics.rf[i->src2_reg].u16; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULE_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 <= ics.rf[i->src2_reg].u32; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULE_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 <= ics.rf[i->src2_reg].u64; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULE_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 <= ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_ULE_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 <= ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_ULE_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 <= ics.rf[i->src2_reg].u8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULE_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 <= ics.rf[i->src2_reg].u16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULE_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 <= ics.rf[i->src2_reg].u32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULE_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 <= ics.rf[i->src2_reg].u64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULE_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 <= ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_ULE_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 <= ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_ULE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_ULE_I8_I8, - IntCode_COMPARE_ULE_I16_I16, - IntCode_COMPARE_ULE_I32_I32, - IntCode_COMPARE_ULE_I64_I64, - IntCode_COMPARE_ULE_F32_F32, - IntCode_COMPARE_ULE_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_ULE_I8_I8, IntCode_COMPARE_ULE_I16_I16, + IntCode_COMPARE_ULE_I32_I32, IntCode_COMPARE_ULE_I64_I64, + IntCode_COMPARE_ULE_F32_F32, IntCode_COMPARE_ULE_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_UGT_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 > ics.rf[i->src2_reg].u8; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGT_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 > ics.rf[i->src2_reg].u16; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGT_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 > ics.rf[i->src2_reg].u32; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGT_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 > ics.rf[i->src2_reg].u64; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGT_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 > ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGT_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 > ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_UGT_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 > ics.rf[i->src2_reg].u8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGT_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 > ics.rf[i->src2_reg].u16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGT_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 > ics.rf[i->src2_reg].u32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGT_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 > ics.rf[i->src2_reg].u64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGT_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 > ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGT_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 > ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_UGT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_UGT_I8_I8, - IntCode_COMPARE_UGT_I16_I16, - IntCode_COMPARE_UGT_I32_I32, - IntCode_COMPARE_UGT_I64_I64, - IntCode_COMPARE_UGT_F32_F32, - IntCode_COMPARE_UGT_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_UGT_I8_I8, IntCode_COMPARE_UGT_I16_I16, + IntCode_COMPARE_UGT_I32_I32, IntCode_COMPARE_UGT_I64_I64, + IntCode_COMPARE_UGT_F32_F32, IntCode_COMPARE_UGT_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } -uint32_t IntCode_COMPARE_UGE_I8_I8(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 >= ics.rf[i->src2_reg].u8; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGE_I16_I16(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 >= ics.rf[i->src2_reg].u16; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGE_I32_I32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 >= ics.rf[i->src2_reg].u32; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGE_I64_I64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 >= ics.rf[i->src2_reg].u64; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGE_F32_F32(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 >= ics.rf[i->src2_reg].f32; return IA_NEXT; } -uint32_t IntCode_COMPARE_UGE_F64_F64(IntCodeState& ics, const IntCode* i) { ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 >= ics.rf[i->src2_reg].f64; return IA_NEXT; } +uint32_t IntCode_COMPARE_UGE_I8_I8(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u8 >= ics.rf[i->src2_reg].u8; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGE_I16_I16(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u16 >= ics.rf[i->src2_reg].u16; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGE_I32_I32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u32 >= ics.rf[i->src2_reg].u32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGE_I64_I64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].u64 >= ics.rf[i->src2_reg].u64; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGE_F32_F32(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f32 >= ics.rf[i->src2_reg].f32; + return IA_NEXT; +} +uint32_t IntCode_COMPARE_UGE_F64_F64(IntCodeState& ics, const IntCode* i) { + ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].f64 >= ics.rf[i->src2_reg].f64; + return IA_NEXT; +} int Translate_COMPARE_UGE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_COMPARE_UGE_I8_I8, - IntCode_COMPARE_UGE_I16_I16, - IntCode_COMPARE_UGE_I32_I32, - IntCode_COMPARE_UGE_I64_I64, - IntCode_COMPARE_UGE_F32_F32, - IntCode_COMPARE_UGE_F64_F64, - IntCode_INVALID_TYPE, + IntCode_COMPARE_UGE_I8_I8, IntCode_COMPARE_UGE_I16_I16, + IntCode_COMPARE_UGE_I32_I32, IntCode_COMPARE_UGE_I64_I64, + IntCode_COMPARE_UGE_F32_F32, IntCode_COMPARE_UGE_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -2002,96 +2170,102 @@ int Translate_DID_SATURATE(TranslationContext& ctx, Instr* i) { return DispatchToC(ctx, i, IntCode_DID_SATURATE); } -#define VECTOR_COMPARER(type, value, dest_value, count, op) \ - const vec128_t& src1 = ics.rf[i->src1_reg].v128; \ - const vec128_t& src2 = ics.rf[i->src2_reg].v128; \ - vec128_t& dest = ics.rf[i->dest_reg].v128; \ - for (int n = 0; n < count; n++) { \ - dest.dest_value[n] = ((type)src1.value[n] op (type)src2.value[n]) ? 0xFFFFFFFF : 0; \ - } \ +#define VECTOR_COMPARER(type, value, dest_value, count, op) \ + const vec128_t& src1 = ics.rf[i->src1_reg].v128; \ + const vec128_t& src2 = ics.rf[i->src2_reg].v128; \ + vec128_t& dest = ics.rf[i->dest_reg].v128; \ + for (int n = 0; n < count; n++) { \ + dest.dest_value[n] = \ + ((type)src1.value[n] op(type) src2.value[n]) ? 0xFFFFFFFF : 0; \ + } \ return IA_NEXT; -uint32_t IntCode_VECTOR_COMPARE_EQ_I8(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint8_t, b16, b16, 16, ==) }; -uint32_t IntCode_VECTOR_COMPARE_EQ_I16(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint16_t, s8, s8, 8, ==) }; -uint32_t IntCode_VECTOR_COMPARE_EQ_I32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint32_t, i4, i4, 4, ==) }; -uint32_t IntCode_VECTOR_COMPARE_EQ_F32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(float, f4, i4, 4, ==) }; +uint32_t IntCode_VECTOR_COMPARE_EQ_I8(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint8_t, b16, b16, 16, == )}; +uint32_t IntCode_VECTOR_COMPARE_EQ_I16(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint16_t, s8, s8, 8, == )}; +uint32_t IntCode_VECTOR_COMPARE_EQ_I32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint32_t, i4, i4, 4, == )}; +uint32_t IntCode_VECTOR_COMPARE_EQ_F32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(float, f4, i4, 4, == )}; int Translate_VECTOR_COMPARE_EQ(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_COMPARE_EQ_I8, - IntCode_VECTOR_COMPARE_EQ_I16, - IntCode_VECTOR_COMPARE_EQ_I32, - IntCode_INVALID_TYPE, - IntCode_VECTOR_COMPARE_EQ_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_EQ_I8, IntCode_VECTOR_COMPARE_EQ_I16, + IntCode_VECTOR_COMPARE_EQ_I32, IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_EQ_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } -uint32_t IntCode_VECTOR_COMPARE_SGT_I8(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int8_t, b16, b16, 16, >) }; -uint32_t IntCode_VECTOR_COMPARE_SGT_I16(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int16_t, s8, s8, 8, >) }; -uint32_t IntCode_VECTOR_COMPARE_SGT_I32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int32_t, i4, i4, 4, >) }; -uint32_t IntCode_VECTOR_COMPARE_SGT_F32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(float, f4, i4, 4, >) }; +uint32_t IntCode_VECTOR_COMPARE_SGT_I8(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int8_t, b16, b16, 16, > )}; +uint32_t IntCode_VECTOR_COMPARE_SGT_I16(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int16_t, s8, s8, 8, > )}; +uint32_t IntCode_VECTOR_COMPARE_SGT_I32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int32_t, i4, i4, 4, > )}; +uint32_t IntCode_VECTOR_COMPARE_SGT_F32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(float, f4, i4, 4, > )}; int Translate_VECTOR_COMPARE_SGT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_COMPARE_SGT_I8, - IntCode_VECTOR_COMPARE_SGT_I16, - IntCode_VECTOR_COMPARE_SGT_I32, - IntCode_INVALID_TYPE, - IntCode_VECTOR_COMPARE_SGT_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_SGT_I8, IntCode_VECTOR_COMPARE_SGT_I16, + IntCode_VECTOR_COMPARE_SGT_I32, IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_SGT_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } -uint32_t IntCode_VECTOR_COMPARE_SGE_I8(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int8_t, b16, b16, 16, >=) }; -uint32_t IntCode_VECTOR_COMPARE_SGE_I16(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int16_t, s8, s8, 8, >=) }; -uint32_t IntCode_VECTOR_COMPARE_SGE_I32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(int32_t, i4, i4, 4, >=) }; -uint32_t IntCode_VECTOR_COMPARE_SGE_F32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(float, f4, i4, 4, >=) }; +uint32_t IntCode_VECTOR_COMPARE_SGE_I8(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int8_t, b16, b16, 16, >= )}; +uint32_t IntCode_VECTOR_COMPARE_SGE_I16(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int16_t, s8, s8, 8, >= )}; +uint32_t IntCode_VECTOR_COMPARE_SGE_I32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(int32_t, i4, i4, 4, >= )}; +uint32_t IntCode_VECTOR_COMPARE_SGE_F32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(float, f4, i4, 4, >= )}; int Translate_VECTOR_COMPARE_SGE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_COMPARE_SGE_I8, - IntCode_VECTOR_COMPARE_SGE_I16, - IntCode_VECTOR_COMPARE_SGE_I32, - IntCode_INVALID_TYPE, - IntCode_VECTOR_COMPARE_SGE_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_SGE_I8, IntCode_VECTOR_COMPARE_SGE_I16, + IntCode_VECTOR_COMPARE_SGE_I32, IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_SGE_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } -uint32_t IntCode_VECTOR_COMPARE_UGT_I8(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint8_t, b16, b16, 16, >) }; -uint32_t IntCode_VECTOR_COMPARE_UGT_I16(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint16_t, s8, s8, 8, >) }; -uint32_t IntCode_VECTOR_COMPARE_UGT_I32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint32_t, i4, i4, 4, >) }; -uint32_t IntCode_VECTOR_COMPARE_UGT_F32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(float, f4, i4, 4, >) }; +uint32_t IntCode_VECTOR_COMPARE_UGT_I8(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint8_t, b16, b16, 16, > )}; +uint32_t IntCode_VECTOR_COMPARE_UGT_I16(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint16_t, s8, s8, 8, > )}; +uint32_t IntCode_VECTOR_COMPARE_UGT_I32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint32_t, i4, i4, 4, > )}; +uint32_t IntCode_VECTOR_COMPARE_UGT_F32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(float, f4, i4, 4, > )}; int Translate_VECTOR_COMPARE_UGT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_COMPARE_UGT_I8, - IntCode_VECTOR_COMPARE_UGT_I16, - IntCode_VECTOR_COMPARE_UGT_I32, - IntCode_INVALID_TYPE, - IntCode_VECTOR_COMPARE_UGT_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_UGT_I8, IntCode_VECTOR_COMPARE_UGT_I16, + IntCode_VECTOR_COMPARE_UGT_I32, IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_UGT_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } -uint32_t IntCode_VECTOR_COMPARE_UGE_I8(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint8_t, b16, b16, 16, >=) }; -uint32_t IntCode_VECTOR_COMPARE_UGE_I16(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint16_t, s8, s8, 8, >=) }; -uint32_t IntCode_VECTOR_COMPARE_UGE_I32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(uint32_t, i4, i4, 4, >=) }; -uint32_t IntCode_VECTOR_COMPARE_UGE_F32(IntCodeState& ics, const IntCode* i) { VECTOR_COMPARER(float, f4, i4, 4, >=) }; +uint32_t IntCode_VECTOR_COMPARE_UGE_I8(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint8_t, b16, b16, 16, >= )}; +uint32_t IntCode_VECTOR_COMPARE_UGE_I16(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint16_t, s8, s8, 8, >= )}; +uint32_t IntCode_VECTOR_COMPARE_UGE_I32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(uint32_t, i4, i4, 4, >= )}; +uint32_t IntCode_VECTOR_COMPARE_UGE_F32(IntCodeState& ics, const IntCode* i) { + VECTOR_COMPARER(float, f4, i4, 4, >= )}; int Translate_VECTOR_COMPARE_UGE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_COMPARE_UGE_I8, - IntCode_VECTOR_COMPARE_UGE_I16, - IntCode_VECTOR_COMPARE_UGE_I32, - IntCode_INVALID_TYPE, - IntCode_VECTOR_COMPARE_UGE_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_UGE_I8, IntCode_VECTOR_COMPARE_UGE_I16, + IntCode_VECTOR_COMPARE_UGE_I32, IntCode_INVALID_TYPE, + IntCode_VECTOR_COMPARE_UGE_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } @@ -2099,7 +2273,8 @@ int Translate_VECTOR_COMPARE_UGE(TranslationContext& ctx, Instr* i) { #define CHECK_DID_CARRY(v1, v2) (((uint64_t)v2) > ~((uint64_t)v1)) #define ADD_DID_CARRY(a, b) CHECK_DID_CARRY(a, b) uint32_t IntCode_ADD_I8_I8(IntCodeState& ics, const IntCode* i) { - int8_t a = ics.rf[i->src1_reg].i8; int8_t b = ics.rf[i->src2_reg].i8; + int8_t a = ics.rf[i->src1_reg].i8; + int8_t b = ics.rf[i->src2_reg].i8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_DID_CARRY(a, b); } @@ -2107,7 +2282,8 @@ uint32_t IntCode_ADD_I8_I8(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_I16_I16(IntCodeState& ics, const IntCode* i) { - int16_t a = ics.rf[i->src1_reg].i16; int16_t b = ics.rf[i->src2_reg].i16; + int16_t a = ics.rf[i->src1_reg].i16; + int16_t b = ics.rf[i->src2_reg].i16; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_DID_CARRY(a, b); } @@ -2115,7 +2291,8 @@ uint32_t IntCode_ADD_I16_I16(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_I32_I32(IntCodeState& ics, const IntCode* i) { - int32_t a = ics.rf[i->src1_reg].i32; int32_t b = ics.rf[i->src2_reg].i32; + int32_t a = ics.rf[i->src1_reg].i32; + int32_t b = ics.rf[i->src2_reg].i32; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_DID_CARRY(a, b); } @@ -2123,7 +2300,8 @@ uint32_t IntCode_ADD_I32_I32(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_I64_I64(IntCodeState& ics, const IntCode* i) { - int64_t a = ics.rf[i->src1_reg].i64; int64_t b = ics.rf[i->src2_reg].i64; + int64_t a = ics.rf[i->src1_reg].i64; + int64_t b = ics.rf[i->src2_reg].i64; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_DID_CARRY(a, b); } @@ -2152,21 +2330,19 @@ uint32_t IntCode_ADD_V128_V128(IntCodeState& ics, const IntCode* i) { } int Translate_ADD(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ADD_I8_I8, - IntCode_ADD_I16_I16, - IntCode_ADD_I32_I32, - IntCode_ADD_I64_I64, - IntCode_ADD_F32_F32, - IntCode_ADD_F64_F64, - IntCode_ADD_V128_V128, + IntCode_ADD_I8_I8, IntCode_ADD_I16_I16, IntCode_ADD_I32_I32, + IntCode_ADD_I64_I64, IntCode_ADD_F32_F32, IntCode_ADD_F64_F64, + IntCode_ADD_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } #define ADD_CARRY_DID_CARRY(a, b, c) \ - (CHECK_DID_CARRY(a, b) || ((c) != 0) && CHECK_DID_CARRY((a) + (b), c)) + (CHECK_DID_CARRY(a, b) || ((c) != 0) && CHECK_DID_CARRY((a) + (b), c)) uint32_t IntCode_ADD_CARRY_I8_I8(IntCodeState& ics, const IntCode* i) { - int8_t a = ics.rf[i->src1_reg].i8; int8_t b = ics.rf[i->src2_reg].i8; uint8_t c = ics.rf[i->src3_reg].u8; + int8_t a = ics.rf[i->src1_reg].i8; + int8_t b = ics.rf[i->src2_reg].i8; + uint8_t c = ics.rf[i->src3_reg].u8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_CARRY_DID_CARRY(a, b, c); } @@ -2174,7 +2350,9 @@ uint32_t IntCode_ADD_CARRY_I8_I8(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_CARRY_I16_I16(IntCodeState& ics, const IntCode* i) { - int16_t a = ics.rf[i->src1_reg].i16; int16_t b = ics.rf[i->src2_reg].i16; uint8_t c = ics.rf[i->src3_reg].u8; + int16_t a = ics.rf[i->src1_reg].i16; + int16_t b = ics.rf[i->src2_reg].i16; + uint8_t c = ics.rf[i->src3_reg].u8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_CARRY_DID_CARRY(a, b, c); } @@ -2182,7 +2360,9 @@ uint32_t IntCode_ADD_CARRY_I16_I16(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_CARRY_I32_I32(IntCodeState& ics, const IntCode* i) { - int32_t a = ics.rf[i->src1_reg].i32; int32_t b = ics.rf[i->src2_reg].i32; uint8_t c = ics.rf[i->src3_reg].u8; + int32_t a = ics.rf[i->src1_reg].i32; + int32_t b = ics.rf[i->src2_reg].i32; + uint8_t c = ics.rf[i->src3_reg].u8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_CARRY_DID_CARRY(a, b, c); } @@ -2190,7 +2370,9 @@ uint32_t IntCode_ADD_CARRY_I32_I32(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_ADD_CARRY_I64_I64(IntCodeState& ics, const IntCode* i) { - int64_t a = ics.rf[i->src1_reg].i64; int64_t b = ics.rf[i->src2_reg].i64; uint8_t c = ics.rf[i->src3_reg].u8; + int64_t a = ics.rf[i->src1_reg].i64; + int64_t b = ics.rf[i->src2_reg].i64; + uint8_t c = ics.rf[i->src3_reg].u8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = ADD_CARRY_DID_CARRY(a, b, c); } @@ -2199,23 +2381,22 @@ uint32_t IntCode_ADD_CARRY_I64_I64(IntCodeState& ics, const IntCode* i) { } uint32_t IntCode_ADD_CARRY_F32_F32(IntCodeState& ics, const IntCode* i) { XEASSERT(!i->flags); - ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 + ics.rf[i->src2_reg].f32 + ics.rf[i->src3_reg].i8; + ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 + ics.rf[i->src2_reg].f32 + + ics.rf[i->src3_reg].i8; return IA_NEXT; } uint32_t IntCode_ADD_CARRY_F64_F64(IntCodeState& ics, const IntCode* i) { XEASSERT(!i->flags); - ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 + ics.rf[i->src2_reg].f64 + ics.rf[i->src3_reg].i8; + ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 + ics.rf[i->src2_reg].f64 + + ics.rf[i->src3_reg].i8; return IA_NEXT; } int Translate_ADD_CARRY(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ADD_CARRY_I8_I8, - IntCode_ADD_CARRY_I16_I16, - IntCode_ADD_CARRY_I32_I32, - IntCode_ADD_CARRY_I64_I64, - IntCode_ADD_CARRY_F32_F32, - IntCode_ADD_CARRY_F64_F64, - IntCode_INVALID_TYPE, + IntCode_ADD_CARRY_I8_I8, IntCode_ADD_CARRY_I16_I16, + IntCode_ADD_CARRY_I32_I32, IntCode_ADD_CARRY_I64_I64, + IntCode_ADD_CARRY_F32_F32, IntCode_ADD_CARRY_F64_F64, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2228,31 +2409,31 @@ uint32_t Translate_VECTOR_ADD_I8(IntCodeState& ics, const IntCode* i) { if (arithmetic_flags & ARITHMETIC_SATURATE) { if (arithmetic_flags & ARITHMETIC_UNSIGNED) { for (int n = 0; n < 16; n++) { - uint16_t v = VECB16(src1,n) + VECB16(src2,n); + uint16_t v = VECB16(src1, n) + VECB16(src2, n); if (v > 0xFF) { - VECB16(dest,n) = 0xFF; + VECB16(dest, n) = 0xFF; ics.did_saturate = 1; } else { - VECB16(dest,n) = (uint8_t)v; + VECB16(dest, n) = (uint8_t)v; } } } else { for (int n = 0; n < 16; n++) { - int16_t v = (int8_t)VECB16(src1,n) + (int8_t)VECB16(src2,n); + int16_t v = (int8_t)VECB16(src1, n) + (int8_t)VECB16(src2, n); if (v > 0x7F) { - VECB16(dest,n) = 0x7F; + VECB16(dest, n) = 0x7F; ics.did_saturate = 1; } else if (v < -0x80) { - VECB16(dest,n) = -0x80; + VECB16(dest, n) = -0x80; ics.did_saturate = 1; } else { - VECB16(dest,n) = (uint8_t)v; + VECB16(dest, n) = (uint8_t)v; } } } } else { for (int n = 0; n < 16; n++) { - VECB16(dest,n) = VECB16(src1,n) + VECB16(src2,n); + VECB16(dest, n) = VECB16(src1, n) + VECB16(src2, n); } } return IA_NEXT; @@ -2265,31 +2446,31 @@ uint32_t Translate_VECTOR_ADD_I16(IntCodeState& ics, const IntCode* i) { if (arithmetic_flags & ARITHMETIC_SATURATE) { if (arithmetic_flags & ARITHMETIC_UNSIGNED) { for (int n = 0; n < 8; n++) { - uint32_t v = VECS8(src1,n) + VECS8(src2,n); + uint32_t v = VECS8(src1, n) + VECS8(src2, n); if (v > 0xFFFF) { - VECS8(dest,n) = 0xFFFF; + VECS8(dest, n) = 0xFFFF; ics.did_saturate = 1; } else { - VECS8(dest,n) = (uint16_t)v; + VECS8(dest, n) = (uint16_t)v; } } } else { for (int n = 0; n < 8; n++) { - int32_t v = (int16_t)VECS8(src1,n) + (int16_t)VECS8(src2,n); + int32_t v = (int16_t)VECS8(src1, n) + (int16_t)VECS8(src2, n); if (v > 0x7FFF) { - VECS8(dest,n) = 0x7FFF; + VECS8(dest, n) = 0x7FFF; ics.did_saturate = 1; } else if (v < -0x8000) { - VECS8(dest,n) = -0x8000; + VECS8(dest, n) = -0x8000; ics.did_saturate = 1; } else { - VECS8(dest,n) = (uint16_t)v; + VECS8(dest, n) = (uint16_t)v; } } } } else { for (int n = 0; n < 8; n++) { - VECS8(dest,n) = VECS8(src1,n) + VECS8(src2,n); + VECS8(dest, n) = VECS8(src1, n) + VECS8(src2, n); } } return IA_NEXT; @@ -2302,31 +2483,31 @@ uint32_t Translate_VECTOR_ADD_I32(IntCodeState& ics, const IntCode* i) { if (arithmetic_flags & ARITHMETIC_SATURATE) { if (arithmetic_flags & ARITHMETIC_UNSIGNED) { for (int n = 0; n < 4; n++) { - uint64_t v = VECI4(src1,n) + VECI4(src2,n); + uint64_t v = VECI4(src1, n) + VECI4(src2, n); if (v > 0xFFFFFFFF) { - VECI4(dest,n) = 0xFFFFFFFF; + VECI4(dest, n) = 0xFFFFFFFF; ics.did_saturate = 1; } else { - VECI4(dest,n) = (uint32_t)v; + VECI4(dest, n) = (uint32_t)v; } } } else { for (int n = 0; n < 4; n++) { - int64_t v = (int32_t)VECI4(src1,n) + (int32_t)VECI4(src2,n); + int64_t v = (int32_t)VECI4(src1, n) + (int32_t)VECI4(src2, n); if (v > 0x7FFFFFFF) { - VECI4(dest,n) = 0x7FFFFFFF; + VECI4(dest, n) = 0x7FFFFFFF; ics.did_saturate = 1; } else if (v < -0x80000000ll) { - VECI4(dest,n) = 0x80000000; + VECI4(dest, n) = 0x80000000; ics.did_saturate = 1; } else { - VECI4(dest,n) = (uint32_t)v; + VECI4(dest, n) = (uint32_t)v; } } } } else { for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) + VECI4(src2,n); + VECI4(dest, n) = VECI4(src1, n) + VECI4(src2, n); } } return IA_NEXT; @@ -2343,21 +2524,18 @@ uint32_t Translate_VECTOR_ADD_F32(IntCodeState& ics, const IntCode* i) { int Translate_VECTOR_ADD(TranslationContext& ctx, Instr* i) { TypeName part_type = (TypeName)(i->flags & 0xFF); static IntCodeFn fns[] = { - Translate_VECTOR_ADD_I8, - Translate_VECTOR_ADD_I16, - Translate_VECTOR_ADD_I32, - IntCode_INVALID_TYPE, - Translate_VECTOR_ADD_F32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + Translate_VECTOR_ADD_I8, Translate_VECTOR_ADD_I16, + Translate_VECTOR_ADD_I32, IntCode_INVALID_TYPE, + Translate_VECTOR_ADD_F32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[part_type]); } -#define SUB_DID_CARRY(a, b) \ - ((b) == 0) || CHECK_DID_CARRY(a, 0 - b) +#define SUB_DID_CARRY(a, b) ((b) == 0) || CHECK_DID_CARRY(a, 0 - b) uint32_t IntCode_SUB_I8_I8(IntCodeState& ics, const IntCode* i) { - int8_t a = ics.rf[i->src1_reg].i8; int8_t b = ics.rf[i->src2_reg].i8; + int8_t a = ics.rf[i->src1_reg].i8; + int8_t b = ics.rf[i->src2_reg].i8; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = SUB_DID_CARRY(a, b); } @@ -2365,7 +2543,8 @@ uint32_t IntCode_SUB_I8_I8(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_SUB_I16_I16(IntCodeState& ics, const IntCode* i) { - int16_t a = ics.rf[i->src1_reg].i16; int16_t b = ics.rf[i->src2_reg].i16; + int16_t a = ics.rf[i->src1_reg].i16; + int16_t b = ics.rf[i->src2_reg].i16; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = SUB_DID_CARRY(a, b); } @@ -2373,7 +2552,8 @@ uint32_t IntCode_SUB_I16_I16(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_SUB_I32_I32(IntCodeState& ics, const IntCode* i) { - int32_t a = ics.rf[i->src1_reg].i32; int32_t b = ics.rf[i->src2_reg].i32; + int32_t a = ics.rf[i->src1_reg].i32; + int32_t b = ics.rf[i->src2_reg].i32; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = SUB_DID_CARRY(a, b); } @@ -2381,7 +2561,8 @@ uint32_t IntCode_SUB_I32_I32(IntCodeState& ics, const IntCode* i) { return IA_NEXT; } uint32_t IntCode_SUB_I64_I64(IntCodeState& ics, const IntCode* i) { - int64_t a = ics.rf[i->src1_reg].i64; int64_t b = ics.rf[i->src2_reg].i64; + int64_t a = ics.rf[i->src1_reg].i64; + int64_t b = ics.rf[i->src2_reg].i64; if (i->flags == ARITHMETIC_SET_CARRY) { ics.did_carry = SUB_DID_CARRY(a, b); } @@ -2409,13 +2590,9 @@ uint32_t IntCode_SUB_V128_V128(IntCodeState& ics, const IntCode* i) { } int Translate_SUB(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_SUB_I8_I8, - IntCode_SUB_I16_I16, - IntCode_SUB_I32_I32, - IntCode_SUB_I64_I64, - IntCode_SUB_F32_F32, - IntCode_SUB_F64_F64, - IntCode_SUB_V128_V128, + IntCode_SUB_I8_I8, IntCode_SUB_I16_I16, IntCode_SUB_I32_I32, + IntCode_SUB_I64_I64, IntCode_SUB_F32_F32, IntCode_SUB_F64_F64, + IntCode_SUB_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2471,22 +2648,14 @@ uint32_t IntCode_MUL_I64_I64_U(IntCodeState& ics, const IntCode* i) { } int Translate_MUL(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MUL_I8_I8, - IntCode_MUL_I16_I16, - IntCode_MUL_I32_I32, - IntCode_MUL_I64_I64, - IntCode_MUL_F32_F32, - IntCode_MUL_F64_F64, - IntCode_MUL_V128_V128, + IntCode_MUL_I8_I8, IntCode_MUL_I16_I16, IntCode_MUL_I32_I32, + IntCode_MUL_I64_I64, IntCode_MUL_F32_F32, IntCode_MUL_F64_F64, + IntCode_MUL_V128_V128, }; static IntCodeFn fns_unsigned[] = { - IntCode_MUL_I8_I8_U, - IntCode_MUL_I16_I16_U, - IntCode_MUL_I32_I32_U, - IntCode_MUL_I64_I64_U, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_MUL_I8_I8_U, IntCode_MUL_I16_I16_U, IntCode_MUL_I32_I32_U, + IntCode_MUL_I64_I64_U, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; if (i->flags & ARITHMETIC_UNSIGNED) { return DispatchToC(ctx, i, fns_unsigned[i->dest->type]); @@ -2496,10 +2665,10 @@ int Translate_MUL(TranslationContext& ctx, Instr* i) { } namespace { -uint64_t Mul128(uint64_t xi_low, uint64_t xi_high, - uint64_t yi_low, uint64_t yi_high) { - // 128bit multiply, simplified for two input 64bit integers. - // http://mrob.com/pub/math/int128.c.txt +uint64_t Mul128(uint64_t xi_low, uint64_t xi_high, uint64_t yi_low, + uint64_t yi_high) { +// 128bit multiply, simplified for two input 64bit integers. +// http://mrob.com/pub/math/int128.c.txt #define HI_WORD 0xFFFFFFFF00000000LL #define LO_WORD 0x00000000FFFFFFFFLL uint64_t d = xi_low & LO_WORD; @@ -2515,14 +2684,30 @@ uint64_t Mul128(uint64_t xi_low, uint64_t xi_high, acc >>= 32LL; uint64_t carry = 0; - uint64_t ac2 = acc + c * h; if (ac2 < acc) { carry++; } - acc = ac2 + d * g; if (acc < ac2) { carry++; } + uint64_t ac2 = acc + c * h; + if (ac2 < acc) { + carry++; + } + acc = ac2 + d * g; + if (acc < ac2) { + carry++; + } uint64_t rv2_lo = o1 | (acc << 32LL); - ac2 = (acc >> 32LL) | (carry << 32LL); carry = 0; + ac2 = (acc >> 32LL) | (carry << 32LL); + carry = 0; - acc = ac2 + b * h; if (acc < ac2) { carry++; } - ac2 = acc + c * g; if (ac2 < acc) { carry++; } - acc = ac2 + d * f; if (acc < ac2) { carry++; } + acc = ac2 + b * h; + if (acc < ac2) { + carry++; + } + ac2 = acc + c * g; + if (ac2 < acc) { + carry++; + } + acc = ac2 + d * f; + if (acc < ac2) { + carry++; + } uint64_t o2 = acc & LO_WORD; ac2 = (acc >> 32LL) | (carry << 32LL); @@ -2537,8 +2722,7 @@ uint64_t Mul128(uint64_t xi_low, uint64_t xi_high, } uint32_t IntCode_MUL_HI_I8_I8(IntCodeState& ics, const IntCode* i) { - int16_t v = - (int16_t)ics.rf[i->src1_reg].i8 * (int16_t)ics.rf[i->src2_reg].i8; + int16_t v = (int16_t)ics.rf[i->src1_reg].i8 * (int16_t)ics.rf[i->src2_reg].i8; ics.rf[i->dest_reg].i8 = (v >> 8); return IA_NEXT; } @@ -2608,22 +2792,15 @@ uint32_t IntCode_MUL_HI_I64_I64_U(IntCodeState& ics, const IntCode* i) { } int Translate_MUL_HI(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MUL_HI_I8_I8, - IntCode_MUL_HI_I16_I16, - IntCode_MUL_HI_I32_I32, - IntCode_MUL_HI_I64_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_MUL_HI_I8_I8, IntCode_MUL_HI_I16_I16, IntCode_MUL_HI_I32_I32, + IntCode_MUL_HI_I64_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; static IntCodeFn fns_unsigned[] = { - IntCode_MUL_HI_I8_I8_U, - IntCode_MUL_HI_I16_I16_U, - IntCode_MUL_HI_I32_I32_U, - IntCode_MUL_HI_I64_I64_U, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_MUL_HI_I8_I8_U, IntCode_MUL_HI_I16_I16_U, + IntCode_MUL_HI_I32_I32_U, IntCode_MUL_HI_I64_I64_U, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; if (i->flags & ARITHMETIC_UNSIGNED) { return DispatchToC(ctx, i, fns_unsigned[i->dest->type]); @@ -2683,22 +2860,14 @@ uint32_t IntCode_DIV_I64_I64_U(IntCodeState& ics, const IntCode* i) { } int Translate_DIV(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_DIV_I8_I8, - IntCode_DIV_I16_I16, - IntCode_DIV_I32_I32, - IntCode_DIV_I64_I64, - IntCode_DIV_F32_F32, - IntCode_DIV_F64_F64, - IntCode_DIV_V128_V128, + IntCode_DIV_I8_I8, IntCode_DIV_I16_I16, IntCode_DIV_I32_I32, + IntCode_DIV_I64_I64, IntCode_DIV_F32_F32, IntCode_DIV_F64_F64, + IntCode_DIV_V128_V128, }; static IntCodeFn fns_unsigned[] = { - IntCode_DIV_I8_I8_U, - IntCode_DIV_I16_I16_U, - IntCode_DIV_I32_I32_U, - IntCode_DIV_I64_I64_U, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_DIV_I8_I8_U, IntCode_DIV_I16_I16_U, IntCode_DIV_I32_I32_U, + IntCode_DIV_I64_I64_U, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; if (i->flags & ARITHMETIC_UNSIGNED) { return DispatchToC(ctx, i, fns_unsigned[i->dest->type]); @@ -2709,27 +2878,33 @@ int Translate_DIV(TranslationContext& ctx, Instr* i) { // TODO(benvanik): use intrinsics or something uint32_t IntCode_MUL_ADD_I8(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 * ics.rf[i->src2_reg].i8 + ics.rf[i->src3_reg].i8; + ics.rf[i->dest_reg].i8 = + ics.rf[i->src1_reg].i8 * ics.rf[i->src2_reg].i8 + ics.rf[i->src3_reg].i8; return IA_NEXT; } uint32_t IntCode_MUL_ADD_I16(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i16 * ics.rf[i->src2_reg].i16 + ics.rf[i->src3_reg].i16; + ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i16 * ics.rf[i->src2_reg].i16 + + ics.rf[i->src3_reg].i16; return IA_NEXT; } uint32_t IntCode_MUL_ADD_I32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i32 * ics.rf[i->src2_reg].i32 + ics.rf[i->src3_reg].i32; + ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i32 * ics.rf[i->src2_reg].i32 + + ics.rf[i->src3_reg].i32; return IA_NEXT; } uint32_t IntCode_MUL_ADD_I64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i64 * ics.rf[i->src2_reg].i64 + ics.rf[i->src3_reg].i64; + ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i64 * ics.rf[i->src2_reg].i64 + + ics.rf[i->src3_reg].i64; return IA_NEXT; } uint32_t IntCode_MUL_ADD_F32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 * ics.rf[i->src2_reg].f32 + ics.rf[i->src3_reg].f32; + ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 * ics.rf[i->src2_reg].f32 + + ics.rf[i->src3_reg].f32; return IA_NEXT; } uint32_t IntCode_MUL_ADD_F64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 * ics.rf[i->src2_reg].f64 + ics.rf[i->src3_reg].f64; + ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 * ics.rf[i->src2_reg].f64 + + ics.rf[i->src3_reg].f64; return IA_NEXT; } uint32_t IntCode_MUL_ADD_V128(IntCodeState& ics, const IntCode* i) { @@ -2744,40 +2919,42 @@ uint32_t IntCode_MUL_ADD_V128(IntCodeState& ics, const IntCode* i) { } int Translate_MUL_ADD(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MUL_ADD_I8, - IntCode_MUL_ADD_I16, - IntCode_MUL_ADD_I32, - IntCode_MUL_ADD_I64, - IntCode_MUL_ADD_F32, - IntCode_MUL_ADD_F64, - IntCode_MUL_ADD_V128, + IntCode_MUL_ADD_I8, IntCode_MUL_ADD_I16, IntCode_MUL_ADD_I32, + IntCode_MUL_ADD_I64, IntCode_MUL_ADD_F32, IntCode_MUL_ADD_F64, + IntCode_MUL_ADD_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } // TODO(benvanik): use intrinsics or something uint32_t IntCode_MUL_SUB_I8(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i8 = ics.rf[i->src1_reg].i8 * ics.rf[i->src2_reg].i8 - ics.rf[i->src3_reg].i8; + ics.rf[i->dest_reg].i8 = + ics.rf[i->src1_reg].i8 * ics.rf[i->src2_reg].i8 - ics.rf[i->src3_reg].i8; return IA_NEXT; } uint32_t IntCode_MUL_SUB_I16(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i16 * ics.rf[i->src2_reg].i16 - ics.rf[i->src3_reg].i16; + ics.rf[i->dest_reg].i16 = ics.rf[i->src1_reg].i16 * ics.rf[i->src2_reg].i16 - + ics.rf[i->src3_reg].i16; return IA_NEXT; } uint32_t IntCode_MUL_SUB_I32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i32 * ics.rf[i->src2_reg].i32 - ics.rf[i->src3_reg].i32; + ics.rf[i->dest_reg].i32 = ics.rf[i->src1_reg].i32 * ics.rf[i->src2_reg].i32 - + ics.rf[i->src3_reg].i32; return IA_NEXT; } uint32_t IntCode_MUL_SUB_I64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i64 * ics.rf[i->src2_reg].i64 - ics.rf[i->src3_reg].i64; + ics.rf[i->dest_reg].i64 = ics.rf[i->src1_reg].i64 * ics.rf[i->src2_reg].i64 - + ics.rf[i->src3_reg].i64; return IA_NEXT; } uint32_t IntCode_MUL_SUB_F32(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 * ics.rf[i->src2_reg].f32 - ics.rf[i->src3_reg].f32; + ics.rf[i->dest_reg].f32 = ics.rf[i->src1_reg].f32 * ics.rf[i->src2_reg].f32 - + ics.rf[i->src3_reg].f32; return IA_NEXT; } uint32_t IntCode_MUL_SUB_F64(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 * ics.rf[i->src2_reg].f64 - ics.rf[i->src3_reg].f64; + ics.rf[i->dest_reg].f64 = ics.rf[i->src1_reg].f64 * ics.rf[i->src2_reg].f64 - + ics.rf[i->src3_reg].f64; return IA_NEXT; } uint32_t IntCode_MUL_SUB_V128(IntCodeState& ics, const IntCode* i) { @@ -2792,13 +2969,9 @@ uint32_t IntCode_MUL_SUB_V128(IntCodeState& ics, const IntCode* i) { } int Translate_MUL_SUB(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_MUL_SUB_I8, - IntCode_MUL_SUB_I16, - IntCode_MUL_SUB_I32, - IntCode_MUL_SUB_I64, - IntCode_MUL_SUB_F32, - IntCode_MUL_SUB_F64, - IntCode_MUL_SUB_V128, + IntCode_MUL_SUB_I8, IntCode_MUL_SUB_I16, IntCode_MUL_SUB_I32, + IntCode_MUL_SUB_I64, IntCode_MUL_SUB_F32, IntCode_MUL_SUB_F64, + IntCode_MUL_SUB_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2837,13 +3010,8 @@ uint32_t IntCode_NEG_V128(IntCodeState& ics, const IntCode* i) { } int Translate_NEG(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_NEG_I8, - IntCode_NEG_I16, - IntCode_NEG_I32, - IntCode_NEG_I64, - IntCode_NEG_F32, - IntCode_NEG_F64, - IntCode_NEG_V128, + IntCode_NEG_I8, IntCode_NEG_I16, IntCode_NEG_I32, IntCode_NEG_I64, + IntCode_NEG_F32, IntCode_NEG_F64, IntCode_NEG_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2882,13 +3050,8 @@ uint32_t IntCode_ABS_V128(IntCodeState& ics, const IntCode* i) { } int Translate_ABS(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ABS_I8, - IntCode_ABS_I16, - IntCode_ABS_I32, - IntCode_ABS_I64, - IntCode_ABS_F32, - IntCode_ABS_F64, - IntCode_ABS_V128, + IntCode_ABS_I8, IntCode_ABS_I16, IntCode_ABS_I32, IntCode_ABS_I64, + IntCode_ABS_F32, IntCode_ABS_F64, IntCode_ABS_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2902,13 +3065,9 @@ uint32_t IntCode_DOT_PRODUCT_3_V128(IntCodeState& ics, const IntCode* i) { } int Translate_DOT_PRODUCT_3(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_DOT_PRODUCT_3_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_DOT_PRODUCT_3_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -2916,19 +3075,15 @@ int Translate_DOT_PRODUCT_3(TranslationContext& ctx, Instr* i) { uint32_t IntCode_DOT_PRODUCT_4_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; const vec128_t& src2 = ics.rf[i->src2_reg].v128; - ics.rf[i->dest_reg].f32 = - (src1.x * src2.x) + (src1.y * src2.y) + (src1.z * src2.z) + (src1.w * src2.w); + ics.rf[i->dest_reg].f32 = (src1.x * src2.x) + (src1.y * src2.y) + + (src1.z * src2.z) + (src1.w * src2.w); return IA_NEXT; } int Translate_DOT_PRODUCT_4(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_DOT_PRODUCT_4_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_DOT_PRODUCT_4_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -2951,13 +3106,9 @@ uint32_t IntCode_SQRT_V128(IntCodeState& ics, const IntCode* i) { } int Translate_SQRT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_SQRT_F32, - IntCode_SQRT_F64, - IntCode_SQRT_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_SQRT_F32, IntCode_SQRT_F64, + IntCode_SQRT_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -2972,13 +3123,9 @@ uint32_t IntCode_RSQRT_V128(IntCodeState& ics, const IntCode* i) { } int Translate_RSQRT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_RSQRT_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_RSQRT_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -3001,13 +3148,9 @@ uint32_t IntCode_POW2_V128(IntCodeState& ics, const IntCode* i) { } int Translate_POW2(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_POW2_F32, - IntCode_POW2_F64, - IntCode_POW2_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_POW2_F32, IntCode_POW2_F64, + IntCode_POW2_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3030,13 +3173,9 @@ uint32_t IntCode_LOG2_V128(IntCodeState& ics, const IntCode* i) { } int Translate_LOG2(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_LOG2_F32, - IntCode_LOG2_F64, - IntCode_LOG2_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_LOG2_F32, IntCode_LOG2_F64, + IntCode_LOG2_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3062,19 +3201,15 @@ uint32_t IntCode_AND_V128_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) & VECI4(src2,n); + VECI4(dest, n) = VECI4(src1, n) & VECI4(src2, n); } return IA_NEXT; } int Translate_AND(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_AND_I8_I8, - IntCode_AND_I16_I16, - IntCode_AND_I32_I32, - IntCode_AND_I64_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_AND_V128_V128, + IntCode_AND_I8_I8, IntCode_AND_I16_I16, IntCode_AND_I32_I32, + IntCode_AND_I64_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_AND_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3100,19 +3235,15 @@ uint32_t IntCode_OR_V128_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) | VECI4(src2,n); + VECI4(dest, n) = VECI4(src1, n) | VECI4(src2, n); } return IA_NEXT; } int Translate_OR(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_OR_I8_I8, - IntCode_OR_I16_I16, - IntCode_OR_I32_I32, - IntCode_OR_I64_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_OR_V128_V128, + IntCode_OR_I8_I8, IntCode_OR_I16_I16, IntCode_OR_I32_I32, + IntCode_OR_I64_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_OR_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3138,19 +3269,15 @@ uint32_t IntCode_XOR_V128_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) ^ VECI4(src2,n); + VECI4(dest, n) = VECI4(src1, n) ^ VECI4(src2, n); } return IA_NEXT; } int Translate_XOR(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_XOR_I8_I8, - IntCode_XOR_I16_I16, - IntCode_XOR_I32_I32, - IntCode_XOR_I64_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_XOR_V128_V128, + IntCode_XOR_I8_I8, IntCode_XOR_I16_I16, IntCode_XOR_I32_I32, + IntCode_XOR_I64_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_XOR_V128_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3175,19 +3302,15 @@ uint32_t IntCode_NOT_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = ~VECI4(src1,n); + VECI4(dest, n) = ~VECI4(src1, n); } return IA_NEXT; } int Translate_NOT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_NOT_I8, - IntCode_NOT_I16, - IntCode_NOT_I32, - IntCode_NOT_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_NOT_V128, + IntCode_NOT_I8, IntCode_NOT_I16, IntCode_NOT_I32, + IntCode_NOT_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_NOT_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3210,13 +3333,9 @@ uint32_t IntCode_SHL_I64(IntCodeState& ics, const IntCode* i) { } int Translate_SHL(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_SHL_I8, - IntCode_SHL_I16, - IntCode_SHL_I32, - IntCode_SHL_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_SHL_I8, IntCode_SHL_I16, IntCode_SHL_I32, + IntCode_SHL_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3226,7 +3345,7 @@ uint32_t IntCode_VECTOR_SHL_I8(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 16; n++) { - VECB16(dest,n) = VECB16(src1,n) << (VECB16(src2,n) & 0x7); + VECB16(dest, n) = VECB16(src1, n) << (VECB16(src2, n) & 0x7); } return IA_NEXT; } @@ -3235,7 +3354,7 @@ uint32_t IntCode_VECTOR_SHL_I16(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 8; n++) { - VECS8(dest,n) = VECS8(src1,n) << (VECS8(src2,n) & 0xF); + VECS8(dest, n) = VECS8(src1, n) << (VECS8(src2, n) & 0xF); } return IA_NEXT; } @@ -3244,19 +3363,15 @@ uint32_t IntCode_VECTOR_SHL_I32(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) << (VECI4(src2,n) & 0x1F); + VECI4(dest, n) = VECI4(src1, n) << (VECI4(src2, n) & 0x1F); } return IA_NEXT; } int Translate_VECTOR_SHL(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_SHL_I8, - IntCode_VECTOR_SHL_I16, - IntCode_VECTOR_SHL_I32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_SHL_I8, IntCode_VECTOR_SHL_I16, IntCode_VECTOR_SHL_I32, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } @@ -3279,13 +3394,9 @@ uint32_t IntCode_SHR_I64(IntCodeState& ics, const IntCode* i) { } int Translate_SHR(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_SHR_I8, - IntCode_SHR_I16, - IntCode_SHR_I32, - IntCode_SHR_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_SHR_I8, IntCode_SHR_I16, IntCode_SHR_I32, + IntCode_SHR_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3295,7 +3406,7 @@ uint32_t IntCode_VECTOR_SHR_I8(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 16; n++) { - VECB16(dest,n) = VECB16(src1,n) >> (VECB16(src2,n) & 0x7); + VECB16(dest, n) = VECB16(src1, n) >> (VECB16(src2, n) & 0x7); } return IA_NEXT; } @@ -3304,7 +3415,7 @@ uint32_t IntCode_VECTOR_SHR_I16(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 8; n++) { - VECS8(dest,n) = VECS8(src1,n) >> (VECS8(src2,n) & 0xF); + VECS8(dest, n) = VECS8(src1, n) >> (VECS8(src2, n) & 0xF); } return IA_NEXT; } @@ -3313,19 +3424,15 @@ uint32_t IntCode_VECTOR_SHR_I32(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = VECI4(src1,n) >> (VECI4(src2,n) & 0x1F); + VECI4(dest, n) = VECI4(src1, n) >> (VECI4(src2, n) & 0x1F); } return IA_NEXT; } int Translate_VECTOR_SHR(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_SHR_I8, - IntCode_VECTOR_SHR_I16, - IntCode_VECTOR_SHR_I32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_SHR_I8, IntCode_VECTOR_SHR_I16, IntCode_VECTOR_SHR_I32, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } @@ -3348,13 +3455,9 @@ uint32_t IntCode_SHA_I64(IntCodeState& ics, const IntCode* i) { } int Translate_SHA(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_SHA_I8, - IntCode_SHA_I16, - IntCode_SHA_I32, - IntCode_SHA_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_SHA_I8, IntCode_SHA_I16, IntCode_SHA_I32, + IntCode_SHA_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3364,7 +3467,7 @@ uint32_t IntCode_VECTOR_SHA_I8(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 16; n++) { - VECB16(dest,n) = int8_t(VECB16(src1,n)) >> (VECB16(src2,n) & 0x7); + VECB16(dest, n) = int8_t(VECB16(src1, n)) >> (VECB16(src2, n) & 0x7); } return IA_NEXT; } @@ -3373,7 +3476,7 @@ uint32_t IntCode_VECTOR_SHA_I16(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 8; n++) { - VECS8(dest,n) = int16_t(VECS8(src1,n)) >> (VECS8(src2,n) & 0xF); + VECS8(dest, n) = int16_t(VECS8(src1, n)) >> (VECS8(src2, n) & 0xF); } return IA_NEXT; } @@ -3382,54 +3485,50 @@ uint32_t IntCode_VECTOR_SHA_I32(IntCodeState& ics, const IntCode* i) { const vec128_t& src2 = ics.rf[i->src2_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = int32_t(VECI4(src1,n)) >> (VECI4(src2,n) & 0x1F); + VECI4(dest, n) = int32_t(VECI4(src1, n)) >> (VECI4(src2, n) & 0x1F); } return IA_NEXT; } int Translate_VECTOR_SHA(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_VECTOR_SHA_I8, - IntCode_VECTOR_SHA_I16, - IntCode_VECTOR_SHA_I32, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_VECTOR_SHA_I8, IntCode_VECTOR_SHA_I16, IntCode_VECTOR_SHA_I32, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } -template +template T ROTL(T v, int8_t sh) { return (T(v) << sh) | (T(v) >> ((sizeof(T) * 8) - sh)); } uint32_t IntCode_ROTATE_LEFT_I8(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i8 = ROTL(ics.rf[i->src1_reg].i8, ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i8 = + ROTL(ics.rf[i->src1_reg].i8, ics.rf[i->src2_reg].i8); return IA_NEXT; } uint32_t IntCode_ROTATE_LEFT_I16(IntCodeState& ics, const IntCode* i) { - ics.rf[i->dest_reg].i16 = ROTL(ics.rf[i->src1_reg].i16, ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i16 = + ROTL(ics.rf[i->src1_reg].i16, ics.rf[i->src2_reg].i8); return IA_NEXT; } uint32_t IntCode_ROTATE_LEFT_I32(IntCodeState& ics, const IntCode* i) { // TODO(benvanik): use _rtol on vc++ - ics.rf[i->dest_reg].i32 = ROTL(ics.rf[i->src1_reg].i32, ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i32 = + ROTL(ics.rf[i->src1_reg].i32, ics.rf[i->src2_reg].i8); return IA_NEXT; } uint32_t IntCode_ROTATE_LEFT_I64(IntCodeState& ics, const IntCode* i) { // TODO(benvanik): use _rtol64 on vc++ - ics.rf[i->dest_reg].i64 = ROTL(ics.rf[i->src1_reg].i64, ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i64 = + ROTL(ics.rf[i->src1_reg].i64, ics.rf[i->src2_reg].i8); return IA_NEXT; } int Translate_ROTATE_LEFT(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_ROTATE_LEFT_I8, - IntCode_ROTATE_LEFT_I16, - IntCode_ROTATE_LEFT_I32, - IntCode_ROTATE_LEFT_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_ROTATE_LEFT_I8, IntCode_ROTATE_LEFT_I16, IntCode_ROTATE_LEFT_I32, + IntCode_ROTATE_LEFT_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3450,19 +3549,15 @@ uint32_t IntCode_BYTE_SWAP_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; for (int n = 0; n < 4; n++) { - VECI4(dest,n) = XESWAP32(VECI4(src1,n)); + VECI4(dest, n) = XESWAP32(VECI4(src1, n)); } return IA_NEXT; } int Translate_BYTE_SWAP(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_BYTE_SWAP_I16, - IntCode_BYTE_SWAP_I32, - IntCode_BYTE_SWAP_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_BYTE_SWAP_V128, + IntCode_INVALID_TYPE, IntCode_BYTE_SWAP_I16, IntCode_BYTE_SWAP_I32, + IntCode_BYTE_SWAP_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_BYTE_SWAP_V128, }; return DispatchToC(ctx, i, fns[i->dest->type]); } @@ -3501,42 +3596,56 @@ uint32_t IntCode_CNTLZ_I64(IntCodeState& ics, const IntCode* i) { } int Translate_CNTLZ(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_CNTLZ_I8, - IntCode_CNTLZ_I16, - IntCode_CNTLZ_I32, - IntCode_CNTLZ_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_CNTLZ_I8, IntCode_CNTLZ_I16, IntCode_CNTLZ_I32, + IntCode_CNTLZ_I64, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } uint32_t IntCode_EXTRACT_INT8_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; - ics.rf[i->dest_reg].i8 = VECB16(src1,ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i8 = VECB16(src1, ics.rf[i->src2_reg].i8); return IA_NEXT; } uint32_t IntCode_EXTRACT_INT16_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; - ics.rf[i->dest_reg].i16 = VECS8(src1,ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i16 = VECS8(src1, ics.rf[i->src2_reg].i8); return IA_NEXT; } uint32_t IntCode_EXTRACT_INT32_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; - ics.rf[i->dest_reg].i32 = VECI4(src1,ics.rf[i->src2_reg].i8); + ics.rf[i->dest_reg].i32 = VECI4(src1, ics.rf[i->src2_reg].i8); return IA_NEXT; } int Translate_EXTRACT(TranslationContext& ctx, Instr* i) { // Can do more as needed. static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_EXTRACT_INT8_V128, IntCode_EXTRACT_INT16_V128, IntCode_EXTRACT_INT32_V128, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_EXTRACT_INT8_V128, IntCode_EXTRACT_INT16_V128, + IntCode_EXTRACT_INT32_V128, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -3548,7 +3657,7 @@ uint32_t IntCode_INSERT_INT8_V128(IntCodeState& ics, const IntCode* i) { const uint8_t part = ics.rf[i->src3_reg].i8; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t n = 0; n < 16; n++) { - VECB16(dest,n) = (n == offset) ? part : VECB16(src1,n); + VECB16(dest, n) = (n == offset) ? part : VECB16(src1, n); } return IA_NEXT; } @@ -3558,7 +3667,7 @@ uint32_t IntCode_INSERT_INT16_V128(IntCodeState& ics, const IntCode* i) { const uint16_t part = ics.rf[i->src3_reg].i16; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t n = 0; n < 8; n++) { - VECS8(dest,n) = (n == offset) ? part : VECS8(src1,n); + VECS8(dest, n) = (n == offset) ? part : VECS8(src1, n); } return IA_NEXT; } @@ -3568,20 +3677,38 @@ uint32_t IntCode_INSERT_INT32_V128(IntCodeState& ics, const IntCode* i) { const uint32_t part = ics.rf[i->src3_reg].i32; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t n = 0; n < 4; n++) { - VECI4(dest,n) = (n == offset) ? part : VECI4(src1,n); + VECI4(dest, n) = (n == offset) ? part : VECI4(src1, n); } return IA_NEXT; } int Translate_INSERT(TranslationContext& ctx, Instr* i) { // Can do more as needed. static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INSERT_INT8_V128, IntCode_INSERT_INT16_V128, IntCode_INSERT_INT32_V128, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INSERT_INT8_V128, IntCode_INSERT_INT16_V128, + IntCode_INSERT_INT32_V128, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->src3.value->type]; return DispatchToC(ctx, i, fn); @@ -3591,7 +3718,7 @@ uint32_t IntCode_SPLAT_V128_INT8(IntCodeState& ics, const IntCode* i) { int8_t src1 = ics.rf[i->src1_reg].i8; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t i = 0; i < 16; i++) { - VECB16(dest,i) = src1; + VECB16(dest, i) = src1; } return IA_NEXT; } @@ -3599,7 +3726,7 @@ uint32_t IntCode_SPLAT_V128_INT16(IntCodeState& ics, const IntCode* i) { int16_t src1 = ics.rf[i->src1_reg].i16; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t i = 0; i < 8; i++) { - VECS8(dest,i) = src1; + VECS8(dest, i) = src1; } return IA_NEXT; } @@ -3607,7 +3734,7 @@ uint32_t IntCode_SPLAT_V128_INT32(IntCodeState& ics, const IntCode* i) { int32_t src1 = ics.rf[i->src1_reg].i32; vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t i = 0; i < 4; i++) { - VECI4(dest,i) = src1; + VECI4(dest, i) = src1; } return IA_NEXT; } @@ -3622,13 +3749,31 @@ uint32_t IntCode_SPLAT_V128_FLOAT32(IntCodeState& ics, const IntCode* i) { int Translate_SPLAT(TranslationContext& ctx, Instr* i) { // Can do more as needed. static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_SPLAT_V128_INT8, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_SPLAT_V128_INT16, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_SPLAT_V128_INT32, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_SPLAT_V128_FLOAT32, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_SPLAT_V128_INT8, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_SPLAT_V128_INT16, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_SPLAT_V128_INT32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_SPLAT_V128_FLOAT32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -3641,9 +3786,7 @@ uint32_t IntCode_PERMUTE_V128_BY_INT32(IntCodeState& ics, const IntCode* i) { vec128_t& dest = ics.rf[i->dest_reg].v128; for (size_t i = 0; i < 4; i++) { size_t b = (table >> ((3 - i) * 8)) & 0x7; - VECI4(dest,i) = b < 4 ? - VECI4(src2,b) : - VECI4(src3,b-4); + VECI4(dest, i) = b < 4 ? VECI4(src2, b) : VECI4(src3, b - 4); } return IA_NEXT; } @@ -3654,23 +3797,40 @@ uint32_t IntCode_PERMUTE_V128_BY_V128(IntCodeState& ics, const IntCode* i) { vec128_t& dest = ics.rf[i->dest_reg].v128; dest.low = dest.high = 0; for (size_t n = 0; n < 16; n++) { - uint8_t index = VECB16(table,n) & 0x1F; - VECB16(dest,n) = index < 16 - ? VECB16(src2,index) - : VECB16(src3,index-16); + uint8_t index = VECB16(table, n) & 0x1F; + VECB16(dest, n) = + index < 16 ? VECB16(src2, index) : VECB16(src3, index - 16); } return IA_NEXT; } int Translate_PERMUTE(TranslationContext& ctx, Instr* i) { // Can do more as needed. static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_PERMUTE_V128_BY_INT32, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_PERMUTE_V128_BY_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_PERMUTE_V128_BY_INT32, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_PERMUTE_V128_BY_V128, }; IntCodeFn fn = fns[i->src1.value->type * MAX_TYPENAME + i->dest->type]; return DispatchToC(ctx, i, fn); @@ -3680,21 +3840,17 @@ uint32_t IntCode_SWIZZLE_V128(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; uint32_t swizzle_mask = ics.rf[i->src2_reg].u32; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECI4(dest,0) = VECI4(src1,(swizzle_mask >> 6) & 0x3); - VECI4(dest,1) = VECI4(src1,(swizzle_mask >> 4) & 0x3); - VECI4(dest,2) = VECI4(src1,(swizzle_mask >> 2) & 0x3); - VECI4(dest,3) = VECI4(src1,(swizzle_mask) & 0x3); + VECI4(dest, 0) = VECI4(src1, (swizzle_mask >> 6) & 0x3); + VECI4(dest, 1) = VECI4(src1, (swizzle_mask >> 4) & 0x3); + VECI4(dest, 2) = VECI4(src1, (swizzle_mask >> 2) & 0x3); + VECI4(dest, 3) = VECI4(src1, (swizzle_mask)&0x3); return IA_NEXT; } int Translate_SWIZZLE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_SWIZZLE_V128, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_SWIZZLE_V128, }; return DispatchToC(ctx, i, fns[i->src1.value->type]); } @@ -3708,9 +3864,7 @@ uint32_t IntCode_PACK_D3DCOLOR(IntCodeState& ics, const IntCode* i) { float g = roundf(((src1.y < 0) ? 0 : ((1 < src1.y) ? 1 : src1.y)) * 255); float b = roundf(((src1.z < 0) ? 0 : ((1 < src1.z) ? 1 : src1.z)) * 255); float a = roundf(((src1.w < 0) ? 0 : ((1 < src1.w) ? 1 : src1.w)) * 255); - dest.iw = ((uint32_t)a << 24) | - ((uint32_t)r << 16) | - ((uint32_t)g << 8) | + dest.iw = ((uint32_t)a << 24) | ((uint32_t)r << 16) | ((uint32_t)g << 8) | ((uint32_t)b); return IA_NEXT; } @@ -3754,14 +3908,9 @@ uint32_t IntCode_PACK_SHORT_2(IntCodeState& ics, const IntCode* i) { } int Translate_PACK(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_PACK_D3DCOLOR, - IntCode_PACK_FLOAT16_2, - IntCode_PACK_FLOAT16_4, - IntCode_PACK_SHORT_2, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_PACK_D3DCOLOR, IntCode_PACK_FLOAT16_2, IntCode_PACK_FLOAT16_4, + IntCode_PACK_SHORT_2, IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->flags]); } @@ -3813,63 +3962,59 @@ uint32_t IntCode_UNPACK_SHORT_2(IntCodeState& ics, const IntCode* i) { dest.f4[0] = 3.0f + ((float)sx / (float)(1 << 22)); dest.f4[1] = 3.0f + ((float)sy / (float)(1 << 22)); dest.f4[2] = 0.0f; - dest.f4[3] = 1.0f; // 3? + dest.f4[3] = 1.0f; // 3? return IA_NEXT; } uint32_t IntCode_UNPACK_S8_IN_16_LO(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECS8(dest,0) = (int16_t)(int8_t)VECB16(src1,8+0); - VECS8(dest,1) = (int16_t)(int8_t)VECB16(src1,8+1); - VECS8(dest,2) = (int16_t)(int8_t)VECB16(src1,8+2); - VECS8(dest,3) = (int16_t)(int8_t)VECB16(src1,8+3); - VECS8(dest,4) = (int16_t)(int8_t)VECB16(src1,8+4); - VECS8(dest,5) = (int16_t)(int8_t)VECB16(src1,8+5); - VECS8(dest,6) = (int16_t)(int8_t)VECB16(src1,8+6); - VECS8(dest,7) = (int16_t)(int8_t)VECB16(src1,8+7); + VECS8(dest, 0) = (int16_t)(int8_t)VECB16(src1, 8 + 0); + VECS8(dest, 1) = (int16_t)(int8_t)VECB16(src1, 8 + 1); + VECS8(dest, 2) = (int16_t)(int8_t)VECB16(src1, 8 + 2); + VECS8(dest, 3) = (int16_t)(int8_t)VECB16(src1, 8 + 3); + VECS8(dest, 4) = (int16_t)(int8_t)VECB16(src1, 8 + 4); + VECS8(dest, 5) = (int16_t)(int8_t)VECB16(src1, 8 + 5); + VECS8(dest, 6) = (int16_t)(int8_t)VECB16(src1, 8 + 6); + VECS8(dest, 7) = (int16_t)(int8_t)VECB16(src1, 8 + 7); return IA_NEXT; } uint32_t IntCode_UNPACK_S8_IN_16_HI(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECS8(dest,0) = (int16_t)(int8_t)VECB16(src1,0); - VECS8(dest,1) = (int16_t)(int8_t)VECB16(src1,1); - VECS8(dest,2) = (int16_t)(int8_t)VECB16(src1,2); - VECS8(dest,3) = (int16_t)(int8_t)VECB16(src1,3); - VECS8(dest,4) = (int16_t)(int8_t)VECB16(src1,4); - VECS8(dest,5) = (int16_t)(int8_t)VECB16(src1,5); - VECS8(dest,6) = (int16_t)(int8_t)VECB16(src1,6); - VECS8(dest,7) = (int16_t)(int8_t)VECB16(src1,7); + VECS8(dest, 0) = (int16_t)(int8_t)VECB16(src1, 0); + VECS8(dest, 1) = (int16_t)(int8_t)VECB16(src1, 1); + VECS8(dest, 2) = (int16_t)(int8_t)VECB16(src1, 2); + VECS8(dest, 3) = (int16_t)(int8_t)VECB16(src1, 3); + VECS8(dest, 4) = (int16_t)(int8_t)VECB16(src1, 4); + VECS8(dest, 5) = (int16_t)(int8_t)VECB16(src1, 5); + VECS8(dest, 6) = (int16_t)(int8_t)VECB16(src1, 6); + VECS8(dest, 7) = (int16_t)(int8_t)VECB16(src1, 7); return IA_NEXT; } uint32_t IntCode_UNPACK_S16_IN_32_LO(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECI4(dest,0) = (int32_t)(int16_t)VECS8(src1,4+0); - VECI4(dest,1) = (int32_t)(int16_t)VECS8(src1,4+1); - VECI4(dest,2) = (int32_t)(int16_t)VECS8(src1,4+2); - VECI4(dest,3) = (int32_t)(int16_t)VECS8(src1,4+3); + VECI4(dest, 0) = (int32_t)(int16_t)VECS8(src1, 4 + 0); + VECI4(dest, 1) = (int32_t)(int16_t)VECS8(src1, 4 + 1); + VECI4(dest, 2) = (int32_t)(int16_t)VECS8(src1, 4 + 2); + VECI4(dest, 3) = (int32_t)(int16_t)VECS8(src1, 4 + 3); return IA_NEXT; } uint32_t IntCode_UNPACK_S16_IN_32_HI(IntCodeState& ics, const IntCode* i) { const vec128_t& src1 = ics.rf[i->src1_reg].v128; vec128_t& dest = ics.rf[i->dest_reg].v128; - VECI4(dest,0) = (int32_t)(int16_t)VECS8(src1,0); - VECI4(dest,1) = (int32_t)(int16_t)VECS8(src1,1); - VECI4(dest,2) = (int32_t)(int16_t)VECS8(src1,2); - VECI4(dest,3) = (int32_t)(int16_t)VECS8(src1,3); + VECI4(dest, 0) = (int32_t)(int16_t)VECS8(src1, 0); + VECI4(dest, 1) = (int32_t)(int16_t)VECS8(src1, 1); + VECI4(dest, 2) = (int32_t)(int16_t)VECS8(src1, 2); + VECI4(dest, 3) = (int32_t)(int16_t)VECS8(src1, 3); return IA_NEXT; } int Translate_UNPACK(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_UNPACK_D3DCOLOR, - IntCode_UNPACK_FLOAT16_2, - IntCode_UNPACK_FLOAT16_4, - IntCode_UNPACK_SHORT_2, - IntCode_UNPACK_S8_IN_16_LO, - IntCode_UNPACK_S8_IN_16_HI, - IntCode_UNPACK_S16_IN_32_LO, - IntCode_UNPACK_S16_IN_32_HI, + IntCode_UNPACK_D3DCOLOR, IntCode_UNPACK_FLOAT16_2, + IntCode_UNPACK_FLOAT16_4, IntCode_UNPACK_SHORT_2, + IntCode_UNPACK_S8_IN_16_LO, IntCode_UNPACK_S8_IN_16_HI, + IntCode_UNPACK_S16_IN_32_LO, IntCode_UNPACK_S16_IN_32_HI, }; return DispatchToC(ctx, i, fns[i->flags]); } @@ -3890,136 +4035,70 @@ uint32_t IntCode_ATOMIC_EXCHANGE_I64(IntCodeState& ics, const IntCode* i) { } int Translate_ATOMIC_EXCHANGE(TranslationContext& ctx, Instr* i) { static IntCodeFn fns[] = { - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_ATOMIC_EXCHANGE_I32, - IntCode_ATOMIC_EXCHANGE_I64, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, - IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_ATOMIC_EXCHANGE_I32, IntCode_ATOMIC_EXCHANGE_I64, + IntCode_INVALID_TYPE, IntCode_INVALID_TYPE, + IntCode_INVALID_TYPE, }; return DispatchToC(ctx, i, fns[i->src2.value->type]); } typedef int (*TranslateFn)(TranslationContext& ctx, Instr* i); static const TranslateFn dispatch_table[] = { - Translate_COMMENT, - - Translate_NOP, - - Translate_SOURCE_OFFSET, - - Translate_DEBUG_BREAK, - Translate_DEBUG_BREAK_TRUE, - - Translate_TRAP, - Translate_TRAP_TRUE, - - Translate_CALL, - Translate_CALL_TRUE, - Translate_CALL_INDIRECT, - Translate_CALL_INDIRECT_TRUE, - Translate_CALL_EXTERN, - Translate_RETURN, - Translate_RETURN_TRUE, - Translate_SET_RETURN_ADDRESS, - - Translate_BRANCH, - Translate_BRANCH_TRUE, - Translate_BRANCH_FALSE, - - Translate_ASSIGN, - Translate_CAST, - Translate_ZERO_EXTEND, - Translate_SIGN_EXTEND, - Translate_TRUNCATE, - Translate_CONVERT, - Translate_ROUND, - Translate_VECTOR_CONVERT_I2F, - Translate_VECTOR_CONVERT_F2I, - - Translate_LOAD_VECTOR_SHL, - Translate_LOAD_VECTOR_SHR, - - Translate_LOAD_CLOCK, - - Translate_LOAD_LOCAL, - Translate_STORE_LOCAL, - - Translate_LOAD_CONTEXT, - Translate_STORE_CONTEXT, - - Translate_LOAD, - Translate_STORE, - Translate_PREFETCH, - - Translate_MAX, - Translate_MIN, - Translate_SELECT, - Translate_IS_TRUE, - Translate_IS_FALSE, - Translate_COMPARE_EQ, - Translate_COMPARE_NE, - Translate_COMPARE_SLT, - Translate_COMPARE_SLE, - Translate_COMPARE_SGT, - Translate_COMPARE_SGE, - Translate_COMPARE_ULT, - Translate_COMPARE_ULE, - Translate_COMPARE_UGT, - Translate_COMPARE_UGE, - Translate_DID_CARRY, - TranslateInvalid, //Translate_DID_OVERFLOW, - Translate_DID_SATURATE, - Translate_VECTOR_COMPARE_EQ, - Translate_VECTOR_COMPARE_SGT, - Translate_VECTOR_COMPARE_SGE, - Translate_VECTOR_COMPARE_UGT, - Translate_VECTOR_COMPARE_UGE, - - Translate_ADD, - Translate_ADD_CARRY, - Translate_VECTOR_ADD, - Translate_SUB, - Translate_MUL, - Translate_MUL_HI, - Translate_DIV, - Translate_MUL_ADD, - Translate_MUL_SUB, - Translate_NEG, - Translate_ABS, - Translate_SQRT, - Translate_RSQRT, - Translate_POW2, - Translate_LOG2, - Translate_DOT_PRODUCT_3, - Translate_DOT_PRODUCT_4, - - Translate_AND, - Translate_OR, - Translate_XOR, - Translate_NOT, - Translate_SHL, - Translate_VECTOR_SHL, - Translate_SHR, - Translate_VECTOR_SHR, - Translate_SHA, - Translate_VECTOR_SHA, - Translate_ROTATE_LEFT, - Translate_BYTE_SWAP, - Translate_CNTLZ, - Translate_INSERT, - Translate_EXTRACT, - Translate_SPLAT, - Translate_PERMUTE, - Translate_SWIZZLE, - Translate_PACK, - Translate_UNPACK, - - TranslateInvalid, //Translate_COMPARE_EXCHANGE, - Translate_ATOMIC_EXCHANGE, - TranslateInvalid, //Translate_ATOMIC_ADD, - TranslateInvalid, //Translate_ATOMIC_SUB, + Translate_COMMENT, Translate_NOP, + Translate_SOURCE_OFFSET, Translate_DEBUG_BREAK, + Translate_DEBUG_BREAK_TRUE, Translate_TRAP, + Translate_TRAP_TRUE, Translate_CALL, + Translate_CALL_TRUE, Translate_CALL_INDIRECT, + Translate_CALL_INDIRECT_TRUE, Translate_CALL_EXTERN, + Translate_RETURN, Translate_RETURN_TRUE, + Translate_SET_RETURN_ADDRESS, Translate_BRANCH, + Translate_BRANCH_TRUE, Translate_BRANCH_FALSE, + Translate_ASSIGN, Translate_CAST, + Translate_ZERO_EXTEND, Translate_SIGN_EXTEND, + Translate_TRUNCATE, Translate_CONVERT, + Translate_ROUND, Translate_VECTOR_CONVERT_I2F, + Translate_VECTOR_CONVERT_F2I, Translate_LOAD_VECTOR_SHL, + Translate_LOAD_VECTOR_SHR, Translate_LOAD_CLOCK, + Translate_LOAD_LOCAL, Translate_STORE_LOCAL, + Translate_LOAD_CONTEXT, Translate_STORE_CONTEXT, + Translate_LOAD, Translate_STORE, + Translate_PREFETCH, Translate_MAX, + Translate_MIN, Translate_SELECT, + Translate_IS_TRUE, Translate_IS_FALSE, + Translate_COMPARE_EQ, Translate_COMPARE_NE, + Translate_COMPARE_SLT, Translate_COMPARE_SLE, + Translate_COMPARE_SGT, Translate_COMPARE_SGE, + Translate_COMPARE_ULT, Translate_COMPARE_ULE, + Translate_COMPARE_UGT, Translate_COMPARE_UGE, + Translate_DID_CARRY, + TranslateInvalid, // Translate_DID_OVERFLOW, + Translate_DID_SATURATE, Translate_VECTOR_COMPARE_EQ, + Translate_VECTOR_COMPARE_SGT, Translate_VECTOR_COMPARE_SGE, + Translate_VECTOR_COMPARE_UGT, Translate_VECTOR_COMPARE_UGE, + Translate_ADD, Translate_ADD_CARRY, + Translate_VECTOR_ADD, Translate_SUB, + Translate_MUL, Translate_MUL_HI, + Translate_DIV, Translate_MUL_ADD, + Translate_MUL_SUB, Translate_NEG, + Translate_ABS, Translate_SQRT, + Translate_RSQRT, Translate_POW2, + Translate_LOG2, Translate_DOT_PRODUCT_3, + Translate_DOT_PRODUCT_4, Translate_AND, + Translate_OR, Translate_XOR, + Translate_NOT, Translate_SHL, + Translate_VECTOR_SHL, Translate_SHR, + Translate_VECTOR_SHR, Translate_SHA, + Translate_VECTOR_SHA, Translate_ROTATE_LEFT, + Translate_BYTE_SWAP, Translate_CNTLZ, + Translate_INSERT, Translate_EXTRACT, + Translate_SPLAT, Translate_PERMUTE, + Translate_SWIZZLE, Translate_PACK, + Translate_UNPACK, + TranslateInvalid, // Translate_COMPARE_EXCHANGE, + Translate_ATOMIC_EXCHANGE, + TranslateInvalid, // Translate_ATOMIC_ADD, + TranslateInvalid, // Translate_ATOMIC_SUB, }; int TranslateIntCodes(TranslationContext& ctx, Instr* i) { @@ -4027,7 +4106,6 @@ int TranslateIntCodes(TranslationContext& ctx, Instr* i) { return fn(ctx, i); } - } // namespace ivm } // namespace backend } // namespace alloy diff --git a/src/alloy/backend/ivm/ivm_intcode.h b/src/alloy/backend/ivm/ivm_intcode.h index 389ccbef2..bd982eef1 100644 --- a/src/alloy/backend/ivm/ivm_intcode.h +++ b/src/alloy/backend/ivm/ivm_intcode.h @@ -15,104 +15,96 @@ #include #include -namespace alloy { namespace runtime { class ThreadState; } } - +namespace alloy { +namespace runtime { +class ThreadState; +} +} namespace alloy { namespace backend { namespace ivm { - typedef union { - int8_t i8; - uint8_t u8; - int16_t i16; - uint16_t u16; - int32_t i32; - uint32_t u32; - int64_t i64; - uint64_t u64; - float f32; - double f64; - vec128_t v128; + int8_t i8; + uint8_t u8; + int16_t i16; + uint16_t u16; + int32_t i32; + uint32_t u32; + int64_t i64; + uint64_t u64; + float f32; + double f64; + vec128_t v128; } Register; - typedef struct { - Register* rf; - uint8_t* locals; - uint8_t* context; - uint8_t* membase; - uint8_t* page_table; - int8_t did_carry; - int8_t did_saturate; + Register* rf; + uint8_t* locals; + uint8_t* context; + uint8_t* membase; + uint8_t* page_table; + int8_t did_carry; + int8_t did_saturate; runtime::ThreadState* thread_state; - uint64_t return_address; - uint64_t call_return_address; + uint64_t return_address; + uint64_t call_return_address; } IntCodeState; - struct IntCode_s; -typedef uint32_t (*IntCodeFn)( - IntCodeState& ics, const struct IntCode_s* i); +typedef uint32_t (*IntCodeFn)(IntCodeState& ics, const struct IntCode_s* i); #define IA_RETURN 0xA0000000 -#define IA_NEXT 0xB0000000 - +#define IA_NEXT 0xB0000000 typedef struct IntCode_s { IntCodeFn intcode_fn; - uint16_t flags; - uint16_t debug_flags; + uint16_t flags; + uint16_t debug_flags; - uint32_t dest_reg; + uint32_t dest_reg; union { struct { - uint32_t src1_reg; - uint32_t src2_reg; - uint32_t src3_reg; + uint32_t src1_reg; + uint32_t src2_reg; + uint32_t src3_reg; // <4 bytes available> }; struct { - Register constant; + Register constant; }; }; // debugging info/etc } IntCode; - typedef struct LabelRef_s { hir::Label* label; - IntCode* instr; + IntCode* instr; LabelRef_s* next; } LabelRef; - typedef struct SourceMapEntry_s { - uint64_t source_offset; - uint64_t intcode_index; + uint64_t source_offset; + uint64_t intcode_index; } SourceMapEntry; - typedef struct { - uint32_t register_count; - size_t intcode_count; - Arena* intcode_arena; - size_t source_map_count; - Arena* source_map_arena; - Arena* scratch_arena; + uint32_t register_count; + size_t intcode_count; + Arena* intcode_arena; + size_t source_map_count; + Arena* source_map_arena; + Arena* scratch_arena; LabelRef* label_ref_head; - size_t stack_size; + size_t stack_size; } TranslationContext; - int TranslateIntCodes(TranslationContext& ctx, hir::Instr* i); - } // namespace ivm } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_IVM_INTCODE_H_ diff --git a/src/alloy/backend/ivm/ivm_stack.cc b/src/alloy/backend/ivm/ivm_stack.cc index 4adb8c158..62eb85e20 100644 --- a/src/alloy/backend/ivm/ivm_stack.cc +++ b/src/alloy/backend/ivm/ivm_stack.cc @@ -9,15 +9,12 @@ #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::ivm; +namespace alloy { +namespace backend { +namespace ivm { - -IVMStack::IVMStack() : - chunk_size_(2 * 1024 * 1024), - head_chunk_(NULL), active_chunk_(NULL) { -} +IVMStack::IVMStack() + : chunk_size_(2 * 1024 * 1024), head_chunk_(NULL), active_chunk_(NULL) {} IVMStack::~IVMStack() { Chunk* chunk = head_chunk_; @@ -35,7 +32,7 @@ Register* IVMStack::Alloc(size_t register_count) { if (active_chunk_->capacity - active_chunk_->offset < size) { Chunk* next = active_chunk_->next; if (!next) { - XEASSERT(size < chunk_size_); // need to support larger chunks + XEASSERT(size < chunk_size_); // need to support larger chunks next = new Chunk(chunk_size_); next->prev = active_chunk_; active_chunk_->next = next; @@ -66,9 +63,8 @@ void IVMStack::Free(size_t register_count) { } } -IVMStack::Chunk::Chunk(size_t chunk_size) : - prev(NULL), next(NULL), - capacity(chunk_size), buffer(0), offset(0) { +IVMStack::Chunk::Chunk(size_t chunk_size) + : prev(NULL), next(NULL), capacity(chunk_size), buffer(0), offset(0) { buffer = (uint8_t*)xe_malloc(capacity); } @@ -77,3 +73,7 @@ IVMStack::Chunk::~Chunk() { xe_free(buffer); } } + +} // namespace ivm +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/ivm/ivm_stack.h b/src/alloy/backend/ivm/ivm_stack.h index f2e955265..1d447ffc7 100644 --- a/src/alloy/backend/ivm/ivm_stack.h +++ b/src/alloy/backend/ivm/ivm_stack.h @@ -14,44 +14,40 @@ #include - namespace alloy { namespace backend { namespace ivm { - class IVMStack { -public: + public: IVMStack(); ~IVMStack(); Register* Alloc(size_t register_count); void Free(size_t register_count); -private: + private: class Chunk { - public: + public: Chunk(size_t chunk_size); ~Chunk(); - Chunk* prev; - Chunk* next; + Chunk* prev; + Chunk* next; - size_t capacity; - uint8_t* buffer; - size_t offset; + size_t capacity; + uint8_t* buffer; + size_t offset; }; -private: - size_t chunk_size_; - Chunk* head_chunk_; - Chunk* active_chunk_; + private: + size_t chunk_size_; + Chunk* head_chunk_; + Chunk* active_chunk_; }; - } // namespace ivm } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_IVM_IVM_STACK_H_ diff --git a/src/alloy/backend/ivm/tracing.h b/src/alloy/backend/ivm/tracing.h index 526aa912e..bf48319ae 100644 --- a/src/alloy/backend/ivm/tracing.h +++ b/src/alloy/backend/ivm/tracing.h @@ -12,24 +12,20 @@ #include - namespace alloy { namespace backend { namespace ivm { -const uint32_t ALLOY_BACKEND_IVM = - alloy::backend::EventType::ALLOY_BACKEND_IVM; - +const uint32_t ALLOY_BACKEND_IVM = alloy::backend::EventType::ALLOY_BACKEND_IVM; class EventType { -public: + public: enum { - ALLOY_BACKEND_IVM_INIT = ALLOY_BACKEND_IVM | (1), - ALLOY_BACKEND_IVM_DEINIT = ALLOY_BACKEND_IVM | (2), - - ALLOY_BACKEND_IVM_ASSEMBLER = ALLOY_BACKEND_IVM | (1 << 20), - ALLOY_BACKEND_IVM_ASSEMBLER_INIT = ALLOY_BACKEND_IVM_ASSEMBLER | (1), - ALLOY_BACKEND_IVM_ASSEMBLER_DEINIT = ALLOY_BACKEND_IVM_ASSEMBLER | (2), + ALLOY_BACKEND_IVM_INIT = ALLOY_BACKEND_IVM | (1), + ALLOY_BACKEND_IVM_DEINIT = ALLOY_BACKEND_IVM | (2), + ALLOY_BACKEND_IVM_ASSEMBLER = ALLOY_BACKEND_IVM | (1 << 20), + ALLOY_BACKEND_IVM_ASSEMBLER_INIT = ALLOY_BACKEND_IVM_ASSEMBLER | (1), + ALLOY_BACKEND_IVM_ASSEMBLER_DEINIT = ALLOY_BACKEND_IVM_ASSEMBLER | (2), }; typedef struct Init_s { @@ -47,10 +43,8 @@ public: } AssemblerDeinit; }; - } // namespace ivm } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_IVM_TRACING_H_ diff --git a/src/alloy/backend/machine_info.h b/src/alloy/backend/machine_info.h index 2aa7add22..d041489e4 100644 --- a/src/alloy/backend/machine_info.h +++ b/src/alloy/backend/machine_info.h @@ -12,11 +12,9 @@ #include - namespace alloy { namespace backend { - struct MachineInfo { struct RegisterSet { enum Types { @@ -31,9 +29,7 @@ struct MachineInfo { } register_sets[8]; }; - } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_MACHINE_INFO_H_ diff --git a/src/alloy/backend/tracing.h b/src/alloy/backend/tracing.h index 5aca2bd80..a7a8c934c 100644 --- a/src/alloy/backend/tracing.h +++ b/src/alloy/backend/tracing.h @@ -13,24 +13,20 @@ #include #include - namespace alloy { namespace backend { const uint32_t ALLOY_BACKEND = alloy::tracing::EventType::ALLOY_BACKEND; - class EventType { -public: + public: enum { - ALLOY_BACKEND_IVM = ALLOY_BACKEND | (1 << 24), - ALLOY_BACKEND_X64 = ALLOY_BACKEND | (2 << 24), + ALLOY_BACKEND_IVM = ALLOY_BACKEND | (1 << 24), + ALLOY_BACKEND_X64 = ALLOY_BACKEND | (2 << 24), }; }; - } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_TRACING_H_ diff --git a/src/alloy/backend/x64/tracing.h b/src/alloy/backend/x64/tracing.h index e6689b830..5045f93f5 100644 --- a/src/alloy/backend/x64/tracing.h +++ b/src/alloy/backend/x64/tracing.h @@ -12,24 +12,20 @@ #include - namespace alloy { namespace backend { namespace x64 { -const uint32_t ALLOY_BACKEND_X64 = - alloy::backend::EventType::ALLOY_BACKEND_X64; - +const uint32_t ALLOY_BACKEND_X64 = alloy::backend::EventType::ALLOY_BACKEND_X64; class EventType { -public: + public: enum { - ALLOY_BACKEND_X64_INIT = ALLOY_BACKEND_X64 | (1), - ALLOY_BACKEND_X64_DEINIT = ALLOY_BACKEND_X64 | (2), - - ALLOY_BACKEND_X64_ASSEMBLER = ALLOY_BACKEND_X64 | (1 << 20), - ALLOY_BACKEND_X64_ASSEMBLER_INIT = ALLOY_BACKEND_X64_ASSEMBLER | (1), - ALLOY_BACKEND_X64_ASSEMBLER_DEINIT = ALLOY_BACKEND_X64_ASSEMBLER | (2), + ALLOY_BACKEND_X64_INIT = ALLOY_BACKEND_X64 | (1), + ALLOY_BACKEND_X64_DEINIT = ALLOY_BACKEND_X64 | (2), + ALLOY_BACKEND_X64_ASSEMBLER = ALLOY_BACKEND_X64 | (1 << 20), + ALLOY_BACKEND_X64_ASSEMBLER_INIT = ALLOY_BACKEND_X64_ASSEMBLER | (1), + ALLOY_BACKEND_X64_ASSEMBLER_DEINIT = ALLOY_BACKEND_X64_ASSEMBLER | (2), }; typedef struct Init_s { @@ -47,10 +43,8 @@ public: } AssemblerDeinit; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_TRACING_H_ diff --git a/src/alloy/backend/x64/x64_assembler.cc b/src/alloy/backend/x64/x64_assembler.cc index d70afe909..b274a7eca 100644 --- a/src/alloy/backend/x64/x64_assembler.cc +++ b/src/alloy/backend/x64/x64_assembler.cc @@ -21,22 +21,23 @@ namespace BE { #include } -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; -using namespace alloy::hir; +namespace alloy { +namespace backend { +namespace x64 { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::runtime; +using alloy::hir::HIRBuilder; +using alloy::runtime::DebugInfo; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; -X64Assembler::X64Assembler(X64Backend* backend) : - x64_backend_(backend), - emitter_(0), allocator_(0), - Assembler(backend) { -} +X64Assembler::X64Assembler(X64Backend* backend) + : x64_backend_(backend), emitter_(0), allocator_(0), Assembler(backend) {} X64Assembler::~X64Assembler() { - alloy::tracing::WriteEvent(EventType::AssemblerDeinit({ - })); + alloy::tracing::WriteEvent(EventType::AssemblerDeinit({})); delete emitter_; delete allocator_; @@ -51,8 +52,7 @@ int X64Assembler::Initialize() { allocator_ = new XbyakAllocator(); emitter_ = new X64Emitter(x64_backend_, allocator_); - alloy::tracing::WriteEvent(EventType::AssemblerInit({ - })); + alloy::tracing::WriteEvent(EventType::AssemblerInit({})); return result; } @@ -62,10 +62,9 @@ void X64Assembler::Reset() { Assembler::Reset(); } -int X64Assembler::Assemble( - FunctionInfo* symbol_info, HIRBuilder* builder, - uint32_t debug_info_flags, DebugInfo* debug_info, - Function** out_function) { +int X64Assembler::Assemble(FunctionInfo* symbol_info, HIRBuilder* builder, + uint32_t debug_info_flags, DebugInfo* debug_info, + Function** out_function) { SCOPE_profile_cpu_f("alloy"); int result = 0; @@ -73,13 +72,12 @@ int X64Assembler::Assemble( // Lower HIR -> x64. void* machine_code = 0; size_t code_size = 0; - result = emitter_->Emit(builder, - debug_info_flags, debug_info, - machine_code, code_size); + result = emitter_->Emit(builder, debug_info_flags, debug_info, machine_code, + code_size); XEEXPECTZERO(result); // Stash generated machine code. - if (debug_info_flags & DEBUG_INFO_MACHINE_CODE_DISASM) { + if (debug_info_flags & DebugInfoFlags::DEBUG_INFO_MACHINE_CODE_DISASM) { DumpMachineCode(debug_info, machine_code, code_size, &string_buffer_); debug_info->set_machine_code_disasm(string_buffer_.ToString()); string_buffer_.Reset(); @@ -100,10 +98,8 @@ XECLEANUP: return result; } -void X64Assembler::DumpMachineCode( - DebugInfo* debug_info, - void* machine_code, size_t code_size, - StringBuffer* str) { +void X64Assembler::DumpMachineCode(DebugInfo* debug_info, void* machine_code, + size_t code_size, StringBuffer* str) { BE::DISASM disasm; xe_zero_struct(&disasm, sizeof(disasm)); disasm.Archi = 64; @@ -113,8 +109,8 @@ void X64Assembler::DumpMachineCode( uint64_t prev_source_offset = 0; while (disasm.EIP < eip_end) { // Look up source offset. - auto map_entry = debug_info->LookupCodeOffset( - disasm.EIP - (BE::UIntPtr)machine_code); + auto map_entry = + debug_info->LookupCodeOffset(disasm.EIP - (BE::UIntPtr)machine_code); if (map_entry) { if (map_entry->source_offset == prev_source_offset) { str->Append(" "); @@ -134,3 +130,7 @@ void X64Assembler::DumpMachineCode( disasm.EIP += len; } } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_assembler.h b/src/alloy/backend/x64/x64_assembler.h index 063e19c63..6cbf0c02c 100644 --- a/src/alloy/backend/x64/x64_assembler.h +++ b/src/alloy/backend/x64/x64_assembler.h @@ -14,7 +14,6 @@ #include - namespace alloy { namespace backend { namespace x64 { @@ -23,9 +22,8 @@ class X64Backend; class X64Emitter; class XbyakAllocator; - class X64Assembler : public Assembler { -public: + public: X64Assembler(X64Backend* backend); virtual ~X64Assembler(); @@ -33,28 +31,25 @@ public: virtual void Reset(); - virtual int Assemble( - runtime::FunctionInfo* symbol_info, hir::HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - runtime::Function** out_function); + virtual int Assemble(runtime::FunctionInfo* symbol_info, + hir::HIRBuilder* builder, uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, + runtime::Function** out_function); -private: - void DumpMachineCode(runtime::DebugInfo* debug_info, - void* machine_code, size_t code_size, - StringBuffer* str); + private: + void DumpMachineCode(runtime::DebugInfo* debug_info, void* machine_code, + size_t code_size, StringBuffer* str); -private: - X64Backend* x64_backend_; - X64Emitter* emitter_; - XbyakAllocator* allocator_; + private: + X64Backend* x64_backend_; + X64Emitter* emitter_; + XbyakAllocator* allocator_; - StringBuffer string_buffer_; + StringBuffer string_buffer_; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_ASSEMBLER_H_ diff --git a/src/alloy/backend/x64/x64_backend.cc b/src/alloy/backend/x64/x64_backend.cc index 40283f6d2..3ec784599 100644 --- a/src/alloy/backend/x64/x64_backend.cc +++ b/src/alloy/backend/x64/x64_backend.cc @@ -15,20 +15,16 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +namespace x64 { +using alloy::runtime::Runtime; -X64Backend::X64Backend(Runtime* runtime) : - code_cache_(0), - Backend(runtime) { -} +X64Backend::X64Backend(Runtime* runtime) : code_cache_(0), Backend(runtime) {} X64Backend::~X64Backend() { - alloy::tracing::WriteEvent(EventType::Deinit({ - })); + alloy::tracing::WriteEvent(EventType::Deinit({})); delete code_cache_; } @@ -41,17 +37,12 @@ int X64Backend::Initialize() { RegisterSequences(); machine_info_.register_sets[0] = { - 0, - "gpr", - MachineInfo::RegisterSet::INT_TYPES, - X64Emitter::GPR_COUNT, + 0, "gpr", MachineInfo::RegisterSet::INT_TYPES, X64Emitter::GPR_COUNT, }; machine_info_.register_sets[1] = { - 1, - "xmm", - MachineInfo::RegisterSet::FLOAT_TYPES | - MachineInfo::RegisterSet::VEC_TYPES, - X64Emitter::XMM_COUNT, + 1, "xmm", MachineInfo::RegisterSet::FLOAT_TYPES | + MachineInfo::RegisterSet::VEC_TYPES, + X64Emitter::XMM_COUNT, }; code_cache_ = new X64CodeCache(); @@ -67,12 +58,13 @@ int X64Backend::Initialize() { delete thunk_emitter; delete allocator; - alloy::tracing::WriteEvent(EventType::Init({ - })); + alloy::tracing::WriteEvent(EventType::Init({})); return result; } -Assembler* X64Backend::CreateAssembler() { - return new X64Assembler(this); -} +Assembler* X64Backend::CreateAssembler() { return new X64Assembler(this); } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_backend.h b/src/alloy/backend/x64/x64_backend.h index 0ff3018cd..f0ebfdd2a 100644 --- a/src/alloy/backend/x64/x64_backend.h +++ b/src/alloy/backend/x64/x64_backend.h @@ -14,22 +14,19 @@ #include - namespace alloy { namespace backend { namespace x64 { class X64CodeCache; - #define ALLOY_HAS_X64_BACKEND 1 - typedef void* (*HostToGuestThunk)(void* target, void* arg0, void* arg1); typedef void* (*GuestToHostThunk)(void* target, void* arg0, void* arg1); class X64Backend : public Backend { -public: + public: X64Backend(runtime::Runtime* runtime); virtual ~X64Backend(); @@ -41,16 +38,14 @@ public: virtual Assembler* CreateAssembler(); -private: + private: X64CodeCache* code_cache_; HostToGuestThunk host_to_guest_thunk_; GuestToHostThunk guest_to_host_thunk_; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_BACKEND_H_ diff --git a/src/alloy/backend/x64/x64_code_cache.cc b/src/alloy/backend/x64/x64_code_cache.cc index 057fd771a..b3ea120c8 100644 --- a/src/alloy/backend/x64/x64_code_cache.cc +++ b/src/alloy/backend/x64/x64_code_cache.cc @@ -11,24 +11,20 @@ #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; - - namespace alloy { namespace backend { namespace x64 { class X64CodeChunk { -public: + public: X64CodeChunk(size_t chunk_size); ~X64CodeChunk(); -public: + + public: X64CodeChunk* next; - size_t capacity; - uint8_t* buffer; - size_t offset; + size_t capacity; + uint8_t* buffer; + size_t offset; // Estimate of function sized use to determine initial table capacity. const static uint32_t ESTIMATED_FN_SIZE = 512; @@ -36,24 +32,16 @@ public: // TODO(benvanik): move this to emitter. const static uint32_t UNWIND_INFO_SIZE = 4 + (2 * 1 + 2 + 2); - void* fn_table_handle; + void* fn_table_handle; RUNTIME_FUNCTION* fn_table; - uint32_t fn_table_count; - uint32_t fn_table_capacity; + uint32_t fn_table_count; + uint32_t fn_table_capacity; void AddTableEntry(uint8_t* code, size_t code_size, size_t stack_size); }; - -} // namespace x64 -} // namespace backend -} // namespace alloy - - -X64CodeCache::X64CodeCache(size_t chunk_size) : - chunk_size_(chunk_size), - head_chunk_(NULL), active_chunk_(NULL) { -} +X64CodeCache::X64CodeCache(size_t chunk_size) + : chunk_size_(chunk_size), head_chunk_(NULL), active_chunk_(NULL) {} X64CodeCache::~X64CodeCache() { std::lock_guard guard(lock_); @@ -66,9 +54,7 @@ X64CodeCache::~X64CodeCache() { head_chunk_ = NULL; } -int X64CodeCache::Initialize() { - return 0; -} +int X64CodeCache::Initialize() { return 0; } void* X64CodeCache::PlaceCode(void* machine_code, size_t code_size, size_t stack_size) { @@ -87,7 +73,7 @@ void* X64CodeCache::PlaceCode(void* machine_code, size_t code_size, if (active_chunk_->capacity - active_chunk_->offset < code_size) { auto next = active_chunk_->next; if (!next) { - XEASSERT(code_size < chunk_size_); // need to support larger chunks + XEASSERT(code_size < chunk_size_); // need to support larger chunks next = new X64CodeChunk(chunk_size_); active_chunk_->next = next; } @@ -113,25 +99,19 @@ void* X64CodeCache::PlaceCode(void* machine_code, size_t code_size, return final_address; } -X64CodeChunk::X64CodeChunk(size_t chunk_size) : - next(NULL), - capacity(chunk_size), buffer(0), offset(0) { - buffer = (uint8_t*)VirtualAlloc( - NULL, capacity, - MEM_RESERVE | MEM_COMMIT, - PAGE_EXECUTE_READWRITE); +X64CodeChunk::X64CodeChunk(size_t chunk_size) + : next(NULL), capacity(chunk_size), buffer(0), offset(0) { + buffer = (uint8_t*)VirtualAlloc(NULL, capacity, MEM_RESERVE | MEM_COMMIT, + PAGE_EXECUTE_READWRITE); fn_table_capacity = (uint32_t)XEROUNDUP(capacity / ESTIMATED_FN_SIZE, 16); size_t table_size = fn_table_capacity * sizeof(RUNTIME_FUNCTION); fn_table = (RUNTIME_FUNCTION*)xe_malloc(table_size); fn_table_count = 0; fn_table_handle = 0; - RtlAddGrowableFunctionTable( - &fn_table_handle, - fn_table, - fn_table_count, - fn_table_capacity, - (ULONG_PTR)buffer, (ULONG_PTR)buffer + capacity); + RtlAddGrowableFunctionTable(&fn_table_handle, fn_table, fn_table_count, + fn_table_capacity, (ULONG_PTR)buffer, + (ULONG_PTR)buffer + capacity); } X64CodeChunk::~X64CodeChunk() { @@ -157,7 +137,7 @@ typedef enum _UNWIND_OP_CODES { UWOP_PUSH_MACHFRAME /* info == 0: no error-code, 1: error-code */ } UNWIND_CODE_OPS; class UNWIND_REGISTER { -public: + public: enum _ { RAX = 0, RCX = 1, @@ -182,25 +162,25 @@ typedef union _UNWIND_CODE { struct { uint8_t CodeOffset; uint8_t UnwindOp : 4; - uint8_t OpInfo : 4; + uint8_t OpInfo : 4; }; USHORT FrameOffset; } UNWIND_CODE, *PUNWIND_CODE; typedef struct _UNWIND_INFO { - uint8_t Version : 3; - uint8_t Flags : 5; + uint8_t Version : 3; + uint8_t Flags : 5; uint8_t SizeOfProlog; uint8_t CountOfCodes; uint8_t FrameRegister : 4; - uint8_t FrameOffset : 4; + uint8_t FrameOffset : 4; UNWIND_CODE UnwindCode[1]; -/* UNWIND_CODE MoreUnwindCode[((CountOfCodes + 1) & ~1) - 1]; -* union { -* OPTIONAL ULONG ExceptionHandler; -* OPTIONAL ULONG FunctionEntry; -* }; -* OPTIONAL ULONG ExceptionData[]; */ + /* UNWIND_CODE MoreUnwindCode[((CountOfCodes + 1) & ~1) - 1]; + * union { + * OPTIONAL ULONG ExceptionHandler; + * OPTIONAL ULONG FunctionEntry; + * }; + * OPTIONAL ULONG ExceptionData[]; */ } UNWIND_INFO, *PUNWIND_INFO; } // namespace @@ -215,19 +195,17 @@ void X64CodeChunk::AddTableEntry(uint8_t* code, size_t code_size, RtlDeleteGrowableFunctionTable(fn_table_handle); size_t old_size = fn_table_capacity * sizeof(RUNTIME_FUNCTION); size_t new_size = old_size * 2; - auto new_table = (RUNTIME_FUNCTION*)xe_realloc(fn_table, old_size, new_size); + auto new_table = + (RUNTIME_FUNCTION*)xe_realloc(fn_table, old_size, new_size); XEASSERTNOTNULL(new_table); if (!new_table) { return; } fn_table = new_table; fn_table_capacity *= 2; - RtlAddGrowableFunctionTable( - &fn_table_handle, - fn_table, - fn_table_count, - fn_table_capacity, - (ULONG_PTR)buffer, (ULONG_PTR)buffer + capacity); + RtlAddGrowableFunctionTable(&fn_table_handle, fn_table, fn_table_count, + fn_table_capacity, (ULONG_PTR)buffer, + (ULONG_PTR)buffer + capacity); } // Allocate unwind data. We know we have space because we overallocated. @@ -261,7 +239,8 @@ void X64CodeChunk::AddTableEntry(uint8_t* code, size_t code_size, // http://msdn.microsoft.com/en-us/library/ck9asaa9.aspx size_t co = 0; auto& unwind_code = unwind_info->UnwindCode[co++]; - unwind_code.CodeOffset = 14; // end of instruction + 1 == offset of next instruction + unwind_code.CodeOffset = + 14; // end of instruction + 1 == offset of next instruction unwind_code.UnwindOp = UWOP_ALLOC_SMALL; unwind_code.OpInfo = stack_size / 8 - 1; } else { @@ -280,7 +259,8 @@ void X64CodeChunk::AddTableEntry(uint8_t* code, size_t code_size, // http://msdn.microsoft.com/en-us/library/ck9asaa9.aspx size_t co = 0; auto& unwind_code = unwind_info->UnwindCode[co++]; - unwind_code.CodeOffset = 7; // end of instruction + 1 == offset of next instruction + unwind_code.CodeOffset = + 7; // end of instruction + 1 == offset of next instruction unwind_code.UnwindOp = UWOP_ALLOC_LARGE; unwind_code.OpInfo = 0; unwind_code = unwind_info->UnwindCode[co++]; @@ -296,3 +276,7 @@ void X64CodeChunk::AddTableEntry(uint8_t* code, size_t code_size, // Notify the function table that it has new entries. RtlGrowFunctionTable(fn_table_handle, fn_table_count); } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_code_cache.h b/src/alloy/backend/x64/x64_code_cache.h index f51df94a9..8a0953f15 100644 --- a/src/alloy/backend/x64/x64_code_cache.h +++ b/src/alloy/backend/x64/x64_code_cache.h @@ -14,7 +14,6 @@ #include - namespace alloy { namespace backend { namespace x64 { @@ -22,7 +21,7 @@ namespace x64 { class X64CodeChunk; class X64CodeCache { -public: + public: X64CodeCache(size_t chunk_size = DEFAULT_CHUNK_SIZE); virtual ~X64CodeCache(); @@ -34,18 +33,16 @@ public: void* PlaceCode(void* machine_code, size_t code_size, size_t stack_size); -private: + private: const static size_t DEFAULT_CHUNK_SIZE = 4 * 1024 * 1024; - std::mutex lock_; - size_t chunk_size_; + std::mutex lock_; + size_t chunk_size_; X64CodeChunk* head_chunk_; X64CodeChunk* active_chunk_; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_CODE_CACHE_H_ diff --git a/src/alloy/backend/x64/x64_emitter.cc b/src/alloy/backend/x64/x64_emitter.cc index ab0d2123b..ee552c71a 100644 --- a/src/alloy/backend/x64/x64_emitter.cc +++ b/src/alloy/backend/x64/x64_emitter.cc @@ -20,18 +20,21 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; +namespace alloy { +namespace backend { +namespace x64 { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; using namespace alloy::runtime; using namespace Xbyak; - - -namespace alloy { -namespace backend { -namespace x64 { +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; +using alloy::runtime::SourceMapEntry; +using alloy::runtime::ThreadState; static const size_t MAX_CODE_SIZE = 1 * 1024 * 1024; @@ -42,41 +45,29 @@ static const size_t STASH_OFFSET = 32; // can get the value. #define STORE_EFLAGS 1 -} // namespace x64 -} // namespace backend -} // namespace alloy - - const uint32_t X64Emitter::gpr_reg_map_[X64Emitter::GPR_COUNT] = { - Operand::RBX, - Operand::R12, Operand::R13, Operand::R14, Operand::R15, + Operand::RBX, Operand::R12, Operand::R13, Operand::R14, Operand::R15, }; const uint32_t X64Emitter::xmm_reg_map_[X64Emitter::XMM_COUNT] = { - 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, }; +X64Emitter::X64Emitter(X64Backend* backend, XbyakAllocator* allocator) + : runtime_(backend->runtime()), + backend_(backend), + code_cache_(backend->code_cache()), + allocator_(allocator), + current_instr_(0), + CodeGenerator(MAX_CODE_SIZE, AutoGrow, allocator) {} -X64Emitter::X64Emitter(X64Backend* backend, XbyakAllocator* allocator) : - runtime_(backend->runtime()), - backend_(backend), - code_cache_(backend->code_cache()), - allocator_(allocator), - current_instr_(0), - CodeGenerator(MAX_CODE_SIZE, AutoGrow, allocator) { -} +X64Emitter::~X64Emitter() {} -X64Emitter::~X64Emitter() { -} +int X64Emitter::Initialize() { return 0; } -int X64Emitter::Initialize() { - return 0; -} - -int X64Emitter::Emit( - HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - void*& out_code_address, size_t& out_code_size) { +int X64Emitter::Emit(HIRBuilder* builder, uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, void*& out_code_address, + size_t& out_code_size) { SCOPE_profile_cpu_f("alloy"); // Reset. @@ -99,8 +90,7 @@ int X64Emitter::Emit( // Stash source map. if (debug_info_flags & DEBUG_INFO_SOURCE_MAP) { debug_info->InitializeSourceMap( - source_map_count_, - (SourceMapEntry*)source_map_arena_.CloneContents()); + source_map_count_, (SourceMapEntry*)source_map_arena_.CloneContents()); } return 0; @@ -158,7 +148,7 @@ int X64Emitter::Emit(HIRBuilder* builder, size_t& out_stack_size) { mov(qword[rsp + StackLayout::GUEST_RCX_HOME], rcx); mov(qword[rsp + StackLayout::GUEST_RET_ADDR], rdx); mov(qword[rsp + StackLayout::GUEST_CALL_RET_ADDR], 0); - mov(rdx, qword[rcx + 8]); // membase + mov(rdx, qword[rcx + 8]); // membase } // Body. @@ -208,9 +198,9 @@ int X64Emitter::Emit(HIRBuilder* builder, size_t& out_stack_size) { void X64Emitter::MarkSourceOffset(const Instr* i) { auto entry = source_map_arena_.Alloc(); - entry->source_offset = i->src1.offset; - entry->hir_offset = uint32_t(i->block->ordinal << 16) | i->ordinal; - entry->code_offset = getSize(); + entry->source_offset = i->src1.offset; + entry->hir_offset = uint32_t(i->block->ordinal << 16) | i->ordinal; + entry->code_offset = getSize(); source_map_count_++; } @@ -221,20 +211,20 @@ void X64Emitter::DebugBreak() { void X64Emitter::Trap(uint16_t trap_type) { switch (trap_type) { - case 20: - // 0x0FE00014 is a 'debug print' where r3 = buffer r4 = length - // TODO(benvanik): debug print at runtime. - break; - case 0: - case 22: - // Always trap? - // TODO(benvanik): post software interrupt to debugger. - db(0xCC); - break; - default: - XELOGW("Unknown trap type %d", trap_type); - db(0xCC); - break; + case 20: + // 0x0FE00014 is a 'debug print' where r3 = buffer r4 = length + // TODO(benvanik): debug print at runtime. + break; + case 0: + case 22: + // Always trap? + // TODO(benvanik): post software interrupt to debugger. + db(0xCC); + break; + default: + XELOGW("Unknown trap type %d", trap_type); + db(0xCC); + break; } } @@ -258,7 +248,8 @@ const size_t ASM_OFFSET = 2 + 2 + 8 + 2 + 8; // 6 bytes 66 NOP DWORD ptr [EAX + EAX*1 + 00H] 66 0F 1F 44 00 00H // 7 bytes NOP DWORD ptr [EAX + 00000000H] 0F 1F 80 00 00 00 00H // 8 bytes NOP DWORD ptr [EAX + EAX*1 + 00000000H] 0F 1F 84 00 00 00 00 00H -// 9 bytes 66 NOP DWORD ptr [EAX + EAX*1 + 00000000H] 66 0F 1F 84 00 00 00 00 00H +// 9 bytes 66 NOP DWORD ptr [EAX + EAX*1 + 00000000H] 66 0F 1F 84 00 00 00 00 +// 00H uint64_t ResolveFunctionSymbol(void* raw_context, uint64_t symbol_info_ptr) { // TODO(benvanik): generate this thunk at runtime? or a shim? @@ -275,7 +266,7 @@ uint64_t ResolveFunctionSymbol(void* raw_context, uint64_t symbol_info_ptr) { // Overwrite the call site. // The return address points to ReloadRCX work after the call. uint64_t return_address = reinterpret_cast(_ReturnAddress()); - #pragma pack(push, 1) +#pragma pack(push, 1) struct Asm { uint16_t mov_rax; uint64_t rax_constant; @@ -284,7 +275,7 @@ uint64_t ResolveFunctionSymbol(void* raw_context, uint64_t symbol_info_ptr) { uint16_t call_rax; uint8_t mov_rcx[5]; }; - #pragma pack(pop) +#pragma pack(pop) Asm* code = reinterpret_cast(return_address - ASM_OFFSET); code->rax_constant = addr; code->call_rax = 0x9066; @@ -293,7 +284,8 @@ uint64_t ResolveFunctionSymbol(void* raw_context, uint64_t symbol_info_ptr) { return addr; } -void X64Emitter::Call(const hir::Instr* instr, runtime::FunctionInfo* symbol_info) { +void X64Emitter::Call(const hir::Instr* instr, + runtime::FunctionInfo* symbol_info) { auto fn = reinterpret_cast(symbol_info->function()); // Resolve address to the function to call and store in rax. // TODO(benvanik): caching/etc. For now this makes debugging easier. @@ -372,12 +364,12 @@ void X64Emitter::CallIndirect(const hir::Instr* instr, const Reg64& reg) { uint64_t UndefinedCallExtern(void* raw_context, uint64_t symbol_info_ptr) { auto symbol_info = reinterpret_cast(symbol_info_ptr); - XELOGW("undefined extern call to %.8X %s", - symbol_info->address(), + XELOGW("undefined extern call to %.8X %s", symbol_info->address(), symbol_info->name()); return 0; } -void X64Emitter::CallExtern(const hir::Instr* instr, const FunctionInfo* symbol_info) { +void X64Emitter::CallExtern(const hir::Instr* instr, + const FunctionInfo* symbol_info) { XEASSERT(symbol_info->behavior() == FunctionInfo::BEHAVIOR_EXTERN); if (!symbol_info->extern_handler()) { CallNative(UndefinedCallExtern, reinterpret_cast(symbol_info)); @@ -405,21 +397,22 @@ void X64Emitter::CallNative(void* fn) { ReloadEDX(); } -void X64Emitter::CallNative(uint64_t(*fn)(void* raw_context)) { +void X64Emitter::CallNative(uint64_t (*fn)(void* raw_context)) { mov(rax, reinterpret_cast(fn)); call(rax); ReloadECX(); ReloadEDX(); } -void X64Emitter::CallNative(uint64_t(*fn)(void* raw_context, uint64_t arg0)) { +void X64Emitter::CallNative(uint64_t (*fn)(void* raw_context, uint64_t arg0)) { mov(rax, reinterpret_cast(fn)); call(rax); ReloadECX(); ReloadEDX(); } -void X64Emitter::CallNative(uint64_t(*fn)(void* raw_context, uint64_t arg0), uint64_t arg0) { +void X64Emitter::CallNative(uint64_t (*fn)(void* raw_context, uint64_t arg0), + uint64_t arg0) { mov(rdx, arg0); mov(rax, reinterpret_cast(fn)); call(rax); @@ -428,17 +421,17 @@ void X64Emitter::CallNative(uint64_t(*fn)(void* raw_context, uint64_t arg0), uin } void X64Emitter::CallNativeSafe(void* fn) { - // rcx = context - // rdx = target host function - // r8 = arg0 - // r9 = arg1 - mov(rdx, reinterpret_cast(fn)); - auto thunk = backend()->guest_to_host_thunk(); - mov(rax, reinterpret_cast(thunk)); - call(rax); - ReloadECX(); - ReloadEDX(); - // rax = host return + // rcx = context + // rdx = target host function + // r8 = arg0 + // r9 = arg1 + mov(rdx, reinterpret_cast(fn)); + auto thunk = backend()->guest_to_host_thunk(); + mov(rax, reinterpret_cast(thunk)); + call(rax); + ReloadECX(); + ReloadEDX(); + // rax = host return } void X64Emitter::SetReturnAddress(uint64_t value) { @@ -450,7 +443,7 @@ void X64Emitter::ReloadECX() { } void X64Emitter::ReloadEDX() { - mov(rdx, qword[rcx + 8]); // membase + mov(rdx, qword[rcx + 8]); // membase } void X64Emitter::LoadEflags() { @@ -459,7 +452,7 @@ void X64Emitter::LoadEflags() { push(rax); popf(); #else - // EFLAGS already present. +// EFLAGS already present. #endif // STORE_EFLAGS } @@ -468,8 +461,8 @@ void X64Emitter::StoreEflags() { pushf(); pop(qword[rsp + STASH_OFFSET]); #else - // EFLAGS should have CA set? - // (so long as we don't fuck with it) +// EFLAGS should have CA set? +// (so long as we don't fuck with it) #endif // STORE_EFLAGS } @@ -511,32 +504,51 @@ void X64Emitter::MovMem64(const RegExp& addr, uint64_t v) { Address X64Emitter::GetXmmConstPtr(XmmConst id) { static const vec128_t xmm_consts[] = { - /* XMMZero */ vec128f(0.0f, 0.0f, 0.0f, 0.0f), - /* XMMOne */ vec128f(1.0f, 1.0f, 1.0f, 1.0f), - /* XMMNegativeOne */ vec128f(-1.0f, -1.0f, -1.0f, -1.0f), - /* XMMMaskX16Y16 */ vec128i(0x0000FFFFu, 0xFFFF0000u, 0x00000000u, 0x00000000u), - /* XMMFlipX16Y16 */ vec128i(0x00008000u, 0x00000000u, 0x00000000u, 0x00000000u), - /* XMMFixX16Y16 */ vec128f(-32768.0f, 0.0f, 0.0f, 0.0f), - /* XMMNormalizeX16Y16 */ vec128f(1.0f / 32767.0f, 1.0f / (32767.0f * 65536.0f), 0.0f, 0.0f), - /* XMM0001 */ vec128f(0.0f, 0.0f, 0.0f, 1.0f), - /* XMM3301 */ vec128f(3.0f, 3.0f, 0.0f, 1.0f), - /* XMMSignMaskPS */ vec128i(0x80000000u, 0x80000000u, 0x80000000u, 0x80000000u), - /* XMMSignMaskPD */ vec128i(0x00000000u, 0x80000000u, 0x00000000u, 0x80000000u), - /* XMMAbsMaskPS */ vec128i(0x7FFFFFFFu, 0x7FFFFFFFu, 0x7FFFFFFFu, 0x7FFFFFFFu), - /* XMMAbsMaskPD */ vec128i(0xFFFFFFFFu, 0x7FFFFFFFu, 0xFFFFFFFFu, 0x7FFFFFFFu), - /* XMMByteSwapMask */ vec128i(0x00010203u, 0x04050607u, 0x08090A0Bu, 0x0C0D0E0Fu), - /* XMMPermuteControl15 */ vec128b(15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15), - /* XMMPackD3DCOLOR */ vec128i(0xFFFFFFFFu, 0xFFFFFFFFu, 0xFFFFFFFFu, 0x0C000408u), - /* XMMUnpackD3DCOLOR */ vec128i(0xFFFFFF0Eu, 0xFFFFFF0Du, 0xFFFFFF0Cu, 0xFFFFFF0Fu), - /* XMMOneOver255 */ vec128f(1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f, 1.0f / 255.0f), - /* XMMShiftMaskPS */ vec128i(0x0000001Fu, 0x0000001Fu, 0x0000001Fu, 0x0000001Fu), - /* XMMShiftByteMask */ vec128i(0x000000FFu, 0x000000FFu, 0x000000FFu, 0x000000FFu), - /* XMMUnsignedDwordMax */ vec128i(0xFFFFFFFFu, 0x00000000u, 0xFFFFFFFFu, 0x00000000u), - /* XMM255 */ vec128f(255.0f, 255.0f, 255.0f, 255.0f), - /* XMMSignMaskI8 */ vec128i(0x80808080u, 0x80808080u, 0x80808080u, 0x80808080u), - /* XMMSignMaskI16 */ vec128i(0x80008000u, 0x80008000u, 0x80008000u, 0x80008000u), - /* XMMSignMaskI32 */ vec128i(0x80000000u, 0x80000000u, 0x80000000u, 0x80000000u), - /* XMMSignMaskF32 */ vec128i(0x80000000u, 0x80000000u, 0x80000000u, 0x80000000u), + /* XMMZero */ vec128f(0.0f, 0.0f, 0.0f, 0.0f), + /* XMMOne */ vec128f(1.0f, 1.0f, 1.0f, 1.0f), + /* XMMNegativeOne */ vec128f(-1.0f, -1.0f, -1.0f, -1.0f), + /* XMMMaskX16Y16 */ vec128i(0x0000FFFFu, 0xFFFF0000u, + 0x00000000u, 0x00000000u), + /* XMMFlipX16Y16 */ vec128i(0x00008000u, 0x00000000u, + 0x00000000u, 0x00000000u), + /* XMMFixX16Y16 */ vec128f(-32768.0f, 0.0f, 0.0f, 0.0f), + /* XMMNormalizeX16Y16 */ vec128f( + 1.0f / 32767.0f, 1.0f / (32767.0f * 65536.0f), 0.0f, 0.0f), + /* XMM0001 */ vec128f(0.0f, 0.0f, 0.0f, 1.0f), + /* XMM3301 */ vec128f(3.0f, 3.0f, 0.0f, 1.0f), + /* XMMSignMaskPS */ vec128i(0x80000000u, 0x80000000u, + 0x80000000u, 0x80000000u), + /* XMMSignMaskPD */ vec128i(0x00000000u, 0x80000000u, + 0x00000000u, 0x80000000u), + /* XMMAbsMaskPS */ vec128i(0x7FFFFFFFu, 0x7FFFFFFFu, + 0x7FFFFFFFu, 0x7FFFFFFFu), + /* XMMAbsMaskPD */ vec128i(0xFFFFFFFFu, 0x7FFFFFFFu, + 0xFFFFFFFFu, 0x7FFFFFFFu), + /* XMMByteSwapMask */ vec128i(0x00010203u, 0x04050607u, + 0x08090A0Bu, 0x0C0D0E0Fu), + /* XMMPermuteControl15 */ vec128b(15, 15, 15, 15, 15, 15, 15, 15, 15, + 15, 15, 15, 15, 15, 15, 15), + /* XMMPackD3DCOLOR */ vec128i(0xFFFFFFFFu, 0xFFFFFFFFu, + 0xFFFFFFFFu, 0x0C000408u), + /* XMMUnpackD3DCOLOR */ vec128i(0xFFFFFF0Eu, 0xFFFFFF0Du, + 0xFFFFFF0Cu, 0xFFFFFF0Fu), + /* XMMOneOver255 */ vec128f(1.0f / 255.0f, 1.0f / 255.0f, + 1.0f / 255.0f, 1.0f / 255.0f), + /* XMMShiftMaskPS */ vec128i(0x0000001Fu, 0x0000001Fu, + 0x0000001Fu, 0x0000001Fu), + /* XMMShiftByteMask */ vec128i(0x000000FFu, 0x000000FFu, + 0x000000FFu, 0x000000FFu), + /* XMMUnsignedDwordMax */ vec128i(0xFFFFFFFFu, 0x00000000u, + 0xFFFFFFFFu, 0x00000000u), + /* XMM255 */ vec128f(255.0f, 255.0f, 255.0f, 255.0f), + /* XMMSignMaskI8 */ vec128i(0x80808080u, 0x80808080u, + 0x80808080u, 0x80808080u), + /* XMMSignMaskI16 */ vec128i(0x80008000u, 0x80008000u, + 0x80008000u, 0x80008000u), + /* XMMSignMaskI32 */ vec128i(0x80000000u, 0x80000000u, + 0x80000000u, 0x80000000u), + /* XMMSignMaskF32 */ vec128i(0x80000000u, 0x80000000u, + 0x80000000u, 0x80000000u), }; // TODO(benvanik): cache base pointer somewhere? stack? It'd be nice to // prevent this move. @@ -568,7 +580,7 @@ void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, float v) { union { float f; uint32_t i; - } x = { v }; + } x = {v}; if (!v) { // 0 vpxor(dest, dest); @@ -587,7 +599,7 @@ void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, double v) { union { double d; uint64_t i; - } x = { v }; + } x = {v}; if (!v) { // 0 vpxor(dest, dest); @@ -614,3 +626,7 @@ Address X64Emitter::StashXmm(const vec128_t& v) { vmovups(addr, xmm0); return addr; } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_emitter.h b/src/alloy/backend/x64/x64_emitter.h index 3bfe43a2b..086a1d689 100644 --- a/src/alloy/backend/x64/x64_emitter.h +++ b/src/alloy/backend/x64/x64_emitter.h @@ -31,12 +31,12 @@ class X64Backend; class X64CodeCache; enum RegisterFlags { - REG_DEST = (1 << 0), - REG_ABCD = (1 << 1), + REG_DEST = (1 << 0), + REG_ABCD = (1 << 1), }; enum XmmConst { - XMMZero = 0, + XMMZero = 0, XMMOne, XMMNegativeOne, XMMMaskX16Y16, @@ -66,12 +66,12 @@ enum XmmConst { // Unfortunately due to the design of xbyak we have to pass this to the ctor. class XbyakAllocator : public Xbyak::Allocator { -public: - virtual bool useProtect() const { return false; } + public: + virtual bool useProtect() const { return false; } }; class X64Emitter : public Xbyak::CodeGenerator { -public: + public: X64Emitter(X64Backend* backend, XbyakAllocator* allocator); virtual ~X64Emitter(); @@ -80,11 +80,11 @@ public: int Initialize(); - int Emit(hir::HIRBuilder* builder, - uint32_t debug_info_flags, runtime::DebugInfo* debug_info, - void*& out_code_address, size_t& out_code_size); + int Emit(hir::HIRBuilder* builder, uint32_t debug_info_flags, + runtime::DebugInfo* debug_info, void*& out_code_address, + size_t& out_code_size); -public: + public: // Reserved: rsp // Scratch: rax/rcx/rdx // xmm0-2 (could be only xmm0 with some trickery) @@ -123,11 +123,13 @@ public: void Call(const hir::Instr* instr, runtime::FunctionInfo* symbol_info); void CallIndirect(const hir::Instr* instr, const Xbyak::Reg64& reg); - void CallExtern(const hir::Instr* instr, const runtime::FunctionInfo* symbol_info); + void CallExtern(const hir::Instr* instr, + const runtime::FunctionInfo* symbol_info); void CallNative(void* fn); - void CallNative(uint64_t(*fn)(void* raw_context)); - void CallNative(uint64_t(*fn)(void* raw_context, uint64_t arg0)); - void CallNative(uint64_t(*fn)(void* raw_context, uint64_t arg0), uint64_t arg0); + void CallNative(uint64_t (*fn)(void* raw_context)); + void CallNative(uint64_t (*fn)(void* raw_context, uint64_t arg0)); + void CallNative(uint64_t (*fn)(void* raw_context, uint64_t arg0), + uint64_t arg0); void CallNativeSafe(void* fn); void SetReturnAddress(uint64_t value); void ReloadECX(); @@ -153,31 +155,29 @@ public: size_t stack_size() const { return stack_size_; } -protected: + protected: void* Emplace(size_t stack_size); int Emit(hir::HIRBuilder* builder, size_t& out_stack_size); -protected: + protected: runtime::Runtime* runtime_; - X64Backend* backend_; - X64CodeCache* code_cache_; - XbyakAllocator* allocator_; + X64Backend* backend_; + X64CodeCache* code_cache_; + XbyakAllocator* allocator_; hir::Instr* current_instr_; - size_t source_map_count_; - Arena source_map_arena_; + size_t source_map_count_; + Arena source_map_arena_; - size_t stack_size_; + size_t stack_size_; static const uint32_t gpr_reg_map_[GPR_COUNT]; static const uint32_t xmm_reg_map_[XMM_COUNT]; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_EMITTER_H_ diff --git a/src/alloy/backend/x64/x64_function.cc b/src/alloy/backend/x64/x64_function.cc index 71452ac14..5e20887ba 100644 --- a/src/alloy/backend/x64/x64_function.cc +++ b/src/alloy/backend/x64/x64_function.cc @@ -14,16 +14,17 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; -using namespace alloy::runtime; +namespace alloy { +namespace backend { +namespace x64 { +using alloy::runtime::Breakpoint; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; +using alloy::runtime::ThreadState; -X64Function::X64Function(FunctionInfo* symbol_info) : - machine_code_(NULL), code_size_(0), - Function(symbol_info) { -} +X64Function::X64Function(FunctionInfo* symbol_info) + : machine_code_(NULL), code_size_(0), Function(symbol_info) {} X64Function::~X64Function() { // machine_code_ is freed by code cache. @@ -34,20 +35,17 @@ void X64Function::Setup(void* machine_code, size_t code_size) { code_size_ = code_size; } -int X64Function::AddBreakpointImpl(Breakpoint* breakpoint) { - return 0; -} +int X64Function::AddBreakpointImpl(Breakpoint* breakpoint) { return 0; } -int X64Function::RemoveBreakpointImpl(Breakpoint* breakpoint) { - return 0; -} +int X64Function::RemoveBreakpointImpl(Breakpoint* breakpoint) { return 0; } int X64Function::CallImpl(ThreadState* thread_state, uint64_t return_address) { auto backend = (X64Backend*)thread_state->runtime()->backend(); auto thunk = backend->host_to_guest_thunk(); - thunk( - machine_code_, - thread_state->raw_context(), - (void*)return_address); + thunk(machine_code_, thread_state->raw_context(), (void*)return_address); return 0; } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_function.h b/src/alloy/backend/x64/x64_function.h index 0f9659ca6..6e5812362 100644 --- a/src/alloy/backend/x64/x64_function.h +++ b/src/alloy/backend/x64/x64_function.h @@ -14,14 +14,12 @@ #include #include - namespace alloy { namespace backend { namespace x64 { - class X64Function : public runtime::Function { -public: + public: X64Function(runtime::FunctionInfo* symbol_info); virtual ~X64Function(); @@ -30,21 +28,19 @@ public: void Setup(void* machine_code, size_t code_size); -protected: + protected: virtual int AddBreakpointImpl(runtime::Breakpoint* breakpoint); virtual int RemoveBreakpointImpl(runtime::Breakpoint* breakpoint); virtual int CallImpl(runtime::ThreadState* thread_state, uint64_t return_address); -private: - void* machine_code_; - size_t code_size_; + private: + void* machine_code_; + size_t code_size_; }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_FUNCTION_H_ diff --git a/src/alloy/backend/x64/x64_sequences.h b/src/alloy/backend/x64/x64_sequences.h index 5a77e9987..79053e31e 100644 --- a/src/alloy/backend/x64/x64_sequences.h +++ b/src/alloy/backend/x64/x64_sequences.h @@ -20,14 +20,12 @@ namespace x64 { class X64Emitter; - void RegisterSequences(); -bool SelectSequence(X64Emitter& e, const hir::Instr* i, const hir::Instr** new_tail); - +bool SelectSequence(X64Emitter& e, const hir::Instr* i, + const hir::Instr** new_tail); } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_SEQUENCES_H_ diff --git a/src/alloy/backend/x64/x64_thunk_emitter.cc b/src/alloy/backend/x64/x64_thunk_emitter.cc index 0e1922581..049377417 100644 --- a/src/alloy/backend/x64/x64_thunk_emitter.cc +++ b/src/alloy/backend/x64/x64_thunk_emitter.cc @@ -11,21 +11,16 @@ #include - -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::backend::x64; +namespace alloy { +namespace backend { +namespace x64 { using namespace Xbyak; +X64ThunkEmitter::X64ThunkEmitter(X64Backend* backend, XbyakAllocator* allocator) + : X64Emitter(backend, allocator) {} -X64ThunkEmitter::X64ThunkEmitter( - X64Backend* backend, XbyakAllocator* allocator) : - X64Emitter(backend, allocator) { -} - -X64ThunkEmitter::~X64ThunkEmitter() { -} +X64ThunkEmitter::~X64ThunkEmitter() {} HostToGuestThunk X64ThunkEmitter::EmitHostToGuestThunk() { // rcx = target @@ -101,7 +96,7 @@ GuestToHostThunk X64ThunkEmitter::EmitGuestToHostThunk() { // rdx = target function // r8 = arg0 // r9 = arg1 - + const size_t stack_size = StackLayout::THUNK_STACK_SIZE; // rsp + 0 = return address mov(qword[rsp + 8 * 2], rdx); @@ -143,3 +138,7 @@ GuestToHostThunk X64ThunkEmitter::EmitGuestToHostThunk() { void* fn = Emplace(stack_size); return (HostToGuestThunk)fn; } + +} // namespace x64 +} // namespace backend +} // namespace alloy diff --git a/src/alloy/backend/x64/x64_thunk_emitter.h b/src/alloy/backend/x64/x64_thunk_emitter.h index e472885ea..6e6b8d428 100644 --- a/src/alloy/backend/x64/x64_thunk_emitter.h +++ b/src/alloy/backend/x64/x64_thunk_emitter.h @@ -14,12 +14,10 @@ #include #include - namespace alloy { namespace backend { namespace x64 { - /** * Stack Layout * ---------------------------- @@ -116,7 +114,7 @@ namespace x64 { */ class StackLayout { -public: + public: const static size_t THUNK_STACK_SIZE = 120; const static size_t GUEST_STACK_SIZE = 88; @@ -125,9 +123,8 @@ public: const static size_t GUEST_CALL_RET_ADDR = 80; }; - class X64ThunkEmitter : public X64Emitter { -public: + public: X64ThunkEmitter(X64Backend* backend, XbyakAllocator* allocator); virtual ~X64ThunkEmitter(); @@ -138,10 +135,8 @@ public: GuestToHostThunk EmitGuestToHostThunk(); }; - } // namespace x64 } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_THUNK_EMITTER_H_ diff --git a/src/alloy/backend/x64/x64_tracers.cc b/src/alloy/backend/x64/x64_tracers.cc index 0ebb699cb..29227db0d 100644 --- a/src/alloy/backend/x64/x64_tracers.cc +++ b/src/alloy/backend/x64/x64_tracers.cc @@ -27,9 +27,12 @@ namespace x64 { #define TARGET_THREAD 1 #define IFLUSH() fflush(stdout) -#define IPRINT if (thread_state->thread_id() == TARGET_THREAD) printf +#define IPRINT \ + if (thread_state->thread_id() == TARGET_THREAD) printf #define DFLUSH() fflush(stdout) -#define DPRINT DFLUSH(); if (thread_state->thread_id() == TARGET_THREAD) printf +#define DPRINT \ + DFLUSH(); \ + if (thread_state->thread_id() == TARGET_THREAD) printf uint32_t GetTracingMode() { uint32_t mode = 0; @@ -66,7 +69,8 @@ void TraceContextLoadI64(void* raw_context, uint64_t offset, uint64_t value) { } void TraceContextLoadF32(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); - DPRINT("%e (%X) = ctx f32 +%d\n", value.m128_f32[0], value.m128_i32[0], offset); + DPRINT("%e (%X) = ctx f32 +%d\n", value.m128_f32[0], value.m128_i32[0], + offset); } void TraceContextLoadF64(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); @@ -80,9 +84,9 @@ void TraceContextLoadF64(void* raw_context, uint64_t offset, __m128 value) { void TraceContextLoadV128(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); DPRINT("[%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X] = ctx v128 +%d\n", - value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], value.m128_f32[3], - value.m128_i32[0], value.m128_i32[1], value.m128_i32[2], value.m128_i32[3], - offset); + value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], + value.m128_f32[3], value.m128_i32[0], value.m128_i32[1], + value.m128_i32[2], value.m128_i32[3], offset); } void TraceContextStoreI8(void* raw_context, uint64_t offset, uint8_t value) { @@ -103,7 +107,8 @@ void TraceContextStoreI64(void* raw_context, uint64_t offset, uint64_t value) { } void TraceContextStoreF32(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); - DPRINT("ctx f32 +%d = %e (%X)\n", offset, value.m128_i32[0], value.m128_f32[0]); + DPRINT("ctx f32 +%d = %e (%X)\n", offset, value.m128_i32[0], + value.m128_f32[0]); } void TraceContextStoreF64(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); @@ -117,8 +122,9 @@ void TraceContextStoreF64(void* raw_context, uint64_t offset, __m128 value) { void TraceContextStoreV128(void* raw_context, uint64_t offset, __m128 value) { auto thread_state = *((ThreadState**)raw_context); DPRINT("ctx v128 +%d = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", offset, - value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], value.m128_f32[3], - value.m128_i32[0], value.m128_i32[1], value.m128_i32[2], value.m128_i32[3]); + value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], + value.m128_f32[3], value.m128_i32[0], value.m128_i32[1], + value.m128_i32[2], value.m128_i32[3]); } void TraceMemoryLoadI8(void* raw_context, uint64_t address, uint8_t value) { @@ -139,7 +145,8 @@ void TraceMemoryLoadI64(void* raw_context, uint64_t address, uint64_t value) { } void TraceMemoryLoadF32(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); - DPRINT("%e (%X) = load.f32 %.8X\n", value.m128_f32[0], value.m128_i32[0], address); + DPRINT("%e (%X) = load.f32 %.8X\n", value.m128_f32[0], value.m128_i32[0], + address); } void TraceMemoryLoadF64(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); @@ -153,9 +160,9 @@ void TraceMemoryLoadF64(void* raw_context, uint64_t address, __m128 value) { void TraceMemoryLoadV128(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); DPRINT("[%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X] = load.v128 %.8X\n", - value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], value.m128_f32[3], - value.m128_i32[0], value.m128_i32[1], value.m128_i32[2], value.m128_i32[3], - address); + value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], + value.m128_f32[3], value.m128_i32[0], value.m128_i32[1], + value.m128_i32[2], value.m128_i32[3], address); } void TraceMemoryStoreI8(void* raw_context, uint64_t address, uint8_t value) { @@ -176,7 +183,8 @@ void TraceMemoryStoreI64(void* raw_context, uint64_t address, uint64_t value) { } void TraceMemoryStoreF32(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); - DPRINT("store.f32 %.8X = %e (%X)\n", address, value.m128_f32[0], value.m128_i32[0]); + DPRINT("store.f32 %.8X = %e (%X)\n", address, value.m128_f32[0], + value.m128_i32[0]); } void TraceMemoryStoreF64(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); @@ -189,12 +197,12 @@ void TraceMemoryStoreF64(void* raw_context, uint64_t address, __m128 value) { } void TraceMemoryStoreV128(void* raw_context, uint64_t address, __m128 value) { auto thread_state = *((ThreadState**)raw_context); - DPRINT("store.v128 %.8X = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", address, - value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], value.m128_f32[3], - value.m128_i32[0], value.m128_i32[1], value.m128_i32[2], value.m128_i32[3]); + DPRINT("store.v128 %.8X = [%e, %e, %e, %e] [%.8X, %.8X, %.8X, %.8X]\n", + address, value.m128_f32[0], value.m128_f32[1], value.m128_f32[2], + value.m128_f32[3], value.m128_i32[0], value.m128_i32[1], + value.m128_i32[2], value.m128_i32[3]); } - } // namespace x64 } // namespace backend } // namespace alloy diff --git a/src/alloy/backend/x64/x64_tracers.h b/src/alloy/backend/x64/x64_tracers.h index 64c788ff3..8151b4305 100644 --- a/src/alloy/backend/x64/x64_tracers.h +++ b/src/alloy/backend/x64/x64_tracers.h @@ -16,19 +16,18 @@ #include #else typedef union __declspec(align(16)) __m128 { - float m128_f32[4]; - uint64_t m128_u64[2]; - int8_t m128_i8[16]; - int16_t m128_i16[8]; - int32_t m128_i32[4]; - int64_t m128_i64[2]; - uint8_t m128_u8[16]; - uint16_t m128_u16[8]; - uint32_t m128_u32[4]; + float m128_f32[4]; + uint64_t m128_u64[2]; + int8_t m128_i8[16]; + int16_t m128_i16[8]; + int32_t m128_i32[4]; + int64_t m128_i64[2]; + uint8_t m128_u8[16]; + uint16_t m128_u16[8]; + uint32_t m128_u32[4]; } __m128; #endif - namespace alloy { namespace backend { namespace x64 { @@ -81,5 +80,4 @@ void TraceMemoryStoreV128(void* raw_context, uint64_t address, __m128 value); } // namespace backend } // namespace alloy - #endif // ALLOY_BACKEND_X64_X64_TRACERS_H_ diff --git a/src/alloy/compiler/compiler.cc b/src/alloy/compiler/compiler.cc index 62c6e5a4b..2aff744db 100644 --- a/src/alloy/compiler/compiler.cc +++ b/src/alloy/compiler/compiler.cc @@ -12,18 +12,16 @@ #include #include -using namespace alloy; -using namespace alloy::compiler; -using namespace alloy::hir; -using namespace alloy::runtime; +namespace alloy { +namespace compiler { +using alloy::hir::HIRBuilder; +using alloy::runtime::Runtime; -Compiler::Compiler(Runtime* runtime) : - runtime_(runtime) { +Compiler::Compiler(Runtime* runtime) : runtime_(runtime) { scratch_arena_ = new Arena(); - alloy::tracing::WriteEvent(EventType::Init({ - })); + alloy::tracing::WriteEvent(EventType::Init({})); } Compiler::~Compiler() { @@ -36,8 +34,7 @@ Compiler::~Compiler() { delete scratch_arena_; - alloy::tracing::WriteEvent(EventType::Deinit({ - })); + alloy::tracing::WriteEvent(EventType::Deinit({})); } void Compiler::AddPass(CompilerPass* pass) { @@ -45,8 +42,7 @@ void Compiler::AddPass(CompilerPass* pass) { passes_.push_back(pass); } -void Compiler::Reset() { -} +void Compiler::Reset() {} int Compiler::Compile(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -63,3 +59,6 @@ int Compiler::Compile(HIRBuilder* builder) { return 0; } + +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/compiler.h b/src/alloy/compiler/compiler.h index d2874cceb..82c13890b 100644 --- a/src/alloy/compiler/compiler.h +++ b/src/alloy/compiler/compiler.h @@ -13,17 +13,19 @@ #include #include -namespace alloy { namespace runtime { class Runtime; } } - +namespace alloy { +namespace runtime { +class Runtime; +} // namespace runtime +} // namespace alloy namespace alloy { namespace compiler { class CompilerPass; - class Compiler { -public: + public: Compiler(runtime::Runtime* runtime); ~Compiler(); @@ -36,7 +38,7 @@ public: int Compile(hir::HIRBuilder* builder); -private: + private: runtime::Runtime* runtime_; Arena* scratch_arena_; @@ -44,9 +46,7 @@ private: PassList passes_; }; - } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_COMPILER_H_ diff --git a/src/alloy/compiler/compiler_pass.cc b/src/alloy/compiler/compiler_pass.cc index 59f71902c..2c3e84afc 100644 --- a/src/alloy/compiler/compiler_pass.cc +++ b/src/alloy/compiler/compiler_pass.cc @@ -11,16 +11,12 @@ #include -using namespace alloy; -using namespace alloy::compiler; +namespace alloy { +namespace compiler { +CompilerPass::CompilerPass() : runtime_(0), compiler_(0) {} -CompilerPass::CompilerPass() : - runtime_(0), compiler_(0) { -} - -CompilerPass::~CompilerPass() { -} +CompilerPass::~CompilerPass() {} int CompilerPass::Initialize(Compiler* compiler) { runtime_ = compiler->runtime(); @@ -31,3 +27,6 @@ int CompilerPass::Initialize(Compiler* compiler) { Arena* CompilerPass::scratch_arena() const { return compiler_->scratch_arena(); } + +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/compiler_pass.h b/src/alloy/compiler/compiler_pass.h index 4ba38b6c4..281d578f5 100644 --- a/src/alloy/compiler/compiler_pass.h +++ b/src/alloy/compiler/compiler_pass.h @@ -14,17 +14,19 @@ #include -namespace alloy { namespace runtime { class Runtime; } } - +namespace alloy { +namespace runtime { +class Runtime; +} // namespace runtime +} // namespace alloy namespace alloy { namespace compiler { class Compiler; - class CompilerPass { -public: + public: CompilerPass(); virtual ~CompilerPass(); @@ -32,17 +34,15 @@ public: virtual int Run(hir::HIRBuilder* builder) = 0; -protected: + protected: Arena* scratch_arena() const; -protected: + protected: runtime::Runtime* runtime_; Compiler* compiler_; }; - } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_COMPILER_PASS_H_ diff --git a/src/alloy/compiler/compiler_passes.h b/src/alloy/compiler/compiler_passes.h index 20ec91c66..a01896e44 100644 --- a/src/alloy/compiler/compiler_passes.h +++ b/src/alloy/compiler/compiler_passes.h @@ -15,7 +15,7 @@ #include #include #include - //#include +//#include #include #include #include @@ -49,7 +49,6 @@ // Block gets: // AddIncomingValue(Value* value, Block* src_block) ?? - // Potentially interesting passes: // // Run order: diff --git a/src/alloy/compiler/passes/constant_propagation_pass.cc b/src/alloy/compiler/passes/constant_propagation_pass.cc index 13001a904..9dcb8d3ec 100644 --- a/src/alloy/compiler/passes/constant_propagation_pass.cc +++ b/src/alloy/compiler/passes/constant_propagation_pass.cc @@ -12,18 +12,20 @@ #include #include -using namespace alloy; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; +using alloy::hir::HIRBuilder; +using alloy::hir::TypeName; +using alloy::hir::Value; -ConstantPropagationPass::ConstantPropagationPass() : - CompilerPass() { -} +ConstantPropagationPass::ConstantPropagationPass() : CompilerPass() {} -ConstantPropagationPass::~ConstantPropagationPass() { -} +ConstantPropagationPass::~ConstantPropagationPass() {} int ConstantPropagationPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -55,379 +57,379 @@ int ConstantPropagationPass::Run(HIRBuilder* builder) { // v1 = 19 // v2 = 0 - Block* block = builder->first_block(); + auto block = builder->first_block(); while (block) { - Instr* i = block->instr_head; + auto i = block->instr_head; while (i) { - Value* v = i->dest; + auto v = i->dest; switch (i->opcode->num) { - case OPCODE_DEBUG_BREAK_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - i->Replace(&OPCODE_DEBUG_BREAK_info, i->flags); - } else { - i->Remove(); + case OPCODE_DEBUG_BREAK_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + i->Replace(&OPCODE_DEBUG_BREAK_info, i->flags); + } else { + i->Remove(); + } } - } - break; + break; - case OPCODE_TRAP_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - i->Replace(&OPCODE_TRAP_info, i->flags); - } else { - i->Remove(); + case OPCODE_TRAP_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + i->Replace(&OPCODE_TRAP_info, i->flags); + } else { + i->Remove(); + } } - } - break; + break; - case OPCODE_CALL_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - auto symbol_info = i->src2.symbol_info; + case OPCODE_CALL_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + auto symbol_info = i->src2.symbol_info; + i->Replace(&OPCODE_CALL_info, i->flags); + i->src1.symbol_info = symbol_info; + } else { + i->Remove(); + } + } + break; + case OPCODE_CALL_INDIRECT: + if (i->src1.value->IsConstant()) { + runtime::FunctionInfo* symbol_info; + if (runtime_->LookupFunctionInfo( + (uint32_t)i->src1.value->constant.i32, &symbol_info)) { + break; + } i->Replace(&OPCODE_CALL_info, i->flags); i->src1.symbol_info = symbol_info; - } else { + } + break; + case OPCODE_CALL_INDIRECT_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + auto value = i->src2.value; + i->Replace(&OPCODE_CALL_INDIRECT_info, i->flags); + i->set_src1(value); + } else { + i->Remove(); + } + } + break; + + case OPCODE_BRANCH_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + auto label = i->src2.label; + i->Replace(&OPCODE_BRANCH_info, i->flags); + i->src1.label = label; + } else { + i->Remove(); + } + } + break; + case OPCODE_BRANCH_FALSE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantFalse()) { + auto label = i->src2.label; + i->Replace(&OPCODE_BRANCH_info, i->flags); + i->src1.label = label; + } else { + i->Remove(); + } + } + break; + + case OPCODE_CAST: + if (i->src1.value->IsConstant()) { + TypeName target_type = v->type; + v->set_from(i->src1.value); + v->Cast(target_type); i->Remove(); } - } - break; - case OPCODE_CALL_INDIRECT: - if (i->src1.value->IsConstant()) { - runtime::FunctionInfo* symbol_info; - if (runtime_->LookupFunctionInfo( - (uint32_t)i->src1.value->constant.i32, &symbol_info)) { - break; - } - i->Replace(&OPCODE_CALL_info, i->flags); - i->src1.symbol_info = symbol_info; - } - break; - case OPCODE_CALL_INDIRECT_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - auto value = i->src2.value; - i->Replace(&OPCODE_CALL_INDIRECT_info, i->flags); - i->set_src1(value); - } else { + break; + case OPCODE_ZERO_EXTEND: + if (i->src1.value->IsConstant()) { + TypeName target_type = v->type; + v->set_from(i->src1.value); + v->ZeroExtend(target_type); i->Remove(); } - } - break; - - case OPCODE_BRANCH_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - auto label = i->src2.label; - i->Replace(&OPCODE_BRANCH_info, i->flags); - i->src1.label = label; - } else { + break; + case OPCODE_SIGN_EXTEND: + if (i->src1.value->IsConstant()) { + TypeName target_type = v->type; + v->set_from(i->src1.value); + v->SignExtend(target_type); i->Remove(); } - } - break; - case OPCODE_BRANCH_FALSE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantFalse()) { - auto label = i->src2.label; - i->Replace(&OPCODE_BRANCH_info, i->flags); - i->src1.label = label; - } else { + break; + case OPCODE_TRUNCATE: + if (i->src1.value->IsConstant()) { + TypeName target_type = v->type; + v->set_from(i->src1.value); + v->Truncate(target_type); i->Remove(); } - } - break; + break; - case OPCODE_CAST: - if (i->src1.value->IsConstant()) { - TypeName target_type = v->type; - v->set_from(i->src1.value); - v->Cast(target_type); - i->Remove(); - } - break; - case OPCODE_ZERO_EXTEND: - if (i->src1.value->IsConstant()) { - TypeName target_type = v->type; - v->set_from(i->src1.value); - v->ZeroExtend(target_type); - i->Remove(); - } - break; - case OPCODE_SIGN_EXTEND: - if (i->src1.value->IsConstant()) { - TypeName target_type = v->type; - v->set_from(i->src1.value); - v->SignExtend(target_type); - i->Remove(); - } - break; - case OPCODE_TRUNCATE: - if (i->src1.value->IsConstant()) { - TypeName target_type = v->type; - v->set_from(i->src1.value); - v->Truncate(target_type); - i->Remove(); - } - break; - - case OPCODE_SELECT: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - v->set_from(i->src2.value); - } else { - v->set_from(i->src3.value); + case OPCODE_SELECT: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + v->set_from(i->src2.value); + } else { + v->set_from(i->src3.value); + } + i->Remove(); } - i->Remove(); - } - break; - case OPCODE_IS_TRUE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantTrue()) { - v->set_constant((int8_t)1); - } else { - v->set_constant((int8_t)0); + break; + case OPCODE_IS_TRUE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantTrue()) { + v->set_constant((int8_t)1); + } else { + v->set_constant((int8_t)0); + } + i->Remove(); } - i->Remove(); - } - break; - case OPCODE_IS_FALSE: - if (i->src1.value->IsConstant()) { - if (i->src1.value->IsConstantFalse()) { - v->set_constant((int8_t)1); - } else { - v->set_constant((int8_t)0); + break; + case OPCODE_IS_FALSE: + if (i->src1.value->IsConstant()) { + if (i->src1.value->IsConstantFalse()) { + v->set_constant((int8_t)1); + } else { + v->set_constant((int8_t)0); + } + i->Remove(); } - i->Remove(); - } - break; + break; - // TODO(benvanik): compares - case OPCODE_COMPARE_EQ: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantEQ(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_NE: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantNE(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_SLT: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantSLT(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_SLE: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantSLE(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_SGT: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantSGT(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_SGE: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantSGE(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_ULT: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantULT(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_ULE: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantULE(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_UGT: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantUGT(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - case OPCODE_COMPARE_UGE: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - bool value = i->src1.value->IsConstantUGE(i->src2.value); - i->dest->set_constant(value); - i->Remove(); - } - break; - - case OPCODE_DID_CARRY: - XEASSERT(!i->src1.value->IsConstant()); - break; - case OPCODE_DID_OVERFLOW: - XEASSERT(!i->src1.value->IsConstant()); - break; - case OPCODE_DID_SATURATE: - XEASSERT(!i->src1.value->IsConstant()); - break; - - case OPCODE_ADD: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - bool did_carry = v->Add(i->src2.value); - bool propagate_carry = !!(i->flags & ARITHMETIC_SET_CARRY); - i->Remove(); - - // If carry is set find the DID_CARRY and fix it. - if (propagate_carry) { - PropagateCarry(v, did_carry); + // TODO(benvanik): compares + case OPCODE_COMPARE_EQ: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantEQ(i->src2.value); + i->dest->set_constant(value); + i->Remove(); } - } - break; - // TODO(benvanik): ADD_CARRY (w/ ARITHMETIC_SET_CARRY) - case OPCODE_SUB: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - bool did_carry = v->Sub(i->src2.value); - bool propagate_carry = !!(i->flags & ARITHMETIC_SET_CARRY); - i->Remove(); - - // If carry is set find the DID_CARRY and fix it. - if (propagate_carry) { - PropagateCarry(v, did_carry); + break; + case OPCODE_COMPARE_NE: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantNE(i->src2.value); + i->dest->set_constant(value); + i->Remove(); } - } - break; - case OPCODE_MUL: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Mul(i->src2.value); - i->Remove(); - } - break; - case OPCODE_DIV: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Div(i->src2.value); - i->Remove(); - } - break; - // case OPCODE_MUL_ADD: - // case OPCODE_MUL_SUB - case OPCODE_NEG: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->Neg(); - i->Remove(); - } - break; - case OPCODE_ABS: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->Abs(); - i->Remove(); - } - break; - case OPCODE_SQRT: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->Sqrt(); - i->Remove(); - } - break; - case OPCODE_RSQRT: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->RSqrt(); - i->Remove(); - } - break; + break; + case OPCODE_COMPARE_SLT: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantSLT(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_SLE: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantSLE(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_SGT: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantSGT(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_SGE: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantSGE(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_ULT: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantULT(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_ULE: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantULE(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_UGT: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantUGT(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; + case OPCODE_COMPARE_UGE: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + bool value = i->src1.value->IsConstantUGE(i->src2.value); + i->dest->set_constant(value); + i->Remove(); + } + break; - case OPCODE_AND: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->And(i->src2.value); - i->Remove(); - } - break; - case OPCODE_OR: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Or(i->src2.value); - i->Remove(); - } - break; - case OPCODE_XOR: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Xor(i->src2.value); - i->Remove(); - } - break; - case OPCODE_NOT: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->Not(); - i->Remove(); - } - break; - case OPCODE_SHL: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Shl(i->src2.value); - i->Remove(); - } - break; - // TODO(benvanik): VECTOR_SHL - case OPCODE_SHR: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Shr(i->src2.value); - i->Remove(); - } - break; - case OPCODE_SHA: - if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { - v->set_from(i->src1.value); - v->Sha(i->src2.value); - i->Remove(); - } - break; - // TODO(benvanik): ROTATE_LEFT - case OPCODE_BYTE_SWAP: - if (i->src1.value->IsConstant()) { - v->set_from(i->src1.value); - v->ByteSwap(); - i->Remove(); - } - break; - case OPCODE_CNTLZ: - if (i->src1.value->IsConstant()) { - v->set_zero(v->type); - v->CountLeadingZeros(i->src1.value); - i->Remove(); - } - break; - // TODO(benvanik): INSERT/EXTRACT - // TODO(benvanik): SPLAT/PERMUTE/SWIZZLE - case OPCODE_SPLAT: - if (i->src1.value->IsConstant()) { - // Quite a few of these, from building vec128s. - } - break; + case OPCODE_DID_CARRY: + XEASSERT(!i->src1.value->IsConstant()); + break; + case OPCODE_DID_OVERFLOW: + XEASSERT(!i->src1.value->IsConstant()); + break; + case OPCODE_DID_SATURATE: + XEASSERT(!i->src1.value->IsConstant()); + break; + + case OPCODE_ADD: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + bool did_carry = v->Add(i->src2.value); + bool propagate_carry = !!(i->flags & ARITHMETIC_SET_CARRY); + i->Remove(); + + // If carry is set find the DID_CARRY and fix it. + if (propagate_carry) { + PropagateCarry(v, did_carry); + } + } + break; + // TODO(benvanik): ADD_CARRY (w/ ARITHMETIC_SET_CARRY) + case OPCODE_SUB: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + bool did_carry = v->Sub(i->src2.value); + bool propagate_carry = !!(i->flags & ARITHMETIC_SET_CARRY); + i->Remove(); + + // If carry is set find the DID_CARRY and fix it. + if (propagate_carry) { + PropagateCarry(v, did_carry); + } + } + break; + case OPCODE_MUL: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Mul(i->src2.value); + i->Remove(); + } + break; + case OPCODE_DIV: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Div(i->src2.value); + i->Remove(); + } + break; + // case OPCODE_MUL_ADD: + // case OPCODE_MUL_SUB + case OPCODE_NEG: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->Neg(); + i->Remove(); + } + break; + case OPCODE_ABS: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->Abs(); + i->Remove(); + } + break; + case OPCODE_SQRT: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->Sqrt(); + i->Remove(); + } + break; + case OPCODE_RSQRT: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->RSqrt(); + i->Remove(); + } + break; + + case OPCODE_AND: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->And(i->src2.value); + i->Remove(); + } + break; + case OPCODE_OR: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Or(i->src2.value); + i->Remove(); + } + break; + case OPCODE_XOR: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Xor(i->src2.value); + i->Remove(); + } + break; + case OPCODE_NOT: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->Not(); + i->Remove(); + } + break; + case OPCODE_SHL: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Shl(i->src2.value); + i->Remove(); + } + break; + // TODO(benvanik): VECTOR_SHL + case OPCODE_SHR: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Shr(i->src2.value); + i->Remove(); + } + break; + case OPCODE_SHA: + if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) { + v->set_from(i->src1.value); + v->Sha(i->src2.value); + i->Remove(); + } + break; + // TODO(benvanik): ROTATE_LEFT + case OPCODE_BYTE_SWAP: + if (i->src1.value->IsConstant()) { + v->set_from(i->src1.value); + v->ByteSwap(); + i->Remove(); + } + break; + case OPCODE_CNTLZ: + if (i->src1.value->IsConstant()) { + v->set_zero(v->type); + v->CountLeadingZeros(i->src1.value); + i->Remove(); + } + break; + // TODO(benvanik): INSERT/EXTRACT + // TODO(benvanik): SPLAT/PERMUTE/SWIZZLE + case OPCODE_SPLAT: + if (i->src1.value->IsConstant()) { + // Quite a few of these, from building vec128s. + } + break; } i = i->next; } @@ -438,7 +440,7 @@ int ConstantPropagationPass::Run(HIRBuilder* builder) { return 0; } -void ConstantPropagationPass::PropagateCarry(hir::Value* v, bool did_carry) { +void ConstantPropagationPass::PropagateCarry(Value* v, bool did_carry) { auto next = v->use_head; while (next) { auto use = next; @@ -450,3 +452,7 @@ void ConstantPropagationPass::PropagateCarry(hir::Value* v, bool did_carry) { } } } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/constant_propagation_pass.h b/src/alloy/compiler/passes/constant_propagation_pass.h index 2220394ad..cdc7f1353 100644 --- a/src/alloy/compiler/passes/constant_propagation_pass.h +++ b/src/alloy/compiler/passes/constant_propagation_pass.h @@ -12,27 +12,23 @@ #include - namespace alloy { namespace compiler { namespace passes { - class ConstantPropagationPass : public CompilerPass { -public: + public: ConstantPropagationPass(); virtual ~ConstantPropagationPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: void PropagateCarry(hir::Value* v, bool did_carry); }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_CONSTANT_PROPAGATION_PASS_H_ diff --git a/src/alloy/compiler/passes/context_promotion_pass.cc b/src/alloy/compiler/passes/context_promotion_pass.cc index dc225aea6..2f14acd77 100644 --- a/src/alloy/compiler/passes/context_promotion_pass.cc +++ b/src/alloy/compiler/passes/context_promotion_pass.cc @@ -14,22 +14,24 @@ #include #include -using namespace alloy; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; -using namespace alloy::hir; -using namespace alloy::runtime; - - DEFINE_bool(store_all_context_values, false, "Don't strip dead context stores to aid in debugging."); +namespace alloy { +namespace compiler { +namespace passes { -ContextPromotionPass::ContextPromotionPass() : - context_values_size_(0), context_values_(0), - CompilerPass() { -} +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::frontend::ContextInfo; +using alloy::hir::Block; +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::hir::Value; + +ContextPromotionPass::ContextPromotionPass() + : context_values_size_(0), context_values_(0), CompilerPass() {} ContextPromotionPass::~ContextPromotionPass() { if (context_values_) { @@ -70,7 +72,7 @@ int ContextPromotionPass::Run(HIRBuilder* builder) { // Promote loads to values. // Process each block independently, for now. - Block* block = builder->first_block(); + auto block = builder->first_block(); while (block) { PromoteBlock(block); block = block->next; @@ -121,7 +123,7 @@ void ContextPromotionPass::PromoteBlock(Block* block) { void ContextPromotionPass::RemoveDeadStoresBlock(Block* block) { // TODO(benvanik): use a bitvector. // To avoid clearing the structure, we use a token. - Value* token = (Value*)block; + auto token = (Value*)block; // Walk backwards and mark offsets that are written to. // If the offset was written to earlier, ignore the store. @@ -141,3 +143,7 @@ void ContextPromotionPass::RemoveDeadStoresBlock(Block* block) { i = prev; } } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/context_promotion_pass.h b/src/alloy/compiler/passes/context_promotion_pass.h index 8c4d7b743..925f0bb32 100644 --- a/src/alloy/compiler/passes/context_promotion_pass.h +++ b/src/alloy/compiler/passes/context_promotion_pass.h @@ -12,14 +12,12 @@ #include - namespace alloy { namespace compiler { namespace passes { - class ContextPromotionPass : public CompilerPass { -public: + public: ContextPromotionPass(); virtual ~ContextPromotionPass(); @@ -27,19 +25,17 @@ public: virtual int Run(hir::HIRBuilder* builder); -private: + private: void PromoteBlock(hir::Block* block); void RemoveDeadStoresBlock(hir::Block* block); -private: + private: size_t context_values_size_; hir::Value** context_values_; }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_CONTEXT_PROMOTION_PASS_H_ diff --git a/src/alloy/compiler/passes/control_flow_analysis_pass.cc b/src/alloy/compiler/passes/control_flow_analysis_pass.cc index 5cf6ea6a6..312fa3441 100644 --- a/src/alloy/compiler/passes/control_flow_analysis_pass.cc +++ b/src/alloy/compiler/passes/control_flow_analysis_pass.cc @@ -13,21 +13,19 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::Edge; +using alloy::hir::HIRBuilder; -ControlFlowAnalysisPass::ControlFlowAnalysisPass() : - CompilerPass() { -} +ControlFlowAnalysisPass::ControlFlowAnalysisPass() : CompilerPass() {} -ControlFlowAnalysisPass::~ControlFlowAnalysisPass() { -} +ControlFlowAnalysisPass::~ControlFlowAnalysisPass() {} int ControlFlowAnalysisPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -46,7 +44,7 @@ int ControlFlowAnalysisPass::Run(HIRBuilder* builder) { auto label = instr->src1.label; builder->AddEdge(block, label->block, Edge::UNCONDITIONAL); } else if (instr->opcode == &OPCODE_BRANCH_TRUE_info || - instr->opcode == &OPCODE_BRANCH_FALSE_info) { + instr->opcode == &OPCODE_BRANCH_FALSE_info) { auto label = instr->src2.label; builder->AddEdge(block, label->block, 0); } @@ -67,3 +65,7 @@ int ControlFlowAnalysisPass::Run(HIRBuilder* builder) { return 0; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/control_flow_analysis_pass.h b/src/alloy/compiler/passes/control_flow_analysis_pass.h index c639db5cb..35ce33fba 100644 --- a/src/alloy/compiler/passes/control_flow_analysis_pass.h +++ b/src/alloy/compiler/passes/control_flow_analysis_pass.h @@ -12,26 +12,22 @@ #include - namespace alloy { namespace compiler { namespace passes { - class ControlFlowAnalysisPass : public CompilerPass { -public: + public: ControlFlowAnalysisPass(); virtual ~ControlFlowAnalysisPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_CONTROL_FLOW_ANALYSIS_PASS_H_ diff --git a/src/alloy/compiler/passes/data_flow_analysis_pass.cc b/src/alloy/compiler/passes/data_flow_analysis_pass.cc index 209410016..5c7fbdc89 100644 --- a/src/alloy/compiler/passes/data_flow_analysis_pass.cc +++ b/src/alloy/compiler/passes/data_flow_analysis_pass.cc @@ -19,21 +19,20 @@ #include #pragma warning(pop) -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::HIRBuilder; +using alloy::hir::OpcodeSignatureType; +using alloy::hir::Value; -DataFlowAnalysisPass::DataFlowAnalysisPass() : - CompilerPass() { -} +DataFlowAnalysisPass::DataFlowAnalysisPass() : CompilerPass() {} -DataFlowAnalysisPass::~DataFlowAnalysisPass() { -} +DataFlowAnalysisPass::~DataFlowAnalysisPass() {} int DataFlowAnalysisPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -66,15 +65,15 @@ void DataFlowAnalysisPass::AnalyzeFlow(HIRBuilder* builder, // Stash for value map. We may want to maintain this during building. auto arena = builder->arena(); - Value** value_map = (Value**)arena->Alloc( - sizeof(Value*) * max_value_estimate); + Value** value_map = + (Value**)arena->Alloc(sizeof(Value*) * max_value_estimate); // Allocate incoming bitvectors for use by blocks. We don't need outgoing // because they are only used during the block iteration. // Mapped by block ordinal. // TODO(benvanik): cache this list, grow as needed, etc. - auto incoming_bitvectors = (llvm::BitVector**)arena->Alloc( - sizeof(llvm::BitVector*) * block_count); + auto incoming_bitvectors = + (llvm::BitVector**)arena->Alloc(sizeof(llvm::BitVector*) * block_count); for (auto n = 0u; n < block_count; n++) { incoming_bitvectors[n] = new llvm::BitVector(max_value_estimate); } @@ -90,10 +89,10 @@ void DataFlowAnalysisPass::AnalyzeFlow(HIRBuilder* builder, auto instr = block->instr_head; while (instr) { uint32_t signature = instr->opcode->signature; -#define SET_INCOMING_VALUE(v) \ - if (v->def && v->def->block != block) { \ - incoming_values.set(v->ordinal); \ - } \ +#define SET_INCOMING_VALUE(v) \ + if (v->def && v->def->block != block) { \ + incoming_values.set(v->ordinal); \ + } \ XEASSERT(v->ordinal < max_value_estimate); \ value_map[v->ordinal] = v; if (GET_OPCODE_SIG_TYPE_SRC1(signature) == OPCODE_SIG_TYPE_V) { @@ -201,3 +200,7 @@ void DataFlowAnalysisPass::AnalyzeFlow(HIRBuilder* builder, delete incoming_bitvectors[n]; } } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/dead_code_elimination_pass.cc b/src/alloy/compiler/passes/dead_code_elimination_pass.cc index afb8d87b2..f18bfc26f 100644 --- a/src/alloy/compiler/passes/dead_code_elimination_pass.cc +++ b/src/alloy/compiler/passes/dead_code_elimination_pass.cc @@ -9,18 +9,20 @@ #include -using namespace alloy; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::hir::Value; -DeadCodeEliminationPass::DeadCodeEliminationPass() : - CompilerPass() { -} +DeadCodeEliminationPass::DeadCodeEliminationPass() : CompilerPass() {} -DeadCodeEliminationPass::~DeadCodeEliminationPass() { -} +DeadCodeEliminationPass::~DeadCodeEliminationPass() {} int DeadCodeEliminationPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -63,7 +65,7 @@ int DeadCodeEliminationPass::Run(HIRBuilder* builder) { bool any_instr_removed = false; bool any_locals_removed = false; - Block* block = builder->first_block(); + auto block = builder->first_block(); while (block) { // Walk instructions in reverse. Instr* i = block->instr_tail; @@ -71,8 +73,8 @@ int DeadCodeEliminationPass::Run(HIRBuilder* builder) { auto prev = i->prev; auto opcode = i->opcode; - if (!(opcode->flags & OPCODE_FLAG_VOLATILE) && - i->dest && !i->dest->use_head) { + if (!(opcode->flags & OPCODE_FLAG_VOLATILE) && i->dest && + !i->dest->use_head) { // Has no uses and is not volatile. This instruction can die! MakeNopRecursive(i); any_instr_removed = true; @@ -110,7 +112,7 @@ int DeadCodeEliminationPass::Run(HIRBuilder* builder) { // Remove all nops. if (any_instr_removed) { - Block* block = builder->first_block(); + auto block = builder->first_block(); while (block) { Instr* i = block->instr_head; while (i) { @@ -148,19 +150,19 @@ void DeadCodeEliminationPass::MakeNopRecursive(Instr* i) { i->dest->def = NULL; i->dest = NULL; -#define MAKE_NOP_SRC(n) \ - if (i->src##n##_use) { \ - Value::Use* use = i->src##n##_use; \ - Value* value = i->src##n##.value; \ - i->src##n##_use = NULL; \ - i->src##n##.value = NULL; \ - value->RemoveUse(use); \ - if (!value->use_head) { \ +#define MAKE_NOP_SRC(n) \ + if (i->src##n##_use) { \ + Value::Use* use = i->src##n##_use; \ + Value* value = i->src##n##.value; \ + i->src##n##_use = NULL; \ + i->src##n##.value = NULL; \ + value->RemoveUse(use); \ + if (!value->use_head) { \ /* Value is now unused, so recursively kill it. */ \ - if (value->def && value->def != i) { \ - MakeNopRecursive(value->def); \ - } \ - } \ + if (value->def && value->def != i) { \ + MakeNopRecursive(value->def); \ + } \ + } \ } MAKE_NOP_SRC(1); MAKE_NOP_SRC(2); @@ -209,3 +211,7 @@ bool DeadCodeEliminationPass::CheckLocalUse(Instr* i) { return false; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/finalization_pass.cc b/src/alloy/compiler/passes/finalization_pass.cc index e6358f242..5066b53ab 100644 --- a/src/alloy/compiler/passes/finalization_pass.cc +++ b/src/alloy/compiler/passes/finalization_pass.cc @@ -13,21 +13,18 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::HIRBuilder; -FinalizationPass::FinalizationPass() : - CompilerPass() { -} +FinalizationPass::FinalizationPass() : CompilerPass() {} -FinalizationPass::~FinalizationPass() { -} +FinalizationPass::~FinalizationPass() {} int FinalizationPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -70,3 +67,7 @@ int FinalizationPass::Run(HIRBuilder* builder) { return 0; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/finalization_pass.h b/src/alloy/compiler/passes/finalization_pass.h index a2260003a..30cec0d3c 100644 --- a/src/alloy/compiler/passes/finalization_pass.h +++ b/src/alloy/compiler/passes/finalization_pass.h @@ -12,26 +12,22 @@ #include - namespace alloy { namespace compiler { namespace passes { - class FinalizationPass : public CompilerPass { -public: + public: FinalizationPass(); virtual ~FinalizationPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_FINALIZATION_PASS_H_ diff --git a/src/alloy/compiler/passes/register_allocation_pass.cc b/src/alloy/compiler/passes/register_allocation_pass.cc index 7c3a0a7a9..aa6fcf13c 100644 --- a/src/alloy/compiler/passes/register_allocation_pass.cc +++ b/src/alloy/compiler/passes/register_allocation_pass.cc @@ -11,20 +11,25 @@ #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; +using alloy::backend::MachineInfo; +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::hir::OpcodeSignatureType; +using alloy::hir::RegAssignment; +using alloy::hir::TypeName; +using alloy::hir::Value; #define ASSERT_NO_CYCLES 0 - -RegisterAllocationPass::RegisterAllocationPass( - const MachineInfo* machine_info) : - machine_info_(machine_info), - CompilerPass() { +RegisterAllocationPass::RegisterAllocationPass(const MachineInfo* machine_info) + : machine_info_(machine_info), CompilerPass() { // Initialize register sets. // TODO(benvanik): rewrite in a way that makes sense - this is terrible. auto mi_sets = machine_info->register_sets; @@ -88,7 +93,7 @@ int RegisterAllocationPass::Run(HIRBuilder* builder) { instr = block->instr_head; while (instr) { - const OpcodeInfo* info = instr->opcode; + const auto info = instr->opcode; uint32_t signature = info->signature; // Update the register use heaps. @@ -101,7 +106,7 @@ int RegisterAllocationPass::Run(HIRBuilder* builder) { // reuse it. // NOTE: these checks require that the usage list be sorted! bool has_preferred_reg = false; - RegAssignment preferred_reg = { 0 }; + RegAssignment preferred_reg = {0}; if (GET_OPCODE_SIG_TYPE_SRC1(signature) == OPCODE_SIG_TYPE_V && !instr->src1.value->IsConstant()) { if (!instr->src1_use->next) { @@ -117,7 +122,8 @@ int RegisterAllocationPass::Run(HIRBuilder* builder) { // Must not have been set already. XEASSERTNULL(instr->dest->reg.set); - // Sort the usage list. We depend on this in future uses of this variable. + // Sort the usage list. We depend on this in future uses of this + // variable. SortUsageList(instr->dest); // If we have a preferred register, use that. @@ -181,7 +187,6 @@ void RegisterAllocationPass::DumpUsage(const char* name) { #endif } - void RegisterAllocationPass::PrepareBlockState() { for (size_t i = 0; i < XECOUNT(usage_sets_.all_sets); ++i) { auto usage_set = usage_sets_.all_sets[i]; @@ -249,9 +254,8 @@ bool RegisterAllocationPass::IsRegInUse(const RegAssignment& reg) { return !usage_set->availability.test(reg.index); } -RegisterAllocationPass::RegisterSetUsage* -RegisterAllocationPass::MarkRegUsed(const RegAssignment& reg, - Value* value, Value::Use* use) { +RegisterAllocationPass::RegisterSetUsage* RegisterAllocationPass::MarkRegUsed( + const RegAssignment& reg, Value* value, Value::Use* use) { auto usage_set = RegisterSetForValue(value); usage_set->availability.set(reg.index, false); usage_set->upcoming_uses.emplace_back(value, use); @@ -298,7 +302,8 @@ bool RegisterAllocationPass::TryAllocateRegister(Value* value) { // Find the first free register, if any. // We have to ensure it's a valid one (in our count). unsigned long first_unused = 0; - bool all_used = _BitScanForward(&first_unused, usage_set->availability.to_ulong()) == 0; + bool all_used = + _BitScanForward(&first_unused, usage_set->availability.to_ulong()) == 0; if (!all_used && first_unused < usage_set->count) { // Available! Use it!. value->reg.set = usage_set->set; @@ -311,8 +316,8 @@ bool RegisterAllocationPass::TryAllocateRegister(Value* value) { return false; } -bool RegisterAllocationPass::SpillOneRegister( - HIRBuilder* builder, TypeName required_type) { +bool RegisterAllocationPass::SpillOneRegister(HIRBuilder* builder, + TypeName required_type) { // Get the set that we will be picking from. RegisterSetUsage* usage_set; if (required_type <= INT64_TYPE) { @@ -326,17 +331,17 @@ bool RegisterAllocationPass::SpillOneRegister( DumpUsage("SpillOneRegister (pre)"); // Pick the one with the furthest next use. XEASSERT(!usage_set->upcoming_uses.empty()); - auto furthest_usage = std::max_element( - usage_set->upcoming_uses.begin(), usage_set->upcoming_uses.end(), - RegisterUsage::Comparer()); - Value* spill_value = furthest_usage->value; + auto furthest_usage = std::max_element(usage_set->upcoming_uses.begin(), + usage_set->upcoming_uses.end(), + RegisterUsage::Comparer()); + auto spill_value = furthest_usage->value; Value::Use* prev_use = furthest_usage->use->prev; Value::Use* next_use = furthest_usage->use; XEASSERTNOTNULL(next_use); usage_set->upcoming_uses.erase(furthest_usage); DumpUsage("SpillOneRegister (post)"); const auto reg = spill_value->reg; - + // We know the spill_value use list is sorted, so we can cut it right now. // This makes it easier down below. auto new_head_use = next_use; @@ -367,7 +372,8 @@ bool RegisterAllocationPass::SpillOneRegister( spill_value->last_use = spill_store; } else if (prev_use) { // We insert the store immediately before the previous use. - // If we were smarter we could then re-run allocation and reuse the register + // If we were smarter we could then re-run allocation and reuse the + // register // once dropped. spill_store->MoveBefore(prev_use->instr); @@ -396,7 +402,7 @@ bool RegisterAllocationPass::SpillOneRegister( auto new_value = builder->LoadLocal(spill_value->local_slot); auto spill_load = builder->last_instr(); spill_load->MoveBefore(next_use->instr); - // Note: implicit first use added. +// Note: implicit first use added. #if ASSERT_NO_CYCLES builder->AssertNoCycles(); @@ -448,8 +454,7 @@ bool RegisterAllocationPass::SpillOneRegister( } RegisterAllocationPass::RegisterSetUsage* -RegisterAllocationPass::RegisterSetForValue( - const Value* value) { +RegisterAllocationPass::RegisterSetForValue(const Value* value) { if (value->type <= INT64_TYPE) { return usage_sets_.int_set; } else if (value->type <= FLOAT64_TYPE) { @@ -498,16 +503,24 @@ void RegisterAllocationPass::SortUsageList(Value* value) { Value::Use* e = nullptr; if (psize == 0) { // p is empty; e must come from q - e = q; q = q->next; qsize--; + e = q; + q = q->next; + qsize--; } else if (qsize == 0 || !q) { // q is empty; e must come from p - e = p; p = p->next; psize--; + e = p; + p = p->next; + psize--; } else if (CompareValueUse(p, q) <= 0) { // First element of p is lower (or same); e must come from p - e = p; p = p->next; psize--; + e = p; + p = p->next; + psize--; } else { // First element of q is lower; e must come from q - e = q; q = q->next; qsize--; + e = q; + q = q->next; + qsize--; } // add the next element to the merged list if (tail) { @@ -537,3 +550,7 @@ void RegisterAllocationPass::SortUsageList(Value* value) { value->use_head = head; value->last_use = tail->instr; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/register_allocation_pass.h b/src/alloy/compiler/passes/register_allocation_pass.h index aa5943aea..47b88cae0 100644 --- a/src/alloy/compiler/passes/register_allocation_pass.h +++ b/src/alloy/compiler/passes/register_allocation_pass.h @@ -17,20 +17,18 @@ #include #include - namespace alloy { namespace compiler { namespace passes { - class RegisterAllocationPass : public CompilerPass { -public: + public: RegisterAllocationPass(const backend::MachineInfo* machine_info); virtual ~RegisterAllocationPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: // TODO(benvanik): rewrite all this set shit -- too much indirection, the // complexity is not needed. struct RegisterUsage { @@ -70,7 +68,7 @@ private: void SortUsageList(hir::Value* value); -private: + private: const backend::MachineInfo* machine_info_; struct { RegisterSetUsage* int_set = nullptr; @@ -80,10 +78,8 @@ private: } usage_sets_; }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_REGISTER_ALLOCATION_PASS_H_ diff --git a/src/alloy/compiler/passes/simplification_pass.cc b/src/alloy/compiler/passes/simplification_pass.cc index 7fc53c940..22ec69820 100644 --- a/src/alloy/compiler/passes/simplification_pass.cc +++ b/src/alloy/compiler/passes/simplification_pass.cc @@ -9,18 +9,20 @@ #include -using namespace alloy; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::hir::Value; -SimplificationPass::SimplificationPass() : - CompilerPass() { -} +SimplificationPass::SimplificationPass() : CompilerPass() {} -SimplificationPass::~SimplificationPass() { -} +SimplificationPass::~SimplificationPass() {} int SimplificationPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -65,7 +67,7 @@ void SimplificationPass::CheckTruncate(Instr* i) { // Walk backward up src's chain looking for an extend. We may have // assigns, so skip those. auto src = i->src1.value; - Instr* def = src->def; + auto def = src->def; while (def && def->opcode == &OPCODE_ASSIGN_info) { // Skip asignments. def = def->src1.value->def; @@ -93,7 +95,7 @@ void SimplificationPass::CheckByteSwap(Instr* i) { // Walk backward up src's chain looking for a byte swap. We may have // assigns, so skip those. auto src = i->src1.value; - Instr* def = src->def; + auto def = src->def; while (def && def->opcode == &OPCODE_ASSIGN_info) { // Skip asignments. def = def->src1.value->def; @@ -147,11 +149,11 @@ void SimplificationPass::SimplifyAssignments(HIRBuilder* builder) { } Value* SimplificationPass::CheckValue(Value* value) { - Instr* def = value->def; + auto def = value->def; if (def && def->opcode == &OPCODE_ASSIGN_info) { // Value comes from an assignment - recursively find if it comes from // another assignment. It probably doesn't, if we already replaced it. - Value* replacement = def->src1.value; + auto replacement = def->src1.value; while (true) { def = replacement->def; if (!def || def->opcode != &OPCODE_ASSIGN_info) { @@ -163,3 +165,7 @@ Value* SimplificationPass::CheckValue(Value* value) { } return value; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/simplification_pass.h b/src/alloy/compiler/passes/simplification_pass.h index 19e1023fb..6806d48c7 100644 --- a/src/alloy/compiler/passes/simplification_pass.h +++ b/src/alloy/compiler/passes/simplification_pass.h @@ -12,20 +12,18 @@ #include - namespace alloy { namespace compiler { namespace passes { - class SimplificationPass : public CompilerPass { -public: + public: SimplificationPass(); virtual ~SimplificationPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: void EliminateConversions(hir::HIRBuilder* builder); void CheckTruncate(hir::Instr* i); void CheckByteSwap(hir::Instr* i); @@ -34,10 +32,8 @@ private: hir::Value* CheckValue(hir::Value* value); }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_SIMPLIFICATION_PASS_H_ diff --git a/src/alloy/compiler/passes/validation_pass.cc b/src/alloy/compiler/passes/validation_pass.cc index 265c82fe9..4ddb06cf2 100644 --- a/src/alloy/compiler/passes/validation_pass.cc +++ b/src/alloy/compiler/passes/validation_pass.cc @@ -13,21 +13,22 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::Block; +using alloy::hir::HIRBuilder; +using alloy::hir::Instr; +using alloy::hir::OpcodeSignatureType; +using alloy::hir::Value; -ValidationPass::ValidationPass() : - CompilerPass() { -} +ValidationPass::ValidationPass() : CompilerPass() {} -ValidationPass::~ValidationPass() { -} +ValidationPass::~ValidationPass() {} int ValidationPass::Run(HIRBuilder* builder) { SCOPE_profile_cpu_f("alloy"); @@ -90,7 +91,7 @@ int ValidationPass::ValidateInstruction(Block* block, Instr* instr) { } int ValidationPass::ValidateValue(Block* block, Instr* instr, Value* value) { - //if (value->def) { + // if (value->def) { // auto def = value->def; // XEASSERT(def->block == block); // if (def->block != block) { @@ -99,3 +100,7 @@ int ValidationPass::ValidateValue(Block* block, Instr* instr, Value* value) { //} return 0; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/validation_pass.h b/src/alloy/compiler/passes/validation_pass.h index a9f0c8f9a..47c474887 100644 --- a/src/alloy/compiler/passes/validation_pass.h +++ b/src/alloy/compiler/passes/validation_pass.h @@ -12,28 +12,24 @@ #include - namespace alloy { namespace compiler { namespace passes { - class ValidationPass : public CompilerPass { -public: + public: ValidationPass(); virtual ~ValidationPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: int ValidateInstruction(hir::Block* block, hir::Instr* instr); int ValidateValue(hir::Block* block, hir::Instr* instr, hir::Value* value); }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_VALIDATION_PASS_H_ diff --git a/src/alloy/compiler/passes/value_reduction_pass.cc b/src/alloy/compiler/passes/value_reduction_pass.cc index 94453e294..94dbba0bb 100644 --- a/src/alloy/compiler/passes/value_reduction_pass.cc +++ b/src/alloy/compiler/passes/value_reduction_pass.cc @@ -19,21 +19,20 @@ #include #pragma warning(pop) -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::compiler::passes; -using namespace alloy::frontend; +namespace alloy { +namespace compiler { +namespace passes { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::HIRBuilder; +using alloy::hir::OpcodeInfo; +using alloy::hir::Value; -ValueReductionPass::ValueReductionPass() : - CompilerPass() { -} +ValueReductionPass::ValueReductionPass() : CompilerPass() {} -ValueReductionPass::~ValueReductionPass() { -} +ValueReductionPass::~ValueReductionPass() {} void ValueReductionPass::ComputeLastUse(Value* value) { // TODO(benvanik): compute during construction? @@ -137,3 +136,7 @@ int ValueReductionPass::Run(HIRBuilder* builder) { return 0; } + +} // namespace passes +} // namespace compiler +} // namespace alloy diff --git a/src/alloy/compiler/passes/value_reduction_pass.h b/src/alloy/compiler/passes/value_reduction_pass.h index 3c6bc72af..95a9eaac0 100644 --- a/src/alloy/compiler/passes/value_reduction_pass.h +++ b/src/alloy/compiler/passes/value_reduction_pass.h @@ -12,27 +12,23 @@ #include - namespace alloy { namespace compiler { namespace passes { - class ValueReductionPass : public CompilerPass { -public: + public: ValueReductionPass(); virtual ~ValueReductionPass(); virtual int Run(hir::HIRBuilder* builder); -private: + private: void ComputeLastUse(hir::Value* value); }; - } // namespace passes } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_PASSES_VALUE_REDUCTION_PASS_H_ diff --git a/src/alloy/compiler/tracing.h b/src/alloy/compiler/tracing.h index 85d99992a..5763d6cb0 100644 --- a/src/alloy/compiler/tracing.h +++ b/src/alloy/compiler/tracing.h @@ -13,18 +13,16 @@ #include #include - namespace alloy { namespace compiler { const uint32_t ALLOY_COMPILER = alloy::tracing::EventType::ALLOY_COMPILER; - class EventType { -public: + public: enum { - ALLOY_COMPILER_INIT = ALLOY_COMPILER | (1), - ALLOY_COMPILER_DEINIT = ALLOY_COMPILER | (2), + ALLOY_COMPILER_INIT = ALLOY_COMPILER | (1), + ALLOY_COMPILER_DEINIT = ALLOY_COMPILER | (2), }; typedef struct Init_s { @@ -35,9 +33,7 @@ public: } Deinit; }; - } // namespace compiler } // namespace alloy - #endif // ALLOY_COMPILER_TRACING_H_ diff --git a/src/alloy/core.h b/src/alloy/core.h index cf8c95c44..df3724e7b 100644 --- a/src/alloy/core.h +++ b/src/alloy/core.h @@ -17,61 +17,76 @@ #include #include - namespace alloy { typedef struct XECACHEALIGN vec128_s { union { struct { - float x; - float y; - float z; - float w; + float x; + float y; + float z; + float w; }; struct { - uint32_t ix; - uint32_t iy; - uint32_t iz; - uint32_t iw; + uint32_t ix; + uint32_t iy; + uint32_t iz; + uint32_t iw; }; - float f4[4]; - uint32_t i4[4]; - uint16_t s8[8]; - uint8_t b16[16]; + float f4[4]; + uint32_t i4[4]; + uint16_t s8[8]; + uint8_t b16[16]; struct { - uint64_t low; - uint64_t high; + uint64_t low; + uint64_t high; }; }; - bool operator== (const vec128_s& b) const { + bool operator==(const vec128_s& b) const { return low == b.low && high == b.high; } } vec128_t; XEFORCEINLINE vec128_t vec128i(uint32_t x, uint32_t y, uint32_t z, uint32_t w) { vec128_t v; - v.i4[0] = x; v.i4[1] = y; v.i4[2] = z; v.i4[3] = w; + v.i4[0] = x; + v.i4[1] = y; + v.i4[2] = z; + v.i4[3] = w; return v; } XEFORCEINLINE vec128_t vec128f(float x, float y, float z, float w) { vec128_t v; - v.f4[0] = x; v.f4[1] = y; v.f4[2] = z; v.f4[3] = w; + v.f4[0] = x; + v.f4[1] = y; + v.f4[2] = z; + v.f4[3] = w; return v; } -XEFORCEINLINE vec128_t vec128b( - uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, - uint8_t y0, uint8_t y1, uint8_t y2, uint8_t y3, - uint8_t z0, uint8_t z1, uint8_t z2, uint8_t z3, - uint8_t w0, uint8_t w1, uint8_t w2, uint8_t w3) { +XEFORCEINLINE vec128_t vec128b(uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, + uint8_t y0, uint8_t y1, uint8_t y2, uint8_t y3, + uint8_t z0, uint8_t z1, uint8_t z2, uint8_t z3, + uint8_t w0, uint8_t w1, uint8_t w2, uint8_t w3) { vec128_t v; - v.b16[0] = x3; v.b16[1] = x2; v.b16[2] = x1; v.b16[3] = x0; - v.b16[4] = y3; v.b16[5] = y2; v.b16[6] = y1; v.b16[7] = y0; - v.b16[8] = z3; v.b16[9] = z2; v.b16[10] = z1; v.b16[11] = z0; - v.b16[12] = w3; v.b16[13] = w2; v.b16[14] = w1; v.b16[15] = w0; + v.b16[0] = x3; + v.b16[1] = x2; + v.b16[2] = x1; + v.b16[3] = x0; + v.b16[4] = y3; + v.b16[5] = y2; + v.b16[6] = y1; + v.b16[7] = y0; + v.b16[8] = z3; + v.b16[9] = z2; + v.b16[10] = z1; + v.b16[11] = z0; + v.b16[12] = w3; + v.b16[13] = w2; + v.b16[14] = w1; + v.b16[15] = w0; return v; } } // namespace alloy - #endif // ALLOY_CORE_H_ diff --git a/src/alloy/delegate.h b/src/alloy/delegate.h index 2cbfde0ac..1d0344f29 100644 --- a/src/alloy/delegate.h +++ b/src/alloy/delegate.h @@ -16,15 +16,13 @@ #include - namespace alloy { - // TODO(benvanik): go lockfree, and don't hold the lock while emitting. template class Delegate { -public: + public: typedef std::function listener_t; void AddListener(listener_t const& listener) { @@ -49,18 +47,16 @@ public: void operator()(T& e) { std::lock_guard guard(lock_); - for (auto &listener : listeners_) { + for (auto& listener : listeners_) { listener(e); } } -private: + private: std::mutex lock_; std::vector listeners_; }; - } // namespace alloy - #endif // ALLOY_DELEGATE_H_ diff --git a/src/alloy/frontend/context_info.cc b/src/alloy/frontend/context_info.cc index d93a2f2d6..126b77448 100644 --- a/src/alloy/frontend/context_info.cc +++ b/src/alloy/frontend/context_info.cc @@ -9,14 +9,13 @@ #include -using namespace alloy; -using namespace alloy::frontend; +namespace alloy { +namespace frontend { +ContextInfo::ContextInfo(size_t size, uintptr_t thread_state_offset) + : size_(size), thread_state_offset_(thread_state_offset) {} -ContextInfo::ContextInfo(size_t size, uintptr_t thread_state_offset) : - size_(size), - thread_state_offset_(thread_state_offset) { -} +ContextInfo::~ContextInfo() {} -ContextInfo::~ContextInfo() { -} +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/context_info.h b/src/alloy/frontend/context_info.h index 542d6a40c..47cc8ae06 100644 --- a/src/alloy/frontend/context_info.h +++ b/src/alloy/frontend/context_info.h @@ -12,13 +12,11 @@ #include - namespace alloy { namespace frontend { - class ContextInfo { -public: + public: ContextInfo(size_t size, uintptr_t thread_state_offset); ~ContextInfo(); @@ -26,14 +24,12 @@ public: uintptr_t thread_state_offset() const { return thread_state_offset_; } -private: + private: size_t size_; uintptr_t thread_state_offset_; }; - } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_CONTEXT_INFO_H_ diff --git a/src/alloy/frontend/frontend.cc b/src/alloy/frontend/frontend.cc index 68ad147ef..bd0651465 100644 --- a/src/alloy/frontend/frontend.cc +++ b/src/alloy/frontend/frontend.cc @@ -12,23 +12,17 @@ #include #include -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::runtime; +namespace alloy { +namespace frontend { +Frontend::Frontend(runtime::Runtime* runtime) + : runtime_(runtime), context_info_(0) {} -Frontend::Frontend(Runtime* runtime) : - runtime_(runtime), context_info_(0) { -} +Frontend::~Frontend() { delete context_info_; } -Frontend::~Frontend() { - delete context_info_; -} +Memory* Frontend::memory() const { return runtime_->memory(); } -Memory* Frontend::memory() const { - return runtime_->memory(); -} +int Frontend::Initialize() { return 0; } -int Frontend::Initialize() { - return 0; -} +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/frontend.h b/src/alloy/frontend/frontend.h index c8a13b027..33662ea3e 100644 --- a/src/alloy/frontend/frontend.h +++ b/src/alloy/frontend/frontend.h @@ -16,17 +16,17 @@ #include #include - -namespace alloy { namespace runtime { - class Runtime; -} } +namespace alloy { +namespace runtime { +class Runtime; +} // namespace runtime +} // namespace alloy namespace alloy { namespace frontend { - class Frontend { -public: + public: Frontend(runtime::Runtime* runtime); virtual ~Frontend(); @@ -36,20 +36,17 @@ public: virtual int Initialize(); - virtual int DeclareFunction( - runtime::FunctionInfo* symbol_info) = 0; - virtual int DefineFunction( - runtime::FunctionInfo* symbol_info, uint32_t debug_info_flags, - runtime::Function** out_function) = 0; + virtual int DeclareFunction(runtime::FunctionInfo* symbol_info) = 0; + virtual int DefineFunction(runtime::FunctionInfo* symbol_info, + uint32_t debug_info_flags, + runtime::Function** out_function) = 0; -protected: + protected: runtime::Runtime* runtime_; ContextInfo* context_info_; }; - } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_FRONTEND_H_ diff --git a/src/alloy/frontend/ppc/ppc_context.cc b/src/alloy/frontend/ppc/ppc_context.cc index 8b3344bf6..b6eeb336c 100644 --- a/src/alloy/frontend/ppc/ppc_context.cc +++ b/src/alloy/frontend/ppc/ppc_context.cc @@ -9,19 +9,11 @@ #include -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; - - -namespace { - -uint64_t ParseInt64(const char* value) { - return xestrtoulla(value, NULL, 0); -} - -} +namespace alloy { +namespace frontend { +namespace ppc { +uint64_t ParseInt64(const char* value) { return xestrtoulla(value, NULL, 0); } void PPCContext::SetRegFromString(const char* name, const char* value) { int n; @@ -32,9 +24,8 @@ void PPCContext::SetRegFromString(const char* name, const char* value) { } } -bool PPCContext::CompareRegWithString( - const char* name, const char* value, - char* out_value, size_t out_value_size) { +bool PPCContext::CompareRegWithString(const char* name, const char* value, + char* out_value, size_t out_value_size) { int n; if (sscanf(name, "r%d", &n) == 1) { uint64_t expected = ParseInt64(value); @@ -48,3 +39,7 @@ bool PPCContext::CompareRegWithString( return false; } } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_disasm.cc b/src/alloy/frontend/ppc/ppc_disasm.cc index aa823a972..98f7a7746 100644 --- a/src/alloy/frontend/ppc/ppc_disasm.cc +++ b/src/alloy/frontend/ppc/ppc_disasm.cc @@ -9,10 +9,6 @@ #include - -using namespace alloy::frontend::ppc; - - namespace alloy { namespace frontend { namespace ppc { @@ -26,221 +22,210 @@ void Disasm__(InstrData& i, StringBuffer* str) { } void Disasm_X_FRT_FRB(InstrData& i, StringBuffer* str) { - str->Append("%*s%s f%d, f%d", i.X.Rc ? -7 : -8, i.type->name, i.X.Rc ? "." : "", - i.X.RT, i.X.RB); + str->Append("%*s%s f%d, f%d", i.X.Rc ? -7 : -8, i.type->name, + i.X.Rc ? "." : "", i.X.RT, i.X.RB); } void Disasm_A_FRT_FRB(InstrData& i, StringBuffer* str) { - str->Append("%*s%s f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, i.A.Rc ? "." : "", - i.A.FRT, i.A.FRB); + str->Append("%*s%s f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, + i.A.Rc ? "." : "", i.A.FRT, i.A.FRB); } void Disasm_A_FRT_FRA_FRB(InstrData& i, StringBuffer* str) { - str->Append("%*s%s f%d, f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, i.A.Rc ? "." : "", - i.A.FRT, i.A.FRA, i.A.FRB); + str->Append("%*s%s f%d, f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, + i.A.Rc ? "." : "", i.A.FRT, i.A.FRA, i.A.FRB); } void Disasm_A_FRT_FRA_FRB_FRC(InstrData& i, StringBuffer* str) { - str->Append("%*s%s f%d, f%d, f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, i.A.Rc ? "." : "", - i.A.FRT, i.A.FRA, i.A.FRB, i.A.FRC); + str->Append("%*s%s f%d, f%d, f%d, f%d", i.A.Rc ? -7 : -8, i.type->name, + i.A.Rc ? "." : "", i.A.FRT, i.A.FRA, i.A.FRB, i.A.FRC); } void Disasm_X_RT_RA_RB(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.X.RT, i.X.RA, i.X.RB); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.X.RT, i.X.RA, i.X.RB); } void Disasm_X_RT_RA0_RB(InstrData& i, StringBuffer* str) { if (i.X.RA) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.X.RT, i.X.RA, i.X.RB); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.X.RT, i.X.RA, i.X.RB); } else { - str->Append("%-8s r%d, 0, %d", i.type->name, - i.X.RT, i.X.RB); + str->Append("%-8s r%d, 0, %d", i.type->name, i.X.RT, i.X.RB); } } void Disasm_X_FRT_RA_RB(InstrData& i, StringBuffer* str) { - str->Append("%-8s f%d, r%d, %d", i.type->name, - i.X.RT, i.X.RA, i.X.RB); + str->Append("%-8s f%d, r%d, %d", i.type->name, i.X.RT, i.X.RA, i.X.RB); } void Disasm_X_FRT_RA0_RB(InstrData& i, StringBuffer* str) { if (i.X.RA) { - str->Append("%-8s f%d, r%d, %d", i.type->name, - i.X.RT, i.X.RA, i.X.RB); + str->Append("%-8s f%d, r%d, %d", i.type->name, i.X.RT, i.X.RA, i.X.RB); } else { - str->Append("%-8s f%d, 0, %d", i.type->name, - i.X.RT, i.X.RB); + str->Append("%-8s f%d, 0, %d", i.type->name, i.X.RT, i.X.RB); } } void Disasm_D_RT_RA_I(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.D.RT, i.D.RA, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.D.RT, i.D.RA, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } void Disasm_D_RT_RA0_I(InstrData& i, StringBuffer* str) { if (i.D.RA) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.D.RT, i.D.RA, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.D.RT, i.D.RA, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } else { - str->Append("%-8s r%d, 0, %d", i.type->name, - i.D.RT, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s r%d, 0, %d", i.type->name, i.D.RT, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } } void Disasm_D_FRT_RA_I(InstrData& i, StringBuffer* str) { - str->Append("%-8s f%d, r%d, %d", i.type->name, - i.D.RT, i.D.RA, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s f%d, r%d, %d", i.type->name, i.D.RT, i.D.RA, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } void Disasm_D_FRT_RA0_I(InstrData& i, StringBuffer* str) { if (i.D.RA) { - str->Append("%-8s f%d, r%d, %d", i.type->name, - i.D.RT, i.D.RA, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s f%d, r%d, %d", i.type->name, i.D.RT, i.D.RA, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } else { - str->Append("%-8s f%d, 0, %d", i.type->name, - i.D.RT, (int32_t)(int16_t)XEEXTS16(i.D.DS)); + str->Append("%-8s f%d, 0, %d", i.type->name, i.D.RT, + (int32_t)(int16_t)XEEXTS16(i.D.DS)); } } void Disasm_DS_RT_RA_I(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.DS.RT, i.DS.RA, (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.DS.RT, i.DS.RA, + (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); } void Disasm_DS_RT_RA0_I(InstrData& i, StringBuffer* str) { if (i.DS.RA) { - str->Append("%-8s r%d, r%d, %d", i.type->name, - i.DS.RT, i.DS.RA, (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); + str->Append("%-8s r%d, r%d, %d", i.type->name, i.DS.RT, i.DS.RA, + (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); } else { - str->Append("%-8s r%d, 0, %d", i.type->name, - i.DS.RT, (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); + str->Append("%-8s r%d, 0, %d", i.type->name, i.DS.RT, + (int32_t)(int16_t)XEEXTS16(i.DS.DS << 2)); } } void Disasm_D_RA(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d", i.type->name, - i.D.RA); + str->Append("%-8s r%d", i.type->name, i.D.RA); } void Disasm_X_RA_RB(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, r%d", i.type->name, - i.X.RA, i.X.RB); + str->Append("%-8s r%d, r%d", i.type->name, i.X.RA, i.X.RB); } void Disasm_XO_RT_RA_RB(InstrData& i, StringBuffer* str) { str->Append("%*s%s%s r%d, r%d, r%d", i.XO.Rc ? -7 : -8, i.type->name, - i.XO.OE ? "o" : "", i.XO.Rc ? "." : "", - i.XO.RT, i.XO.RA, i.XO.RB); + i.XO.OE ? "o" : "", i.XO.Rc ? "." : "", i.XO.RT, i.XO.RA, + i.XO.RB); } void Disasm_XO_RT_RA(InstrData& i, StringBuffer* str) { str->Append("%*s%s%s r%d, r%d", i.XO.Rc ? -7 : -8, i.type->name, - i.XO.OE ? "o" : "", i.XO.Rc ? "." : "", - i.XO.RT, i.XO.RA); + i.XO.OE ? "o" : "", i.XO.Rc ? "." : "", i.XO.RT, i.XO.RA); } void Disasm_X_RA_RT_RB(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d, r%d", i.X.Rc ? -7 : -8, i.type->name, i.X.Rc ? "." : "", - i.X.RA, i.X.RT, i.X.RB); + str->Append("%*s%s r%d, r%d, r%d", i.X.Rc ? -7 : -8, i.type->name, + i.X.Rc ? "." : "", i.X.RA, i.X.RT, i.X.RB); } void Disasm_D_RA_RT_I(InstrData& i, StringBuffer* str) { - str->Append("%-7s. r%d, r%d, %.4Xh", i.type->name, - i.D.RA, i.D.RT, i.D.DS); + str->Append("%-7s. r%d, r%d, %.4Xh", i.type->name, i.D.RA, i.D.RT, i.D.DS); } void Disasm_X_RA_RT(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d", i.X.Rc ? -7 : -8, i.type->name, i.X.Rc ? "." : "", - i.X.RA, i.X.RT); + str->Append("%*s%s r%d, r%d", i.X.Rc ? -7 : -8, i.type->name, + i.X.Rc ? "." : "", i.X.RA, i.X.RT); } -#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) -#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) -#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) -#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) -#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) -#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) -#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) -#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) +#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) +#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) +#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) +#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) +#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) +#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) +#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) +#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) #define VX128_VD128 (i.VX128.VD128l | (i.VX128.VD128h << 5)) -#define VX128_VA128 (i.VX128.VA128l | (i.VX128.VA128h << 5) | (i.VX128.VA128H << 6)) +#define VX128_VA128 \ + (i.VX128.VA128l | (i.VX128.VA128h << 5) | (i.VX128.VA128H << 6)) #define VX128_VB128 (i.VX128.VB128l | (i.VX128.VB128h << 5)) #define VX128_1_VD128 (i.VX128_1.VD128l | (i.VX128_1.VD128h << 5)) #define VX128_2_VD128 (i.VX128_2.VD128l | (i.VX128_2.VD128h << 5)) -#define VX128_2_VA128 (i.VX128_2.VA128l | (i.VX128_2.VA128h << 5) | (i.VX128_2.VA128H << 6)) +#define VX128_2_VA128 \ + (i.VX128_2.VA128l | (i.VX128_2.VA128h << 5) | (i.VX128_2.VA128H << 6)) #define VX128_2_VB128 (i.VX128_2.VB128l | (i.VX128_2.VD128h << 5)) -#define VX128_2_VC (i.VX128_2.VC) +#define VX128_2_VC (i.VX128_2.VC) #define VX128_3_VD128 (i.VX128_3.VD128l | (i.VX128_3.VD128h << 5)) #define VX128_3_VB128 (i.VX128_3.VB128l | (i.VX128_3.VB128h << 5)) -#define VX128_3_IMM (i.VX128_3.IMM) +#define VX128_3_IMM (i.VX128_3.IMM) #define VX128_4_VD128 (i.VX128_4.VD128l | (i.VX128_4.VD128h << 5)) #define VX128_4_VB128 (i.VX128_4.VB128l | (i.VX128_4.VB128h << 5)) #define VX128_5_VD128 (i.VX128_5.VD128l | (i.VX128_5.VD128h << 5)) -#define VX128_5_VA128 (i.VX128_5.VA128l | (i.VX128_5.VA128h << 5)) | (i.VX128_5.VA128H << 6) +#define VX128_5_VA128 \ + (i.VX128_5.VA128l | (i.VX128_5.VA128h << 5)) | (i.VX128_5.VA128H << 6) #define VX128_5_VB128 (i.VX128_5.VB128l | (i.VX128_5.VB128h << 5)) -#define VX128_5_SH (i.VX128_5.SH) +#define VX128_5_SH (i.VX128_5.SH) #define VX128_R_VD128 (i.VX128_R.VD128l | (i.VX128_R.VD128h << 5)) -#define VX128_R_VA128 (i.VX128_R.VA128l | (i.VX128_R.VA128h << 5) | (i.VX128_R.VA128H << 6)) +#define VX128_R_VA128 \ + (i.VX128_R.VA128l | (i.VX128_R.VA128h << 5) | (i.VX128_R.VA128H << 6)) #define VX128_R_VB128 (i.VX128_R.VB128l | (i.VX128_R.VB128h << 5)) - + void Disasm_X_VX_RA0_RB(InstrData& i, StringBuffer* str) { if (i.X.RA) { - str->Append("%-8s v%d, r%d, r%d", i.type->name, - i.X.RT, i.X.RA, i.X.RB); + str->Append("%-8s v%d, r%d, r%d", i.type->name, i.X.RT, i.X.RA, i.X.RB); } else { - str->Append("%-8s v%d, 0, r%d", i.type->name, - i.X.RT, i.X.RB); + str->Append("%-8s v%d, 0, r%d", i.type->name, i.X.RT, i.X.RB); } } void Disasm_VX1281_VD_RA0_RB(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_1_VD128; if (i.VX128_1.RA) { - str->Append("%-8s v%d, r%d, r%d", i.type->name, - vd, i.VX128_1.RA, i.VX128_1.RB); + str->Append("%-8s v%d, r%d, r%d", i.type->name, vd, i.VX128_1.RA, + i.VX128_1.RB); } else { - str->Append("%-8s v%d, 0, r%d", i.type->name, - vd, i.VX128_1.RB); + str->Append("%-8s v%d, 0, r%d", i.type->name, vd, i.VX128_1.RB); } } void Disasm_VX1283_VD_VB(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_3_VD128; const uint32_t vb = VX128_3_VB128; - str->Append("%-8s v%d, v%d", i.type->name, - vd, vb); + str->Append("%-8s v%d, v%d", i.type->name, vd, vb); } void Disasm_VX1283_VD_VB_I(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_VD128; const uint32_t va = VX128_VA128; const uint32_t uimm = i.VX128_3.IMM; - str->Append("%-8s v%d, v%d, %.2Xh", i.type->name, - vd, va, uimm); + str->Append("%-8s v%d, v%d, %.2Xh", i.type->name, vd, va, uimm); } void Disasm_VX_VD_VA_VB(InstrData& i, StringBuffer* str) { - str->Append("%-8s v%d, v%d, v%d", i.type->name, - i.VX.VD, i.VX.VA, i.VX.VB); + str->Append("%-8s v%d, v%d, v%d", i.type->name, i.VX.VD, i.VX.VA, i.VX.VB); } void Disasm_VX128_VD_VA_VB(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_VD128; const uint32_t va = VX128_VA128; const uint32_t vb = VX128_VB128; - str->Append("%-8s v%d, v%d, v%d", i.type->name, - vd, va, vb); + str->Append("%-8s v%d, v%d, v%d", i.type->name, vd, va, vb); } void Disasm_VX128_VD_VA_VD_VB(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_VD128; const uint32_t va = VX128_VA128; const uint32_t vb = VX128_VB128; - str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, - vd, va, vd, vb); + str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, vd, va, vd, vb); } void Disasm_VX1282_VD_VA_VB_VC(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_2_VD128; const uint32_t va = VX128_2_VA128; const uint32_t vb = VX128_2_VB128; const uint32_t vc = i.VX128_2.VC; - str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, - vd, va, vb, vc); + str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, vd, va, vb, vc); } void Disasm_VXA_VD_VA_VB_VC(InstrData& i, StringBuffer* str) { - str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, - i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC); + str->Append("%-8s v%d, v%d, v%d, v%d", i.type->name, i.VXA.VD, i.VXA.VA, + i.VXA.VB, i.VXA.VC); } void Disasm_sync(InstrData& i, StringBuffer* str) { const char* name; int L = i.X.RT & 3; switch (L) { - case 0: name = "hwsync"; break; - case 1: name = "lwsync"; break; - default: - case 2: - case 3: - name = "sync"; - break; + case 0: + name = "hwsync"; + break; + case 1: + name = "lwsync"; + break; + default: + case 2: + case 3: + name = "sync"; + break; } str->Append("%-8s %.2X", name, L); } @@ -248,10 +233,18 @@ void Disasm_sync(InstrData& i, StringBuffer* str) { void Disasm_dcbf(InstrData& i, StringBuffer* str) { const char* name; switch (i.X.RT & 3) { - case 0: name = "dcbf"; break; - case 1: name = "dcbfl"; break; - case 2: name = "dcbf.RESERVED"; break; - case 3: name = "dcbflp"; break; + case 0: + name = "dcbf"; + break; + case 1: + name = "dcbfl"; + break; + case 2: + name = "dcbf.RESERVED"; + break; + case 3: + name = "dcbflp"; + break; } str->Append("%-8s r%d, r%d", name, i.X.RA, i.X.RB); } @@ -266,13 +259,12 @@ void Disasm_dcbz(InstrData& i, StringBuffer* str) { } void Disasm_fcmp(InstrData& i, StringBuffer* str) { - str->Append("%-8s cr%d, f%d, f%d", i.type->name, - i.X.RT >> 2, i.X.RA, i.X.RB); + str->Append("%-8s cr%d, f%d, f%d", i.type->name, i.X.RT >> 2, i.X.RA, i.X.RB); } void Disasm_mffsx(InstrData& i, StringBuffer* str) { - str->Append("%*s%s f%d, FPSCR", i.X.Rc ? -7 : -8, i.type->name, i.X.Rc ? "." : "", - i.X.RT); + str->Append("%*s%s f%d, FPSCR", i.X.Rc ? -7 : -8, i.type->name, + i.X.Rc ? "." : "", i.X.RT); } void Disasm_bx(InstrData& i, StringBuffer* str) { @@ -283,8 +275,7 @@ void Disasm_bx(InstrData& i, StringBuffer* str) { } else { nia = (uint32_t)(i.address + XEEXTS26(i.I.LI << 2)); } - str->Append("%-8s %.8X", name, - nia); + str->Append("%-8s %.8X", name, nia); // TODO(benvanik): resolve target name? } void Disasm_bcx(InstrData& i, StringBuffer* str) { @@ -295,7 +286,9 @@ void Disasm_bcx(InstrData& i, StringBuffer* str) { } else { s1 = ""; } - char s2[8] = { 'c', 'r', 0, }; + char s2[8] = { + 'c', 'r', 0, + }; if (!XESELECTBITS(i.B.BO, 4, 4)) { char* s2a = _itoa(i.B.BI >> 2, s2 + 2, 10); s2a += xestrlena(s2a); @@ -310,14 +303,15 @@ void Disasm_bcx(InstrData& i, StringBuffer* str) { } else { nia = (uint32_t)(i.address + XEEXTS16(i.B.BD << 2)); } - str->Append("%-8s %s%s%s%.8X", i.type->name, - s0, s1, s2, nia); + str->Append("%-8s %s%s%s%.8X", i.type->name, s0, s1, s2, nia); // TODO(benvanik): resolve target name? } void Disasm_bcctrx(InstrData& i, StringBuffer* str) { // TODO(benvanik): mnemonics const char* s0 = i.XL.LK ? "lr, " : ""; - char s2[8] = { 'c', 'r', 0, }; + char s2[8] = { + 'c', 'r', 0, + }; if (!XESELECTBITS(i.XL.BO, 4, 4)) { char* s2a = _itoa(i.XL.BI >> 2, s2 + 2, 10); s2a += xestrlena(s2a); @@ -326,8 +320,7 @@ void Disasm_bcctrx(InstrData& i, StringBuffer* str) { } else { s2[0] = 0; } - str->Append("%-8s %s%sctr", i.type->name, - s0, s2); + str->Append("%-8s %s%sctr", i.type->name, s0, s2); // TODO(benvanik): resolve target name? } void Disasm_bclrx(InstrData& i, StringBuffer* str) { @@ -341,7 +334,9 @@ void Disasm_bclrx(InstrData& i, StringBuffer* str) { } else { s1 = ""; } - char s2[8] = { 'c', 'r', 0, }; + char s2[8] = { + 'c', 'r', 0, + }; if (!XESELECTBITS(i.XL.BO, 4, 4)) { char* s2a = _itoa(i.XL.BI >> 2, s2 + 2, 10); s2a += xestrlena(s2a); @@ -350,179 +345,166 @@ void Disasm_bclrx(InstrData& i, StringBuffer* str) { } else { s2[0] = 0; } - str->Append("%-8s %s%s", name, - s1, s2); + str->Append("%-8s %s%s", name, s1, s2); } void Disasm_mfcr(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, cr", i.type->name, - i.X.RT); + str->Append("%-8s r%d, cr", i.type->name, i.X.RT); } const char* Disasm_spr_name(uint32_t n) { const char* reg = "???"; switch (n) { - case 1: - reg = "xer"; - break; - case 8: - reg = "lr"; - break; - case 9: - reg = "ctr"; - break; + case 1: + reg = "xer"; + break; + case 8: + reg = "lr"; + break; + case 9: + reg = "ctr"; + break; } return reg; } void Disasm_mfspr(InstrData& i, StringBuffer* str) { const uint32_t n = ((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F); const char* reg = Disasm_spr_name(n); - str->Append("%-8s r%d, %s", i.type->name, - i.XFX.RT, reg); + str->Append("%-8s r%d, %s", i.type->name, i.XFX.RT, reg); } void Disasm_mtspr(InstrData& i, StringBuffer* str) { const uint32_t n = ((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F); const char* reg = Disasm_spr_name(n); - str->Append("%-8s %s, r%d", i.type->name, - reg, i.XFX.RT); + str->Append("%-8s %s, r%d", i.type->name, reg, i.XFX.RT); } void Disasm_mftb(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, tb", i.type->name, - i.XFX.RT); + str->Append("%-8s r%d, tb", i.type->name, i.XFX.RT); } void Disasm_mfmsr(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d", i.type->name, - i.X.RT); + str->Append("%-8s r%d", i.type->name, i.X.RT); } void Disasm_mtmsr(InstrData& i, StringBuffer* str) { - str->Append("%-8s r%d, %d", i.type->name, - i.X.RT, (i.X.RA & 16) ? 1 : 0); + str->Append("%-8s r%d, %d", i.type->name, i.X.RT, (i.X.RA & 16) ? 1 : 0); } void Disasm_cmp(InstrData& i, StringBuffer* str) { - str->Append("%-8s cr%d, %.2X, r%d, r%d", i.type->name, - i.X.RT >> 2, i.X.RT & 1, i.X.RA, i.X.RB); + str->Append("%-8s cr%d, %.2X, r%d, r%d", i.type->name, i.X.RT >> 2, + i.X.RT & 1, i.X.RA, i.X.RB); } void Disasm_cmpi(InstrData& i, StringBuffer* str) { - str->Append("%-8s cr%d, %.2X, r%d, %d", i.type->name, - i.D.RT >> 2, i.D.RT & 1, i.D.RA, XEEXTS16(i.D.DS)); + str->Append("%-8s cr%d, %.2X, r%d, %d", i.type->name, i.D.RT >> 2, i.D.RT & 1, + i.D.RA, XEEXTS16(i.D.DS)); } void Disasm_cmpli(InstrData& i, StringBuffer* str) { - str->Append("%-8s cr%d, %.2X, r%d, %.2X", i.type->name, - i.D.RT >> 2, i.D.RT & 1, i.D.RA, XEEXTS16(i.D.DS)); + str->Append("%-8s cr%d, %.2X, r%d, %.2X", i.type->name, i.D.RT >> 2, + i.D.RT & 1, i.D.RA, XEEXTS16(i.D.DS)); } void Disasm_rld(InstrData& i, StringBuffer* str) { if (i.MD.idx == 0) { // XEDISASMR(rldiclx, 0x78000000, MD ) - str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldicl", i.MD.Rc ? "." : "", - i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, (i.MD.MB5 << 5) | i.MD.MB); + str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldicl", + i.MD.Rc ? "." : "", i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, + (i.MD.MB5 << 5) | i.MD.MB); } else if (i.MD.idx == 1) { // XEDISASMR(rldicrx, 0x78000004, MD ) - str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldicr", i.MD.Rc ? "." : "", - i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, (i.MD.MB5 << 5) | i.MD.MB); + str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldicr", + i.MD.Rc ? "." : "", i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, + (i.MD.MB5 << 5) | i.MD.MB); } else if (i.MD.idx == 2) { // XEDISASMR(rldicx, 0x78000008, MD ) uint32_t sh = (i.MD.SH5 << 5) | i.MD.SH; uint32_t mb = (i.MD.MB5 << 5) | i.MD.MB; const char* name = (mb == 0x3E) ? "sldi" : "rldic"; - str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, name, i.MD.Rc ? "." : "", - i.MD.RA, i.MD.RT, sh, mb); + str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, name, + i.MD.Rc ? "." : "", i.MD.RA, i.MD.RT, sh, mb); } else if (i.MDS.idx == 8) { // XEDISASMR(rldclx, 0x78000010, MDS) - str->Append("%*s%s r%d, r%d, %d, %d", i.MDS.Rc ? -7 : -8, "rldcl", i.MDS.Rc ? "." : "", - i.MDS.RA, i.MDS.RT, i.MDS.RB, (i.MDS.MB5 << 5) | i.MDS.MB); + str->Append("%*s%s r%d, r%d, %d, %d", i.MDS.Rc ? -7 : -8, "rldcl", + i.MDS.Rc ? "." : "", i.MDS.RA, i.MDS.RT, i.MDS.RB, + (i.MDS.MB5 << 5) | i.MDS.MB); } else if (i.MDS.idx == 9) { // XEDISASMR(rldcrx, 0x78000012, MDS) - str->Append("%*s%s r%d, r%d, %d, %d", i.MDS.Rc ? -7 : -8, "rldcr", i.MDS.Rc ? "." : "", - i.MDS.RA, i.MDS.RT, i.MDS.RB, (i.MDS.MB5 << 5) | i.MDS.MB); + str->Append("%*s%s r%d, r%d, %d, %d", i.MDS.Rc ? -7 : -8, "rldcr", + i.MDS.Rc ? "." : "", i.MDS.RA, i.MDS.RT, i.MDS.RB, + (i.MDS.MB5 << 5) | i.MDS.MB); } else if (i.MD.idx == 3) { // XEDISASMR(rldimix, 0x7800000C, MD ) - str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldimi", i.MD.Rc ? "." : "", - i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, (i.MD.MB5 << 5) | i.MD.MB); + str->Append("%*s%s r%d, r%d, %d, %d", i.MD.Rc ? -7 : -8, "rldimi", + i.MD.Rc ? "." : "", i.MD.RA, i.MD.RT, (i.MD.SH5 << 5) | i.MD.SH, + (i.MD.MB5 << 5) | i.MD.MB); } else { XEASSERTALWAYS(); } } void Disasm_rlwim(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d, %d, %d, %d", i.M.Rc ? -7 : -8, i.type->name, i.M.Rc ? "." : "", - i.M.RA, i.M.RT, i.M.SH, i.M.MB, i.M.ME); + str->Append("%*s%s r%d, r%d, %d, %d, %d", i.M.Rc ? -7 : -8, i.type->name, + i.M.Rc ? "." : "", i.M.RA, i.M.RT, i.M.SH, i.M.MB, i.M.ME); } void Disasm_rlwnmx(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d, r%d, %d, %d", i.M.Rc ? -7 : -8, i.type->name, i.M.Rc ? "." : "", - i.M.RA, i.M.RT, i.M.SH, i.M.MB, i.M.ME); + str->Append("%*s%s r%d, r%d, r%d, %d, %d", i.M.Rc ? -7 : -8, i.type->name, + i.M.Rc ? "." : "", i.M.RA, i.M.RT, i.M.SH, i.M.MB, i.M.ME); } void Disasm_srawix(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d, %d", i.X.Rc ? -7 : -8, i.type->name, i.X.Rc ? "." : "", - i.X.RA, i.X.RT, i.X.RB); + str->Append("%*s%s r%d, r%d, %d", i.X.Rc ? -7 : -8, i.type->name, + i.X.Rc ? "." : "", i.X.RA, i.X.RT, i.X.RB); } void Disasm_sradix(InstrData& i, StringBuffer* str) { - str->Append("%*s%s r%d, r%d, %d", i.XS.Rc ? -7 : -8, i.type->name, i.XS.Rc ? "." : "", - i.XS.RA, i.XS.RT, (i.XS.SH5 << 5) | i.XS.SH); + str->Append("%*s%s r%d, r%d, %d", i.XS.Rc ? -7 : -8, i.type->name, + i.XS.Rc ? "." : "", i.XS.RA, i.XS.RT, (i.XS.SH5 << 5) | i.XS.SH); } void Disasm_vpermwi128(InstrData& i, StringBuffer* str) { const uint32_t vd = i.VX128_P.VD128l | (i.VX128_P.VD128h << 5); const uint32_t vb = i.VX128_P.VB128l | (i.VX128_P.VB128h << 5); - str->Append("%-8s v%d, v%d, %.2X", i.type->name, - vd, vb, i.VX128_P.PERMl | (i.VX128_P.PERMh << 5)); + str->Append("%-8s v%d, v%d, %.2X", i.type->name, vd, vb, + i.VX128_P.PERMl | (i.VX128_P.PERMh << 5)); } void Disasm_vrfin128(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_3_VD128; const uint32_t vb = VX128_3_VB128; - str->Append("%-8s v%d, v%d", i.type->name, - vd, vb); + str->Append("%-8s v%d, v%d", i.type->name, vd, vb); } void Disasm_vrlimi128(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_4_VD128; const uint32_t vb = VX128_4_VB128; - str->Append("%-8s v%d, v%d, %.2X, %.2X", i.type->name, - vd, vb, i.VX128_4.IMM, i.VX128_4.z); + str->Append("%-8s v%d, v%d, %.2X, %.2X", i.type->name, vd, vb, i.VX128_4.IMM, + i.VX128_4.z); } void Disasm_vsldoi128(InstrData& i, StringBuffer* str) { const uint32_t vd = VX128_5_VD128; const uint32_t va = VX128_5_VA128; const uint32_t vb = VX128_5_VB128; const uint32_t sh = i.VX128_5.SH; - str->Append("%-8s v%d, v%d, v%d, %.2X", i.type->name, - vd, va, vb, sh); + str->Append("%-8s v%d, v%d, v%d, %.2X", i.type->name, vd, va, vb, sh); } void Disasm_vspltb(InstrData& i, StringBuffer* str) { - str->Append("%-8s v%d, v%d, %.2X", i.type->name, - i.VX.VD, i.VX.VB, i.VX.VA & 0xF); + str->Append("%-8s v%d, v%d, %.2X", i.type->name, i.VX.VD, i.VX.VB, + i.VX.VA & 0xF); } void Disasm_vsplth(InstrData& i, StringBuffer* str) { - str->Append("%-8s v%d, v%d, %.2X", i.type->name, - i.VX.VD, i.VX.VB, i.VX.VA & 0x7); + str->Append("%-8s v%d, v%d, %.2X", i.type->name, i.VX.VD, i.VX.VB, + i.VX.VA & 0x7); } void Disasm_vspltw(InstrData& i, StringBuffer* str) { - str->Append("%-8s v%d, v%d, %.2X", i.type->name, - i.VX.VD, i.VX.VB, i.VX.VA); + str->Append("%-8s v%d, v%d, %.2X", i.type->name, i.VX.VD, i.VX.VB, i.VX.VA); } void Disasm_vspltisb(InstrData& i, StringBuffer* str) { // 5bit -> 8bit sign extend int8_t simm = (i.VX.VA & 0x10) ? (i.VX.VA | 0xF0) : i.VX.VA; - str->Append("%-8s v%d, %.2X", i.type->name, - i.VX.VD, simm); + str->Append("%-8s v%d, %.2X", i.type->name, i.VX.VD, simm); } void Disasm_vspltish(InstrData& i, StringBuffer* str) { // 5bit -> 16bit sign extend int16_t simm = (i.VX.VA & 0x10) ? (i.VX.VA | 0xFFF0) : i.VX.VA; - str->Append("%-8s v%d, %.4X", i.type->name, - i.VX.VD, simm); + str->Append("%-8s v%d, %.4X", i.type->name, i.VX.VD, simm); } void Disasm_vspltisw(InstrData& i, StringBuffer* str) { // 5bit -> 32bit sign extend int32_t simm = (i.VX.VA & 0x10) ? (i.VX.VA | 0xFFFFFFF0) : i.VX.VA; - str->Append("%-8s v%d, %.8X", i.type->name, - i.VX.VD, simm); + str->Append("%-8s v%d, %.8X", i.type->name, i.VX.VD, simm); } -} // namespace ppc -} // namespace frontend -} // namespace alloy - - -int alloy::frontend::ppc::DisasmPPC(InstrData& i, StringBuffer* str) { +int DisasmPPC(InstrData& i, StringBuffer* str) { if (!i.type) { str->Append("???"); } else { @@ -531,3 +513,6 @@ int alloy::frontend::ppc::DisasmPPC(InstrData& i, StringBuffer* str) { return 0; } +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_disasm.h b/src/alloy/frontend/ppc/ppc_disasm.h index e5254661a..fe6c26be6 100644 --- a/src/alloy/frontend/ppc/ppc_disasm.h +++ b/src/alloy/frontend/ppc/ppc_disasm.h @@ -12,18 +12,14 @@ #include - namespace alloy { namespace frontend { namespace ppc { - int DisasmPPC(InstrData& i, StringBuffer* str); - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_DISASM_H_ diff --git a/src/alloy/frontend/ppc/ppc_emit-private.h b/src/alloy/frontend/ppc/ppc_emit-private.h index 2c147f45e..5d717e69b 100644 --- a/src/alloy/frontend/ppc/ppc_emit-private.h +++ b/src/alloy/frontend/ppc/ppc_emit-private.h @@ -13,25 +13,21 @@ #include #include - namespace alloy { namespace frontend { namespace ppc { - #define XEEMITTER(name, opcode, format) int InstrEmit_##name #define XEREGISTERINSTR(name, opcode) \ - RegisterInstrEmit(opcode, (InstrEmitFn)InstrEmit_##name); + RegisterInstrEmit(opcode, (InstrEmitFn)InstrEmit_##name); #define XEINSTRNOTIMPLEMENTED() //#define XEINSTRNOTIMPLEMENTED XEASSERTALWAYS //#define XEINSTRNOTIMPLEMENTED() __debugbreak() - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_EMIT_PRIVATE_H_ diff --git a/src/alloy/frontend/ppc/ppc_emit.h b/src/alloy/frontend/ppc/ppc_emit.h index 9afea2f19..4edc4e021 100644 --- a/src/alloy/frontend/ppc/ppc_emit.h +++ b/src/alloy/frontend/ppc/ppc_emit.h @@ -12,22 +12,18 @@ #include - namespace alloy { namespace frontend { namespace ppc { - void RegisterEmitCategoryAltivec(); void RegisterEmitCategoryALU(); void RegisterEmitCategoryControl(); void RegisterEmitCategoryFPU(); void RegisterEmitCategoryMemory(); - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_EMIT_H_ diff --git a/src/alloy/frontend/ppc/ppc_emit_altivec.cc b/src/alloy/frontend/ppc/ppc_emit_altivec.cc index 1a985d1ae..9b0a845c5 100644 --- a/src/alloy/frontend/ppc/ppc_emit_altivec.cc +++ b/src/alloy/frontend/ppc/ppc_emit_altivec.cc @@ -12,187 +12,147 @@ #include #include - -using namespace alloy::frontend::ppc; -using namespace alloy::hir; -using namespace alloy::runtime; - - namespace alloy { namespace frontend { namespace ppc { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::hir::Value; Value* CalculateEA_0(PPCHIRBuilder& f, uint32_t ra, uint32_t rb); - #define SHUFPS_SWAP_DWORDS 0x1B - // Most of this file comes from: // http://biallas.net/doc/vmx128/vmx128.txt // https://github.com/kakaroto/ps3ida/blob/master/plugins/PPCAltivec/src/main.cpp - -#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) -#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) -#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) -#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) -#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) -#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) -#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) -#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) +#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) +#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) +#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) +#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) +#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) +#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) +#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) +#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) #define VX128_VD128 (i.VX128.VD128l | (i.VX128.VD128h << 5)) -#define VX128_VA128 (i.VX128.VA128l | (i.VX128.VA128h << 5) | (i.VX128.VA128H << 6)) +#define VX128_VA128 \ + (i.VX128.VA128l | (i.VX128.VA128h << 5) | (i.VX128.VA128H << 6)) #define VX128_VB128 (i.VX128.VB128l | (i.VX128.VB128h << 5)) #define VX128_1_VD128 (i.VX128_1.VD128l | (i.VX128_1.VD128h << 5)) #define VX128_2_VD128 (i.VX128_2.VD128l | (i.VX128_2.VD128h << 5)) -#define VX128_2_VA128 (i.VX128_2.VA128l | (i.VX128_2.VA128h << 5) | (i.VX128_2.VA128H << 6)) +#define VX128_2_VA128 \ + (i.VX128_2.VA128l | (i.VX128_2.VA128h << 5) | (i.VX128_2.VA128H << 6)) #define VX128_2_VB128 (i.VX128_2.VB128l | (i.VX128_2.VD128h << 5)) -#define VX128_2_VC (i.VX128_2.VC) +#define VX128_2_VC (i.VX128_2.VC) #define VX128_3_VD128 (i.VX128_3.VD128l | (i.VX128_3.VD128h << 5)) #define VX128_3_VB128 (i.VX128_3.VB128l | (i.VX128_3.VB128h << 5)) -#define VX128_3_IMM (i.VX128_3.IMM) +#define VX128_3_IMM (i.VX128_3.IMM) #define VX128_5_VD128 (i.VX128_5.VD128l | (i.VX128_5.VD128h << 5)) -#define VX128_5_VA128 (i.VX128_5.VA128l | (i.VX128_5.VA128h << 5)) | (i.VX128_5.VA128H << 6) +#define VX128_5_VA128 \ + (i.VX128_5.VA128l | (i.VX128_5.VA128h << 5)) | (i.VX128_5.VA128H << 6) #define VX128_5_VB128 (i.VX128_5.VB128l | (i.VX128_5.VB128h << 5)) -#define VX128_5_SH (i.VX128_5.SH) +#define VX128_5_SH (i.VX128_5.SH) #define VX128_R_VD128 (i.VX128_R.VD128l | (i.VX128_R.VD128h << 5)) -#define VX128_R_VA128 (i.VX128_R.VA128l | (i.VX128_R.VA128h << 5) | (i.VX128_R.VA128H << 6)) +#define VX128_R_VA128 \ + (i.VX128_R.VA128l | (i.VX128_R.VA128h << 5) | (i.VX128_R.VA128H << 6)) #define VX128_R_VB128 (i.VX128_R.VB128l | (i.VX128_R.VB128h << 5)) - -// namespace { - -// // Shuffle masks to shift the values over and insert zeros from the low bits. -// static __m128i __shift_table_left[16] = { -// _mm_set_epi8(15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0), // unused -// _mm_set_epi8(14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15), -// _mm_set_epi8(13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15), -// _mm_set_epi8(12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15), -// _mm_set_epi8(11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15), -// _mm_set_epi8(10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15), -// _mm_set_epi8( 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 8, 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 7, 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 6, 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 5, 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 4, 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 3, 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 2, 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 1, 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// _mm_set_epi8( 0, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15), -// }; -// static __m128i __shift_table_right[16] = { -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0), // unused -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7), -// _mm_set_epi8( 0, 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6), -// _mm_set_epi8( 0, 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5), -// _mm_set_epi8( 0, 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4), -// _mm_set_epi8( 0, 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3), -// _mm_set_epi8( 0, 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2), -// _mm_set_epi8( 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1), -// }; - -// } - unsigned int xerotl(unsigned int value, unsigned int shift) { XEASSERT(shift < 32); return shift == 0 ? value : ((value << shift) | (value >> (32 - shift))); } -XEEMITTER(dst, 0x7C0002AC, XDSS)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dst, 0x7C0002AC, XDSS)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(dstst, 0x7C0002EC, XDSS)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dstst, 0x7C0002EC, XDSS)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(dss, 0x7C00066C, XDSS)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dss, 0x7C00066C, XDSS)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lvebx, 0x7C00000E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvebx, 0x7C00000E, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lvehx, 0x7C00004E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvehx, 0x7C00004E, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -int InstrEmit_lvewx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvewx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lvewx, 0x7C00008E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvewx, 0x7C00008E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvewx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvewx128, VX128_1(4, 131), VX128_1)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_lvewx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); +XEEMITTER(lvewx128, VX128_1(4, 131), VX128_1)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_lvewx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -int InstrEmit_lvsl_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvsl_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = CalculateEA_0(f, ra, rb); Value* sh = f.Truncate(f.And(ea, f.LoadConstant((int64_t)0xF)), INT8_TYPE); Value* v = f.LoadVectorShl(sh); f.StoreVR(vd, v); return 0; } -XEEMITTER(lvsl, 0x7C00000C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvsl, 0x7C00000C, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvsl_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvsl128, VX128_1(4, 3), VX128_1)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_lvsl_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); +XEEMITTER(lvsl128, VX128_1(4, 3), VX128_1)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_lvsl_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -int InstrEmit_lvsr_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvsr_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = CalculateEA_0(f, ra, rb); Value* sh = f.Truncate(f.And(ea, f.LoadConstant((int64_t)0xF)), INT8_TYPE); Value* v = f.LoadVectorShr(sh); f.StoreVR(vd, v); return 0; } -XEEMITTER(lvsr, 0x7C00004C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvsr, 0x7C00004C, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvsr_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvsr128, VX128_1(4, 67), VX128_1)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_lvsr_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); +XEEMITTER(lvsr128, VX128_1(4, 67), VX128_1)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_lvsr_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -int InstrEmit_lvx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = f.And(CalculateEA_0(f, ra, rb), f.LoadConstant(~0xFull)); f.StoreVR(vd, f.ByteSwap(f.Load(ea, VEC128_TYPE))); return 0; } -XEEMITTER(lvx, 0x7C0000CE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvx, 0x7C0000CE, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvx128, VX128_1(4, 195), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvx128, VX128_1(4, 195), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(lvxl, 0x7C0002CE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvxl, 0x7C0002CE, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvx(f, i); } -XEEMITTER(lvxl128, VX128_1(4, 707), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvxl128, VX128_1(4, 707), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvx128(f, i); } -XEEMITTER(stvebx, 0x7C00010E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvebx, 0x7C00010E, X)(PPCHIRBuilder& f, InstrData& i) { Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); Value* el = f.And(ea, f.LoadConstant(0xFull)); Value* v = f.Extract(f.LoadVR(i.X.RT), el, INT8_TYPE); @@ -200,7 +160,7 @@ XEEMITTER(stvebx, 0x7C00010E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stvehx, 0x7C00014E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvehx, 0x7C00014E, X)(PPCHIRBuilder& f, InstrData& i) { Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); ea = f.And(ea, f.LoadConstant(~0x1ull)); Value* el = f.Shr(f.And(ea, f.LoadConstant(0xFull)), 1); @@ -209,7 +169,8 @@ XEEMITTER(stvehx, 0x7C00014E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -int InstrEmit_stvewx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_stvewx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = CalculateEA_0(f, ra, rb); ea = f.And(ea, f.LoadConstant(~0x3ull)); Value* el = f.Shr(f.And(ea, f.LoadConstant(0xFull)), 2); @@ -217,88 +178,87 @@ int InstrEmit_stvewx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, f.Store(ea, f.ByteSwap(v)); return 0; } -XEEMITTER(stvewx, 0x7C00018E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvewx, 0x7C00018E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvewx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(stvewx128, VX128_1(4, 387), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvewx128, VX128_1(4, 387), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvewx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -int InstrEmit_stvx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_stvx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = f.And(CalculateEA_0(f, ra, rb), f.LoadConstant(~0xFull)); f.Store(ea, f.ByteSwap(f.LoadVR(vd))); return 0; } -XEEMITTER(stvx, 0x7C0001CE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvx, 0x7C0001CE, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(stvx128, VX128_1(4, 451), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvx128, VX128_1(4, 451), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(stvxl, 0x7C0003CE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvxl, 0x7C0003CE, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvx(f, i); } -XEEMITTER(stvxl128, VX128_1(4, 963), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvxl128, VX128_1(4, 963), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvx128(f, i); } // The lvlx/lvrx/etc instructions are in Cell docs only: // https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/C40E4C6133B31EE8872570B500791108/$file/vector_simd_pem_v_2.07c_26Oct2006_cell.pdf -int InstrEmit_lvlx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvlx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = CalculateEA_0(f, ra, rb); Value* eb = f.And(f.Truncate(ea, INT8_TYPE), f.LoadConstant((int8_t)0xF)); // ea &= ~0xF ea = f.And(ea, f.LoadConstant(~0xFull)); // v = (new << eb) - Value* v = f.Permute( - f.LoadVectorShl(eb), - f.ByteSwap(f.Load(ea, VEC128_TYPE)), - f.LoadZero(VEC128_TYPE), - INT8_TYPE); + Value* v = f.Permute(f.LoadVectorShl(eb), f.ByteSwap(f.Load(ea, VEC128_TYPE)), + f.LoadZero(VEC128_TYPE), INT8_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(lvlx, 0x7C00040E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvlx, 0x7C00040E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvlx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvlx128, VX128_1(4, 1027), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvlx128, VX128_1(4, 1027), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvlx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(lvlxl, 0x7C00060E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvlxl, 0x7C00060E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvlx(f, i); } -XEEMITTER(lvlxl128, VX128_1(4, 1539), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvlxl128, VX128_1(4, 1539), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvlx128(f, i); } -int InstrEmit_lvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_lvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { Value* ea = CalculateEA_0(f, ra, rb); Value* eb = f.And(f.Truncate(ea, INT8_TYPE), f.LoadConstant((int8_t)0xF)); // ea &= ~0xF ea = f.And(ea, f.LoadConstant(~0xFull)); // v = (new >> (16 - eb)) - Value* v = f.Permute( - f.LoadVectorShr(f.Sub(f.LoadConstant((int8_t)16), eb)), - f.LoadZero(VEC128_TYPE), - f.ByteSwap(f.Load(ea, VEC128_TYPE)), - INT8_TYPE); + Value* v = f.Permute(f.LoadVectorShr(f.Sub(f.LoadConstant((int8_t)16), eb)), + f.LoadZero(VEC128_TYPE), + f.ByteSwap(f.Load(ea, VEC128_TYPE)), INT8_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(lvrx, 0x7C00044E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvrx, 0x7C00044E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvrx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(lvrx128, VX128_1(4, 1091), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvrx128, VX128_1(4, 1091), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvrx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(lvrxl, 0x7C00064E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvrxl, 0x7C00064E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvrx(f, i); } -XEEMITTER(lvrxl128, VX128_1(4, 1603), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lvrxl128, VX128_1(4, 1603), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_lvrx128(f, i); } -int InstrEmit_stvlx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_stvlx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { // NOTE: if eb == 0 (so 16b aligned) this equals new_value // we could optimize this to prevent the other load/mask, in that case. Value* ea = CalculateEA_0(f, ra, rb); @@ -308,38 +268,33 @@ int InstrEmit_stvlx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, u ea = f.And(ea, f.LoadConstant(~0xFull)); Value* old_value = f.ByteSwap(f.Load(ea, VEC128_TYPE)); // v = (new >> eb) | (old & (ONE << (16 - eb))) - Value* v = f.Permute( - f.LoadVectorShr(eb), - f.LoadZero(VEC128_TYPE), - new_value, - INT8_TYPE); + Value* v = f.Permute(f.LoadVectorShr(eb), f.LoadZero(VEC128_TYPE), new_value, + INT8_TYPE); v = f.Or( - v, - f.And( - old_value, - f.Permute( - f.LoadVectorShl(f.Sub(f.LoadConstant((int8_t)16), eb)), - f.Not(f.LoadZero(VEC128_TYPE)), - f.LoadZero(VEC128_TYPE), - INT8_TYPE))); + v, f.And(old_value, + f.Permute(f.LoadVectorShl(f.Sub(f.LoadConstant((int8_t)16), eb)), + f.Not(f.LoadZero(VEC128_TYPE)), + f.LoadZero(VEC128_TYPE), INT8_TYPE))); // ea &= ~0xF (handled above) f.Store(ea, f.ByteSwap(v)); return 0; } -XEEMITTER(stvlx, 0x7C00050E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvlx, 0x7C00050E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvlx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(stvlx128, VX128_1(4, 1283), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvlx128, VX128_1(4, 1283), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvlx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(stvlxl, 0x7C00070E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvlxl, 0x7C00070E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvlx(f, i); } -XEEMITTER(stvlxl128, VX128_1(4, 1795), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvlxl128, VX128_1(4, 1795), VX128_1)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_stvlx128(f, i); } -int InstrEmit_stvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, uint32_t rb) { +int InstrEmit_stvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, + uint32_t rb) { // NOTE: if eb == 0 (so 16b aligned) this equals new_value // we could optimize this to prevent the other load/mask, in that case. Value* ea = CalculateEA_0(f, ra, rb); @@ -349,48 +304,40 @@ int InstrEmit_stvrx_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t ra, u ea = f.And(ea, f.LoadConstant(~0xFull)); Value* old_value = f.ByteSwap(f.Load(ea, VEC128_TYPE)); // v = (new << (16 - eb)) | (old & (ONE >> eb)) - Value* v = f.Permute( - f.LoadVectorShl(f.Sub(f.LoadConstant((int8_t)16), eb)), - new_value, - f.LoadZero(VEC128_TYPE), - INT8_TYPE); - v = f.Or( - v, - f.And( - old_value, - f.Permute( - f.LoadVectorShr(eb), - f.LoadZero(VEC128_TYPE), - f.Not(f.LoadZero(VEC128_TYPE)), - INT8_TYPE))); + Value* v = f.Permute(f.LoadVectorShl(f.Sub(f.LoadConstant((int8_t)16), eb)), + new_value, f.LoadZero(VEC128_TYPE), INT8_TYPE); + v = f.Or(v, f.And(old_value, + f.Permute(f.LoadVectorShr(eb), f.LoadZero(VEC128_TYPE), + f.Not(f.LoadZero(VEC128_TYPE)), INT8_TYPE))); // ea &= ~0xF (handled above) f.Store(ea, f.ByteSwap(v)); return 0; } -XEEMITTER(stvrx, 0x7C00054E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvrx, 0x7C00054E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvrx_(f, i, i.X.RT, i.X.RA, i.X.RB); } -XEEMITTER(stvrx128, VX128_1(4, 1347), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvrx128, VX128_1(4, 1347), VX128_1)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvrx_(f, i, VX128_1_VD128, i.VX128_1.RA, i.VX128_1.RB); } -XEEMITTER(stvrxl, 0x7C00074E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvrxl, 0x7C00074E, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_stvrx(f, i); } -XEEMITTER(stvrxl128, VX128_1(4, 1859), VX128_1)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stvrxl128, VX128_1(4, 1859), VX128_1)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_stvrx128(f, i); } -XEEMITTER(mfvscr, 0x10000604, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mfvscr, 0x10000604, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mtvscr, 0x10000644, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtvscr, 0x10000644, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vaddcuw, 0x10000180, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vaddcuw, 0x10000180, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -401,80 +348,80 @@ int InstrEmit_vaddfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vaddfp, 0x1000000A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vaddfp, 0x1000000A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vaddfp_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vaddfp128, VX128(5, 16), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vaddfp128, VX128(5, 16), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vaddfp_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vaddsbs, 0x10000300, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT8_TYPE, ARITHMETIC_SATURATE); +XEEMITTER(vaddsbs, 0x10000300, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE, + ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vaddshs, 0x10000340, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT16_TYPE, ARITHMETIC_SATURATE); +XEEMITTER(vaddshs, 0x10000340, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE, + ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vaddsws, 0x10000380, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT32_TYPE, ARITHMETIC_SATURATE); +XEEMITTER(vaddsws, 0x10000380, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT32_TYPE, + ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vaddubm, 0x10000000, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT8_TYPE, ARITHMETIC_UNSIGNED); +XEEMITTER(vaddubm, 0x10000000, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE, + ARITHMETIC_UNSIGNED); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vaddubs, 0x10000200, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT8_TYPE, ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); +XEEMITTER(vaddubs, 0x10000200, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE, + ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vadduhm, 0x10000040, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT16_TYPE, ARITHMETIC_UNSIGNED); +XEEMITTER(vadduhm, 0x10000040, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE, + ARITHMETIC_UNSIGNED); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vadduhs, 0x10000240, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT16_TYPE, ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); +XEEMITTER(vadduhs, 0x10000240, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE, + ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vadduwm, 0x10000080, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT32_TYPE, ARITHMETIC_UNSIGNED); +XEEMITTER(vadduwm, 0x10000080, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT32_TYPE, + ARITHMETIC_UNSIGNED); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vadduws, 0x10000280, VX )(PPCHIRBuilder& f, InstrData& i) { - Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), - INT32_TYPE, ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); +XEEMITTER(vadduws, 0x10000280, VX)(PPCHIRBuilder& f, InstrData& i) { + Value* v = f.VectorAdd(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT32_TYPE, + ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); f.StoreSAT(f.DidSaturate(v)); f.StoreVR(i.VX.VD, v); return 0; @@ -486,10 +433,10 @@ int InstrEmit_vand_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vand, 0x10000404, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vand, 0x10000404, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vand_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vand128, VX128(5, 528), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vand128, VX128(5, 528), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vand_(f, VX128_VD128, VX128_VA128, VX128_VB128); } @@ -499,118 +446,124 @@ int InstrEmit_vandc_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vandc, 0x10000444, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vandc, 0x10000444, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vandc_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vandc128, VX128(5, 592), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vandc128, VX128(5, 592), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vandc_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vavgsb, 0x10000502, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavgsb, 0x10000502, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vavgsh, 0x10000542, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavgsh, 0x10000542, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vavgsw, 0x10000582, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavgsw, 0x10000582, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vavgub, 0x10000402, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavgub, 0x10000402, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vavguh, 0x10000442, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavguh, 0x10000442, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vavguw, 0x10000482, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vavguw, 0x10000482, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -int InstrEmit_vcfsx_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, uint32_t uimm) { +int InstrEmit_vcfsx_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, + uint32_t uimm) { // (VD) <- float(VB as signed) / 2^uimm uimm = uimm ? (2 << (uimm - 1)) : 1; - Value* v = f.Div( - f.VectorConvertI2F(f.LoadVR(vb)), - f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); + Value* v = f.Div(f.VectorConvertI2F(f.LoadVR(vb)), + f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); f.StoreVR(vd, v); return 0; } -XEEMITTER(vcfsx, 0x1000034A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcfsx, 0x1000034A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vcfsx_(f, i.VX.VD, i.VX.VB, i.VX.VA); } -XEEMITTER(vcsxwfp128, VX128_3(6, 688), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcsxwfp128, VX128_3(6, 688), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vcfsx_(f, VX128_3_VD128, VX128_3_VB128, VX128_3_IMM); } -int InstrEmit_vcfux_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, uint32_t uimm) { +int InstrEmit_vcfux_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, + uint32_t uimm) { // (VD) <- float(VB as unsigned) / 2^uimm uimm = uimm ? (2 << (uimm - 1)) : 1; - Value* v = f.Div( - f.VectorConvertI2F(f.LoadVR(vb), ARITHMETIC_UNSIGNED), - f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); + Value* v = f.Div(f.VectorConvertI2F(f.LoadVR(vb), ARITHMETIC_UNSIGNED), + f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); f.StoreVR(vd, v); return 0; } -XEEMITTER(vcfux, 0x1000030A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcfux, 0x1000030A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vcfux_(f, i.VX.VD, i.VX.VB, i.VX.VA); } -XEEMITTER(vcuxwfp128, VX128_3(6, 752), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcuxwfp128, VX128_3(6, 752), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vcfux_(f, VX128_3_VD128, VX128_3_VB128, VX128_3_IMM); } -int InstrEmit_vctsxs_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, uint32_t uimm) { +int InstrEmit_vctsxs_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, + uint32_t uimm) { // (VD) <- int_sat(VB as signed * 2^uimm) uimm = uimm ? (2 << (uimm - 1)) : 1; - Value* v = f.Mul( - f.LoadVR(vb), - f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); + Value* v = + f.Mul(f.LoadVR(vb), f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); v = f.VectorConvertF2I(v, ARITHMETIC_SATURATE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vctsxs, 0x100003CA, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vctsxs, 0x100003CA, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vctsxs_(f, i.VX.VD, i.VX.VB, i.VX.VA); } -XEEMITTER(vcfpsxws128, VX128_3(6, 560), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcfpsxws128, VX128_3(6, 560), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vctsxs_(f, VX128_3_VD128, VX128_3_VB128, VX128_3_IMM); } -int InstrEmit_vctuxs_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, uint32_t uimm) { +int InstrEmit_vctuxs_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, + uint32_t uimm) { // (VD) <- int_sat(VB as unsigned * 2^uimm) uimm = uimm ? (2 << (uimm - 1)) : 1; - Value* v = f.Mul( - f.LoadVR(vb), - f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); + Value* v = + f.Mul(f.LoadVR(vb), f.Splat(f.LoadConstant((float)uimm), VEC128_TYPE)); v = f.VectorConvertF2I(v, ARITHMETIC_UNSIGNED | ARITHMETIC_SATURATE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vctuxs, 0x1000038A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vctuxs, 0x1000038A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vctuxs_(f, i.VX.VD, i.VX.VB, i.VX.VA); } -XEEMITTER(vcfpuxws128, VX128_3(6, 624), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcfpuxws128, VX128_3(6, 624), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vctuxs_(f, VX128_3_VD128, VX128_3_VB128, VX128_3_IMM); } -int InstrEmit_vcmpbfp_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t va, uint32_t vb, uint32_t rc) { +int InstrEmit_vcmpbfp_(PPCHIRBuilder& f, InstrData& i, uint32_t vd, uint32_t va, + uint32_t vb, uint32_t rc) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vcmpbfp, 0x100003C6, VXR )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vcmpbfp, 0x100003C6, VXR)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vcmpbfp_(f, i, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpbfp128, VX128(6, 384), VX128_R)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpbfp_(f, i, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, i.VX128_R.Rc); +XEEMITTER(vcmpbfp128, VX128(6, 384), VX128_R)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpbfp_(f, i, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, + i.VX128_R.Rc); } enum vcmpxxfp_op { @@ -618,24 +571,25 @@ enum vcmpxxfp_op { vcmpxxfp_gt, vcmpxxfp_ge, }; -int InstrEmit_vcmpxxfp_(PPCHIRBuilder& f, InstrData& i, vcmpxxfp_op cmpop, uint32_t vd, uint32_t va, uint32_t vb, uint32_t rc) { +int InstrEmit_vcmpxxfp_(PPCHIRBuilder& f, InstrData& i, vcmpxxfp_op cmpop, + uint32_t vd, uint32_t va, uint32_t vb, uint32_t rc) { // (VD.xyzw) = (VA.xyzw) OP (VB.xyzw) ? 0xFFFFFFFF : 0x00000000 // if (Rc) CR6 = all_equal | 0 | none_equal | 0 // If an element in either VA or VB is NaN the result will be 0x00000000 Value* v; switch (cmpop) { - case vcmpxxfp_eq: - v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); - break; - case vcmpxxfp_gt: - v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); - break; - case vcmpxxfp_ge: - v = f.VectorCompareSGE(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); - break; - default: - XEASSERTALWAYS(); - return 1; + case vcmpxxfp_eq: + v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); + break; + case vcmpxxfp_gt: + v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); + break; + case vcmpxxfp_ge: + v = f.VectorCompareSGE(f.LoadVR(va), f.LoadVR(vb), FLOAT32_TYPE); + break; + default: + XEASSERTALWAYS(); + return 1; } if (rc) { f.UpdateCR6(v); @@ -644,23 +598,29 @@ int InstrEmit_vcmpxxfp_(PPCHIRBuilder& f, InstrData& i, vcmpxxfp_op cmpop, uint3 return 0; } -XEEMITTER(vcmpeqfp, 0x100000C6, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_eq, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpeqfp, 0x100000C6, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_eq, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpeqfp128, VX128(6, 0), VX128_R)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_eq, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, i.VX128_R.Rc); +XEEMITTER(vcmpeqfp128, VX128(6, 0), VX128_R)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_eq, VX128_R_VD128, VX128_R_VA128, + VX128_R_VB128, i.VX128_R.Rc); } -XEEMITTER(vcmpgefp, 0x100001C6, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_ge, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgefp, 0x100001C6, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_ge, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpgefp128, VX128(6, 128), VX128_R)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_ge, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, i.VX128_R.Rc); +XEEMITTER(vcmpgefp128, VX128(6, 128), VX128_R)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_ge, VX128_R_VD128, VX128_R_VA128, + VX128_R_VB128, i.VX128_R.Rc); } -XEEMITTER(vcmpgtfp, 0x100002C6, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_gt, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtfp, 0x100002C6, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_gt, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpgtfp128, VX128(6, 256), VX128_R)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_gt, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, i.VX128_R.Rc); +XEEMITTER(vcmpgtfp128, VX128(6, 256), VX128_R)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxfp_(f, i, vcmpxxfp_gt, VX128_R_VD128, VX128_R_VA128, + VX128_R_VB128, i.VX128_R.Rc); } enum vcmpxxi_op { @@ -668,55 +628,65 @@ enum vcmpxxi_op { vcmpxxi_gt_signed, vcmpxxi_gt_unsigned, }; -int InstrEmit_vcmpxxi_(PPCHIRBuilder& f, InstrData& i, vcmpxxi_op cmpop, uint32_t width, uint32_t vd, uint32_t va, uint32_t vb, uint32_t rc) { +int InstrEmit_vcmpxxi_(PPCHIRBuilder& f, InstrData& i, vcmpxxi_op cmpop, + uint32_t width, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t rc) { // (VD.xyzw) = (VA.xyzw) OP (VB.xyzw) ? 0xFFFFFFFF : 0x00000000 // if (Rc) CR6 = all_equal | 0 | none_equal | 0 // If an element in either VA or VB is NaN the result will be 0x00000000 Value* v; switch (cmpop) { - case vcmpxxi_eq: - switch (width) { - case 1: - v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); + case vcmpxxi_eq: + switch (width) { + case 1: + v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); + break; + case 2: + v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); + break; + case 4: + v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); + break; + default: + XEASSERTALWAYS(); + return 1; + } break; - case 2: - v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); + case vcmpxxi_gt_signed: + switch (width) { + case 1: + v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); + break; + case 2: + v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); + break; + case 4: + v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); + break; + default: + XEASSERTALWAYS(); + return 1; + } break; - case 4: - v = f.VectorCompareEQ(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); + case vcmpxxi_gt_unsigned: + switch (width) { + case 1: + v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); + break; + case 2: + v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); + break; + case 4: + v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); + break; + default: + XEASSERTALWAYS(); + return 1; + } break; - default: XEASSERTALWAYS(); return 1; - } - break; - case vcmpxxi_gt_signed: - switch (width) { - case 1: - v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); - break; - case 2: - v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); - break; - case 4: - v = f.VectorCompareSGT(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); - break; - default: XEASSERTALWAYS(); return 1; - } - break; - case vcmpxxi_gt_unsigned: - switch (width) { - case 1: - v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); - break; - case 2: - v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT16_TYPE); - break; - case 4: - v = f.VectorCompareUGT(f.LoadVR(va), f.LoadVR(vb), INT32_TYPE); - break; - default: XEASSERTALWAYS(); return 1; - } - break; - default: XEASSERTALWAYS(); return 1; + default: + XEASSERTALWAYS(); + return 1; } if (rc) { f.UpdateCR6(v); @@ -724,35 +694,45 @@ int InstrEmit_vcmpxxi_(PPCHIRBuilder& f, InstrData& i, vcmpxxi_op cmpop, uint32_ f.StoreVR(vd, v); return 0; } -XEEMITTER(vcmpequb, 0x10000006, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 1, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpequb, 0x10000006, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 1, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpequh, 0x10000046, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 2, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpequh, 0x10000046, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 2, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpequw, 0x10000086, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 4, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpequw, 0x10000086, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 4, i.VXR.VD, i.VXR.VA, i.VXR.VB, + i.VXR.Rc); } -XEEMITTER(vcmpequw128, VX128(6, 512), VX128_R)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 4, VX128_R_VD128, VX128_R_VA128, VX128_R_VB128, i.VX128_R.Rc); +XEEMITTER(vcmpequw128, VX128(6, 512), VX128_R)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_eq, 4, VX128_R_VD128, VX128_R_VA128, + VX128_R_VB128, i.VX128_R.Rc); } -XEEMITTER(vcmpgtsb, 0x10000306, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 1, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtsb, 0x10000306, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 1, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpgtsh, 0x10000346, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 2, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtsh, 0x10000346, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 2, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpgtsw, 0x10000386, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 4, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtsw, 0x10000386, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_signed, 4, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpgtub, 0x10000206, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 1, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtub, 0x10000206, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 1, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpgtuh, 0x10000246, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 2, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtuh, 0x10000246, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 2, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } -XEEMITTER(vcmpgtuw, 0x10000286, VXR )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 4, i.VXR.VD, i.VXR.VA, i.VXR.VB, i.VXR.Rc); +XEEMITTER(vcmpgtuw, 0x10000286, VXR)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vcmpxxi_(f, i, vcmpxxi_gt_unsigned, 4, i.VXR.VD, i.VXR.VA, + i.VXR.VB, i.VXR.Rc); } int InstrEmit_vexptefp_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { @@ -761,10 +741,11 @@ int InstrEmit_vexptefp_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vexptefp, 0x1000018A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vexptefp, 0x1000018A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vexptefp_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vexptefp128, VX128_3(6, 1712), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vexptefp128, VX128_3(6, 1712), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vexptefp_(f, VX128_3_VD128, VX128_3_VB128); } @@ -774,34 +755,36 @@ int InstrEmit_vlogefp_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vlogefp, 0x100001CA, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vlogefp, 0x100001CA, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vlogefp_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vlogefp128, VX128_3(6, 1776), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vlogefp128, VX128_3(6, 1776), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vlogefp_(f, VX128_3_VD128, VX128_3_VB128); } -int InstrEmit_vmaddfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, uint32_t vc) { +int InstrEmit_vmaddfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t vc) { // (VD) <- ((VA) * (VC)) + (VB) - Value* v = f.MulAdd( - f.LoadVR(va), f.LoadVR(vc), f.LoadVR(vb)); + Value* v = f.MulAdd(f.LoadVR(va), f.LoadVR(vc), f.LoadVR(vb)); f.StoreVR(vd, v); return 0; } -XEEMITTER(vmaddfp, 0x1000002E, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaddfp, 0x1000002E, VXA)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- ((VA) * (VC)) + (VB) return InstrEmit_vmaddfp_(f, i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC); } -XEEMITTER(vmaddfp128, VX128(5, 208), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaddfp128, VX128(5, 208), VX128)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- ((VA) * (VB)) + (VD) // NOTE: this resuses VD and swaps the arg order! - return InstrEmit_vmaddfp_(f, VX128_VD128, VX128_VA128, VX128_VD128, VX128_VB128); + return InstrEmit_vmaddfp_(f, VX128_VD128, VX128_VA128, VX128_VD128, + VX128_VB128); } -XEEMITTER(vmaddcfp128, VX128(5, 272), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaddcfp128, VX128(5, 272), VX128)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- ((VA) * (VD)) + (VB) - Value* v = f.MulAdd( - f.LoadVR(VX128_VA128), f.LoadVR(VX128_VD128), f.LoadVR(VX128_VB128)); + Value* v = f.MulAdd(f.LoadVR(VX128_VA128), f.LoadVR(VX128_VD128), + f.LoadVR(VX128_VB128)); f.StoreVR(VX128_VD128, v); return 0; } @@ -812,49 +795,49 @@ int InstrEmit_vmaxfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vmaxfp, 0x1000040A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxfp, 0x1000040A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmaxfp_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vmaxfp128, VX128(6, 640), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxfp128, VX128(6, 640), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmaxfp_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vmaxsb, 0x10000102, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxsb, 0x10000102, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmaxsh, 0x10000142, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxsh, 0x10000142, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmaxsw, 0x10000182, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxsw, 0x10000182, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmaxub, 0x10000002, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxub, 0x10000002, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmaxuh, 0x10000042, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxuh, 0x10000042, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmaxuw, 0x10000082, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmaxuw, 0x10000082, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmhaddshs, 0x10000020, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmhaddshs, 0x10000020, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmhraddshs, 0x10000021, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmhraddshs, 0x10000021, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -865,54 +848,54 @@ int InstrEmit_vminfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vminfp, 0x1000044A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminfp, 0x1000044A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vminfp_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vminfp128, VX128(6, 704), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminfp128, VX128(6, 704), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vminfp_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vminsb, 0x10000302, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminsb, 0x10000302, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vminsh, 0x10000342, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminsh, 0x10000342, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vminsw, 0x10000382, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminsw, 0x10000382, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vminub, 0x10000202, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminub, 0x10000202, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vminuh, 0x10000242, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminuh, 0x10000242, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vminuw, 0x10000282, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vminuw, 0x10000282, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmladduhm, 0x10000022, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmladduhm, 0x10000022, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmrghb, 0x1000000C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrghb, 0x1000000C, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmrghh, 0x1000004C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrghh, 0x1000004C, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -922,27 +905,24 @@ int InstrEmit_vmrghw_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { // (VD.y) = (VB.x) // (VD.z) = (VA.y) // (VD.w) = (VB.y) - Value* v = f.Permute( - f.LoadConstant(0x00040105), - f.LoadVR(va), - f.LoadVR(vb), - INT32_TYPE); + Value* v = f.Permute(f.LoadConstant(0x00040105), f.LoadVR(va), f.LoadVR(vb), + INT32_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vmrghw, 0x1000008C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrghw, 0x1000008C, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmrghw_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vmrghw128, VX128(6, 768), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrghw128, VX128(6, 768), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmrghw_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vmrglb, 0x1000010C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrglb, 0x1000010C, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmrglh, 0x1000014C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrglh, 0x1000014C, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -952,52 +932,49 @@ int InstrEmit_vmrglw_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { // (VD.y) = (VB.z) // (VD.z) = (VA.w) // (VD.w) = (VB.w) - Value* v = f.Permute( - f.LoadConstant(0x02060307), - f.LoadVR(va), - f.LoadVR(vb), - INT32_TYPE); + Value* v = f.Permute(f.LoadConstant(0x02060307), f.LoadVR(va), f.LoadVR(vb), + INT32_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vmrglw, 0x1000018C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrglw, 0x1000018C, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmrglw_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vmrglw128, VX128(6, 832), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmrglw128, VX128(6, 832), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vmrglw_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vmsummbm, 0x10000025, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsummbm, 0x10000025, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsumshm, 0x10000028, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsumshm, 0x10000028, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsumshs, 0x10000029, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsumshs, 0x10000029, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsumubm, 0x10000024, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsumubm, 0x10000024, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsumuhm, 0x10000026, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsumuhm, 0x10000026, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsumuhs, 0x10000027, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsumuhs, 0x10000027, VXA)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmsum3fp128, VX128(5, 400), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsum3fp128, VX128(5, 400), VX128)(PPCHIRBuilder& f, InstrData& i) { // Dot product XYZ. // (VD.xyzw) = (VA.x * VB.x) + (VA.y * VB.y) + (VA.z * VB.z) Value* v = f.DotProduct3(f.LoadVR(VX128_VA128), f.LoadVR(VX128_VB128)); @@ -1006,7 +983,7 @@ XEEMITTER(vmsum3fp128, VX128(5, 400), VX128 )(PPCHIRBuilder& f, InstrData return 0; } -XEEMITTER(vmsum4fp128, VX128(5, 464), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmsum4fp128, VX128(5, 464), VX128)(PPCHIRBuilder& f, InstrData& i) { // Dot product XYZW. // (VD.xyzw) = (VA.x * VB.x) + (VA.y * VB.y) + (VA.z * VB.z) + (VA.w * VB.w) Value* v = f.DotProduct4(f.LoadVR(VX128_VA128), f.LoadVR(VX128_VB128)); @@ -1015,54 +992,55 @@ XEEMITTER(vmsum4fp128, VX128(5, 464), VX128 )(PPCHIRBuilder& f, InstrData return 0; } -XEEMITTER(vmulesb, 0x10000308, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulesb, 0x10000308, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmulesh, 0x10000348, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulesh, 0x10000348, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmuleub, 0x10000208, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmuleub, 0x10000208, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmuleuh, 0x10000248, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmuleuh, 0x10000248, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmulosb, 0x10000108, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulosb, 0x10000108, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmulosh, 0x10000148, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulosh, 0x10000148, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmuloub, 0x10000008, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmuloub, 0x10000008, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmulouh, 0x10000048, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulouh, 0x10000048, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vmulfp128, VX128(5, 144), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vmulfp128, VX128(5, 144), VX128)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- (VA) * (VB) (4 x fp) Value* v = f.Mul(f.LoadVR(VX128_VA128), f.LoadVR(VX128_VB128)); f.StoreVR(VX128_VD128, v); return 0; } -int InstrEmit_vnmsubfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, uint32_t vc) { +int InstrEmit_vnmsubfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t vc) { // (VD) <- -(((VA) * (VC)) - (VB)) // NOTE: only one rounding should take place, but that's hard... // This really needs VFNMSUB132PS/VFNMSUB213PS/VFNMSUB231PS but that's AVX. @@ -1070,11 +1048,12 @@ int InstrEmit_vnmsubfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, f.StoreVR(vd, v); return 0; } -XEEMITTER(vnmsubfp, 0x1000002F, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vnmsubfp, 0x1000002F, VXA)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vnmsubfp_(f, i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC); } -XEEMITTER(vnmsubfp128, VX128(5, 336), VX128 )(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vnmsubfp_(f, VX128_VD128, VX128_VA128, VX128_VB128, VX128_VD128); +XEEMITTER(vnmsubfp128, VX128(5, 336), VX128)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vnmsubfp_(f, VX128_VD128, VX128_VA128, VX128_VB128, + VX128_VD128); } int InstrEmit_vnor_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { @@ -1083,10 +1062,10 @@ int InstrEmit_vnor_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vnor, 0x10000504, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vnor, 0x10000504, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vnor_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vnor128, VX128(5, 656), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vnor128, VX128(5, 656), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vnor_(f, VX128_VD128, VX128_VA128, VX128_VB128); } @@ -1101,26 +1080,29 @@ int InstrEmit_vor_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { } return 0; } -XEEMITTER(vor, 0x10000484, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vor, 0x10000484, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vor_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vor128, VX128(5, 720), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vor128, VX128(5, 720), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vor_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -int InstrEmit_vperm_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, uint32_t vc) { +int InstrEmit_vperm_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t vc) { Value* v = f.Permute(f.LoadVR(vc), f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vperm, 0x1000002B, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vperm, 0x1000002B, VXA)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vperm_(f, i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC); } -XEEMITTER(vperm128, VX128_2(5, 0), VX128_2)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vperm_(f, VX128_2_VD128, VX128_2_VA128, VX128_2_VB128, VX128_2_VC); +XEEMITTER(vperm128, VX128_2(5, 0), VX128_2)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vperm_(f, VX128_2_VD128, VX128_2_VA128, VX128_2_VB128, + VX128_2_VC); } -XEEMITTER(vpermwi128, VX128_P(6, 528), VX128_P)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpermwi128, VX128_P(6, 528), VX128_P)(PPCHIRBuilder& f, + InstrData& i) { // (VD.x) = (VB.uimm[6-7]) // (VD.y) = (VB.uimm[4-5]) // (VD.z) = (VB.uimm[2-3]) @@ -1135,15 +1117,15 @@ XEEMITTER(vpermwi128, VX128_P(6, 528), VX128_P)(PPCHIRBuilder& f, InstrData int InstrEmit_vrefp_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { // (VD) <- 1/(VB) - vec128_t one = { 1, 1, 1, 1 }; + vec128_t one = {1, 1, 1, 1}; Value* v = f.Div(f.LoadConstant(one), f.LoadVR(vb)); f.StoreVR(vd, v); return 0; } -XEEMITTER(vrefp, 0x1000010A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrefp, 0x1000010A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrefp_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrefp128, VX128_3(6, 1584), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrefp128, VX128_3(6, 1584), VX128_3)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrefp_(f, VX128_3_VD128, VX128_3_VB128); } @@ -1153,10 +1135,10 @@ int InstrEmit_vrfim_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vrfim, 0x100002CA, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfim, 0x100002CA, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfim_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrfim128, VX128_3(6, 816), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfim128, VX128_3(6, 816), VX128_3)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfim_(f, VX128_3_VD128, VX128_3_VB128); } @@ -1166,10 +1148,10 @@ int InstrEmit_vrfin_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vrfin, 0x1000020A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfin, 0x1000020A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfin_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrfin128, VX128_3(6, 880), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfin128, VX128_3(6, 880), VX128_3)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfin_(f, VX128_3_VD128, VX128_3_VB128); } @@ -1179,10 +1161,10 @@ int InstrEmit_vrfip_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vrfip, 0x1000028A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfip, 0x1000028A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfip_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrfip128, VX128_3(6, 944), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfip128, VX128_3(6, 944), VX128_3)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfip_(f, VX128_3_VD128, VX128_3_VB128); } @@ -1192,33 +1174,34 @@ int InstrEmit_vrfiz_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vrfiz, 0x1000024A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfiz, 0x1000024A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfiz_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrfiz128, VX128_3(6, 1008), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrfiz128, VX128_3(6, 1008), VX128_3)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrfiz_(f, VX128_3_VD128, VX128_3_VB128); } -XEEMITTER(vrlb, 0x10000004, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrlb, 0x10000004, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vrlh, 0x10000044, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrlh, 0x10000044, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vrlw, 0x10000084, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrlw, 0x10000084, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vrlw128, VX128(6, 80), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrlw128, VX128(6, 80), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vrlimi128, VX128_4(6, 1808), VX128_4)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrlimi128, VX128_4(6, 1808), VX128_4)(PPCHIRBuilder& f, + InstrData& i) { const uint32_t vd = i.VX128_4.VD128l | (i.VX128_4.VD128h << 5); const uint32_t vb = i.VX128_4.VB128l | (i.VX128_4.VB128h << 5); uint32_t blend_mask_src = i.VX128_4.IMM; @@ -1237,27 +1220,28 @@ XEEMITTER(vrlimi128, VX128_4(6, 1808), VX128_4)(PPCHIRBuilder& f, InstrData // TODO(benvanik): constants need conversion. uint32_t swizzle_mask; switch (rotate) { - case 1: - // X Y Z W -> Y Z W X - swizzle_mask = SWIZZLE_XYZW_TO_YZWX; - break; - case 2: - // X Y Z W -> Z W X Y - swizzle_mask = SWIZZLE_XYZW_TO_ZWXY; - break; - case 3: - // X Y Z W -> W X Y Z - swizzle_mask = SWIZZLE_XYZW_TO_WXYZ; - break; - default: XEASSERTALWAYS(); return 1; + case 1: + // X Y Z W -> Y Z W X + swizzle_mask = SWIZZLE_XYZW_TO_YZWX; + break; + case 2: + // X Y Z W -> Z W X Y + swizzle_mask = SWIZZLE_XYZW_TO_ZWXY; + break; + case 3: + // X Y Z W -> W X Y Z + swizzle_mask = SWIZZLE_XYZW_TO_WXYZ; + break; + default: + XEASSERTALWAYS(); + return 1; } v = f.Swizzle(f.LoadVR(vb), FLOAT32_TYPE, swizzle_mask); } else { v = f.LoadVR(vb); } if (blend_mask != 0x00010203) { - v = f.Permute( - f.LoadConstant(blend_mask), v, f.LoadVR(vd), INT32_TYPE); + v = f.Permute(f.LoadConstant(blend_mask), v, f.LoadVR(vd), INT32_TYPE); } f.StoreVR(vd, v); return 0; @@ -1272,38 +1256,40 @@ int InstrEmit_vrsqrtefp_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vrsqrtefp, 0x1000014A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrsqrtefp, 0x1000014A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vrsqrtefp_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vrsqrtefp128, VX128_3(6, 1648), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vrsqrtefp128, VX128_3(6, 1648), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vrsqrtefp_(f, VX128_3_VD128, VX128_3_VB128); } -int InstrEmit_vsel_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, uint32_t vc) { +int InstrEmit_vsel_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t vc) { Value* a = f.LoadVR(va); Value* v = f.Xor(f.And(f.Xor(a, f.LoadVR(vb)), f.LoadVR(vc)), a); f.StoreVR(vd, v); return 0; } -XEEMITTER(vsel, 0x1000002A, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsel, 0x1000002A, VXA)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsel_(f, i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC); } -XEEMITTER(vsel128, VX128(5, 848), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsel128, VX128(5, 848), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsel_(f, VX128_VD128, VX128_VA128, VX128_VB128, VX128_VD128); } -XEEMITTER(vsl, 0x100001C4, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsl, 0x100001C4, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vslb, 0x10000104, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslb, 0x10000104, VX)(PPCHIRBuilder& f, InstrData& i) { Value* v = f.VectorShl(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vslh, 0x10000144, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslh, 0x10000144, VX)(PPCHIRBuilder& f, InstrData& i) { Value* v = f.VectorShl(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE); f.StoreVR(i.VX.VD, v); return 0; @@ -1317,32 +1303,33 @@ int InstrEmit_vslw_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vslw, 0x10000184, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslw, 0x10000184, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vslw_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vslw128, VX128(6, 208), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslw128, VX128(6, 208), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vslw_(f, VX128_VD128, VX128_VA128, VX128_VB128); } static uint8_t __vsldoi_table[16][16] = { - { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, - { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, - { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, - { 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, - { 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, - { 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, - { 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, - { 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, - { 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, - { 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, - {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, - {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, - {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, - {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, - {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, - {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}, + {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, + {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}, + {3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}, + {4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19}, + {5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20}, + {6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21}, + {7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22}, + {8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23}, + {9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24}, + {10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}, + {11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26}, + {12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27}, + {13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28}, + {14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29}, + {15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}, }; -int InstrEmit_vsldoi_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, uint32_t sh) { +int InstrEmit_vsldoi_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, + uint32_t sh) { // (VD) <- ((VA) || (VB)) << (SH << 3) if (!sh) { f.StoreVR(vd, f.LoadVR(va)); @@ -1358,30 +1345,28 @@ int InstrEmit_vsldoi_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb, u vec128_t shift = *((vec128_t*)(__vsldoi_table[sh])); for (int i = 0; i < 4; ++i) shift.i4[i] = XESWAP32BE(shift.i4[i]); Value* control = f.LoadConstant(shift); - Value* v = f.Permute( - control, - f.LoadVR(va), - f.LoadVR(vb), INT8_TYPE); + Value* v = f.Permute(control, f.LoadVR(va), f.LoadVR(vb), INT8_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vsldoi, 0x1000002C, VXA )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsldoi, 0x1000002C, VXA)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsldoi_(f, i.VXA.VD, i.VXA.VA, i.VXA.VB, i.VXA.VC & 0xF); } -XEEMITTER(vsldoi128, VX128_5(4, 16), VX128_5)(PPCHIRBuilder& f, InstrData& i) { - return InstrEmit_vsldoi_(f, VX128_5_VD128, VX128_5_VA128, VX128_5_VB128, VX128_5_SH); +XEEMITTER(vsldoi128, VX128_5(4, 16), VX128_5)(PPCHIRBuilder& f, InstrData& i) { + return InstrEmit_vsldoi_(f, VX128_5_VD128, VX128_5_VA128, VX128_5_VB128, + VX128_5_SH); } -XEEMITTER(vslo, 0x1000040C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslo, 0x1000040C, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vslo128, VX128(5, 912), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vslo128, VX128(5, 912), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vspltb, 0x1000020C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltb, 0x1000020C, VX)(PPCHIRBuilder& f, InstrData& i) { // b <- UIMM*8 // do i = 0 to 127 by 8 // (VD)[i:i+7] <- (VB)[b:b+7] @@ -1391,7 +1376,7 @@ XEEMITTER(vspltb, 0x1000020C, VX )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(vsplth, 0x1000024C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsplth, 0x1000024C, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD.xyzw) <- (VB.uimm) Value* h = f.Extract(f.LoadVR(i.VX.VB), (i.VX.VA & 0x7), INT16_TYPE); Value* v = f.Splat(h, VEC128_TYPE); @@ -1399,21 +1384,23 @@ XEEMITTER(vsplth, 0x1000024C, VX )(PPCHIRBuilder& f, InstrData& i) { return 0; } -int InstrEmit_vspltw_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, uint32_t uimm) { +int InstrEmit_vspltw_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb, + uint32_t uimm) { // (VD.xyzw) <- (VB.uimm) Value* w = f.Extract(f.LoadVR(vb), (uimm & 0x3), INT32_TYPE); Value* v = f.Splat(w, VEC128_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vspltw, 0x1000028C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltw, 0x1000028C, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vspltw_(f, i.VX.VD, i.VX.VB, i.VX.VA); } -XEEMITTER(vspltw128, VX128_3(6, 1840), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltw128, VX128_3(6, 1840), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vspltw_(f, VX128_3_VD128, VX128_3_VB128, VX128_3_IMM); } -XEEMITTER(vspltisb, 0x1000030C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltisb, 0x1000030C, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD.xyzw) <- sign_extend(uimm) Value* v; if (i.VX.VA) { @@ -1428,7 +1415,7 @@ XEEMITTER(vspltisb, 0x1000030C, VX )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(vspltish, 0x1000034C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltish, 0x1000034C, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD.xyzw) <- sign_extend(uimm) Value* v; if (i.VX.VA) { @@ -1457,26 +1444,27 @@ int InstrEmit_vspltisw_(PPCHIRBuilder& f, uint32_t vd, uint32_t uimm) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vspltisw, 0x1000038C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltisw, 0x1000038C, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vspltisw_(f, i.VX.VD, i.VX.VA); } -XEEMITTER(vspltisw128, VX128_3(6, 1904), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vspltisw128, VX128_3(6, 1904), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { return InstrEmit_vspltisw_(f, VX128_3_VD128, VX128_3_IMM); } -XEEMITTER(vsr, 0x100002C4, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsr, 0x100002C4, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsrab, 0x10000304, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrab, 0x10000304, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- (VA) >>a (VB) by bytes Value* v = f.VectorSha(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vsrah, 0x10000344, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrah, 0x10000344, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- (VA) >>a (VB) by halfwords Value* v = f.VectorSha(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE); f.StoreVR(i.VX.VD, v); @@ -1489,21 +1477,21 @@ int InstrEmit_vsraw_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vsraw, 0x10000384, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsraw, 0x10000384, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsraw_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vsraw128, VX128(6, 336), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsraw128, VX128(6, 336), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsraw_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vsrb, 0x10000204, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrb, 0x10000204, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- (VA) >> (VB) by bytes Value* v = f.VectorShr(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT8_TYPE); f.StoreVR(i.VX.VD, v); return 0; } -XEEMITTER(vsrh, 0x10000244, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrh, 0x10000244, VX)(PPCHIRBuilder& f, InstrData& i) { // (VD) <- (VA) >> (VB) by halfwords Value* v = f.VectorShr(f.LoadVR(i.VX.VA), f.LoadVR(i.VX.VB), INT16_TYPE); f.StoreVR(i.VX.VD, v); @@ -1513,10 +1501,10 @@ XEEMITTER(vsrh, 0x10000244, VX )(PPCHIRBuilder& f, InstrData& i) { int InstrEmit_vsro_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { return 1; } -XEEMITTER(vsro, 0x1000044C, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsro, 0x1000044C, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsro_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vsro128, VX128(5, 976), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsro128, VX128(5, 976), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsro_(f, VX128_VD128, VX128_VA128, VX128_VB128); } @@ -1526,14 +1514,14 @@ int InstrEmit_vsrw_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vsrw, 0x10000284, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrw, 0x10000284, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsrw_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vsrw128, VX128(6, 464), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsrw128, VX128(6, 464), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsrw_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vsubcuw, 0x10000580, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubcuw, 0x10000580, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -1544,166 +1532,166 @@ int InstrEmit_vsubfp_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vsubfp, 0x1000004A, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubfp, 0x1000004A, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsubfp_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vsubfp128, VX128(5, 80), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubfp128, VX128(5, 80), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vsubfp_(f, VX128_VD128, VX128_VA128, VX128_VB128); } -XEEMITTER(vsubsbs, 0x10000700, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubsbs, 0x10000700, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubshs, 0x10000740, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubshs, 0x10000740, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubsws, 0x10000780, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubsws, 0x10000780, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsububm, 0x10000400, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsububm, 0x10000400, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsububs, 0x10000600, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsububs, 0x10000600, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubuhm, 0x10000440, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubuhm, 0x10000440, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubuhs, 0x10000640, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubuhs, 0x10000640, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubuwm, 0x10000480, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubuwm, 0x10000480, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsubuws, 0x10000680, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsubuws, 0x10000680, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsumsws, 0x10000788, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsumsws, 0x10000788, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsum2sws, 0x10000688, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsum2sws, 0x10000688, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsum4sbs, 0x10000708, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsum4sbs, 0x10000708, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsum4shs, 0x10000648, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsum4shs, 0x10000648, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vsum4ubs, 0x10000608, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vsum4ubs, 0x10000608, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkpx, 0x1000030E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkpx, 0x1000030E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkshss, 0x1000018E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkshss, 0x1000018E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkshss128, VX128(5, 512), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkshss128, VX128(5, 512), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkswss, 0x100001CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkswss, 0x100001CE, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkswss128, VX128(5, 640), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkswss128, VX128(5, 640), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkswus, 0x1000014E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkswus, 0x1000014E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkswus128, VX128(5, 704), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkswus128, VX128(5, 704), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuhum, 0x1000000E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuhum, 0x1000000E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuhum128, VX128(5, 768), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuhum128, VX128(5, 768), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuhus, 0x1000008E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuhus, 0x1000008E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuhus128, VX128(5, 832), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuhus128, VX128(5, 832), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkshus, 0x1000010E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkshus, 0x1000010E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkshus128, VX128(5, 576), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkshus128, VX128(5, 576), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuwum, 0x1000004E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuwum, 0x1000004E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuwum128, VX128(5, 896), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuwum128, VX128(5, 896), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuwus, 0x100000CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuwus, 0x100000CE, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vpkuwus128, VX128(5, 960), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkuwus128, VX128(5, 960), VX128)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vupkhpx, 0x1000034E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkhpx, 0x1000034E, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(vupklpx, 0x100003CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupklpx, 0x100003CE, VX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } @@ -1714,10 +1702,10 @@ int InstrEmit_vupkhsh_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vupkhsh, 0x1000024E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkhsh, 0x1000024E, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vupkhsh_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vupkhsh128, 0x100002CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkhsh128, 0x100002CE, VX)(PPCHIRBuilder& f, InstrData& i) { uint32_t va = VX128_VA128; XEASSERTZERO(va); return InstrEmit_vupkhsh_(f, VX128_VD128, VX128_VB128); @@ -1729,10 +1717,10 @@ int InstrEmit_vupklsh_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vupklsh, 0x100002CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupklsh, 0x100002CE, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vupklsh_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vupklsh128, 0x100002CE, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupklsh128, 0x100002CE, VX)(PPCHIRBuilder& f, InstrData& i) { uint32_t va = VX128_VA128; XEASSERTZERO(va); return InstrEmit_vupklsh_(f, VX128_VD128, VX128_VB128); @@ -1744,10 +1732,10 @@ int InstrEmit_vupkhsb_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vupkhsb, 0x1000020E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkhsb, 0x1000020E, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vupkhsb_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vupkhsb128, VX128(6, 896), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkhsb128, VX128(6, 896), VX128)(PPCHIRBuilder& f, InstrData& i) { uint32_t va = VX128_VA128; if (va == 0x60) { // Hrm, my instruction tables suck. @@ -1762,10 +1750,10 @@ int InstrEmit_vupklsb_(PPCHIRBuilder& f, uint32_t vd, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vupklsb, 0x1000028E, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupklsb, 0x1000028E, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vupklsb_(f, i.VX.VD, i.VX.VB); } -XEEMITTER(vupklsb128, VX128(6, 960), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupklsb128, VX128(6, 960), VX128)(PPCHIRBuilder& f, InstrData& i) { uint32_t va = VX128_VA128; if (va == 0x60) { // Hrm, my instruction tables suck. @@ -1774,7 +1762,8 @@ XEEMITTER(vupklsb128, VX128(6, 960), VX128 )(PPCHIRBuilder& f, InstrData return InstrEmit_vupklsb_(f, VX128_VD128, VX128_VB128); } -XEEMITTER(vpkd3d128, VX128_4(6, 1552), VX128_4)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vpkd3d128, VX128_4(6, 1552), VX128_4)(PPCHIRBuilder& f, + InstrData& i) { const uint32_t vd = i.VX128_4.VD128l | (i.VX128_4.VD128h << 5); const uint32_t vb = i.VX128_4.VB128l | (i.VX128_4.VB128h << 5); uint32_t type = i.VX128_4.IMM >> 2; @@ -1782,63 +1771,64 @@ XEEMITTER(vpkd3d128, VX128_4(6, 1552), VX128_4)(PPCHIRBuilder& f, InstrData uint32_t pack = i.VX128_4.z; Value* v = f.LoadVR(vb); switch (type) { - case 0: // VPACK_D3DCOLOR - v = f.Pack(v, PACK_TYPE_D3DCOLOR); - break; - case 1: // VPACK_NORMSHORT2 - v = f.Pack(v, PACK_TYPE_SHORT_2); - break; - case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT - v = f.Pack(v, PACK_TYPE_FLOAT16_2); - break; - case 5: // VPACK_... 4 FLOAT16s DXGI_FORMAT_R16G16B16A16_FLOAT - v = f.Pack(v, PACK_TYPE_FLOAT16_4); - break; - default: - XEASSERTALWAYS(); - return 1; + case 0: // VPACK_D3DCOLOR + v = f.Pack(v, PACK_TYPE_D3DCOLOR); + break; + case 1: // VPACK_NORMSHORT2 + v = f.Pack(v, PACK_TYPE_SHORT_2); + break; + case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT + v = f.Pack(v, PACK_TYPE_FLOAT16_2); + break; + case 5: // VPACK_... 4 FLOAT16s DXGI_FORMAT_R16G16B16A16_FLOAT + v = f.Pack(v, PACK_TYPE_FLOAT16_4); + break; + default: + XEASSERTALWAYS(); + return 1; } // http://hlssmod.net/he_code/public/pixelwriter.h // control = prev:0123 | new:4567 - uint32_t control = 0x00010203; // original + uint32_t control = 0x00010203; // original uint32_t src = xerotl(0x04050607, shift * 8); uint32_t mask = 0; switch (pack) { - case 1: // VPACK_32 - // VPACK_32 & shift = 3 puts lower 32 bits in x (leftmost slot). - mask = 0x000000FF << (shift * 8); - control = (control & ~mask) | (src & mask); - break; - case 2: // 64bit - if (shift < 3) { - mask = 0x0000FFFF << (shift * 8); - } else { - // w - src = 0x00000007; - mask = 0x000000FF; - } - control = (control & ~mask) | (src & mask); - break; - case 3: // 64bit - if (shift < 3) { - mask = 0x0000FFFF << (shift * 8); - } else { - // z - src = 0x00000006; - mask = 0x000000FF; - } - control = (control & ~mask) | (src & mask); - break; - default: - XEASSERTALWAYS(); - return 1; + case 1: // VPACK_32 + // VPACK_32 & shift = 3 puts lower 32 bits in x (leftmost slot). + mask = 0x000000FF << (shift * 8); + control = (control & ~mask) | (src & mask); + break; + case 2: // 64bit + if (shift < 3) { + mask = 0x0000FFFF << (shift * 8); + } else { + // w + src = 0x00000007; + mask = 0x000000FF; + } + control = (control & ~mask) | (src & mask); + break; + case 3: // 64bit + if (shift < 3) { + mask = 0x0000FFFF << (shift * 8); + } else { + // z + src = 0x00000006; + mask = 0x000000FF; + } + control = (control & ~mask) | (src & mask); + break; + default: + XEASSERTALWAYS(); + return 1; } v = f.Permute(f.LoadConstant(control), f.LoadVR(vd), v, INT32_TYPE); f.StoreVR(vd, v); return 0; } -XEEMITTER(vupkd3d128, VX128_3(6, 2032), VX128_3)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vupkd3d128, VX128_3(6, 2032), VX128_3)(PPCHIRBuilder& f, + InstrData& i) { // Can't find many docs on this. Best reference is // http://worldcraft.googlecode.com/svn/trunk/src/qylib/math/xmmatrix.inl, // which shows how it's used in some cases. Since it's all intrinsics, @@ -1848,21 +1838,21 @@ XEEMITTER(vupkd3d128, VX128_3(6, 2032), VX128_3)(PPCHIRBuilder& f, InstrData const uint32_t type = i.VX128_3.IMM >> 2; Value* v = f.LoadVR(vb); switch (type) { - case 0: // VPACK_D3DCOLOR - v = f.Unpack(v, PACK_TYPE_D3DCOLOR); - break; - case 1: // VPACK_NORMSHORT2 - v = f.Unpack(v, PACK_TYPE_SHORT_2); - break; - case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT - v = f.Unpack(v, PACK_TYPE_FLOAT16_2); - break; - case 5: // VPACK_... 4 FLOAT16s DXGI_FORMAT_R16G16B16A16_FLOAT - v = f.Unpack(v, PACK_TYPE_FLOAT16_4); - break; - default: - XEASSERTALWAYS(); - return 1; + case 0: // VPACK_D3DCOLOR + v = f.Unpack(v, PACK_TYPE_D3DCOLOR); + break; + case 1: // VPACK_NORMSHORT2 + v = f.Unpack(v, PACK_TYPE_SHORT_2); + break; + case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT + v = f.Unpack(v, PACK_TYPE_FLOAT16_2); + break; + case 5: // VPACK_... 4 FLOAT16s DXGI_FORMAT_R16G16B16A16_FLOAT + v = f.Unpack(v, PACK_TYPE_FLOAT16_4); + break; + default: + XEASSERTALWAYS(); + return 1; } f.StoreVR(vd, v); return 0; @@ -1880,261 +1870,259 @@ int InstrEmit_vxor_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb) { f.StoreVR(vd, v); return 0; } -XEEMITTER(vxor, 0x100004C4, VX )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vxor, 0x100004C4, VX)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vxor_(f, i.VX.VD, i.VX.VA, i.VX.VB); } -XEEMITTER(vxor128, VX128(5, 784), VX128 )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(vxor128, VX128(5, 784), VX128)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_vxor_(f, VX128_VD128, VX128_VA128, VX128_VB128); } - void RegisterEmitCategoryAltivec() { - XEREGISTERINSTR(dst, 0x7C0002AC); - XEREGISTERINSTR(dstst, 0x7C0002EC); - XEREGISTERINSTR(dss, 0x7C00066C); - XEREGISTERINSTR(lvebx, 0x7C00000E); - XEREGISTERINSTR(lvehx, 0x7C00004E); - XEREGISTERINSTR(lvewx, 0x7C00008E); - XEREGISTERINSTR(lvewx128, VX128_1(4, 131)); - XEREGISTERINSTR(lvsl, 0x7C00000C); - XEREGISTERINSTR(lvsl128, VX128_1(4, 3)); - XEREGISTERINSTR(lvsr, 0x7C00004C); - XEREGISTERINSTR(lvsr128, VX128_1(4, 67)); - XEREGISTERINSTR(lvx, 0x7C0000CE); - XEREGISTERINSTR(lvx128, VX128_1(4, 195)); - XEREGISTERINSTR(lvxl, 0x7C0002CE); - XEREGISTERINSTR(lvxl128, VX128_1(4, 707)); - XEREGISTERINSTR(stvebx, 0x7C00010E); - XEREGISTERINSTR(stvehx, 0x7C00014E); - XEREGISTERINSTR(stvewx, 0x7C00018E); - XEREGISTERINSTR(stvewx128, VX128_1(4, 387)); - XEREGISTERINSTR(stvx, 0x7C0001CE); - XEREGISTERINSTR(stvx128, VX128_1(4, 451)); - XEREGISTERINSTR(stvxl, 0x7C0003CE); - XEREGISTERINSTR(stvxl128, VX128_1(4, 963)); - XEREGISTERINSTR(lvlx, 0x7C00040E); - XEREGISTERINSTR(lvlx128, VX128_1(4, 1027)); - XEREGISTERINSTR(lvlxl, 0x7C00060E); - XEREGISTERINSTR(lvlxl128, VX128_1(4, 1539)); - XEREGISTERINSTR(lvrx, 0x7C00044E); - XEREGISTERINSTR(lvrx128, VX128_1(4, 1091)); - XEREGISTERINSTR(lvrxl, 0x7C00064E); - XEREGISTERINSTR(lvrxl128, VX128_1(4, 1603)); - XEREGISTERINSTR(stvlx, 0x7C00050E); - XEREGISTERINSTR(stvlx128, VX128_1(4, 1283)); - XEREGISTERINSTR(stvlxl, 0x7C00070E); - XEREGISTERINSTR(stvlxl128, VX128_1(4, 1795)); - XEREGISTERINSTR(stvrx, 0x7C00054E); - XEREGISTERINSTR(stvrx128, VX128_1(4, 1347)); - XEREGISTERINSTR(stvrxl, 0x7C00074E); - XEREGISTERINSTR(stvrxl128, VX128_1(4, 1859)); + XEREGISTERINSTR(dst, 0x7C0002AC); + XEREGISTERINSTR(dstst, 0x7C0002EC); + XEREGISTERINSTR(dss, 0x7C00066C); + XEREGISTERINSTR(lvebx, 0x7C00000E); + XEREGISTERINSTR(lvehx, 0x7C00004E); + XEREGISTERINSTR(lvewx, 0x7C00008E); + XEREGISTERINSTR(lvewx128, VX128_1(4, 131)); + XEREGISTERINSTR(lvsl, 0x7C00000C); + XEREGISTERINSTR(lvsl128, VX128_1(4, 3)); + XEREGISTERINSTR(lvsr, 0x7C00004C); + XEREGISTERINSTR(lvsr128, VX128_1(4, 67)); + XEREGISTERINSTR(lvx, 0x7C0000CE); + XEREGISTERINSTR(lvx128, VX128_1(4, 195)); + XEREGISTERINSTR(lvxl, 0x7C0002CE); + XEREGISTERINSTR(lvxl128, VX128_1(4, 707)); + XEREGISTERINSTR(stvebx, 0x7C00010E); + XEREGISTERINSTR(stvehx, 0x7C00014E); + XEREGISTERINSTR(stvewx, 0x7C00018E); + XEREGISTERINSTR(stvewx128, VX128_1(4, 387)); + XEREGISTERINSTR(stvx, 0x7C0001CE); + XEREGISTERINSTR(stvx128, VX128_1(4, 451)); + XEREGISTERINSTR(stvxl, 0x7C0003CE); + XEREGISTERINSTR(stvxl128, VX128_1(4, 963)); + XEREGISTERINSTR(lvlx, 0x7C00040E); + XEREGISTERINSTR(lvlx128, VX128_1(4, 1027)); + XEREGISTERINSTR(lvlxl, 0x7C00060E); + XEREGISTERINSTR(lvlxl128, VX128_1(4, 1539)); + XEREGISTERINSTR(lvrx, 0x7C00044E); + XEREGISTERINSTR(lvrx128, VX128_1(4, 1091)); + XEREGISTERINSTR(lvrxl, 0x7C00064E); + XEREGISTERINSTR(lvrxl128, VX128_1(4, 1603)); + XEREGISTERINSTR(stvlx, 0x7C00050E); + XEREGISTERINSTR(stvlx128, VX128_1(4, 1283)); + XEREGISTERINSTR(stvlxl, 0x7C00070E); + XEREGISTERINSTR(stvlxl128, VX128_1(4, 1795)); + XEREGISTERINSTR(stvrx, 0x7C00054E); + XEREGISTERINSTR(stvrx128, VX128_1(4, 1347)); + XEREGISTERINSTR(stvrxl, 0x7C00074E); + XEREGISTERINSTR(stvrxl128, VX128_1(4, 1859)); - XEREGISTERINSTR(mfvscr, 0x10000604); - XEREGISTERINSTR(mtvscr, 0x10000644); - XEREGISTERINSTR(vaddcuw, 0x10000180); - XEREGISTERINSTR(vaddfp, 0x1000000A); - XEREGISTERINSTR(vaddfp128, VX128(5, 16)); - XEREGISTERINSTR(vaddsbs, 0x10000300); - XEREGISTERINSTR(vaddshs, 0x10000340); - XEREGISTERINSTR(vaddsws, 0x10000380); - XEREGISTERINSTR(vaddubm, 0x10000000); - XEREGISTERINSTR(vaddubs, 0x10000200); - XEREGISTERINSTR(vadduhm, 0x10000040); - XEREGISTERINSTR(vadduhs, 0x10000240); - XEREGISTERINSTR(vadduwm, 0x10000080); - XEREGISTERINSTR(vadduws, 0x10000280); - XEREGISTERINSTR(vand, 0x10000404); - XEREGISTERINSTR(vand128, VX128(5, 528)); - XEREGISTERINSTR(vandc, 0x10000444); - XEREGISTERINSTR(vandc128, VX128(5, 592)); - XEREGISTERINSTR(vavgsb, 0x10000502); - XEREGISTERINSTR(vavgsh, 0x10000542); - XEREGISTERINSTR(vavgsw, 0x10000582); - XEREGISTERINSTR(vavgub, 0x10000402); - XEREGISTERINSTR(vavguh, 0x10000442); - XEREGISTERINSTR(vavguw, 0x10000482); - XEREGISTERINSTR(vcfsx, 0x1000034A); - XEREGISTERINSTR(vcsxwfp128, VX128_3(6, 688)); - XEREGISTERINSTR(vcfpsxws128, VX128_3(6, 560)); - XEREGISTERINSTR(vcfux, 0x1000030A); - XEREGISTERINSTR(vcuxwfp128, VX128_3(6, 752)); - XEREGISTERINSTR(vcfpuxws128, VX128_3(6, 624)); - XEREGISTERINSTR(vcmpbfp, 0x100003C6); - XEREGISTERINSTR(vcmpbfp128, VX128(6, 384)); - XEREGISTERINSTR(vcmpeqfp, 0x100000C6); - XEREGISTERINSTR(vcmpeqfp128, VX128(6, 0)); - XEREGISTERINSTR(vcmpgefp, 0x100001C6); - XEREGISTERINSTR(vcmpgefp128, VX128(6, 128)); - XEREGISTERINSTR(vcmpgtfp, 0x100002C6); - XEREGISTERINSTR(vcmpgtfp128, VX128(6, 256)); - XEREGISTERINSTR(vcmpgtsb, 0x10000306); - XEREGISTERINSTR(vcmpgtsh, 0x10000346); - XEREGISTERINSTR(vcmpgtsw, 0x10000386); - XEREGISTERINSTR(vcmpequb, 0x10000006); - XEREGISTERINSTR(vcmpgtub, 0x10000206); - XEREGISTERINSTR(vcmpequh, 0x10000046); - XEREGISTERINSTR(vcmpgtuh, 0x10000246); - XEREGISTERINSTR(vcmpequw, 0x10000086); - XEREGISTERINSTR(vcmpequw128, VX128(6, 512)); - XEREGISTERINSTR(vcmpgtuw, 0x10000286); - XEREGISTERINSTR(vctsxs, 0x100003CA); - XEREGISTERINSTR(vctuxs, 0x1000038A); - XEREGISTERINSTR(vexptefp, 0x1000018A); - XEREGISTERINSTR(vexptefp128, VX128_3(6, 1712)); - XEREGISTERINSTR(vlogefp, 0x100001CA); - XEREGISTERINSTR(vlogefp128, VX128_3(6, 1776)); - XEREGISTERINSTR(vmaddfp, 0x1000002E); - XEREGISTERINSTR(vmaddfp128, VX128(5, 208)); - XEREGISTERINSTR(vmaddcfp128, VX128(5, 272)); - XEREGISTERINSTR(vmaxfp, 0x1000040A); - XEREGISTERINSTR(vmaxfp128, VX128(6, 640)); - XEREGISTERINSTR(vmaxsb, 0x10000102); - XEREGISTERINSTR(vmaxsh, 0x10000142); - XEREGISTERINSTR(vmaxsw, 0x10000182); - XEREGISTERINSTR(vmaxub, 0x10000002); - XEREGISTERINSTR(vmaxuh, 0x10000042); - XEREGISTERINSTR(vmaxuw, 0x10000082); - XEREGISTERINSTR(vmhaddshs, 0x10000020); - XEREGISTERINSTR(vmhraddshs, 0x10000021); - XEREGISTERINSTR(vminfp, 0x1000044A); - XEREGISTERINSTR(vminfp128, VX128(6, 704)); - XEREGISTERINSTR(vminsb, 0x10000302); - XEREGISTERINSTR(vminsh, 0x10000342); - XEREGISTERINSTR(vminsw, 0x10000382); - XEREGISTERINSTR(vminub, 0x10000202); - XEREGISTERINSTR(vminuh, 0x10000242); - XEREGISTERINSTR(vminuw, 0x10000282); - XEREGISTERINSTR(vmladduhm, 0x10000022); - XEREGISTERINSTR(vmrghb, 0x1000000C); - XEREGISTERINSTR(vmrghh, 0x1000004C); - XEREGISTERINSTR(vmrghw, 0x1000008C); - XEREGISTERINSTR(vmrghw128, VX128(6, 768)); - XEREGISTERINSTR(vmrglb, 0x1000010C); - XEREGISTERINSTR(vmrglh, 0x1000014C); - XEREGISTERINSTR(vmrglw, 0x1000018C); - XEREGISTERINSTR(vmrglw128, VX128(6, 832)); - XEREGISTERINSTR(vmsummbm, 0x10000025); - XEREGISTERINSTR(vmsumshm, 0x10000028); - XEREGISTERINSTR(vmsumshs, 0x10000029); - XEREGISTERINSTR(vmsumubm, 0x10000024); - XEREGISTERINSTR(vmsumuhm, 0x10000026); - XEREGISTERINSTR(vmsumuhs, 0x10000027); - XEREGISTERINSTR(vmsum3fp128, VX128(5, 400)); - XEREGISTERINSTR(vmsum4fp128, VX128(5, 464)); - XEREGISTERINSTR(vmulesb, 0x10000308); - XEREGISTERINSTR(vmulesh, 0x10000348); - XEREGISTERINSTR(vmuleub, 0x10000208); - XEREGISTERINSTR(vmuleuh, 0x10000248); - XEREGISTERINSTR(vmulosb, 0x10000108); - XEREGISTERINSTR(vmulosh, 0x10000148); - XEREGISTERINSTR(vmuloub, 0x10000008); - XEREGISTERINSTR(vmulouh, 0x10000048); - XEREGISTERINSTR(vmulfp128, VX128(5, 144)); - XEREGISTERINSTR(vnmsubfp, 0x1000002F); - XEREGISTERINSTR(vnmsubfp128, VX128(5, 336)); - XEREGISTERINSTR(vnor, 0x10000504); - XEREGISTERINSTR(vnor128, VX128(5, 656)); - XEREGISTERINSTR(vor, 0x10000484); - XEREGISTERINSTR(vor128, VX128(5, 720)); - XEREGISTERINSTR(vperm, 0x1000002B); - XEREGISTERINSTR(vperm128, VX128_2(5, 0)); - XEREGISTERINSTR(vpermwi128, VX128_P(6, 528)); - XEREGISTERINSTR(vpkpx, 0x1000030E); - XEREGISTERINSTR(vpkshss, 0x1000018E); - XEREGISTERINSTR(vpkshss128, VX128(5, 512)); - XEREGISTERINSTR(vpkshus, 0x1000010E); - XEREGISTERINSTR(vpkshus128, VX128(5, 576)); - XEREGISTERINSTR(vpkswss, 0x100001CE); - XEREGISTERINSTR(vpkswss128, VX128(5, 640)); - XEREGISTERINSTR(vpkswus, 0x1000014E); - XEREGISTERINSTR(vpkswus128, VX128(5, 704)); - XEREGISTERINSTR(vpkuhum, 0x1000000E); - XEREGISTERINSTR(vpkuhum128, VX128(5, 768)); - XEREGISTERINSTR(vpkuhus, 0x1000008E); - XEREGISTERINSTR(vpkuhus128, VX128(5, 832)); - XEREGISTERINSTR(vpkuwum, 0x1000004E); - XEREGISTERINSTR(vpkuwum128, VX128(5, 896)); - XEREGISTERINSTR(vpkuwus, 0x100000CE); - XEREGISTERINSTR(vpkuwus128, VX128(5, 960)); - XEREGISTERINSTR(vpkd3d128, VX128_4(6, 1552)); - XEREGISTERINSTR(vrefp, 0x1000010A); - XEREGISTERINSTR(vrefp128, VX128_3(6, 1584)); - XEREGISTERINSTR(vrfim, 0x100002CA); - XEREGISTERINSTR(vrfim128, VX128_3(6, 816)); - XEREGISTERINSTR(vrfin, 0x1000020A); - XEREGISTERINSTR(vrfin128, VX128_3(6, 880)); - XEREGISTERINSTR(vrfip, 0x1000028A); - XEREGISTERINSTR(vrfip128, VX128_3(6, 944)); - XEREGISTERINSTR(vrfiz, 0x1000024A); - XEREGISTERINSTR(vrfiz128, VX128_3(6, 1008)); - XEREGISTERINSTR(vrlb, 0x10000004); - XEREGISTERINSTR(vrlh, 0x10000044); - XEREGISTERINSTR(vrlw, 0x10000084); - XEREGISTERINSTR(vrlw128, VX128(6, 80)); - XEREGISTERINSTR(vrlimi128, VX128_4(6, 1808)); - XEREGISTERINSTR(vrsqrtefp, 0x1000014A); - XEREGISTERINSTR(vrsqrtefp128, VX128_3(6, 1648)); - XEREGISTERINSTR(vsel, 0x1000002A); - XEREGISTERINSTR(vsel128, VX128(5, 848)); - XEREGISTERINSTR(vsl, 0x100001C4); - XEREGISTERINSTR(vslb, 0x10000104); - XEREGISTERINSTR(vslh, 0x10000144); - XEREGISTERINSTR(vslo, 0x1000040C); - XEREGISTERINSTR(vslo128, VX128(5, 912)); - XEREGISTERINSTR(vslw, 0x10000184); - XEREGISTERINSTR(vslw128, VX128(6, 208)); - XEREGISTERINSTR(vsldoi, 0x1000002C); - XEREGISTERINSTR(vsldoi128, VX128_5(4, 16)); - XEREGISTERINSTR(vspltb, 0x1000020C); - XEREGISTERINSTR(vsplth, 0x1000024C); - XEREGISTERINSTR(vspltw, 0x1000028C); - XEREGISTERINSTR(vspltw128, VX128_3(6, 1840)); - XEREGISTERINSTR(vspltisb, 0x1000030C); - XEREGISTERINSTR(vspltish, 0x1000034C); - XEREGISTERINSTR(vspltisw, 0x1000038C); - XEREGISTERINSTR(vspltisw128, VX128_3(6, 1904)); - XEREGISTERINSTR(vsr, 0x100002C4); - XEREGISTERINSTR(vsrab, 0x10000304); - XEREGISTERINSTR(vsrah, 0x10000344); - XEREGISTERINSTR(vsraw, 0x10000384); - XEREGISTERINSTR(vsraw128, VX128(6, 336)); - XEREGISTERINSTR(vsrb, 0x10000204); - XEREGISTERINSTR(vsrh, 0x10000244); - XEREGISTERINSTR(vsro, 0x1000044C); - XEREGISTERINSTR(vsro128, VX128(5, 976)); - XEREGISTERINSTR(vsrw, 0x10000284); - XEREGISTERINSTR(vsrw128, VX128(6, 464)); - XEREGISTERINSTR(vsubcuw, 0x10000580); - XEREGISTERINSTR(vsubfp, 0x1000004A); - XEREGISTERINSTR(vsubfp128, VX128(5, 80)); - XEREGISTERINSTR(vsubsbs, 0x10000700); - XEREGISTERINSTR(vsubshs, 0x10000740); - XEREGISTERINSTR(vsubsws, 0x10000780); - XEREGISTERINSTR(vsububm, 0x10000400); - XEREGISTERINSTR(vsububs, 0x10000600); - XEREGISTERINSTR(vsubuhm, 0x10000440); - XEREGISTERINSTR(vsubuhs, 0x10000640); - XEREGISTERINSTR(vsubuwm, 0x10000480); - XEREGISTERINSTR(vsubuws, 0x10000680); - XEREGISTERINSTR(vsumsws, 0x10000788); - XEREGISTERINSTR(vsum2sws, 0x10000688); - XEREGISTERINSTR(vsum4sbs, 0x10000708); - XEREGISTERINSTR(vsum4shs, 0x10000648); - XEREGISTERINSTR(vsum4ubs, 0x10000608); - XEREGISTERINSTR(vupkhpx, 0x1000034E); - XEREGISTERINSTR(vupkhsb, 0x1000020E); - XEREGISTERINSTR(vupkhsb128, VX128(6, 896)); - XEREGISTERINSTR(vupkhsh, 0x1000024E); - XEREGISTERINSTR(vupklpx, 0x100003CE); - XEREGISTERINSTR(vupklsb, 0x1000028E); - XEREGISTERINSTR(vupklsb128, VX128(6, 960)); - XEREGISTERINSTR(vupklsh, 0x100002CE); - XEREGISTERINSTR(vupkd3d128, VX128_3(6, 2032)); - XEREGISTERINSTR(vxor, 0x100004C4); - XEREGISTERINSTR(vxor128, VX128(5, 784)); + XEREGISTERINSTR(mfvscr, 0x10000604); + XEREGISTERINSTR(mtvscr, 0x10000644); + XEREGISTERINSTR(vaddcuw, 0x10000180); + XEREGISTERINSTR(vaddfp, 0x1000000A); + XEREGISTERINSTR(vaddfp128, VX128(5, 16)); + XEREGISTERINSTR(vaddsbs, 0x10000300); + XEREGISTERINSTR(vaddshs, 0x10000340); + XEREGISTERINSTR(vaddsws, 0x10000380); + XEREGISTERINSTR(vaddubm, 0x10000000); + XEREGISTERINSTR(vaddubs, 0x10000200); + XEREGISTERINSTR(vadduhm, 0x10000040); + XEREGISTERINSTR(vadduhs, 0x10000240); + XEREGISTERINSTR(vadduwm, 0x10000080); + XEREGISTERINSTR(vadduws, 0x10000280); + XEREGISTERINSTR(vand, 0x10000404); + XEREGISTERINSTR(vand128, VX128(5, 528)); + XEREGISTERINSTR(vandc, 0x10000444); + XEREGISTERINSTR(vandc128, VX128(5, 592)); + XEREGISTERINSTR(vavgsb, 0x10000502); + XEREGISTERINSTR(vavgsh, 0x10000542); + XEREGISTERINSTR(vavgsw, 0x10000582); + XEREGISTERINSTR(vavgub, 0x10000402); + XEREGISTERINSTR(vavguh, 0x10000442); + XEREGISTERINSTR(vavguw, 0x10000482); + XEREGISTERINSTR(vcfsx, 0x1000034A); + XEREGISTERINSTR(vcsxwfp128, VX128_3(6, 688)); + XEREGISTERINSTR(vcfpsxws128, VX128_3(6, 560)); + XEREGISTERINSTR(vcfux, 0x1000030A); + XEREGISTERINSTR(vcuxwfp128, VX128_3(6, 752)); + XEREGISTERINSTR(vcfpuxws128, VX128_3(6, 624)); + XEREGISTERINSTR(vcmpbfp, 0x100003C6); + XEREGISTERINSTR(vcmpbfp128, VX128(6, 384)); + XEREGISTERINSTR(vcmpeqfp, 0x100000C6); + XEREGISTERINSTR(vcmpeqfp128, VX128(6, 0)); + XEREGISTERINSTR(vcmpgefp, 0x100001C6); + XEREGISTERINSTR(vcmpgefp128, VX128(6, 128)); + XEREGISTERINSTR(vcmpgtfp, 0x100002C6); + XEREGISTERINSTR(vcmpgtfp128, VX128(6, 256)); + XEREGISTERINSTR(vcmpgtsb, 0x10000306); + XEREGISTERINSTR(vcmpgtsh, 0x10000346); + XEREGISTERINSTR(vcmpgtsw, 0x10000386); + XEREGISTERINSTR(vcmpequb, 0x10000006); + XEREGISTERINSTR(vcmpgtub, 0x10000206); + XEREGISTERINSTR(vcmpequh, 0x10000046); + XEREGISTERINSTR(vcmpgtuh, 0x10000246); + XEREGISTERINSTR(vcmpequw, 0x10000086); + XEREGISTERINSTR(vcmpequw128, VX128(6, 512)); + XEREGISTERINSTR(vcmpgtuw, 0x10000286); + XEREGISTERINSTR(vctsxs, 0x100003CA); + XEREGISTERINSTR(vctuxs, 0x1000038A); + XEREGISTERINSTR(vexptefp, 0x1000018A); + XEREGISTERINSTR(vexptefp128, VX128_3(6, 1712)); + XEREGISTERINSTR(vlogefp, 0x100001CA); + XEREGISTERINSTR(vlogefp128, VX128_3(6, 1776)); + XEREGISTERINSTR(vmaddfp, 0x1000002E); + XEREGISTERINSTR(vmaddfp128, VX128(5, 208)); + XEREGISTERINSTR(vmaddcfp128, VX128(5, 272)); + XEREGISTERINSTR(vmaxfp, 0x1000040A); + XEREGISTERINSTR(vmaxfp128, VX128(6, 640)); + XEREGISTERINSTR(vmaxsb, 0x10000102); + XEREGISTERINSTR(vmaxsh, 0x10000142); + XEREGISTERINSTR(vmaxsw, 0x10000182); + XEREGISTERINSTR(vmaxub, 0x10000002); + XEREGISTERINSTR(vmaxuh, 0x10000042); + XEREGISTERINSTR(vmaxuw, 0x10000082); + XEREGISTERINSTR(vmhaddshs, 0x10000020); + XEREGISTERINSTR(vmhraddshs, 0x10000021); + XEREGISTERINSTR(vminfp, 0x1000044A); + XEREGISTERINSTR(vminfp128, VX128(6, 704)); + XEREGISTERINSTR(vminsb, 0x10000302); + XEREGISTERINSTR(vminsh, 0x10000342); + XEREGISTERINSTR(vminsw, 0x10000382); + XEREGISTERINSTR(vminub, 0x10000202); + XEREGISTERINSTR(vminuh, 0x10000242); + XEREGISTERINSTR(vminuw, 0x10000282); + XEREGISTERINSTR(vmladduhm, 0x10000022); + XEREGISTERINSTR(vmrghb, 0x1000000C); + XEREGISTERINSTR(vmrghh, 0x1000004C); + XEREGISTERINSTR(vmrghw, 0x1000008C); + XEREGISTERINSTR(vmrghw128, VX128(6, 768)); + XEREGISTERINSTR(vmrglb, 0x1000010C); + XEREGISTERINSTR(vmrglh, 0x1000014C); + XEREGISTERINSTR(vmrglw, 0x1000018C); + XEREGISTERINSTR(vmrglw128, VX128(6, 832)); + XEREGISTERINSTR(vmsummbm, 0x10000025); + XEREGISTERINSTR(vmsumshm, 0x10000028); + XEREGISTERINSTR(vmsumshs, 0x10000029); + XEREGISTERINSTR(vmsumubm, 0x10000024); + XEREGISTERINSTR(vmsumuhm, 0x10000026); + XEREGISTERINSTR(vmsumuhs, 0x10000027); + XEREGISTERINSTR(vmsum3fp128, VX128(5, 400)); + XEREGISTERINSTR(vmsum4fp128, VX128(5, 464)); + XEREGISTERINSTR(vmulesb, 0x10000308); + XEREGISTERINSTR(vmulesh, 0x10000348); + XEREGISTERINSTR(vmuleub, 0x10000208); + XEREGISTERINSTR(vmuleuh, 0x10000248); + XEREGISTERINSTR(vmulosb, 0x10000108); + XEREGISTERINSTR(vmulosh, 0x10000148); + XEREGISTERINSTR(vmuloub, 0x10000008); + XEREGISTERINSTR(vmulouh, 0x10000048); + XEREGISTERINSTR(vmulfp128, VX128(5, 144)); + XEREGISTERINSTR(vnmsubfp, 0x1000002F); + XEREGISTERINSTR(vnmsubfp128, VX128(5, 336)); + XEREGISTERINSTR(vnor, 0x10000504); + XEREGISTERINSTR(vnor128, VX128(5, 656)); + XEREGISTERINSTR(vor, 0x10000484); + XEREGISTERINSTR(vor128, VX128(5, 720)); + XEREGISTERINSTR(vperm, 0x1000002B); + XEREGISTERINSTR(vperm128, VX128_2(5, 0)); + XEREGISTERINSTR(vpermwi128, VX128_P(6, 528)); + XEREGISTERINSTR(vpkpx, 0x1000030E); + XEREGISTERINSTR(vpkshss, 0x1000018E); + XEREGISTERINSTR(vpkshss128, VX128(5, 512)); + XEREGISTERINSTR(vpkshus, 0x1000010E); + XEREGISTERINSTR(vpkshus128, VX128(5, 576)); + XEREGISTERINSTR(vpkswss, 0x100001CE); + XEREGISTERINSTR(vpkswss128, VX128(5, 640)); + XEREGISTERINSTR(vpkswus, 0x1000014E); + XEREGISTERINSTR(vpkswus128, VX128(5, 704)); + XEREGISTERINSTR(vpkuhum, 0x1000000E); + XEREGISTERINSTR(vpkuhum128, VX128(5, 768)); + XEREGISTERINSTR(vpkuhus, 0x1000008E); + XEREGISTERINSTR(vpkuhus128, VX128(5, 832)); + XEREGISTERINSTR(vpkuwum, 0x1000004E); + XEREGISTERINSTR(vpkuwum128, VX128(5, 896)); + XEREGISTERINSTR(vpkuwus, 0x100000CE); + XEREGISTERINSTR(vpkuwus128, VX128(5, 960)); + XEREGISTERINSTR(vpkd3d128, VX128_4(6, 1552)); + XEREGISTERINSTR(vrefp, 0x1000010A); + XEREGISTERINSTR(vrefp128, VX128_3(6, 1584)); + XEREGISTERINSTR(vrfim, 0x100002CA); + XEREGISTERINSTR(vrfim128, VX128_3(6, 816)); + XEREGISTERINSTR(vrfin, 0x1000020A); + XEREGISTERINSTR(vrfin128, VX128_3(6, 880)); + XEREGISTERINSTR(vrfip, 0x1000028A); + XEREGISTERINSTR(vrfip128, VX128_3(6, 944)); + XEREGISTERINSTR(vrfiz, 0x1000024A); + XEREGISTERINSTR(vrfiz128, VX128_3(6, 1008)); + XEREGISTERINSTR(vrlb, 0x10000004); + XEREGISTERINSTR(vrlh, 0x10000044); + XEREGISTERINSTR(vrlw, 0x10000084); + XEREGISTERINSTR(vrlw128, VX128(6, 80)); + XEREGISTERINSTR(vrlimi128, VX128_4(6, 1808)); + XEREGISTERINSTR(vrsqrtefp, 0x1000014A); + XEREGISTERINSTR(vrsqrtefp128, VX128_3(6, 1648)); + XEREGISTERINSTR(vsel, 0x1000002A); + XEREGISTERINSTR(vsel128, VX128(5, 848)); + XEREGISTERINSTR(vsl, 0x100001C4); + XEREGISTERINSTR(vslb, 0x10000104); + XEREGISTERINSTR(vslh, 0x10000144); + XEREGISTERINSTR(vslo, 0x1000040C); + XEREGISTERINSTR(vslo128, VX128(5, 912)); + XEREGISTERINSTR(vslw, 0x10000184); + XEREGISTERINSTR(vslw128, VX128(6, 208)); + XEREGISTERINSTR(vsldoi, 0x1000002C); + XEREGISTERINSTR(vsldoi128, VX128_5(4, 16)); + XEREGISTERINSTR(vspltb, 0x1000020C); + XEREGISTERINSTR(vsplth, 0x1000024C); + XEREGISTERINSTR(vspltw, 0x1000028C); + XEREGISTERINSTR(vspltw128, VX128_3(6, 1840)); + XEREGISTERINSTR(vspltisb, 0x1000030C); + XEREGISTERINSTR(vspltish, 0x1000034C); + XEREGISTERINSTR(vspltisw, 0x1000038C); + XEREGISTERINSTR(vspltisw128, VX128_3(6, 1904)); + XEREGISTERINSTR(vsr, 0x100002C4); + XEREGISTERINSTR(vsrab, 0x10000304); + XEREGISTERINSTR(vsrah, 0x10000344); + XEREGISTERINSTR(vsraw, 0x10000384); + XEREGISTERINSTR(vsraw128, VX128(6, 336)); + XEREGISTERINSTR(vsrb, 0x10000204); + XEREGISTERINSTR(vsrh, 0x10000244); + XEREGISTERINSTR(vsro, 0x1000044C); + XEREGISTERINSTR(vsro128, VX128(5, 976)); + XEREGISTERINSTR(vsrw, 0x10000284); + XEREGISTERINSTR(vsrw128, VX128(6, 464)); + XEREGISTERINSTR(vsubcuw, 0x10000580); + XEREGISTERINSTR(vsubfp, 0x1000004A); + XEREGISTERINSTR(vsubfp128, VX128(5, 80)); + XEREGISTERINSTR(vsubsbs, 0x10000700); + XEREGISTERINSTR(vsubshs, 0x10000740); + XEREGISTERINSTR(vsubsws, 0x10000780); + XEREGISTERINSTR(vsububm, 0x10000400); + XEREGISTERINSTR(vsububs, 0x10000600); + XEREGISTERINSTR(vsubuhm, 0x10000440); + XEREGISTERINSTR(vsubuhs, 0x10000640); + XEREGISTERINSTR(vsubuwm, 0x10000480); + XEREGISTERINSTR(vsubuws, 0x10000680); + XEREGISTERINSTR(vsumsws, 0x10000788); + XEREGISTERINSTR(vsum2sws, 0x10000688); + XEREGISTERINSTR(vsum4sbs, 0x10000708); + XEREGISTERINSTR(vsum4shs, 0x10000648); + XEREGISTERINSTR(vsum4ubs, 0x10000608); + XEREGISTERINSTR(vupkhpx, 0x1000034E); + XEREGISTERINSTR(vupkhsb, 0x1000020E); + XEREGISTERINSTR(vupkhsb128, VX128(6, 896)); + XEREGISTERINSTR(vupkhsh, 0x1000024E); + XEREGISTERINSTR(vupklpx, 0x100003CE); + XEREGISTERINSTR(vupklsb, 0x1000028E); + XEREGISTERINSTR(vupklsb128, VX128(6, 960)); + XEREGISTERINSTR(vupklsh, 0x100002CE); + XEREGISTERINSTR(vupkd3d128, VX128_3(6, 2032)); + XEREGISTERINSTR(vxor, 0x100004C4); + XEREGISTERINSTR(vxor128, VX128(5, 784)); } - } // namespace ppc } // namespace frontend } // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_emit_alu.cc b/src/alloy/frontend/ppc/ppc_emit_alu.cc index ce023eb85..cf8245064 100644 --- a/src/alloy/frontend/ppc/ppc_emit_alu.cc +++ b/src/alloy/frontend/ppc/ppc_emit_alu.cc @@ -12,28 +12,24 @@ #include #include - -using namespace alloy::frontend::ppc; -using namespace alloy::hir; -using namespace alloy::runtime; - - namespace alloy { namespace frontend { namespace ppc { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::hir::Value; // Integer arithmetic (A-3) -XEEMITTER(addx, 0x7C000214, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addx, 0x7C000214, XO)(PPCHIRBuilder& f, InstrData& i) { // RD <- (RA) + (RB) - Value* v = f.Add( - f.LoadGPR(i.XO.RA), - f.LoadGPR(i.XO.RB)); + Value* v = f.Add(f.LoadGPR(i.XO.RA), f.LoadGPR(i.XO.RB)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow(EFLAGS OF?); + // e.update_xer_with_overflow(EFLAGS OF?); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -41,18 +37,16 @@ XEEMITTER(addx, 0x7C000214, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addcx, 0x7C000014, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addcx, 0x7C000014, XO)(PPCHIRBuilder& f, InstrData& i) { // RD <- (RA) + (RB) // CA <- carry bit - Value* v = f.Add( - f.LoadGPR(i.XO.RA), - f.LoadGPR(i.XO.RB), - ARITHMETIC_SET_CARRY); + Value* v = + f.Add(f.LoadGPR(i.XO.RA), f.LoadGPR(i.XO.RB), ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow(EFLAGS OF?); + // e.update_xer_with_overflow(EFLAGS OF?); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -60,18 +54,15 @@ XEEMITTER(addcx, 0x7C000014, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addex, 0x7C000114, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addex, 0x7C000114, XO)(PPCHIRBuilder& f, InstrData& i) { // RD <- (RA) + (RB) + XER[CA] - Value* v = f.AddWithCarry( - f.LoadGPR(i.XO.RA), - f.LoadGPR(i.XO.RB), - f.LoadCA(), - ARITHMETIC_SET_CARRY); + Value* v = f.AddWithCarry(f.LoadGPR(i.XO.RA), f.LoadGPR(i.XO.RB), f.LoadCA(), + ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow(EFLAGS OF?); + // e.update_xer_with_overflow(EFLAGS OF?); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -79,7 +70,7 @@ XEEMITTER(addex, 0x7C000114, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addi, 0x38000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addi, 0x38000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // RT <- EXTS(SI) // else @@ -93,30 +84,26 @@ XEEMITTER(addi, 0x38000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addic, 0x30000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addic, 0x30000000, D)(PPCHIRBuilder& f, InstrData& i) { // RT <- (RA) + EXTS(SI) - Value* v = f.Add( - f.LoadGPR(i.D.RA), - f.LoadConstant(XEEXTS16(i.D.DS)), - ARITHMETIC_SET_CARRY); + Value* v = f.Add(f.LoadGPR(i.D.RA), f.LoadConstant(XEEXTS16(i.D.DS)), + ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.D.RT, v); return 0; } -XEEMITTER(addicx, 0x34000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addicx, 0x34000000, D)(PPCHIRBuilder& f, InstrData& i) { // RT <- (RA) + EXTS(SI) - Value* v = f.Add( - f.LoadGPR(i.D.RA), - f.LoadConstant(XEEXTS16(i.D.DS)), - ARITHMETIC_SET_CARRY); + Value* v = f.Add(f.LoadGPR(i.D.RA), f.LoadConstant(XEEXTS16(i.D.DS)), + ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.D.RT, v); f.UpdateCR(0, v); return 0; } -XEEMITTER(addis, 0x3C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addis, 0x3C000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // RT <- EXTS(SI) || i16.0 // else @@ -130,16 +117,13 @@ XEEMITTER(addis, 0x3C000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addmex, 0x7C0001D4, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addmex, 0x7C0001D4, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- (RA) + CA - 1 - Value* v = f.AddWithCarry( - f.LoadGPR(i.XO.RA), - f.LoadConstant((int64_t)-1), - f.LoadCA(), - ARITHMETIC_SET_CARRY); + Value* v = f.AddWithCarry(f.LoadGPR(i.XO.RA), f.LoadConstant((int64_t)-1), + f.LoadCA(), ARITHMETIC_SET_CARRY); if (i.XO.OE) { // With XER[SO] update too. - //e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); + // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); XEASSERTALWAYS(); } else { // Just CA update. @@ -152,16 +136,13 @@ XEEMITTER(addmex, 0x7C0001D4, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(addzex, 0x7C000194, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(addzex, 0x7C000194, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- (RA) + CA - Value* v = f.AddWithCarry( - f.LoadGPR(i.XO.RA), - f.LoadZero(INT64_TYPE), - f.LoadCA(), - ARITHMETIC_SET_CARRY); + Value* v = f.AddWithCarry(f.LoadGPR(i.XO.RA), f.LoadZero(INT64_TYPE), + f.LoadCA(), ARITHMETIC_SET_CARRY); if (i.XO.OE) { // With XER[SO] update too. - //e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); + // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); XEASSERTALWAYS(); } else { // Just CA update. @@ -174,7 +155,7 @@ XEEMITTER(addzex, 0x7C000194, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(divdx, 0x7C0003D2, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(divdx, 0x7C0003D2, XO)(PPCHIRBuilder& f, InstrData& i) { // dividend <- (RA) // divisor <- (RB) // if divisor = 0 then @@ -190,7 +171,7 @@ XEEMITTER(divdx, 0x7C0003D2, XO )(PPCHIRBuilder& f, InstrData& i) { f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { // If we are OE=1 we need to clear the overflow bit. - //e.update_xer_with_overflow(e.get_uint64(0)); + // e.update_xer_with_overflow(e.get_uint64(0)); XEASSERTALWAYS(); return 1; } @@ -200,7 +181,7 @@ XEEMITTER(divdx, 0x7C0003D2, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(divdux, 0x7C000392, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(divdux, 0x7C000392, XO)(PPCHIRBuilder& f, InstrData& i) { // dividend <- (RA) // divisor <- (RB) // if divisor = 0 then @@ -216,7 +197,7 @@ XEEMITTER(divdux, 0x7C000392, XO )(PPCHIRBuilder& f, InstrData& i) { f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { // If we are OE=1 we need to clear the overflow bit. - //e.update_xer_with_overflow(e.get_uint64(0)); + // e.update_xer_with_overflow(e.get_uint64(0)); XEASSERTALWAYS(); return 1; } @@ -226,7 +207,7 @@ XEEMITTER(divdux, 0x7C000392, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(divwx, 0x7C0003D6, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(divwx, 0x7C0003D6, XO)(PPCHIRBuilder& f, InstrData& i) { // dividend[0:31] <- (RA)[32:63] // divisor[0:31] <- (RB)[32:63] // if divisor = 0 then @@ -244,7 +225,7 @@ XEEMITTER(divwx, 0x7C0003D6, XO )(PPCHIRBuilder& f, InstrData& i) { f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { // If we are OE=1 we need to clear the overflow bit. - //e.update_xer_with_overflow(e.get_uint64(0)); + // e.update_xer_with_overflow(e.get_uint64(0)); XEASSERTALWAYS(); return 1; } @@ -254,7 +235,7 @@ XEEMITTER(divwx, 0x7C0003D6, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(divwux, 0x7C000396, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(divwux, 0x7C000396, XO)(PPCHIRBuilder& f, InstrData& i) { // dividend[0:31] <- (RA)[32:63] // divisor[0:31] <- (RB)[32:63] // if divisor = 0 then @@ -273,7 +254,7 @@ XEEMITTER(divwux, 0x7C000396, XO )(PPCHIRBuilder& f, InstrData& i) { f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { // If we are OE=1 we need to clear the overflow bit. - //e.update_xer_with_overflow(e.get_uint64(0)); + // e.update_xer_with_overflow(e.get_uint64(0)); XEASSERTALWAYS(); return 1; } @@ -283,7 +264,7 @@ XEEMITTER(divwux, 0x7C000396, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulhdx, 0x7C000092, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulhdx, 0x7C000092, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ((RA) × (RB) as 128)[0:63] if (i.XO.OE) { // With XER update. @@ -298,15 +279,15 @@ XEEMITTER(mulhdx, 0x7C000092, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulhdux, 0x7C000012, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulhdux, 0x7C000012, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ((RA) × (RB) as 128)[0:63] if (i.XO.OE) { // With XER update. XEINSTRNOTIMPLEMENTED(); return 1; } - Value* v = f.MulHi( - f.LoadGPR(i.XO.RA), f.LoadGPR(i.XO.RB), ARITHMETIC_UNSIGNED); + Value* v = + f.MulHi(f.LoadGPR(i.XO.RA), f.LoadGPR(i.XO.RB), ARITHMETIC_UNSIGNED); f.StoreGPR(i.XO.RT, v); if (i.XO.Rc) { f.UpdateCR(0, v); @@ -314,16 +295,16 @@ XEEMITTER(mulhdux, 0x7C000012, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulhwx, 0x7C000096, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulhwx, 0x7C000096, XO)(PPCHIRBuilder& f, InstrData& i) { // RT[32:64] <- ((RA)[32:63] × (RB)[32:63])[0:31] if (i.XO.OE) { // With XER update. XEINSTRNOTIMPLEMENTED(); return 1; } - Value* v = f.SignExtend(f.MulHi( - f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), - f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE)), INT64_TYPE); + Value* v = f.SignExtend(f.MulHi(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), + f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE)), + INT64_TYPE); f.StoreGPR(i.XO.RT, v); if (i.XO.Rc) { f.UpdateCR(0, v); @@ -331,17 +312,17 @@ XEEMITTER(mulhwx, 0x7C000096, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulhwux, 0x7C000016, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulhwux, 0x7C000016, XO)(PPCHIRBuilder& f, InstrData& i) { // RT[32:64] <- ((RA)[32:63] × (RB)[32:63])[0:31] if (i.XO.OE) { // With XER update. XEINSTRNOTIMPLEMENTED(); return 1; } - Value* v = f.ZeroExtend(f.MulHi( - f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), - f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE), - ARITHMETIC_UNSIGNED), INT64_TYPE); + Value* v = f.ZeroExtend( + f.MulHi(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), + f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE), ARITHMETIC_UNSIGNED), + INT64_TYPE); f.StoreGPR(i.XO.RT, v); if (i.XO.Rc) { f.UpdateCR(0, v, false); @@ -349,7 +330,7 @@ XEEMITTER(mulhwux, 0x7C000016, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulldx, 0x7C0001D2, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulldx, 0x7C0001D2, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ((RA) × (RB))[64:127] if (i.XO.OE) { // With XER update. @@ -364,7 +345,7 @@ XEEMITTER(mulldx, 0x7C0001D2, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mulli, 0x1C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mulli, 0x1C000000, D)(PPCHIRBuilder& f, InstrData& i) { // prod[0:127] <- (RA) × EXTS(SI) // RT <- prod[64:127] Value* v = f.Mul(f.LoadGPR(i.D.RA), f.LoadConstant(XEEXTS16(i.D.DS))); @@ -372,7 +353,7 @@ XEEMITTER(mulli, 0x1C000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mullwx, 0x7C0001D6, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mullwx, 0x7C0001D6, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- (RA)[32:63] × (RB)[32:63] if (i.XO.OE) { // With XER update. @@ -389,7 +370,7 @@ XEEMITTER(mullwx, 0x7C0001D6, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(negx, 0x7C0000D0, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(negx, 0x7C0000D0, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + 1 if (i.XO.OE) { // With XER update. @@ -399,15 +380,15 @@ XEEMITTER(negx, 0x7C0000D0, XO )(PPCHIRBuilder& f, InstrData& i) { // This may just magically do that... XEASSERTALWAYS(); - //Function* ssub_with_overflow = Intrinsic::getDeclaration( + // Function* ssub_with_overflow = Intrinsic::getDeclaration( // e.gen_module(), Intrinsic::ssub_with_overflow, jit_type_nint); - //jit_value_t v = b.CreateCall2(ssub_with_overflow, + // jit_value_t v = b.CreateCall2(ssub_with_overflow, // e.get_int64(0), f.LoadGPR(i.XO.RA)); - //jit_value_t v0 = b.CreateExtractValue(v, 0); - //f.StoreGPR(i.XO.RT, v0); - //e.update_xer_with_overflow(b.CreateExtractValue(v, 1)); + // jit_value_t v0 = b.CreateExtractValue(v, 0); + // f.StoreGPR(i.XO.RT, v0); + // e.update_xer_with_overflow(b.CreateExtractValue(v, 1)); - //if (i.XO.Rc) { + // if (i.XO.Rc) { // // With cr0 update. // f.UpdateCR(0, v0, e.get_int64(0), true); //} @@ -422,13 +403,13 @@ XEEMITTER(negx, 0x7C0000D0, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(subfx, 0x7C000050, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subfx, 0x7C000050, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + (RB) + 1 Value* v = f.Sub(f.LoadGPR(i.XO.RB), f.LoadGPR(i.XO.RA)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow(EFLAGS??); + // e.update_xer_with_overflow(EFLAGS??); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -436,17 +417,15 @@ XEEMITTER(subfx, 0x7C000050, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(subfcx, 0x7C000010, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subfcx, 0x7C000010, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + (RB) + 1 - Value* v = f.Sub( - f.LoadGPR(i.XO.RB), - f.LoadGPR(i.XO.RA), - ARITHMETIC_SET_CARRY); + Value* v = + f.Sub(f.LoadGPR(i.XO.RB), f.LoadGPR(i.XO.RA), ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow(EFLAGS??); + // e.update_xer_with_overflow(EFLAGS??); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -454,29 +433,24 @@ XEEMITTER(subfcx, 0x7C000010, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(subficx, 0x20000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subficx, 0x20000000, D)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + EXTS(SI) + 1 - Value* v = f.Sub( - f.LoadConstant(XEEXTS16(i.D.DS)), - f.LoadGPR(i.D.RA), - ARITHMETIC_SET_CARRY); + Value* v = f.Sub(f.LoadConstant(XEEXTS16(i.D.DS)), f.LoadGPR(i.D.RA), + ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.D.RT, v); return 0; } -XEEMITTER(subfex, 0x7C000110, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subfex, 0x7C000110, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + (RB) + CA - Value* v = f.AddWithCarry( - f.Not(f.LoadGPR(i.XO.RA)), - f.LoadGPR(i.XO.RB), - f.LoadCA(), - ARITHMETIC_SET_CARRY); + Value* v = f.AddWithCarry(f.Not(f.LoadGPR(i.XO.RA)), f.LoadGPR(i.XO.RB), + f.LoadCA(), ARITHMETIC_SET_CARRY); f.StoreCA(f.DidCarry(v)); f.StoreGPR(i.XO.RT, v); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); + // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); } if (i.XO.Rc) { f.UpdateCR(0, v); @@ -484,15 +458,13 @@ XEEMITTER(subfex, 0x7C000110, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(subfmex, 0x7C0001D0, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subfmex, 0x7C0001D0, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + CA - 1 - Value* v = f.AddWithCarry( - f.Not(f.LoadGPR(i.XO.RA)), - f.LoadConstant((int64_t)-1), - f.LoadCA()); + Value* v = f.AddWithCarry(f.Not(f.LoadGPR(i.XO.RA)), + f.LoadConstant((int64_t)-1), f.LoadCA()); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); + // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); } else { f.StoreCA(f.DidCarry(v)); } @@ -503,15 +475,13 @@ XEEMITTER(subfmex, 0x7C0001D0, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(subfzex, 0x7C000190, XO )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(subfzex, 0x7C000190, XO)(PPCHIRBuilder& f, InstrData& i) { // RT <- ¬(RA) + CA - Value* v = f.AddWithCarry( - f.Not(f.LoadGPR(i.XO.RA)), - f.LoadZero(INT64_TYPE), - f.LoadCA()); + Value* v = f.AddWithCarry(f.Not(f.LoadGPR(i.XO.RA)), f.LoadZero(INT64_TYPE), + f.LoadCA()); if (i.XO.OE) { XEASSERTALWAYS(); - //e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); + // e.update_xer_with_overflow_and_carry(b.CreateExtractValue(v, 1)); } else { f.StoreCA(f.DidCarry(v)); } @@ -522,10 +492,9 @@ XEEMITTER(subfzex, 0x7C000190, XO )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer compare (A-4) -XEEMITTER(cmp, 0x7C000000, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cmp, 0x7C000000, X)(PPCHIRBuilder& f, InstrData& i) { // if L = 0 then // a <- EXTS((RA)[32:63]) // b <- EXTS((RB)[32:63]) @@ -554,7 +523,7 @@ XEEMITTER(cmp, 0x7C000000, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(cmpi, 0x2C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cmpi, 0x2C000000, D)(PPCHIRBuilder& f, InstrData& i) { // if L = 0 then // a <- EXTS((RA)[32:63]) // else @@ -581,7 +550,7 @@ XEEMITTER(cmpi, 0x2C000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(cmpl, 0x7C000040, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cmpl, 0x7C000040, X)(PPCHIRBuilder& f, InstrData& i) { // if L = 0 then // a <- i32.0 || (RA)[32:63] // b <- i32.0 || (RB)[32:63] @@ -610,7 +579,7 @@ XEEMITTER(cmpl, 0x7C000040, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(cmpli, 0x28000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cmpli, 0x28000000, D)(PPCHIRBuilder& f, InstrData& i) { // if L = 0 then // a <- i32.0 || (RA)[32:63] // else @@ -637,10 +606,9 @@ XEEMITTER(cmpli, 0x28000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer logical (A-5) -XEEMITTER(andx, 0x7C000038, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(andx, 0x7C000038, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) & (RB) Value* ra = f.And(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); f.StoreGPR(i.X.RA, ra); @@ -650,7 +618,7 @@ XEEMITTER(andx, 0x7C000038, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(andcx, 0x7C000078, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(andcx, 0x7C000078, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) & ¬(RB) Value* ra = f.And(f.LoadGPR(i.X.RT), f.Not(f.LoadGPR(i.X.RB))); f.StoreGPR(i.X.RA, ra); @@ -660,27 +628,24 @@ XEEMITTER(andcx, 0x7C000078, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(andix, 0x70000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(andix, 0x70000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) & (i48.0 || UI) - Value* ra = f.And( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t)i.D.DS)); + Value* ra = f.And(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t)i.D.DS)); f.StoreGPR(i.D.RA, ra); f.UpdateCR(0, ra); return 0; } -XEEMITTER(andisx, 0x74000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(andisx, 0x74000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) & (i32.0 || UI || i16.0) - Value* ra = f.And( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t(i.D.DS) << 16))); + Value* ra = + f.And(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t(i.D.DS) << 16))); f.StoreGPR(i.D.RA, ra); f.UpdateCR(0, ra); return 0; } -XEEMITTER(cntlzdx, 0x7C000074, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cntlzdx, 0x7C000074, X)(PPCHIRBuilder& f, InstrData& i) { // n <- 0 // do while n < 64 // if (RS)[n] = 1 then leave n @@ -695,14 +660,13 @@ XEEMITTER(cntlzdx, 0x7C000074, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(cntlzwx, 0x7C000034, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cntlzwx, 0x7C000034, X)(PPCHIRBuilder& f, InstrData& i) { // n <- 32 // do while n < 64 // if (RS)[n] = 1 then leave n // n <- n + 1 // RA <- n - 32 - Value* v = f.CountLeadingZeros( - f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE)); + Value* v = f.CountLeadingZeros(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE)); v = f.ZeroExtend(v, INT64_TYPE); f.StoreGPR(i.X.RA, v); if (i.X.Rc) { @@ -711,7 +675,7 @@ XEEMITTER(cntlzwx, 0x7C000034, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(eqvx, 0x7C000238, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(eqvx, 0x7C000238, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) == (RB) Value* ra = f.Xor(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); ra = f.Not(ra); @@ -722,7 +686,7 @@ XEEMITTER(eqvx, 0x7C000238, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(extsbx, 0x7C000774, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(extsbx, 0x7C000774, X)(PPCHIRBuilder& f, InstrData& i) { // s <- (RS)[56] // RA[56:63] <- (RS)[56:63] // RA[0:55] <- i56.s @@ -735,7 +699,7 @@ XEEMITTER(extsbx, 0x7C000774, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(extshx, 0x7C000734, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(extshx, 0x7C000734, X)(PPCHIRBuilder& f, InstrData& i) { // s <- (RS)[48] // RA[48:63] <- (RS)[48:63] // RA[0:47] <- 48.s @@ -748,7 +712,7 @@ XEEMITTER(extshx, 0x7C000734, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(extswx, 0x7C0007B4, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(extswx, 0x7C0007B4, X)(PPCHIRBuilder& f, InstrData& i) { // s <- (RS)[32] // RA[32:63] <- (RS)[32:63] // RA[0:31] <- i32.s @@ -761,11 +725,9 @@ XEEMITTER(extswx, 0x7C0007B4, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(nandx, 0x7C0003B8, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(nandx, 0x7C0003B8, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- ¬((RS) & (RB)) - Value* ra = f.And( - f.LoadGPR(i.X.RT), - f.LoadGPR(i.X.RB)); + Value* ra = f.And(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); ra = f.Not(ra); f.StoreGPR(i.X.RA, ra); if (i.X.Rc) { @@ -774,11 +736,9 @@ XEEMITTER(nandx, 0x7C0003B8, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(norx, 0x7C0000F8, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(norx, 0x7C0000F8, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- ¬((RS) | (RB)) - Value* ra = f.Or( - f.LoadGPR(i.X.RT), - f.LoadGPR(i.X.RB)); + Value* ra = f.Or(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); ra = f.Not(ra); f.StoreGPR(i.X.RA, ra); if (i.X.Rc) { @@ -787,10 +747,9 @@ XEEMITTER(norx, 0x7C0000F8, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(orx, 0x7C000378, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(orx, 0x7C000378, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) | (RB) - if (i.X.RT == i.X.RB && i.X.RT == i.X.RA && - !i.X.Rc) { + if (i.X.RT == i.X.RB && i.X.RT == i.X.RA && !i.X.Rc) { // Sometimes used as no-op. f.Nop(); return 0; @@ -799,9 +758,7 @@ XEEMITTER(orx, 0x7C000378, X )(PPCHIRBuilder& f, InstrData& i) { if (i.X.RT == i.X.RB) { ra = f.LoadGPR(i.X.RT); } else { - ra = f.Or( - f.LoadGPR(i.X.RT), - f.LoadGPR(i.X.RB)); + ra = f.Or(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); } f.StoreGPR(i.X.RA, ra); if (i.X.Rc) { @@ -810,11 +767,9 @@ XEEMITTER(orx, 0x7C000378, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(orcx, 0x7C000338, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(orcx, 0x7C000338, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) | ¬(RB) - Value* ra = f.Or( - f.LoadGPR(i.X.RT), - f.Not(f.LoadGPR(i.X.RB))); + Value* ra = f.Or(f.LoadGPR(i.X.RT), f.Not(f.LoadGPR(i.X.RB))); f.StoreGPR(i.X.RA, ra); if (i.X.Rc) { f.UpdateCR(0, ra); @@ -822,33 +777,27 @@ XEEMITTER(orcx, 0x7C000338, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(ori, 0x60000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ori, 0x60000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) | (i48.0 || UI) if (!i.D.RA && !i.D.RT && !i.D.DS) { f.Nop(); return 0; } - Value* ra = f.Or( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t)i.D.DS)); + Value* ra = f.Or(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t)i.D.DS)); f.StoreGPR(i.D.RA, ra); return 0; } -XEEMITTER(oris, 0x64000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(oris, 0x64000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) | (i32.0 || UI || i16.0) - Value* ra = f.Or( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t(i.D.DS) << 16))); + Value* ra = f.Or(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t(i.D.DS) << 16))); f.StoreGPR(i.D.RA, ra); return 0; } -XEEMITTER(xorx, 0x7C000278, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(xorx, 0x7C000278, X)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) XOR (RB) - Value* ra = f.Xor( - f.LoadGPR(i.X.RT), - f.LoadGPR(i.X.RB)); + Value* ra = f.Xor(f.LoadGPR(i.X.RT), f.LoadGPR(i.X.RB)); f.StoreGPR(i.X.RA, ra); if (i.X.Rc) { f.UpdateCR(0, ra); @@ -856,28 +805,24 @@ XEEMITTER(xorx, 0x7C000278, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(xori, 0x68000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(xori, 0x68000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) XOR (i48.0 || UI) - Value* ra = f.Xor( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t)i.D.DS)); + Value* ra = f.Xor(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t)i.D.DS)); f.StoreGPR(i.D.RA, ra); return 0; } -XEEMITTER(xoris, 0x6C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(xoris, 0x6C000000, D)(PPCHIRBuilder& f, InstrData& i) { // RA <- (RS) XOR (i32.0 || UI || i16.0) - Value* ra = f.Xor( - f.LoadGPR(i.D.RT), - f.LoadConstant((uint64_t(i.D.DS) << 16))); + Value* ra = + f.Xor(f.LoadGPR(i.D.RT), f.LoadConstant((uint64_t(i.D.DS) << 16))); f.StoreGPR(i.D.RA, ra); return 0; } - // Integer rotate (A-6) -XEEMITTER(rld, 0x78000000, MDS)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(rld, 0x78000000, MDS)(PPCHIRBuilder& f, InstrData& i) { if (i.MD.idx == 0) { // XEEMITTER(rldiclx, 0x78000000, MD ) // n <- sh[5] || sh[0:4] @@ -955,9 +900,7 @@ XEEMITTER(rld, 0x78000000, MDS)(PPCHIRBuilder& f, InstrData& i) { } if (m != 0xFFFFFFFFFFFFFFFF) { Value* ra = f.LoadGPR(i.MD.RA); - v = f.Or( - f.And(v, f.LoadConstant(m)), - f.And(ra, f.LoadConstant(~m))); + v = f.Or(f.And(v, f.LoadConstant(m)), f.And(ra, f.LoadConstant(~m))); } f.StoreGPR(i.MD.RA, v); if (i.MD.Rc) { @@ -970,7 +913,7 @@ XEEMITTER(rld, 0x78000000, MDS)(PPCHIRBuilder& f, InstrData& i) { } } -XEEMITTER(rlwimix, 0x50000000, M )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(rlwimix, 0x50000000, M)(PPCHIRBuilder& f, InstrData& i) { // n <- SH // r <- ROTL32((RS)[32:63], n) // m <- MASK(MB+32, ME+32) @@ -994,7 +937,7 @@ XEEMITTER(rlwimix, 0x50000000, M )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(rlwinmx, 0x54000000, M )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(rlwinmx, 0x54000000, M)(PPCHIRBuilder& f, InstrData& i) { // n <- SH // r <- ROTL32((RS)[32:63], n) // m <- MASK(MB+32, ME+32) @@ -1021,14 +964,14 @@ XEEMITTER(rlwinmx, 0x54000000, M )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(rlwnmx, 0x5C000000, M )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(rlwnmx, 0x5C000000, M)(PPCHIRBuilder& f, InstrData& i) { // n <- (RB)[59:63] // r <- ROTL32((RS)[32:63], n) // m <- MASK(MB+32, ME+32) // RA <- r & m Value* v = f.Truncate(f.LoadGPR(i.M.RT), INT32_TYPE); - Value* sh = f.And(f.Truncate(f.LoadGPR(i.M.SH), INT32_TYPE), - f.LoadConstant(0x1F)); + Value* sh = + f.And(f.Truncate(f.LoadGPR(i.M.SH), INT32_TYPE), f.LoadConstant(0x1F)); v = f.RotateLeft(v, sh); // Compiler sometimes masks with 0xFFFFFFFF (identity) - avoid the work here // as our truncation/zero-extend does it for us. @@ -1043,10 +986,9 @@ XEEMITTER(rlwnmx, 0x5C000000, M )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer shift (A-7) -XEEMITTER(sldx, 0x7C000036, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sldx, 0x7C000036, X)(PPCHIRBuilder& f, InstrData& i) { // n <- (RB)[59:63] // r <- ROTL64((RS), n) // if (RB)[58] = 0 then @@ -1062,7 +1004,7 @@ XEEMITTER(sldx, 0x7C000036, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(slwx, 0x7C000030, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(slwx, 0x7C000030, X)(PPCHIRBuilder& f, InstrData& i) { // n <- (RB)[59:63] // r <- ROTL32((RS)[32:63], n) // if (RB)[58] = 0 then @@ -1070,8 +1012,8 @@ XEEMITTER(slwx, 0x7C000030, X )(PPCHIRBuilder& f, InstrData& i) { // else // m <- i64.0 // RA <- r & m - Value* v = f.Shl(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE), - f.LoadGPR(i.X.RB)); + Value* v = + f.Shl(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE), f.LoadGPR(i.X.RB)); v = f.ZeroExtend(v, INT64_TYPE); f.StoreGPR(i.X.RA, v); if (i.X.Rc) { @@ -1080,7 +1022,7 @@ XEEMITTER(slwx, 0x7C000030, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(srdx, 0x7C000436, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(srdx, 0x7C000436, X)(PPCHIRBuilder& f, InstrData& i) { // n <- (RB)[58:63] // r <- ROTL64((RS), 64-n) // if (RB)[57] = 0 then @@ -1097,7 +1039,7 @@ XEEMITTER(srdx, 0x7C000436, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(srwx, 0x7C000430, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(srwx, 0x7C000430, X)(PPCHIRBuilder& f, InstrData& i) { // n <- (RB)[59:63] // r <- ROTL32((RS)[32:63], 64-n) // if (RB)[58] = 0 then @@ -1106,8 +1048,8 @@ XEEMITTER(srwx, 0x7C000430, X )(PPCHIRBuilder& f, InstrData& i) { // m <- i64.0 // RA <- r & m // TODO(benvanik): if >1F, zero out the result. - Value* v = f.Shr(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE), - f.LoadGPR(i.X.RB)); + Value* v = + f.Shr(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE), f.LoadGPR(i.X.RB)); v = f.ZeroExtend(v, INT64_TYPE); f.StoreGPR(i.X.RA, v); if (i.X.Rc) { @@ -1116,7 +1058,7 @@ XEEMITTER(srwx, 0x7C000430, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sradx, 0x7C000634, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sradx, 0x7C000634, X)(PPCHIRBuilder& f, InstrData& i) { // n <- rB[58-63] // r <- ROTL[64](rS, 64 - n) // if rB[57] = 0 then m ← MASK(n, 63) @@ -1136,8 +1078,7 @@ XEEMITTER(sradx, 0x7C000634, X )(PPCHIRBuilder& f, InstrData& i) { // is negative. Start tracking that here. // TODO(benvanik): dynamically generate mask better than this. Value* ca_sh = f.Sub(f.LoadConstant((int8_t)63), sh); - Value* ca = - f.Shr(f.Shl(f.LoadConstant(0xFFFFFFFFFFFFFFFFull), ca_sh), ca_sh); + Value* ca = f.Shr(f.Shl(f.LoadConstant(0xFFFFFFFFFFFFFFFFull), ca_sh), ca_sh); ca = f.CompareNE(f.And(ca, v), f.LoadZero(INT64_TYPE)); // Shift right. @@ -1157,7 +1098,7 @@ XEEMITTER(sradx, 0x7C000634, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sradix, 0x7C000674, XS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sradix, 0x7C000674, XS)(PPCHIRBuilder& f, InstrData& i) { // n <- sh[5] || sh[0-4] // r <- ROTL[64](rS, 64 - n) // m ← MASK(n, 63) @@ -1173,9 +1114,8 @@ XEEMITTER(sradix, 0x7C000674, XS )(PPCHIRBuilder& f, InstrData& i) { // is negative. XEASSERT(sh); uint64_t mask = XEMASK(64 - sh, 63); - Value* ca = f.And( - f.Truncate(f.Shr(v, 63), INT8_TYPE), - f.IsTrue(f.And(v, f.LoadConstant(mask)))); + Value* ca = f.And(f.Truncate(f.Shr(v, 63), INT8_TYPE), + f.IsTrue(f.And(v, f.LoadConstant(mask)))); f.StoreCA(ca); v = f.Sha(v, sh); @@ -1186,7 +1126,7 @@ XEEMITTER(sradix, 0x7C000674, XS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(srawx, 0x7C000630, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(srawx, 0x7C000630, X)(PPCHIRBuilder& f, InstrData& i) { // n <- rB[59-63] // r <- ROTL32((RS)[32:63], 64-n) // m <- MASK(n+32, 63) @@ -1196,18 +1136,15 @@ XEEMITTER(srawx, 0x7C000630, X )(PPCHIRBuilder& f, InstrData& i) { // if n == 0: rA <- sign_extend(rS), XER[CA] = 0 // if n >= 32: rA <- 64 sign bits of rS, XER[CA] = sign bit of lo_32(rS) Value* v = f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE); - Value* sh = f.And( - f.Truncate(f.LoadGPR(i.X.RB), INT32_TYPE), - f.LoadConstant(0x7F)); + Value* sh = + f.And(f.Truncate(f.LoadGPR(i.X.RB), INT32_TYPE), f.LoadConstant(0x7F)); // CA is set if any bits are shifted out of the right and if the result // is negative. Value* mask = f.Not(f.Shl(f.LoadConstant(-1), sh)); - Value* ca = f.And( - f.Truncate(f.Shr(v, 31), INT8_TYPE), - f.IsTrue(f.And(v, mask))); + Value* ca = + f.And(f.Truncate(f.Shr(v, 31), INT8_TYPE), f.IsTrue(f.And(v, mask))); f.StoreCA(ca); - v = f.Sha(v, sh), - v = f.SignExtend(v, INT64_TYPE); + v = f.Sha(v, sh), v = f.SignExtend(v, INT64_TYPE); f.StoreGPR(i.X.RA, v); if (i.X.Rc) { f.UpdateCR(0, v); @@ -1215,7 +1152,7 @@ XEEMITTER(srawx, 0x7C000630, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(srawix, 0x7C000670, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(srawix, 0x7C000670, X)(PPCHIRBuilder& f, InstrData& i) { // n <- SH // r <- ROTL32((RS)[32:63], 64-n) // m <- MASK(n+32, 63) @@ -1234,12 +1171,10 @@ XEEMITTER(srawix, 0x7C000670, X )(PPCHIRBuilder& f, InstrData& i) { // CA is set if any bits are shifted out of the right and if the result // is negative. uint32_t mask = (uint32_t)XEMASK(64 - i.X.RB, 63); - ca = f.And( - f.Truncate(f.Shr(v, 31), INT8_TYPE), - f.IsTrue(f.And(v, f.LoadConstant(mask)))); + ca = f.And(f.Truncate(f.Shr(v, 31), INT8_TYPE), + f.IsTrue(f.And(v, f.LoadConstant(mask)))); - v = f.Sha(v, (int8_t)i.X.RB), - v = f.SignExtend(v, INT64_TYPE); + v = f.Sha(v, (int8_t)i.X.RB), v = f.SignExtend(v, INT64_TYPE); } f.StoreCA(ca); f.StoreGPR(i.X.RA, v); @@ -1249,79 +1184,77 @@ XEEMITTER(srawix, 0x7C000670, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } - void RegisterEmitCategoryALU() { - XEREGISTERINSTR(addx, 0x7C000214); - XEREGISTERINSTR(addcx, 0X7C000014); - XEREGISTERINSTR(addex, 0x7C000114); - XEREGISTERINSTR(addi, 0x38000000); - XEREGISTERINSTR(addic, 0x30000000); - XEREGISTERINSTR(addicx, 0x34000000); - XEREGISTERINSTR(addis, 0x3C000000); - XEREGISTERINSTR(addmex, 0x7C0001D4); - XEREGISTERINSTR(addzex, 0x7C000194); - XEREGISTERINSTR(divdx, 0x7C0003D2); - XEREGISTERINSTR(divdux, 0x7C000392); - XEREGISTERINSTR(divwx, 0x7C0003D6); - XEREGISTERINSTR(divwux, 0x7C000396); - XEREGISTERINSTR(mulhdx, 0x7C000092); - XEREGISTERINSTR(mulhdux, 0x7C000012); - XEREGISTERINSTR(mulhwx, 0x7C000096); - XEREGISTERINSTR(mulhwux, 0x7C000016); - XEREGISTERINSTR(mulldx, 0x7C0001D2); - XEREGISTERINSTR(mulli, 0x1C000000); - XEREGISTERINSTR(mullwx, 0x7C0001D6); - XEREGISTERINSTR(negx, 0x7C0000D0); - XEREGISTERINSTR(subfx, 0x7C000050); - XEREGISTERINSTR(subfcx, 0x7C000010); - XEREGISTERINSTR(subficx, 0x20000000); - XEREGISTERINSTR(subfex, 0x7C000110); - XEREGISTERINSTR(subfmex, 0x7C0001D0); - XEREGISTERINSTR(subfzex, 0x7C000190); - XEREGISTERINSTR(cmp, 0x7C000000); - XEREGISTERINSTR(cmpi, 0x2C000000); - XEREGISTERINSTR(cmpl, 0x7C000040); - XEREGISTERINSTR(cmpli, 0x28000000); - XEREGISTERINSTR(andx, 0x7C000038); - XEREGISTERINSTR(andcx, 0x7C000078); - XEREGISTERINSTR(andix, 0x70000000); - XEREGISTERINSTR(andisx, 0x74000000); - XEREGISTERINSTR(cntlzdx, 0x7C000074); - XEREGISTERINSTR(cntlzwx, 0x7C000034); - XEREGISTERINSTR(eqvx, 0x7C000238); - XEREGISTERINSTR(extsbx, 0x7C000774); - XEREGISTERINSTR(extshx, 0x7C000734); - XEREGISTERINSTR(extswx, 0x7C0007B4); - XEREGISTERINSTR(nandx, 0x7C0003B8); - XEREGISTERINSTR(norx, 0x7C0000F8); - XEREGISTERINSTR(orx, 0x7C000378); - XEREGISTERINSTR(orcx, 0x7C000338); - XEREGISTERINSTR(ori, 0x60000000); - XEREGISTERINSTR(oris, 0x64000000); - XEREGISTERINSTR(xorx, 0x7C000278); - XEREGISTERINSTR(xori, 0x68000000); - XEREGISTERINSTR(xoris, 0x6C000000); - XEREGISTERINSTR(rld, 0x78000000); + XEREGISTERINSTR(addx, 0x7C000214); + XEREGISTERINSTR(addcx, 0X7C000014); + XEREGISTERINSTR(addex, 0x7C000114); + XEREGISTERINSTR(addi, 0x38000000); + XEREGISTERINSTR(addic, 0x30000000); + XEREGISTERINSTR(addicx, 0x34000000); + XEREGISTERINSTR(addis, 0x3C000000); + XEREGISTERINSTR(addmex, 0x7C0001D4); + XEREGISTERINSTR(addzex, 0x7C000194); + XEREGISTERINSTR(divdx, 0x7C0003D2); + XEREGISTERINSTR(divdux, 0x7C000392); + XEREGISTERINSTR(divwx, 0x7C0003D6); + XEREGISTERINSTR(divwux, 0x7C000396); + XEREGISTERINSTR(mulhdx, 0x7C000092); + XEREGISTERINSTR(mulhdux, 0x7C000012); + XEREGISTERINSTR(mulhwx, 0x7C000096); + XEREGISTERINSTR(mulhwux, 0x7C000016); + XEREGISTERINSTR(mulldx, 0x7C0001D2); + XEREGISTERINSTR(mulli, 0x1C000000); + XEREGISTERINSTR(mullwx, 0x7C0001D6); + XEREGISTERINSTR(negx, 0x7C0000D0); + XEREGISTERINSTR(subfx, 0x7C000050); + XEREGISTERINSTR(subfcx, 0x7C000010); + XEREGISTERINSTR(subficx, 0x20000000); + XEREGISTERINSTR(subfex, 0x7C000110); + XEREGISTERINSTR(subfmex, 0x7C0001D0); + XEREGISTERINSTR(subfzex, 0x7C000190); + XEREGISTERINSTR(cmp, 0x7C000000); + XEREGISTERINSTR(cmpi, 0x2C000000); + XEREGISTERINSTR(cmpl, 0x7C000040); + XEREGISTERINSTR(cmpli, 0x28000000); + XEREGISTERINSTR(andx, 0x7C000038); + XEREGISTERINSTR(andcx, 0x7C000078); + XEREGISTERINSTR(andix, 0x70000000); + XEREGISTERINSTR(andisx, 0x74000000); + XEREGISTERINSTR(cntlzdx, 0x7C000074); + XEREGISTERINSTR(cntlzwx, 0x7C000034); + XEREGISTERINSTR(eqvx, 0x7C000238); + XEREGISTERINSTR(extsbx, 0x7C000774); + XEREGISTERINSTR(extshx, 0x7C000734); + XEREGISTERINSTR(extswx, 0x7C0007B4); + XEREGISTERINSTR(nandx, 0x7C0003B8); + XEREGISTERINSTR(norx, 0x7C0000F8); + XEREGISTERINSTR(orx, 0x7C000378); + XEREGISTERINSTR(orcx, 0x7C000338); + XEREGISTERINSTR(ori, 0x60000000); + XEREGISTERINSTR(oris, 0x64000000); + XEREGISTERINSTR(xorx, 0x7C000278); + XEREGISTERINSTR(xori, 0x68000000); + XEREGISTERINSTR(xoris, 0x6C000000); + XEREGISTERINSTR(rld, 0x78000000); // -- // XEREGISTERINSTR(rldclx, 0x78000010); // -- // XEREGISTERINSTR(rldcrx, 0x78000012); // -- // XEREGISTERINSTR(rldicx, 0x78000008); // -- // XEREGISTERINSTR(rldiclx, 0x78000000); // -- // XEREGISTERINSTR(rldicrx, 0x78000004); // -- // XEREGISTERINSTR(rldimix, 0x7800000C); - XEREGISTERINSTR(rlwimix, 0x50000000); - XEREGISTERINSTR(rlwinmx, 0x54000000); - XEREGISTERINSTR(rlwnmx, 0x5C000000); - XEREGISTERINSTR(sldx, 0x7C000036); - XEREGISTERINSTR(slwx, 0x7C000030); - XEREGISTERINSTR(srdx, 0x7C000436); - XEREGISTERINSTR(srwx, 0x7C000430); - XEREGISTERINSTR(sradx, 0x7C000634); - XEREGISTERINSTR(sradix, 0x7C000674); - XEREGISTERINSTR(srawx, 0x7C000630); - XEREGISTERINSTR(srawix, 0x7C000670); + XEREGISTERINSTR(rlwimix, 0x50000000); + XEREGISTERINSTR(rlwinmx, 0x54000000); + XEREGISTERINSTR(rlwnmx, 0x5C000000); + XEREGISTERINSTR(sldx, 0x7C000036); + XEREGISTERINSTR(slwx, 0x7C000030); + XEREGISTERINSTR(srdx, 0x7C000436); + XEREGISTERINSTR(srwx, 0x7C000430); + XEREGISTERINSTR(sradx, 0x7C000634); + XEREGISTERINSTR(sradix, 0x7C000674); + XEREGISTERINSTR(srawx, 0x7C000630); + XEREGISTERINSTR(srawix, 0x7C000670); } - } // namespace ppc } // namespace frontend } // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_emit_control.cc b/src/alloy/frontend/ppc/ppc_emit_control.cc index 111be91a3..439a1f02d 100644 --- a/src/alloy/frontend/ppc/ppc_emit_control.cc +++ b/src/alloy/frontend/ppc/ppc_emit_control.cc @@ -12,21 +12,19 @@ #include #include - -using namespace alloy::frontend::ppc; -using namespace alloy::hir; -using namespace alloy::runtime; - - namespace alloy { namespace frontend { namespace ppc { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; -int InstrEmit_branch( - PPCHIRBuilder& f, const char* src, uint64_t cia, - Value* nia, bool lk, Value* cond = NULL, bool expect_true = true, - bool nia_is_lr = false) { +using alloy::hir::Label; +using alloy::hir::Value; + +int InstrEmit_branch(PPCHIRBuilder& f, const char* src, uint64_t cia, + Value* nia, bool lk, Value* cond = NULL, + bool expect_true = true, bool nia_is_lr = false) { uint32_t call_flags = 0; // TODO(benvanik): this may be wrong and overwrite LRs when not desired! @@ -54,8 +52,7 @@ int InstrEmit_branch( // recursion. uint64_t nia_value = nia->AsUint64() & 0xFFFFFFFF; bool is_recursion = false; - if (nia_value == f.symbol_info()->address() && - lk) { + if (nia_value == f.symbol_info()->address() && lk) { is_recursion = true; } Label* label = is_recursion ? NULL : f.LookupLabel(nia_value); @@ -73,7 +70,7 @@ int InstrEmit_branch( } } else { // Call function. - FunctionInfo* symbol_info = f.LookupFunction(nia_value); + auto symbol_info = f.LookupFunction(nia_value); if (cond) { if (!expect_true) { cond = f.IsFalse(cond); @@ -84,27 +81,27 @@ int InstrEmit_branch( } } } else { - // Indirect branch to pointer. +// Indirect branch to pointer. - // TODO(benvanik): runtime recursion detection? +// TODO(benvanik): runtime recursion detection? - // TODO(benvanik): run a DFA pass to see if we can detect whether this is - // a normal function return that is pulling the LR from the stack that - // it set in the prolog. If so, we can omit the dynamic check! +// TODO(benvanik): run a DFA pass to see if we can detect whether this is +// a normal function return that is pulling the LR from the stack that +// it set in the prolog. If so, we can omit the dynamic check! - //// Dynamic test when branching to LR, which is usually used for the return. - //// We only do this if LK=0 as returns wouldn't set LR. - //// Ideally it's a return and we can just do a simple ret and be done. - //// If it's not, we fall through to the full indirection logic. - //if (!lk && reg == kXEPPCRegLR) { - // // The return block will spill registers for us. - // // TODO(benvanik): 'lr_mismatch' debug info. - // // Note: we need to test on *only* the 32-bit target, as the target ptr may - // // have garbage in the upper 32 bits. - // c.cmp(target.r32(), c.getGpArg(1).r32()); - // // TODO(benvanik): evaluate hint here. - // c.je(e.GetReturnLabel(), kCondHintLikely); - //} +//// Dynamic test when branching to LR, which is usually used for the return. +//// We only do this if LK=0 as returns wouldn't set LR. +//// Ideally it's a return and we can just do a simple ret and be done. +//// If it's not, we fall through to the full indirection logic. +// if (!lk && reg == kXEPPCRegLR) { +// // The return block will spill registers for us. +// // TODO(benvanik): 'lr_mismatch' debug info. +// // Note: we need to test on *only* the 32-bit target, as the target ptr may +// // have garbage in the upper 32 bits. +// c.cmp(target.r32(), c.getGpArg(1).r32()); +// // TODO(benvanik): evaluate hint here. +// c.je(e.GetReturnLabel(), kCondHintLikely); +//} #if 0 // This breaks longjump, as that uses blr with a non-return lr. // It'd be nice to move SET_RETURN_ADDRESS semantics up into context @@ -124,27 +121,26 @@ int InstrEmit_branch( #else { #endif - // Jump to pointer. - bool likely_return = !lk && nia_is_lr; - if (likely_return) { - call_flags |= CALL_POSSIBLE_RETURN; - } - if (cond) { - if (!expect_true) { - cond = f.IsFalse(cond); - } - f.CallIndirectTrue(cond, nia, call_flags); - } else { - f.CallIndirect(nia, call_flags); + // Jump to pointer. + bool likely_return = !lk && nia_is_lr; + if (likely_return) { + call_flags |= CALL_POSSIBLE_RETURN; + } + if (cond) { + if (!expect_true) { + cond = f.IsFalse(cond); } + f.CallIndirectTrue(cond, nia, call_flags); + } else { + f.CallIndirect(nia, call_flags); } } - - return 0; } +return 0; +} -XEEMITTER(bx, 0x48000000, I )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(bx, 0x48000000, I)(PPCHIRBuilder& f, InstrData& i) { // if AA then // NIA <- EXTS(LI || 0b00) // else @@ -159,11 +155,10 @@ XEEMITTER(bx, 0x48000000, I )(PPCHIRBuilder& f, InstrData& i) { nia = (uint32_t)(i.address + XEEXTS26(i.I.LI << 2)); } - return InstrEmit_branch( - f, "bx", i.address, f.LoadConstant(nia), i.I.LK); + return InstrEmit_branch(f, "bx", i.address, f.LoadConstant(nia), i.I.LK); } -XEEMITTER(bcx, 0x40000000, B )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(bcx, 0x40000000, B)(PPCHIRBuilder& f, InstrData& i) { // if ¬BO[2] then // CTR <- CTR - 1 // ctr_ok <- BO[2] | ((CTR[0:63] != 0) XOR BO[3]) @@ -236,11 +231,11 @@ XEEMITTER(bcx, 0x40000000, B )(PPCHIRBuilder& f, InstrData& i) { } else { nia = (uint32_t)(i.address + XEEXTS16(i.B.BD << 2)); } - return InstrEmit_branch( - f, "bcx", i.address, f.LoadConstant(nia), i.B.LK, ok, expect_true); + return InstrEmit_branch(f, "bcx", i.address, f.LoadConstant(nia), i.B.LK, ok, + expect_true); } -XEEMITTER(bcctrx, 0x4C000420, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(bcctrx, 0x4C000420, XL)(PPCHIRBuilder& f, InstrData& i) { // cond_ok <- BO[0] | (CR[BI+32] ≡ BO[1]) // if cond_ok then // NIA <- CTR[0:61] || 0b00 @@ -268,11 +263,11 @@ XEEMITTER(bcctrx, 0x4C000420, XL )(PPCHIRBuilder& f, InstrData& i) { } bool expect_true = !not_cond_ok; - return InstrEmit_branch( - f, "bcctrx", i.address, f.LoadCTR(), i.XL.LK, cond_ok, expect_true); + return InstrEmit_branch(f, "bcctrx", i.address, f.LoadCTR(), i.XL.LK, cond_ok, + expect_true); } -XEEMITTER(bclrx, 0x4C000020, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(bclrx, 0x4C000020, XL)(PPCHIRBuilder& f, InstrData& i) { // if ¬BO[2] then // CTR <- CTR - 1 // ctr_ok <- BO[2] | ((CTR[0:63] != 0) XOR BO[3] @@ -336,71 +331,68 @@ XEEMITTER(bclrx, 0x4C000020, XL )(PPCHIRBuilder& f, InstrData& i) { expect_true = !not_cond_ok; } - return InstrEmit_branch( - f, "bclrx", i.address, f.LoadLR(), i.XL.LK, ok, expect_true, true); + return InstrEmit_branch(f, "bclrx", i.address, f.LoadLR(), i.XL.LK, ok, + expect_true, true); } - // Condition register logical (A-23) -XEEMITTER(crand, 0x4C000202, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crand, 0x4C000202, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(crandc, 0x4C000102, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crandc, 0x4C000102, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(creqv, 0x4C000242, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(creqv, 0x4C000242, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(crnand, 0x4C0001C2, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crnand, 0x4C0001C2, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(crnor, 0x4C000042, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crnor, 0x4C000042, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(cror, 0x4C000382, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(cror, 0x4C000382, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(crorc, 0x4C000342, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crorc, 0x4C000342, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(crxor, 0x4C000182, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(crxor, 0x4C000182, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mcrf, 0x4C000000, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mcrf, 0x4C000000, XL)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } - // System linkage (A-24) -XEEMITTER(sc, 0x44000002, SC )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sc, 0x44000002, SC)(PPCHIRBuilder& f, InstrData& i) { f.CallExtern(f.symbol_info()); return 0; } - // Trap (A-25) -int InstrEmit_trap(PPCHIRBuilder& f, InstrData& i, - Value* va, Value* vb, uint32_t TO) { +int InstrEmit_trap(PPCHIRBuilder& f, InstrData& i, Value* va, Value* vb, + uint32_t TO) { // if (a < b) & TO[0] then TRAP // if (a > b) & TO[1] then TRAP // if (a = b) & TO[2] then TRAP @@ -435,7 +427,7 @@ int InstrEmit_trap(PPCHIRBuilder& f, InstrData& i, return 0; } -XEEMITTER(td, 0x7C000088, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(td, 0x7C000088, X)(PPCHIRBuilder& f, InstrData& i) { // a <- (RA) // b <- (RB) // if (a < b) & TO[0] then TRAP @@ -448,7 +440,7 @@ XEEMITTER(td, 0x7C000088, X )(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_trap(f, i, ra, rb, i.X.RT); } -XEEMITTER(tdi, 0x08000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(tdi, 0x08000000, D)(PPCHIRBuilder& f, InstrData& i) { // a <- (RA) // if (a < EXTS(SI)) & TO[0] then TRAP // if (a > EXTS(SI)) & TO[1] then TRAP @@ -460,7 +452,7 @@ XEEMITTER(tdi, 0x08000000, D )(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_trap(f, i, ra, rb, i.D.RT); } -XEEMITTER(tw, 0x7C000008, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(tw, 0x7C000008, X)(PPCHIRBuilder& f, InstrData& i) { // a <- EXTS((RA)[32:63]) // b <- EXTS((RB)[32:63]) // if (a < b) & TO[0] then TRAP @@ -468,14 +460,14 @@ XEEMITTER(tw, 0x7C000008, X )(PPCHIRBuilder& f, InstrData& i) { // if (a = b) & TO[2] then TRAP // if (a u b) & TO[4] then TRAP - Value* ra = f.SignExtend(f.Truncate( - f.LoadGPR(i.X.RA), INT32_TYPE), INT64_TYPE); - Value* rb = f.SignExtend(f.Truncate( - f.LoadGPR(i.X.RB), INT32_TYPE), INT64_TYPE); + Value* ra = + f.SignExtend(f.Truncate(f.LoadGPR(i.X.RA), INT32_TYPE), INT64_TYPE); + Value* rb = + f.SignExtend(f.Truncate(f.LoadGPR(i.X.RB), INT32_TYPE), INT64_TYPE); return InstrEmit_trap(f, i, ra, rb, i.X.RT); } -XEEMITTER(twi, 0x0C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(twi, 0x0C000000, D)(PPCHIRBuilder& f, InstrData& i) { // a <- EXTS((RA)[32:63]) // if (a < EXTS(SI)) & TO[0] then TRAP // if (a > EXTS(SI)) & TO[1] then TRAP @@ -488,21 +480,20 @@ XEEMITTER(twi, 0x0C000000, D )(PPCHIRBuilder& f, InstrData& i) { f.Trap(type); return 0; } - Value* ra = f.SignExtend(f.Truncate( - f.LoadGPR(i.D.RA), INT32_TYPE), INT64_TYPE); + Value* ra = + f.SignExtend(f.Truncate(f.LoadGPR(i.D.RA), INT32_TYPE), INT64_TYPE); Value* rb = f.LoadConstant(XEEXTS16(i.D.DS)); return InstrEmit_trap(f, i, ra, rb, i.D.RT); } - // Processor control (A-26) -XEEMITTER(mfcr, 0x7C000026, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mfcr, 0x7C000026, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mfspr, 0x7C0002A6, XFX)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mfspr, 0x7C0002A6, XFX)(PPCHIRBuilder& f, InstrData& i) { // n <- spr[5:9] || spr[0:4] // if length(SPR(n)) = 64 then // RT <- SPR(n) @@ -511,40 +502,40 @@ XEEMITTER(mfspr, 0x7C0002A6, XFX)(PPCHIRBuilder& f, InstrData& i) { Value* v; const uint32_t n = ((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F); switch (n) { - case 1: - // XER - v = f.LoadXER(); - break; - case 8: - // LR - v = f.LoadLR(); - break; - case 9: - // CTR - v = f.LoadCTR(); - break; - // 268 + 269 = TB + TBU - default: - XEINSTRNOTIMPLEMENTED(); - return 1; + case 1: + // XER + v = f.LoadXER(); + break; + case 8: + // LR + v = f.LoadLR(); + break; + case 9: + // CTR + v = f.LoadCTR(); + break; + // 268 + 269 = TB + TBU + default: + XEINSTRNOTIMPLEMENTED(); + return 1; } f.StoreGPR(i.XFX.RT, v); return 0; } -XEEMITTER(mftb, 0x7C0002E6, XFX)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mftb, 0x7C0002E6, XFX)(PPCHIRBuilder& f, InstrData& i) { Value* time = f.LoadClock(); f.StoreGPR(i.XFX.RT, time); return 0; } -XEEMITTER(mtcrf, 0x7C000120, XFX)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtcrf, 0x7C000120, XFX)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mtspr, 0x7C0003A6, XFX)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtspr, 0x7C0003A6, XFX)(PPCHIRBuilder& f, InstrData& i) { // n <- spr[5:9] || spr[0:4] // if length(SPR(n)) = 64 then // SPR(n) <- (RS) @@ -555,21 +546,21 @@ XEEMITTER(mtspr, 0x7C0003A6, XFX)(PPCHIRBuilder& f, InstrData& i) { const uint32_t n = ((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F); switch (n) { - case 1: - // XER - f.StoreXER(rt); - break; - case 8: - // LR - f.StoreLR(rt); - break; - case 9: - // CTR - f.StoreCTR(rt); - break; - default: - XEINSTRNOTIMPLEMENTED(); - return 1; + case 1: + // XER + f.StoreXER(rt); + break; + case 8: + // LR + f.StoreLR(rt); + break; + case 9: + // CTR + f.StoreCTR(rt); + break; + default: + XEINSTRNOTIMPLEMENTED(); + return 1; } return 0; @@ -578,52 +569,50 @@ XEEMITTER(mtspr, 0x7C0003A6, XFX)(PPCHIRBuilder& f, InstrData& i) { // TODO(benvanik): MSR is used for toggling interrupts, and it'd be nice to // obey that setting. It's usually guarding atomic stores. -XEEMITTER(mfmsr, 0x7C0000A6, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mfmsr, 0x7C0000A6, X)(PPCHIRBuilder& f, InstrData& i) { f.Nop(); return 0; } -XEEMITTER(mtmsr, 0x7C000124, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtmsr, 0x7C000124, X)(PPCHIRBuilder& f, InstrData& i) { f.Nop(); return 0; } -XEEMITTER(mtmsrd, 0x7C000164, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtmsrd, 0x7C000164, X)(PPCHIRBuilder& f, InstrData& i) { f.Nop(); return 0; } - void RegisterEmitCategoryControl() { - XEREGISTERINSTR(bx, 0x48000000); - XEREGISTERINSTR(bcx, 0x40000000); - XEREGISTERINSTR(bcctrx, 0x4C000420); - XEREGISTERINSTR(bclrx, 0x4C000020); - XEREGISTERINSTR(crand, 0x4C000202); - XEREGISTERINSTR(crandc, 0x4C000102); - XEREGISTERINSTR(creqv, 0x4C000242); - XEREGISTERINSTR(crnand, 0x4C0001C2); - XEREGISTERINSTR(crnor, 0x4C000042); - XEREGISTERINSTR(cror, 0x4C000382); - XEREGISTERINSTR(crorc, 0x4C000342); - XEREGISTERINSTR(crxor, 0x4C000182); - XEREGISTERINSTR(mcrf, 0x4C000000); - XEREGISTERINSTR(sc, 0x44000002); - XEREGISTERINSTR(td, 0x7C000088); - XEREGISTERINSTR(tdi, 0x08000000); - XEREGISTERINSTR(tw, 0x7C000008); - XEREGISTERINSTR(twi, 0x0C000000); - XEREGISTERINSTR(mfcr, 0x7C000026); - XEREGISTERINSTR(mfspr, 0x7C0002A6); - XEREGISTERINSTR(mftb, 0x7C0002E6); - XEREGISTERINSTR(mtcrf, 0x7C000120); - XEREGISTERINSTR(mtspr, 0x7C0003A6); - XEREGISTERINSTR(mfmsr, 0x7C0000A6); - XEREGISTERINSTR(mtmsr, 0x7C000124); - XEREGISTERINSTR(mtmsrd, 0x7C000164); + XEREGISTERINSTR(bx, 0x48000000); + XEREGISTERINSTR(bcx, 0x40000000); + XEREGISTERINSTR(bcctrx, 0x4C000420); + XEREGISTERINSTR(bclrx, 0x4C000020); + XEREGISTERINSTR(crand, 0x4C000202); + XEREGISTERINSTR(crandc, 0x4C000102); + XEREGISTERINSTR(creqv, 0x4C000242); + XEREGISTERINSTR(crnand, 0x4C0001C2); + XEREGISTERINSTR(crnor, 0x4C000042); + XEREGISTERINSTR(cror, 0x4C000382); + XEREGISTERINSTR(crorc, 0x4C000342); + XEREGISTERINSTR(crxor, 0x4C000182); + XEREGISTERINSTR(mcrf, 0x4C000000); + XEREGISTERINSTR(sc, 0x44000002); + XEREGISTERINSTR(td, 0x7C000088); + XEREGISTERINSTR(tdi, 0x08000000); + XEREGISTERINSTR(tw, 0x7C000008); + XEREGISTERINSTR(twi, 0x0C000000); + XEREGISTERINSTR(mfcr, 0x7C000026); + XEREGISTERINSTR(mfspr, 0x7C0002A6); + XEREGISTERINSTR(mftb, 0x7C0002E6); + XEREGISTERINSTR(mtcrf, 0x7C000120); + XEREGISTERINSTR(mtspr, 0x7C0003A6); + XEREGISTERINSTR(mfmsr, 0x7C0000A6); + XEREGISTERINSTR(mtmsr, 0x7C000124); + XEREGISTERINSTR(mtmsrd, 0x7C000164); } - } // namespace ppc } // namespace frontend } // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_emit_fpu.cc b/src/alloy/frontend/ppc/ppc_emit_fpu.cc index c09fea20f..c651c6d6e 100644 --- a/src/alloy/frontend/ppc/ppc_emit_fpu.cc +++ b/src/alloy/frontend/ppc/ppc_emit_fpu.cc @@ -12,148 +12,145 @@ #include #include - -using namespace alloy::frontend::ppc; -using namespace alloy::hir; -using namespace alloy::runtime; - - namespace alloy { namespace frontend { namespace ppc { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::hir::RoundMode; +using alloy::hir::Value; // Good source of information: // http://mamedev.org/source/src/emu/cpu/powerpc/ppc_ops.c // The correctness of that code is not reflected here yet -_- - // Enable rounding numbers to single precision as required. // This adds a bunch of work per operation and I'm not sure it's required. #define ROUND_TO_SINGLE - // Floating-point arithmetic (A-8) -XEEMITTER(faddx, 0xFC00002A, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(faddx, 0xFC00002A, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) + (frB) Value* v = f.Add(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(faddsx, 0xEC00002A, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(faddsx, 0xEC00002A, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) + (frB) Value* v = f.Add(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fdivx, 0xFC000024, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fdivx, 0xFC000024, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- frA / frB Value* v = f.Div(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fdivsx, 0xEC000024, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fdivsx, 0xEC000024, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- frA / frB Value* v = f.Div(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmulx, 0xFC000032, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmulx, 0xFC000032, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) x (frC) Value* v = f.Mul(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmulsx, 0xEC000032, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmulsx, 0xEC000032, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) x (frC) Value* v = f.Mul(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fresx, 0xEC000030, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fresx, 0xEC000030, A)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(frsqrtex, 0xFC000034, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(frsqrtex, 0xFC000034, A)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(fsubx, 0xFC000028, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fsubx, 0xFC000028, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) - (frB) Value* v = f.Sub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fsubsx, 0xEC000028, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fsubsx, 0xEC000028, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA) - (frB) Value* v = f.Sub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fselx, 0xFC00002E, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fselx, 0xFC00002E, A)(PPCHIRBuilder& f, InstrData& i) { // if (frA) >= 0.0 // then frD <- (frC) // else frD <- (frB) @@ -161,28 +158,28 @@ XEEMITTER(fselx, 0xFC00002E, A )(PPCHIRBuilder& f, InstrData& i) { Value* v = f.Select(ge, f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fsqrtx, 0xFC00002C, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fsqrtx, 0xFC00002C, A)(PPCHIRBuilder& f, InstrData& i) { // Double precision: // frD <- sqrt(frB) Value* v = f.Sqrt(f.LoadFPR(i.A.FRA)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fsqrtsx, 0xEC00002C, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fsqrtsx, 0xEC00002C, A)(PPCHIRBuilder& f, InstrData& i) { // Single precision: // frD <- sqrt(frB) Value* v = f.Sqrt(f.LoadFPR(i.A.FRA)); @@ -190,144 +187,128 @@ XEEMITTER(fsqrtsx, 0xEC00002C, A )(PPCHIRBuilder& f, InstrData& i) { f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } - // Floating-point multiply-add (A-9) -XEEMITTER(fmaddx, 0xFC00003A, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmaddx, 0xFC00003A, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA x frC) + frB - Value* v = f.MulAdd( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB)); + Value* v = + f.MulAdd(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmaddsx, 0xEC00003A, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmaddsx, 0xEC00003A, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA x frC) + frB - Value* v = f.MulAdd( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB)); + Value* v = + f.MulAdd(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmsubx, 0xFC000038, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmsubx, 0xFC000038, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA x frC) - frB - Value* v = f.MulSub( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB)); + Value* v = + f.MulSub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB)); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmsubsx, 0xEC000038, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmsubsx, 0xEC000038, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frA x frC) - frB - Value* v = f.MulSub( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB)); + Value* v = + f.MulSub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB)); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fnmaddx, 0xFC00003E, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnmaddx, 0xFC00003E, A)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(fnmaddsx, 0xEC00003E, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnmaddsx, 0xEC00003E, A)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(fnmsubx, 0xFC00003C, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnmsubx, 0xFC00003C, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- -([frA x frC] - frB) - Value* v = f.Neg(f.MulSub( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB))); + Value* v = f.Neg( + f.MulSub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB))); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fnmsubsx, 0xEC00003C, A )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnmsubsx, 0xEC00003C, A)(PPCHIRBuilder& f, InstrData& i) { // frD <- -([frA x frC] - frB) - Value* v = f.Neg(f.MulSub( - f.LoadFPR(i.A.FRA), - f.LoadFPR(i.A.FRC), - f.LoadFPR(i.A.FRB))); + Value* v = f.Neg( + f.MulSub(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRC), f.LoadFPR(i.A.FRB))); v = f.Convert(f.Convert(v, FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } - // Floating-point rounding and conversion (A-10) -XEEMITTER(fcfidx, 0xFC00069C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fcfidx, 0xFC00069C, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- signed_int64_to_double( frB ) - Value* v = f.Convert( - f.Cast(f.LoadFPR(i.A.FRB), INT64_TYPE), - FLOAT64_TYPE); + Value* v = f.Convert(f.Cast(f.LoadFPR(i.A.FRB), INT64_TYPE), FLOAT64_TYPE); f.StoreFPR(i.A.FRT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fctidx, 0xFC00065C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fctidx, 0xFC00065C, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- double_to_signed_int64( frB ) // TODO(benvanik): pull from FPSCR[RN] RoundMode round_mode = ROUND_TO_ZERO; @@ -336,19 +317,19 @@ XEEMITTER(fctidx, 0xFC00065C, X )(PPCHIRBuilder& f, InstrData& i) { f.StoreFPR(i.X.RT, v); // f.UpdateFPRF(v); if (i.X.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fctidzx, 0xFC00065E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fctidzx, 0xFC00065E, X)(PPCHIRBuilder& f, InstrData& i) { // TODO(benvanik): assuming round to zero is always set, is that ok? return InstrEmit_fctidx(f, i); } -XEEMITTER(fctiwx, 0xFC00001C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fctiwx, 0xFC00001C, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- double_to_signed_int32( frB ) // TODO(benvanik): pull from FPSCR[RN] RoundMode round_mode = ROUND_TO_ZERO; @@ -357,19 +338,19 @@ XEEMITTER(fctiwx, 0xFC00001C, X )(PPCHIRBuilder& f, InstrData& i) { f.StoreFPR(i.X.RT, v); // f.UpdateFPRF(v); if (i.A.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fctiwzx, 0xFC00001E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fctiwzx, 0xFC00001E, X)(PPCHIRBuilder& f, InstrData& i) { // TODO(benvanik): assuming round to zero is always set, is that ok? return InstrEmit_fctiwx(f, i); } -XEEMITTER(frspx, 0xFC000018, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(frspx, 0xFC000018, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- Round_single(frB) // TODO(benvanik): pull from FPSCR[RN] RoundMode round_mode = ROUND_TO_ZERO; @@ -378,14 +359,13 @@ XEEMITTER(frspx, 0xFC000018, X )(PPCHIRBuilder& f, InstrData& i) { f.StoreFPR(i.X.RT, v); // f.UpdateFPRF(v); if (i.X.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } - // Floating-point compare (A-11) int InstrEmit_fcmpx_(PPCHIRBuilder& f, InstrData& i, bool ordered) { @@ -410,22 +390,21 @@ int InstrEmit_fcmpx_(PPCHIRBuilder& f, InstrData& i, bool ordered) { f.UpdateCR(crf, f.LoadFPR(i.X.RA), f.LoadFPR(i.X.RB), false); return 0; } -XEEMITTER(fcmpo, 0xFC000040, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fcmpo, 0xFC000040, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_fcmpx_(f, i, true); } -XEEMITTER(fcmpu, 0xFC000000, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fcmpu, 0xFC000000, X)(PPCHIRBuilder& f, InstrData& i) { return InstrEmit_fcmpx_(f, i, false); } - // Floating-point status and control register (A -XEEMITTER(mcrfs, 0xFC000080, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mcrfs, 0xFC000080, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mffsx, 0xFC00048E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mffsx, 0xFC00048E, X)(PPCHIRBuilder& f, InstrData& i) { if (i.X.Rc) { XEINSTRNOTIMPLEMENTED(); return 1; @@ -434,17 +413,17 @@ XEEMITTER(mffsx, 0xFC00048E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mtfsb0x, 0xFC00008C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtfsb0x, 0xFC00008C, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mtfsb1x, 0xFC00004C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtfsb1x, 0xFC00004C, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(mtfsfx, 0xFC00058E, XFL)(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtfsfx, 0xFC00058E, XFL)(PPCHIRBuilder& f, InstrData& i) { if (i.XFL.Rc) { XEINSTRNOTIMPLEMENTED(); return 1; @@ -460,99 +439,96 @@ XEEMITTER(mtfsfx, 0xFC00058E, XFL)(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(mtfsfix, 0xFC00010C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(mtfsfix, 0xFC00010C, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } - // Floating-point move (A-21) -XEEMITTER(fabsx, 0xFC000210, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fabsx, 0xFC000210, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- abs(frB) Value* v = f.Abs(f.LoadFPR(i.X.RB)); f.StoreFPR(i.X.RT, v); if (i.X.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fmrx, 0xFC000090, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fmrx, 0xFC000090, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- (frB) Value* v = f.LoadFPR(i.X.RB); f.StoreFPR(i.X.RT, v); if (i.X.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } -XEEMITTER(fnabsx, 0xFC000110, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnabsx, 0xFC000110, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(fnegx, 0xFC000050, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(fnegx, 0xFC000050, X)(PPCHIRBuilder& f, InstrData& i) { // frD <- ¬ frB[0] || frB[1-63] Value* v = f.Neg(f.LoadFPR(i.X.RB)); f.StoreFPR(i.X.RT, v); if (i.X.Rc) { - //e.update_cr_with_cond(1, v); + // e.update_cr_with_cond(1, v); XEINSTRNOTIMPLEMENTED(); return 1; } return 0; } - void RegisterEmitCategoryFPU() { - XEREGISTERINSTR(faddx, 0xFC00002A); - XEREGISTERINSTR(faddsx, 0xEC00002A); - XEREGISTERINSTR(fdivx, 0xFC000024); - XEREGISTERINSTR(fdivsx, 0xEC000024); - XEREGISTERINSTR(fmulx, 0xFC000032); - XEREGISTERINSTR(fmulsx, 0xEC000032); - XEREGISTERINSTR(fresx, 0xEC000030); - XEREGISTERINSTR(frsqrtex, 0xFC000034); - XEREGISTERINSTR(fsubx, 0xFC000028); - XEREGISTERINSTR(fsubsx, 0xEC000028); - XEREGISTERINSTR(fselx, 0xFC00002E); - XEREGISTERINSTR(fsqrtx, 0xFC00002C); - XEREGISTERINSTR(fsqrtsx, 0xEC00002C); - XEREGISTERINSTR(fmaddx, 0xFC00003A); - XEREGISTERINSTR(fmaddsx, 0xEC00003A); - XEREGISTERINSTR(fmsubx, 0xFC000038); - XEREGISTERINSTR(fmsubsx, 0xEC000038); - XEREGISTERINSTR(fnmaddx, 0xFC00003E); - XEREGISTERINSTR(fnmaddsx, 0xEC00003E); - XEREGISTERINSTR(fnmsubx, 0xFC00003C); - XEREGISTERINSTR(fnmsubsx, 0xEC00003C); - XEREGISTERINSTR(fcfidx, 0xFC00069C); - XEREGISTERINSTR(fctidx, 0xFC00065C); - XEREGISTERINSTR(fctidzx, 0xFC00065E); - XEREGISTERINSTR(fctiwx, 0xFC00001C); - XEREGISTERINSTR(fctiwzx, 0xFC00001E); - XEREGISTERINSTR(frspx, 0xFC000018); - XEREGISTERINSTR(fcmpo, 0xFC000040); - XEREGISTERINSTR(fcmpu, 0xFC000000); - XEREGISTERINSTR(mcrfs, 0xFC000080); - XEREGISTERINSTR(mffsx, 0xFC00048E); - XEREGISTERINSTR(mtfsb0x, 0xFC00008C); - XEREGISTERINSTR(mtfsb1x, 0xFC00004C); - XEREGISTERINSTR(mtfsfx, 0xFC00058E); - XEREGISTERINSTR(mtfsfix, 0xFC00010C); - XEREGISTERINSTR(fabsx, 0xFC000210); - XEREGISTERINSTR(fmrx, 0xFC000090); - XEREGISTERINSTR(fnabsx, 0xFC000110); - XEREGISTERINSTR(fnegx, 0xFC000050); + XEREGISTERINSTR(faddx, 0xFC00002A); + XEREGISTERINSTR(faddsx, 0xEC00002A); + XEREGISTERINSTR(fdivx, 0xFC000024); + XEREGISTERINSTR(fdivsx, 0xEC000024); + XEREGISTERINSTR(fmulx, 0xFC000032); + XEREGISTERINSTR(fmulsx, 0xEC000032); + XEREGISTERINSTR(fresx, 0xEC000030); + XEREGISTERINSTR(frsqrtex, 0xFC000034); + XEREGISTERINSTR(fsubx, 0xFC000028); + XEREGISTERINSTR(fsubsx, 0xEC000028); + XEREGISTERINSTR(fselx, 0xFC00002E); + XEREGISTERINSTR(fsqrtx, 0xFC00002C); + XEREGISTERINSTR(fsqrtsx, 0xEC00002C); + XEREGISTERINSTR(fmaddx, 0xFC00003A); + XEREGISTERINSTR(fmaddsx, 0xEC00003A); + XEREGISTERINSTR(fmsubx, 0xFC000038); + XEREGISTERINSTR(fmsubsx, 0xEC000038); + XEREGISTERINSTR(fnmaddx, 0xFC00003E); + XEREGISTERINSTR(fnmaddsx, 0xEC00003E); + XEREGISTERINSTR(fnmsubx, 0xFC00003C); + XEREGISTERINSTR(fnmsubsx, 0xEC00003C); + XEREGISTERINSTR(fcfidx, 0xFC00069C); + XEREGISTERINSTR(fctidx, 0xFC00065C); + XEREGISTERINSTR(fctidzx, 0xFC00065E); + XEREGISTERINSTR(fctiwx, 0xFC00001C); + XEREGISTERINSTR(fctiwzx, 0xFC00001E); + XEREGISTERINSTR(frspx, 0xFC000018); + XEREGISTERINSTR(fcmpo, 0xFC000040); + XEREGISTERINSTR(fcmpu, 0xFC000000); + XEREGISTERINSTR(mcrfs, 0xFC000080); + XEREGISTERINSTR(mffsx, 0xFC00048E); + XEREGISTERINSTR(mtfsb0x, 0xFC00008C); + XEREGISTERINSTR(mtfsb1x, 0xFC00004C); + XEREGISTERINSTR(mtfsfx, 0xFC00058E); + XEREGISTERINSTR(mtfsfix, 0xFC00010C); + XEREGISTERINSTR(fabsx, 0xFC000210); + XEREGISTERINSTR(fmrx, 0xFC000090); + XEREGISTERINSTR(fnabsx, 0xFC000110); + XEREGISTERINSTR(fnegx, 0xFC000050); } - } // namespace ppc } // namespace frontend } // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_emit_memory.cc b/src/alloy/frontend/ppc/ppc_emit_memory.cc index 738090abf..a7264f50c 100644 --- a/src/alloy/frontend/ppc/ppc_emit_memory.cc +++ b/src/alloy/frontend/ppc/ppc_emit_memory.cc @@ -12,23 +12,22 @@ #include #include - -using namespace alloy::frontend::ppc; -using namespace alloy::hir; -using namespace alloy::runtime; - - namespace alloy { namespace frontend { namespace ppc { +// TODO(benvanik): remove when enums redefined. +using namespace alloy::hir; + +using alloy::hir::Value; + #define TRUNCATE_ADDRESSES 0 Value* CalculateEA(PPCHIRBuilder& f, uint32_t ra, uint32_t rb) { #if TRUNCATE_ADDRESSES - return f.ZeroExtend(f.Add( - f.Truncate(f.LoadGPR(ra), INT32_TYPE), - f.Truncate(f.LoadGPR(rb), INT32_TYPE)), INT64_TYPE); + return f.ZeroExtend(f.Add(f.Truncate(f.LoadGPR(ra), INT32_TYPE), + f.Truncate(f.LoadGPR(rb), INT32_TYPE)), + INT64_TYPE); #else return f.Add(f.LoadGPR(ra), f.LoadGPR(rb)); #endif // TRUNCATE_ADDRESSES @@ -37,9 +36,9 @@ Value* CalculateEA(PPCHIRBuilder& f, uint32_t ra, uint32_t rb) { Value* CalculateEA_0(PPCHIRBuilder& f, uint32_t ra, uint32_t rb) { #if TRUNCATE_ADDRESSES if (ra) { - return f.ZeroExtend(f.Add( - f.Truncate(f.LoadGPR(ra), INT32_TYPE), - f.Truncate(f.LoadGPR(rb), INT32_TYPE)), INT64_TYPE); + return f.ZeroExtend(f.Add(f.Truncate(f.LoadGPR(ra), INT32_TYPE), + f.Truncate(f.LoadGPR(rb), INT32_TYPE)), + INT64_TYPE); } else { return f.ZeroExtend(f.Truncate(f.LoadGPR(rb), INT32_TYPE), INT64_TYPE); } @@ -54,9 +53,9 @@ Value* CalculateEA_0(PPCHIRBuilder& f, uint32_t ra, uint32_t rb) { Value* CalculateEA_i(PPCHIRBuilder& f, uint32_t ra, uint64_t imm) { #if TRUNCATE_ADDRESSES - return f.ZeroExtend(f.Add( - f.Truncate(f.LoadGPR(ra), INT32_TYPE), - f.LoadConstant((int32_t)imm)), INT64_TYPE); + return f.ZeroExtend(f.Add(f.Truncate(f.LoadGPR(ra), INT32_TYPE), + f.LoadConstant((int32_t)imm)), + INT64_TYPE); #else return f.Add(f.LoadGPR(ra), f.LoadConstant(imm)); #endif // TRUNCATE_ADDRESSES @@ -65,9 +64,9 @@ Value* CalculateEA_i(PPCHIRBuilder& f, uint32_t ra, uint64_t imm) { Value* CalculateEA_0_i(PPCHIRBuilder& f, uint32_t ra, uint64_t imm) { #if TRUNCATE_ADDRESSES if (ra) { - return f.ZeroExtend(f.Add( - f.Truncate(f.LoadGPR(ra), INT32_TYPE), - f.LoadConstant((int32_t)imm)), INT64_TYPE); + return f.ZeroExtend(f.Add(f.Truncate(f.LoadGPR(ra), INT32_TYPE), + f.LoadConstant((int32_t)imm)), + INT64_TYPE); } else { return f.ZeroExtend(f.LoadConstant((int32_t)imm), INT64_TYPE); } @@ -80,10 +79,9 @@ Value* CalculateEA_0_i(PPCHIRBuilder& f, uint32_t ra, uint64_t imm) { #endif // TRUNCATE_ADDRESSES } - // Integer load (A-13) -XEEMITTER(lbz, 0x88000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lbz, 0x88000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -96,7 +94,7 @@ XEEMITTER(lbz, 0x88000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lbzu, 0x8C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lbzu, 0x8C000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // RT <- i56.0 || MEM(EA, 1) // RA <- EA @@ -107,7 +105,7 @@ XEEMITTER(lbzu, 0x8C000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lbzux, 0x7C0000EE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lbzux, 0x7C0000EE, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // RT <- i56.0 || MEM(EA, 1) // RA <- EA @@ -118,7 +116,7 @@ XEEMITTER(lbzux, 0x7C0000EE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lbzx, 0x7C0000AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lbzx, 0x7C0000AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -131,7 +129,7 @@ XEEMITTER(lbzx, 0x7C0000AE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lha, 0xA8000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lha, 0xA8000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -144,17 +142,17 @@ XEEMITTER(lha, 0xA8000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lhau, 0xAC000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhau, 0xAC000000, D)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lhaux, 0x7C0002EE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhaux, 0x7C0002EE, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lhax, 0x7C0002AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhax, 0x7C0002AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -167,7 +165,7 @@ XEEMITTER(lhax, 0x7C0002AE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lhz, 0xA0000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhz, 0xA0000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -180,7 +178,7 @@ XEEMITTER(lhz, 0xA0000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lhzu, 0xA4000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhzu, 0xA4000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // RT <- i48.0 || MEM(EA, 2) // RA <- EA @@ -191,7 +189,7 @@ XEEMITTER(lhzu, 0xA4000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lhzux, 0x7C00026E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhzux, 0x7C00026E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // RT <- i48.0 || MEM(EA, 2) // RA <- EA @@ -202,7 +200,7 @@ XEEMITTER(lhzux, 0x7C00026E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lhzx, 0x7C00022E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhzx, 0x7C00022E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -215,7 +213,7 @@ XEEMITTER(lhzx, 0x7C00022E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwa, 0xE8000002, DS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwa, 0xE8000002, DS)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -228,7 +226,7 @@ XEEMITTER(lwa, 0xE8000002, DS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwaux, 0x7C0002EA, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwaux, 0x7C0002EA, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // RT <- EXTS(MEM(EA, 4)) // RA <- EA @@ -239,7 +237,7 @@ XEEMITTER(lwaux, 0x7C0002EA, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwax, 0x7C0002AA, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwax, 0x7C0002AA, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -252,7 +250,7 @@ XEEMITTER(lwax, 0x7C0002AA, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwz, 0x80000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwz, 0x80000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -265,7 +263,7 @@ XEEMITTER(lwz, 0x80000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwzu, 0x84000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwzu, 0x84000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // RT <- i32.0 || MEM(EA, 4) // RA <- EA @@ -276,7 +274,7 @@ XEEMITTER(lwzu, 0x84000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwzux, 0x7C00006E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwzux, 0x7C00006E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // RT <- i32.0 || MEM(EA, 4) // RA <- EA @@ -287,7 +285,7 @@ XEEMITTER(lwzux, 0x7C00006E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwzx, 0x7C00002E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwzx, 0x7C00002E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -300,8 +298,7 @@ XEEMITTER(lwzx, 0x7C00002E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } - -XEEMITTER(ld, 0xE8000000, DS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ld, 0xE8000000, DS)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -314,7 +311,7 @@ XEEMITTER(ld, 0xE8000000, DS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(ldu, 0xE8000001, DS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ldu, 0xE8000001, DS)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(DS || 0b00) // RT <- MEM(EA, 8) // RA <- EA @@ -325,7 +322,7 @@ XEEMITTER(ldu, 0xE8000001, DS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(ldux, 0x7C00006A, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ldux, 0x7C00006A, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // RT <- MEM(EA, 8) // RA <- EA @@ -336,7 +333,7 @@ XEEMITTER(ldux, 0x7C00006A, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(ldx, 0x7C00002A, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ldx, 0x7C00002A, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -349,10 +346,9 @@ XEEMITTER(ldx, 0x7C00002A, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer store (A-14) -XEEMITTER(stb, 0x98000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stb, 0x98000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -364,7 +360,7 @@ XEEMITTER(stb, 0x98000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stbu, 0x9C000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stbu, 0x9C000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // MEM(EA, 1) <- (RS)[56:63] // RA <- EA @@ -374,7 +370,7 @@ XEEMITTER(stbu, 0x9C000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stbux, 0x7C0001EE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stbux, 0x7C0001EE, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 1) <- (RS)[56:63] // RA <- EA @@ -384,7 +380,7 @@ XEEMITTER(stbux, 0x7C0001EE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stbx, 0x7C0001AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stbx, 0x7C0001AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -396,7 +392,7 @@ XEEMITTER(stbx, 0x7C0001AE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sth, 0xB0000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sth, 0xB0000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -408,7 +404,7 @@ XEEMITTER(sth, 0xB0000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sthu, 0xB4000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sthu, 0xB4000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // MEM(EA, 2) <- (RS)[48:63] // RA <- EA @@ -418,7 +414,7 @@ XEEMITTER(sthu, 0xB4000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sthux, 0x7C00036E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sthux, 0x7C00036E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 2) <- (RS)[48:63] // RA <- EA @@ -428,7 +424,7 @@ XEEMITTER(sthux, 0x7C00036E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sthx, 0x7C00032E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sthx, 0x7C00032E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -440,7 +436,7 @@ XEEMITTER(sthx, 0x7C00032E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stw, 0x90000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stw, 0x90000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -452,7 +448,7 @@ XEEMITTER(stw, 0x90000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stwu, 0x94000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stwu, 0x94000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // MEM(EA, 4) <- (RS)[32:63] // RA <- EA @@ -462,7 +458,7 @@ XEEMITTER(stwu, 0x94000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stwux, 0x7C00016E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stwux, 0x7C00016E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 4) <- (RS)[32:63] // RA <- EA @@ -472,7 +468,7 @@ XEEMITTER(stwux, 0x7C00016E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stwx, 0x7C00012E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stwx, 0x7C00012E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -484,7 +480,7 @@ XEEMITTER(stwx, 0x7C00012E, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(std, 0xF8000000, DS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(std, 0xF8000000, DS)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -496,7 +492,7 @@ XEEMITTER(std, 0xF8000000, DS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stdu, 0xF8000001, DS )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stdu, 0xF8000001, DS)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(DS || 0b00) // MEM(EA, 8) <- (RS) // RA <- EA @@ -506,7 +502,7 @@ XEEMITTER(stdu, 0xF8000001, DS )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stdux, 0x7C00016A, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stdux, 0x7C00016A, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 8) <- (RS) // RA <- EA @@ -528,10 +524,9 @@ XEEMITTER(stdx, 0x7C00012A, X)(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer load and store with byte reverse (A-1 -XEEMITTER(lhbrx, 0x7C00062C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lhbrx, 0x7C00062C, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -544,7 +539,7 @@ XEEMITTER(lhbrx, 0x7C00062C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwbrx, 0x7C00042C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwbrx, 0x7C00042C, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -557,7 +552,7 @@ XEEMITTER(lwbrx, 0x7C00042C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(ldbrx, 0x7C000428, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ldbrx, 0x7C000428, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -570,7 +565,7 @@ XEEMITTER(ldbrx, 0x7C000428, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(sthbrx, 0x7C00072C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sthbrx, 0x7C00072C, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -582,7 +577,7 @@ XEEMITTER(sthbrx, 0x7C00072C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stwbrx, 0x7C00052C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stwbrx, 0x7C00052C, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -594,7 +589,7 @@ XEEMITTER(stwbrx, 0x7C00052C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stdbrx, 0x7C000528, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stdbrx, 0x7C000528, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -606,64 +601,61 @@ XEEMITTER(stdbrx, 0x7C000528, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Integer load and store multiple (A-16) -XEEMITTER(lmw, 0xB8000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lmw, 0xB8000000, D)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(stmw, 0xBC000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stmw, 0xBC000000, D)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } - // Integer load and store string (A-17) -XEEMITTER(lswi, 0x7C0004AA, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lswi, 0x7C0004AA, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(lswx, 0x7C00042A, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lswx, 0x7C00042A, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(stswi, 0x7C0005AA, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stswi, 0x7C0005AA, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } -XEEMITTER(stswx, 0x7C00052A, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stswx, 0x7C00052A, X)(PPCHIRBuilder& f, InstrData& i) { XEINSTRNOTIMPLEMENTED(); return 1; } - // Memory synchronization (A-18) -XEEMITTER(eieio, 0x7C0006AC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(eieio, 0x7C0006AC, X)(PPCHIRBuilder& f, InstrData& i) { // XEINSTRNOTIMPLEMENTED(); f.Nop(); return 0; } -XEEMITTER(sync, 0x7C0004AC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(sync, 0x7C0004AC, X)(PPCHIRBuilder& f, InstrData& i) { // XEINSTRNOTIMPLEMENTED(); f.Nop(); return 0; } -XEEMITTER(isync, 0x4C00012C, XL )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(isync, 0x4C00012C, XL)(PPCHIRBuilder& f, InstrData& i) { // XEINSTRNOTIMPLEMENTED(); f.Nop(); return 0; } -XEEMITTER(ldarx, 0x7C0000A8, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(ldarx, 0x7C0000A8, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -679,7 +671,7 @@ XEEMITTER(ldarx, 0x7C0000A8, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lwarx, 0x7C000028, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lwarx, 0x7C000028, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -690,12 +682,13 @@ XEEMITTER(lwarx, 0x7C000028, X )(PPCHIRBuilder& f, InstrData& i) { // RESERVE_ADDR <- real_addr(EA) // RT <- i32.0 || MEM(EA, 4) Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); - Value* rt = f.ZeroExtend(f.ByteSwap(f.LoadAcquire(ea, INT32_TYPE)), INT64_TYPE); + Value* rt = + f.ZeroExtend(f.ByteSwap(f.LoadAcquire(ea, INT32_TYPE)), INT64_TYPE); f.StoreGPR(i.X.RT, rt); return 0; } -XEEMITTER(stdcx, 0x7C0001AD, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stdcx, 0x7C0001AD, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -712,7 +705,7 @@ XEEMITTER(stdcx, 0x7C0001AD, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stwcx, 0x7C00012D, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stwcx, 0x7C00012D, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -729,10 +722,9 @@ XEEMITTER(stwcx, 0x7C00012D, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } - // Floating-point load (A-19) -XEEMITTER(lfd, 0xC8000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfd, 0xC8000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -745,7 +737,7 @@ XEEMITTER(lfd, 0xC8000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lfdu, 0xCC000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfdu, 0xCC000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // FRT <- MEM(EA, 8) // RA <- EA @@ -756,7 +748,7 @@ XEEMITTER(lfdu, 0xCC000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lfdux, 0x7C0004EE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfdux, 0x7C0004EE, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // FRT <- MEM(EA, 8) // RA <- EA @@ -767,7 +759,7 @@ XEEMITTER(lfdux, 0x7C0004EE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lfdx, 0x7C0004AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfdx, 0x7C0004AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -780,7 +772,7 @@ XEEMITTER(lfdx, 0x7C0004AE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(lfs, 0xC0000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfs, 0xC0000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -789,39 +781,36 @@ XEEMITTER(lfs, 0xC0000000, D )(PPCHIRBuilder& f, InstrData& i) { // FRT <- DOUBLE(MEM(EA, 4)) Value* ea = CalculateEA_0_i(f, i.D.RA, XEEXTS16(i.D.DS)); Value* rt = f.Convert( - f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), - FLOAT64_TYPE); + f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.D.RT, rt); return 0; } -XEEMITTER(lfsu, 0xC4000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfsu, 0xC4000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // FRT <- DOUBLE(MEM(EA, 4)) // RA <- EA Value* ea = CalculateEA_i(f, i.D.RA, XEEXTS16(i.D.DS)); Value* rt = f.Convert( - f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), - FLOAT64_TYPE); + f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.D.RT, rt); f.StoreGPR(i.D.RA, ea); return 0; } -XEEMITTER(lfsux, 0x7C00046E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfsux, 0x7C00046E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // FRT <- DOUBLE(MEM(EA, 4)) // RA <- EA Value* ea = CalculateEA(f, i.X.RA, i.X.RB); Value* rt = f.Convert( - f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), - FLOAT64_TYPE); + f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.X.RT, rt); f.StoreGPR(i.X.RA, ea); return 0; } -XEEMITTER(lfsx, 0x7C00042E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(lfsx, 0x7C00042E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -830,16 +819,14 @@ XEEMITTER(lfsx, 0x7C00042E, X )(PPCHIRBuilder& f, InstrData& i) { // FRT <- DOUBLE(MEM(EA, 4)) Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); Value* rt = f.Convert( - f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), - FLOAT64_TYPE); + f.Cast(f.ByteSwap(f.Load(ea, INT32_TYPE)), FLOAT32_TYPE), FLOAT64_TYPE); f.StoreFPR(i.X.RT, rt); return 0; } - // Floating-point store (A-20) -XEEMITTER(stfd, 0xD8000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfd, 0xD8000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -851,7 +838,7 @@ XEEMITTER(stfd, 0xD8000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stfdu, 0xDC000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfdu, 0xDC000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // MEM(EA, 8) <- (FRS) // RA <- EA @@ -861,7 +848,7 @@ XEEMITTER(stfdu, 0xDC000000, D )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stfdux, 0x7C0005EE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfdux, 0x7C0005EE, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 8) <- (FRS) // RA <- EA @@ -871,7 +858,7 @@ XEEMITTER(stfdux, 0x7C0005EE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stfdx, 0x7C0005AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfdx, 0x7C0005AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -883,7 +870,7 @@ XEEMITTER(stfdx, 0x7C0005AE, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(stfiwx, 0x7C0007AE, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfiwx, 0x7C0007AE, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -891,12 +878,12 @@ XEEMITTER(stfiwx, 0x7C0007AE, X )(PPCHIRBuilder& f, InstrData& i) { // EA <- b + (RB) // MEM(EA, 4) <- (FRS)[32:63] Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); - f.Store(ea, f.ByteSwap( - f.Truncate(f.Cast(f.LoadFPR(i.X.RT), INT64_TYPE), INT32_TYPE))); + f.Store(ea, f.ByteSwap(f.Truncate(f.Cast(f.LoadFPR(i.X.RT), INT64_TYPE), + INT32_TYPE))); return 0; } -XEEMITTER(stfs, 0xD0000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfs, 0xD0000000, D)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -904,34 +891,34 @@ XEEMITTER(stfs, 0xD0000000, D )(PPCHIRBuilder& f, InstrData& i) { // EA <- b + EXTS(D) // MEM(EA, 4) <- SINGLE(FRS) Value* ea = CalculateEA_0_i(f, i.D.RA, XEEXTS16(i.D.DS)); - f.Store(ea, f.ByteSwap(f.Cast( - f.Convert(f.LoadFPR(i.D.RT), FLOAT32_TYPE), INT32_TYPE))); + f.Store(ea, f.ByteSwap(f.Cast(f.Convert(f.LoadFPR(i.D.RT), FLOAT32_TYPE), + INT32_TYPE))); return 0; } -XEEMITTER(stfsu, 0xD4000000, D )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfsu, 0xD4000000, D)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + EXTS(D) // MEM(EA, 4) <- SINGLE(FRS) // RA <- EA Value* ea = CalculateEA_i(f, i.D.RA, XEEXTS16(i.D.DS)); - f.Store(ea, f.ByteSwap(f.Cast( - f.Convert(f.LoadFPR(i.D.RT), FLOAT32_TYPE), INT32_TYPE))); + f.Store(ea, f.ByteSwap(f.Cast(f.Convert(f.LoadFPR(i.D.RT), FLOAT32_TYPE), + INT32_TYPE))); f.StoreGPR(i.D.RA, ea); return 0; } -XEEMITTER(stfsux, 0x7C00056E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfsux, 0x7C00056E, X)(PPCHIRBuilder& f, InstrData& i) { // EA <- (RA) + (RB) // MEM(EA, 4) <- SINGLE(FRS) // RA <- EA Value* ea = CalculateEA(f, i.X.RA, i.X.RB); - f.Store(ea, f.ByteSwap(f.Cast( - f.Convert(f.LoadFPR(i.X.RT), FLOAT32_TYPE), INT32_TYPE))); + f.Store(ea, f.ByteSwap(f.Cast(f.Convert(f.LoadFPR(i.X.RT), FLOAT32_TYPE), + INT32_TYPE))); f.StoreGPR(i.X.RA, ea); return 0; } -XEEMITTER(stfsx, 0x7C00052E, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(stfsx, 0x7C00052E, X)(PPCHIRBuilder& f, InstrData& i) { // if RA = 0 then // b <- 0 // else @@ -939,15 +926,14 @@ XEEMITTER(stfsx, 0x7C00052E, X )(PPCHIRBuilder& f, InstrData& i) { // EA <- b + (RB) // MEM(EA, 4) <- SINGLE(FRS) Value* ea = CalculateEA_0(f, i.X.RA, i.X.RB); - f.Store(ea, f.ByteSwap(f.Cast( - f.Convert(f.LoadFPR(i.X.RT), FLOAT32_TYPE), INT32_TYPE))); + f.Store(ea, f.ByteSwap(f.Cast(f.Convert(f.LoadFPR(i.X.RT), FLOAT32_TYPE), + INT32_TYPE))); return 0; } - // Cache management (A-27) -XEEMITTER(dcbf, 0x7C0000AC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dcbf, 0x7C0000AC, X)(PPCHIRBuilder& f, InstrData& i) { // No-op for now. // TODO(benvanik): use prefetch // XEINSTRNOTIMPLEMENTED(); @@ -955,7 +941,7 @@ XEEMITTER(dcbf, 0x7C0000AC, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(dcbst, 0x7C00006C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dcbst, 0x7C00006C, X)(PPCHIRBuilder& f, InstrData& i) { // No-op for now. // TODO(benvanik): use prefetch // XEINSTRNOTIMPLEMENTED(); @@ -963,7 +949,7 @@ XEEMITTER(dcbst, 0x7C00006C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(dcbt, 0x7C00022C, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dcbt, 0x7C00022C, X)(PPCHIRBuilder& f, InstrData& i) { // No-op for now. // TODO(benvanik): use prefetch // XEINSTRNOTIMPLEMENTED(); @@ -971,7 +957,7 @@ XEEMITTER(dcbt, 0x7C00022C, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(dcbtst, 0x7C0001EC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dcbtst, 0x7C0001EC, X)(PPCHIRBuilder& f, InstrData& i) { // No-op for now. // TODO(benvanik): use prefetch // XEINSTRNOTIMPLEMENTED(); @@ -979,7 +965,7 @@ XEEMITTER(dcbtst, 0x7C0001EC, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(dcbz, 0x7C0007EC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(dcbz, 0x7C0007EC, X)(PPCHIRBuilder& f, InstrData& i) { // No-op for now. // TODO(benvanik): use prefetch // or dcbz128 0x7C2007EC @@ -988,98 +974,96 @@ XEEMITTER(dcbz, 0x7C0007EC, X )(PPCHIRBuilder& f, InstrData& i) { return 0; } -XEEMITTER(icbi, 0x7C0007AC, X )(PPCHIRBuilder& f, InstrData& i) { +XEEMITTER(icbi, 0x7C0007AC, X)(PPCHIRBuilder& f, InstrData& i) { // XEINSTRNOTIMPLEMENTED(); f.Nop(); return 0; } - void RegisterEmitCategoryMemory() { - XEREGISTERINSTR(lbz, 0x88000000); - XEREGISTERINSTR(lbzu, 0x8C000000); - XEREGISTERINSTR(lbzux, 0x7C0000EE); - XEREGISTERINSTR(lbzx, 0x7C0000AE); - XEREGISTERINSTR(lha, 0xA8000000); - XEREGISTERINSTR(lhau, 0xAC000000); - XEREGISTERINSTR(lhaux, 0x7C0002EE); - XEREGISTERINSTR(lhax, 0x7C0002AE); - XEREGISTERINSTR(lhz, 0xA0000000); - XEREGISTERINSTR(lhzu, 0xA4000000); - XEREGISTERINSTR(lhzux, 0x7C00026E); - XEREGISTERINSTR(lhzx, 0x7C00022E); - XEREGISTERINSTR(lwa, 0xE8000002); - XEREGISTERINSTR(lwaux, 0x7C0002EA); - XEREGISTERINSTR(lwax, 0x7C0002AA); - XEREGISTERINSTR(lwz, 0x80000000); - XEREGISTERINSTR(lwzu, 0x84000000); - XEREGISTERINSTR(lwzux, 0x7C00006E); - XEREGISTERINSTR(lwzx, 0x7C00002E); - XEREGISTERINSTR(ld, 0xE8000000); - XEREGISTERINSTR(ldu, 0xE8000001); - XEREGISTERINSTR(ldux, 0x7C00006A); - XEREGISTERINSTR(ldx, 0x7C00002A); - XEREGISTERINSTR(stb, 0x98000000); - XEREGISTERINSTR(stbu, 0x9C000000); - XEREGISTERINSTR(stbux, 0x7C0001EE); - XEREGISTERINSTR(stbx, 0x7C0001AE); - XEREGISTERINSTR(sth, 0xB0000000); - XEREGISTERINSTR(sthu, 0xB4000000); - XEREGISTERINSTR(sthux, 0x7C00036E); - XEREGISTERINSTR(sthx, 0x7C00032E); - XEREGISTERINSTR(stw, 0x90000000); - XEREGISTERINSTR(stwu, 0x94000000); - XEREGISTERINSTR(stwux, 0x7C00016E); - XEREGISTERINSTR(stwx, 0x7C00012E); - XEREGISTERINSTR(std, 0xF8000000); - XEREGISTERINSTR(stdu, 0xF8000001); - XEREGISTERINSTR(stdux, 0x7C00016A); - XEREGISTERINSTR(stdx, 0x7C00012A); - XEREGISTERINSTR(lhbrx, 0x7C00062C); - XEREGISTERINSTR(lwbrx, 0x7C00042C); - XEREGISTERINSTR(ldbrx, 0x7C000428); - XEREGISTERINSTR(sthbrx, 0x7C00072C); - XEREGISTERINSTR(stwbrx, 0x7C00052C); - XEREGISTERINSTR(stdbrx, 0x7C000528); - XEREGISTERINSTR(lmw, 0xB8000000); - XEREGISTERINSTR(stmw, 0xBC000000); - XEREGISTERINSTR(lswi, 0x7C0004AA); - XEREGISTERINSTR(lswx, 0x7C00042A); - XEREGISTERINSTR(stswi, 0x7C0005AA); - XEREGISTERINSTR(stswx, 0x7C00052A); - XEREGISTERINSTR(eieio, 0x7C0006AC); - XEREGISTERINSTR(sync, 0x7C0004AC); - XEREGISTERINSTR(isync, 0x4C00012C); - XEREGISTERINSTR(ldarx, 0x7C0000A8); - XEREGISTERINSTR(lwarx, 0x7C000028); - XEREGISTERINSTR(stdcx, 0x7C0001AD); - XEREGISTERINSTR(stwcx, 0x7C00012D); - XEREGISTERINSTR(lfd, 0xC8000000); - XEREGISTERINSTR(lfdu, 0xCC000000); - XEREGISTERINSTR(lfdux, 0x7C0004EE); - XEREGISTERINSTR(lfdx, 0x7C0004AE); - XEREGISTERINSTR(lfs, 0xC0000000); - XEREGISTERINSTR(lfsu, 0xC4000000); - XEREGISTERINSTR(lfsux, 0x7C00046E); - XEREGISTERINSTR(lfsx, 0x7C00042E); - XEREGISTERINSTR(stfd, 0xD8000000); - XEREGISTERINSTR(stfdu, 0xDC000000); - XEREGISTERINSTR(stfdux, 0x7C0005EE); - XEREGISTERINSTR(stfdx, 0x7C0005AE); - XEREGISTERINSTR(stfiwx, 0x7C0007AE); - XEREGISTERINSTR(stfs, 0xD0000000); - XEREGISTERINSTR(stfsu, 0xD4000000); - XEREGISTERINSTR(stfsux, 0x7C00056E); - XEREGISTERINSTR(stfsx, 0x7C00052E); - XEREGISTERINSTR(dcbf, 0x7C0000AC); - XEREGISTERINSTR(dcbst, 0x7C00006C); - XEREGISTERINSTR(dcbt, 0x7C00022C); - XEREGISTERINSTR(dcbtst, 0x7C0001EC); - XEREGISTERINSTR(dcbz, 0x7C0007EC); - XEREGISTERINSTR(icbi, 0x7C0007AC); + XEREGISTERINSTR(lbz, 0x88000000); + XEREGISTERINSTR(lbzu, 0x8C000000); + XEREGISTERINSTR(lbzux, 0x7C0000EE); + XEREGISTERINSTR(lbzx, 0x7C0000AE); + XEREGISTERINSTR(lha, 0xA8000000); + XEREGISTERINSTR(lhau, 0xAC000000); + XEREGISTERINSTR(lhaux, 0x7C0002EE); + XEREGISTERINSTR(lhax, 0x7C0002AE); + XEREGISTERINSTR(lhz, 0xA0000000); + XEREGISTERINSTR(lhzu, 0xA4000000); + XEREGISTERINSTR(lhzux, 0x7C00026E); + XEREGISTERINSTR(lhzx, 0x7C00022E); + XEREGISTERINSTR(lwa, 0xE8000002); + XEREGISTERINSTR(lwaux, 0x7C0002EA); + XEREGISTERINSTR(lwax, 0x7C0002AA); + XEREGISTERINSTR(lwz, 0x80000000); + XEREGISTERINSTR(lwzu, 0x84000000); + XEREGISTERINSTR(lwzux, 0x7C00006E); + XEREGISTERINSTR(lwzx, 0x7C00002E); + XEREGISTERINSTR(ld, 0xE8000000); + XEREGISTERINSTR(ldu, 0xE8000001); + XEREGISTERINSTR(ldux, 0x7C00006A); + XEREGISTERINSTR(ldx, 0x7C00002A); + XEREGISTERINSTR(stb, 0x98000000); + XEREGISTERINSTR(stbu, 0x9C000000); + XEREGISTERINSTR(stbux, 0x7C0001EE); + XEREGISTERINSTR(stbx, 0x7C0001AE); + XEREGISTERINSTR(sth, 0xB0000000); + XEREGISTERINSTR(sthu, 0xB4000000); + XEREGISTERINSTR(sthux, 0x7C00036E); + XEREGISTERINSTR(sthx, 0x7C00032E); + XEREGISTERINSTR(stw, 0x90000000); + XEREGISTERINSTR(stwu, 0x94000000); + XEREGISTERINSTR(stwux, 0x7C00016E); + XEREGISTERINSTR(stwx, 0x7C00012E); + XEREGISTERINSTR(std, 0xF8000000); + XEREGISTERINSTR(stdu, 0xF8000001); + XEREGISTERINSTR(stdux, 0x7C00016A); + XEREGISTERINSTR(stdx, 0x7C00012A); + XEREGISTERINSTR(lhbrx, 0x7C00062C); + XEREGISTERINSTR(lwbrx, 0x7C00042C); + XEREGISTERINSTR(ldbrx, 0x7C000428); + XEREGISTERINSTR(sthbrx, 0x7C00072C); + XEREGISTERINSTR(stwbrx, 0x7C00052C); + XEREGISTERINSTR(stdbrx, 0x7C000528); + XEREGISTERINSTR(lmw, 0xB8000000); + XEREGISTERINSTR(stmw, 0xBC000000); + XEREGISTERINSTR(lswi, 0x7C0004AA); + XEREGISTERINSTR(lswx, 0x7C00042A); + XEREGISTERINSTR(stswi, 0x7C0005AA); + XEREGISTERINSTR(stswx, 0x7C00052A); + XEREGISTERINSTR(eieio, 0x7C0006AC); + XEREGISTERINSTR(sync, 0x7C0004AC); + XEREGISTERINSTR(isync, 0x4C00012C); + XEREGISTERINSTR(ldarx, 0x7C0000A8); + XEREGISTERINSTR(lwarx, 0x7C000028); + XEREGISTERINSTR(stdcx, 0x7C0001AD); + XEREGISTERINSTR(stwcx, 0x7C00012D); + XEREGISTERINSTR(lfd, 0xC8000000); + XEREGISTERINSTR(lfdu, 0xCC000000); + XEREGISTERINSTR(lfdux, 0x7C0004EE); + XEREGISTERINSTR(lfdx, 0x7C0004AE); + XEREGISTERINSTR(lfs, 0xC0000000); + XEREGISTERINSTR(lfsu, 0xC4000000); + XEREGISTERINSTR(lfsux, 0x7C00046E); + XEREGISTERINSTR(lfsx, 0x7C00042E); + XEREGISTERINSTR(stfd, 0xD8000000); + XEREGISTERINSTR(stfdu, 0xDC000000); + XEREGISTERINSTR(stfdux, 0x7C0005EE); + XEREGISTERINSTR(stfdx, 0x7C0005AE); + XEREGISTERINSTR(stfiwx, 0x7C0007AE); + XEREGISTERINSTR(stfs, 0xD0000000); + XEREGISTERINSTR(stfsu, 0xD4000000); + XEREGISTERINSTR(stfsux, 0x7C00056E); + XEREGISTERINSTR(stfsx, 0x7C00052E); + XEREGISTERINSTR(dcbf, 0x7C0000AC); + XEREGISTERINSTR(dcbst, 0x7C00006C); + XEREGISTERINSTR(dcbt, 0x7C00022C); + XEREGISTERINSTR(dcbtst, 0x7C0001EC); + XEREGISTERINSTR(dcbz, 0x7C0007EC); + XEREGISTERINSTR(icbi, 0x7C0007AC); } - } // namespace ppc } // namespace frontend } // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_frontend.cc b/src/alloy/frontend/ppc/ppc_frontend.cc index 29f62ab42..f6970d5f5 100644 --- a/src/alloy/frontend/ppc/ppc_frontend.cc +++ b/src/alloy/frontend/ppc/ppc_frontend.cc @@ -15,44 +15,40 @@ #include #include -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; -using namespace alloy::runtime; +namespace alloy { +namespace frontend { +namespace ppc { +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; +using alloy::runtime::Runtime; -namespace { - void InitializeIfNeeded(); - void CleanupOnShutdown(); +void InitializeIfNeeded(); +void CleanupOnShutdown(); - void InitializeIfNeeded() { - static bool has_initialized = false; - if (has_initialized) { - return; - } - has_initialized = true; - - RegisterEmitCategoryAltivec(); - RegisterEmitCategoryALU(); - RegisterEmitCategoryControl(); - RegisterEmitCategoryFPU(); - RegisterEmitCategoryMemory(); - - atexit(CleanupOnShutdown); +void InitializeIfNeeded() { + static bool has_initialized = false; + if (has_initialized) { + return; } + has_initialized = true; - void CleanupOnShutdown() { - } + RegisterEmitCategoryAltivec(); + RegisterEmitCategoryALU(); + RegisterEmitCategoryControl(); + RegisterEmitCategoryFPU(); + RegisterEmitCategoryMemory(); + + atexit(CleanupOnShutdown); } +void CleanupOnShutdown() {} -PPCFrontend::PPCFrontend(Runtime* runtime) : - Frontend(runtime) { +PPCFrontend::PPCFrontend(Runtime* runtime) : Frontend(runtime) { InitializeIfNeeded(); - ContextInfo* info = new ContextInfo( - sizeof(PPCContext), - offsetof(PPCContext, thread_state)); + ContextInfo* info = + new ContextInfo(sizeof(PPCContext), offsetof(PPCContext, thread_state)); // Add fields/etc. context_info_ = info; } @@ -61,8 +57,7 @@ PPCFrontend::~PPCFrontend() { // Force cleanup now before we deinit. translator_pool_.Reset(); - alloy::tracing::WriteEvent(EventType::Deinit({ - })); + alloy::tracing::WriteEvent(EventType::Deinit({})); } int PPCFrontend::Initialize() { @@ -71,14 +66,12 @@ int PPCFrontend::Initialize() { return result; } - alloy::tracing::WriteEvent(EventType::Init({ - })); + alloy::tracing::WriteEvent(EventType::Init({})); return result; } -int PPCFrontend::DeclareFunction( - FunctionInfo* symbol_info) { +int PPCFrontend::DeclareFunction(FunctionInfo* symbol_info) { // Could scan or something here. // Could also check to see if it's a well-known function type and classify // for later. @@ -87,12 +80,16 @@ int PPCFrontend::DeclareFunction( return 0; } -int PPCFrontend::DefineFunction( - FunctionInfo* symbol_info, uint32_t debug_info_flags, - Function** out_function) { +int PPCFrontend::DefineFunction(FunctionInfo* symbol_info, + uint32_t debug_info_flags, + Function** out_function) { PPCTranslator* translator = translator_pool_.Allocate(this); - int result = translator->Translate( - symbol_info, debug_info_flags, out_function); + int result = + translator->Translate(symbol_info, debug_info_flags, out_function); translator_pool_.Release(translator); return result; } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_frontend.h b/src/alloy/frontend/ppc/ppc_frontend.h index 612b7c1b2..76e37f4a9 100644 --- a/src/alloy/frontend/ppc/ppc_frontend.h +++ b/src/alloy/frontend/ppc/ppc_frontend.h @@ -15,7 +15,6 @@ #include - namespace alloy { namespace frontend { namespace ppc { @@ -23,26 +22,23 @@ namespace ppc { class PPCTranslator; class PPCFrontend : public Frontend { -public: + public: PPCFrontend(runtime::Runtime* runtime); virtual ~PPCFrontend(); virtual int Initialize(); - virtual int DeclareFunction( - runtime::FunctionInfo* symbol_info); - virtual int DefineFunction( - runtime::FunctionInfo* symbol_info, uint32_t debug_info_flags, - runtime::Function** out_function); + virtual int DeclareFunction(runtime::FunctionInfo* symbol_info); + virtual int DefineFunction(runtime::FunctionInfo* symbol_info, + uint32_t debug_info_flags, + runtime::Function** out_function); -private: + private: TypePool translator_pool_; }; - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_FRONTEND_H_ diff --git a/src/alloy/frontend/ppc/ppc_hir_builder.cc b/src/alloy/frontend/ppc/ppc_hir_builder.cc index db2f304b4..4b81401dd 100644 --- a/src/alloy/frontend/ppc/ppc_hir_builder.cc +++ b/src/alloy/frontend/ppc/ppc_hir_builder.cc @@ -18,22 +18,25 @@ #include #include -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; +namespace alloy { +namespace frontend { +namespace ppc { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::hir; -using namespace alloy::runtime; +using alloy::hir::Label; +using alloy::hir::TypeName; +using alloy::hir::Value; +using alloy::runtime::Runtime; +using alloy::runtime::FunctionInfo; -PPCHIRBuilder::PPCHIRBuilder(PPCFrontend* frontend) : - frontend_(frontend), - HIRBuilder() { +PPCHIRBuilder::PPCHIRBuilder(PPCFrontend* frontend) + : frontend_(frontend), HIRBuilder() { comment_buffer_ = new StringBuffer(4096); } -PPCHIRBuilder::~PPCHIRBuilder() { - delete comment_buffer_; -} +PPCHIRBuilder::~PPCHIRBuilder() { delete comment_buffer_; } void PPCHIRBuilder::Reset() { start_address_ = 0; @@ -51,13 +54,11 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) { symbol_info_ = symbol_info; start_address_ = symbol_info->address(); - instr_count_ = - (symbol_info->end_address() - symbol_info->address()) / 4 + 1; + instr_count_ = (symbol_info->end_address() - symbol_info->address()) / 4 + 1; with_debug_info_ = with_debug_info; if (with_debug_info_) { - Comment("%s fn %.8X-%.8X %s", - symbol_info->module()->name(), + Comment("%s fn %.8X-%.8X %s", symbol_info->module()->name(), symbol_info->address(), symbol_info->end_address(), symbol_info->name()); } @@ -121,7 +122,7 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) { if (!i.type) { XELOGCPU("Invalid instruction %.8X %.8X", i.address, i.code); Comment("INVALID!"); - //TraceInvalidInstruction(i); + // TraceInvalidInstruction(i); continue; } @@ -134,11 +135,11 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) { } if (!i.type->emit || emit(*this, i)) { - XELOGCPU("Unimplemented instr %.8X %.8X %s", - i.address, i.code, i.type->name); + XELOGCPU("Unimplemented instr %.8X %.8X %s", i.address, i.code, + i.type->name); Comment("UNIMPLEMENTED!"); - //DebugBreak(); - //TraceInvalidInstruction(i); + // DebugBreak(); + // TraceInvalidInstruction(i); } } @@ -147,8 +148,7 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) { void PPCHIRBuilder::AnnotateLabel(uint64_t address, Label* label) { char name_buffer[13]; - xesnprintfa(name_buffer, XECOUNT(name_buffer), - "loc_%.8X", (uint32_t)address); + xesnprintfa(name_buffer, XECOUNT(name_buffer), "loc_%.8X", (uint32_t)address); label->name = (char*)arena_->Alloc(sizeof(name_buffer)); xe_copy_struct(label->name, name_buffer, sizeof(name_buffer)); } @@ -197,10 +197,10 @@ Label* PPCHIRBuilder::LookupLabel(uint64_t address) { return label; } -//Value* PPCHIRBuilder::LoadXER() { +// Value* PPCHIRBuilder::LoadXER() { //} // -//void PPCHIRBuilder::StoreXER(Value* value) { +// void PPCHIRBuilder::StoreXER(Value* value) { //} Value* PPCHIRBuilder::LoadLR() { @@ -235,13 +235,12 @@ void PPCHIRBuilder::StoreCR(uint32_t n, Value* value) { XEASSERTALWAYS(); } -void PPCHIRBuilder::UpdateCR( - uint32_t n, Value* lhs, bool is_signed) { +void PPCHIRBuilder::UpdateCR(uint32_t n, Value* lhs, bool is_signed) { UpdateCR(n, lhs, LoadZero(lhs->type), is_signed); } -void PPCHIRBuilder::UpdateCR( - uint32_t n, Value* lhs, Value* rhs, bool is_signed) { +void PPCHIRBuilder::UpdateCR(uint32_t n, Value* lhs, Value* rhs, + bool is_signed) { if (is_signed) { Value* lt = CompareSLT(lhs, rhs); StoreContext(offsetof(PPCContext, cr0) + (4 * n) + 0, lt); @@ -264,7 +263,8 @@ void PPCHIRBuilder::UpdateCR6(Value* src_value) { // Testing for all 1's and all 0's. // if (Rc) CR6 = all_equal | 0 | none_equal | 0 // TODO(benvanik): efficient instruction? - StoreContext(offsetof(PPCContext, cr6.cr6_all_equal), IsFalse(Not(src_value))); + StoreContext(offsetof(PPCContext, cr6.cr6_all_equal), + IsFalse(Not(src_value))); StoreContext(offsetof(PPCContext, cr6.cr6_none_equal), IsFalse(src_value)); } @@ -282,9 +282,7 @@ Value* PPCHIRBuilder::LoadXER() { return NULL; } -void PPCHIRBuilder::StoreXER(Value* value) { - XEASSERTALWAYS(); -} +void PPCHIRBuilder::StoreXER(Value* value) { XEASSERTALWAYS(); } Value* PPCHIRBuilder::LoadCA() { return LoadContext(offsetof(PPCContext, xer_ca), INT8_TYPE); @@ -305,48 +303,41 @@ void PPCHIRBuilder::StoreSAT(Value* value) { } Value* PPCHIRBuilder::LoadGPR(uint32_t reg) { - return LoadContext( - offsetof(PPCContext, r) + reg * 8, INT64_TYPE); + return LoadContext(offsetof(PPCContext, r) + reg * 8, INT64_TYPE); } void PPCHIRBuilder::StoreGPR(uint32_t reg, Value* value) { XEASSERT(value->type == INT64_TYPE); - StoreContext( - offsetof(PPCContext, r) + reg * 8, value); + StoreContext(offsetof(PPCContext, r) + reg * 8, value); } Value* PPCHIRBuilder::LoadFPR(uint32_t reg) { - return LoadContext( - offsetof(PPCContext, f) + reg * 8, FLOAT64_TYPE); + return LoadContext(offsetof(PPCContext, f) + reg * 8, FLOAT64_TYPE); } void PPCHIRBuilder::StoreFPR(uint32_t reg, Value* value) { XEASSERT(value->type == FLOAT64_TYPE); - StoreContext( - offsetof(PPCContext, f) + reg * 8, value); + StoreContext(offsetof(PPCContext, f) + reg * 8, value); } Value* PPCHIRBuilder::LoadVR(uint32_t reg) { - return LoadContext( - offsetof(PPCContext, v) + reg * 16, VEC128_TYPE); + return LoadContext(offsetof(PPCContext, v) + reg * 16, VEC128_TYPE); } void PPCHIRBuilder::StoreVR(uint32_t reg, Value* value) { XEASSERT(value->type == VEC128_TYPE); - StoreContext( - offsetof(PPCContext, v) + reg * 16, value); + StoreContext(offsetof(PPCContext, v) + reg * 16, value); } -Value* PPCHIRBuilder::LoadAcquire( - Value* address, TypeName type, uint32_t load_flags) { - AtomicExchange( - LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE), - Truncate(address, INT32_TYPE)); +Value* PPCHIRBuilder::LoadAcquire(Value* address, TypeName type, + uint32_t load_flags) { + AtomicExchange(LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE), + Truncate(address, INT32_TYPE)); return Load(address, type, load_flags); } -Value* PPCHIRBuilder::StoreRelease( - Value* address, Value* value, uint32_t store_flags) { +Value* PPCHIRBuilder::StoreRelease(Value* address, Value* value, + uint32_t store_flags) { Value* old_address = AtomicExchange( LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE), LoadZero(INT32_TYPE)); @@ -357,3 +348,7 @@ Value* PPCHIRBuilder::StoreRelease( MarkLabel(skip_label); return eq; } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_hir_builder.h b/src/alloy/frontend/ppc/ppc_hir_builder.h index 58560bf02..1a7f8e8d0 100644 --- a/src/alloy/frontend/ppc/ppc_hir_builder.h +++ b/src/alloy/frontend/ppc/ppc_hir_builder.h @@ -15,19 +15,18 @@ #include #include - namespace alloy { namespace frontend { namespace ppc { class PPCFrontend; - class PPCHIRBuilder : public hir::HIRBuilder { using Instr = alloy::hir::Instr; using Label = alloy::hir::Label; using Value = alloy::hir::Value; -public: + + public: PPCHIRBuilder(PPCFrontend* frontend); virtual ~PPCHIRBuilder(); @@ -53,9 +52,9 @@ public: void StoreFPSCR(Value* value); Value* LoadXER(); void StoreXER(Value* value); - //void UpdateXERWithOverflow(); - //void UpdateXERWithOverflowAndCarry(); - //void StoreOV(Value* value); + // void UpdateXERWithOverflow(); + // void UpdateXERWithOverflowAndCarry(); + // void StoreOV(Value* value); Value* LoadCA(); void StoreCA(Value* value); Value* LoadSAT(); @@ -68,31 +67,30 @@ public: Value* LoadVR(uint32_t reg); void StoreVR(uint32_t reg, Value* value); - Value* LoadAcquire(Value* address, hir::TypeName type, uint32_t load_flags = 0); + Value* LoadAcquire(Value* address, hir::TypeName type, + uint32_t load_flags = 0); Value* StoreRelease(Value* address, Value* value, uint32_t store_flags = 0); -private: + private: void AnnotateLabel(uint64_t address, Label* label); -private: - PPCFrontend* frontend_; + private: + PPCFrontend* frontend_; // Reset whenever needed: StringBuffer* comment_buffer_; // Reset each Emit: - bool with_debug_info_; + bool with_debug_info_; runtime::FunctionInfo* symbol_info_; - uint64_t start_address_; - uint64_t instr_count_; - Instr** instr_offset_list_; - Label** label_list_; + uint64_t start_address_; + uint64_t instr_count_; + Instr** instr_offset_list_; + Label** label_list_; }; - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_HIR_BUILDER_H_ diff --git a/src/alloy/frontend/ppc/ppc_instr.cc b/src/alloy/frontend/ppc/ppc_instr.cc index b12ff37bf..83647dfe7 100644 --- a/src/alloy/frontend/ppc/ppc_instr.cc +++ b/src/alloy/frontend/ppc/ppc_instr.cc @@ -13,11 +13,9 @@ #include - -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; - +namespace alloy { +namespace frontend { +namespace ppc { void InstrOperand::Dump(std::string& out_str) { if (display) { @@ -92,21 +90,18 @@ void InstrOperand::Dump(std::string& out_str) { out_str += buffer; } - -void InstrAccessBits::Clear() { - spr = cr = gpr = fpr = 0; -} +void InstrAccessBits::Clear() { spr = cr = gpr = fpr = 0; } void InstrAccessBits::Extend(InstrAccessBits& other) { - spr |= other.spr; - cr |= other.cr; - gpr |= other.gpr; - fpr |= other.fpr; - vr31_0 |= other.vr31_0; - vr63_32 |= other.vr63_32; - vr95_64 |= other.vr95_64; - vr127_96 |= other.vr127_96; - } + spr |= other.spr; + cr |= other.cr; + gpr |= other.gpr; + fpr |= other.fpr; + vr31_0 |= other.vr31_0; + vr63_32 |= other.vr63_32; + vr95_64 |= other.vr95_64; + vr127_96 |= other.vr127_96; +} void InstrAccessBits::MarkAccess(InstrRegister& reg) { uint64_t bits = 0; @@ -128,7 +123,7 @@ void InstrAccessBits::MarkAccess(InstrRegister& reg) { spr |= bits << (2 * 2); break; case InstrRegister::kCR: - cr |= bits << (2 * reg.ordinal); + cr |= bits << (2 * reg.ordinal); break; case InstrRegister::kFPSCR: spr |= bits << (2 * 3); @@ -281,41 +276,31 @@ void InstrAccessBits::Dump(std::string& out_str) { out_str = str.str(); } - void InstrDisasm::Init(const char* name, const char* info, uint32_t flags) { this->name = name; this->info = info; this->flags = flags; } -void InstrDisasm::AddLR(InstrRegister::Access access) { -} +void InstrDisasm::AddLR(InstrRegister::Access access) {} -void InstrDisasm::AddCTR(InstrRegister::Access access) { -} +void InstrDisasm::AddCTR(InstrRegister::Access access) {} -void InstrDisasm::AddCR(uint32_t bf, InstrRegister::Access access) { -} +void InstrDisasm::AddCR(uint32_t bf, InstrRegister::Access access) {} -void InstrDisasm::AddFPSCR(InstrRegister::Access access) { -} +void InstrDisasm::AddFPSCR(InstrRegister::Access access) {} -void InstrDisasm::AddRegOperand( - InstrRegister::RegisterSet set, uint32_t ordinal, - InstrRegister::Access access, const char* display) { -} +void InstrDisasm::AddRegOperand(InstrRegister::RegisterSet set, + uint32_t ordinal, InstrRegister::Access access, + const char* display) {} void InstrDisasm::AddSImmOperand(uint64_t value, size_t width, - const char* display) { -} + const char* display) {} void InstrDisasm::AddUImmOperand(uint64_t value, size_t width, - const char* display) { -} + const char* display) {} -int InstrDisasm::Finish() { - return 0; -} +int InstrDisasm::Finish() { return 0; } void InstrDisasm::Dump(std::string& out_str, size_t pad) { out_str = name; @@ -330,47 +315,55 @@ void InstrDisasm::Dump(std::string& out_str, size_t pad) { } } - -InstrType* alloy::frontend::ppc::GetInstrType(uint32_t code) { +InstrType* GetInstrType(uint32_t code) { // Fast lookup via tables. InstrType* slot = NULL; switch (code >> 26) { - case 4: - // Opcode = 4, index = bits 10-0 (10) - slot = alloy::frontend::ppc::tables::instr_table_4[XESELECTBITS(code, 0, 10)]; - break; - case 19: - // Opcode = 19, index = bits 10-1 (10) - slot = alloy::frontend::ppc::tables::instr_table_19[XESELECTBITS(code, 1, 10)]; - break; - case 30: - // Opcode = 30, index = bits 4-1 (4) - // Special cased to an uber instruction. - slot = alloy::frontend::ppc::tables::instr_table_30[XESELECTBITS(code, 0, 0)]; - break; - case 31: - // Opcode = 31, index = bits 10-1 (10) - slot = alloy::frontend::ppc::tables::instr_table_31[XESELECTBITS(code, 1, 10)]; - break; - case 58: - // Opcode = 58, index = bits 1-0 (2) - slot = alloy::frontend::ppc::tables::instr_table_58[XESELECTBITS(code, 0, 1)]; - break; - case 59: - // Opcode = 59, index = bits 5-1 (5) - slot = alloy::frontend::ppc::tables::instr_table_59[XESELECTBITS(code, 1, 5)]; - break; - case 62: - // Opcode = 62, index = bits 1-0 (2) - slot = alloy::frontend::ppc::tables::instr_table_62[XESELECTBITS(code, 0, 1)]; - break; - case 63: - // Opcode = 63, index = bits 10-1 (10) - slot = alloy::frontend::ppc::tables::instr_table_63[XESELECTBITS(code, 1, 10)]; - break; - default: - slot = alloy::frontend::ppc::tables::instr_table[XESELECTBITS(code, 26, 31)]; - break; + case 4: + // Opcode = 4, index = bits 10-0 (10) + slot = alloy::frontend::ppc::tables::instr_table_4[XESELECTBITS(code, 0, + 10)]; + break; + case 19: + // Opcode = 19, index = bits 10-1 (10) + slot = alloy::frontend::ppc::tables::instr_table_19[XESELECTBITS(code, 1, + 10)]; + break; + case 30: + // Opcode = 30, index = bits 4-1 (4) + // Special cased to an uber instruction. + slot = alloy::frontend::ppc::tables::instr_table_30[XESELECTBITS(code, 0, + 0)]; + break; + case 31: + // Opcode = 31, index = bits 10-1 (10) + slot = alloy::frontend::ppc::tables::instr_table_31[XESELECTBITS(code, 1, + 10)]; + break; + case 58: + // Opcode = 58, index = bits 1-0 (2) + slot = alloy::frontend::ppc::tables::instr_table_58[XESELECTBITS(code, 0, + 1)]; + break; + case 59: + // Opcode = 59, index = bits 5-1 (5) + slot = alloy::frontend::ppc::tables::instr_table_59[XESELECTBITS(code, 1, + 5)]; + break; + case 62: + // Opcode = 62, index = bits 1-0 (2) + slot = alloy::frontend::ppc::tables::instr_table_62[XESELECTBITS(code, 0, + 1)]; + break; + case 63: + // Opcode = 63, index = bits 10-1 (10) + slot = alloy::frontend::ppc::tables::instr_table_63[XESELECTBITS(code, 1, + 10)]; + break; + default: + slot = + alloy::frontend::ppc::tables::instr_table[XESELECTBITS(code, 26, 31)]; + break; } if (slot && slot->opcode) { return slot; @@ -379,8 +372,7 @@ InstrType* alloy::frontend::ppc::GetInstrType(uint32_t code) { // Slow lookup via linear scan. // This is primarily due to laziness. It could be made fast like the others. for (size_t n = 0; - n < XECOUNT(alloy::frontend::ppc::tables::instr_table_scan); - n++) { + n < XECOUNT(alloy::frontend::ppc::tables::instr_table_scan); n++) { slot = &(alloy::frontend::ppc::tables::instr_table_scan[n]); if (slot->opcode == (code & slot->opcode_mask)) { return slot; @@ -390,7 +382,7 @@ InstrType* alloy::frontend::ppc::GetInstrType(uint32_t code) { return NULL; } -int alloy::frontend::ppc::RegisterInstrEmit(uint32_t code, InstrEmitFn emit) { +int RegisterInstrEmit(uint32_t code, InstrEmitFn emit) { InstrType* instr_type = GetInstrType(code); XEASSERTNOTNULL(instr_type); if (!instr_type) { @@ -400,3 +392,7 @@ int alloy::frontend::ppc::RegisterInstrEmit(uint32_t code, InstrEmitFn emit) { instr_type->emit = emit; return 0; } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_instr.h b/src/alloy/frontend/ppc/ppc_instr.h index 01026e7f6..80b8cc3d1 100644 --- a/src/alloy/frontend/ppc/ppc_instr.h +++ b/src/alloy/frontend/ppc/ppc_instr.h @@ -15,81 +15,73 @@ #include #include - namespace alloy { namespace frontend { namespace ppc { - // TODO(benvanik): rename these typedef enum { - kXEPPCInstrFormatI = 0, - kXEPPCInstrFormatB = 1, - kXEPPCInstrFormatSC = 2, - kXEPPCInstrFormatD = 3, - kXEPPCInstrFormatDS = 4, - kXEPPCInstrFormatX = 5, - kXEPPCInstrFormatXL = 6, - kXEPPCInstrFormatXFX = 7, - kXEPPCInstrFormatXFL = 8, - kXEPPCInstrFormatXS = 9, - kXEPPCInstrFormatXO = 10, - kXEPPCInstrFormatA = 11, - kXEPPCInstrFormatM = 12, - kXEPPCInstrFormatMD = 13, - kXEPPCInstrFormatMDS = 14, - kXEPPCInstrFormatVXA = 15, - kXEPPCInstrFormatVX = 16, - kXEPPCInstrFormatVXR = 17, - kXEPPCInstrFormatVX128 = 18, - kXEPPCInstrFormatVX128_1 = 19, - kXEPPCInstrFormatVX128_2 = 20, - kXEPPCInstrFormatVX128_3 = 21, - kXEPPCInstrFormatVX128_4 = 22, - kXEPPCInstrFormatVX128_5 = 23, - kXEPPCInstrFormatVX128_P = 24, - kXEPPCInstrFormatVX128_R = 25, - kXEPPCInstrFormatXDSS = 26, + kXEPPCInstrFormatI = 0, + kXEPPCInstrFormatB = 1, + kXEPPCInstrFormatSC = 2, + kXEPPCInstrFormatD = 3, + kXEPPCInstrFormatDS = 4, + kXEPPCInstrFormatX = 5, + kXEPPCInstrFormatXL = 6, + kXEPPCInstrFormatXFX = 7, + kXEPPCInstrFormatXFL = 8, + kXEPPCInstrFormatXS = 9, + kXEPPCInstrFormatXO = 10, + kXEPPCInstrFormatA = 11, + kXEPPCInstrFormatM = 12, + kXEPPCInstrFormatMD = 13, + kXEPPCInstrFormatMDS = 14, + kXEPPCInstrFormatVXA = 15, + kXEPPCInstrFormatVX = 16, + kXEPPCInstrFormatVXR = 17, + kXEPPCInstrFormatVX128 = 18, + kXEPPCInstrFormatVX128_1 = 19, + kXEPPCInstrFormatVX128_2 = 20, + kXEPPCInstrFormatVX128_3 = 21, + kXEPPCInstrFormatVX128_4 = 22, + kXEPPCInstrFormatVX128_5 = 23, + kXEPPCInstrFormatVX128_P = 24, + kXEPPCInstrFormatVX128_R = 25, + kXEPPCInstrFormatXDSS = 26, } xe_ppc_instr_format_e; typedef enum { - kXEPPCInstrMaskVXR = 0xFC0003FF, - kXEPPCInstrMaskVXA = 0xFC00003F, - kXEPPCInstrMaskVX128 = 0xFC0003D0, - kXEPPCInstrMaskVX128_1 = 0xFC0007F3, - kXEPPCInstrMaskVX128_2 = 0xFC000210, - kXEPPCInstrMaskVX128_3 = 0xFC0007F0, - kXEPPCInstrMaskVX128_4 = 0xFC000730, - kXEPPCInstrMaskVX128_5 = 0xFC000010, - kXEPPCInstrMaskVX128_P = 0xFC000630, - kXEPPCInstrMaskVX128_R = 0xFC000390, + kXEPPCInstrMaskVXR = 0xFC0003FF, + kXEPPCInstrMaskVXA = 0xFC00003F, + kXEPPCInstrMaskVX128 = 0xFC0003D0, + kXEPPCInstrMaskVX128_1 = 0xFC0007F3, + kXEPPCInstrMaskVX128_2 = 0xFC000210, + kXEPPCInstrMaskVX128_3 = 0xFC0007F0, + kXEPPCInstrMaskVX128_4 = 0xFC000730, + kXEPPCInstrMaskVX128_5 = 0xFC000010, + kXEPPCInstrMaskVX128_P = 0xFC000630, + kXEPPCInstrMaskVX128_R = 0xFC000390, } xe_ppc_instr_mask_e; typedef enum { - kXEPPCInstrTypeGeneral = (1 << 0), - kXEPPCInstrTypeBranch = (1 << 1), - kXEPPCInstrTypeBranchCond = kXEPPCInstrTypeBranch | (1 << 2), + kXEPPCInstrTypeGeneral = (1 << 0), + kXEPPCInstrTypeBranch = (1 << 1), + kXEPPCInstrTypeBranchCond = kXEPPCInstrTypeBranch | (1 << 2), kXEPPCInstrTypeBranchAlways = kXEPPCInstrTypeBranch | (1 << 3), - kXEPPCInstrTypeSyscall = (1 << 4), + kXEPPCInstrTypeSyscall = (1 << 4), } xe_ppc_instr_type_e; typedef enum { - kXEPPCInstrFlagReserved = 0, + kXEPPCInstrFlagReserved = 0, } xe_ppc_instr_flag_e; - class InstrType; - -static inline int64_t XEEXTS16(uint32_t v) { - return (int64_t)((int16_t)v); -} +static inline int64_t XEEXTS16(uint32_t v) { return (int64_t)((int16_t)v); } static inline int64_t XEEXTS26(uint32_t v) { return (int64_t)(v & 0x02000000 ? (int32_t)v | 0xFC000000 : (int32_t)(v)); } -static inline uint64_t XEEXTZ16(uint32_t v) { - return (uint64_t)((uint16_t)v); -} +static inline uint64_t XEEXTZ16(uint32_t v) { return (uint64_t)((uint16_t)v); } static inline uint64_t XEMASK(uint32_t mstart, uint32_t mstop) { // if mstart ≤ mstop then // mask[mstart:mstop] = ones @@ -105,289 +97,338 @@ static inline uint64_t XEMASK(uint32_t mstart, uint32_t mstop) { return mstart <= mstop ? value : ~value; } - typedef struct { - InstrType* type; - uint64_t address; + InstrType* type; + uint64_t address; union { - uint32_t code; + uint32_t code; // kXEPPCInstrFormatI struct { - uint32_t LK : 1; - uint32_t AA : 1; - uint32_t LI : 24; - uint32_t : 6; + uint32_t LK : 1; + uint32_t AA : 1; + uint32_t LI : 24; + uint32_t: + 6; } I; // kXEPPCInstrFormatB struct { - uint32_t LK : 1; - uint32_t AA : 1; - uint32_t BD : 14; - uint32_t BI : 5; - uint32_t BO : 5; - uint32_t : 6; + uint32_t LK : 1; + uint32_t AA : 1; + uint32_t BD : 14; + uint32_t BI : 5; + uint32_t BO : 5; + uint32_t: + 6; } B; // kXEPPCInstrFormatSC // kXEPPCInstrFormatD struct { - uint32_t DS : 16; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t DS : 16; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } D; // kXEPPCInstrFormatDS struct { - uint32_t : 2; - uint32_t DS : 14; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t: + 2; + uint32_t DS : 14; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } DS; // kXEPPCInstrFormatX struct { - uint32_t Rc : 1; - uint32_t : 10; - uint32_t RB : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t: + 10; + uint32_t RB : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } X; // kXEPPCInstrFormatXL struct { - uint32_t LK : 1; - uint32_t : 10; - uint32_t BB : 5; - uint32_t BI : 5; - uint32_t BO : 5; - uint32_t : 6; + uint32_t LK : 1; + uint32_t: + 10; + uint32_t BB : 5; + uint32_t BI : 5; + uint32_t BO : 5; + uint32_t: + 6; } XL; // kXEPPCInstrFormatXFX struct { - uint32_t : 1; - uint32_t : 10; - uint32_t spr : 10; - uint32_t RT : 5; - uint32_t : 6; + uint32_t: + 1; + uint32_t: + 10; + uint32_t spr : 10; + uint32_t RT : 5; + uint32_t: + 6; } XFX; // kXEPPCInstrFormatXFL struct { - uint32_t Rc : 1; - uint32_t : 10; - uint32_t RB : 5; - uint32_t W : 1; - uint32_t FM : 8; - uint32_t L : 1; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t: + 10; + uint32_t RB : 5; + uint32_t W : 1; + uint32_t FM : 8; + uint32_t L : 1; + uint32_t: + 6; } XFL; // kXEPPCInstrFormatXS struct { - uint32_t Rc : 1; - uint32_t SH5 : 1; - uint32_t : 9; - uint32_t SH : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t SH5 : 1; + uint32_t: + 9; + uint32_t SH : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } XS; // kXEPPCInstrFormatXO struct { - uint32_t Rc : 1; - uint32_t : 9; - uint32_t OE : 1; - uint32_t RB : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t: + 9; + uint32_t OE : 1; + uint32_t RB : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } XO; // kXEPPCInstrFormatA struct { - uint32_t Rc : 1; - uint32_t XO : 5; - uint32_t FRC : 5; - uint32_t FRB : 5; - uint32_t FRA : 5; - uint32_t FRT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t XO : 5; + uint32_t FRC : 5; + uint32_t FRB : 5; + uint32_t FRA : 5; + uint32_t FRT : 5; + uint32_t: + 6; } A; // kXEPPCInstrFormatM struct { - uint32_t Rc : 1; - uint32_t ME : 5; - uint32_t MB : 5; - uint32_t SH : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t ME : 5; + uint32_t MB : 5; + uint32_t SH : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } M; // kXEPPCInstrFormatMD struct { - uint32_t Rc : 1; - uint32_t SH5 : 1; - uint32_t idx : 3; - uint32_t MB5 : 1; - uint32_t MB : 5; - uint32_t SH : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t SH5 : 1; + uint32_t idx : 3; + uint32_t MB5 : 1; + uint32_t MB : 5; + uint32_t SH : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } MD; // kXEPPCInstrFormatMDS struct { - uint32_t Rc : 1; - uint32_t idx : 4; - uint32_t MB5 : 1; - uint32_t MB : 5; - uint32_t RB : 5; - uint32_t RA : 5; - uint32_t RT : 5; - uint32_t : 6; + uint32_t Rc : 1; + uint32_t idx : 4; + uint32_t MB5 : 1; + uint32_t MB : 5; + uint32_t RB : 5; + uint32_t RA : 5; + uint32_t RT : 5; + uint32_t: + 6; } MDS; // kXEPPCInstrFormatVXA struct { - uint32_t : 6; - uint32_t VC : 5; - uint32_t VB : 5; - uint32_t VA : 5; - uint32_t VD : 5; - uint32_t : 6; + uint32_t: + 6; + uint32_t VC : 5; + uint32_t VB : 5; + uint32_t VA : 5; + uint32_t VD : 5; + uint32_t: + 6; } VXA; // kXEPPCInstrFormatVX struct { - uint32_t : 11; - uint32_t VB : 5; - uint32_t VA : 5; - uint32_t VD : 5; - uint32_t : 6; + uint32_t: + 11; + uint32_t VB : 5; + uint32_t VA : 5; + uint32_t VD : 5; + uint32_t: + 6; } VX; // kXEPPCInstrFormatVXR struct { - uint32_t : 10; - uint32_t Rc : 1; - uint32_t VB : 5; - uint32_t VA : 5; - uint32_t VD : 5; - uint32_t : 6; + uint32_t: + 10; + uint32_t Rc : 1; + uint32_t VB : 5; + uint32_t VA : 5; + uint32_t VD : 5; + uint32_t: + 6; } VXR; // kXEPPCInstrFormatVX128 struct { // VD128 = VD128l | (VD128h << 5) // VA128 = VA128l | (VA128h << 5) | (VA128H << 6) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 1; - uint32_t VA128h : 1; - uint32_t : 4; - uint32_t VA128H : 1; - uint32_t VB128l : 5; - uint32_t VA128l : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 1; + uint32_t VA128h : 1; + uint32_t: + 4; + uint32_t VA128H : 1; + uint32_t VB128l : 5; + uint32_t VA128l : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128; // kXEPPCInstrFormatVX128_1 struct { - // VD128 = VD128l | (VD128h << 5) - uint32_t : 2; - uint32_t VD128h : 2; - uint32_t : 7; - uint32_t RB : 5; - uint32_t RA : 5; - uint32_t VD128l : 5; - uint32_t : 6; + // VD128 = VD128l | (VD128h << 5) + uint32_t: + 2; + uint32_t VD128h : 2; + uint32_t: + 7; + uint32_t RB : 5; + uint32_t RA : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_1; // kXEPPCInstrFormatVX128_2 struct { // VD128 = VD128l | (VD128h << 5) // VA128 = VA128l | (VA128h << 5) | (VA128H << 6) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 1; - uint32_t VA128h : 1; - uint32_t VC : 3; - uint32_t : 1; - uint32_t VA128H : 1; - uint32_t VB128l : 5; - uint32_t VA128l : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 1; + uint32_t VA128h : 1; + uint32_t VC : 3; + uint32_t: + 1; + uint32_t VA128H : 1; + uint32_t VB128l : 5; + uint32_t VA128l : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_2; // kXEPPCInstrFormatVX128_3 struct { // VD128 = VD128l | (VD128h << 5) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 7; - uint32_t VB128l : 5; - uint32_t IMM : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 7; + uint32_t VB128l : 5; + uint32_t IMM : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_3; // kXEPPCInstrFormatVX128_4 struct { // VD128 = VD128l | (VD128h << 5) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 2; - uint32_t z : 2; - uint32_t : 3; - uint32_t VB128l : 5; - uint32_t IMM : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 2; + uint32_t z : 2; + uint32_t: + 3; + uint32_t VB128l : 5; + uint32_t IMM : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_4; // kXEPPCInstrFormatVX128_5 struct { // VD128 = VD128l | (VD128h << 5) // VA128 = VA128l | (VA128h << 5) | (VA128H << 6) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 1; - uint32_t VA128h : 1; - uint32_t SH : 4; - uint32_t VA128H : 1; - uint32_t VB128l : 5; - uint32_t VA128l : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 1; + uint32_t VA128h : 1; + uint32_t SH : 4; + uint32_t VA128H : 1; + uint32_t VB128l : 5; + uint32_t VA128l : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_5; // kXEPPCInstrFormatVX128_P struct { // VD128 = VD128l | (VD128h << 5) // VB128 = VB128l | (VB128h << 5) // PERM = PERMl | (PERMh << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 2; - uint32_t PERMh : 3; - uint32_t : 2; - uint32_t VB128l : 5; - uint32_t PERMl : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 2; + uint32_t PERMh : 3; + uint32_t: + 2; + uint32_t VB128l : 5; + uint32_t PERMl : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_P; // kXEPPCInstrFormatVX128_R struct { // VD128 = VD128l | (VD128h << 5) // VA128 = VA128l | (VA128h << 5) | (VA128H << 6) // VB128 = VB128l | (VB128h << 5) - uint32_t VB128h : 2; - uint32_t VD128h : 2; - uint32_t : 1; - uint32_t VA128h : 1; - uint32_t Rc : 1; - uint32_t : 3; - uint32_t VA128H : 1; - uint32_t VB128l : 5; - uint32_t VA128l : 5; - uint32_t VD128l : 5; - uint32_t : 6; + uint32_t VB128h : 2; + uint32_t VD128h : 2; + uint32_t: + 1; + uint32_t VA128h : 1; + uint32_t Rc : 1; + uint32_t: + 3; + uint32_t VA128H : 1; + uint32_t VB128l : 5; + uint32_t VA128l : 5; + uint32_t VD128l : 5; + uint32_t: + 6; } VX128_R; // kXEPPCInstrFormatXDSS struct { @@ -395,31 +436,29 @@ typedef struct { }; } InstrData; - typedef struct { enum RegisterSet { kXER, kLR, kCTR, - kCR, // 0-7 + kCR, // 0-7 kFPSCR, - kGPR, // 0-31 - kFPR, // 0-31 - kVMX, // 0-127 + kGPR, // 0-31 + kFPR, // 0-31 + kVMX, // 0-127 }; enum Access { - kRead = 1 << 0, - kWrite = 1 << 1, - kReadWrite = kRead | kWrite, + kRead = 1 << 0, + kWrite = 1 << 1, + kReadWrite = kRead | kWrite, }; RegisterSet set; - uint32_t ordinal; - Access access; + uint32_t ordinal; + Access access; } InstrRegister; - typedef struct { enum OperandType { kRegister, @@ -431,30 +470,34 @@ typedef struct { union { InstrRegister reg; struct { - bool is_signed; - uint64_t value; - size_t width; + bool is_signed; + uint64_t value; + size_t width; } imm; }; void Dump(std::string& out_str); } InstrOperand; - class InstrAccessBits { -public: - InstrAccessBits() : - spr(0), cr(0), gpr(0), fpr(0), - vr31_0(0), vr63_32(0), vr95_64(0), vr127_96(0) { - } + public: + InstrAccessBits() + : spr(0), + cr(0), + gpr(0), + fpr(0), + vr31_0(0), + vr63_32(0), + vr95_64(0), + vr127_96(0) {} // Bitmasks derived from the accesses to registers. // Format is 2 bits for each register, even bits indicating reads and odds // indicating writes. - uint64_t spr; // fpcsr/ctr/lr/xer - uint64_t cr; // cr7/6/5/4/3/2/1/0 - uint64_t gpr; // r31-0 - uint64_t fpr; // f31-0 + uint64_t spr; // fpcsr/ctr/lr/xer + uint64_t cr; // cr7/6/5/4/3/2/1/0 + uint64_t gpr; // r31-0 + uint64_t fpr; // f31-0 uint64_t vr31_0; uint64_t vr63_32; uint64_t vr95_64; @@ -466,21 +509,20 @@ public: void Dump(std::string& out_str); }; - class InstrDisasm { -public: + public: enum Flags { - kOE = 1 << 0, - kRc = 1 << 1, - kCA = 1 << 2, - kLR = 1 << 4, - kFP = 1 << 5, - kVMX = 1 << 6, + kOE = 1 << 0, + kRc = 1 << 1, + kCA = 1 << 2, + kLR = 1 << 4, + kFP = 1 << 5, + kVMX = 1 << 6, }; - const char* name; - const char* info; - uint32_t flags; + const char* name; + const char* info; + uint32_t flags; void Init(const char* name, const char* info, uint32_t flags); void AddLR(InstrRegister::Access access); @@ -496,32 +538,27 @@ public: void Dump(std::string& out_str, size_t pad = 13); }; - typedef void (*InstrDisasmFn)(InstrData& i, StringBuffer* str); typedef void* InstrEmitFn; - class InstrType { -public: - uint32_t opcode; - uint32_t opcode_mask; // Only used for certain opcodes (altivec, etc). - uint32_t format; // xe_ppc_instr_format_e - uint32_t type; // xe_ppc_instr_type_e - uint32_t flags; // xe_ppc_instr_flag_e + public: + uint32_t opcode; + uint32_t opcode_mask; // Only used for certain opcodes (altivec, etc). + uint32_t format; // xe_ppc_instr_format_e + uint32_t type; // xe_ppc_instr_type_e + uint32_t flags; // xe_ppc_instr_flag_e InstrDisasmFn disasm; - char name[16]; + char name[16]; - InstrEmitFn emit; + InstrEmitFn emit; }; InstrType* GetInstrType(uint32_t code); int RegisterInstrEmit(uint32_t code, InstrEmitFn emit); - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_INSTR_H_ - diff --git a/src/alloy/frontend/ppc/ppc_instr_tables.h b/src/alloy/frontend/ppc/ppc_instr_tables.h index e0ce4640e..998b31039 100644 --- a/src/alloy/frontend/ppc/ppc_instr_tables.h +++ b/src/alloy/frontend/ppc/ppc_instr_tables.h @@ -12,7 +12,6 @@ #include - namespace alloy { namespace frontend { namespace ppc { @@ -90,9 +89,8 @@ void Disasm_vspltisw(InstrData& i, StringBuffer* str); namespace tables { - -static InstrType** instr_table_prep( - InstrType* unprep, int unprep_count, int a, int b) { +static InstrType** instr_table_prep(InstrType* unprep, int unprep_count, int a, + int b) { int prep_count = (int)pow(2.0, b - a + 1); InstrType** prep = (InstrType**)xe_calloc(prep_count * sizeof(void*)); for (int n = 0; n < unprep_count; n++) { @@ -102,8 +100,8 @@ static InstrType** instr_table_prep( return prep; } -static InstrType** instr_table_prep_63( - InstrType* unprep, int unprep_count, int a, int b) { +static InstrType** instr_table_prep_63(InstrType* unprep, int unprep_count, + int a, int b) { // Special handling for A format instructions. int prep_count = (int)pow(2.0, b - a + 1); InstrType** prep = (InstrType**)xe_calloc(prep_count * sizeof(void*)); @@ -121,19 +119,14 @@ static InstrType** instr_table_prep_63( return prep; } - -#define EMPTY(slot) {0} -#define INSTRUCTION(name, opcode, format, type, disasm_fn, descr) { \ - opcode, \ - 0, \ - kXEPPCInstrFormat##format, \ - kXEPPCInstrType##type, \ - 0, \ - Disasm_##disasm_fn, \ - #name, \ -} -#define FLAG(t) kXEPPCInstrFlag##t - +#define EMPTY(slot) \ + { 0 } +#define INSTRUCTION(name, opcode, format, type, disasm_fn, descr) \ + { \ + opcode, 0, kXEPPCInstrFormat##format, kXEPPCInstrType##type, 0, \ + Disasm_##disasm_fn, #name, \ + } +#define FLAG(t) kXEPPCInstrFlag##t // This table set is constructed from: // pem_64bit_v3.0.2005jul15.pdf, A.2 @@ -141,340 +134,559 @@ static InstrType** instr_table_prep_63( // Opcode = 4, index = bits 11-0 (6) static InstrType instr_table_4_unprep[] = { - // TODO: all of the vector ops - INSTRUCTION(mfvscr, 0x10000604, VX , General , 0 , "Move from Vector Status and Control Register"), - INSTRUCTION(mtvscr, 0x10000644, VX , General , 0 , "Move to Vector Status and Control Register"), - INSTRUCTION(vaddcuw, 0x10000180, VX , General , 0 , "Vector Add Carryout Unsigned Word"), - INSTRUCTION(vaddfp, 0x1000000A, VX , General , VX_VD_VA_VB , "Vector Add Floating Point"), - INSTRUCTION(vaddsbs, 0x10000300, VX , General , 0 , "Vector Add Signed Byte Saturate"), - INSTRUCTION(vaddshs, 0x10000340, VX , General , 0 , "Vector Add Signed Half Word Saturate"), - INSTRUCTION(vaddsws, 0x10000380, VX , General , 0 , "Vector Add Signed Word Saturate"), - INSTRUCTION(vaddubm, 0x10000000, VX , General , 0 , "Vector Add Unsigned Byte Modulo"), - INSTRUCTION(vaddubs, 0x10000200, VX , General , 0 , "Vector Add Unsigned Byte Saturate"), - INSTRUCTION(vadduhm, 0x10000040, VX , General , 0 , "Vector Add Unsigned Half Word Modulo"), - INSTRUCTION(vadduhs, 0x10000240, VX , General , 0 , "Vector Add Unsigned Half Word Saturate"), - INSTRUCTION(vadduwm, 0x10000080, VX , General , 0 , "Vector Add Unsigned Word Modulo"), - INSTRUCTION(vadduws, 0x10000280, VX , General , 0 , "Vector Add Unsigned Word Saturate"), - INSTRUCTION(vand, 0x10000404, VX , General , VX_VD_VA_VB , "Vector Logical AND"), - INSTRUCTION(vandc, 0x10000444, VX , General , VX_VD_VA_VB , "Vector Logical AND with Complement"), - INSTRUCTION(vavgsb, 0x10000502, VX , General , 0 , "Vector Average Signed Byte"), - INSTRUCTION(vavgsh, 0x10000542, VX , General , 0 , "Vector Average Signed Half Word"), - INSTRUCTION(vavgsw, 0x10000582, VX , General , 0 , "Vector Average Signed Word"), - INSTRUCTION(vavgub, 0x10000402, VX , General , 0 , "Vector Average Unsigned Byte"), - INSTRUCTION(vavguh, 0x10000442, VX , General , 0 , "Vector Average Unsigned Half Word"), - INSTRUCTION(vavguw, 0x10000482, VX , General , 0 , "Vector Average Unsigned Word"), - INSTRUCTION(vcfsx, 0x1000034A, VX , General , 0 , "Vector Convert from Signed Fixed-Point Word"), - INSTRUCTION(vcfux, 0x1000030A, VX , General , 0 , "Vector Convert from Unsigned Fixed-Point Word"), - INSTRUCTION(vctsxs, 0x100003CA, VX , General , 0 , "Vector Convert to Signed Fixed-Point Word Saturate"), - INSTRUCTION(vctuxs, 0x1000038A, VX , General , 0 , "Vector Convert to Unsigned Fixed-Point Word Saturate"), - INSTRUCTION(vexptefp, 0x1000018A, VX , General , 0 , "Vector 2 Raised to the Exponent Estimate Floating Point"), - INSTRUCTION(vlogefp, 0x100001CA, VX , General , 0 , "Vector Log2 Estimate Floating Point"), - INSTRUCTION(vmaxfp, 0x1000040A, VX , General , 0 , "Vector Maximum Floating Point"), - INSTRUCTION(vmaxsb, 0x10000102, VX , General , 0 , "Vector Maximum Signed Byte"), - INSTRUCTION(vmaxsh, 0x10000142, VX , General , 0 , "Vector Maximum Signed Half Word"), - INSTRUCTION(vmaxsw, 0x10000182, VX , General , 0 , "Vector Maximum Signed Word"), - INSTRUCTION(vmaxub, 0x10000002, VX , General , 0 , "Vector Maximum Unsigned Byte"), - INSTRUCTION(vmaxuh, 0x10000042, VX , General , 0 , "Vector Maximum Unsigned Half Word"), - INSTRUCTION(vmaxuw, 0x10000082, VX , General , 0 , "Vector Maximum Unsigned Word"), - INSTRUCTION(vminfp, 0x1000044A, VX , General , 0 , "Vector Minimum Floating Point"), - INSTRUCTION(vminsb, 0x10000302, VX , General , 0 , "Vector Minimum Signed Byte"), - INSTRUCTION(vminsh, 0x10000342, VX , General , 0 , "Vector Minimum Signed Half Word"), - INSTRUCTION(vminsw, 0x10000382, VX , General , 0 , "Vector Minimum Signed Word"), - INSTRUCTION(vminub, 0x10000202, VX , General , 0 , "Vector Minimum Unsigned Byte"), - INSTRUCTION(vminuh, 0x10000242, VX , General , 0 , "Vector Minimum Unsigned Half Word"), - INSTRUCTION(vminuw, 0x10000282, VX , General , 0 , "Vector Minimum Unsigned Word"), - INSTRUCTION(vmrghb, 0x1000000C, VX , General , 0 , "Vector Merge High Byte"), - INSTRUCTION(vmrghh, 0x1000004C, VX , General , 0 , "Vector Merge High Half Word"), - INSTRUCTION(vmrghw, 0x1000008C, VX , General , 0 , "Vector Merge High Word"), - INSTRUCTION(vmrglb, 0x1000010C, VX , General , 0 , "Vector Merge Low Byte"), - INSTRUCTION(vmrglh, 0x1000014C, VX , General , 0 , "Vector Merge Low Half Word"), - INSTRUCTION(vmrglw, 0x1000018C, VX , General , 0 , "Vector Merge Low Word"), - INSTRUCTION(vmulesb, 0x10000308, VX , General , 0 , "Vector Multiply Even Signed Byte"), - INSTRUCTION(vmulesh, 0x10000348, VX , General , 0 , "Vector Multiply Even Signed Half Word"), - INSTRUCTION(vmuleub, 0x10000208, VX , General , 0 , "Vector Multiply Even Unsigned Byte"), - INSTRUCTION(vmuleuh, 0x10000248, VX , General , 0 , "Vector Multiply Even Unsigned Half Word"), - INSTRUCTION(vmulosb, 0x10000108, VX , General , 0 , "Vector Multiply Odd Signed Byte"), - INSTRUCTION(vmulosh, 0x10000148, VX , General , 0 , "Vector Multiply Odd Signed Half Word"), - INSTRUCTION(vmuloub, 0x10000008, VX , General , 0 , "Vector Multiply Odd Unsigned Byte"), - INSTRUCTION(vmulouh, 0x10000048, VX , General , 0 , "Vector Multiply Odd Unsigned Half Word"), - INSTRUCTION(vnor, 0x10000504, VX , General , VX_VD_VA_VB , "Vector Logical NOR"), - INSTRUCTION(vor, 0x10000484, VX , General , VX_VD_VA_VB , "Vector Logical OR"), - INSTRUCTION(vpkpx, 0x1000030E, VX , General , 0 , "Vector Pack Pixel"), - INSTRUCTION(vpkshss, 0x1000018E, VX , General , 0 , "Vector Pack Signed Half Word Signed Saturate"), - INSTRUCTION(vpkshus, 0x1000010E, VX , General , 0 , "Vector Pack Signed Half Word Unsigned Saturate"), - INSTRUCTION(vpkswss, 0x100001CE, VX , General , 0 , "Vector Pack Signed Word Signed Saturate"), - INSTRUCTION(vpkswus, 0x1000014E, VX , General , 0 , "Vector Pack Signed Word Unsigned Saturate"), - INSTRUCTION(vpkuhum, 0x1000000E, VX , General , 0 , "Vector Pack Unsigned Half Word Unsigned Modulo"), - INSTRUCTION(vpkuhus, 0x1000008E, VX , General , 0 , "Vector Pack Unsigned Half Word Unsigned Saturate"), - INSTRUCTION(vpkuwum, 0x1000004E, VX , General , 0 , "Vector Pack Unsigned Word Unsigned Modulo"), - INSTRUCTION(vpkuwus, 0x100000CE, VX , General , 0 , "Vector Pack Unsigned Word Unsigned Saturate"), - INSTRUCTION(vrefp, 0x1000010A, VX , General , 0 , "Vector Reciprocal Estimate Floating Point"), - INSTRUCTION(vrfim, 0x100002CA, VX , General , 0 , "Vector Round to Floating-Point Integer toward -Infinity"), - INSTRUCTION(vrfin, 0x1000020A, VX , General , 0 , "Vector Round to Floating-Point Integer Nearest"), - INSTRUCTION(vrfip, 0x1000028A, VX , General , 0 , "Vector Round to Floating-Point Integer toward +Infinity"), - INSTRUCTION(vrfiz, 0x1000024A, VX , General , 0 , "Vector Round to Floating-Point Integer toward Zero"), - INSTRUCTION(vrlb, 0x10000004, VX , General , 0 , "Vector Rotate Left Integer Byte"), - INSTRUCTION(vrlh, 0x10000044, VX , General , 0 , "Vector Rotate Left Integer Half Word"), - INSTRUCTION(vrlw, 0x10000084, VX , General , 0 , "Vector Rotate Left Integer Word"), - INSTRUCTION(vrsqrtefp, 0x1000014A, VX , General , 0 , "Vector Reciprocal Square Root Estimate Floating Point"), - INSTRUCTION(vsl, 0x100001C4, VX , General , 0 , "Vector Shift Left"), - INSTRUCTION(vslb, 0x10000104, VX , General , VX_VD_VA_VB , "Vector Shift Left Integer Byte"), - INSTRUCTION(vslh, 0x10000144, VX , General , 0 , "Vector Shift Left Integer Half Word"), - INSTRUCTION(vslo, 0x1000040C, VX , General , 0 , "Vector Shift Left by Octet"), - INSTRUCTION(vslw, 0x10000184, VX , General , 0 , "Vector Shift Left Integer Word"), - INSTRUCTION(vspltb, 0x1000020C, VX , General , vspltb , "Vector Splat Byte"), - INSTRUCTION(vsplth, 0x1000024C, VX , General , vsplth , "Vector Splat Half Word"), - INSTRUCTION(vspltisb, 0x1000030C, VX , General , vspltisb , "Vector Splat Immediate Signed Byte"), - INSTRUCTION(vspltish, 0x1000034C, VX , General , vspltish , "Vector Splat Immediate Signed Half Word"), - INSTRUCTION(vspltisw, 0x1000038C, VX , General , vspltisw , "Vector Splat Immediate Signed Word"), - INSTRUCTION(vspltw, 0x1000028C, VX , General , vspltw , "Vector Splat Word"), - INSTRUCTION(vsr, 0x100002C4, VX , General , VX_VD_VA_VB , "Vector Shift Right"), - INSTRUCTION(vsrab, 0x10000304, VX , General , VX_VD_VA_VB , "Vector Shift Right Algebraic Byte"), - INSTRUCTION(vsrah, 0x10000344, VX , General , VX_VD_VA_VB , "Vector Shift Right Algebraic Half Word"), - INSTRUCTION(vsraw, 0x10000384, VX , General , VX_VD_VA_VB , "Vector Shift Right Algebraic Word"), - INSTRUCTION(vsrb, 0x10000204, VX , General , VX_VD_VA_VB , "Vector Shift Right Byte"), - INSTRUCTION(vsrh, 0x10000244, VX , General , VX_VD_VA_VB , "Vector Shift Right Half Word"), - INSTRUCTION(vsro, 0x1000044C, VX , General , VX_VD_VA_VB , "Vector Shift Right Octet"), - INSTRUCTION(vsrw, 0x10000284, VX , General , VX_VD_VA_VB , "Vector Shift Right Word"), - INSTRUCTION(vsubcuw, 0x10000580, VX , General , 0 , "Vector Subtract Carryout Unsigned Word"), - INSTRUCTION(vsubfp, 0x1000004A, VX , General , 0 , "Vector Subtract Floating Point"), - INSTRUCTION(vsubsbs, 0x10000700, VX , General , 0 , "Vector Subtract Signed Byte Saturate"), - INSTRUCTION(vsubshs, 0x10000740, VX , General , 0 , "Vector Subtract Signed Half Word Saturate"), - INSTRUCTION(vsubsws, 0x10000780, VX , General , 0 , "Vector Subtract Signed Word Saturate"), - INSTRUCTION(vsububm, 0x10000400, VX , General , 0 , "Vector Subtract Unsigned Byte Modulo"), - INSTRUCTION(vsububs, 0x10000600, VX , General , 0 , "Vector Subtract Unsigned Byte Saturate"), - INSTRUCTION(vsubuhm, 0x10000440, VX , General , 0 , "Vector Subtract Unsigned Half Word Modulo"), - INSTRUCTION(vsubuhs, 0x10000640, VX , General , 0 , "Vector Subtract Unsigned Half Word Saturate"), - INSTRUCTION(vsubuwm, 0x10000480, VX , General , 0 , "Vector Subtract Unsigned Word Modulo"), - INSTRUCTION(vsubuws, 0x10000680, VX , General , 0 , "Vector Subtract Unsigned Word Saturate"), - INSTRUCTION(vsumsws, 0x10000788, VX , General , 0 , "Vector Sum Across Signed Word Saturate"), - INSTRUCTION(vsum2sws, 0x10000688, VX , General , 0 , "Vector Sum Across Partial (1/2) Signed Word Saturate"), - INSTRUCTION(vsum4sbs, 0x10000708, VX , General , 0 , "Vector Sum Across Partial (1/4) Signed Byte Saturate"), - INSTRUCTION(vsum4shs, 0x10000648, VX , General , 0 , "Vector Sum Across Partial (1/4) Signed Half Word Saturate"), - INSTRUCTION(vsum4ubs, 0x10000608, VX , General , 0 , "Vector Sum Across Partial (1/4) Unsigned Byte Saturate"), - INSTRUCTION(vupkhpx, 0x1000034E, VX , General , 0 , "Vector Unpack High Pixel"), - INSTRUCTION(vupkhsb, 0x1000020E, VX , General , 0 , "Vector Unpack High Signed Byte"), - INSTRUCTION(vupkhsh, 0x1000024E, VX , General , 0 , "Vector Unpack High Signed Half Word"), - INSTRUCTION(vupklpx, 0x100003CE, VX , General , 0 , "Vector Unpack Low Pixel"), - INSTRUCTION(vupklsb, 0x1000028E, VX , General , 0 , "Vector Unpack Low Signed Byte"), - INSTRUCTION(vupklsh, 0x100002CE, VX , General , 0 , "Vector Unpack Low Signed Half Word"), - INSTRUCTION(vxor, 0x100004C4, VX , General , VX_VD_VA_VB , "Vector Logical XOR"), + // TODO: all of the vector ops + INSTRUCTION(mfvscr, 0x10000604, VX, General, 0, + "Move from Vector Status and Control Register"), + INSTRUCTION(mtvscr, 0x10000644, VX, General, 0, + "Move to Vector Status and Control Register"), + INSTRUCTION(vaddcuw, 0x10000180, VX, General, 0, + "Vector Add Carryout Unsigned Word"), + INSTRUCTION(vaddfp, 0x1000000A, VX, General, VX_VD_VA_VB, + "Vector Add Floating Point"), + INSTRUCTION(vaddsbs, 0x10000300, VX, General, 0, + "Vector Add Signed Byte Saturate"), + INSTRUCTION(vaddshs, 0x10000340, VX, General, 0, + "Vector Add Signed Half Word Saturate"), + INSTRUCTION(vaddsws, 0x10000380, VX, General, 0, + "Vector Add Signed Word Saturate"), + INSTRUCTION(vaddubm, 0x10000000, VX, General, 0, + "Vector Add Unsigned Byte Modulo"), + INSTRUCTION(vaddubs, 0x10000200, VX, General, 0, + "Vector Add Unsigned Byte Saturate"), + INSTRUCTION(vadduhm, 0x10000040, VX, General, 0, + "Vector Add Unsigned Half Word Modulo"), + INSTRUCTION(vadduhs, 0x10000240, VX, General, 0, + "Vector Add Unsigned Half Word Saturate"), + INSTRUCTION(vadduwm, 0x10000080, VX, General, 0, + "Vector Add Unsigned Word Modulo"), + INSTRUCTION(vadduws, 0x10000280, VX, General, 0, + "Vector Add Unsigned Word Saturate"), + INSTRUCTION(vand, 0x10000404, VX, General, VX_VD_VA_VB, + "Vector Logical AND"), + INSTRUCTION(vandc, 0x10000444, VX, General, VX_VD_VA_VB, + "Vector Logical AND with Complement"), + INSTRUCTION(vavgsb, 0x10000502, VX, General, 0, + "Vector Average Signed Byte"), + INSTRUCTION(vavgsh, 0x10000542, VX, General, 0, + "Vector Average Signed Half Word"), + INSTRUCTION(vavgsw, 0x10000582, VX, General, 0, + "Vector Average Signed Word"), + INSTRUCTION(vavgub, 0x10000402, VX, General, 0, + "Vector Average Unsigned Byte"), + INSTRUCTION(vavguh, 0x10000442, VX, General, 0, + "Vector Average Unsigned Half Word"), + INSTRUCTION(vavguw, 0x10000482, VX, General, 0, + "Vector Average Unsigned Word"), + INSTRUCTION(vcfsx, 0x1000034A, VX, General, 0, + "Vector Convert from Signed Fixed-Point Word"), + INSTRUCTION(vcfux, 0x1000030A, VX, General, 0, + "Vector Convert from Unsigned Fixed-Point Word"), + INSTRUCTION(vctsxs, 0x100003CA, VX, General, 0, + "Vector Convert to Signed Fixed-Point Word Saturate"), + INSTRUCTION(vctuxs, 0x1000038A, VX, General, 0, + "Vector Convert to Unsigned Fixed-Point Word Saturate"), + INSTRUCTION(vexptefp, 0x1000018A, VX, General, 0, + "Vector 2 Raised to the Exponent Estimate Floating Point"), + INSTRUCTION(vlogefp, 0x100001CA, VX, General, 0, + "Vector Log2 Estimate Floating Point"), + INSTRUCTION(vmaxfp, 0x1000040A, VX, General, 0, + "Vector Maximum Floating Point"), + INSTRUCTION(vmaxsb, 0x10000102, VX, General, 0, + "Vector Maximum Signed Byte"), + INSTRUCTION(vmaxsh, 0x10000142, VX, General, 0, + "Vector Maximum Signed Half Word"), + INSTRUCTION(vmaxsw, 0x10000182, VX, General, 0, + "Vector Maximum Signed Word"), + INSTRUCTION(vmaxub, 0x10000002, VX, General, 0, + "Vector Maximum Unsigned Byte"), + INSTRUCTION(vmaxuh, 0x10000042, VX, General, 0, + "Vector Maximum Unsigned Half Word"), + INSTRUCTION(vmaxuw, 0x10000082, VX, General, 0, + "Vector Maximum Unsigned Word"), + INSTRUCTION(vminfp, 0x1000044A, VX, General, 0, + "Vector Minimum Floating Point"), + INSTRUCTION(vminsb, 0x10000302, VX, General, 0, + "Vector Minimum Signed Byte"), + INSTRUCTION(vminsh, 0x10000342, VX, General, 0, + "Vector Minimum Signed Half Word"), + INSTRUCTION(vminsw, 0x10000382, VX, General, 0, + "Vector Minimum Signed Word"), + INSTRUCTION(vminub, 0x10000202, VX, General, 0, + "Vector Minimum Unsigned Byte"), + INSTRUCTION(vminuh, 0x10000242, VX, General, 0, + "Vector Minimum Unsigned Half Word"), + INSTRUCTION(vminuw, 0x10000282, VX, General, 0, + "Vector Minimum Unsigned Word"), + INSTRUCTION(vmrghb, 0x1000000C, VX, General, 0, "Vector Merge High Byte"), + INSTRUCTION(vmrghh, 0x1000004C, VX, General, 0, + "Vector Merge High Half Word"), + INSTRUCTION(vmrghw, 0x1000008C, VX, General, 0, "Vector Merge High Word"), + INSTRUCTION(vmrglb, 0x1000010C, VX, General, 0, "Vector Merge Low Byte"), + INSTRUCTION(vmrglh, 0x1000014C, VX, General, 0, + "Vector Merge Low Half Word"), + INSTRUCTION(vmrglw, 0x1000018C, VX, General, 0, "Vector Merge Low Word"), + INSTRUCTION(vmulesb, 0x10000308, VX, General, 0, + "Vector Multiply Even Signed Byte"), + INSTRUCTION(vmulesh, 0x10000348, VX, General, 0, + "Vector Multiply Even Signed Half Word"), + INSTRUCTION(vmuleub, 0x10000208, VX, General, 0, + "Vector Multiply Even Unsigned Byte"), + INSTRUCTION(vmuleuh, 0x10000248, VX, General, 0, + "Vector Multiply Even Unsigned Half Word"), + INSTRUCTION(vmulosb, 0x10000108, VX, General, 0, + "Vector Multiply Odd Signed Byte"), + INSTRUCTION(vmulosh, 0x10000148, VX, General, 0, + "Vector Multiply Odd Signed Half Word"), + INSTRUCTION(vmuloub, 0x10000008, VX, General, 0, + "Vector Multiply Odd Unsigned Byte"), + INSTRUCTION(vmulouh, 0x10000048, VX, General, 0, + "Vector Multiply Odd Unsigned Half Word"), + INSTRUCTION(vnor, 0x10000504, VX, General, VX_VD_VA_VB, + "Vector Logical NOR"), + INSTRUCTION(vor, 0x10000484, VX, General, VX_VD_VA_VB, "Vector Logical OR"), + INSTRUCTION(vpkpx, 0x1000030E, VX, General, 0, "Vector Pack Pixel"), + INSTRUCTION(vpkshss, 0x1000018E, VX, General, 0, + "Vector Pack Signed Half Word Signed Saturate"), + INSTRUCTION(vpkshus, 0x1000010E, VX, General, 0, + "Vector Pack Signed Half Word Unsigned Saturate"), + INSTRUCTION(vpkswss, 0x100001CE, VX, General, 0, + "Vector Pack Signed Word Signed Saturate"), + INSTRUCTION(vpkswus, 0x1000014E, VX, General, 0, + "Vector Pack Signed Word Unsigned Saturate"), + INSTRUCTION(vpkuhum, 0x1000000E, VX, General, 0, + "Vector Pack Unsigned Half Word Unsigned Modulo"), + INSTRUCTION(vpkuhus, 0x1000008E, VX, General, 0, + "Vector Pack Unsigned Half Word Unsigned Saturate"), + INSTRUCTION(vpkuwum, 0x1000004E, VX, General, 0, + "Vector Pack Unsigned Word Unsigned Modulo"), + INSTRUCTION(vpkuwus, 0x100000CE, VX, General, 0, + "Vector Pack Unsigned Word Unsigned Saturate"), + INSTRUCTION(vrefp, 0x1000010A, VX, General, 0, + "Vector Reciprocal Estimate Floating Point"), + INSTRUCTION(vrfim, 0x100002CA, VX, General, 0, + "Vector Round to Floating-Point Integer toward -Infinity"), + INSTRUCTION(vrfin, 0x1000020A, VX, General, 0, + "Vector Round to Floating-Point Integer Nearest"), + INSTRUCTION(vrfip, 0x1000028A, VX, General, 0, + "Vector Round to Floating-Point Integer toward +Infinity"), + INSTRUCTION(vrfiz, 0x1000024A, VX, General, 0, + "Vector Round to Floating-Point Integer toward Zero"), + INSTRUCTION(vrlb, 0x10000004, VX, General, 0, + "Vector Rotate Left Integer Byte"), + INSTRUCTION(vrlh, 0x10000044, VX, General, 0, + "Vector Rotate Left Integer Half Word"), + INSTRUCTION(vrlw, 0x10000084, VX, General, 0, + "Vector Rotate Left Integer Word"), + INSTRUCTION(vrsqrtefp, 0x1000014A, VX, General, 0, + "Vector Reciprocal Square Root Estimate Floating Point"), + INSTRUCTION(vsl, 0x100001C4, VX, General, 0, "Vector Shift Left"), + INSTRUCTION(vslb, 0x10000104, VX, General, VX_VD_VA_VB, + "Vector Shift Left Integer Byte"), + INSTRUCTION(vslh, 0x10000144, VX, General, 0, + "Vector Shift Left Integer Half Word"), + INSTRUCTION(vslo, 0x1000040C, VX, General, 0, "Vector Shift Left by Octet"), + INSTRUCTION(vslw, 0x10000184, VX, General, 0, + "Vector Shift Left Integer Word"), + INSTRUCTION(vspltb, 0x1000020C, VX, General, vspltb, "Vector Splat Byte"), + INSTRUCTION(vsplth, 0x1000024C, VX, General, vsplth, + "Vector Splat Half Word"), + INSTRUCTION(vspltisb, 0x1000030C, VX, General, vspltisb, + "Vector Splat Immediate Signed Byte"), + INSTRUCTION(vspltish, 0x1000034C, VX, General, vspltish, + "Vector Splat Immediate Signed Half Word"), + INSTRUCTION(vspltisw, 0x1000038C, VX, General, vspltisw, + "Vector Splat Immediate Signed Word"), + INSTRUCTION(vspltw, 0x1000028C, VX, General, vspltw, "Vector Splat Word"), + INSTRUCTION(vsr, 0x100002C4, VX, General, VX_VD_VA_VB, + "Vector Shift Right"), + INSTRUCTION(vsrab, 0x10000304, VX, General, VX_VD_VA_VB, + "Vector Shift Right Algebraic Byte"), + INSTRUCTION(vsrah, 0x10000344, VX, General, VX_VD_VA_VB, + "Vector Shift Right Algebraic Half Word"), + INSTRUCTION(vsraw, 0x10000384, VX, General, VX_VD_VA_VB, + "Vector Shift Right Algebraic Word"), + INSTRUCTION(vsrb, 0x10000204, VX, General, VX_VD_VA_VB, + "Vector Shift Right Byte"), + INSTRUCTION(vsrh, 0x10000244, VX, General, VX_VD_VA_VB, + "Vector Shift Right Half Word"), + INSTRUCTION(vsro, 0x1000044C, VX, General, VX_VD_VA_VB, + "Vector Shift Right Octet"), + INSTRUCTION(vsrw, 0x10000284, VX, General, VX_VD_VA_VB, + "Vector Shift Right Word"), + INSTRUCTION(vsubcuw, 0x10000580, VX, General, 0, + "Vector Subtract Carryout Unsigned Word"), + INSTRUCTION(vsubfp, 0x1000004A, VX, General, 0, + "Vector Subtract Floating Point"), + INSTRUCTION(vsubsbs, 0x10000700, VX, General, 0, + "Vector Subtract Signed Byte Saturate"), + INSTRUCTION(vsubshs, 0x10000740, VX, General, 0, + "Vector Subtract Signed Half Word Saturate"), + INSTRUCTION(vsubsws, 0x10000780, VX, General, 0, + "Vector Subtract Signed Word Saturate"), + INSTRUCTION(vsububm, 0x10000400, VX, General, 0, + "Vector Subtract Unsigned Byte Modulo"), + INSTRUCTION(vsububs, 0x10000600, VX, General, 0, + "Vector Subtract Unsigned Byte Saturate"), + INSTRUCTION(vsubuhm, 0x10000440, VX, General, 0, + "Vector Subtract Unsigned Half Word Modulo"), + INSTRUCTION(vsubuhs, 0x10000640, VX, General, 0, + "Vector Subtract Unsigned Half Word Saturate"), + INSTRUCTION(vsubuwm, 0x10000480, VX, General, 0, + "Vector Subtract Unsigned Word Modulo"), + INSTRUCTION(vsubuws, 0x10000680, VX, General, 0, + "Vector Subtract Unsigned Word Saturate"), + INSTRUCTION(vsumsws, 0x10000788, VX, General, 0, + "Vector Sum Across Signed Word Saturate"), + INSTRUCTION(vsum2sws, 0x10000688, VX, General, 0, + "Vector Sum Across Partial (1/2) Signed Word Saturate"), + INSTRUCTION(vsum4sbs, 0x10000708, VX, General, 0, + "Vector Sum Across Partial (1/4) Signed Byte Saturate"), + INSTRUCTION(vsum4shs, 0x10000648, VX, General, 0, + "Vector Sum Across Partial (1/4) Signed Half Word Saturate"), + INSTRUCTION(vsum4ubs, 0x10000608, VX, General, 0, + "Vector Sum Across Partial (1/4) Unsigned Byte Saturate"), + INSTRUCTION(vupkhpx, 0x1000034E, VX, General, 0, + "Vector Unpack High Pixel"), + INSTRUCTION(vupkhsb, 0x1000020E, VX, General, 0, + "Vector Unpack High Signed Byte"), + INSTRUCTION(vupkhsh, 0x1000024E, VX, General, 0, + "Vector Unpack High Signed Half Word"), + INSTRUCTION(vupklpx, 0x100003CE, VX, General, 0, "Vector Unpack Low Pixel"), + INSTRUCTION(vupklsb, 0x1000028E, VX, General, 0, + "Vector Unpack Low Signed Byte"), + INSTRUCTION(vupklsh, 0x100002CE, VX, General, 0, + "Vector Unpack Low Signed Half Word"), + INSTRUCTION(vxor, 0x100004C4, VX, General, VX_VD_VA_VB, + "Vector Logical XOR"), }; static InstrType** instr_table_4 = instr_table_prep( instr_table_4_unprep, XECOUNT(instr_table_4_unprep), 0, 11); // Opcode = 19, index = bits 10-1 (10) static InstrType instr_table_19_unprep[] = { - INSTRUCTION(mcrf, 0x4C000000, XL , General , 0 , NULL), - INSTRUCTION(bclrx, 0x4C000020, XL , BranchCond , bclrx , "Branch Conditional to Link Register"), - INSTRUCTION(crnor, 0x4C000042, XL , General , 0 , NULL), - INSTRUCTION(crandc, 0x4C000102, XL , General , 0 , NULL), - INSTRUCTION(isync, 0x4C00012C, XL , General , 0 , NULL), - INSTRUCTION(crxor, 0x4C000182, XL , General , 0 , NULL), - INSTRUCTION(crnand, 0x4C0001C2, XL , General , 0 , NULL), - INSTRUCTION(crand, 0x4C000202, XL , General , 0 , NULL), - INSTRUCTION(creqv, 0x4C000242, XL , General , 0 , NULL), - INSTRUCTION(crorc, 0x4C000342, XL , General , 0 , NULL), - INSTRUCTION(cror, 0x4C000382, XL , General , 0 , NULL), - INSTRUCTION(bcctrx, 0x4C000420, XL , BranchCond , bcctrx , "Branch Conditional to Count Register"), + INSTRUCTION(mcrf, 0x4C000000, XL, General, 0, NULL), + INSTRUCTION(bclrx, 0x4C000020, XL, BranchCond, bclrx, + "Branch Conditional to Link Register"), + INSTRUCTION(crnor, 0x4C000042, XL, General, 0, NULL), + INSTRUCTION(crandc, 0x4C000102, XL, General, 0, NULL), + INSTRUCTION(isync, 0x4C00012C, XL, General, 0, NULL), + INSTRUCTION(crxor, 0x4C000182, XL, General, 0, NULL), + INSTRUCTION(crnand, 0x4C0001C2, XL, General, 0, NULL), + INSTRUCTION(crand, 0x4C000202, XL, General, 0, NULL), + INSTRUCTION(creqv, 0x4C000242, XL, General, 0, NULL), + INSTRUCTION(crorc, 0x4C000342, XL, General, 0, NULL), + INSTRUCTION(cror, 0x4C000382, XL, General, 0, NULL), + INSTRUCTION(bcctrx, 0x4C000420, XL, BranchCond, bcctrx, + "Branch Conditional to Count Register"), }; static InstrType** instr_table_19 = instr_table_prep( instr_table_19_unprep, XECOUNT(instr_table_19_unprep), 1, 10); // Opcode = 30, index = bits 4-1 (4) static InstrType instr_table_30_unprep[] = { - // Decoding these instrunctions in this table is difficult because the - // index bits are kind of random. This is special cased by an uber - // instruction handler. - INSTRUCTION(rld, 0x78000000, MD , General , rld , NULL), - // INSTRUCTION(rldiclx, 0x78000000, MD , General , 0), - // INSTRUCTION(rldicrx, 0x78000004, MD , General , 0), - // INSTRUCTION(rldicx, 0x78000008, MD , General , 0), - // INSTRUCTION(rldimix, 0x7800000C, MD , General , 0), - // INSTRUCTION(rldclx, 0x78000010, MDS, General , 0), - // INSTRUCTION(rldcrx, 0x78000012, MDS, General , 0), + // Decoding these instrunctions in this table is difficult because the + // index bits are kind of random. This is special cased by an uber + // instruction handler. + INSTRUCTION(rld, 0x78000000, MD, General, rld, NULL), + // INSTRUCTION(rldiclx, 0x78000000, MD , General , 0), + // INSTRUCTION(rldicrx, 0x78000004, MD , General , 0), + // INSTRUCTION(rldicx, 0x78000008, MD , General , 0), + // INSTRUCTION(rldimix, 0x7800000C, MD , General , 0), + // INSTRUCTION(rldclx, 0x78000010, MDS, General , 0), + // INSTRUCTION(rldcrx, 0x78000012, MDS, General , 0), }; static InstrType** instr_table_30 = instr_table_prep( instr_table_30_unprep, XECOUNT(instr_table_30_unprep), 0, 0); // Opcode = 31, index = bits 10-1 (10) static InstrType instr_table_31_unprep[] = { - INSTRUCTION(cmp, 0x7C000000, X , General , cmp , "Compare"), - INSTRUCTION(tw, 0x7C000008, X , General , X_RA_RB , "Trap Word"), - INSTRUCTION(lvsl, 0x7C00000C, X , General , X_VX_RA0_RB , "Load Vector for Shift Left"), - INSTRUCTION(lvebx, 0x7C00000E, X , General , 0 , "Load Vector Element Byte Indexed"), - INSTRUCTION(subfcx, 0x7C000010, XO , General , XO_RT_RA_RB , "Subtract From Carrying"), - INSTRUCTION(mulhdux, 0x7C000012, XO , General , XO_RT_RA_RB , "Multiply High Doubleword Unsigned"), - INSTRUCTION(addcx, 0x7C000014, XO , General , XO_RT_RA_RB , "Add Carrying"), - INSTRUCTION(mulhwux, 0x7C000016, XO , General , XO_RT_RA_RB , "Multiply High Word Unsigned"), - INSTRUCTION(mfcr, 0x7C000026, X , General , mfcr , "Move From Condition Register"), - INSTRUCTION(lwarx, 0x7C000028, X , General , X_RT_RA0_RB , "Load Word And Reserve Indexed"), - INSTRUCTION(ldx, 0x7C00002A, X , General , X_RT_RA0_RB , "Load Doubleword Indexed"), - INSTRUCTION(lwzx, 0x7C00002E, X , General , X_RT_RA0_RB , "Load Word and Zero Indexed"), - INSTRUCTION(slwx, 0x7C000030, X , General , X_RA_RT_RB , "Shift Left Word"), - INSTRUCTION(cntlzwx, 0x7C000034, X , General , X_RA_RT , "Count Leading Zeros Word"), - INSTRUCTION(sldx, 0x7C000036, X , General , X_RA_RT_RB , "Shift Left Doubleword"), - INSTRUCTION(andx, 0x7C000038, X , General , X_RA_RT_RB , "AND"), - INSTRUCTION(cmpl, 0x7C000040, X , General , cmp , "Compare Logical"), - INSTRUCTION(lvsr, 0x7C00004C, X , General , X_VX_RA0_RB , "Load Vector for Shift Right"), - INSTRUCTION(lvehx, 0x7C00004E, X , General , 0 , "Load Vector Element Half Word Indexed"), - INSTRUCTION(subfx, 0x7C000050, XO , General , XO_RT_RA_RB , "Subtract From"), - INSTRUCTION(ldux, 0x7C00006A, X , General , X_RT_RA_RB , "Load Doubleword with Update Indexed"), - INSTRUCTION(dcbst, 0x7C00006C, X , General , 0 , NULL), - INSTRUCTION(lwzux, 0x7C00006E, X , General , X_RT_RA_RB , "Load Word and Zero with Update Indexed"), - INSTRUCTION(cntlzdx, 0x7C000074, X , General , X_RA_RT , "Count Leading Zeros Doubleword"), - INSTRUCTION(andcx, 0x7C000078, X , General , X_RA_RT_RB , "AND with Complement"), - INSTRUCTION(td, 0x7C000088, X , General , X_RA_RB , "Trap Doubleword"), - INSTRUCTION(lvewx, 0x7C00008E, X , General , 0 , "Load Vector Element Word Indexed"), - INSTRUCTION(mulhdx, 0x7C000092, XO , General , XO_RT_RA_RB , "Multiply High Doubleword"), - INSTRUCTION(mulhwx, 0x7C000096, XO , General , XO_RT_RA_RB , "Multiply High Word"), - INSTRUCTION(mfmsr, 0x7C0000A6, X , General , mfmsr , "Move From Machine State Register"), - INSTRUCTION(ldarx, 0x7C0000A8, X , General , X_RT_RA0_RB , "Load Doubleword And Reserve Indexed"), - INSTRUCTION(dcbf, 0x7C0000AC, X , General , dcbf , "Data Cache Block Flush"), - INSTRUCTION(lbzx, 0x7C0000AE, X , General , X_RT_RA0_RB , "Load Byte and Zero Indexed"), - INSTRUCTION(lvx, 0x7C0000CE, X , General , X_VX_RA0_RB , "Load Vector Indexed"), - INSTRUCTION(negx, 0x7C0000D0, XO , General , XO_RT_RA , "Negate"), - INSTRUCTION(lbzux, 0x7C0000EE, X , General , X_RT_RA_RB , "Load Byte and Zero with Update Indexed"), - INSTRUCTION(norx, 0x7C0000F8, X , General , X_RA_RT_RB , "NOR"), - INSTRUCTION(stvebx, 0x7C00010E, X , General , 0 , "Store Vector Element Byte Indexed"), - INSTRUCTION(subfex, 0x7C000110, XO , General , XO_RT_RA_RB , "Subtract From Extended"), - INSTRUCTION(addex, 0x7C000114, XO , General , XO_RT_RA_RB , "Add Extended"), - INSTRUCTION(mtcrf, 0x7C000120, XFX, General , 0 , NULL), - INSTRUCTION(mtmsr, 0x7C000124, X , General , mtmsr , "Move To Machine State Register"), - INSTRUCTION(stdx, 0x7C00012A, X , General , X_RT_RA0_RB , "Store Doubleword Indexed"), - INSTRUCTION(stwcx, 0x7C00012D, X , General , X_RT_RA0_RB , "Store Word Conditional Indexed"), - INSTRUCTION(stwx, 0x7C00012E, X , General , X_RT_RA0_RB , "Store Word Indexed"), - INSTRUCTION(stvehx, 0x7C00014E, X , General , 0 , "Store Vector Element Half Word Indexed"), - INSTRUCTION(mtmsrd, 0x7C000164, X , General , mtmsr , "Move To Machine State Register Doubleword"), - INSTRUCTION(stdux, 0x7C00016A, X , General , X_RT_RA_RB , "Store Doubleword with Update Indexed"), - INSTRUCTION(stwux, 0x7C00016E, X , General , X_RT_RA_RB , "Store Word with Update Indexed"), - INSTRUCTION(stvewx, 0x7C00018E, X , General , 0 , "Store Vector Element Word Indexed"), - INSTRUCTION(subfzex, 0x7C000190, XO , General , XO_RT_RA , "Subtract From Zero Extended"), - INSTRUCTION(addzex, 0x7C000194, XO , General , XO_RT_RA , "Add to Zero Extended"), - INSTRUCTION(stdcx, 0x7C0001AD, X , General , X_RT_RA0_RB , "Store Doubleword Conditional Indexed"), - INSTRUCTION(stbx, 0x7C0001AE, X , General , X_RT_RA0_RB , "Store Byte Indexed"), - INSTRUCTION(stvx, 0x7C0001CE, X , General , 0 , "Store Vector Indexed"), - INSTRUCTION(subfmex, 0x7C0001D0, XO , General , XO_RT_RA , "Subtract From Minus One Extended"), - INSTRUCTION(mulldx, 0x7C0001D2, XO , General , XO_RT_RA_RB , "Multiply Low Doubleword"), - INSTRUCTION(addmex, 0x7C0001D4, XO , General , XO_RT_RA , "Add to Minus One Extended"), - INSTRUCTION(mullwx, 0x7C0001D6, XO , General , XO_RT_RA_RB , "Multiply Low Word"), - INSTRUCTION(dcbtst, 0x7C0001EC, X , General , 0 , "Data Cache Block Touch for Store"), - INSTRUCTION(stbux, 0x7C0001EE, X , General , X_RT_RA_RB , "Store Byte with Update Indexed"), - INSTRUCTION(addx, 0x7C000214, XO , General , XO_RT_RA_RB , "Add"), - INSTRUCTION(dcbt, 0x7C00022C, X , General , 0 , "Data Cache Block Touch"), - INSTRUCTION(lhzx, 0x7C00022E, X , General , X_RT_RA0_RB , "Load Halfword and Zero Indexed"), - INSTRUCTION(eqvx, 0x7C000238, X , General , X_RA_RT_RB , "Equivalent"), - INSTRUCTION(eciwx, 0x7C00026C, X , General , 0 , NULL), - INSTRUCTION(lhzux, 0x7C00026E, X , General , X_RT_RA_RB , "Load Halfword and Zero with Update Indexed"), - INSTRUCTION(xorx, 0x7C000278, X , General , X_RA_RT_RB , "XOR"), - INSTRUCTION(mfspr, 0x7C0002A6, XFX, General , mfspr , "Move From Special Purpose Register"), - INSTRUCTION(lwax, 0x7C0002AA, X , General , X_RT_RA0_RB , "Load Word Algebraic Indexed"), - INSTRUCTION(lhax, 0x7C0002AE, X , General , X_RT_RA0_RB , "Load Halfword Algebraic Indexed"), - INSTRUCTION(lvxl, 0x7C0002CE, X , General , X_VX_RA0_RB , "Load Vector Indexed LRU"), - INSTRUCTION(mftb, 0x7C0002E6, XFX, General , mftb , "Move From Time Base"), - INSTRUCTION(lwaux, 0x7C0002EA, X , General , X_RT_RA_RB , "Load Word Algebraic with Update Indexed"), - INSTRUCTION(lhaux, 0x7C0002EE, X , General , 0 , NULL), - INSTRUCTION(sthx, 0x7C00032E, X , General , X_RT_RA0_RB , "Store Halfword Indexed"), - INSTRUCTION(orcx, 0x7C000338, X , General , X_RA_RT_RB , "OR with Complement"), - INSTRUCTION(ecowx, 0x7C00036C, X , General , 0 , NULL), - INSTRUCTION(sthux, 0x7C00036E, X , General , X_RT_RA_RB , "Store Halfword with Update Indexed"), - INSTRUCTION(orx, 0x7C000378, X , General , X_RA_RT_RB , "OR"), - INSTRUCTION(divdux, 0x7C000392, XO , General , XO_RT_RA_RB , "Divide Doubleword Unsigned"), - INSTRUCTION(divwux, 0x7C000396, XO , General , XO_RT_RA_RB , "Divide Word Unsigned"), - INSTRUCTION(mtspr, 0x7C0003A6, XFX, General , mtspr , "Move To Special Purpose Register"), - INSTRUCTION(nandx, 0x7C0003B8, X , General , X_RA_RT_RB , "NAND"), - INSTRUCTION(stvxl, 0x7C0003CE, X , General , 0 , "Store Vector Indexed LRU"), - INSTRUCTION(divdx, 0x7C0003D2, XO , General , XO_RT_RA_RB , "Divide Doubleword"), - INSTRUCTION(divwx, 0x7C0003D6, XO , General , XO_RT_RA_RB , "Divide Word"), - INSTRUCTION(lvlx, 0x7C00040E, X , General , 0 , "Load Vector Indexed"), - INSTRUCTION(ldbrx, 0x7C000428, X , General , X_RT_RA0_RB , "Load Doubleword Byte-Reverse Indexed"), - INSTRUCTION(lswx, 0x7C00042A, X , General , 0 , NULL), - INSTRUCTION(lwbrx, 0x7C00042C, X , General , X_RT_RA0_RB , "Load Word Byte-Reverse Indexed"), - INSTRUCTION(lfsx, 0x7C00042E, X , General , X_FRT_RA0_RB , "Load Floating-Point Single Indexed"), - INSTRUCTION(srwx, 0x7C000430, X , General , X_RA_RT_RB , "Shift Right Word"), - INSTRUCTION(srdx, 0x7C000436, X , General , X_RA_RT_RB , "Shift Right Doubleword"), - INSTRUCTION(lfsux, 0x7C00046E, X , General , X_FRT_RA_RB , "Load Floating-Point Single with Update Indexed"), - INSTRUCTION(lswi, 0x7C0004AA, X , General , 0 , NULL), - INSTRUCTION(sync, 0x7C0004AC, X , General , sync , "Synchronize"), - INSTRUCTION(lfdx, 0x7C0004AE, X , General , X_FRT_RA0_RB , "Load Floating-Point Double Indexed"), - INSTRUCTION(lfdux, 0x7C0004EE, X , General , X_FRT_RA_RB , "Load Floating-Point Double with Update Indexed"), - INSTRUCTION(stdbrx, 0x7C000528, X , General , X_RT_RA0_RB , "Store Doubleword Byte-Reverse Indexed"), - INSTRUCTION(stswx, 0x7C00052A, X , General , 0 , NULL), - INSTRUCTION(stwbrx, 0x7C00052C, X , General , X_RT_RA0_RB , "Store Word Byte-Reverse Indexed"), - INSTRUCTION(stfsx, 0x7C00052E, X , General , X_FRT_RA0_RB , "Store Floating-Point Single Indexed"), - INSTRUCTION(stfsux, 0x7C00056E, X , General , X_FRT_RA_RB , "Store Floating-Point Single with Update Indexed"), - INSTRUCTION(stswi, 0x7C0005AA, X , General , 0 , NULL), - INSTRUCTION(stfdx, 0x7C0005AE, X , General , X_FRT_RA0_RB , "Store Floating-Point Double Indexed"), - INSTRUCTION(stfdux, 0x7C0005EE, X , General , X_FRT_RA_RB , "Store Floating-Point Double with Update Indexed"), - INSTRUCTION(lhbrx, 0x7C00062C, X , General , X_RT_RA0_RB , "Load Halfword Byte-Reverse Indexed"), - INSTRUCTION(srawx, 0x7C000630, X , General , X_RA_RT_RB , "Shift Right Algebraic Word"), - INSTRUCTION(sradx, 0x7C000634, X , General , X_RA_RT_RB , "Shift Right Algebraic Doubleword"), - INSTRUCTION(srawix, 0x7C000670, X , General , srawix , "Shift Right Algebraic Word Immediate"), - INSTRUCTION(sradix, 0x7C000674, XS , General , sradix , "Shift Right Algebraic Doubleword Immediate"), // TODO - INSTRUCTION(eieio, 0x7C0006AC, X , General , _ , "Enforce In-Order Execution of I/O Instruction"), - INSTRUCTION(sthbrx, 0x7C00072C, X , General , X_RT_RA0_RB , "Store Halfword Byte-Reverse Indexed"), - INSTRUCTION(extshx, 0x7C000734, X , General , X_RA_RT , "Extend Sign Halfword"), - INSTRUCTION(extsbx, 0x7C000774, X , General , X_RA_RT , "Extend Sign Byte"), - INSTRUCTION(icbi, 0x7C0007AC, X , General , 0 , NULL), - INSTRUCTION(stfiwx, 0x7C0007AE, X , General , X_FRT_RA0_RB , "Store Floating-Point as Integer Word Indexed"), - INSTRUCTION(extswx, 0x7C0007B4, X , General , X_RA_RT , "Extend Sign Word"), - INSTRUCTION(dcbz, 0x7C0007EC, X , General , dcbz , "Data Cache Block set to Zero"), // 0x7C2007EC = DCBZ128 - INSTRUCTION(dst, 0x7C0002AC, XDSS, General , 0 , NULL), - INSTRUCTION(dstst, 0x7C0002EC, XDSS, General , 0 , NULL), - INSTRUCTION(dss, 0x7C00066C, XDSS, General , 0 , NULL), - INSTRUCTION(lvebx, 0x7C00000E, X , General , 0 , "Load Vector Element Byte Indexed"), - INSTRUCTION(lvehx, 0x7C00004E, X , General , 0 , "Load Vector Element Half Word Indexed"), - INSTRUCTION(lvewx, 0x7C00008E, X , General , 0 , "Load Vector Element Word Indexed"), - INSTRUCTION(lvsl, 0x7C00000C, X , General , 0 , "Load Vector for Shift Left"), - INSTRUCTION(lvsr, 0x7C00004C, X , General , 0 , "Load Vector for Shift Right"), - INSTRUCTION(lvx, 0x7C0000CE, X , General , 0 , "Load Vector Indexed"), - INSTRUCTION(lvxl, 0x7C0002CE, X , General , 0 , "Load Vector Indexed LRU"), - INSTRUCTION(stvebx, 0x7C00010E, X , General , 0 , "Store Vector Element Byte Indexed"), - INSTRUCTION(stvehx, 0x7C00014E, X , General , 0 , "Store Vector Element Half Word Indexed"), - INSTRUCTION(stvewx, 0x7C00018E, X , General , 0 , "Store Vector Element Word Indexed"), - INSTRUCTION(stvx, 0x7C0001CE, X , General , X_VX_RA0_RB , "Store Vector Indexed"), - INSTRUCTION(stvxl, 0x7C0003CE, X , General , X_VX_RA0_RB , "Store Vector Indexed LRU"), - INSTRUCTION(lvlx, 0x7C00040E, X , General , X_VX_RA0_RB , "Load Vector Left Indexed"), - INSTRUCTION(lvlxl, 0x7C00060E, X , General , X_VX_RA0_RB , "Load Vector Left Indexed LRU"), - INSTRUCTION(lvrx, 0x7C00044E, X , General , X_VX_RA0_RB , "Load Vector Right Indexed"), - INSTRUCTION(lvrxl, 0x7C00064E, X , General , X_VX_RA0_RB , "Load Vector Right Indexed LRU"), - INSTRUCTION(stvlx, 0x7C00050E, X , General , X_VX_RA0_RB , "Store Vector Left Indexed"), - INSTRUCTION(stvlxl, 0x7C00070E, X , General , X_VX_RA0_RB , "Store Vector Left Indexed LRU"), - INSTRUCTION(stvrx, 0x7C00054E, X , General , X_VX_RA0_RB , "Store Vector Right Indexed"), - INSTRUCTION(stvrxl, 0x7C00074E, X , General , X_VX_RA0_RB , "Store Vector Right Indexed LRU"), + INSTRUCTION(cmp, 0x7C000000, X, General, cmp, "Compare"), + INSTRUCTION(tw, 0x7C000008, X, General, X_RA_RB, "Trap Word"), + INSTRUCTION(lvsl, 0x7C00000C, X, General, X_VX_RA0_RB, + "Load Vector for Shift Left"), + INSTRUCTION(lvebx, 0x7C00000E, X, General, 0, + "Load Vector Element Byte Indexed"), + INSTRUCTION(subfcx, 0x7C000010, XO, General, XO_RT_RA_RB, + "Subtract From Carrying"), + INSTRUCTION(mulhdux, 0x7C000012, XO, General, XO_RT_RA_RB, + "Multiply High Doubleword Unsigned"), + INSTRUCTION(addcx, 0x7C000014, XO, General, XO_RT_RA_RB, "Add Carrying"), + INSTRUCTION(mulhwux, 0x7C000016, XO, General, XO_RT_RA_RB, + "Multiply High Word Unsigned"), + INSTRUCTION(mfcr, 0x7C000026, X, General, mfcr, + "Move From Condition Register"), + INSTRUCTION(lwarx, 0x7C000028, X, General, X_RT_RA0_RB, + "Load Word And Reserve Indexed"), + INSTRUCTION(ldx, 0x7C00002A, X, General, X_RT_RA0_RB, + "Load Doubleword Indexed"), + INSTRUCTION(lwzx, 0x7C00002E, X, General, X_RT_RA0_RB, + "Load Word and Zero Indexed"), + INSTRUCTION(slwx, 0x7C000030, X, General, X_RA_RT_RB, "Shift Left Word"), + INSTRUCTION(cntlzwx, 0x7C000034, X, General, X_RA_RT, + "Count Leading Zeros Word"), + INSTRUCTION(sldx, 0x7C000036, X, General, X_RA_RT_RB, + "Shift Left Doubleword"), + INSTRUCTION(andx, 0x7C000038, X, General, X_RA_RT_RB, "AND"), + INSTRUCTION(cmpl, 0x7C000040, X, General, cmp, "Compare Logical"), + INSTRUCTION(lvsr, 0x7C00004C, X, General, X_VX_RA0_RB, + "Load Vector for Shift Right"), + INSTRUCTION(lvehx, 0x7C00004E, X, General, 0, + "Load Vector Element Half Word Indexed"), + INSTRUCTION(subfx, 0x7C000050, XO, General, XO_RT_RA_RB, "Subtract From"), + INSTRUCTION(ldux, 0x7C00006A, X, General, X_RT_RA_RB, + "Load Doubleword with Update Indexed"), + INSTRUCTION(dcbst, 0x7C00006C, X, General, 0, NULL), + INSTRUCTION(lwzux, 0x7C00006E, X, General, X_RT_RA_RB, + "Load Word and Zero with Update Indexed"), + INSTRUCTION(cntlzdx, 0x7C000074, X, General, X_RA_RT, + "Count Leading Zeros Doubleword"), + INSTRUCTION(andcx, 0x7C000078, X, General, X_RA_RT_RB, + "AND with Complement"), + INSTRUCTION(td, 0x7C000088, X, General, X_RA_RB, "Trap Doubleword"), + INSTRUCTION(lvewx, 0x7C00008E, X, General, 0, + "Load Vector Element Word Indexed"), + INSTRUCTION(mulhdx, 0x7C000092, XO, General, XO_RT_RA_RB, + "Multiply High Doubleword"), + INSTRUCTION(mulhwx, 0x7C000096, XO, General, XO_RT_RA_RB, + "Multiply High Word"), + INSTRUCTION(mfmsr, 0x7C0000A6, X, General, mfmsr, + "Move From Machine State Register"), + INSTRUCTION(ldarx, 0x7C0000A8, X, General, X_RT_RA0_RB, + "Load Doubleword And Reserve Indexed"), + INSTRUCTION(dcbf, 0x7C0000AC, X, General, dcbf, "Data Cache Block Flush"), + INSTRUCTION(lbzx, 0x7C0000AE, X, General, X_RT_RA0_RB, + "Load Byte and Zero Indexed"), + INSTRUCTION(lvx, 0x7C0000CE, X, General, X_VX_RA0_RB, + "Load Vector Indexed"), + INSTRUCTION(negx, 0x7C0000D0, XO, General, XO_RT_RA, "Negate"), + INSTRUCTION(lbzux, 0x7C0000EE, X, General, X_RT_RA_RB, + "Load Byte and Zero with Update Indexed"), + INSTRUCTION(norx, 0x7C0000F8, X, General, X_RA_RT_RB, "NOR"), + INSTRUCTION(stvebx, 0x7C00010E, X, General, 0, + "Store Vector Element Byte Indexed"), + INSTRUCTION(subfex, 0x7C000110, XO, General, XO_RT_RA_RB, + "Subtract From Extended"), + INSTRUCTION(addex, 0x7C000114, XO, General, XO_RT_RA_RB, "Add Extended"), + INSTRUCTION(mtcrf, 0x7C000120, XFX, General, 0, NULL), + INSTRUCTION(mtmsr, 0x7C000124, X, General, mtmsr, + "Move To Machine State Register"), + INSTRUCTION(stdx, 0x7C00012A, X, General, X_RT_RA0_RB, + "Store Doubleword Indexed"), + INSTRUCTION(stwcx, 0x7C00012D, X, General, X_RT_RA0_RB, + "Store Word Conditional Indexed"), + INSTRUCTION(stwx, 0x7C00012E, X, General, X_RT_RA0_RB, + "Store Word Indexed"), + INSTRUCTION(stvehx, 0x7C00014E, X, General, 0, + "Store Vector Element Half Word Indexed"), + INSTRUCTION(mtmsrd, 0x7C000164, X, General, mtmsr, + "Move To Machine State Register Doubleword"), + INSTRUCTION(stdux, 0x7C00016A, X, General, X_RT_RA_RB, + "Store Doubleword with Update Indexed"), + INSTRUCTION(stwux, 0x7C00016E, X, General, X_RT_RA_RB, + "Store Word with Update Indexed"), + INSTRUCTION(stvewx, 0x7C00018E, X, General, 0, + "Store Vector Element Word Indexed"), + INSTRUCTION(subfzex, 0x7C000190, XO, General, XO_RT_RA, + "Subtract From Zero Extended"), + INSTRUCTION(addzex, 0x7C000194, XO, General, XO_RT_RA, + "Add to Zero Extended"), + INSTRUCTION(stdcx, 0x7C0001AD, X, General, X_RT_RA0_RB, + "Store Doubleword Conditional Indexed"), + INSTRUCTION(stbx, 0x7C0001AE, X, General, X_RT_RA0_RB, + "Store Byte Indexed"), + INSTRUCTION(stvx, 0x7C0001CE, X, General, 0, "Store Vector Indexed"), + INSTRUCTION(subfmex, 0x7C0001D0, XO, General, XO_RT_RA, + "Subtract From Minus One Extended"), + INSTRUCTION(mulldx, 0x7C0001D2, XO, General, XO_RT_RA_RB, + "Multiply Low Doubleword"), + INSTRUCTION(addmex, 0x7C0001D4, XO, General, XO_RT_RA, + "Add to Minus One Extended"), + INSTRUCTION(mullwx, 0x7C0001D6, XO, General, XO_RT_RA_RB, + "Multiply Low Word"), + INSTRUCTION(dcbtst, 0x7C0001EC, X, General, 0, + "Data Cache Block Touch for Store"), + INSTRUCTION(stbux, 0x7C0001EE, X, General, X_RT_RA_RB, + "Store Byte with Update Indexed"), + INSTRUCTION(addx, 0x7C000214, XO, General, XO_RT_RA_RB, "Add"), + INSTRUCTION(dcbt, 0x7C00022C, X, General, 0, "Data Cache Block Touch"), + INSTRUCTION(lhzx, 0x7C00022E, X, General, X_RT_RA0_RB, + "Load Halfword and Zero Indexed"), + INSTRUCTION(eqvx, 0x7C000238, X, General, X_RA_RT_RB, "Equivalent"), + INSTRUCTION(eciwx, 0x7C00026C, X, General, 0, NULL), + INSTRUCTION(lhzux, 0x7C00026E, X, General, X_RT_RA_RB, + "Load Halfword and Zero with Update Indexed"), + INSTRUCTION(xorx, 0x7C000278, X, General, X_RA_RT_RB, "XOR"), + INSTRUCTION(mfspr, 0x7C0002A6, XFX, General, mfspr, + "Move From Special Purpose Register"), + INSTRUCTION(lwax, 0x7C0002AA, X, General, X_RT_RA0_RB, + "Load Word Algebraic Indexed"), + INSTRUCTION(lhax, 0x7C0002AE, X, General, X_RT_RA0_RB, + "Load Halfword Algebraic Indexed"), + INSTRUCTION(lvxl, 0x7C0002CE, X, General, X_VX_RA0_RB, + "Load Vector Indexed LRU"), + INSTRUCTION(mftb, 0x7C0002E6, XFX, General, mftb, "Move From Time Base"), + INSTRUCTION(lwaux, 0x7C0002EA, X, General, X_RT_RA_RB, + "Load Word Algebraic with Update Indexed"), + INSTRUCTION(lhaux, 0x7C0002EE, X, General, 0, NULL), + INSTRUCTION(sthx, 0x7C00032E, X, General, X_RT_RA0_RB, + "Store Halfword Indexed"), + INSTRUCTION(orcx, 0x7C000338, X, General, X_RA_RT_RB, "OR with Complement"), + INSTRUCTION(ecowx, 0x7C00036C, X, General, 0, NULL), + INSTRUCTION(sthux, 0x7C00036E, X, General, X_RT_RA_RB, + "Store Halfword with Update Indexed"), + INSTRUCTION(orx, 0x7C000378, X, General, X_RA_RT_RB, "OR"), + INSTRUCTION(divdux, 0x7C000392, XO, General, XO_RT_RA_RB, + "Divide Doubleword Unsigned"), + INSTRUCTION(divwux, 0x7C000396, XO, General, XO_RT_RA_RB, + "Divide Word Unsigned"), + INSTRUCTION(mtspr, 0x7C0003A6, XFX, General, mtspr, + "Move To Special Purpose Register"), + INSTRUCTION(nandx, 0x7C0003B8, X, General, X_RA_RT_RB, "NAND"), + INSTRUCTION(stvxl, 0x7C0003CE, X, General, 0, "Store Vector Indexed LRU"), + INSTRUCTION(divdx, 0x7C0003D2, XO, General, XO_RT_RA_RB, + "Divide Doubleword"), + INSTRUCTION(divwx, 0x7C0003D6, XO, General, XO_RT_RA_RB, "Divide Word"), + INSTRUCTION(lvlx, 0x7C00040E, X, General, 0, "Load Vector Indexed"), + INSTRUCTION(ldbrx, 0x7C000428, X, General, X_RT_RA0_RB, + "Load Doubleword Byte-Reverse Indexed"), + INSTRUCTION(lswx, 0x7C00042A, X, General, 0, NULL), + INSTRUCTION(lwbrx, 0x7C00042C, X, General, X_RT_RA0_RB, + "Load Word Byte-Reverse Indexed"), + INSTRUCTION(lfsx, 0x7C00042E, X, General, X_FRT_RA0_RB, + "Load Floating-Point Single Indexed"), + INSTRUCTION(srwx, 0x7C000430, X, General, X_RA_RT_RB, "Shift Right Word"), + INSTRUCTION(srdx, 0x7C000436, X, General, X_RA_RT_RB, + "Shift Right Doubleword"), + INSTRUCTION(lfsux, 0x7C00046E, X, General, X_FRT_RA_RB, + "Load Floating-Point Single with Update Indexed"), + INSTRUCTION(lswi, 0x7C0004AA, X, General, 0, NULL), + INSTRUCTION(sync, 0x7C0004AC, X, General, sync, "Synchronize"), + INSTRUCTION(lfdx, 0x7C0004AE, X, General, X_FRT_RA0_RB, + "Load Floating-Point Double Indexed"), + INSTRUCTION(lfdux, 0x7C0004EE, X, General, X_FRT_RA_RB, + "Load Floating-Point Double with Update Indexed"), + INSTRUCTION(stdbrx, 0x7C000528, X, General, X_RT_RA0_RB, + "Store Doubleword Byte-Reverse Indexed"), + INSTRUCTION(stswx, 0x7C00052A, X, General, 0, NULL), + INSTRUCTION(stwbrx, 0x7C00052C, X, General, X_RT_RA0_RB, + "Store Word Byte-Reverse Indexed"), + INSTRUCTION(stfsx, 0x7C00052E, X, General, X_FRT_RA0_RB, + "Store Floating-Point Single Indexed"), + INSTRUCTION(stfsux, 0x7C00056E, X, General, X_FRT_RA_RB, + "Store Floating-Point Single with Update Indexed"), + INSTRUCTION(stswi, 0x7C0005AA, X, General, 0, NULL), + INSTRUCTION(stfdx, 0x7C0005AE, X, General, X_FRT_RA0_RB, + "Store Floating-Point Double Indexed"), + INSTRUCTION(stfdux, 0x7C0005EE, X, General, X_FRT_RA_RB, + "Store Floating-Point Double with Update Indexed"), + INSTRUCTION(lhbrx, 0x7C00062C, X, General, X_RT_RA0_RB, + "Load Halfword Byte-Reverse Indexed"), + INSTRUCTION(srawx, 0x7C000630, X, General, X_RA_RT_RB, + "Shift Right Algebraic Word"), + INSTRUCTION(sradx, 0x7C000634, X, General, X_RA_RT_RB, + "Shift Right Algebraic Doubleword"), + INSTRUCTION(srawix, 0x7C000670, X, General, srawix, + "Shift Right Algebraic Word Immediate"), + INSTRUCTION(sradix, 0x7C000674, XS, General, sradix, + "Shift Right Algebraic Doubleword Immediate"), // TODO + INSTRUCTION(eieio, 0x7C0006AC, X, General, _, + "Enforce In-Order Execution of I/O Instruction"), + INSTRUCTION(sthbrx, 0x7C00072C, X, General, X_RT_RA0_RB, + "Store Halfword Byte-Reverse Indexed"), + INSTRUCTION(extshx, 0x7C000734, X, General, X_RA_RT, + "Extend Sign Halfword"), + INSTRUCTION(extsbx, 0x7C000774, X, General, X_RA_RT, "Extend Sign Byte"), + INSTRUCTION(icbi, 0x7C0007AC, X, General, 0, NULL), + INSTRUCTION(stfiwx, 0x7C0007AE, X, General, X_FRT_RA0_RB, + "Store Floating-Point as Integer Word Indexed"), + INSTRUCTION(extswx, 0x7C0007B4, X, General, X_RA_RT, "Extend Sign Word"), + INSTRUCTION(dcbz, 0x7C0007EC, X, General, dcbz, + "Data Cache Block set to Zero"), // 0x7C2007EC = DCBZ128 + INSTRUCTION(dst, 0x7C0002AC, XDSS, General, 0, NULL), + INSTRUCTION(dstst, 0x7C0002EC, XDSS, General, 0, NULL), + INSTRUCTION(dss, 0x7C00066C, XDSS, General, 0, NULL), + INSTRUCTION(lvebx, 0x7C00000E, X, General, 0, + "Load Vector Element Byte Indexed"), + INSTRUCTION(lvehx, 0x7C00004E, X, General, 0, + "Load Vector Element Half Word Indexed"), + INSTRUCTION(lvewx, 0x7C00008E, X, General, 0, + "Load Vector Element Word Indexed"), + INSTRUCTION(lvsl, 0x7C00000C, X, General, 0, "Load Vector for Shift Left"), + INSTRUCTION(lvsr, 0x7C00004C, X, General, 0, "Load Vector for Shift Right"), + INSTRUCTION(lvx, 0x7C0000CE, X, General, 0, "Load Vector Indexed"), + INSTRUCTION(lvxl, 0x7C0002CE, X, General, 0, "Load Vector Indexed LRU"), + INSTRUCTION(stvebx, 0x7C00010E, X, General, 0, + "Store Vector Element Byte Indexed"), + INSTRUCTION(stvehx, 0x7C00014E, X, General, 0, + "Store Vector Element Half Word Indexed"), + INSTRUCTION(stvewx, 0x7C00018E, X, General, 0, + "Store Vector Element Word Indexed"), + INSTRUCTION(stvx, 0x7C0001CE, X, General, X_VX_RA0_RB, + "Store Vector Indexed"), + INSTRUCTION(stvxl, 0x7C0003CE, X, General, X_VX_RA0_RB, + "Store Vector Indexed LRU"), + INSTRUCTION(lvlx, 0x7C00040E, X, General, X_VX_RA0_RB, + "Load Vector Left Indexed"), + INSTRUCTION(lvlxl, 0x7C00060E, X, General, X_VX_RA0_RB, + "Load Vector Left Indexed LRU"), + INSTRUCTION(lvrx, 0x7C00044E, X, General, X_VX_RA0_RB, + "Load Vector Right Indexed"), + INSTRUCTION(lvrxl, 0x7C00064E, X, General, X_VX_RA0_RB, + "Load Vector Right Indexed LRU"), + INSTRUCTION(stvlx, 0x7C00050E, X, General, X_VX_RA0_RB, + "Store Vector Left Indexed"), + INSTRUCTION(stvlxl, 0x7C00070E, X, General, X_VX_RA0_RB, + "Store Vector Left Indexed LRU"), + INSTRUCTION(stvrx, 0x7C00054E, X, General, X_VX_RA0_RB, + "Store Vector Right Indexed"), + INSTRUCTION(stvrxl, 0x7C00074E, X, General, X_VX_RA0_RB, + "Store Vector Right Indexed LRU"), }; static InstrType** instr_table_31 = instr_table_prep( instr_table_31_unprep, XECOUNT(instr_table_31_unprep), 1, 10); // Opcode = 58, index = bits 1-0 (2) static InstrType instr_table_58_unprep[] = { - INSTRUCTION(ld, 0xE8000000, DS , General , DS_RT_RA0_I , "Load Doubleword"), - INSTRUCTION(ldu, 0xE8000001, DS , General , DS_RT_RA_I , "Load Doubleword with Update"), - INSTRUCTION(lwa, 0xE8000002, DS , General , DS_RT_RA0_I , "Load Word Algebraic"), + INSTRUCTION(ld, 0xE8000000, DS, General, DS_RT_RA0_I, "Load Doubleword"), + INSTRUCTION(ldu, 0xE8000001, DS, General, DS_RT_RA_I, + "Load Doubleword with Update"), + INSTRUCTION(lwa, 0xE8000002, DS, General, DS_RT_RA0_I, + "Load Word Algebraic"), }; static InstrType** instr_table_58 = instr_table_prep( instr_table_58_unprep, XECOUNT(instr_table_58_unprep), 0, 1); // Opcode = 59, index = bits 5-1 (5) static InstrType instr_table_59_unprep[] = { - INSTRUCTION(fdivsx, 0xEC000024, A , General , A_FRT_FRA_FRB , "Floating Divide [Single]"), - INSTRUCTION(fsubsx, 0xEC000028, A , General , A_FRT_FRA_FRB , "Floating Subtract [Single]"), - INSTRUCTION(faddsx, 0xEC00002A, A , General , A_FRT_FRA_FRB , "Floating Add [Single]"), - INSTRUCTION(fsqrtsx, 0xEC00002C, A , General , A_FRT_FRB , "Floating Square Root [Single]"), - INSTRUCTION(fresx, 0xEC000030, A , General , A_FRT_FRB , "Floating Reciprocal Estimate [Single]"), - INSTRUCTION(fmulsx, 0xEC000032, A , General , A_FRT_FRA_FRB , "Floating Multiply [Single]"), - INSTRUCTION(fmsubsx, 0xEC000038, A , General , A_FRT_FRA_FRB_FRC , "Floating Multiply-Subtract [Single]"), - INSTRUCTION(fmaddsx, 0xEC00003A, A , General , A_FRT_FRA_FRB_FRC , "Floating Multiply-Add [Single]"), - INSTRUCTION(fnmsubsx, 0xEC00003C, A , General , A_FRT_FRA_FRB_FRC , "Floating Negative Multiply-Subtract [Single]"), - INSTRUCTION(fnmaddsx, 0xEC00003E, A , General , A_FRT_FRA_FRB_FRC , "Floating Negative Multiply-Add [Single]"), + INSTRUCTION(fdivsx, 0xEC000024, A, General, A_FRT_FRA_FRB, + "Floating Divide [Single]"), + INSTRUCTION(fsubsx, 0xEC000028, A, General, A_FRT_FRA_FRB, + "Floating Subtract [Single]"), + INSTRUCTION(faddsx, 0xEC00002A, A, General, A_FRT_FRA_FRB, + "Floating Add [Single]"), + INSTRUCTION(fsqrtsx, 0xEC00002C, A, General, A_FRT_FRB, + "Floating Square Root [Single]"), + INSTRUCTION(fresx, 0xEC000030, A, General, A_FRT_FRB, + "Floating Reciprocal Estimate [Single]"), + INSTRUCTION(fmulsx, 0xEC000032, A, General, A_FRT_FRA_FRB, + "Floating Multiply [Single]"), + INSTRUCTION(fmsubsx, 0xEC000038, A, General, A_FRT_FRA_FRB_FRC, + "Floating Multiply-Subtract [Single]"), + INSTRUCTION(fmaddsx, 0xEC00003A, A, General, A_FRT_FRA_FRB_FRC, + "Floating Multiply-Add [Single]"), + INSTRUCTION(fnmsubsx, 0xEC00003C, A, General, A_FRT_FRA_FRB_FRC, + "Floating Negative Multiply-Subtract [Single]"), + INSTRUCTION(fnmaddsx, 0xEC00003E, A, General, A_FRT_FRA_FRB_FRC, + "Floating Negative Multiply-Add [Single]"), }; static InstrType** instr_table_59 = instr_table_prep( instr_table_59_unprep, XECOUNT(instr_table_59_unprep), 1, 5); // Opcode = 62, index = bits 1-0 (2) static InstrType instr_table_62_unprep[] = { - INSTRUCTION(std, 0xF8000000, DS , General , DS_RT_RA0_I , "Store Doubleword"), - INSTRUCTION(stdu, 0xF8000001, DS , General , DS_RT_RA_I , "Store Doubleword with Update"), + INSTRUCTION(std, 0xF8000000, DS, General, DS_RT_RA0_I, "Store Doubleword"), + INSTRUCTION(stdu, 0xF8000001, DS, General, DS_RT_RA_I, + "Store Doubleword with Update"), }; static InstrType** instr_table_62 = instr_table_prep( instr_table_62_unprep, XECOUNT(instr_table_62_unprep), 0, 1); @@ -483,215 +695,381 @@ static InstrType** instr_table_62 = instr_table_prep( // NOTE: the A format instructions need some special handling because // they only use 6bits to identify their index. static InstrType instr_table_63_unprep[] = { - INSTRUCTION(fcmpu, 0xFC000000, X , General , fcmp , "Floating Compare Unordered"), - INSTRUCTION(frspx, 0xFC000018, X , General , X_FRT_FRB , "Floating Round to Single-Precision"), - INSTRUCTION(fctiwx, 0xFC00001C, X , General , X_FRT_FRB , "Floating Convert To Integer Word"), - INSTRUCTION(fctiwzx, 0xFC00001E, X , General , X_FRT_FRB , "Floating Convert To Integer Word with round toward Zero"), - INSTRUCTION(fdivx, 0xFC000024, A , General , A_FRT_FRA_FRB , "Floating Divide [Single]"), - INSTRUCTION(fsubx, 0xFC000028, A , General , A_FRT_FRA_FRB , "Floating Subtract [Single]"), - INSTRUCTION(faddx, 0xFC00002A, A , General , A_FRT_FRA_FRB , "Floating Add [Single]"), - INSTRUCTION(fsqrtx, 0xFC00002C, A , General , A_FRT_FRB , "Floating Square Root [Single]"), - INSTRUCTION(fselx, 0xFC00002E, A , General , A_FRT_FRA_FRB_FRC , "Floating Select"), - INSTRUCTION(fmulx, 0xFC000032, A , General , A_FRT_FRA_FRB , "Floating Multiply [Single]"), - INSTRUCTION(frsqrtex, 0xFC000034, A , General , A_FRT_FRB , "Floating Reciprocal Square Root Estimate [Single]"), - INSTRUCTION(fmsubx, 0xFC000038, A , General , 0 , "Floating Multiply-Subtract [Single]"), - INSTRUCTION(fmaddx, 0xFC00003A, A , General , A_FRT_FRA_FRB_FRC , "Floating Multiply-Add [Single]"), - INSTRUCTION(fnmsubx, 0xFC00003C, A , General , A_FRT_FRA_FRB_FRC , "Floating Negative Multiply-Subtract [Single]"), - INSTRUCTION(fnmaddx, 0xFC00003E, A , General , A_FRT_FRA_FRB_FRC , "Floating Negative Multiply-Add [Single]"), - INSTRUCTION(fcmpo, 0xFC000040, X , General , fcmp , "Floating Compare Ordered"), - INSTRUCTION(mtfsb1x, 0xFC00004C, X , General , 0 , NULL), - INSTRUCTION(fnegx, 0xFC000050, X , General , X_FRT_FRB , "Floating Negate"), - INSTRUCTION(mcrfs, 0xFC000080, X , General , 0 , NULL), - INSTRUCTION(mtfsb0x, 0xFC00008C, X , General , 0 , NULL), - INSTRUCTION(fmrx, 0xFC000090, X , General , X_FRT_FRB , "Floating Move Register"), - INSTRUCTION(mtfsfix, 0xFC00010C, X , General , 0 , NULL), - INSTRUCTION(fnabsx, 0xFC000110, X , General , X_FRT_FRB , "Floating Negative Absolute Value"), - INSTRUCTION(fabsx, 0xFC000210, X , General , X_FRT_FRB , "Floating Absolute Value"), - INSTRUCTION(mffsx, 0xFC00048E, X , General , 0 , "Move from FPSCR"), - INSTRUCTION(mtfsfx, 0xFC00058E, XFL, General , 0 , "Move to FPSCR Fields"), - INSTRUCTION(fctidx, 0xFC00065C, X , General , X_FRT_FRB , "Floating Convert To Integer Doubleword"), - INSTRUCTION(fctidzx, 0xFC00065E, X , General , X_FRT_FRB , "Floating Convert To Integer Doubleword with round toward Zero"), - INSTRUCTION(fcfidx, 0xFC00069C, X , General , X_FRT_FRB , "Floating Convert From Integer Doubleword"), + INSTRUCTION(fcmpu, 0xFC000000, X, General, fcmp, + "Floating Compare Unordered"), + INSTRUCTION(frspx, 0xFC000018, X, General, X_FRT_FRB, + "Floating Round to Single-Precision"), + INSTRUCTION(fctiwx, 0xFC00001C, X, General, X_FRT_FRB, + "Floating Convert To Integer Word"), + INSTRUCTION(fctiwzx, 0xFC00001E, X, General, X_FRT_FRB, + "Floating Convert To Integer Word with round toward Zero"), + INSTRUCTION(fdivx, 0xFC000024, A, General, A_FRT_FRA_FRB, + "Floating Divide [Single]"), + INSTRUCTION(fsubx, 0xFC000028, A, General, A_FRT_FRA_FRB, + "Floating Subtract [Single]"), + INSTRUCTION(faddx, 0xFC00002A, A, General, A_FRT_FRA_FRB, + "Floating Add [Single]"), + INSTRUCTION(fsqrtx, 0xFC00002C, A, General, A_FRT_FRB, + "Floating Square Root [Single]"), + INSTRUCTION(fselx, 0xFC00002E, A, General, A_FRT_FRA_FRB_FRC, + "Floating Select"), + INSTRUCTION(fmulx, 0xFC000032, A, General, A_FRT_FRA_FRB, + "Floating Multiply [Single]"), + INSTRUCTION(frsqrtex, 0xFC000034, A, General, A_FRT_FRB, + "Floating Reciprocal Square Root Estimate [Single]"), + INSTRUCTION(fmsubx, 0xFC000038, A, General, 0, + "Floating Multiply-Subtract [Single]"), + INSTRUCTION(fmaddx, 0xFC00003A, A, General, A_FRT_FRA_FRB_FRC, + "Floating Multiply-Add [Single]"), + INSTRUCTION(fnmsubx, 0xFC00003C, A, General, A_FRT_FRA_FRB_FRC, + "Floating Negative Multiply-Subtract [Single]"), + INSTRUCTION(fnmaddx, 0xFC00003E, A, General, A_FRT_FRA_FRB_FRC, + "Floating Negative Multiply-Add [Single]"), + INSTRUCTION(fcmpo, 0xFC000040, X, General, fcmp, + "Floating Compare Ordered"), + INSTRUCTION(mtfsb1x, 0xFC00004C, X, General, 0, NULL), + INSTRUCTION(fnegx, 0xFC000050, X, General, X_FRT_FRB, "Floating Negate"), + INSTRUCTION(mcrfs, 0xFC000080, X, General, 0, NULL), + INSTRUCTION(mtfsb0x, 0xFC00008C, X, General, 0, NULL), + INSTRUCTION(fmrx, 0xFC000090, X, General, X_FRT_FRB, + "Floating Move Register"), + INSTRUCTION(mtfsfix, 0xFC00010C, X, General, 0, NULL), + INSTRUCTION(fnabsx, 0xFC000110, X, General, X_FRT_FRB, + "Floating Negative Absolute Value"), + INSTRUCTION(fabsx, 0xFC000210, X, General, X_FRT_FRB, + "Floating Absolute Value"), + INSTRUCTION(mffsx, 0xFC00048E, X, General, 0, "Move from FPSCR"), + INSTRUCTION(mtfsfx, 0xFC00058E, XFL, General, 0, "Move to FPSCR Fields"), + INSTRUCTION(fctidx, 0xFC00065C, X, General, X_FRT_FRB, + "Floating Convert To Integer Doubleword"), + INSTRUCTION( + fctidzx, 0xFC00065E, X, General, X_FRT_FRB, + "Floating Convert To Integer Doubleword with round toward Zero"), + INSTRUCTION(fcfidx, 0xFC00069C, X, General, X_FRT_FRB, + "Floating Convert From Integer Doubleword"), }; static InstrType** instr_table_63 = instr_table_prep_63( instr_table_63_unprep, XECOUNT(instr_table_63_unprep), 1, 10); // Main table, index = bits 31-26 (6) : (code >> 26) static InstrType instr_table_unprep[64] = { - INSTRUCTION(tdi, 0x08000000, D , General , D_RA , "Trap Doubleword Immediate"), - INSTRUCTION(twi, 0x0C000000, D , General , D_RA , "Trap Word Immediate"), - INSTRUCTION(mulli, 0x1C000000, D , General , D_RT_RA_I , "Multiply Low Immediate"), - INSTRUCTION(subficx, 0x20000000, D , General , D_RT_RA_I , "Subtract From Immediate Carrying"), - INSTRUCTION(cmpli, 0x28000000, D , General , cmpli , "Compare Logical Immediate"), - INSTRUCTION(cmpi, 0x2C000000, D , General , cmpi , "Compare Immediate"), - INSTRUCTION(addic, 0x30000000, D , General , D_RT_RA_I , "Add Immediate Carrying"), - INSTRUCTION(addicx, 0x34000000, D , General , D_RT_RA_I , "Add Immediate Carrying and Record"), - INSTRUCTION(addi, 0x38000000, D , General , D_RT_RA0_I , "Add Immediate"), - INSTRUCTION(addis, 0x3C000000, D , General , D_RT_RA0_I , "Add Immediate Shifted"), - INSTRUCTION(bcx, 0x40000000, B , BranchCond , bcx , "Branch Conditional"), - INSTRUCTION(sc, 0x44000002, SC , Syscall , 0 , NULL), - INSTRUCTION(bx, 0x48000000, I , BranchAlways , bx , "Branch"), - INSTRUCTION(rlwimix, 0x50000000, M , General , rlwim , "Rotate Left Word Immediate then Mask Insert"), - INSTRUCTION(rlwinmx, 0x54000000, M , General , rlwim , "Rotate Left Word Immediate then AND with Mask"), - INSTRUCTION(rlwnmx, 0x5C000000, M , General , rlwnmx , "Rotate Left Word then AND with Mask"), - INSTRUCTION(ori, 0x60000000, D , General , D_RA_RT_I , "OR Immediate"), - INSTRUCTION(oris, 0x64000000, D , General , D_RA_RT_I , "OR Immediate Shifted"), - INSTRUCTION(xori, 0x68000000, D , General , D_RA_RT_I , "XOR Immediate"), - INSTRUCTION(xoris, 0x6C000000, D , General , D_RA_RT_I , "XOR Immediate Shifted"), - INSTRUCTION(andix, 0x70000000, D , General , D_RA_RT_I , "AND Immediate"), - INSTRUCTION(andisx, 0x74000000, D , General , D_RA_RT_I , "AND Immediate Shifted"), - INSTRUCTION(lwz, 0x80000000, D , General , D_RT_RA0_I , "Load Word and Zero"), - INSTRUCTION(lwzu, 0x84000000, D , General , D_RT_RA_I , "Load Word and Zero with Udpate"), - INSTRUCTION(lbz, 0x88000000, D , General , D_RT_RA0_I , "Load Byte and Zero"), - INSTRUCTION(lbzu, 0x8C000000, D , General , D_RT_RA_I , "Load Byte and Zero with Update"), - INSTRUCTION(stw, 0x90000000, D , General , D_RT_RA0_I , "Store Word"), - INSTRUCTION(stwu, 0x94000000, D , General , D_RT_RA_I , "Store Word with Update"), - INSTRUCTION(stb, 0x98000000, D , General , D_RT_RA0_I , "Store Byte"), - INSTRUCTION(stbu, 0x9C000000, D , General , D_RT_RA_I , "Store Byte with Update"), - INSTRUCTION(lhz, 0xA0000000, D , General , D_RT_RA0_I , "Load Halfword and Zero"), - INSTRUCTION(lhzu, 0xA4000000, D , General , D_RT_RA_I , "Load Halfword and Zero with Update"), - INSTRUCTION(lha, 0xA8000000, D , General , D_RT_RA0_I , "Load Halfword Algebraic"), - INSTRUCTION(lhau, 0xAC000000, D , General , D_RT_RA_I , NULL), - INSTRUCTION(sth, 0xB0000000, D , General , D_RT_RA0_I , "Store Halfword"), - INSTRUCTION(sthu, 0xB4000000, D , General , D_RT_RA_I , "Store Halfword with Update"), - INSTRUCTION(lmw, 0xB8000000, D , General , 0 , NULL), - INSTRUCTION(stmw, 0xBC000000, D , General , 0 , NULL), - INSTRUCTION(lfs, 0xC0000000, D , General , D_FRT_RA0_I , "Load Floating-Point Single"), - INSTRUCTION(lfsu, 0xC4000000, D , General , D_FRT_RA_I , "Load Floating-Point Single with Update"), - INSTRUCTION(lfd, 0xC8000000, D , General , D_FRT_RA0_I , "Load Floating-Point Double"), - INSTRUCTION(lfdu, 0xCC000000, D , General , D_FRT_RA_I , "Load Floating-Point Double with Update"), - INSTRUCTION(stfs, 0xD0000000, D , General , D_FRT_RA0_I , "Store Floating-Point Single"), - INSTRUCTION(stfsu, 0xD4000000, D , General , D_FRT_RA_I , "Store Floating-Point Single with Update"), - INSTRUCTION(stfd, 0xD8000000, D , General , D_FRT_RA0_I , "Store Floating-Point Double"), - INSTRUCTION(stfdu, 0xDC000000, D , General , D_FRT_RA_I , "Store Floating-Point Double with Update"), + INSTRUCTION(tdi, 0x08000000, D, General, D_RA, "Trap Doubleword Immediate"), + INSTRUCTION(twi, 0x0C000000, D, General, D_RA, "Trap Word Immediate"), + INSTRUCTION(mulli, 0x1C000000, D, General, D_RT_RA_I, + "Multiply Low Immediate"), + INSTRUCTION(subficx, 0x20000000, D, General, D_RT_RA_I, + "Subtract From Immediate Carrying"), + INSTRUCTION(cmpli, 0x28000000, D, General, cmpli, + "Compare Logical Immediate"), + INSTRUCTION(cmpi, 0x2C000000, D, General, cmpi, "Compare Immediate"), + INSTRUCTION(addic, 0x30000000, D, General, D_RT_RA_I, + "Add Immediate Carrying"), + INSTRUCTION(addicx, 0x34000000, D, General, D_RT_RA_I, + "Add Immediate Carrying and Record"), + INSTRUCTION(addi, 0x38000000, D, General, D_RT_RA0_I, "Add Immediate"), + INSTRUCTION(addis, 0x3C000000, D, General, D_RT_RA0_I, + "Add Immediate Shifted"), + INSTRUCTION(bcx, 0x40000000, B, BranchCond, bcx, "Branch Conditional"), + INSTRUCTION(sc, 0x44000002, SC, Syscall, 0, NULL), + INSTRUCTION(bx, 0x48000000, I, BranchAlways, bx, "Branch"), + INSTRUCTION(rlwimix, 0x50000000, M, General, rlwim, + "Rotate Left Word Immediate then Mask Insert"), + INSTRUCTION(rlwinmx, 0x54000000, M, General, rlwim, + "Rotate Left Word Immediate then AND with Mask"), + INSTRUCTION(rlwnmx, 0x5C000000, M, General, rlwnmx, + "Rotate Left Word then AND with Mask"), + INSTRUCTION(ori, 0x60000000, D, General, D_RA_RT_I, "OR Immediate"), + INSTRUCTION(oris, 0x64000000, D, General, D_RA_RT_I, + "OR Immediate Shifted"), + INSTRUCTION(xori, 0x68000000, D, General, D_RA_RT_I, "XOR Immediate"), + INSTRUCTION(xoris, 0x6C000000, D, General, D_RA_RT_I, + "XOR Immediate Shifted"), + INSTRUCTION(andix, 0x70000000, D, General, D_RA_RT_I, "AND Immediate"), + INSTRUCTION(andisx, 0x74000000, D, General, D_RA_RT_I, + "AND Immediate Shifted"), + INSTRUCTION(lwz, 0x80000000, D, General, D_RT_RA0_I, "Load Word and Zero"), + INSTRUCTION(lwzu, 0x84000000, D, General, D_RT_RA_I, + "Load Word and Zero with Udpate"), + INSTRUCTION(lbz, 0x88000000, D, General, D_RT_RA0_I, "Load Byte and Zero"), + INSTRUCTION(lbzu, 0x8C000000, D, General, D_RT_RA_I, + "Load Byte and Zero with Update"), + INSTRUCTION(stw, 0x90000000, D, General, D_RT_RA0_I, "Store Word"), + INSTRUCTION(stwu, 0x94000000, D, General, D_RT_RA_I, + "Store Word with Update"), + INSTRUCTION(stb, 0x98000000, D, General, D_RT_RA0_I, "Store Byte"), + INSTRUCTION(stbu, 0x9C000000, D, General, D_RT_RA_I, + "Store Byte with Update"), + INSTRUCTION(lhz, 0xA0000000, D, General, D_RT_RA0_I, + "Load Halfword and Zero"), + INSTRUCTION(lhzu, 0xA4000000, D, General, D_RT_RA_I, + "Load Halfword and Zero with Update"), + INSTRUCTION(lha, 0xA8000000, D, General, D_RT_RA0_I, + "Load Halfword Algebraic"), + INSTRUCTION(lhau, 0xAC000000, D, General, D_RT_RA_I, NULL), + INSTRUCTION(sth, 0xB0000000, D, General, D_RT_RA0_I, "Store Halfword"), + INSTRUCTION(sthu, 0xB4000000, D, General, D_RT_RA_I, + "Store Halfword with Update"), + INSTRUCTION(lmw, 0xB8000000, D, General, 0, NULL), + INSTRUCTION(stmw, 0xBC000000, D, General, 0, NULL), + INSTRUCTION(lfs, 0xC0000000, D, General, D_FRT_RA0_I, + "Load Floating-Point Single"), + INSTRUCTION(lfsu, 0xC4000000, D, General, D_FRT_RA_I, + "Load Floating-Point Single with Update"), + INSTRUCTION(lfd, 0xC8000000, D, General, D_FRT_RA0_I, + "Load Floating-Point Double"), + INSTRUCTION(lfdu, 0xCC000000, D, General, D_FRT_RA_I, + "Load Floating-Point Double with Update"), + INSTRUCTION(stfs, 0xD0000000, D, General, D_FRT_RA0_I, + "Store Floating-Point Single"), + INSTRUCTION(stfsu, 0xD4000000, D, General, D_FRT_RA_I, + "Store Floating-Point Single with Update"), + INSTRUCTION(stfd, 0xD8000000, D, General, D_FRT_RA0_I, + "Store Floating-Point Double"), + INSTRUCTION(stfdu, 0xDC000000, D, General, D_FRT_RA_I, + "Store Floating-Point Double with Update"), }; -static InstrType** instr_table = instr_table_prep( - instr_table_unprep, XECOUNT(instr_table_unprep), 26, 31); +static InstrType** instr_table = + instr_table_prep(instr_table_unprep, XECOUNT(instr_table_unprep), 26, 31); // Altivec instructions. // TODO(benvanik): build a table like the other instructions. // This table is looked up via linear scan of opcodes. -#define SCAN_INSTRUCTION(name, opcode, format, type, disasm_fn, descr) { \ - opcode, \ - kXEPPCInstrMask##format, \ - kXEPPCInstrFormat##format, \ - kXEPPCInstrType##type, \ - 0, \ - Disasm_##disasm_fn, \ - #name, \ -} -#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) -#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) -#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) -#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) -#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) -#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) -#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) -#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) -#define VX128_R(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x390)) +#define SCAN_INSTRUCTION(name, opcode, format, type, disasm_fn, descr) \ + { \ + opcode, kXEPPCInstrMask##format, kXEPPCInstrFormat##format, \ + kXEPPCInstrType##type, 0, Disasm_##disasm_fn, #name, \ + } +#define OP(x) ((((uint32_t)(x)) & 0x3f) << 26) +#define VX128(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x3d0)) +#define VX128_1(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f3)) +#define VX128_2(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x210)) +#define VX128_3(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x7f0)) +#define VX128_4(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x730)) +#define VX128_5(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x10)) +#define VX128_P(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x630)) +#define VX128_R(op, xop) (OP(op) | (((uint32_t)(xop)) & 0x390)) static InstrType instr_table_scan[] = { - SCAN_INSTRUCTION(vcmpbfp, 0x100003C6, VXR , General , 0 , "Vector Compare Bounds Floating Point"), - SCAN_INSTRUCTION(vcmpeqfp, 0x100000C6, VXR , General , 0 , "Vector Compare Equal-to Floating Point"), - SCAN_INSTRUCTION(vcmpequb, 0x10000006, VXR , General , 0 , "Vector Compare Equal-to Unsigned Byte"), - SCAN_INSTRUCTION(vcmpequh, 0x10000046, VXR , General , 0 , "Vector Compare Equal-to Unsigned Half Word"), - SCAN_INSTRUCTION(vcmpequw, 0x10000086, VXR , General , 0 , "Vector Compare Equal-to Unsigned Word"), - SCAN_INSTRUCTION(vcmpgefp, 0x100001C6, VXR , General , 0 , "Vector Compare Greater-Than-or-Equal-to Floating Point"), - SCAN_INSTRUCTION(vcmpgtfp, 0x100002C6, VXR , General , 0 , "Vector Compare Greater-Than Floating Point"), - SCAN_INSTRUCTION(vcmpgtsb, 0x10000306, VXR , General , 0 , "Vector Compare Greater-Than Signed Byte"), - SCAN_INSTRUCTION(vcmpgtsh, 0x10000346, VXR , General , 0 , "Vector Compare Greater-Than Signed Half Word"), - SCAN_INSTRUCTION(vcmpgtsw, 0x10000386, VXR , General , 0 , "Vector Compare Greater-Than Signed Word"), - SCAN_INSTRUCTION(vcmpgtub, 0x10000206, VXR , General , 0 , "Vector Compare Greater-Than Unsigned Byte"), - SCAN_INSTRUCTION(vcmpgtuh, 0x10000246, VXR , General , 0 , "Vector Compare Greater-Than Unsigned Half Word"), - SCAN_INSTRUCTION(vcmpgtuw, 0x10000286, VXR , General , 0 , "Vector Compare Greater-Than Unsigned Word"), - SCAN_INSTRUCTION(vmaddfp, 0x1000002E, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Add Floating Point"), - SCAN_INSTRUCTION(vmhaddshs, 0x10000020, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-High and Add Signed Signed Half Word Saturate"), - SCAN_INSTRUCTION(vmhraddshs, 0x10000021, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-High Round and Add Signed Signed Half Word Saturate"), - SCAN_INSTRUCTION(vmladduhm, 0x10000022, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Low and Add Unsigned Half Word Modulo"), - SCAN_INSTRUCTION(vmsummbm, 0x10000025, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Mixed-Sign Byte Modulo"), - SCAN_INSTRUCTION(vmsumshm, 0x10000028, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Signed Half Word Modulo"), - SCAN_INSTRUCTION(vmsumshs, 0x10000029, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Signed Half Word Saturate"), - SCAN_INSTRUCTION(vmsumubm, 0x10000024, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Unsigned Byte Modulo"), - SCAN_INSTRUCTION(vmsumuhm, 0x10000026, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Unsigned Half Word Modulo"), - SCAN_INSTRUCTION(vmsumuhs, 0x10000027, VXA , General , VXA_VD_VA_VB_VC , "Vector Multiply-Sum Unsigned Half Word Saturate"), - SCAN_INSTRUCTION(vnmsubfp, 0x1000002F, VXA , General , VXA_VD_VA_VB_VC , "Vector Negative Multiply-Subtract Floating Point"), - SCAN_INSTRUCTION(vperm, 0x1000002B, VXA , General , VXA_VD_VA_VB_VC , "Vector Permute"), - SCAN_INSTRUCTION(vsel, 0x1000002A, VXA , General , VXA_VD_VA_VB_VC , "Vector Conditional Select"), - SCAN_INSTRUCTION(vsldoi, 0x1000002C, VXA , General , VXA_VD_VA_VB_VC , "Vector Shift Left Double by Octet Immediate"), - SCAN_INSTRUCTION(lvsl128, VX128_1(4, 3), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 for Shift Left"), - SCAN_INSTRUCTION(lvsr128, VX128_1(4, 67), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 for Shift Right"), - SCAN_INSTRUCTION(lvewx128, VX128_1(4, 131), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Element Word Indexed"), - SCAN_INSTRUCTION(lvx128, VX128_1(4, 195), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Indexed"), - SCAN_INSTRUCTION(stvewx128, VX128_1(4, 387), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Element Word Indexed"), - SCAN_INSTRUCTION(stvx128, VX128_1(4, 451), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Indexed"), - SCAN_INSTRUCTION(lvxl128, VX128_1(4, 707), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Left Indexed"), - SCAN_INSTRUCTION(stvxl128, VX128_1(4, 963), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Indexed LRU"), - SCAN_INSTRUCTION(lvlx128, VX128_1(4, 1027), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Left Indexed LRU"), - SCAN_INSTRUCTION(lvrx128, VX128_1(4, 1091), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Right Indexed"), - SCAN_INSTRUCTION(stvlx128, VX128_1(4, 1283), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Left Indexed"), - SCAN_INSTRUCTION(stvrx128, VX128_1(4, 1347), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Right Indexed"), - SCAN_INSTRUCTION(lvlxl128, VX128_1(4, 1539), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Indexed LRU"), - SCAN_INSTRUCTION(lvrxl128, VX128_1(4, 1603), VX128_1 , General , VX1281_VD_RA0_RB, "Load Vector128 Right Indexed LRU"), - SCAN_INSTRUCTION(stvlxl128, VX128_1(4, 1795), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Left Indexed LRU"), - SCAN_INSTRUCTION(stvrxl128, VX128_1(4, 1859), VX128_1 , General , VX1281_VD_RA0_RB, "Store Vector128 Right Indexed LRU"), - SCAN_INSTRUCTION(vsldoi128, VX128_5(4, 16), VX128_5 , General , vsldoi128 , "Vector128 Shift Left Double by Octet Immediate"), - SCAN_INSTRUCTION(vperm128, VX128_2(5, 0), VX128_2 , General , VX1282_VD_VA_VB_VC, "Vector128 Permute"), - SCAN_INSTRUCTION(vaddfp128, VX128(5, 16), VX128 , General , VX128_VD_VA_VB , "Vector128 Add Floating Point"), - SCAN_INSTRUCTION(vsubfp128, VX128(5, 80), VX128 , General , VX128_VD_VA_VB , "Vector128 Subtract Floating Point"), - SCAN_INSTRUCTION(vmulfp128, VX128(5, 144), VX128 , General , VX128_VD_VA_VB , "Vector128 Multiply Floating-Point"), - SCAN_INSTRUCTION(vmaddfp128, VX128(5, 208), VX128 , General , VX128_VD_VA_VD_VB, "Vector128 Multiply Add Floating Point"), - SCAN_INSTRUCTION(vmaddcfp128, VX128(5, 272), VX128 , General , VX128_VD_VA_VD_VB, "Vector128 Multiply Add Floating Point"), - SCAN_INSTRUCTION(vnmsubfp128, VX128(5, 336), VX128 , General , VX128_VD_VA_VB , "Vector128 Negative Multiply-Subtract Floating Point"), - SCAN_INSTRUCTION(vmsum3fp128, VX128(5, 400), VX128 , General , VX128_VD_VA_VB , "Vector128 Multiply Sum 3-way Floating Point"), - SCAN_INSTRUCTION(vmsum4fp128, VX128(5, 464), VX128 , General , VX128_VD_VA_VB , "Vector128 Multiply Sum 4-way Floating-Point"), - SCAN_INSTRUCTION(vpkshss128, VX128(5, 512), VX128 , General , 0 , "Vector128 Pack Signed Half Word Signed Saturate"), - SCAN_INSTRUCTION(vand128, VX128(5, 528), VX128 , General , VX128_VD_VA_VB , "Vector128 Logical AND"), - SCAN_INSTRUCTION(vpkshus128, VX128(5, 576), VX128 , General , 0 , "Vector128 Pack Signed Half Word Unsigned Saturate"), - SCAN_INSTRUCTION(vandc128, VX128(5, 592), VX128 , General , VX128_VD_VA_VB , "Vector128 Logical AND with Complement"), - SCAN_INSTRUCTION(vpkswss128, VX128(5, 640), VX128 , General , 0 , "Vector128 Pack Signed Word Signed Saturate"), - SCAN_INSTRUCTION(vnor128, VX128(5, 656), VX128 , General , VX128_VD_VA_VB , "Vector128 Logical NOR"), - SCAN_INSTRUCTION(vpkswus128, VX128(5, 704), VX128 , General , 0 , "Vector128 Pack Signed Word Unsigned Saturate"), - SCAN_INSTRUCTION(vor128, VX128(5, 720), VX128 , General , VX128_VD_VA_VB , "Vector128 Logical OR"), - SCAN_INSTRUCTION(vpkuhum128, VX128(5, 768), VX128 , General , 0 , "Vector128 Pack Unsigned Half Word Unsigned Modulo"), - SCAN_INSTRUCTION(vxor128, VX128(5, 784), VX128 , General , VX128_VD_VA_VB , "Vector128 Logical XOR"), - SCAN_INSTRUCTION(vpkuhus128, VX128(5, 832), VX128 , General , 0 , "Vector128 Pack Unsigned Half Word Unsigned Saturate"), - SCAN_INSTRUCTION(vsel128, VX128(5, 848), VX128 , General , 0 , "Vector128 Conditional Select"), - SCAN_INSTRUCTION(vpkuwum128, VX128(5, 896), VX128 , General , 0 , "Vector128 Pack Unsigned Word Unsigned Modulo"), - SCAN_INSTRUCTION(vslo128, VX128(5, 912), VX128 , General , 0 , "Vector128 Shift Left Octet"), - SCAN_INSTRUCTION(vpkuwus128, VX128(5, 960), VX128 , General , 0 , "Vector128 Pack Unsigned Word Unsigned Saturate"), - SCAN_INSTRUCTION(vsro128, VX128(5, 976), VX128 , General , VX128_VD_VA_VB , "Vector128 Shift Right Octet"), - SCAN_INSTRUCTION(vpermwi128, VX128_P(6, 528), VX128_P , General , vpermwi128 , "Vector128 Permutate Word Immediate"), - SCAN_INSTRUCTION(vcfpsxws128, VX128_3(6, 560), VX128_3 , General , VX1283_VD_VB_I , "Vector128 Convert From Floating-Point to Signed Fixed-Point Word Saturate"), - SCAN_INSTRUCTION(vcfpuxws128, VX128_3(6, 624), VX128_3 , General , 0 , "Vector128 Convert From Floating-Point to Unsigned Fixed-Point Word Saturate"), - SCAN_INSTRUCTION(vcsxwfp128, VX128_3(6, 688), VX128_3 , General , VX1283_VD_VB_I , "Vector128 Convert From Signed Fixed-Point Word to Floating-Point"), - SCAN_INSTRUCTION(vcuxwfp128, VX128_3(6, 752), VX128_3 , General , 0 , "Vector128 Convert From Unsigned Fixed-Point Word to Floating-Point"), - SCAN_INSTRUCTION(vrfim128, VX128_3(6, 816), VX128_3 , General , 0 , "Vector128 Round to Floating-Point Integer toward -Infinity"), - SCAN_INSTRUCTION(vrfin128, VX128_3(6, 880), VX128_3 , General , vrfin128 , "Vector128 Round to Floating-Point Integer Nearest"), - SCAN_INSTRUCTION(vrfip128, VX128_3(6, 944), VX128_3 , General , 0 , "Vector128 Round to Floating-Point Integer toward +Infinity"), - SCAN_INSTRUCTION(vrfiz128, VX128_3(6, 1008), VX128_3 , General , 0 , "Vector128 Round to Floating-Point Integer toward Zero"), - SCAN_INSTRUCTION(vpkd3d128, VX128_4(6, 1552), VX128_4 , General , 0 , "Vector128 Pack D3Dtype, Rotate Left Immediate and Mask Insert"), - SCAN_INSTRUCTION(vrefp128, VX128_3(6, 1584), VX128_3 , General , 0 , "Vector128 Reciprocal Estimate Floating Point"), - SCAN_INSTRUCTION(vrsqrtefp128, VX128_3(6, 1648), VX128_3 , General , VX1283_VD_VB , "Vector128 Reciprocal Square Root Estimate Floating Point"), - SCAN_INSTRUCTION(vexptefp128, VX128_3(6, 1712), VX128_3 , General , 0 , "Vector128 Log2 Estimate Floating Point"), - SCAN_INSTRUCTION(vlogefp128, VX128_3(6, 1776), VX128_3 , General , 0 , "Vector128 Log2 Estimate Floating Point"), - SCAN_INSTRUCTION(vrlimi128, VX128_4(6, 1808), VX128_4 , General , vrlimi128 , "Vector128 Rotate Left Immediate and Mask Insert"), - SCAN_INSTRUCTION(vspltw128, VX128_3(6, 1840), VX128_3 , General , VX1283_VD_VB_I , "Vector128 Splat Word"), - SCAN_INSTRUCTION(vspltisw128, VX128_3(6, 1904), VX128_3 , General , VX1283_VD_VB_I , "Vector128 Splat Immediate Signed Word"), - SCAN_INSTRUCTION(vupkd3d128, VX128_3(6, 2032), VX128_3 , General , VX1283_VD_VB_I , "Vector128 Unpack D3Dtype"), - SCAN_INSTRUCTION(vcmpeqfp128, VX128_R(6, 0), VX128_R , General , VX128_VD_VA_VB , "Vector128 Compare Equal-to Floating Point"), - SCAN_INSTRUCTION(vrlw128, VX128(6, 80), VX128 , General , 0 , "Vector128 Rotate Left Word"), - SCAN_INSTRUCTION(vcmpgefp128, VX128_R(6, 128), VX128_R , General , 0 , "Vector128 Compare Greater-Than-or-Equal-to Floating Point"), - SCAN_INSTRUCTION(vslw128, VX128(6, 208), VX128 , General , VX128_VD_VA_VB , "Vector128 Shift Left Integer Word"), - SCAN_INSTRUCTION(vcmpgtfp128, VX128_R(6, 256), VX128_R , General , 0 , "Vector128 Compare Greater-Than Floating-Point"), - SCAN_INSTRUCTION(vsraw128, VX128(6, 336), VX128 , General , VX128_VD_VA_VB , "Vector128 Shift Right Arithmetic Word"), - SCAN_INSTRUCTION(vcmpbfp128, VX128_R(6, 384), VX128_R , General , 0 , "Vector128 Compare Bounds Floating Point"), - SCAN_INSTRUCTION(vsrw128, VX128(6, 464), VX128 , General , VX128_VD_VA_VB , "Vector128 Shift Right Word"), - SCAN_INSTRUCTION(vcmpequw128, VX128_R(6, 512), VX128_R , General , VX128_VD_VA_VB , "Vector128 Compare Equal-to Unsigned Word"), - SCAN_INSTRUCTION(vmaxfp128, VX128(6, 640), VX128 , General , 0 , "Vector128 Maximum Floating Point"), - SCAN_INSTRUCTION(vminfp128, VX128(6, 704), VX128 , General , 0 , "Vector128 Minimum Floating Point"), - SCAN_INSTRUCTION(vmrghw128, VX128(6, 768), VX128 , General , VX128_VD_VA_VB , "Vector128 Merge High Word"), - SCAN_INSTRUCTION(vmrglw128, VX128(6, 832), VX128 , General , VX128_VD_VA_VB , "Vector128 Merge Low Word"), - SCAN_INSTRUCTION(vupkhsb128, VX128(6, 896), VX128 , General , 0 , "Vector128 Unpack High Signed Byte"), - SCAN_INSTRUCTION(vupklsb128, VX128(6, 960), VX128 , General , 0 , "Vector128 Unpack Low Signed Byte"), + SCAN_INSTRUCTION(vcmpbfp, 0x100003C6, VXR, General, 0, + "Vector Compare Bounds Floating Point"), + SCAN_INSTRUCTION(vcmpeqfp, 0x100000C6, VXR, General, 0, + "Vector Compare Equal-to Floating Point"), + SCAN_INSTRUCTION(vcmpequb, 0x10000006, VXR, General, 0, + "Vector Compare Equal-to Unsigned Byte"), + SCAN_INSTRUCTION(vcmpequh, 0x10000046, VXR, General, 0, + "Vector Compare Equal-to Unsigned Half Word"), + SCAN_INSTRUCTION(vcmpequw, 0x10000086, VXR, General, 0, + "Vector Compare Equal-to Unsigned Word"), + SCAN_INSTRUCTION(vcmpgefp, 0x100001C6, VXR, General, 0, + "Vector Compare Greater-Than-or-Equal-to Floating Point"), + SCAN_INSTRUCTION(vcmpgtfp, 0x100002C6, VXR, General, 0, + "Vector Compare Greater-Than Floating Point"), + SCAN_INSTRUCTION(vcmpgtsb, 0x10000306, VXR, General, 0, + "Vector Compare Greater-Than Signed Byte"), + SCAN_INSTRUCTION(vcmpgtsh, 0x10000346, VXR, General, 0, + "Vector Compare Greater-Than Signed Half Word"), + SCAN_INSTRUCTION(vcmpgtsw, 0x10000386, VXR, General, 0, + "Vector Compare Greater-Than Signed Word"), + SCAN_INSTRUCTION(vcmpgtub, 0x10000206, VXR, General, 0, + "Vector Compare Greater-Than Unsigned Byte"), + SCAN_INSTRUCTION(vcmpgtuh, 0x10000246, VXR, General, 0, + "Vector Compare Greater-Than Unsigned Half Word"), + SCAN_INSTRUCTION(vcmpgtuw, 0x10000286, VXR, General, 0, + "Vector Compare Greater-Than Unsigned Word"), + SCAN_INSTRUCTION(vmaddfp, 0x1000002E, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Add Floating Point"), + SCAN_INSTRUCTION( + vmhaddshs, 0x10000020, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-High and Add Signed Signed Half Word Saturate"), + SCAN_INSTRUCTION( + vmhraddshs, 0x10000021, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-High Round and Add Signed Signed Half Word Saturate"), + SCAN_INSTRUCTION(vmladduhm, 0x10000022, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Low and Add Unsigned Half Word Modulo"), + SCAN_INSTRUCTION(vmsummbm, 0x10000025, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Mixed-Sign Byte Modulo"), + SCAN_INSTRUCTION(vmsumshm, 0x10000028, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Signed Half Word Modulo"), + SCAN_INSTRUCTION(vmsumshs, 0x10000029, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Signed Half Word Saturate"), + SCAN_INSTRUCTION(vmsumubm, 0x10000024, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Unsigned Byte Modulo"), + SCAN_INSTRUCTION(vmsumuhm, 0x10000026, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Unsigned Half Word Modulo"), + SCAN_INSTRUCTION(vmsumuhs, 0x10000027, VXA, General, VXA_VD_VA_VB_VC, + "Vector Multiply-Sum Unsigned Half Word Saturate"), + SCAN_INSTRUCTION(vnmsubfp, 0x1000002F, VXA, General, VXA_VD_VA_VB_VC, + "Vector Negative Multiply-Subtract Floating Point"), + SCAN_INSTRUCTION(vperm, 0x1000002B, VXA, General, VXA_VD_VA_VB_VC, + "Vector Permute"), + SCAN_INSTRUCTION(vsel, 0x1000002A, VXA, General, VXA_VD_VA_VB_VC, + "Vector Conditional Select"), + SCAN_INSTRUCTION(vsldoi, 0x1000002C, VXA, General, VXA_VD_VA_VB_VC, + "Vector Shift Left Double by Octet Immediate"), + SCAN_INSTRUCTION(lvsl128, VX128_1(4, 3), VX128_1, General, VX1281_VD_RA0_RB, + "Load Vector128 for Shift Left"), + SCAN_INSTRUCTION(lvsr128, VX128_1(4, 67), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 for Shift Right"), + SCAN_INSTRUCTION(lvewx128, VX128_1(4, 131), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Element Word Indexed"), + SCAN_INSTRUCTION(lvx128, VX128_1(4, 195), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Indexed"), + SCAN_INSTRUCTION(stvewx128, VX128_1(4, 387), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Element Word Indexed"), + SCAN_INSTRUCTION(stvx128, VX128_1(4, 451), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Indexed"), + SCAN_INSTRUCTION(lvxl128, VX128_1(4, 707), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Left Indexed"), + SCAN_INSTRUCTION(stvxl128, VX128_1(4, 963), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Indexed LRU"), + SCAN_INSTRUCTION(lvlx128, VX128_1(4, 1027), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Left Indexed LRU"), + SCAN_INSTRUCTION(lvrx128, VX128_1(4, 1091), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Right Indexed"), + SCAN_INSTRUCTION(stvlx128, VX128_1(4, 1283), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Left Indexed"), + SCAN_INSTRUCTION(stvrx128, VX128_1(4, 1347), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Right Indexed"), + SCAN_INSTRUCTION(lvlxl128, VX128_1(4, 1539), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Indexed LRU"), + SCAN_INSTRUCTION(lvrxl128, VX128_1(4, 1603), VX128_1, General, + VX1281_VD_RA0_RB, "Load Vector128 Right Indexed LRU"), + SCAN_INSTRUCTION(stvlxl128, VX128_1(4, 1795), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Left Indexed LRU"), + SCAN_INSTRUCTION(stvrxl128, VX128_1(4, 1859), VX128_1, General, + VX1281_VD_RA0_RB, "Store Vector128 Right Indexed LRU"), + SCAN_INSTRUCTION(vsldoi128, VX128_5(4, 16), VX128_5, General, vsldoi128, + "Vector128 Shift Left Double by Octet Immediate"), + SCAN_INSTRUCTION(vperm128, VX128_2(5, 0), VX128_2, General, + VX1282_VD_VA_VB_VC, "Vector128 Permute"), + SCAN_INSTRUCTION(vaddfp128, VX128(5, 16), VX128, General, VX128_VD_VA_VB, + "Vector128 Add Floating Point"), + SCAN_INSTRUCTION(vsubfp128, VX128(5, 80), VX128, General, VX128_VD_VA_VB, + "Vector128 Subtract Floating Point"), + SCAN_INSTRUCTION(vmulfp128, VX128(5, 144), VX128, General, VX128_VD_VA_VB, + "Vector128 Multiply Floating-Point"), + SCAN_INSTRUCTION(vmaddfp128, VX128(5, 208), VX128, General, + VX128_VD_VA_VD_VB, + "Vector128 Multiply Add Floating Point"), + SCAN_INSTRUCTION(vmaddcfp128, VX128(5, 272), VX128, General, + VX128_VD_VA_VD_VB, + "Vector128 Multiply Add Floating Point"), + SCAN_INSTRUCTION(vnmsubfp128, VX128(5, 336), VX128, General, VX128_VD_VA_VB, + "Vector128 Negative Multiply-Subtract Floating Point"), + SCAN_INSTRUCTION(vmsum3fp128, VX128(5, 400), VX128, General, VX128_VD_VA_VB, + "Vector128 Multiply Sum 3-way Floating Point"), + SCAN_INSTRUCTION(vmsum4fp128, VX128(5, 464), VX128, General, VX128_VD_VA_VB, + "Vector128 Multiply Sum 4-way Floating-Point"), + SCAN_INSTRUCTION(vpkshss128, VX128(5, 512), VX128, General, 0, + "Vector128 Pack Signed Half Word Signed Saturate"), + SCAN_INSTRUCTION(vand128, VX128(5, 528), VX128, General, VX128_VD_VA_VB, + "Vector128 Logical AND"), + SCAN_INSTRUCTION(vpkshus128, VX128(5, 576), VX128, General, 0, + "Vector128 Pack Signed Half Word Unsigned Saturate"), + SCAN_INSTRUCTION(vandc128, VX128(5, 592), VX128, General, VX128_VD_VA_VB, + "Vector128 Logical AND with Complement"), + SCAN_INSTRUCTION(vpkswss128, VX128(5, 640), VX128, General, 0, + "Vector128 Pack Signed Word Signed Saturate"), + SCAN_INSTRUCTION(vnor128, VX128(5, 656), VX128, General, VX128_VD_VA_VB, + "Vector128 Logical NOR"), + SCAN_INSTRUCTION(vpkswus128, VX128(5, 704), VX128, General, 0, + "Vector128 Pack Signed Word Unsigned Saturate"), + SCAN_INSTRUCTION(vor128, VX128(5, 720), VX128, General, VX128_VD_VA_VB, + "Vector128 Logical OR"), + SCAN_INSTRUCTION(vpkuhum128, VX128(5, 768), VX128, General, 0, + "Vector128 Pack Unsigned Half Word Unsigned Modulo"), + SCAN_INSTRUCTION(vxor128, VX128(5, 784), VX128, General, VX128_VD_VA_VB, + "Vector128 Logical XOR"), + SCAN_INSTRUCTION(vpkuhus128, VX128(5, 832), VX128, General, 0, + "Vector128 Pack Unsigned Half Word Unsigned Saturate"), + SCAN_INSTRUCTION(vsel128, VX128(5, 848), VX128, General, 0, + "Vector128 Conditional Select"), + SCAN_INSTRUCTION(vpkuwum128, VX128(5, 896), VX128, General, 0, + "Vector128 Pack Unsigned Word Unsigned Modulo"), + SCAN_INSTRUCTION(vslo128, VX128(5, 912), VX128, General, 0, + "Vector128 Shift Left Octet"), + SCAN_INSTRUCTION(vpkuwus128, VX128(5, 960), VX128, General, 0, + "Vector128 Pack Unsigned Word Unsigned Saturate"), + SCAN_INSTRUCTION(vsro128, VX128(5, 976), VX128, General, VX128_VD_VA_VB, + "Vector128 Shift Right Octet"), + SCAN_INSTRUCTION(vpermwi128, VX128_P(6, 528), VX128_P, General, vpermwi128, + "Vector128 Permutate Word Immediate"), + SCAN_INSTRUCTION(vcfpsxws128, VX128_3(6, 560), VX128_3, General, + VX1283_VD_VB_I, + "Vector128 Convert From Floating-Point to Signed " + "Fixed-Point Word Saturate"), + SCAN_INSTRUCTION(vcfpuxws128, VX128_3(6, 624), VX128_3, General, 0, + "Vector128 Convert From Floating-Point to Unsigned " + "Fixed-Point Word Saturate"), + SCAN_INSTRUCTION( + vcsxwfp128, VX128_3(6, 688), VX128_3, General, VX1283_VD_VB_I, + "Vector128 Convert From Signed Fixed-Point Word to Floating-Point"), + SCAN_INSTRUCTION( + vcuxwfp128, VX128_3(6, 752), VX128_3, General, 0, + "Vector128 Convert From Unsigned Fixed-Point Word to Floating-Point"), + SCAN_INSTRUCTION( + vrfim128, VX128_3(6, 816), VX128_3, General, 0, + "Vector128 Round to Floating-Point Integer toward -Infinity"), + SCAN_INSTRUCTION(vrfin128, VX128_3(6, 880), VX128_3, General, vrfin128, + "Vector128 Round to Floating-Point Integer Nearest"), + SCAN_INSTRUCTION( + vrfip128, VX128_3(6, 944), VX128_3, General, 0, + "Vector128 Round to Floating-Point Integer toward +Infinity"), + SCAN_INSTRUCTION(vrfiz128, VX128_3(6, 1008), VX128_3, General, 0, + "Vector128 Round to Floating-Point Integer toward Zero"), + SCAN_INSTRUCTION( + vpkd3d128, VX128_4(6, 1552), VX128_4, General, 0, + "Vector128 Pack D3Dtype, Rotate Left Immediate and Mask Insert"), + SCAN_INSTRUCTION(vrefp128, VX128_3(6, 1584), VX128_3, General, 0, + "Vector128 Reciprocal Estimate Floating Point"), + SCAN_INSTRUCTION( + vrsqrtefp128, VX128_3(6, 1648), VX128_3, General, VX1283_VD_VB, + "Vector128 Reciprocal Square Root Estimate Floating Point"), + SCAN_INSTRUCTION(vexptefp128, VX128_3(6, 1712), VX128_3, General, 0, + "Vector128 Log2 Estimate Floating Point"), + SCAN_INSTRUCTION(vlogefp128, VX128_3(6, 1776), VX128_3, General, 0, + "Vector128 Log2 Estimate Floating Point"), + SCAN_INSTRUCTION(vrlimi128, VX128_4(6, 1808), VX128_4, General, vrlimi128, + "Vector128 Rotate Left Immediate and Mask Insert"), + SCAN_INSTRUCTION(vspltw128, VX128_3(6, 1840), VX128_3, General, + VX1283_VD_VB_I, "Vector128 Splat Word"), + SCAN_INSTRUCTION(vspltisw128, VX128_3(6, 1904), VX128_3, General, + VX1283_VD_VB_I, "Vector128 Splat Immediate Signed Word"), + SCAN_INSTRUCTION(vupkd3d128, VX128_3(6, 2032), VX128_3, General, + VX1283_VD_VB_I, "Vector128 Unpack D3Dtype"), + SCAN_INSTRUCTION(vcmpeqfp128, VX128_R(6, 0), VX128_R, General, + VX128_VD_VA_VB, + "Vector128 Compare Equal-to Floating Point"), + SCAN_INSTRUCTION(vrlw128, VX128(6, 80), VX128, General, 0, + "Vector128 Rotate Left Word"), + SCAN_INSTRUCTION( + vcmpgefp128, + VX128_R(6, 128), VX128_R, General, 0, + "Vector128 Compare Greater-Than-or-Equal-to Floating Point"), + SCAN_INSTRUCTION(vslw128, VX128(6, 208), VX128, General, VX128_VD_VA_VB, + "Vector128 Shift Left Integer Word"), + SCAN_INSTRUCTION(vcmpgtfp128, VX128_R(6, 256), VX128_R, General, 0, + "Vector128 Compare Greater-Than Floating-Point"), + SCAN_INSTRUCTION(vsraw128, VX128(6, 336), VX128, General, VX128_VD_VA_VB, + "Vector128 Shift Right Arithmetic Word"), + SCAN_INSTRUCTION(vcmpbfp128, VX128_R(6, 384), VX128_R, General, 0, + "Vector128 Compare Bounds Floating Point"), + SCAN_INSTRUCTION(vsrw128, VX128(6, 464), VX128, General, VX128_VD_VA_VB, + "Vector128 Shift Right Word"), + SCAN_INSTRUCTION(vcmpequw128, VX128_R(6, 512), VX128_R, General, + VX128_VD_VA_VB, + "Vector128 Compare Equal-to Unsigned Word"), + SCAN_INSTRUCTION(vmaxfp128, VX128(6, 640), VX128, General, 0, + "Vector128 Maximum Floating Point"), + SCAN_INSTRUCTION(vminfp128, VX128(6, 704), VX128, General, 0, + "Vector128 Minimum Floating Point"), + SCAN_INSTRUCTION(vmrghw128, VX128(6, 768), VX128, General, VX128_VD_VA_VB, + "Vector128 Merge High Word"), + SCAN_INSTRUCTION(vmrglw128, VX128(6, 832), VX128, General, VX128_VD_VA_VB, + "Vector128 Merge Low Word"), + SCAN_INSTRUCTION(vupkhsb128, VX128(6, 896), VX128, General, 0, + "Vector128 Unpack High Signed Byte"), + SCAN_INSTRUCTION(vupklsb128, VX128(6, 960), VX128, General, 0, + "Vector128 Unpack Low Signed Byte"), }; #undef OP #undef VX128 @@ -702,16 +1080,13 @@ static InstrType instr_table_scan[] = { #undef VX128_5 #undef VX128_P - #undef FLAG #undef INSTRUCTION #undef EMPTY - } // namespace tables } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_INSTR_TABLES_H_ diff --git a/src/alloy/frontend/ppc/ppc_scanner.cc b/src/alloy/frontend/ppc/ppc_scanner.cc index 9658bd595..ef180dfcf 100644 --- a/src/alloy/frontend/ppc/ppc_scanner.cc +++ b/src/alloy/frontend/ppc/ppc_scanner.cc @@ -16,18 +16,15 @@ #include #include -using namespace alloy; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; -using namespace alloy::runtime; +namespace alloy { +namespace frontend { +namespace ppc { +using alloy::runtime::FunctionInfo; -PPCScanner::PPCScanner(PPCFrontend* frontend) : - frontend_(frontend) { -} +PPCScanner::PPCScanner(PPCFrontend* frontend) : frontend_(frontend) {} -PPCScanner::~PPCScanner() { -} +PPCScanner::~PPCScanner() {} bool PPCScanner::IsRestGprLr(uint64_t address) { FunctionInfo* symbol_info; @@ -80,9 +77,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // Check if the function starts with a mfspr lr, as that's a good indication // of whether or not this is a normal function with a prolog/epilog. // Some valid leaf functions won't have this, but most will. - if (address == start_address && - i.type && - i.type->opcode == 0x7C0002A6 && + if (address == start_address && i.type && i.type->opcode == 0x7C0002A6 && (((i.XFX.spr & 0x1F) << 5) | ((i.XFX.spr >> 5) & 0x1F)) == 8) { starts_with_mfspr_lr = true; } @@ -104,8 +99,8 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // This is generally a return. if (furthest_target > address) { // Remaining targets within function, not end. - XELOGSDB("ignoring blr %.8X (branch to %.8X)", - address, furthest_target); + XELOGSDB("ignoring blr %.8X (branch to %.8X)", address, + furthest_target); } else { // Function end point. XELOGSDB("function end %.8X", address); @@ -131,7 +126,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // b/ba/bl/bla uint32_t target = (uint32_t)XEEXTS26(i.I.LI << 2) + (i.I.AA ? 0 : (int32_t)address); - + if (i.I.LK) { XELOGSDB("bl %.8X -> %.8X", address, target); // Queue call target if needed. @@ -142,16 +137,15 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // If the target is back into the function and there's no further target // we are at the end of a function. // (Indirect branches may still go beyond, but no way of knowing). - if (target >= start_address && - target < address && furthest_target <= address) { + if (target >= start_address && target < address && + furthest_target <= address) { XELOGSDB("function end %.8X (back b)", address); ends_fn = true; } // If the target is not a branch and it goes to before the current // address it's definitely a tail call. - if (!ends_fn && - target < start_address && furthest_target <= address) { + if (!ends_fn && target < start_address && furthest_target <= address) { XELOGSDB("function end %.8X (back b before addr)", address); ends_fn = true; } @@ -160,9 +154,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // Note that sometimes functions stick this in a basic block *inside* // of the function somewhere, so ensure we don't have any branches over // it. - if (!ends_fn && - furthest_target <= address && - IsRestGprLr(target)) { + if (!ends_fn && furthest_target <= address && IsRestGprLr(target)) { XELOGSDB("function end %.8X (__restgprlr_*)", address); ends_fn = true; } @@ -174,9 +166,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // b KeBugCheck // This check may hit on functions that jump over data code, so only // trigger this check in leaf functions (no mfspr lr/prolog). - if (!ends_fn && - !starts_with_mfspr_lr && - blocks_found == 1) { + if (!ends_fn && !starts_with_mfspr_lr && blocks_found == 1) { XELOGSDB("HEURISTIC: ending at simple leaf thunk %.8X", address); ends_fn = true; } @@ -206,7 +196,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // TODO(benvanik): perhaps queue up for a speculative check? I think // we are running over tail-call functions here that branch to // somewhere else. - //GetOrInsertFunction(target); + // GetOrInsertFunction(target); } } ends_block = true; @@ -220,7 +210,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // Queue call target if needed. // TODO(benvanik): see if this is correct - not sure anyone makes // function calls with bcl. - //GetOrInsertFunction(target); + // GetOrInsertFunction(target); } else { XELOGSDB("bc %.8X -> %.8X", address, target); @@ -259,8 +249,8 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { address += 4; if (end_address && address > end_address) { // Hmm.... - XELOGSDB("Ran over function bounds! %.8X-%.8X", - start_address, end_address); + XELOGSDB("Ran over function bounds! %.8X-%.8X", start_address, + end_address); break; } } @@ -270,8 +260,8 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) { // from someplace valid (like method hints) this may indicate an error. // It's also possible that we guessed in hole-filling and there's another // function below this one. - XELOGSDB("Function ran under: %.8X-%.8X ended at %.8X", - start_address, end_address, address + 4); + XELOGSDB("Function ran under: %.8X-%.8X ended at %.8X", start_address, + end_address, address + 4); } symbol_info->set_end_address(address); @@ -300,8 +290,7 @@ std::vector PPCScanner::FindBlocks(FunctionInfo* symbol_info) { bool in_block = false; uint64_t block_start = 0; InstrData i; - for (uint64_t address = start_address; - address <= end_address; address += 4) { + for (uint64_t address = start_address; address <= end_address; address += 4) { i.address = address; i.code = XEGETUINT32BE(p + address); if (!i.code) { @@ -330,12 +319,12 @@ std::vector PPCScanner::FindBlocks(FunctionInfo* symbol_info) { ends_block = true; } else if (i.type->opcode == 0x48000000) { // b/ba/bl/bla - //uint32_t target = + // uint32_t target = // (uint32_t)XEEXTS26(i.I.LI << 2) + (i.I.AA ? 0 : (int32_t)address); ends_block = true; } else if (i.type->opcode == 0x40000000) { // bc/bca/bcl/bcla - //uint32_t target = + // uint32_t target = // (uint32_t)XEEXTS16(i.B.BD << 2) + (i.B.AA ? 0 : (int32_t)address); ends_block = true; } else if (i.type->opcode == 0x4C000020) { @@ -349,16 +338,14 @@ std::vector PPCScanner::FindBlocks(FunctionInfo* symbol_info) { if (ends_block) { in_block = false; block_map[block_start] = { - block_start, - address, + block_start, address, }; } } if (in_block) { block_map[block_start] = { - block_start, - end_address, + block_start, end_address, }; } @@ -368,3 +355,7 @@ std::vector PPCScanner::FindBlocks(FunctionInfo* symbol_info) { } return blocks; } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_scanner.h b/src/alloy/frontend/ppc/ppc_scanner.h index 1498cab16..deb51dcdf 100644 --- a/src/alloy/frontend/ppc/ppc_scanner.h +++ b/src/alloy/frontend/ppc/ppc_scanner.h @@ -13,7 +13,6 @@ #include #include - namespace alloy { namespace frontend { namespace ppc { @@ -25,9 +24,8 @@ typedef struct BlockInfo_t { uint64_t end_address; } BlockInfo; - class PPCScanner { -public: + public: PPCScanner(PPCFrontend* frontend); ~PPCScanner(); @@ -35,17 +33,15 @@ public: std::vector FindBlocks(runtime::FunctionInfo* symbol_info); -private: + private: bool IsRestGprLr(uint64_t address); -private: + private: PPCFrontend* frontend_; }; - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_SCANNER_H_ diff --git a/src/alloy/frontend/ppc/ppc_translator.cc b/src/alloy/frontend/ppc/ppc_translator.cc index 4f879336c..cf6e22dde 100644 --- a/src/alloy/frontend/ppc/ppc_translator.cc +++ b/src/alloy/frontend/ppc/ppc_translator.cc @@ -19,17 +19,20 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::compiler; -using namespace alloy::frontend; -using namespace alloy::frontend::ppc; -using namespace alloy::hir; +namespace alloy { +namespace frontend { +namespace ppc { + +// TODO(benvanik): remove when enums redefined. using namespace alloy::runtime; +using alloy::backend::Backend; +using alloy::compiler::Compiler; +using alloy::runtime::Function; +using alloy::runtime::FunctionInfo; +namespace passes = alloy::compiler::passes; -PPCTranslator::PPCTranslator(PPCFrontend* frontend) : - frontend_(frontend) { +PPCTranslator::PPCTranslator(PPCFrontend* frontend) : frontend_(frontend) { Backend* backend = frontend->runtime()->backend(); scanner_ = new PPCScanner(frontend); @@ -54,21 +57,21 @@ PPCTranslator::PPCTranslator(PPCFrontend* frontend) : if (validate) compiler_->AddPass(new passes::ValidationPass()); compiler_->AddPass(new passes::SimplificationPass()); if (validate) compiler_->AddPass(new passes::ValidationPass()); - //compiler_->AddPass(new passes::DeadStoreEliminationPass()); - //if (validate) compiler_->AddPass(new passes::ValidationPass()); + // compiler_->AddPass(new passes::DeadStoreEliminationPass()); + // if (validate) compiler_->AddPass(new passes::ValidationPass()); compiler_->AddPass(new passes::DeadCodeEliminationPass()); if (validate) compiler_->AddPass(new passes::ValidationPass()); //// Removes all unneeded variables. Try not to add new ones after this. - //compiler_->AddPass(new passes::ValueReductionPass()); - //if (validate) compiler_->AddPass(new passes::ValidationPass()); + // compiler_->AddPass(new passes::ValueReductionPass()); + // if (validate) compiler_->AddPass(new passes::ValidationPass()); // Register allocation for the target backend. // Will modify the HIR to add loads/stores. // This should be the last pass before finalization, as after this all // registers are assigned and ready to be emitted. - compiler_->AddPass(new passes::RegisterAllocationPass( - backend->machine_info())); + compiler_->AddPass( + new passes::RegisterAllocationPass(backend->machine_info())); if (validate) compiler_->AddPass(new passes::ValidationPass()); // Must come last. The HIR is not really HIR after this. @@ -82,10 +85,9 @@ PPCTranslator::~PPCTranslator() { delete scanner_; } -int PPCTranslator::Translate( - FunctionInfo* symbol_info, - uint32_t debug_info_flags, - Function** out_function) { +int PPCTranslator::Translate(FunctionInfo* symbol_info, + uint32_t debug_info_flags, + Function** out_function) { SCOPE_profile_cpu_f("alloy"); // Scan the function to find its extents. We only need to do this if we @@ -139,10 +141,8 @@ int PPCTranslator::Translate( } // Assemble to backend machine code. - result = assembler_->Assemble( - symbol_info, builder_, - debug_info_flags, debug_info, - out_function); + result = assembler_->Assemble(symbol_info, builder_, debug_info_flags, + debug_info, out_function); XEEXPECTZERO(result); result = 0; @@ -158,15 +158,14 @@ XECLEANUP: return result; }; -void PPCTranslator::DumpSource( - runtime::FunctionInfo* symbol_info, StringBuffer* string_buffer) { +void PPCTranslator::DumpSource(runtime::FunctionInfo* symbol_info, + StringBuffer* string_buffer) { Memory* memory = frontend_->memory(); const uint8_t* p = memory->membase(); - string_buffer->Append("%s fn %.8X-%.8X %s\n", - symbol_info->module()->name(), - symbol_info->address(), symbol_info->end_address(), - symbol_info->name()); + string_buffer->Append("%s fn %.8X-%.8X %s\n", symbol_info->module()->name(), + symbol_info->address(), symbol_info->end_address(), + symbol_info->name()); auto blocks = scanner_->FindBlocks(symbol_info); @@ -182,10 +181,8 @@ void PPCTranslator::DumpSource( i.type = GetInstrType(i.code); // Check labels. - if (block_it != blocks.end() && - block_it->start_address == address) { - string_buffer->Append( - "%.8X loc_%.8X:\n", address, address); + if (block_it != blocks.end() && block_it->start_address == address) { + string_buffer->Append("%.8X loc_%.8X:\n", address, address); ++block_it; } @@ -194,3 +191,7 @@ void PPCTranslator::DumpSource( string_buffer->Append("\n"); } } + +} // namespace ppc +} // namespace frontend +} // namespace alloy diff --git a/src/alloy/frontend/ppc/ppc_translator.h b/src/alloy/frontend/ppc/ppc_translator.h index 9977a56e5..868ad5aeb 100644 --- a/src/alloy/frontend/ppc/ppc_translator.h +++ b/src/alloy/frontend/ppc/ppc_translator.h @@ -15,7 +15,6 @@ #include #include - namespace alloy { namespace frontend { namespace ppc { @@ -24,34 +23,30 @@ class PPCFrontend; class PPCHIRBuilder; class PPCScanner; - class PPCTranslator { -public: + public: PPCTranslator(PPCFrontend* frontend); ~PPCTranslator(); - int Translate(runtime::FunctionInfo* symbol_info, - uint32_t debug_info_flags, + int Translate(runtime::FunctionInfo* symbol_info, uint32_t debug_info_flags, runtime::Function** out_function); -private: + private: void DumpSource(runtime::FunctionInfo* symbol_info, StringBuffer* string_buffer); -private: - PPCFrontend* frontend_; - PPCScanner* scanner_; - PPCHIRBuilder* builder_; - compiler::Compiler* compiler_; - backend::Assembler* assembler_; + private: + PPCFrontend* frontend_; + PPCScanner* scanner_; + PPCHIRBuilder* builder_; + compiler::Compiler* compiler_; + backend::Assembler* assembler_; - StringBuffer string_buffer_; + StringBuffer string_buffer_; }; - } // namespace ppc } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_PPC_PPC_TRANSLATOR_H_ diff --git a/src/alloy/frontend/tracing.h b/src/alloy/frontend/tracing.h index ad9e8dae7..66a445a4b 100644 --- a/src/alloy/frontend/tracing.h +++ b/src/alloy/frontend/tracing.h @@ -13,18 +13,16 @@ #include #include - namespace alloy { namespace frontend { const uint32_t ALLOY_FRONTEND = alloy::tracing::EventType::ALLOY_FRONTEND; - class EventType { -public: + public: enum { - ALLOY_FRONTEND_INIT = ALLOY_FRONTEND | (1), - ALLOY_FRONTEND_DEINIT = ALLOY_FRONTEND | (2), + ALLOY_FRONTEND_INIT = ALLOY_FRONTEND | (1), + ALLOY_FRONTEND_DEINIT = ALLOY_FRONTEND | (2), }; typedef struct Init_s { @@ -35,9 +33,7 @@ public: } Deinit; }; - } // namespace frontend } // namespace alloy - #endif // ALLOY_FRONTEND_TRACING_H_ diff --git a/src/alloy/hir/block.cc b/src/alloy/hir/block.cc index ebace67fa..60e9f988d 100644 --- a/src/alloy/hir/block.cc +++ b/src/alloy/hir/block.cc @@ -11,9 +11,8 @@ #include -using namespace alloy; -using namespace alloy::hir; - +namespace alloy { +namespace hir { void Block::AssertNoCycles() { Instr* hare = instr_head; @@ -37,3 +36,6 @@ void Block::AssertNoCycles() { } } } + +} // namespace hir +} // namespace alloy diff --git a/src/alloy/hir/block.h b/src/alloy/hir/block.h index f60dd83c5..4d2df2e9a 100644 --- a/src/alloy/hir/block.h +++ b/src/alloy/hir/block.h @@ -14,7 +14,6 @@ XEDECLARECLASS1(llvm, BitVector); - namespace alloy { namespace hir { @@ -23,14 +22,14 @@ class HIRBuilder; class Instr; class Label; - class Edge { -public: + public: enum EdgeFlags { UNCONDITIONAL = (1 << 0), DOMINATES = (1 << 1), }; -public: + + public: Edge* outgoing_next; Edge* outgoing_prev; Edge* incoming_next; @@ -42,9 +41,8 @@ public: uint32_t flags; }; - class Block { -public: + public: Arena* arena; Block* next; @@ -65,9 +63,7 @@ public: void AssertNoCycles(); }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_BLOCK_H_ diff --git a/src/alloy/hir/hir_builder.cc b/src/alloy/hir/hir_builder.cc index de0ce4a34..3cd66c157 100644 --- a/src/alloy/hir/hir_builder.cc +++ b/src/alloy/hir/hir_builder.cc @@ -14,10 +14,10 @@ #include #include -using namespace alloy; -using namespace alloy::hir; -using namespace alloy::runtime; +namespace alloy { +namespace hir { +using alloy::runtime::FunctionInfo; #define ASSERT_ADDRESS_TYPE(value) #define ASSERT_INTEGER_TYPE(value) @@ -26,7 +26,6 @@ using namespace alloy::runtime; #define ASSERT_VECTOR_TYPE(value) #define ASSERT_TYPES_EQUAL(value1, value2) - HIRBuilder::HIRBuilder() { arena_ = new Arena(); Reset(); @@ -74,7 +73,7 @@ int HIRBuilder::Finalize() { // No following block. // Sometimes VC++ generates functions with bl at the end even if they // will never return. Just add a return to satisfy things. - //XELOGW("Fall-through out of the function."); + // XELOGW("Fall-through out of the function."); Trap(); Return(); current_block_ = NULL; @@ -91,22 +90,36 @@ int HIRBuilder::Finalize() { void HIRBuilder::DumpValue(StringBuffer* str, Value* value) { if (value->IsConstant()) { switch (value->type) { - case INT8_TYPE: str->Append("%X", value->constant.i8); break; - case INT16_TYPE: str->Append("%X", value->constant.i16); break; - case INT32_TYPE: str->Append("%X", value->constant.i32); break; - case INT64_TYPE: str->Append("%llX", value->constant.i64); break; - case FLOAT32_TYPE: str->Append("%F", value->constant.f32); break; - case FLOAT64_TYPE: str->Append("%F", value->constant.f64); break; - case VEC128_TYPE: str->Append("(%F,%F,%F,%F)", - value->constant.v128.x, - value->constant.v128.y, - value->constant.v128.z, - value->constant.v128.w); break; - default: XEASSERTALWAYS(); break; + case INT8_TYPE: + str->Append("%X", value->constant.i8); + break; + case INT16_TYPE: + str->Append("%X", value->constant.i16); + break; + case INT32_TYPE: + str->Append("%X", value->constant.i32); + break; + case INT64_TYPE: + str->Append("%llX", value->constant.i64); + break; + case FLOAT32_TYPE: + str->Append("%F", value->constant.f32); + break; + case FLOAT64_TYPE: + str->Append("%F", value->constant.f64); + break; + case VEC128_TYPE: + str->Append("(%F,%F,%F,%F)", value->constant.v128.x, + value->constant.v128.y, value->constant.v128.z, + value->constant.v128.w); + break; + default: + XEASSERTALWAYS(); + break; } } else { static const char* type_names[] = { - "i8", "i16", "i32", "i64", "f32", "f64", "v128", + "i8", "i16", "i32", "i64", "f32", "f64", "v128", }; str->Append("v%d.%s", value->ordinal, type_names[value->type]); } @@ -115,30 +128,30 @@ void HIRBuilder::DumpValue(StringBuffer* str, Value* value) { } } -void HIRBuilder::DumpOp( - StringBuffer* str, OpcodeSignatureType sig_type, Instr::Op* op) { +void HIRBuilder::DumpOp(StringBuffer* str, OpcodeSignatureType sig_type, + Instr::Op* op) { switch (sig_type) { - case OPCODE_SIG_TYPE_X: - break; - case OPCODE_SIG_TYPE_L: - if (op->label->name) { - str->Append(op->label->name); - } else { - str->Append("label%d", op->label->id); - } - break; - case OPCODE_SIG_TYPE_O: - str->Append("+%lld", op->offset); - break; - case OPCODE_SIG_TYPE_S: - if (true) { - auto target = op->symbol_info; - str->Append(target->name() ? target->name() : ""); - } - break; - case OPCODE_SIG_TYPE_V: - DumpValue(str, op->value); - break; + case OPCODE_SIG_TYPE_X: + break; + case OPCODE_SIG_TYPE_L: + if (op->label->name) { + str->Append(op->label->name); + } else { + str->Append("label%d", op->label->id); + } + break; + case OPCODE_SIG_TYPE_O: + str->Append("+%lld", op->offset); + break; + case OPCODE_SIG_TYPE_S: + if (true) { + auto target = op->symbol_info; + str->Append(target->name() ? target->name() : ""); + } + break; + case OPCODE_SIG_TYPE_V: + DumpValue(str, op->value); + break; } } @@ -184,8 +197,7 @@ void HIRBuilder::Dump(StringBuffer* str) { } else if (src_label) { str->Append(" ; in: label%d", src_label->id); } else { - str->Append(" ; in: ", - incoming_edge->src->ordinal); + str->Append(" ; in: ", incoming_edge->src->ordinal); } str->Append(", dom:%d, uncond:%d\n", (incoming_edge->flags & Edge::DOMINATES) ? 1 : 0, @@ -200,8 +212,7 @@ void HIRBuilder::Dump(StringBuffer* str) { } else if (dest_label) { str->Append(" ; out: label%d", dest_label->id); } else { - str->Append(" ; out: ", - outgoing_edge->dest->ordinal); + str->Append(" ; out: ", outgoing_edge->dest->ordinal); } str->Append(", dom:%d, uncond:%d\n", (outgoing_edge->flags & Edge::DOMINATES) ? 1 : 0, @@ -279,9 +290,7 @@ void HIRBuilder::AssertNoCycles() { } } -Block* HIRBuilder::current_block() const { - return current_block_; -} +Block* HIRBuilder::current_block() const { return current_block_; } Instr* HIRBuilder::last_instr() const { if (current_block_ && current_block_->instr_tail) { @@ -466,8 +475,8 @@ bool HIRBuilder::IsUnconditionalJump(Instr* instr) { return false; } -Instr* HIRBuilder::AppendInstr( - const OpcodeInfo& opcode_info, uint16_t flags, Value* dest) { +Instr* HIRBuilder::AppendInstr(const OpcodeInfo& opcode_info, uint16_t flags, + Value* dest) { if (!current_block_) { AppendBlock(); } @@ -597,16 +606,15 @@ void HIRBuilder::TrapTrue(Value* cond, uint16_t trap_code) { EndBlock(); } -void HIRBuilder::Call( - FunctionInfo* symbol_info, uint32_t call_flags) { +void HIRBuilder::Call(FunctionInfo* symbol_info, uint32_t call_flags) { Instr* i = AppendInstr(OPCODE_CALL_info, call_flags); i->src1.symbol_info = symbol_info; i->src2.value = i->src3.value = NULL; EndBlock(); } -void HIRBuilder::CallTrue( - Value* cond, FunctionInfo* symbol_info, uint32_t call_flags) { +void HIRBuilder::CallTrue(Value* cond, FunctionInfo* symbol_info, + uint32_t call_flags) { if (cond->IsConstant()) { if (cond->IsConstantTrue()) { Call(symbol_info, call_flags); @@ -621,8 +629,7 @@ void HIRBuilder::CallTrue( EndBlock(); } -void HIRBuilder::CallIndirect( - Value* value, uint32_t call_flags) { +void HIRBuilder::CallIndirect(Value* value, uint32_t call_flags) { ASSERT_ADDRESS_TYPE(value); Instr* i = AppendInstr(OPCODE_CALL_INDIRECT_info, call_flags); i->set_src1(value); @@ -630,8 +637,8 @@ void HIRBuilder::CallIndirect( EndBlock(); } -void HIRBuilder::CallIndirectTrue( - Value* cond, Value* value, uint32_t call_flags) { +void HIRBuilder::CallIndirectTrue(Value* cond, Value* value, + uint32_t call_flags) { if (cond->IsConstant()) { if (cond->IsConstantTrue()) { CallIndirect(value, call_flags); @@ -697,8 +704,7 @@ void HIRBuilder::Branch(Block* block, uint32_t branch_flags) { Branch(block->label_head, branch_flags); } -void HIRBuilder::BranchTrue( - Value* cond, Label* label, uint32_t branch_flags) { +void HIRBuilder::BranchTrue(Value* cond, Label* label, uint32_t branch_flags) { if (cond->IsConstant()) { if (cond->IsConstantTrue()) { Branch(label, branch_flags); @@ -713,8 +719,7 @@ void HIRBuilder::BranchTrue( EndBlock(); } -void HIRBuilder::BranchFalse( - Value* cond, Label* label, uint32_t branch_flags) { +void HIRBuilder::BranchFalse(Value* cond, Label* label, uint32_t branch_flags) { if (cond->IsConstant()) { if (cond->IsConstantFalse()) { Branch(label, branch_flags); @@ -736,9 +741,7 @@ Value* HIRBuilder::Assign(Value* value) { return value; } - Instr* i = AppendInstr( - OPCODE_ASSIGN_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_ASSIGN_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -753,9 +756,7 @@ Value* HIRBuilder::Cast(Value* value, TypeName target_type) { return dest; } - Instr* i = AppendInstr( - OPCODE_CAST_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_CAST_info, 0, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -770,9 +771,7 @@ Value* HIRBuilder::ZeroExtend(Value* value, TypeName target_type) { return dest; } - Instr* i = AppendInstr( - OPCODE_ZERO_EXTEND_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_ZERO_EXTEND_info, 0, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -787,9 +786,7 @@ Value* HIRBuilder::SignExtend(Value* value, TypeName target_type) { return dest; } - Instr* i = AppendInstr( - OPCODE_SIGN_EXTEND_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_SIGN_EXTEND_info, 0, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -807,16 +804,14 @@ Value* HIRBuilder::Truncate(Value* value, TypeName target_type) { return dest; } - Instr* i = AppendInstr( - OPCODE_TRUNCATE_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_TRUNCATE_info, 0, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } Value* HIRBuilder::Convert(Value* value, TypeName target_type, - RoundMode round_mode) { + RoundMode round_mode) { if (value->type == target_type) { return value; } else if (value->IsConstant()) { @@ -825,9 +820,8 @@ Value* HIRBuilder::Convert(Value* value, TypeName target_type, return dest; } - Instr* i = AppendInstr( - OPCODE_CONVERT_info, round_mode, - AllocValue(target_type)); + Instr* i = + AppendInstr(OPCODE_CONVERT_info, round_mode, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -842,9 +836,8 @@ Value* HIRBuilder::Round(Value* value, RoundMode round_mode) { return dest; } - Instr* i = AppendInstr( - OPCODE_ROUND_info, round_mode, - AllocValue(value->type)); + Instr* i = + AppendInstr(OPCODE_ROUND_info, round_mode, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -853,9 +846,8 @@ Value* HIRBuilder::Round(Value* value, RoundMode round_mode) { Value* HIRBuilder::VectorConvertI2F(Value* value, uint32_t arithmetic_flags) { ASSERT_VECTOR_TYPE(value); - Instr* i = AppendInstr( - OPCODE_VECTOR_CONVERT_I2F_info, arithmetic_flags, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_VECTOR_CONVERT_I2F_info, arithmetic_flags, + AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -864,9 +856,8 @@ Value* HIRBuilder::VectorConvertI2F(Value* value, uint32_t arithmetic_flags) { Value* HIRBuilder::VectorConvertF2I(Value* value, uint32_t arithmetic_flags) { ASSERT_VECTOR_TYPE(value); - Instr* i = AppendInstr( - OPCODE_VECTOR_CONVERT_F2I_info, arithmetic_flags, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_VECTOR_CONVERT_F2I_info, arithmetic_flags, + AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -947,9 +938,8 @@ Value* HIRBuilder::LoadConstant(const vec128_t& value) { Value* HIRBuilder::LoadVectorShl(Value* sh) { XEASSERT(sh->type == INT8_TYPE); - Instr* i = AppendInstr( - OPCODE_LOAD_VECTOR_SHL_info, 0, - AllocValue(VEC128_TYPE)); + Instr* i = + AppendInstr(OPCODE_LOAD_VECTOR_SHL_info, 0, AllocValue(VEC128_TYPE)); i->set_src1(sh); i->src2.value = i->src3.value = NULL; return i->dest; @@ -957,18 +947,15 @@ Value* HIRBuilder::LoadVectorShl(Value* sh) { Value* HIRBuilder::LoadVectorShr(Value* sh) { XEASSERT(sh->type == INT8_TYPE); - Instr* i = AppendInstr( - OPCODE_LOAD_VECTOR_SHR_info, 0, - AllocValue(VEC128_TYPE)); + Instr* i = + AppendInstr(OPCODE_LOAD_VECTOR_SHR_info, 0, AllocValue(VEC128_TYPE)); i->set_src1(sh); i->src2.value = i->src3.value = NULL; return i->dest; } Value* HIRBuilder::LoadClock() { - Instr* i = AppendInstr( - OPCODE_LOAD_CLOCK_info, 0, - AllocValue(INT64_TYPE)); + Instr* i = AppendInstr(OPCODE_LOAD_CLOCK_info, 0, AllocValue(INT64_TYPE)); i->src1.value = i->src2.value = i->src3.value = NULL; return i->dest; } @@ -980,9 +967,7 @@ Value* HIRBuilder::AllocLocal(TypeName type) { } Value* HIRBuilder::LoadLocal(Value* slot) { - Instr* i = AppendInstr( - OPCODE_LOAD_LOCAL_info, 0, - AllocValue(slot->type)); + Instr* i = AppendInstr(OPCODE_LOAD_LOCAL_info, 0, AllocValue(slot->type)); i->set_src1(slot); i->src2.value = i->src3.value = NULL; return i->dest; @@ -996,9 +981,7 @@ void HIRBuilder::StoreLocal(Value* slot, Value* value) { } Value* HIRBuilder::LoadContext(size_t offset, TypeName type) { - Instr* i = AppendInstr( - OPCODE_LOAD_CONTEXT_info, 0, - AllocValue(type)); + Instr* i = AppendInstr(OPCODE_LOAD_CONTEXT_info, 0, AllocValue(type)); i->src1.offset = offset; i->src2.value = i->src3.value = NULL; return i->dest; @@ -1011,19 +994,15 @@ void HIRBuilder::StoreContext(size_t offset, Value* value) { i->src3.value = NULL; } -Value* HIRBuilder::Load( - Value* address, TypeName type, uint32_t load_flags) { +Value* HIRBuilder::Load(Value* address, TypeName type, uint32_t load_flags) { ASSERT_ADDRESS_TYPE(address); - Instr* i = AppendInstr( - OPCODE_LOAD_info, load_flags, - AllocValue(type)); + Instr* i = AppendInstr(OPCODE_LOAD_info, load_flags, AllocValue(type)); i->set_src1(address); i->src2.value = i->src3.value = NULL; return i->dest; } -void HIRBuilder::Store( - Value* address, Value* value, uint32_t store_flags) { +void HIRBuilder::Store(Value* address, Value* value, uint32_t store_flags) { ASSERT_ADDRESS_TYPE(address); Instr* i = AppendInstr(OPCODE_STORE_info, store_flags); i->set_src1(address); @@ -1031,8 +1010,8 @@ void HIRBuilder::Store( i->src3.value = NULL; } -void HIRBuilder::Prefetch( - Value* address, size_t length, uint32_t prefetch_flags) { +void HIRBuilder::Prefetch(Value* address, size_t length, + uint32_t prefetch_flags) { ASSERT_ADDRESS_TYPE(address); Instr* i = AppendInstr(OPCODE_PREFETCH_info, prefetch_flags); i->set_src1(address); @@ -1043,14 +1022,12 @@ void HIRBuilder::Prefetch( Value* HIRBuilder::Max(Value* value1, Value* value2) { ASSERT_TYPES_EQUAL(value1, value2); - if (value1->type != VEC128_TYPE && - value1->IsConstant() && value2->IsConstant()) { + if (value1->type != VEC128_TYPE && value1->IsConstant() && + value2->IsConstant()) { return value1->Compare(OPCODE_COMPARE_SLT, value2) ? value2 : value1; } - Instr* i = AppendInstr( - OPCODE_MAX_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_MAX_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1060,14 +1037,12 @@ Value* HIRBuilder::Max(Value* value1, Value* value2) { Value* HIRBuilder::Min(Value* value1, Value* value2) { ASSERT_TYPES_EQUAL(value1, value2); - if (value1->type != VEC128_TYPE && - value1->IsConstant() && value2->IsConstant()) { + if (value1->type != VEC128_TYPE && value1->IsConstant() && + value2->IsConstant()) { return value1->Compare(OPCODE_COMPARE_SLT, value2) ? value1 : value2; } - Instr* i = AppendInstr( - OPCODE_MIN_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_MIN_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1075,16 +1050,14 @@ Value* HIRBuilder::Min(Value* value1, Value* value2) { } Value* HIRBuilder::Select(Value* cond, Value* value1, Value* value2) { - XEASSERT(cond->type == INT8_TYPE); // for now + XEASSERT(cond->type == INT8_TYPE); // for now ASSERT_TYPES_EQUAL(value1, value2); if (cond->IsConstant()) { return cond->IsConstantTrue() ? value1 : value2; } - Instr* i = AppendInstr( - OPCODE_SELECT_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_SELECT_info, 0, AllocValue(value1->type)); i->set_src1(cond); i->set_src2(value1); i->set_src3(value2); @@ -1096,9 +1069,7 @@ Value* HIRBuilder::IsTrue(Value* value) { return LoadConstant(value->IsConstantTrue() ? 1 : 0); } - Instr* i = AppendInstr( - OPCODE_IS_TRUE_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_IS_TRUE_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1109,24 +1080,20 @@ Value* HIRBuilder::IsFalse(Value* value) { return LoadConstant(value->IsConstantFalse() ? 1 : 0); } - Instr* i = AppendInstr( - OPCODE_IS_FALSE_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_IS_FALSE_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::CompareXX( - const OpcodeInfo& opcode, Value* value1, Value* value2) { +Value* HIRBuilder::CompareXX(const OpcodeInfo& opcode, Value* value1, + Value* value2) { ASSERT_TYPES_EQUAL(value1, value2); if (value1->IsConstant() && value2->IsConstant()) { return LoadConstant(value1->Compare(opcode.num, value2) ? 1 : 0); } - Instr* i = AppendInstr( - opcode, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(opcode, 0, AllocValue(INT8_TYPE)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1174,81 +1141,72 @@ Value* HIRBuilder::CompareUGE(Value* value1, Value* value2) { } Value* HIRBuilder::DidCarry(Value* value) { - Instr* i = AppendInstr( - OPCODE_DID_CARRY_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_DID_CARRY_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } Value* HIRBuilder::DidOverflow(Value* value) { - Instr* i = AppendInstr( - OPCODE_DID_OVERFLOW_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_DID_OVERFLOW_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } Value* HIRBuilder::DidSaturate(Value* value) { - Instr* i = AppendInstr( - OPCODE_DID_SATURATE_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_DID_SATURATE_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::VectorCompareXX( - const OpcodeInfo& opcode, Value* value1, Value* value2, - TypeName part_type) { +Value* HIRBuilder::VectorCompareXX(const OpcodeInfo& opcode, Value* value1, + Value* value2, TypeName part_type) { ASSERT_TYPES_EQUAL(value1, value2); // TODO(benvanik): check how this is used - sometimes I think it's used to // load bitmasks and may be worth checking constants on. - Instr* i = AppendInstr( - opcode, part_type, - AllocValue(value1->type)); + Instr* i = AppendInstr(opcode, part_type, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::VectorCompareEQ( - Value* value1, Value* value2, TypeName part_type) { - return VectorCompareXX( - OPCODE_VECTOR_COMPARE_EQ_info, value1, value2, part_type); +Value* HIRBuilder::VectorCompareEQ(Value* value1, Value* value2, + TypeName part_type) { + return VectorCompareXX(OPCODE_VECTOR_COMPARE_EQ_info, value1, value2, + part_type); } -Value* HIRBuilder::VectorCompareSGT( - Value* value1, Value* value2, TypeName part_type) { - return VectorCompareXX( - OPCODE_VECTOR_COMPARE_SGT_info, value1, value2, part_type); +Value* HIRBuilder::VectorCompareSGT(Value* value1, Value* value2, + TypeName part_type) { + return VectorCompareXX(OPCODE_VECTOR_COMPARE_SGT_info, value1, value2, + part_type); } -Value* HIRBuilder::VectorCompareSGE( - Value* value1, Value* value2, TypeName part_type) { - return VectorCompareXX( - OPCODE_VECTOR_COMPARE_SGE_info, value1, value2, part_type); +Value* HIRBuilder::VectorCompareSGE(Value* value1, Value* value2, + TypeName part_type) { + return VectorCompareXX(OPCODE_VECTOR_COMPARE_SGE_info, value1, value2, + part_type); } -Value* HIRBuilder::VectorCompareUGT( - Value* value1, Value* value2, TypeName part_type) { - return VectorCompareXX( - OPCODE_VECTOR_COMPARE_UGT_info, value1, value2, part_type); +Value* HIRBuilder::VectorCompareUGT(Value* value1, Value* value2, + TypeName part_type) { + return VectorCompareXX(OPCODE_VECTOR_COMPARE_UGT_info, value1, value2, + part_type); } -Value* HIRBuilder::VectorCompareUGE( - Value* value1, Value* value2, TypeName part_type) { - return VectorCompareXX( - OPCODE_VECTOR_COMPARE_UGE_info, value1, value2, part_type); +Value* HIRBuilder::VectorCompareUGE(Value* value1, Value* value2, + TypeName part_type) { + return VectorCompareXX(OPCODE_VECTOR_COMPARE_UGE_info, value1, value2, + part_type); } -Value* HIRBuilder::Add( - Value* value1, Value* value2, uint32_t arithmetic_flags) { +Value* HIRBuilder::Add(Value* value1, Value* value2, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); // TODO(benvanik): optimize when flags set. @@ -1264,24 +1222,21 @@ Value* HIRBuilder::Add( } } - Instr* i = AppendInstr( - OPCODE_ADD_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_ADD_info, arithmetic_flags, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::AddWithCarry( - Value* value1, Value* value2, Value* value3, - uint32_t arithmetic_flags) { +Value* HIRBuilder::AddWithCarry(Value* value1, Value* value2, Value* value3, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); XEASSERT(value3->type == INT8_TYPE); - Instr* i = AppendInstr( - OPCODE_ADD_CARRY_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_ADD_CARRY_info, arithmetic_flags, + AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->set_src3(value3); @@ -1297,61 +1252,56 @@ Value* HIRBuilder::VectorAdd(Value* value1, Value* value2, TypeName part_type, uint32_t flags = part_type | (arithmetic_flags << 8); XEASSERTZERO(flags >> 16); - Instr* i = AppendInstr( - OPCODE_VECTOR_ADD_info, (uint16_t)flags, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_VECTOR_ADD_info, (uint16_t)flags, + AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::Sub( - Value* value1, Value* value2, uint32_t arithmetic_flags) { +Value* HIRBuilder::Sub(Value* value1, Value* value2, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_SUB_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_SUB_info, arithmetic_flags, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::Mul( - Value* value1, Value* value2, uint32_t arithmetic_flags) { +Value* HIRBuilder::Mul(Value* value1, Value* value2, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_MUL_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_MUL_info, arithmetic_flags, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::MulHi( - Value* value1, Value* value2, uint32_t arithmetic_flags) { +Value* HIRBuilder::MulHi(Value* value1, Value* value2, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_MUL_HI_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_MUL_HI_info, arithmetic_flags, + AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::Div( - Value* value1, Value* value2, uint32_t arithmetic_flags) { +Value* HIRBuilder::Div(Value* value1, Value* value2, + uint32_t arithmetic_flags) { ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_DIV_info, arithmetic_flags, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_DIV_info, arithmetic_flags, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1370,9 +1320,7 @@ Value* HIRBuilder::MulAdd(Value* value1, Value* value2, Value* value3) { return Add(dest, value3); } - Instr* i = AppendInstr( - OPCODE_MUL_ADD_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_MUL_ADD_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->set_src3(value3); @@ -1391,9 +1339,7 @@ Value* HIRBuilder::MulSub(Value* value1, Value* value2, Value* value3) { return Sub(dest, value3); } - Instr* i = AppendInstr( - OPCODE_MUL_SUB_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_MUL_SUB_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->set_src3(value3); @@ -1403,9 +1349,7 @@ Value* HIRBuilder::MulSub(Value* value1, Value* value2, Value* value3) { Value* HIRBuilder::Neg(Value* value) { ASSERT_NON_VECTOR_TYPE(value); - Instr* i = AppendInstr( - OPCODE_NEG_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_NEG_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1414,9 +1358,7 @@ Value* HIRBuilder::Neg(Value* value) { Value* HIRBuilder::Abs(Value* value) { ASSERT_NON_VECTOR_TYPE(value); - Instr* i = AppendInstr( - OPCODE_ABS_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_ABS_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1425,9 +1367,7 @@ Value* HIRBuilder::Abs(Value* value) { Value* HIRBuilder::Sqrt(Value* value) { ASSERT_FLOAT_TYPE(value); - Instr* i = AppendInstr( - OPCODE_SQRT_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_SQRT_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1436,9 +1376,7 @@ Value* HIRBuilder::Sqrt(Value* value) { Value* HIRBuilder::RSqrt(Value* value) { ASSERT_FLOAT_TYPE(value); - Instr* i = AppendInstr( - OPCODE_RSQRT_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_RSQRT_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1447,9 +1385,7 @@ Value* HIRBuilder::RSqrt(Value* value) { Value* HIRBuilder::Pow2(Value* value) { ASSERT_FLOAT_TYPE(value); - Instr* i = AppendInstr( - OPCODE_POW2_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_POW2_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1458,9 +1394,7 @@ Value* HIRBuilder::Pow2(Value* value) { Value* HIRBuilder::Log2(Value* value) { ASSERT_FLOAT_TYPE(value); - Instr* i = AppendInstr( - OPCODE_LOG2_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_LOG2_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1471,9 +1405,8 @@ Value* HIRBuilder::DotProduct3(Value* value1, Value* value2) { ASSERT_VECTOR_TYPE(value2); ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_DOT_PRODUCT_3_info, 0, - AllocValue(FLOAT32_TYPE)); + Instr* i = + AppendInstr(OPCODE_DOT_PRODUCT_3_info, 0, AllocValue(FLOAT32_TYPE)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1485,9 +1418,8 @@ Value* HIRBuilder::DotProduct4(Value* value1, Value* value2) { ASSERT_VECTOR_TYPE(value2); ASSERT_TYPES_EQUAL(value1, value2); - Instr* i = AppendInstr( - OPCODE_DOT_PRODUCT_4_info, 0, - AllocValue(FLOAT32_TYPE)); + Instr* i = + AppendInstr(OPCODE_DOT_PRODUCT_4_info, 0, AllocValue(FLOAT32_TYPE)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1507,9 +1439,7 @@ Value* HIRBuilder::And(Value* value1, Value* value2) { return value2; } - Instr* i = AppendInstr( - OPCODE_AND_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_AND_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1529,9 +1459,7 @@ Value* HIRBuilder::Or(Value* value1, Value* value2) { return value1; } - Instr* i = AppendInstr( - OPCODE_OR_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_OR_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1547,9 +1475,7 @@ Value* HIRBuilder::Xor(Value* value1, Value* value2) { return LoadZero(value1->type); } - Instr* i = AppendInstr( - OPCODE_XOR_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_XOR_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1565,9 +1491,7 @@ Value* HIRBuilder::Not(Value* value) { return dest; } - Instr* i = AppendInstr( - OPCODE_NOT_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_NOT_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1586,9 +1510,7 @@ Value* HIRBuilder::Shl(Value* value1, Value* value2) { value2 = Truncate(value2, INT8_TYPE); } - Instr* i = AppendInstr( - OPCODE_SHL_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_SHL_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1598,14 +1520,12 @@ Value* HIRBuilder::Shl(Value* value1, int8_t value2) { return Shl(value1, LoadConstant(value2)); } -Value* HIRBuilder::VectorShl(Value* value1, Value* value2, - TypeName part_type) { +Value* HIRBuilder::VectorShl(Value* value1, Value* value2, TypeName part_type) { ASSERT_VECTOR_TYPE(value1); ASSERT_VECTOR_TYPE(value2); - Instr* i = AppendInstr( - OPCODE_VECTOR_SHL_info, part_type, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_VECTOR_SHL_info, part_type, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1623,9 +1543,7 @@ Value* HIRBuilder::Shr(Value* value1, Value* value2) { value2 = Truncate(value2, INT8_TYPE); } - Instr* i = AppendInstr( - OPCODE_SHR_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_SHR_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1635,14 +1553,12 @@ Value* HIRBuilder::Shr(Value* value1, int8_t value2) { return Shr(value1, LoadConstant(value2)); } -Value* HIRBuilder::VectorShr(Value* value1, Value* value2, - TypeName part_type) { +Value* HIRBuilder::VectorShr(Value* value1, Value* value2, TypeName part_type) { ASSERT_VECTOR_TYPE(value1); ASSERT_VECTOR_TYPE(value2); - Instr* i = AppendInstr( - OPCODE_VECTOR_SHR_info, part_type, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_VECTOR_SHR_info, part_type, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1660,9 +1576,7 @@ Value* HIRBuilder::Sha(Value* value1, Value* value2) { value2 = Truncate(value2, INT8_TYPE); } - Instr* i = AppendInstr( - OPCODE_SHA_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_SHA_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1672,14 +1586,12 @@ Value* HIRBuilder::Sha(Value* value1, int8_t value2) { return Sha(value1, LoadConstant(value2)); } -Value* HIRBuilder::VectorSha(Value* value1, Value* value2, - TypeName part_type) { +Value* HIRBuilder::VectorSha(Value* value1, Value* value2, TypeName part_type) { ASSERT_VECTOR_TYPE(value1); ASSERT_VECTOR_TYPE(value2); - Instr* i = AppendInstr( - OPCODE_VECTOR_SHA_info, part_type, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_VECTOR_SHA_info, part_type, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1698,9 +1610,7 @@ Value* HIRBuilder::RotateLeft(Value* value1, Value* value2) { value2 = Truncate(value2, INT8_TYPE); } - Instr* i = AppendInstr( - OPCODE_ROTATE_LEFT_info, 0, - AllocValue(value1->type)); + Instr* i = AppendInstr(OPCODE_ROTATE_LEFT_info, 0, AllocValue(value1->type)); i->set_src1(value1); i->set_src2(value2); i->src3.value = NULL; @@ -1712,9 +1622,7 @@ Value* HIRBuilder::ByteSwap(Value* value) { return value; } - Instr* i = AppendInstr( - OPCODE_BYTE_SWAP_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_BYTE_SWAP_info, 0, AllocValue(value->type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1724,13 +1632,13 @@ Value* HIRBuilder::CountLeadingZeros(Value* value) { ASSERT_INTEGER_TYPE(value); if (value->IsConstantZero()) { - const static uint8_t zeros[] = { 8, 16, 32, 64, }; + const static uint8_t zeros[] = { + 8, 16, 32, 64, + }; return LoadConstant(zeros[value->type]); } - Instr* i = AppendInstr( - OPCODE_CNTLZ_info, 0, - AllocValue(INT8_TYPE)); + Instr* i = AppendInstr(OPCODE_CNTLZ_info, 0, AllocValue(INT8_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1739,9 +1647,7 @@ Value* HIRBuilder::CountLeadingZeros(Value* value) { Value* HIRBuilder::Insert(Value* value, Value* index, Value* part) { // TODO(benvanik): could do some of this as constants. - Instr* i = AppendInstr( - OPCODE_INSERT_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_INSERT_info, 0, AllocValue(value->type)); i->set_src1(value); i->set_src2(ZeroExtend(index, INT64_TYPE)); i->set_src3(part); @@ -1752,55 +1658,48 @@ Value* HIRBuilder::Insert(Value* value, uint64_t index, Value* part) { return Insert(value, LoadConstant(index), part); } -Value* HIRBuilder::Extract(Value* value, Value* index, - TypeName target_type) { +Value* HIRBuilder::Extract(Value* value, Value* index, TypeName target_type) { // TODO(benvanik): could do some of this as constants. - Value* trunc_index = index->type != INT8_TYPE ? - Truncate(index, INT8_TYPE) : index; + Value* trunc_index = + index->type != INT8_TYPE ? Truncate(index, INT8_TYPE) : index; - Instr* i = AppendInstr( - OPCODE_EXTRACT_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_EXTRACT_info, 0, AllocValue(target_type)); i->set_src1(value); i->set_src2(trunc_index); i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::Extract(Value* value, uint8_t index, - TypeName target_type) { +Value* HIRBuilder::Extract(Value* value, uint8_t index, TypeName target_type) { return Extract(value, LoadConstant(index), target_type); } Value* HIRBuilder::Splat(Value* value, TypeName target_type) { // TODO(benvanik): could do some of this as constants. - Instr* i = AppendInstr( - OPCODE_SPLAT_info, 0, - AllocValue(target_type)); + Instr* i = AppendInstr(OPCODE_SPLAT_info, 0, AllocValue(target_type)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::Permute( - Value* control, Value* value1, Value* value2, TypeName part_type) { +Value* HIRBuilder::Permute(Value* control, Value* value1, Value* value2, + TypeName part_type) { ASSERT_TYPES_EQUAL(value1, value2); // TODO(benvanik): could do some of this as constants. - Instr* i = AppendInstr( - OPCODE_PERMUTE_info, part_type, - AllocValue(value1->type)); + Instr* i = + AppendInstr(OPCODE_PERMUTE_info, part_type, AllocValue(value1->type)); i->set_src1(control); i->set_src2(value1); i->set_src3(value2); return i->dest; } -Value* HIRBuilder::Swizzle( - Value* value, TypeName part_type, uint32_t swizzle_mask) { +Value* HIRBuilder::Swizzle(Value* value, TypeName part_type, + uint32_t swizzle_mask) { // For now. XEASSERT(part_type == INT32_TYPE || part_type == FLOAT32_TYPE); @@ -1810,9 +1709,8 @@ Value* HIRBuilder::Swizzle( // TODO(benvanik): could do some of this as constants. - Instr* i = AppendInstr( - OPCODE_SWIZZLE_info, part_type, - AllocValue(value->type)); + Instr* i = + AppendInstr(OPCODE_SWIZZLE_info, part_type, AllocValue(value->type)); i->set_src1(value); i->src2.offset = swizzle_mask; i->src3.value = NULL; @@ -1821,9 +1719,7 @@ Value* HIRBuilder::Swizzle( Value* HIRBuilder::Pack(Value* value, uint32_t pack_flags) { ASSERT_VECTOR_TYPE(value); - Instr* i = AppendInstr( - OPCODE_PACK_info, pack_flags, - AllocValue(VEC128_TYPE)); + Instr* i = AppendInstr(OPCODE_PACK_info, pack_flags, AllocValue(VEC128_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; @@ -1833,23 +1729,21 @@ Value* HIRBuilder::Unpack(Value* value, uint32_t pack_flags) { ASSERT_VECTOR_TYPE(value); // TODO(benvanik): check if this is a constant - sometimes this is just used // to initialize registers. - Instr* i = AppendInstr( - OPCODE_UNPACK_info, pack_flags, - AllocValue(VEC128_TYPE)); + Instr* i = + AppendInstr(OPCODE_UNPACK_info, pack_flags, AllocValue(VEC128_TYPE)); i->set_src1(value); i->src2.value = i->src3.value = NULL; return i->dest; } -Value* HIRBuilder::CompareExchange( - Value* address, Value* compare_value, Value* exchange_value) { +Value* HIRBuilder::CompareExchange(Value* address, Value* compare_value, + Value* exchange_value) { ASSERT_ADDRESS_TYPE(address); ASSERT_INTEGER_TYPE(compare_value); ASSERT_INTEGER_TYPE(exchange_value); ASSERT_TYPES_EQUAL(compare_value, exchange_value); - Instr* i = AppendInstr( - OPCODE_COMPARE_EXCHANGE_info, 0, - AllocValue(exchange_value->type)); + Instr* i = AppendInstr(OPCODE_COMPARE_EXCHANGE_info, 0, + AllocValue(exchange_value->type)); i->set_src1(address); i->set_src2(compare_value); i->set_src3(exchange_value); @@ -1859,9 +1753,8 @@ Value* HIRBuilder::CompareExchange( Value* HIRBuilder::AtomicExchange(Value* address, Value* new_value) { ASSERT_ADDRESS_TYPE(address); ASSERT_INTEGER_TYPE(new_value); - Instr* i = AppendInstr( - OPCODE_ATOMIC_EXCHANGE_info, 0, - AllocValue(new_value->type)); + Instr* i = + AppendInstr(OPCODE_ATOMIC_EXCHANGE_info, 0, AllocValue(new_value->type)); i->set_src1(address); i->set_src2(new_value); i->src3.value = NULL; @@ -1871,9 +1764,7 @@ Value* HIRBuilder::AtomicExchange(Value* address, Value* new_value) { Value* HIRBuilder::AtomicAdd(Value* address, Value* value) { ASSERT_ADDRESS_TYPE(address); ASSERT_INTEGER_TYPE(value); - Instr* i = AppendInstr( - OPCODE_ATOMIC_ADD_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_ATOMIC_ADD_info, 0, AllocValue(value->type)); i->set_src1(address); i->set_src2(value); i->src3.value = NULL; @@ -1883,11 +1774,12 @@ Value* HIRBuilder::AtomicAdd(Value* address, Value* value) { Value* HIRBuilder::AtomicSub(Value* address, Value* value) { ASSERT_ADDRESS_TYPE(address); ASSERT_INTEGER_TYPE(value); - Instr* i = AppendInstr( - OPCODE_ATOMIC_SUB_info, 0, - AllocValue(value->type)); + Instr* i = AppendInstr(OPCODE_ATOMIC_SUB_info, 0, AllocValue(value->type)); i->set_src1(address); i->set_src2(value); i->src3.value = NULL; return i->dest; } + +} // namespace hir +} // namespace alloy diff --git a/src/alloy/hir/hir_builder.h b/src/alloy/hir/hir_builder.h index 7703dc8f1..9d01a69b6 100644 --- a/src/alloy/hir/hir_builder.h +++ b/src/alloy/hir/hir_builder.h @@ -17,17 +17,15 @@ #include #include - namespace alloy { namespace hir { enum FunctionAttributes { - FUNCTION_ATTRIB_INLINE = (1 << 1), + FUNCTION_ATTRIB_INLINE = (1 << 1), }; - class HIRBuilder { -public: + public: HIRBuilder(); virtual ~HIRBuilder(); @@ -86,10 +84,8 @@ public: void Branch(Label* label, uint32_t branch_flags = 0); void Branch(Block* block, uint32_t branch_flags = 0); - void BranchTrue(Value* cond, Label* label, - uint32_t branch_flags = 0); - void BranchFalse(Value* cond, Label* label, - uint32_t branch_flags = 0); + void BranchTrue(Value* cond, Label* label, uint32_t branch_flags = 0); + void BranchFalse(Value* cond, Label* label, uint32_t branch_flags = 0); // phi type_name, Block* b1, Value* v1, Block* b2, Value* v2, etc @@ -162,13 +158,12 @@ public: uint32_t arithmetic_flags = 0); Value* VectorAdd(Value* value1, Value* value2, TypeName part_type, uint32_t arithmetic_flags = 0); - Value* Sub(Value* value1, Value* value2, - uint32_t arithmetic_flags = 0); + Value* Sub(Value* value1, Value* value2, uint32_t arithmetic_flags = 0); Value* Mul(Value* value1, Value* value2, uint32_t arithmetic_flags = 0); Value* MulHi(Value* value1, Value* value2, uint32_t arithmetic_flags = 0); Value* Div(Value* value1, Value* value2, uint32_t arithmetic_flags = 0); - Value* MulAdd(Value* value1, Value* value2, Value* value3); // (1 * 2) + 3 - Value* MulSub(Value* value1, Value* value2, Value* value3); // (1 * 2) - 3 + Value* MulAdd(Value* value1, Value* value2, Value* value3); // (1 * 2) + 3 + Value* MulSub(Value* value1, Value* value2, Value* value3); // (1 * 2) - 3 Value* Neg(Value* value); Value* Abs(Value* value); Value* Sqrt(Value* value); @@ -208,48 +203,44 @@ public: Value* Pack(Value* value, uint32_t pack_flags = 0); Value* Unpack(Value* value, uint32_t pack_flags = 0); - Value* CompareExchange(Value* address, - Value* compare_value, Value* exchange_value); + Value* CompareExchange(Value* address, Value* compare_value, + Value* exchange_value); Value* AtomicExchange(Value* address, Value* new_value); Value* AtomicAdd(Value* address, Value* value); Value* AtomicSub(Value* address, Value* value); -protected: + protected: void DumpValue(StringBuffer* str, Value* value); - void DumpOp( - StringBuffer* str, OpcodeSignatureType sig_type, Instr::Op* op); + void DumpOp(StringBuffer* str, OpcodeSignatureType sig_type, Instr::Op* op); Value* AllocValue(TypeName type = INT64_TYPE); Value* CloneValue(Value* source); -private: + private: Block* AppendBlock(); void EndBlock(); bool IsUnconditionalJump(Instr* instr); - Instr* AppendInstr(const OpcodeInfo& opcode, uint16_t flags, - Value* dest = 0); + Instr* AppendInstr(const OpcodeInfo& opcode, uint16_t flags, Value* dest = 0); Value* CompareXX(const OpcodeInfo& opcode, Value* value1, Value* value2); - Value* VectorCompareXX( - const OpcodeInfo& opcode, Value* value1, Value* value2, TypeName part_type); + Value* VectorCompareXX(const OpcodeInfo& opcode, Value* value1, Value* value2, + TypeName part_type); -protected: - Arena* arena_; + protected: + Arena* arena_; - uint32_t attributes_; + uint32_t attributes_; - uint32_t next_label_id_; - uint32_t next_value_ordinal_; + uint32_t next_label_id_; + uint32_t next_value_ordinal_; std::vector locals_; - Block* block_head_; - Block* block_tail_; - Block* current_block_; + Block* block_head_; + Block* block_tail_; + Block* current_block_; }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_HIR_BUILDER_H_ diff --git a/src/alloy/hir/instr.cc b/src/alloy/hir/instr.cc index dc489ef4b..20271c016 100644 --- a/src/alloy/hir/instr.cc +++ b/src/alloy/hir/instr.cc @@ -11,9 +11,8 @@ #include -using namespace alloy; -using namespace alloy::hir; - +namespace alloy { +namespace hir { void Instr::set_src1(Value* value) { if (src1.value == value) { @@ -114,3 +113,6 @@ void Instr::Remove() { block->instr_tail = prev; } } + +} // namespace hir +} // namespace alloy diff --git a/src/alloy/hir/instr.h b/src/alloy/hir/instr.h index b128c534a..c72c7d9e2 100644 --- a/src/alloy/hir/instr.h +++ b/src/alloy/hir/instr.h @@ -14,9 +14,11 @@ #include #include - -namespace alloy { namespace runtime { class FunctionInfo; } } - +namespace alloy { +namespace runtime { +class FunctionInfo; +} // namespace runtime +} // namespace alloy namespace alloy { namespace hir { @@ -25,26 +27,26 @@ class Block; class Label; class Instr { -public: - Block* block; - Instr* next; - Instr* prev; + public: + Block* block; + Instr* next; + Instr* prev; const OpcodeInfo* opcode; - uint16_t flags; - uint32_t ordinal; + uint16_t flags; + uint32_t ordinal; typedef union { runtime::FunctionInfo* symbol_info; - Label* label; - Value* value; - uint64_t offset; + Label* label; + Value* value; + uint64_t offset; } Op; - Value* dest; - Op src1; - Op src2; - Op src3; + Value* dest; + Op src1; + Op src2; + Op src3; Value::Use* src1_use; Value::Use* src2_use; @@ -59,9 +61,7 @@ public: void Remove(); }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_INSTR_H_ diff --git a/src/alloy/hir/label.h b/src/alloy/hir/label.h index 35ff5cc09..74beaa92d 100644 --- a/src/alloy/hir/label.h +++ b/src/alloy/hir/label.h @@ -12,28 +12,24 @@ #include - namespace alloy { namespace hir { class Block; - class Label { -public: + public: Block* block; Label* next; Label* prev; - uint32_t id; - char* name; + uint32_t id; + char* name; - void* tag; + void* tag; }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_LABEL_H_ diff --git a/src/alloy/hir/opcodes.cc b/src/alloy/hir/opcodes.cc index 24880d5be..5c66c8b1d 100644 --- a/src/alloy/hir/opcodes.cc +++ b/src/alloy/hir/opcodes.cc @@ -9,15 +9,13 @@ #include -using namespace alloy; -using namespace alloy::hir; - - namespace alloy { namespace hir { #define DEFINE_OPCODE(num, name, sig, flags) \ - static const OpcodeInfo num##_info = { flags, sig, name, num, }; + static const OpcodeInfo num##_info = { \ + flags, sig, name, num, \ + }; #include #undef DEFINE_OPCODE diff --git a/src/alloy/hir/opcodes.h b/src/alloy/hir/opcodes.h index b52e7b55d..841d1f134 100644 --- a/src/alloy/hir/opcodes.h +++ b/src/alloy/hir/opcodes.h @@ -12,17 +12,15 @@ #include - namespace alloy { namespace hir { - enum CallFlags { - CALL_TAIL = (1 << 1), - CALL_POSSIBLE_RETURN = (1 << 2), + CALL_TAIL = (1 << 1), + CALL_POSSIBLE_RETURN = (1 << 2), }; enum BranchFlags { - BRANCH_LIKELY = (1 << 1), + BRANCH_LIKELY = (1 << 1), BRANCH_UNLIKELY = (1 << 2), }; enum RoundMode { @@ -33,20 +31,20 @@ enum RoundMode { ROUND_TO_POSITIVE_INFINITY, }; enum LoadFlags { - LOAD_NO_ALIAS = (1 << 1), - LOAD_ALIGNED = (1 << 2), - LOAD_UNALIGNED = (1 << 3), - LOAD_VOLATILE = (1 << 4), + LOAD_NO_ALIAS = (1 << 1), + LOAD_ALIGNED = (1 << 2), + LOAD_UNALIGNED = (1 << 3), + LOAD_VOLATILE = (1 << 4), }; enum StoreFlags { - STORE_NO_ALIAS = (1 << 1), - STORE_ALIGNED = (1 << 2), + STORE_NO_ALIAS = (1 << 1), + STORE_ALIGNED = (1 << 2), STORE_UNALIGNED = (1 << 3), - STORE_VOLATILE = (1 << 4), + STORE_VOLATILE = (1 << 4), }; enum PrefetchFlags { - PREFETCH_LOAD = (1 << 1), - PREFETCH_STORE = (1 << 2), + PREFETCH_LOAD = (1 << 1), + PREFETCH_STORE = (1 << 2), }; enum ArithmeticFlags { ARITHMETIC_SET_CARRY = (1 << 1), @@ -56,11 +54,8 @@ enum ArithmeticFlags { enum Permutes { PERMUTE_XY_ZW = 0x00010405, }; -#define SWIZZLE_MASK(x, y, z, w) ( \ - (((x) & 0x3) << 6) | \ - (((y) & 0x3) << 4) | \ - (((z) & 0x3) << 2) | \ - (((w) & 0x3))) +#define SWIZZLE_MASK(x, y, z, w) \ + ((((x)&0x3) << 6) | (((y)&0x3) << 4) | (((z)&0x3) << 2) | (((w)&0x3))) enum Swizzles { SWIZZLE_XYZW_TO_XYZW = SWIZZLE_MASK(0, 1, 2, 3), SWIZZLE_XYZW_TO_YZWX = SWIZZLE_MASK(1, 2, 3, 0), @@ -78,19 +73,14 @@ enum PackType { PACK_TYPE_S16_IN_32_HI = 7, }; - enum Opcode { OPCODE_COMMENT, OPCODE_NOP, - OPCODE_SOURCE_OFFSET, - OPCODE_DEBUG_BREAK, OPCODE_DEBUG_BREAK_TRUE, - OPCODE_TRAP, OPCODE_TRAP_TRUE, - OPCODE_CALL, OPCODE_CALL_TRUE, OPCODE_CALL_INDIRECT, @@ -99,11 +89,9 @@ enum Opcode { OPCODE_RETURN, OPCODE_RETURN_TRUE, OPCODE_SET_RETURN_ADDRESS, - OPCODE_BRANCH, OPCODE_BRANCH_TRUE, OPCODE_BRANCH_FALSE, - OPCODE_ASSIGN, OPCODE_CAST, OPCODE_ZERO_EXTEND, @@ -113,22 +101,16 @@ enum Opcode { OPCODE_ROUND, OPCODE_VECTOR_CONVERT_I2F, OPCODE_VECTOR_CONVERT_F2I, - OPCODE_LOAD_VECTOR_SHL, OPCODE_LOAD_VECTOR_SHR, - OPCODE_LOAD_CLOCK, - OPCODE_LOAD_LOCAL, OPCODE_STORE_LOCAL, - OPCODE_LOAD_CONTEXT, OPCODE_STORE_CONTEXT, - OPCODE_LOAD, OPCODE_STORE, OPCODE_PREFETCH, - OPCODE_MAX, OPCODE_MIN, OPCODE_SELECT, @@ -152,13 +134,12 @@ enum Opcode { OPCODE_VECTOR_COMPARE_SGE, OPCODE_VECTOR_COMPARE_UGT, OPCODE_VECTOR_COMPARE_UGE, - OPCODE_ADD, OPCODE_ADD_CARRY, OPCODE_VECTOR_ADD, OPCODE_SUB, OPCODE_MUL, - OPCODE_MUL_HI, // TODO(benvanik): remove this and add INT128 type. + OPCODE_MUL_HI, // TODO(benvanik): remove this and add INT128 type. OPCODE_DIV, OPCODE_MUL_ADD, OPCODE_MUL_SUB, @@ -170,7 +151,6 @@ enum Opcode { OPCODE_LOG2, OPCODE_DOT_PRODUCT_3, OPCODE_DOT_PRODUCT_4, - OPCODE_AND, OPCODE_OR, OPCODE_XOR, @@ -191,22 +171,20 @@ enum Opcode { OPCODE_SWIZZLE, OPCODE_PACK, OPCODE_UNPACK, - OPCODE_COMPARE_EXCHANGE, OPCODE_ATOMIC_EXCHANGE, OPCODE_ATOMIC_ADD, OPCODE_ATOMIC_SUB, - - __OPCODE_MAX_VALUE, // Keep at end. + __OPCODE_MAX_VALUE, // Keep at end. }; enum OpcodeFlags { - OPCODE_FLAG_BRANCH = (1 << 1), - OPCODE_FLAG_MEMORY = (1 << 2), + OPCODE_FLAG_BRANCH = (1 << 1), + OPCODE_FLAG_MEMORY = (1 << 2), OPCODE_FLAG_COMMUNATIVE = (1 << 3), - OPCODE_FLAG_VOLATILE = (1 << 4), - OPCODE_FLAG_IGNORE = (1 << 5), - OPCODE_FLAG_HIDE = (1 << 6), + OPCODE_FLAG_VOLATILE = (1 << 4), + OPCODE_FLAG_IGNORE = (1 << 5), + OPCODE_FLAG_HIDE = (1 << 6), OPCODE_FLAG_PAIRED_PREV = (1 << 7), }; @@ -220,26 +198,38 @@ enum OpcodeSignatureType { }; enum OpcodeSignature { - OPCODE_SIG_X = (OPCODE_SIG_TYPE_X), - OPCODE_SIG_X_L = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_L << 3), - OPCODE_SIG_X_O = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_O << 3), - OPCODE_SIG_X_O_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_O << 3) | (OPCODE_SIG_TYPE_V << 6), - OPCODE_SIG_X_S = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_S << 3), - OPCODE_SIG_X_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3), - OPCODE_SIG_X_V_L = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_L << 6), - OPCODE_SIG_X_V_L_L = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_L << 6) | (OPCODE_SIG_TYPE_L << 9), - OPCODE_SIG_X_V_O = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_O << 6), - OPCODE_SIG_X_V_S = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_S << 6), - OPCODE_SIG_X_V_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6), - OPCODE_SIG_X_V_V_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_V << 9), - OPCODE_SIG_V = (OPCODE_SIG_TYPE_V), - OPCODE_SIG_V_O = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_O << 3), - OPCODE_SIG_V_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3), - OPCODE_SIG_V_V_O = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_O << 6), - OPCODE_SIG_V_V_O_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_O << 6) | (OPCODE_SIG_TYPE_V << 9), - OPCODE_SIG_V_V_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6), - OPCODE_SIG_V_V_V_O = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_O << 9), - OPCODE_SIG_V_V_V_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_V << 9), + OPCODE_SIG_X = (OPCODE_SIG_TYPE_X), + OPCODE_SIG_X_L = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_L << 3), + OPCODE_SIG_X_O = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_O << 3), + OPCODE_SIG_X_O_V = + (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_O << 3) | (OPCODE_SIG_TYPE_V << 6), + OPCODE_SIG_X_S = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_S << 3), + OPCODE_SIG_X_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3), + OPCODE_SIG_X_V_L = + (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_L << 6), + OPCODE_SIG_X_V_L_L = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | + (OPCODE_SIG_TYPE_L << 6) | (OPCODE_SIG_TYPE_L << 9), + OPCODE_SIG_X_V_O = + (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_O << 6), + OPCODE_SIG_X_V_S = + (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_S << 6), + OPCODE_SIG_X_V_V = + (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6), + OPCODE_SIG_X_V_V_V = (OPCODE_SIG_TYPE_X) | (OPCODE_SIG_TYPE_V << 3) | + (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_V << 9), + OPCODE_SIG_V = (OPCODE_SIG_TYPE_V), + OPCODE_SIG_V_O = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_O << 3), + OPCODE_SIG_V_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3), + OPCODE_SIG_V_V_O = + (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_O << 6), + OPCODE_SIG_V_V_O_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | + (OPCODE_SIG_TYPE_O << 6) | (OPCODE_SIG_TYPE_V << 9), + OPCODE_SIG_V_V_V = + (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | (OPCODE_SIG_TYPE_V << 6), + OPCODE_SIG_V_V_V_O = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | + (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_O << 9), + OPCODE_SIG_V_V_V_V = (OPCODE_SIG_TYPE_V) | (OPCODE_SIG_TYPE_V << 3) | + (OPCODE_SIG_TYPE_V << 6) | (OPCODE_SIG_TYPE_V << 9), }; #define GET_OPCODE_SIG_TYPE_DEST(sig) (OpcodeSignatureType)(sig & 0x7) @@ -248,21 +238,17 @@ enum OpcodeSignature { #define GET_OPCODE_SIG_TYPE_SRC3(sig) (OpcodeSignatureType)((sig >> 9) & 0x7) typedef struct { - uint32_t flags; - uint32_t signature; + uint32_t flags; + uint32_t signature; const char* name; - Opcode num; + Opcode num; } OpcodeInfo; - -#define DEFINE_OPCODE(num, name, sig, flags) \ - extern const OpcodeInfo num##_info; +#define DEFINE_OPCODE(num, name, sig, flags) extern const OpcodeInfo num##_info; #include #undef DEFINE_OPCODE - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_OPCODES_H_ diff --git a/src/alloy/hir/tracing.h b/src/alloy/hir/tracing.h index fbc2325f7..a0ad6bd89 100644 --- a/src/alloy/hir/tracing.h +++ b/src/alloy/hir/tracing.h @@ -13,23 +13,19 @@ #include #include - namespace alloy { namespace hir { const uint32_t ALLOY_HIR = alloy::tracing::EventType::ALLOY_HIR; - class EventType { -public: + public: enum { - ALLOY_HIR_FOO = ALLOY_HIR | (0), + ALLOY_HIR_FOO = ALLOY_HIR | (0), }; }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_TRACING_H_ diff --git a/src/alloy/hir/value.cc b/src/alloy/hir/value.cc index 0f723e943..3d78c407b 100644 --- a/src/alloy/hir/value.cc +++ b/src/alloy/hir/value.cc @@ -9,9 +9,8 @@ #include -using namespace alloy; -using namespace alloy::hir; - +namespace alloy { +namespace hir { Value::Use* Value::AddUse(Arena* arena, Instr* instr) { Use* use = arena->Alloc(); @@ -39,34 +38,34 @@ void Value::RemoveUse(Use* use) { uint32_t Value::AsUint32() { XEASSERT(IsConstant()); switch (type) { - case INT8_TYPE: - return constant.i8; - case INT16_TYPE: - return constant.i16; - case INT32_TYPE: - return constant.i32; - case INT64_TYPE: - return (uint32_t)constant.i64; - default: - XEASSERTALWAYS(); - return 0; + case INT8_TYPE: + return constant.i8; + case INT16_TYPE: + return constant.i16; + case INT32_TYPE: + return constant.i32; + case INT64_TYPE: + return (uint32_t)constant.i64; + default: + XEASSERTALWAYS(); + return 0; } } uint64_t Value::AsUint64() { XEASSERT(IsConstant()); switch (type) { - case INT8_TYPE: - return constant.i8; - case INT16_TYPE: - return constant.i16; - case INT32_TYPE: - return constant.i32; - case INT64_TYPE: - return constant.i64; - default: - XEASSERTALWAYS(); - return 0; + case INT8_TYPE: + return constant.i8; + case INT16_TYPE: + return constant.i16; + case INT32_TYPE: + return constant.i32; + case INT64_TYPE: + return constant.i64; + default: + XEASSERTALWAYS(); + return 0; } } @@ -77,87 +76,6 @@ void Value::Cast(TypeName target_type) { void Value::ZeroExtend(TypeName target_type) { switch (type) { - case INT8_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFF; - return; - case INT16_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFFFF; - return; - case INT32_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFFFFFFFF; - return; - } - // Unsupported types. - XEASSERTALWAYS(); -} - -void Value::SignExtend(TypeName target_type) { - switch (type) { - case INT8_TYPE: - type = target_type; - switch (target_type) { - case INT16_TYPE: - constant.i16 = constant.i8; - break; - case INT32_TYPE: - constant.i32 = constant.i8; - break; - case INT64_TYPE: - constant.i64 = constant.i8; - break; - } - return; - case INT16_TYPE: - type = target_type; - switch (target_type) { - case INT32_TYPE: - constant.i32 = constant.i16; - break; - case INT64_TYPE: - constant.i64 = constant.i16; - break; - } - return; - case INT32_TYPE: - type = target_type; - switch (target_type) { - case INT64_TYPE: - constant.i64 = constant.i32; - break; - } - return; - } - // Unsupported types. - XEASSERTALWAYS(); -} - -void Value::Truncate(TypeName target_type) { - switch (type) { - case INT16_TYPE: - switch (target_type) { - case INT8_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFF; - return; - } - break; - case INT32_TYPE: - switch (target_type) { - case INT8_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFF; - return; - case INT16_TYPE: - type = target_type; - constant.i64 = constant.i64 & 0xFFFF; - return; - } - break; - case INT64_TYPE: - switch (target_type) { case INT8_TYPE: type = target_type; constant.i64 = constant.i64 & 0xFF; @@ -170,8 +88,89 @@ void Value::Truncate(TypeName target_type) { type = target_type; constant.i64 = constant.i64 & 0xFFFFFFFF; return; - } - break; + } + // Unsupported types. + XEASSERTALWAYS(); +} + +void Value::SignExtend(TypeName target_type) { + switch (type) { + case INT8_TYPE: + type = target_type; + switch (target_type) { + case INT16_TYPE: + constant.i16 = constant.i8; + break; + case INT32_TYPE: + constant.i32 = constant.i8; + break; + case INT64_TYPE: + constant.i64 = constant.i8; + break; + } + return; + case INT16_TYPE: + type = target_type; + switch (target_type) { + case INT32_TYPE: + constant.i32 = constant.i16; + break; + case INT64_TYPE: + constant.i64 = constant.i16; + break; + } + return; + case INT32_TYPE: + type = target_type; + switch (target_type) { + case INT64_TYPE: + constant.i64 = constant.i32; + break; + } + return; + } + // Unsupported types. + XEASSERTALWAYS(); +} + +void Value::Truncate(TypeName target_type) { + switch (type) { + case INT16_TYPE: + switch (target_type) { + case INT8_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFF; + return; + } + break; + case INT32_TYPE: + switch (target_type) { + case INT8_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFF; + return; + case INT16_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFFFF; + return; + } + break; + case INT64_TYPE: + switch (target_type) { + case INT8_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFF; + return; + case INT16_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFFFF; + return; + case INT32_TYPE: + type = target_type; + constant.i64 = constant.i64 & 0xFFFFFFFF; + return; + } + break; } // Unsupported types. XEASSERTALWAYS(); @@ -188,70 +187,70 @@ void Value::Round(RoundMode round_mode) { } bool Value::Add(Value* other) { - #define CHECK_DID_CARRY(v1, v2) (((uint64_t)v2) > ~((uint64_t)v1)) - #define ADD_DID_CARRY(a, b) CHECK_DID_CARRY(a, b) +#define CHECK_DID_CARRY(v1, v2) (((uint64_t)v2) > ~((uint64_t)v1)) +#define ADD_DID_CARRY(a, b) CHECK_DID_CARRY(a, b) XEASSERT(type == other->type); bool did_carry = false; switch (type) { - case INT8_TYPE: - did_carry = ADD_DID_CARRY(constant.i8, other->constant.i8); - constant.i8 += other->constant.i8; - break; - case INT16_TYPE: - did_carry = ADD_DID_CARRY(constant.i16, other->constant.i16); - constant.i16 += other->constant.i16; - break; - case INT32_TYPE: - did_carry = ADD_DID_CARRY(constant.i32, other->constant.i32); - constant.i32 += other->constant.i32; - break; - case INT64_TYPE: - did_carry = ADD_DID_CARRY(constant.i64, other->constant.i64); - constant.i64 += other->constant.i64; - break; - case FLOAT32_TYPE: - constant.f32 += other->constant.f32; - break; - case FLOAT64_TYPE: - constant.f64 += other->constant.f64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + did_carry = ADD_DID_CARRY(constant.i8, other->constant.i8); + constant.i8 += other->constant.i8; + break; + case INT16_TYPE: + did_carry = ADD_DID_CARRY(constant.i16, other->constant.i16); + constant.i16 += other->constant.i16; + break; + case INT32_TYPE: + did_carry = ADD_DID_CARRY(constant.i32, other->constant.i32); + constant.i32 += other->constant.i32; + break; + case INT64_TYPE: + did_carry = ADD_DID_CARRY(constant.i64, other->constant.i64); + constant.i64 += other->constant.i64; + break; + case FLOAT32_TYPE: + constant.f32 += other->constant.f32; + break; + case FLOAT64_TYPE: + constant.f64 += other->constant.f64; + break; + default: + XEASSERTALWAYS(); + break; } return did_carry; } bool Value::Sub(Value* other) { - #define SUB_DID_CARRY(a, b) (b > a) +#define SUB_DID_CARRY(a, b) (b > a) XEASSERT(type == other->type); bool did_carry = false; switch (type) { - case INT8_TYPE: - did_carry = SUB_DID_CARRY(constant.i8, other->constant.i8); - constant.i8 -= other->constant.i8; - break; - case INT16_TYPE: - did_carry = SUB_DID_CARRY(constant.i16, other->constant.i16); - constant.i16 -= other->constant.i16; - break; - case INT32_TYPE: - did_carry = SUB_DID_CARRY(constant.i32, other->constant.i32); - constant.i32 -= other->constant.i32; - break; - case INT64_TYPE: - did_carry = SUB_DID_CARRY(constant.i64, other->constant.i64); - constant.i64 -= other->constant.i64; - break; - case FLOAT32_TYPE: - constant.f32 -= other->constant.f32; - break; - case FLOAT64_TYPE: - constant.f64 -= other->constant.f64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + did_carry = SUB_DID_CARRY(constant.i8, other->constant.i8); + constant.i8 -= other->constant.i8; + break; + case INT16_TYPE: + did_carry = SUB_DID_CARRY(constant.i16, other->constant.i16); + constant.i16 -= other->constant.i16; + break; + case INT32_TYPE: + did_carry = SUB_DID_CARRY(constant.i32, other->constant.i32); + constant.i32 -= other->constant.i32; + break; + case INT64_TYPE: + did_carry = SUB_DID_CARRY(constant.i64, other->constant.i64); + constant.i64 -= other->constant.i64; + break; + case FLOAT32_TYPE: + constant.f32 -= other->constant.f32; + break; + case FLOAT64_TYPE: + constant.f64 -= other->constant.f64; + break; + default: + XEASSERTALWAYS(); + break; } return did_carry; } @@ -259,54 +258,54 @@ bool Value::Sub(Value* other) { void Value::Mul(Value* other) { XEASSERT(type == other->type); switch (type) { - case INT8_TYPE: - constant.i8 *= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 *= other->constant.i16; - break; - case INT32_TYPE: - constant.i32 *= other->constant.i32; - break; - case INT64_TYPE: - constant.i64 *= other->constant.i64; - break; - case FLOAT32_TYPE: - constant.f32 *= other->constant.f32; - break; - case FLOAT64_TYPE: - constant.f64 *= other->constant.f64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 *= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 *= other->constant.i16; + break; + case INT32_TYPE: + constant.i32 *= other->constant.i32; + break; + case INT64_TYPE: + constant.i64 *= other->constant.i64; + break; + case FLOAT32_TYPE: + constant.f32 *= other->constant.f32; + break; + case FLOAT64_TYPE: + constant.f64 *= other->constant.f64; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Div(Value* other) { XEASSERT(type == other->type); switch (type) { - case INT8_TYPE: - constant.i8 /= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 /= other->constant.i16; - break; - case INT32_TYPE: - constant.i32 /= other->constant.i32; - break; - case INT64_TYPE: - constant.i64 /= other->constant.i64; - break; - case FLOAT32_TYPE: - constant.f32 /= other->constant.f32; - break; - case FLOAT64_TYPE: - constant.f64 /= other->constant.f64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 /= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 /= other->constant.i16; + break; + case INT32_TYPE: + constant.i32 /= other->constant.i32; + break; + case INT64_TYPE: + constant.i64 /= other->constant.i64; + break; + case FLOAT32_TYPE: + constant.f32 /= other->constant.f32; + break; + case FLOAT64_TYPE: + constant.f64 /= other->constant.f64; + break; + default: + XEASSERTALWAYS(); + break; } } @@ -322,276 +321,276 @@ void Value::MulSub(Value* dest, Value* value1, Value* value2, Value* value3) { void Value::Neg() { switch (type) { - case INT8_TYPE: - constant.i8 = -constant.i8; - break; - case INT16_TYPE: - constant.i16 = -constant.i16; - break; - case INT32_TYPE: - constant.i32 = -constant.i32; - break; - case INT64_TYPE: - constant.i64 = -constant.i64; - break; - case FLOAT32_TYPE: - constant.f32 = -constant.f32; - break; - case FLOAT64_TYPE: - constant.f64 = -constant.f64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = -constant.i8; + break; + case INT16_TYPE: + constant.i16 = -constant.i16; + break; + case INT32_TYPE: + constant.i32 = -constant.i32; + break; + case INT64_TYPE: + constant.i64 = -constant.i64; + break; + case FLOAT32_TYPE: + constant.f32 = -constant.f32; + break; + case FLOAT64_TYPE: + constant.f64 = -constant.f64; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Abs() { switch (type) { - case INT8_TYPE: - constant.i8 = abs(constant.i8); - break; - case INT16_TYPE: - constant.i16 = abs(constant.i16); - break; - case INT32_TYPE: - constant.i32 = abs(constant.i32); - break; - case INT64_TYPE: - constant.i64 = abs(constant.i64); - break; - case FLOAT32_TYPE: - constant.f32 = abs(constant.f32); - break; - case FLOAT64_TYPE: - constant.f64 = abs(constant.f64); - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = abs(constant.i8); + break; + case INT16_TYPE: + constant.i16 = abs(constant.i16); + break; + case INT32_TYPE: + constant.i32 = abs(constant.i32); + break; + case INT64_TYPE: + constant.i64 = abs(constant.i64); + break; + case FLOAT32_TYPE: + constant.f32 = abs(constant.f32); + break; + case FLOAT64_TYPE: + constant.f64 = abs(constant.f64); + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Sqrt() { switch (type) { - case FLOAT32_TYPE: - constant.f32 = 1.0f / sqrtf(constant.f32); - break; - case FLOAT64_TYPE: - constant.f64 = 1.0 / sqrt(constant.f64); - break; - default: - XEASSERTALWAYS(); - break; + case FLOAT32_TYPE: + constant.f32 = 1.0f / sqrtf(constant.f32); + break; + case FLOAT64_TYPE: + constant.f64 = 1.0 / sqrt(constant.f64); + break; + default: + XEASSERTALWAYS(); + break; } } void Value::RSqrt() { switch (type) { - case FLOAT32_TYPE: - constant.f32 = sqrt(constant.f32); - break; - case FLOAT64_TYPE: - constant.f64 = sqrt(constant.f64); - break; - default: - XEASSERTALWAYS(); - break; + case FLOAT32_TYPE: + constant.f32 = sqrt(constant.f32); + break; + case FLOAT64_TYPE: + constant.f64 = sqrt(constant.f64); + break; + default: + XEASSERTALWAYS(); + break; } } void Value::And(Value* other) { XEASSERT(type == other->type); switch (type) { - case INT8_TYPE: - constant.i8 &= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 &= other->constant.i16; - break; - case INT32_TYPE: - constant.i32 &= other->constant.i32; - break; - case INT64_TYPE: - constant.i64 &= other->constant.i64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 &= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 &= other->constant.i16; + break; + case INT32_TYPE: + constant.i32 &= other->constant.i32; + break; + case INT64_TYPE: + constant.i64 &= other->constant.i64; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Or(Value* other) { XEASSERT(type == other->type); switch (type) { - case INT8_TYPE: - constant.i8 |= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 |= other->constant.i16; - break; - case INT32_TYPE: - constant.i32 |= other->constant.i32; - break; - case INT64_TYPE: - constant.i64 |= other->constant.i64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 |= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 |= other->constant.i16; + break; + case INT32_TYPE: + constant.i32 |= other->constant.i32; + break; + case INT64_TYPE: + constant.i64 |= other->constant.i64; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Xor(Value* other) { XEASSERT(type == other->type); switch (type) { - case INT8_TYPE: - constant.i8 ^= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 ^= other->constant.i16; - break; - case INT32_TYPE: - constant.i32 ^= other->constant.i32; - break; - case INT64_TYPE: - constant.i64 ^= other->constant.i64; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 ^= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 ^= other->constant.i16; + break; + case INT32_TYPE: + constant.i32 ^= other->constant.i32; + break; + case INT64_TYPE: + constant.i64 ^= other->constant.i64; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Not() { switch (type) { - case INT8_TYPE: - constant.i8 = ~constant.i8; - break; - case INT16_TYPE: - constant.i16 = ~constant.i16; - break; - case INT32_TYPE: - constant.i32 = ~constant.i32; - break; - case INT64_TYPE: - constant.i64 = ~constant.i64; - break; - case VEC128_TYPE: - constant.v128.low = ~constant.v128.low; - constant.v128.high = ~constant.v128.high; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = ~constant.i8; + break; + case INT16_TYPE: + constant.i16 = ~constant.i16; + break; + case INT32_TYPE: + constant.i32 = ~constant.i32; + break; + case INT64_TYPE: + constant.i64 = ~constant.i64; + break; + case VEC128_TYPE: + constant.v128.low = ~constant.v128.low; + constant.v128.high = ~constant.v128.high; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Shl(Value* other) { XEASSERT(other->type == INT8_TYPE); switch (type) { - case INT8_TYPE: - constant.i8 <<= other->constant.i8; - break; - case INT16_TYPE: - constant.i16 <<= other->constant.i8; - break; - case INT32_TYPE: - constant.i32 <<= other->constant.i8; - break; - case INT64_TYPE: - constant.i64 <<= other->constant.i8; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 <<= other->constant.i8; + break; + case INT16_TYPE: + constant.i16 <<= other->constant.i8; + break; + case INT32_TYPE: + constant.i32 <<= other->constant.i8; + break; + case INT64_TYPE: + constant.i64 <<= other->constant.i8; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Shr(Value* other) { XEASSERT(other->type == INT8_TYPE); switch (type) { - case INT8_TYPE: - constant.i8 = (uint8_t)constant.i8 >> other->constant.i8; - break; - case INT16_TYPE: - constant.i16 = (uint16_t)constant.i16 >> other->constant.i8; - break; - case INT32_TYPE: - constant.i32 = (uint32_t)constant.i32 >> other->constant.i8; - break; - case INT64_TYPE: - constant.i64 = (uint16_t)constant.i64 >> other->constant.i8; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = (uint8_t)constant.i8 >> other->constant.i8; + break; + case INT16_TYPE: + constant.i16 = (uint16_t)constant.i16 >> other->constant.i8; + break; + case INT32_TYPE: + constant.i32 = (uint32_t)constant.i32 >> other->constant.i8; + break; + case INT64_TYPE: + constant.i64 = (uint16_t)constant.i64 >> other->constant.i8; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::Sha(Value* other) { XEASSERT(other->type == INT8_TYPE); switch (type) { - case INT8_TYPE: - constant.i8 = constant.i8 >> other->constant.i8; - break; - case INT16_TYPE: - constant.i16 = constant.i16 >> other->constant.i8; - break; - case INT32_TYPE: - constant.i32 = constant.i32 >> other->constant.i8; - break; - case INT64_TYPE: - constant.i64 = constant.i64 >> other->constant.i8; - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = constant.i8 >> other->constant.i8; + break; + case INT16_TYPE: + constant.i16 = constant.i16 >> other->constant.i8; + break; + case INT32_TYPE: + constant.i32 = constant.i32 >> other->constant.i8; + break; + case INT64_TYPE: + constant.i64 = constant.i64 >> other->constant.i8; + break; + default: + XEASSERTALWAYS(); + break; } } void Value::ByteSwap() { switch (type) { - case INT8_TYPE: - constant.i8 = constant.i8; - break; - case INT16_TYPE: - constant.i16 = XESWAP16(constant.i16); - break; - case INT32_TYPE: - constant.i32 = XESWAP32(constant.i32); - break; - case INT64_TYPE: - constant.i64 = XESWAP64(constant.i64); - break; - case VEC128_TYPE: - for (int n = 0; n < 4; n++) { - constant.v128.i4[n] = XESWAP32(constant.v128.i4[n]); - } - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = constant.i8; + break; + case INT16_TYPE: + constant.i16 = XESWAP16(constant.i16); + break; + case INT32_TYPE: + constant.i32 = XESWAP32(constant.i32); + break; + case INT64_TYPE: + constant.i64 = XESWAP64(constant.i64); + break; + case VEC128_TYPE: + for (int n = 0; n < 4; n++) { + constant.v128.i4[n] = XESWAP32(constant.v128.i4[n]); + } + break; + default: + XEASSERTALWAYS(); + break; } } void Value::CountLeadingZeros(const Value* other) { switch (other->type) { - case INT8_TYPE: - constant.i8 = static_cast(__lzcnt16(other->constant.i8) - 8); - break; - case INT16_TYPE: - constant.i8 = static_cast(__lzcnt16(other->constant.i16)); - break; - case INT32_TYPE: - constant.i8 = static_cast(__lzcnt(other->constant.i32)); - break; - case INT64_TYPE: - constant.i8 = static_cast(__lzcnt64(other->constant.i64)); - break; - default: - XEASSERTALWAYS(); - break; + case INT8_TYPE: + constant.i8 = static_cast(__lzcnt16(other->constant.i8) - 8); + break; + case INT16_TYPE: + constant.i8 = static_cast(__lzcnt16(other->constant.i16)); + break; + case INT32_TYPE: + constant.i8 = static_cast(__lzcnt(other->constant.i32)); + break; + case INT64_TYPE: + constant.i8 = static_cast(__lzcnt64(other->constant.i64)); + break; + default: + XEASSERTALWAYS(); + break; } } @@ -600,3 +599,6 @@ bool Value::Compare(Opcode opcode, Value* other) { XEASSERTALWAYS(); return false; } + +} // namespace hir +} // namespace alloy diff --git a/src/alloy/hir/value.h b/src/alloy/hir/value.h index 3c4e82619..edde60c67 100644 --- a/src/alloy/hir/value.h +++ b/src/alloy/hir/value.h @@ -14,58 +14,51 @@ #include #include - namespace alloy { namespace hir { class Instr; - enum TypeName { // Many tables rely on this ordering. - INT8_TYPE = 0, - INT16_TYPE = 1, - INT32_TYPE = 2, - INT64_TYPE = 3, - FLOAT32_TYPE = 4, - FLOAT64_TYPE = 5, - VEC128_TYPE = 6, - + INT8_TYPE = 0, + INT16_TYPE = 1, + INT32_TYPE = 2, + INT64_TYPE = 3, + FLOAT32_TYPE = 4, + FLOAT64_TYPE = 5, + VEC128_TYPE = 6, MAX_TYPENAME, }; -static bool IsIntType(TypeName type_name) { - return type_name <= INT64_TYPE; -} +static bool IsIntType(TypeName type_name) { return type_name <= INT64_TYPE; } static bool IsFloatType(TypeName type_name) { return type_name == FLOAT32_TYPE || type_name == FLOAT64_TYPE; } -static bool IsVecType(TypeName type_name) { - return type_name == VEC128_TYPE; -} +static bool IsVecType(TypeName type_name) { return type_name == VEC128_TYPE; } static size_t GetTypeSize(TypeName type_name) { switch (type_name) { - case INT8_TYPE: - return 1; - case INT16_TYPE: - return 2; - case INT32_TYPE: - return 4; - case INT64_TYPE: - return 8; - case FLOAT32_TYPE: - return 4; - case FLOAT64_TYPE: - return 8; - default: - case VEC128_TYPE: - return 16; + case INT8_TYPE: + return 1; + case INT16_TYPE: + return 2; + case INT32_TYPE: + return 4; + case INT64_TYPE: + return 8; + case FLOAT32_TYPE: + return 4; + case FLOAT64_TYPE: + return 8; + default: + case VEC128_TYPE: + return 16; } } enum ValueFlags { - VALUE_IS_CONSTANT = (1 << 1), - VALUE_IS_ALLOCATED = (1 << 2), // Used by backends. Do not set. + VALUE_IS_CONSTANT = (1 << 1), + VALUE_IS_ALLOCATED = (1 << 2), // Used by backends. Do not set. }; struct RegAssignment { @@ -74,23 +67,23 @@ struct RegAssignment { }; class Value { -public: + public: typedef struct Use_s { - Instr* instr; - Use_s* prev; - Use_s* next; + Instr* instr; + Use_s* prev; + Use_s* next; } Use; typedef union { - int8_t i8; - int16_t i16; - int32_t i32; - int64_t i64; - float f32; - double f64; - vec128_t v128; + int8_t i8; + int16_t i16; + int32_t i32; + int64_t i64; + float f32; + double f64; + vec128_t v128; } ConstantValue; -public: + public: uint32_t ordinal; TypeName type; @@ -98,14 +91,14 @@ public: RegAssignment reg; ConstantValue constant; - Instr* def; - Use* use_head; + Instr* def; + Use* use_head; // NOTE: for performance reasons this is not maintained during construction. - Instr* last_use; - Value* local_slot; + Instr* last_use; + Value* local_slot; // TODO(benvanik): remove to shrink size. - void* tag; + void* tag; Use* AddUse(Arena* arena, Instr* instr); void RemoveUse(Use* use); @@ -184,9 +177,7 @@ public: constant.v128 = other->constant.v128; } - inline bool IsConstant() const { - return !!(flags & VALUE_IS_CONSTANT); - } + inline bool IsConstant() const { return !!(flags & VALUE_IS_CONSTANT); } bool IsConstantTrue() const { if (type == VEC128_TYPE) { XEASSERTALWAYS(); @@ -201,8 +192,8 @@ public: } bool IsConstantZero() const { if (type == VEC128_TYPE) { - return (flags & VALUE_IS_CONSTANT) && - !constant.v128.low && !constant.v128.high; + return (flags & VALUE_IS_CONSTANT) && !constant.v128.low && + !constant.v128.high; } return (flags & VALUE_IS_CONSTANT) && !constant.i64; } @@ -210,160 +201,174 @@ public: if (type == VEC128_TYPE) { XEASSERTALWAYS(); } - return (flags & VALUE_IS_CONSTANT) && - (other->flags & VALUE_IS_CONSTANT) && + return (flags & VALUE_IS_CONSTANT) && (other->flags & VALUE_IS_CONSTANT) && constant.i64 == other->constant.i64; } bool IsConstantNE(Value* other) const { if (type == VEC128_TYPE) { XEASSERTALWAYS(); } - return (flags & VALUE_IS_CONSTANT) && - (other->flags & VALUE_IS_CONSTANT) && + return (flags & VALUE_IS_CONSTANT) && (other->flags & VALUE_IS_CONSTANT) && constant.i64 != other->constant.i64; } bool IsConstantSLT(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return constant.i8 < other->constant.i8; - case INT16_TYPE: - return constant.i16 < other->constant.i16; - case INT32_TYPE: - return constant.i32 < other->constant.i32; - case INT64_TYPE: - return constant.i64 < other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 < other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 < other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return constant.i8 < other->constant.i8; + case INT16_TYPE: + return constant.i16 < other->constant.i16; + case INT32_TYPE: + return constant.i32 < other->constant.i32; + case INT64_TYPE: + return constant.i64 < other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 < other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 < other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantSLE(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return constant.i8 <= other->constant.i8; - case INT16_TYPE: - return constant.i16 <= other->constant.i16; - case INT32_TYPE: - return constant.i32 <= other->constant.i32; - case INT64_TYPE: - return constant.i64 <= other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 <= other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 <= other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return constant.i8 <= other->constant.i8; + case INT16_TYPE: + return constant.i16 <= other->constant.i16; + case INT32_TYPE: + return constant.i32 <= other->constant.i32; + case INT64_TYPE: + return constant.i64 <= other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 <= other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 <= other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantSGT(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return constant.i8 > other->constant.i8; - case INT16_TYPE: - return constant.i16 > other->constant.i16; - case INT32_TYPE: - return constant.i32 > other->constant.i32; - case INT64_TYPE: - return constant.i64 > other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 > other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 > other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return constant.i8 > other->constant.i8; + case INT16_TYPE: + return constant.i16 > other->constant.i16; + case INT32_TYPE: + return constant.i32 > other->constant.i32; + case INT64_TYPE: + return constant.i64 > other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 > other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 > other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantSGE(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return constant.i8 >= other->constant.i8; - case INT16_TYPE: - return constant.i16 >= other->constant.i16; - case INT32_TYPE: - return constant.i32 >= other->constant.i32; - case INT64_TYPE: - return constant.i64 >= other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 >= other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 >= other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return constant.i8 >= other->constant.i8; + case INT16_TYPE: + return constant.i16 >= other->constant.i16; + case INT32_TYPE: + return constant.i32 >= other->constant.i32; + case INT64_TYPE: + return constant.i64 >= other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 >= other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 >= other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantULT(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return (uint8_t)constant.i8 < (uint8_t)other->constant.i8; - case INT16_TYPE: - return (uint16_t)constant.i16 < (uint16_t)other->constant.i16; - case INT32_TYPE: - return (uint32_t)constant.i32 < (uint32_t)other->constant.i32; - case INT64_TYPE: - return (uint64_t)constant.i64 < (uint64_t)other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 < other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 < other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return (uint8_t)constant.i8 < (uint8_t)other->constant.i8; + case INT16_TYPE: + return (uint16_t)constant.i16 < (uint16_t)other->constant.i16; + case INT32_TYPE: + return (uint32_t)constant.i32 < (uint32_t)other->constant.i32; + case INT64_TYPE: + return (uint64_t)constant.i64 < (uint64_t)other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 < other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 < other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantULE(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return (uint8_t)constant.i8 <= (uint8_t)other->constant.i8; - case INT16_TYPE: - return (uint16_t)constant.i16 <= (uint16_t)other->constant.i16; - case INT32_TYPE: - return (uint32_t)constant.i32 <= (uint32_t)other->constant.i32; - case INT64_TYPE: - return (uint64_t)constant.i64 <= (uint64_t)other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 <= other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 <= other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return (uint8_t)constant.i8 <= (uint8_t)other->constant.i8; + case INT16_TYPE: + return (uint16_t)constant.i16 <= (uint16_t)other->constant.i16; + case INT32_TYPE: + return (uint32_t)constant.i32 <= (uint32_t)other->constant.i32; + case INT64_TYPE: + return (uint64_t)constant.i64 <= (uint64_t)other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 <= other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 <= other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantUGT(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return (uint8_t)constant.i8 > (uint8_t)other->constant.i8; - case INT16_TYPE: - return (uint16_t)constant.i16 > (uint16_t)other->constant.i16; - case INT32_TYPE: - return (uint32_t)constant.i32 > (uint32_t)other->constant.i32; - case INT64_TYPE: - return (uint64_t)constant.i64 > (uint64_t)other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 > other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 > other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return (uint8_t)constant.i8 > (uint8_t)other->constant.i8; + case INT16_TYPE: + return (uint16_t)constant.i16 > (uint16_t)other->constant.i16; + case INT32_TYPE: + return (uint32_t)constant.i32 > (uint32_t)other->constant.i32; + case INT64_TYPE: + return (uint64_t)constant.i64 > (uint64_t)other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 > other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 > other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } bool IsConstantUGE(Value* other) const { XEASSERT(flags & VALUE_IS_CONSTANT && other->flags & VALUE_IS_CONSTANT); switch (type) { - case INT8_TYPE: - return (uint8_t)constant.i8 >= (uint8_t)other->constant.i8; - case INT16_TYPE: - return (uint16_t)constant.i16 >= (uint16_t)other->constant.i16; - case INT32_TYPE: - return (uint32_t)constant.i32 >= (uint32_t)other->constant.i32; - case INT64_TYPE: - return (uint64_t)constant.i64 >= (uint64_t)other->constant.i64; - case FLOAT32_TYPE: - return constant.f32 >= other->constant.f32; - case FLOAT64_TYPE: - return constant.f64 >= other->constant.f64; - default: XEASSERTALWAYS(); return false; + case INT8_TYPE: + return (uint8_t)constant.i8 >= (uint8_t)other->constant.i8; + case INT16_TYPE: + return (uint16_t)constant.i16 >= (uint16_t)other->constant.i16; + case INT32_TYPE: + return (uint32_t)constant.i32 >= (uint32_t)other->constant.i32; + case INT64_TYPE: + return (uint64_t)constant.i64 >= (uint64_t)other->constant.i64; + case FLOAT32_TYPE: + return constant.f32 >= other->constant.f32; + case FLOAT64_TYPE: + return constant.f64 >= other->constant.f64; + default: + XEASSERTALWAYS(); + return false; } } uint32_t AsUint32(); @@ -397,9 +402,7 @@ public: bool Compare(Opcode opcode, Value* other); }; - } // namespace hir } // namespace alloy - #endif // ALLOY_HIR_VALUE_H_ diff --git a/src/alloy/memory.cc b/src/alloy/memory.cc index 2933392dd..9fabfb9ba 100644 --- a/src/alloy/memory.cc +++ b/src/alloy/memory.cc @@ -13,11 +13,10 @@ #include #endif -using namespace alloy; +namespace alloy { - -Memory::Memory() : - membase_(0), reserve_address_(0) { +Memory::Memory() : membase_(0), reserve_address_(0) { +// TODO(benvanik): move to poly. #if XE_LIKE_WIN32 SYSTEM_INFO si; GetSystemInfo(&si); @@ -27,12 +26,9 @@ Memory::Memory() : #endif } -Memory::~Memory() { -} +Memory::~Memory() {} -int Memory::Initialize() { - return 0; -} +int Memory::Initialize() { return 0; } void Memory::Zero(uint64_t address, size_t size) { uint8_t* p = membase_ + address; @@ -50,15 +46,14 @@ void Memory::Copy(uint64_t dest, uint64_t src, size_t size) { XEIGNORE(xe_copy_memory(pdest, size, psrc, size)); } -uint64_t Memory::SearchAligned( - uint64_t start, uint64_t end, - const uint32_t* values, size_t value_count) { +uint64_t Memory::SearchAligned(uint64_t start, uint64_t end, + const uint32_t* values, size_t value_count) { XEASSERT(start <= end); - const uint32_t *p = (const uint32_t*)(membase_ + start); - const uint32_t *pe = (const uint32_t*)(membase_ + end); + const uint32_t* p = (const uint32_t*)(membase_ + start); + const uint32_t* pe = (const uint32_t*)(membase_ + end); while (p != pe) { if (*p == values[0]) { - const uint32_t *pc = p + 1; + const uint32_t* pc = p + 1; size_t matched = 1; for (size_t n = 1; n < value_count; n++, pc++) { if (*pc != values[n]) { @@ -74,3 +69,5 @@ uint64_t Memory::SearchAligned( } return 0; } + +} // namespace alloy diff --git a/src/alloy/memory.h b/src/alloy/memory.h index 72719cc4a..a29d12170 100644 --- a/src/alloy/memory.h +++ b/src/alloy/memory.h @@ -12,19 +12,16 @@ #include - namespace alloy { - enum { - MEMORY_FLAG_64KB_PAGES = (1 << 1), - MEMORY_FLAG_ZERO = (1 << 2), - MEMORY_FLAG_PHYSICAL = (1 << 3), + MEMORY_FLAG_64KB_PAGES = (1 << 1), + MEMORY_FLAG_ZERO = (1 << 2), + MEMORY_FLAG_PHYSICAL = (1 << 3), }; - class Memory { -public: + public: Memory(); virtual ~Memory(); @@ -42,8 +39,8 @@ public: void Fill(uint64_t address, size_t size, uint8_t value); void Copy(uint64_t dest, uint64_t src, size_t size); - uint64_t SearchAligned(uint64_t start, uint64_t end, - const uint32_t* values, size_t value_count); + uint64_t SearchAligned(uint64_t start, uint64_t end, const uint32_t* values, + size_t value_count); virtual uint8_t LoadI8(uint64_t address) = 0; virtual uint16_t LoadI16(uint64_t address) = 0; @@ -54,9 +51,8 @@ public: virtual void StoreI32(uint64_t address, uint32_t value) = 0; virtual void StoreI64(uint64_t address, uint64_t value) = 0; - virtual uint64_t HeapAlloc( - uint64_t base_address, size_t size, uint32_t flags, - uint32_t alignment = 0x20) = 0; + virtual uint64_t HeapAlloc(uint64_t base_address, size_t size, uint32_t flags, + uint32_t alignment = 0x20) = 0; virtual int HeapFree(uint64_t address, size_t size) = 0; virtual size_t QuerySize(uint64_t base_address) = 0; @@ -64,14 +60,12 @@ public: virtual int Protect(uint64_t address, size_t size, uint32_t access) = 0; virtual uint32_t QueryProtect(uint64_t address) = 0; -protected: - size_t system_page_size_; - uint8_t* membase_; - uint32_t reserve_address_; + protected: + size_t system_page_size_; + uint8_t* membase_; + uint32_t reserve_address_; }; - } // namespace alloy - #endif // ALLOY_MEMORY_H_ diff --git a/src/alloy/runtime/debug_info.cc b/src/alloy/runtime/debug_info.cc index ad6056eec..266e57946 100644 --- a/src/alloy/runtime/debug_info.cc +++ b/src/alloy/runtime/debug_info.cc @@ -9,18 +9,16 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -DebugInfo::DebugInfo() : - source_disasm_(0), - raw_hir_disasm_(0), - hir_disasm_(0), - machine_code_disasm_(0), - source_map_count_(0), - source_map_(NULL) { -} +DebugInfo::DebugInfo() + : source_disasm_(0), + raw_hir_disasm_(0), + hir_disasm_(0), + machine_code_disasm_(0), + source_map_count_(0), + source_map_(NULL) {} DebugInfo::~DebugInfo() { xe_free(source_map_); @@ -70,3 +68,6 @@ SourceMapEntry* DebugInfo::LookupCodeOffset(uint64_t offset) { } return NULL; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/debug_info.h b/src/alloy/runtime/debug_info.h index 47d2aa277..8ed6b0b34 100644 --- a/src/alloy/runtime/debug_info.h +++ b/src/alloy/runtime/debug_info.h @@ -12,35 +12,28 @@ #include - namespace alloy { namespace runtime { - enum DebugInfoFlags { - DEBUG_INFO_NONE = 0, - - DEBUG_INFO_SOURCE_DISASM = (1 << 1), - DEBUG_INFO_RAW_HIR_DISASM = (1 << 2), - DEBUG_INFO_HIR_DISASM = (1 << 3), - DEBUG_INFO_MACHINE_CODE_DISASM = (1 << 4), - - DEBUG_INFO_SOURCE_MAP = (1 << 5), - - DEBUG_INFO_DEFAULT = DEBUG_INFO_SOURCE_MAP, - DEBUG_INFO_ALL_DISASM = 0xFFFF, + DEBUG_INFO_NONE = 0, + DEBUG_INFO_SOURCE_DISASM = (1 << 1), + DEBUG_INFO_RAW_HIR_DISASM = (1 << 2), + DEBUG_INFO_HIR_DISASM = (1 << 3), + DEBUG_INFO_MACHINE_CODE_DISASM = (1 << 4), + DEBUG_INFO_SOURCE_MAP = (1 << 5), + DEBUG_INFO_DEFAULT = DEBUG_INFO_SOURCE_MAP, + DEBUG_INFO_ALL_DISASM = 0xFFFF, }; - typedef struct SourceMapEntry_s { - uint64_t source_offset; // Original source address/offset. - uint64_t hir_offset; // Block ordinal (16b) | Instr ordinal (16b) - uint64_t code_offset; // Offset from emitted code start. + uint64_t source_offset; // Original source address/offset. + uint64_t hir_offset; // Block ordinal (16b) | Instr ordinal (16b) + uint64_t code_offset; // Offset from emitted code start. } SourceMapEntry; - class DebugInfo { -public: + public: DebugInfo(); ~DebugInfo(); @@ -53,13 +46,12 @@ public: const char* machine_code_disasm() const { return machine_code_disasm_; } void set_machine_code_disasm(char* value) { machine_code_disasm_ = value; } - void InitializeSourceMap(size_t source_map_count, - SourceMapEntry* source_map); + void InitializeSourceMap(size_t source_map_count, SourceMapEntry* source_map); SourceMapEntry* LookupSourceOffset(uint64_t offset); SourceMapEntry* LookupHIROffset(uint64_t offset); SourceMapEntry* LookupCodeOffset(uint64_t offset); -private: + private: char* source_disasm_; char* raw_hir_disasm_; char* hir_disasm_; @@ -69,9 +61,7 @@ private: SourceMapEntry* source_map_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_DEBUG_INFO_H_ diff --git a/src/alloy/runtime/debugger.cc b/src/alloy/runtime/debugger.cc index 565a6d6cb..fee71e67e 100644 --- a/src/alloy/runtime/debugger.cc +++ b/src/alloy/runtime/debugger.cc @@ -13,19 +13,15 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { +Breakpoint::Breakpoint(Type type, uint64_t address) + : type_(type), address_(address) {} -Breakpoint::Breakpoint(Type type, uint64_t address) : - type_(type), address_(address) { -} +Breakpoint::~Breakpoint() {} -Breakpoint::~Breakpoint() { -} - -Debugger::Debugger(Runtime* runtime) : - runtime_(runtime) {} +Debugger::Debugger(Runtime* runtime) : runtime_(runtime) {} Debugger::~Debugger() {} @@ -134,8 +130,8 @@ int Debugger::RemoveBreakpoint(Breakpoint* breakpoint) { return 0; } -void Debugger::FindBreakpoints( - uint64_t address, std::vector& out_breakpoints) { +void Debugger::FindBreakpoints(uint64_t address, + std::vector& out_breakpoints) { std::lock_guard guard(breakpoints_lock_); out_breakpoints.clear(); @@ -191,8 +187,8 @@ void Debugger::OnFunctionDefined(FunctionInfo* symbol_info, } } -void Debugger::OnBreakpointHit( - ThreadState* thread_state, Breakpoint* breakpoint) { +void Debugger::OnBreakpointHit(ThreadState* thread_state, + Breakpoint* breakpoint) { // Suspend all threads immediately. SuspendAllThreads(); @@ -202,3 +198,6 @@ void Debugger::OnBreakpointHit( // Note that we stay suspended. } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/debugger.h b/src/alloy/runtime/debugger.h index 344cb80ab..5eb399a0f 100644 --- a/src/alloy/runtime/debugger.h +++ b/src/alloy/runtime/debugger.h @@ -15,7 +15,6 @@ #include - namespace alloy { namespace runtime { @@ -25,14 +24,14 @@ class FunctionInfo; class Runtime; class ThreadState; - class Breakpoint { -public: + public: enum Type { TEMP_TYPE, CODE_TYPE, }; -public: + + public: Breakpoint(Type type, uint64_t address); ~Breakpoint(); @@ -42,42 +41,41 @@ public: const char* id() const { return id_.c_str(); } void set_id(const char* id) { id_ = id; } -private: + private: Type type_; uint64_t address_; std::string id_; }; - class DebugEvent { -public: - DebugEvent(Debugger* debugger) : - debugger_(debugger) {} + public: + DebugEvent(Debugger* debugger) : debugger_(debugger) {} virtual ~DebugEvent() {} Debugger* debugger() const { return debugger_; } -protected: + + protected: Debugger* debugger_; }; - class BreakpointHitEvent : public DebugEvent { -public: - BreakpointHitEvent( - Debugger* debugger, ThreadState* thread_state, Breakpoint* breakpoint) : - thread_state_(thread_state), breakpoint_(breakpoint), - DebugEvent(debugger) {} + public: + BreakpointHitEvent(Debugger* debugger, ThreadState* thread_state, + Breakpoint* breakpoint) + : thread_state_(thread_state), + breakpoint_(breakpoint), + DebugEvent(debugger) {} virtual ~BreakpointHitEvent() {} ThreadState* thread_state() const { return thread_state_; } Breakpoint* breakpoint() const { return breakpoint_; } -protected: + + protected: ThreadState* thread_state_; Breakpoint* breakpoint_; }; - class Debugger { -public: + public: Debugger(Runtime* runtime); ~Debugger(); @@ -87,12 +85,12 @@ public: int ResumeThread(uint32_t thread_id); int ResumeAllThreads(bool force = false); - void ForEachThread(std::function callback); + void ForEachThread(std::function callback); int AddBreakpoint(Breakpoint* breakpoint); int RemoveBreakpoint(Breakpoint* breakpoint); - void FindBreakpoints( - uint64_t address, std::vector& out_breakpoints); + void FindBreakpoints(uint64_t address, + std::vector& out_breakpoints); void OnThreadCreated(ThreadState* thread_state); void OnThreadDestroyed(ThreadState* thread_state); @@ -100,10 +98,10 @@ public: void OnBreakpointHit(ThreadState* thread_state, Breakpoint* breakpoint); -public: + public: Delegate breakpoint_hit; -private: + private: Runtime* runtime_; std::mutex threads_lock_; @@ -115,9 +113,7 @@ private: BreakpointMultimap breakpoints_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_DEBUGGER_H_ diff --git a/src/alloy/runtime/entry_table.cc b/src/alloy/runtime/entry_table.cc index 5238ec6ae..4d2bef52a 100644 --- a/src/alloy/runtime/entry_table.cc +++ b/src/alloy/runtime/entry_table.cc @@ -9,9 +9,8 @@ #include -using namespace alloy; -using namespace alloy::runtime; - +namespace alloy { +namespace runtime { EntryTable::EntryTable() = default; @@ -75,8 +74,7 @@ std::vector EntryTable::FindWithAddress(uint64_t address) { std::vector fns; for (auto it = map_.begin(); it != map_.end(); ++it) { Entry* entry = it->second; - if (address >= entry->address && - address <= entry->end_address) { + if (address >= entry->address && address <= entry->end_address) { if (entry->status == Entry::STATUS_READY) { fns.push_back(entry->function); } @@ -84,3 +82,6 @@ std::vector EntryTable::FindWithAddress(uint64_t address) { } return fns; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/entry_table.h b/src/alloy/runtime/entry_table.h index 9ff7729b1..206d36c15 100644 --- a/src/alloy/runtime/entry_table.h +++ b/src/alloy/runtime/entry_table.h @@ -14,30 +14,27 @@ #include - namespace alloy { namespace runtime { class Function; - typedef struct Entry_t { typedef enum { - STATUS_NEW = 0, + STATUS_NEW = 0, STATUS_COMPILING, STATUS_READY, STATUS_FAILED, } Status; - uint64_t address; - uint64_t end_address; - Status status; + uint64_t address; + uint64_t end_address; + Status status; Function* function; } Entry; - class EntryTable { -public: + public: EntryTable(); ~EntryTable(); @@ -46,16 +43,14 @@ public: std::vector FindWithAddress(uint64_t address); -private: + private: // TODO(benvanik): replace with a better data structure. std::mutex lock_; typedef std::unordered_map EntryMap; EntryMap map_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_ENTRY_TABLE_H_ diff --git a/src/alloy/runtime/function.cc b/src/alloy/runtime/function.cc index a5993be99..6b1125681 100644 --- a/src/alloy/runtime/function.cc +++ b/src/alloy/runtime/function.cc @@ -13,14 +13,13 @@ #include #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -Function::Function(FunctionInfo* symbol_info) : - address_(symbol_info->address()), - symbol_info_(symbol_info), debug_info_(0) { -} +Function::Function(FunctionInfo* symbol_info) + : address_(symbol_info->address()), + symbol_info_(symbol_info), + debug_info_(0) {} Function::~Function() = default; @@ -75,16 +74,14 @@ int Function::Call(ThreadState* thread_state, uint64_t return_address) { } int result = 0; - + if (symbol_info_->behavior() == FunctionInfo::BEHAVIOR_EXTERN) { auto handler = symbol_info_->extern_handler(); if (handler) { - handler(thread_state->raw_context(), - symbol_info_->extern_arg0(), + handler(thread_state->raw_context(), symbol_info_->extern_arg0(), symbol_info_->extern_arg1()); } else { - XELOGW("undefined extern call to %.8X %s", - symbol_info_->address(), + XELOGW("undefined extern call to %.8X %s", symbol_info_->address(), symbol_info_->name()); result = 1; } @@ -97,3 +94,6 @@ int Function::Call(ThreadState* thread_state, uint64_t return_address) { } return result; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/function.h b/src/alloy/runtime/function.h index e34ff5119..3ea3c4c9e 100644 --- a/src/alloy/runtime/function.h +++ b/src/alloy/runtime/function.h @@ -16,7 +16,6 @@ #include #include - namespace alloy { namespace runtime { @@ -24,9 +23,8 @@ class Breakpoint; class FunctionInfo; class ThreadState; - class Function { -public: + public: Function(FunctionInfo* symbol_info); virtual ~Function(); @@ -41,14 +39,13 @@ public: int Call(ThreadState* thread_state, uint64_t return_address); -protected: + protected: Breakpoint* FindBreakpoint(uint64_t address); virtual int AddBreakpointImpl(Breakpoint* breakpoint) { return 0; } virtual int RemoveBreakpointImpl(Breakpoint* breakpoint) { return 0; } - virtual int CallImpl(ThreadState* thread_state, - uint64_t return_address) = 0; + virtual int CallImpl(ThreadState* thread_state, uint64_t return_address) = 0; -protected: + protected: uint64_t address_; FunctionInfo* symbol_info_; DebugInfo* debug_info_; @@ -58,9 +55,7 @@ protected: std::vector breakpoints_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_FUNCTION_H_ diff --git a/src/alloy/runtime/instrument.cc b/src/alloy/runtime/instrument.cc index 5bae5fc98..87bdcec78 100644 --- a/src/alloy/runtime/instrument.cc +++ b/src/alloy/runtime/instrument.cc @@ -13,16 +13,11 @@ #include #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - - -Instrument::Instrument(Runtime* runtime) : - runtime_(runtime), - memory_(runtime->memory()), - is_attached_(false) { -} +Instrument::Instrument(Runtime* runtime) + : runtime_(runtime), memory_(runtime->memory()), is_attached_(false) {} Instrument::~Instrument() { if (is_attached_) { @@ -34,7 +29,7 @@ bool Instrument::Attach() { if (is_attached_) { return false; } - //runtime->AttachInstrument(this); + // runtime->AttachInstrument(this); is_attached_ = true; return true; } @@ -44,16 +39,12 @@ bool Instrument::Detach() { return false; } is_attached_ = false; - //runtime->DetachInstrument(this); + // runtime->DetachInstrument(this); return true; } - -FunctionInstrument::FunctionInstrument( - Runtime* runtime, Function* function) : - target_(function), - Instrument(runtime) { -} +FunctionInstrument::FunctionInstrument(Runtime* runtime, Function* function) + : target_(function), Instrument(runtime) {} bool FunctionInstrument::Attach() { if (!Instrument::Attach()) { @@ -88,12 +79,9 @@ void FunctionInstrument::Exit(ThreadState* thread_state) { // } - -MemoryInstrument::MemoryInstrument( - Runtime* runtime, uint64_t address, uint64_t end_address) : - address_(address), end_address_(end_address), - Instrument(runtime) { -} +MemoryInstrument::MemoryInstrument(Runtime* runtime, uint64_t address, + uint64_t end_address) + : address_(address), end_address_(end_address), Instrument(runtime) {} bool MemoryInstrument::Attach() { if (!Instrument::Attach()) { @@ -116,7 +104,10 @@ bool MemoryInstrument::Detach() { return true; } -void MemoryInstrument::Access( - ThreadState* thread_state, uint64_t address, AccessType type) { +void MemoryInstrument::Access(ThreadState* thread_state, uint64_t address, + AccessType type) { // TODO(benvanik): get thread local instance } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/instrument.h b/src/alloy/runtime/instrument.h index 2c45fc31c..c75d0ad09 100644 --- a/src/alloy/runtime/instrument.h +++ b/src/alloy/runtime/instrument.h @@ -14,7 +14,6 @@ XEDECLARECLASS1(alloy, Memory); - namespace alloy { namespace runtime { @@ -22,9 +21,8 @@ class Function; class Runtime; class ThreadState; - class Instrument { -public: + public: Instrument(Runtime* runtime); virtual ~Instrument(); @@ -35,15 +33,14 @@ public: virtual bool Attach(); virtual bool Detach(); -private: - Runtime* runtime_; - Memory* memory_; - bool is_attached_; + private: + Runtime* runtime_; + Memory* memory_; + bool is_attached_; }; - class FunctionInstrument : public Instrument { -public: + public: FunctionInstrument(Runtime* runtime, Function* function); virtual ~FunctionInstrument() {} @@ -52,13 +49,13 @@ public: virtual bool Attach(); virtual bool Detach(); -public: + public: void Enter(ThreadState* thread_state); void Exit(ThreadState* thread_state); -protected: + protected: class Instance { - public: + public: Instance(FunctionInstrument* instrument) : instrument_(instrument) {} virtual ~Instance() {} @@ -75,17 +72,16 @@ protected: // Call(target_fn/address) // Return(opt_value) - private: + private: FunctionInstrument* instrument_; }; -private: + private: Function* target_; }; - class MemoryInstrument : public Instrument { -public: + public: MemoryInstrument(Runtime* runtime, uint64_t address, uint64_t end_address); virtual ~MemoryInstrument() {} @@ -95,34 +91,33 @@ public: virtual bool Attach(); virtual bool Detach(); -public: + public: enum AccessType { ACCESS_READ = (1 << 1), ACCESS_WRITE = (1 << 2), }; void Access(ThreadState* thread_state, uint64_t address, AccessType type); -protected: + protected: class Instance { - public: + public: Instance(MemoryInstrument* instrument) : instrument_(instrument) {} virtual ~Instance() {} MemoryInstrument* instrument() const { return instrument_; } - virtual void OnAccess( - ThreadState* thread_state, uint64_t address, AccessType type) = 0; + virtual void OnAccess(ThreadState* thread_state, uint64_t address, + AccessType type) = 0; - private: + private: MemoryInstrument* instrument_; }; -private: + private: uint64_t address_; uint64_t end_address_; }; - // ThreadInstrument // (v Detach()) // ThreadInstrumentInstance: @@ -141,9 +136,7 @@ private: // v OnUnload(context) // // get proc address? - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_INSTRUMENT_H_ diff --git a/src/alloy/runtime/module.cc b/src/alloy/runtime/module.cc index 4cd4550c9..f144de2e3 100644 --- a/src/alloy/runtime/module.cc +++ b/src/alloy/runtime/module.cc @@ -14,12 +14,11 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -Module::Module(Runtime* runtime) : - runtime_(runtime), memory_(runtime->memory()) {} +Module::Module(Runtime* runtime) + : runtime_(runtime), memory_(runtime->memory()) {} Module::~Module() { std::lock_guard guard(lock_); @@ -30,9 +29,7 @@ Module::~Module() { } } -bool Module::ContainsAddress(uint64_t address) { - return true; -} +bool Module::ContainsAddress(uint64_t address) { return true; } SymbolInfo* Module::LookupSymbol(uint64_t address, bool wait) { lock_.lock(); @@ -58,8 +55,9 @@ SymbolInfo* Module::LookupSymbol(uint64_t address, bool wait) { return symbol_info; } -SymbolInfo::Status Module::DeclareSymbol( - SymbolInfo::Type type, uint64_t address, SymbolInfo** out_symbol_info) { +SymbolInfo::Status Module::DeclareSymbol(SymbolInfo::Type type, + uint64_t address, + SymbolInfo** out_symbol_info) { *out_symbol_info = NULL; lock_.lock(); SymbolMap::const_iterator it = map_.find(address); @@ -85,12 +83,12 @@ SymbolInfo::Status Module::DeclareSymbol( } else { // Create and return for initialization. switch (type) { - case SymbolInfo::TYPE_FUNCTION: - symbol_info = new FunctionInfo(this, address); - break; - case SymbolInfo::TYPE_VARIABLE: - symbol_info = new VariableInfo(this, address); - break; + case SymbolInfo::TYPE_FUNCTION: + symbol_info = new FunctionInfo(this, address); + break; + case SymbolInfo::TYPE_VARIABLE: + symbol_info = new VariableInfo(this, address); + break; } map_[address] = symbol_info; list_.push_back(symbol_info); @@ -107,20 +105,20 @@ SymbolInfo::Status Module::DeclareSymbol( return status; } -SymbolInfo::Status Module::DeclareFunction( - uint64_t address, FunctionInfo** out_symbol_info) { +SymbolInfo::Status Module::DeclareFunction(uint64_t address, + FunctionInfo** out_symbol_info) { SymbolInfo* symbol_info; - SymbolInfo::Status status = DeclareSymbol( - SymbolInfo::TYPE_FUNCTION, address, &symbol_info); + SymbolInfo::Status status = + DeclareSymbol(SymbolInfo::TYPE_FUNCTION, address, &symbol_info); *out_symbol_info = (FunctionInfo*)symbol_info; return status; } -SymbolInfo::Status Module::DeclareVariable( - uint64_t address, VariableInfo** out_symbol_info) { +SymbolInfo::Status Module::DeclareVariable(uint64_t address, + VariableInfo** out_symbol_info) { SymbolInfo* symbol_info; - SymbolInfo::Status status = DeclareSymbol( - SymbolInfo::TYPE_VARIABLE, address, &symbol_info); + SymbolInfo::Status status = + DeclareSymbol(SymbolInfo::TYPE_VARIABLE, address, &symbol_info); *out_symbol_info = (VariableInfo*)symbol_info; return status; } @@ -156,7 +154,7 @@ SymbolInfo::Status Module::DefineVariable(VariableInfo* symbol_info) { return DefineSymbol((SymbolInfo*)symbol_info); } -void Module::ForEachFunction(std::function callback) { +void Module::ForEachFunction(std::function callback) { SCOPE_profile_cpu_f("alloy"); std::lock_guard guard(lock_); for (auto it = list_.begin(); it != list_.end(); ++it) { @@ -169,7 +167,7 @@ void Module::ForEachFunction(std::function callback) { } void Module::ForEachFunction(size_t since, size_t& version, - std::function callback) { + std::function callback) { SCOPE_profile_cpu_f("alloy"); std::lock_guard guard(lock_); size_t count = list_.size(); @@ -204,8 +202,7 @@ int Module::ReadMap(const char* file_name) { while (std::getline(infile, line)) { // Remove newline. while (line.size() && - (line[line.size() - 1] == '\r' || - line[line.size() - 1] == '\n')) { + (line[line.size() - 1] == '\r' || line[line.size() - 1] == '\n')) { line.erase(line.end() - 1); } @@ -254,3 +251,6 @@ int Module::ReadMap(const char* file_name) { return 0; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/module.h b/src/alloy/runtime/module.h index 63ca706fe..e55b18375 100644 --- a/src/alloy/runtime/module.h +++ b/src/alloy/runtime/module.h @@ -19,16 +19,14 @@ #include #include - namespace alloy { namespace runtime { class Function; class Runtime; - class Module { -public: + public: Module(Runtime* runtime); virtual ~Module(); @@ -39,30 +37,30 @@ public: virtual bool ContainsAddress(uint64_t address); SymbolInfo* LookupSymbol(uint64_t address, bool wait = true); - SymbolInfo::Status DeclareFunction( - uint64_t address, FunctionInfo** out_symbol_info); - SymbolInfo::Status DeclareVariable( - uint64_t address, VariableInfo** out_symbol_info); + SymbolInfo::Status DeclareFunction(uint64_t address, + FunctionInfo** out_symbol_info); + SymbolInfo::Status DeclareVariable(uint64_t address, + VariableInfo** out_symbol_info); SymbolInfo::Status DefineFunction(FunctionInfo* symbol_info); SymbolInfo::Status DefineVariable(VariableInfo* symbol_info); - void ForEachFunction(std::function callback); + void ForEachFunction(std::function callback); void ForEachFunction(size_t since, size_t& version, - std::function callback); + std::function callback); int ReadMap(const char* file_name); -private: - SymbolInfo::Status DeclareSymbol( - SymbolInfo::Type type, uint64_t address, SymbolInfo** out_symbol_info); + private: + SymbolInfo::Status DeclareSymbol(SymbolInfo::Type type, uint64_t address, + SymbolInfo** out_symbol_info); SymbolInfo::Status DefineSymbol(SymbolInfo* symbol_info); -protected: + protected: Runtime* runtime_; Memory* memory_; -private: + private: // TODO(benvanik): replace with a better data structure. std::mutex lock_; typedef std::unordered_map SymbolMap; @@ -71,9 +69,7 @@ private: SymbolList list_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_MODULE_H_ diff --git a/src/alloy/runtime/raw_module.cc b/src/alloy/runtime/raw_module.cc index c152dcf1c..32346bc1a 100644 --- a/src/alloy/runtime/raw_module.cc +++ b/src/alloy/runtime/raw_module.cc @@ -9,15 +9,15 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -RawModule::RawModule(Runtime* runtime) : - name_(0), - base_address_(0), low_address_(0), high_address_(0), - Module(runtime) { -} +RawModule::RawModule(Runtime* runtime) + : name_(0), + base_address_(0), + low_address_(0), + high_address_(0), + Module(runtime) {} RawModule::~RawModule() { if (base_address_) { @@ -33,8 +33,8 @@ int RawModule::LoadFile(uint64_t base_address, const char* path) { fseek(file, 0, SEEK_SET); // Allocate memory. - base_address_ = memory_->HeapAlloc( - base_address, file_length, MEMORY_FLAG_ZERO); + base_address_ = + memory_->HeapAlloc(base_address, file_length, MEMORY_FLAG_ZERO); if (!base_address_) { fclose(file); return 1; @@ -59,3 +59,6 @@ int RawModule::LoadFile(uint64_t base_address, const char* path) { bool RawModule::ContainsAddress(uint64_t address) { return address >= low_address_ && address < high_address_; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/raw_module.h b/src/alloy/runtime/raw_module.h index 230e44f7e..dfedfb60c 100644 --- a/src/alloy/runtime/raw_module.h +++ b/src/alloy/runtime/raw_module.h @@ -12,13 +12,11 @@ #include - namespace alloy { namespace runtime { - class RawModule : public Module { -public: + public: RawModule(Runtime* runtime); virtual ~RawModule(); @@ -28,16 +26,14 @@ public: virtual bool ContainsAddress(uint64_t address); -private: - char* name_; - uint64_t base_address_; - uint64_t low_address_; - uint64_t high_address_; + private: + char* name_; + uint64_t base_address_; + uint64_t low_address_; + uint64_t high_address_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_RAW_MODULE_H_ diff --git a/src/alloy/runtime/runtime.cc b/src/alloy/runtime/runtime.cc index cf9cce22c..233dc0c07 100644 --- a/src/alloy/runtime/runtime.cc +++ b/src/alloy/runtime/runtime.cc @@ -14,26 +14,28 @@ #include #include -using namespace alloy; -using namespace alloy::backend; -using namespace alloy::frontend; -using namespace alloy::runtime; +// TODO(benvanik): based on compiler support +#include +#include +DEFINE_string(runtime_backend, "any", "Runtime backend [any, ivm, x64]."); -DEFINE_string(runtime_backend, "any", - "Runtime backend [any, ivm, x64]."); +namespace alloy { +namespace runtime { +using alloy::backend::Backend; +using alloy::frontend::Frontend; -Runtime::Runtime(Memory* memory) : - memory_(memory), debugger_(0), backend_(0), frontend_(0) { +Runtime::Runtime(Memory* memory) + : memory_(memory), debugger_(0), backend_(0), frontend_(0) { tracing::Initialize(); } Runtime::~Runtime() { { std::lock_guard guard(modules_lock_); - for (ModuleList::iterator it = modules_.begin(); - it != modules_.end(); ++it) { + for (ModuleList::iterator it = modules_.begin(); it != modules_.end(); + ++it) { Module* module = *it; delete module; } @@ -46,10 +48,6 @@ Runtime::~Runtime() { tracing::Flush(); } -// TODO(benvanik): based on compiler support -#include -#include - int Runtime::Initialize(Frontend* frontend, Backend* backend) { // Must be initialized by subclass before calling into this. XEASSERTNOTNULL(memory_); @@ -64,27 +62,23 @@ int Runtime::Initialize(Frontend* frontend, Backend* backend) { if (!backend) { #if defined(ALLOY_HAS_X64_BACKEND) && ALLOY_HAS_X64_BACKEND if (FLAGS_runtime_backend == "x64") { - backend = new alloy::backend::x64::X64Backend( - this); + backend = new alloy::backend::x64::X64Backend(this); } #endif // ALLOY_HAS_X64_BACKEND #if defined(ALLOY_HAS_IVM_BACKEND) && ALLOY_HAS_IVM_BACKEND if (FLAGS_runtime_backend == "ivm") { - backend = new alloy::backend::ivm::IVMBackend( - this); + backend = new alloy::backend::ivm::IVMBackend(this); } #endif // ALLOY_HAS_IVM_BACKEND if (FLAGS_runtime_backend == "any") { #if defined(ALLOY_HAS_X64_BACKEND) && ALLOY_HAS_X64_BACKEND if (!backend) { - backend = new alloy::backend::x64::X64Backend( - this); + backend = new alloy::backend::x64::X64Backend(this); } #endif // ALLOY_HAS_X64_BACKEND #if defined(ALLOY_HAS_IVM_BACKEND) && ALLOY_HAS_IVM_BACKEND if (!backend) { - backend = new alloy::backend::ivm::IVMBackend( - this); + backend = new alloy::backend::ivm::IVMBackend(this); } #endif // ALLOY_HAS_IVM_BACKEND } @@ -118,8 +112,7 @@ int Runtime::AddModule(Module* module) { Module* Runtime::GetModule(const char* name) { std::lock_guard guard(modules_lock_); Module* result = NULL; - for (ModuleList::iterator it = modules_.begin(); - it != modules_.end(); ++it) { + for (ModuleList::iterator it = modules_.begin(); it != modules_.end(); ++it) { Module* module = *it; if (xestrcmpa(module->name(), name) == 0) { result = module; @@ -147,7 +140,7 @@ int Runtime::ResolveFunction(uint64_t address, Function** out_function) { Entry::Status status = entry_table_.GetOrCreate(address, &entry); if (status == Entry::STATUS_NEW) { // Needs to be generated. We have the 'lock' on it and must do so now. - + // Grab symbol declaration. FunctionInfo* symbol_info; int result = LookupFunctionInfo(address, &symbol_info); @@ -173,8 +166,8 @@ int Runtime::ResolveFunction(uint64_t address, Function** out_function) { } } -int Runtime::LookupFunctionInfo( - uint64_t address, FunctionInfo** out_symbol_info) { +int Runtime::LookupFunctionInfo(uint64_t address, + FunctionInfo** out_symbol_info) { SCOPE_profile_cpu_f("alloy"); *out_symbol_info = NULL; @@ -187,8 +180,8 @@ int Runtime::LookupFunctionInfo( std::lock_guard guard(modules_lock_); // TODO(benvanik): sort by code address (if contiguous) so can bsearch. // TODO(benvanik): cache last module low/high, as likely to be in there. - for (ModuleList::const_iterator it = modules_.begin(); - it != modules_.end(); ++it) { + for (ModuleList::const_iterator it = modules_.begin(); it != modules_.end(); + ++it) { Module* module = *it; if (module->ContainsAddress(address)) { code_module = module; @@ -227,8 +220,8 @@ int Runtime::LookupFunctionInfo(Module* module, uint64_t address, return 0; } -int Runtime::DemandFunction( - FunctionInfo* symbol_info, Function** out_function) { +int Runtime::DemandFunction(FunctionInfo* symbol_info, + Function** out_function) { SCOPE_profile_cpu_f("alloy"); *out_function = NULL; @@ -240,7 +233,8 @@ int Runtime::DemandFunction( if (symbol_status == SymbolInfo::STATUS_NEW) { // Symbol is undefined, so define now. Function* function = NULL; - int result = frontend_->DefineFunction(symbol_info, DEBUG_INFO_DEFAULT, &function); + int result = + frontend_->DefineFunction(symbol_info, DEBUG_INFO_DEFAULT, &function); if (result) { symbol_info->set_status(SymbolInfo::STATUS_FAILED); return result; @@ -263,3 +257,6 @@ int Runtime::DemandFunction( return 0; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/runtime.h b/src/alloy/runtime/runtime.h index 68d4f488d..5ede95140 100644 --- a/src/alloy/runtime/runtime.h +++ b/src/alloy/runtime/runtime.h @@ -23,16 +23,14 @@ #include #include - namespace alloy { namespace runtime { - class Runtime { -public: + public: typedef std::vector ModuleList; -public: + public: Runtime(Memory* memory); virtual ~Runtime(); @@ -54,27 +52,25 @@ public: FunctionInfo** out_symbol_info); int ResolveFunction(uint64_t address, Function** out_function); - //uint32_t CreateCallback(void (*callback)(void* data), void* data); + // uint32_t CreateCallback(void (*callback)(void* data), void* data); -private: + private: int DemandFunction(FunctionInfo* symbol_info, Function** out_function); -protected: - Memory* memory_; + protected: + Memory* memory_; - Debugger* debugger_; + Debugger* debugger_; frontend::Frontend* frontend_; - backend::Backend* backend_; + backend::Backend* backend_; - EntryTable entry_table_; - std::mutex modules_lock_; - ModuleList modules_; + EntryTable entry_table_; + std::mutex modules_lock_; + ModuleList modules_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_RUNTIME_H_ diff --git a/src/alloy/runtime/symbol_info.cc b/src/alloy/runtime/symbol_info.cc index e87727b3a..7e060ff7f 100644 --- a/src/alloy/runtime/symbol_info.cc +++ b/src/alloy/runtime/symbol_info.cc @@ -9,14 +9,15 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -SymbolInfo::SymbolInfo(Type type, Module* module, uint64_t address) : - type_(type), status_(STATUS_DEFINING), - module_(module), address_(address), name_(0) { -} +SymbolInfo::SymbolInfo(Type type, Module* module, uint64_t address) + : type_(type), + status_(STATUS_DEFINING), + module_(module), + address_(address), + name_(0) {} SymbolInfo::~SymbolInfo() { if (name_) { @@ -31,14 +32,15 @@ void SymbolInfo::set_name(const char* name) { name_ = xestrdupa(name); } -FunctionInfo::FunctionInfo(Module* module, uint64_t address) : - end_address_(0), behavior_(BEHAVIOR_DEFAULT), function_(0), - SymbolInfo(SymbolInfo::TYPE_FUNCTION, module, address) { +FunctionInfo::FunctionInfo(Module* module, uint64_t address) + : end_address_(0), + behavior_(BEHAVIOR_DEFAULT), + function_(0), + SymbolInfo(SymbolInfo::TYPE_FUNCTION, module, address) { xe_zero_struct(&extern_info_, sizeof(extern_info_)); } -FunctionInfo::~FunctionInfo() { -} +FunctionInfo::~FunctionInfo() {} void FunctionInfo::SetupExtern(ExternHandler handler, void* arg0, void* arg1) { behavior_ = BEHAVIOR_EXTERN; @@ -47,9 +49,10 @@ void FunctionInfo::SetupExtern(ExternHandler handler, void* arg0, void* arg1) { extern_info_.arg1 = arg1; } -VariableInfo::VariableInfo(Module* module, uint64_t address) : - SymbolInfo(SymbolInfo::TYPE_VARIABLE, module, address) { -} +VariableInfo::VariableInfo(Module* module, uint64_t address) + : SymbolInfo(SymbolInfo::TYPE_VARIABLE, module, address) {} -VariableInfo::~VariableInfo() { -} +VariableInfo::~VariableInfo() {} + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/symbol_info.h b/src/alloy/runtime/symbol_info.h index 8d2a964e7..e9a3b06f2 100644 --- a/src/alloy/runtime/symbol_info.h +++ b/src/alloy/runtime/symbol_info.h @@ -12,16 +12,14 @@ #include - namespace alloy { namespace runtime { class Function; class Module; - class SymbolInfo { -public: + public: enum Type { TYPE_FUNCTION, TYPE_VARIABLE, @@ -34,7 +32,8 @@ public: STATUS_DEFINED, STATUS_FAILED, }; -public: + + public: SymbolInfo(Type type, Module* module, uint64_t address); virtual ~SymbolInfo(); @@ -47,26 +46,26 @@ public: const char* name() const { return name_; } void set_name(const char* name); -protected: - Type type_; - Module* module_; - Status status_; - uint64_t address_; + protected: + Type type_; + Module* module_; + Status status_; + uint64_t address_; - char* name_; + char* name_; }; class FunctionInfo : public SymbolInfo { -public: + public: enum Behavior { - BEHAVIOR_DEFAULT = 0, + BEHAVIOR_DEFAULT = 0, BEHAVIOR_PROLOG, BEHAVIOR_EPILOG, BEHAVIOR_EPILOG_RETURN, BEHAVIOR_EXTERN, }; -public: + public: FunctionInfo(Module* module, uint64_t address); virtual ~FunctionInfo(); @@ -80,15 +79,15 @@ public: Function* function() const { return function_; } void set_function(Function* value) { function_ = value; } - typedef void(*ExternHandler)(void* context, void* arg0, void* arg1); + typedef void (*ExternHandler)(void* context, void* arg0, void* arg1); void SetupExtern(ExternHandler handler, void* arg0, void* arg1); ExternHandler extern_handler() const { return extern_info_.handler; } void* extern_arg0() const { return extern_info_.arg0; } void* extern_arg1() const { return extern_info_.arg1; } -private: - uint64_t end_address_; - Behavior behavior_; + private: + uint64_t end_address_; + Behavior behavior_; Function* function_; struct { ExternHandler handler; @@ -98,16 +97,14 @@ private: }; class VariableInfo : public SymbolInfo { -public: + public: VariableInfo(Module* module, uint64_t address); virtual ~VariableInfo(); -private: + private: }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_SYMBOL_INFO_H_ diff --git a/src/alloy/runtime/thread_state.cc b/src/alloy/runtime/thread_state.cc index 84add8bce..828863fc5 100644 --- a/src/alloy/runtime/thread_state.cc +++ b/src/alloy/runtime/thread_state.cc @@ -11,19 +11,18 @@ #include -using namespace alloy; -using namespace alloy::runtime; +namespace alloy { +namespace runtime { - -namespace { __declspec(thread) ThreadState* thread_state_ = NULL; -} - -ThreadState::ThreadState(Runtime* runtime, uint32_t thread_id) : - runtime_(runtime), memory_(runtime->memory()), - thread_id_(thread_id), name_(0), - backend_data_(0), raw_context_(0) { +ThreadState::ThreadState(Runtime* runtime, uint32_t thread_id) + : runtime_(runtime), + memory_(runtime->memory()), + thread_id_(thread_id), + name_(0), + backend_data_(0), + raw_context_(0) { if (thread_id_ == UINT_MAX) { // System thread. Assign the system thread ID with a high bit // set so people know what's up. @@ -59,10 +58,9 @@ void ThreadState::Bind(ThreadState* thread_state) { thread_state_ = thread_state; } -ThreadState* ThreadState::Get() { - return thread_state_; -} +ThreadState* ThreadState::Get() { return thread_state_; } -uint32_t ThreadState::GetThreadID() { - return thread_state_->thread_id_; -} +uint32_t ThreadState::GetThreadID() { return thread_state_->thread_id_; } + +} // namespace runtime +} // namespace alloy diff --git a/src/alloy/runtime/thread_state.h b/src/alloy/runtime/thread_state.h index 26cd4566b..a10e67438 100644 --- a/src/alloy/runtime/thread_state.h +++ b/src/alloy/runtime/thread_state.h @@ -14,15 +14,13 @@ #include - namespace alloy { namespace runtime { class Runtime; - class ThreadState { -public: + public: ThreadState(Runtime* runtime, uint32_t thread_id); virtual ~ThreadState(); @@ -43,18 +41,16 @@ public: static ThreadState* Get(); static uint32_t GetThreadID(); -protected: - Runtime* runtime_; - Memory* memory_; - uint32_t thread_id_; - char* name_; - void* backend_data_; - void* raw_context_; + protected: + Runtime* runtime_; + Memory* memory_; + uint32_t thread_id_; + char* name_; + void* backend_data_; + void* raw_context_; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_THREAD_STATE_H_ diff --git a/src/alloy/runtime/tracing.h b/src/alloy/runtime/tracing.h index 262662b90..1356208cb 100644 --- a/src/alloy/runtime/tracing.h +++ b/src/alloy/runtime/tracing.h @@ -13,31 +13,27 @@ #include #include - namespace alloy { namespace runtime { const uint32_t ALLOY_RUNTIME = alloy::tracing::EventType::ALLOY_RUNTIME; - class EventType { -public: + public: enum { - ALLOY_RUNTIME_INIT = ALLOY_RUNTIME | (1), - ALLOY_RUNTIME_DEINIT = ALLOY_RUNTIME | (2), - - ALLOY_RUNTIME_THREAD = ALLOY_RUNTIME | (1 << 25), - ALLOY_RUNTIME_THREAD_INIT = ALLOY_RUNTIME_THREAD | (1), - ALLOY_RUNTIME_THREAD_DEINIT = ALLOY_RUNTIME_THREAD | (2), - - ALLOY_RUNTIME_MEMORY = ALLOY_RUNTIME | (2 << 25), - ALLOY_RUNTIME_MEMORY_INIT = ALLOY_RUNTIME_MEMORY | (1), - ALLOY_RUNTIME_MEMORY_DEINIT = ALLOY_RUNTIME_MEMORY | (2), - ALLOY_RUNTIME_MEMORY_HEAP = ALLOY_RUNTIME_MEMORY | (1000), - ALLOY_RUNTIME_MEMORY_HEAP_INIT = ALLOY_RUNTIME_MEMORY_HEAP | (1), - ALLOY_RUNTIME_MEMORY_HEAP_DEINIT = ALLOY_RUNTIME_MEMORY | (2), - ALLOY_RUNTIME_MEMORY_HEAP_ALLOC = ALLOY_RUNTIME_MEMORY | (3), - ALLOY_RUNTIME_MEMORY_HEAP_FREE = ALLOY_RUNTIME_MEMORY | (4), + ALLOY_RUNTIME_INIT = ALLOY_RUNTIME | (1), + ALLOY_RUNTIME_DEINIT = ALLOY_RUNTIME | (2), + ALLOY_RUNTIME_THREAD = ALLOY_RUNTIME | (1 << 25), + ALLOY_RUNTIME_THREAD_INIT = ALLOY_RUNTIME_THREAD | (1), + ALLOY_RUNTIME_THREAD_DEINIT = ALLOY_RUNTIME_THREAD | (2), + ALLOY_RUNTIME_MEMORY = ALLOY_RUNTIME | (2 << 25), + ALLOY_RUNTIME_MEMORY_INIT = ALLOY_RUNTIME_MEMORY | (1), + ALLOY_RUNTIME_MEMORY_DEINIT = ALLOY_RUNTIME_MEMORY | (2), + ALLOY_RUNTIME_MEMORY_HEAP = ALLOY_RUNTIME_MEMORY | (1000), + ALLOY_RUNTIME_MEMORY_HEAP_INIT = ALLOY_RUNTIME_MEMORY_HEAP | (1), + ALLOY_RUNTIME_MEMORY_HEAP_DEINIT = ALLOY_RUNTIME_MEMORY | (2), + ALLOY_RUNTIME_MEMORY_HEAP_ALLOC = ALLOY_RUNTIME_MEMORY | (3), + ALLOY_RUNTIME_MEMORY_HEAP_FREE = ALLOY_RUNTIME_MEMORY | (4), }; typedef struct Init_s { @@ -63,32 +59,30 @@ public: } MemoryDeinit; typedef struct MemoryHeapInit_s { static const uint32_t event_type = ALLOY_RUNTIME_MEMORY_HEAP_INIT; - uint32_t heap_id; - uint64_t low_address; - uint64_t high_address; - uint32_t is_physical; + uint32_t heap_id; + uint64_t low_address; + uint64_t high_address; + uint32_t is_physical; } MemoryHeapInit; typedef struct MemoryHeapDeinit_s { static const uint32_t event_type = ALLOY_RUNTIME_MEMORY_HEAP_DEINIT; - uint32_t heap_id; + uint32_t heap_id; } MemoryHeapDeinit; typedef struct MemoryHeapAlloc_s { static const uint32_t event_type = ALLOY_RUNTIME_MEMORY_HEAP_ALLOC; - uint32_t heap_id; - uint32_t flags; - uint64_t address; - size_t size; + uint32_t heap_id; + uint32_t flags; + uint64_t address; + size_t size; } MemoryHeapAlloc; typedef struct MemoryHeapFree_s { static const uint32_t event_type = ALLOY_RUNTIME_MEMORY_HEAP_FREE; - uint32_t heap_id; - uint64_t address; + uint32_t heap_id; + uint64_t address; } MemoryHeapFree; }; - } // namespace runtime } // namespace alloy - #endif // ALLOY_RUNTIME_TRACING_H_ diff --git a/src/alloy/string_buffer.cc b/src/alloy/string_buffer.cc index 89124e737..887dbbf5f 100644 --- a/src/alloy/string_buffer.cc +++ b/src/alloy/string_buffer.cc @@ -9,19 +9,16 @@ #include -using namespace alloy; +namespace alloy { - -StringBuffer::StringBuffer(size_t initial_capacity) : - buffer_(0), capacity_(0), offset_(0) { +StringBuffer::StringBuffer(size_t initial_capacity) + : buffer_(0), capacity_(0), offset_(0) { capacity_ = MAX(initial_capacity, 1024); buffer_ = (char*)xe_calloc(capacity_); buffer_[0] = 0; } -StringBuffer::~StringBuffer() { - xe_free(buffer_); -} +StringBuffer::~StringBuffer() { xe_free(buffer_); } void StringBuffer::Reset() { offset_ = 0; @@ -37,8 +34,8 @@ void StringBuffer::Append(const char* format, ...) { void StringBuffer::AppendVarargs(const char* format, va_list args) { while (true) { - int len = xevsnprintfa( - buffer_ + offset_, capacity_ - offset_ - 1, format, args); + int len = + xevsnprintfa(buffer_ + offset_, capacity_ - offset_ - 1, format, args); if (len == -1) { size_t old_capacity = capacity_; capacity_ = capacity_ * 2; @@ -58,17 +55,13 @@ void StringBuffer::AppendBytes(const uint8_t* buffer, size_t length) { capacity_ = MAX(capacity_ * 2, capacity_ + length); buffer_ = (char*)xe_realloc(buffer_, old_capacity, capacity_); } - xe_copy_memory( - buffer_ + offset_, capacity_ - offset_, - buffer, length); + xe_copy_memory(buffer_ + offset_, capacity_ - offset_, buffer, length); offset_ += length; buffer_[offset_] = 0; } -const char* StringBuffer::GetString() const { - return buffer_; -} +const char* StringBuffer::GetString() const { return buffer_; } -char* StringBuffer::ToString() { - return xestrdupa(buffer_); -} +char* StringBuffer::ToString() { return xestrdupa(buffer_); } + +} // namespace alloy diff --git a/src/alloy/string_buffer.h b/src/alloy/string_buffer.h index 8b2b05d95..b14055d1d 100644 --- a/src/alloy/string_buffer.h +++ b/src/alloy/string_buffer.h @@ -12,12 +12,10 @@ #include - namespace alloy { - class StringBuffer { -public: + public: StringBuffer(size_t initial_capacity = 0); ~StringBuffer(); @@ -33,14 +31,12 @@ public: char* ToString(); char* EncodeBase64(); -private: - char* buffer_; - size_t capacity_; - size_t offset_; + private: + char* buffer_; + size_t capacity_; + size_t offset_; }; - } // namespace alloy - #endif // ALLOY_STRING_BUFFER_H_ diff --git a/src/alloy/tracing/channel.cc b/src/alloy/tracing/channel.cc index ef59e3aec..ea2616e52 100644 --- a/src/alloy/tracing/channel.cc +++ b/src/alloy/tracing/channel.cc @@ -9,12 +9,12 @@ #include -using namespace alloy; -using namespace alloy::tracing; +namespace alloy { +namespace tracing { +Channel::Channel() {} -Channel::Channel() { -} +Channel::~Channel() {} -Channel::~Channel() { -} +} // namespace tracing +} // namespace alloy diff --git a/src/alloy/tracing/channel.h b/src/alloy/tracing/channel.h index 24d6f0031..6d36ac00a 100644 --- a/src/alloy/tracing/channel.h +++ b/src/alloy/tracing/channel.h @@ -12,25 +12,20 @@ #include - namespace alloy { namespace tracing { - class Channel { -public: + public: Channel(); virtual ~Channel(); - virtual void Write( - size_t buffer_count, - size_t buffer_lengths[], const uint8_t* buffers[]) = 0; + virtual void Write(size_t buffer_count, size_t buffer_lengths[], + const uint8_t* buffers[]) = 0; virtual void Flush() = 0; }; - } // namespace tracing } // namespace alloy - #endif // ALLOY_TRACING_CHANNEL_H_ diff --git a/src/alloy/tracing/channels/file_channel.cc b/src/alloy/tracing/channels/file_channel.cc index 7b2db652b..89767d428 100644 --- a/src/alloy/tracing/channels/file_channel.cc +++ b/src/alloy/tracing/channels/file_channel.cc @@ -9,10 +9,9 @@ #include -using namespace alloy; -using namespace alloy::tracing; -using namespace alloy::tracing::channels; - +namespace alloy { +namespace tracing { +namespace channels { FileChannel::FileChannel(const char* path) { path_ = xestrdupa(path); @@ -27,9 +26,8 @@ FileChannel::~FileChannel() { path_ = 0; } -void FileChannel::Write( - size_t buffer_count, - size_t buffer_lengths[], const uint8_t* buffers[]) { +void FileChannel::Write(size_t buffer_count, size_t buffer_lengths[], + const uint8_t* buffers[]) { std::lock_guard guard(lock_); if (file_) { for (size_t n = 0; n < buffer_count; n++) { @@ -44,3 +42,7 @@ void FileChannel::Flush() { fflush(file_); } } + +} // namespace channels +} // namespace tracing +} // namespace alloy diff --git a/src/alloy/tracing/channels/file_channel.h b/src/alloy/tracing/channels/file_channel.h index 55e8e71fb..ba290dc1a 100644 --- a/src/alloy/tracing/channels/file_channel.h +++ b/src/alloy/tracing/channels/file_channel.h @@ -16,33 +16,28 @@ #include - namespace alloy { namespace tracing { namespace channels { - class FileChannel : public Channel { -public: + public: FileChannel(const char* path); virtual ~FileChannel(); - virtual void Write( - size_t buffer_count, - size_t buffer_lengths[], const uint8_t* buffers[]); + virtual void Write(size_t buffer_count, size_t buffer_lengths[], + const uint8_t* buffers[]); virtual void Flush(); -private: + private: char* path_; FILE* file_; std::mutex lock_; }; - } // namespace channels } // namespace tracing } // namespace alloy - #endif // ALLOY_TRACING_CHANNELS_FILE_CHANNEL_H_ diff --git a/src/alloy/tracing/event_type.h b/src/alloy/tracing/event_type.h index 33e2614fb..3ad6a0d9c 100644 --- a/src/alloy/tracing/event_type.h +++ b/src/alloy/tracing/event_type.h @@ -12,25 +12,21 @@ #include - namespace alloy { namespace tracing { - class EventType { -public: + public: enum { - ALLOY = (0 << 31), - ALLOY_TRACE_INIT = ALLOY | (1), - ALLOY_TRACE_EOF = ALLOY | (2), - - ALLOY_BACKEND = ALLOY | (1 << 26), - ALLOY_COMPILER = ALLOY | (2 << 26), - ALLOY_HIR = ALLOY | (3 << 26), - ALLOY_FRONTEND = ALLOY | (4 << 26), - ALLOY_RUNTIME = ALLOY | (5 << 26), - - USER = (1 << 31), + ALLOY = (0 << 31), + ALLOY_TRACE_INIT = ALLOY | (1), + ALLOY_TRACE_EOF = ALLOY | (2), + ALLOY_BACKEND = ALLOY | (1 << 26), + ALLOY_COMPILER = ALLOY | (2 << 26), + ALLOY_HIR = ALLOY | (3 << 26), + ALLOY_FRONTEND = ALLOY | (4 << 26), + ALLOY_RUNTIME = ALLOY | (5 << 26), + USER = (1 << 31), }; typedef struct TraceInit_s { @@ -41,9 +37,7 @@ public: } TraceEOF; }; - } // namespace tracing } // namespace alloy - #endif // ALLOY_TRACING_EVENT_TYPES_H_ diff --git a/src/alloy/tracing/tracer.cc b/src/alloy/tracing/tracer.cc index c97a16f14..fbb4c43bb 100644 --- a/src/alloy/tracing/tracer.cc +++ b/src/alloy/tracing/tracer.cc @@ -11,41 +11,32 @@ #include -using namespace alloy; -using namespace alloy::tracing; - - -namespace { +namespace alloy { +namespace tracing { volatile int next_thread_id_ = 0x10000000; -}; - - -Tracer::Tracer(Channel* channel) : - channel_(channel) { +Tracer::Tracer(Channel* channel) : channel_(channel) { thread_id_ = xe_atomic_inc_32(&next_thread_id_); } -Tracer::~Tracer() { -} +Tracer::~Tracer() {} -void Tracer::WriteEvent( - uint32_t event_type, size_t size, const uint8_t* data) { +void Tracer::WriteEvent(uint32_t event_type, size_t size, const uint8_t* data) { uint32_t header[] = { - event_type, - (uint32_t)thread_id_, - 0, // time in us - (uint32_t)size, + event_type, (uint32_t)thread_id_, + 0, // time in us + (uint32_t)size, }; size_t buffer_count = size ? 2 : 1; size_t buffer_lengths[] = { - sizeof(header), - size, + sizeof(header), size, }; const uint8_t* buffers[] = { - (const uint8_t*)header, - data, + (const uint8_t*)header, data, }; channel_->Write(buffer_count, buffer_lengths, buffers); } + +} // namespace tracing +} // namespace alloy diff --git a/src/alloy/tracing/tracer.h b/src/alloy/tracing/tracer.h index 3915326e9..3d322f495 100644 --- a/src/alloy/tracing/tracer.h +++ b/src/alloy/tracing/tracer.h @@ -12,32 +12,28 @@ #include - namespace alloy { namespace tracing { class Channel; - class Tracer { -public: + public: Tracer(Channel* channel); ~Tracer(); int thread_id() const { return thread_id_; } void set_thread_id(int value) { thread_id_ = value; } - void WriteEvent( - uint32_t event_type, size_t size = 0, const uint8_t* data = 0); + void WriteEvent(uint32_t event_type, size_t size = 0, + const uint8_t* data = 0); -private: + private: Channel* channel_; int thread_id_; }; - } // namespace tracing } // namespace alloy - #endif // ALLOY_TRACING_TRACER_H_ diff --git a/src/alloy/tracing/tracing.cc b/src/alloy/tracing/tracing.cc index 7a6fc9342..16c7eaf75 100644 --- a/src/alloy/tracing/tracing.cc +++ b/src/alloy/tracing/tracing.cc @@ -17,33 +17,24 @@ #include #include -using namespace alloy; -using namespace alloy::tracing; - - -DEFINE_string(trace_file, "", - "Traces to the given file path."); +DEFINE_string(trace_file, "", "Traces to the given file path."); // trace shared memory // trace socket +namespace alloy { +namespace tracing { -namespace { - -static Channel* shared_channel = NULL; +Channel* shared_channel = NULL; __declspec(thread) Tracer* thread_tracer = NULL; void CleanupTracing() { if (shared_channel) { - alloy::tracing::WriteEvent(EventType::TraceEOF({ - })); + alloy::tracing::WriteEvent(EventType::TraceEOF({})); shared_channel->Flush(); } } -}; - - -bool alloy::tracing::Initialize(Channel* channel) { +bool Initialize(Channel* channel) { if (shared_channel) { return false; } @@ -58,24 +49,23 @@ bool alloy::tracing::Initialize(Channel* channel) { } } shared_channel = channel; - alloy::tracing::WriteEvent(EventType::TraceInit({ - })); + alloy::tracing::WriteEvent(EventType::TraceInit({})); channel->Flush(); atexit(CleanupTracing); return true; } -void alloy::tracing::Shutdown() { +void Shutdown() { // ? } -void alloy::tracing::Flush() { +void Flush() { if (shared_channel) { shared_channel->Flush(); } } -Tracer* alloy::tracing::GetThreadTracer() { +Tracer* GetThreadTracer() { if (!shared_channel) { return NULL; } @@ -85,10 +75,12 @@ Tracer* alloy::tracing::GetThreadTracer() { return thread_tracer; } -void alloy::tracing::WriteEvent( - uint32_t event_type, size_t size, const void* data) { +void WriteEvent(uint32_t event_type, size_t size, const void* data) { Tracer* t = GetThreadTracer(); if (t) { t->WriteEvent(event_type, size, (const uint8_t*)data); } } + +} // namespace tracing +} // namespace alloy diff --git a/src/alloy/tracing/tracing.h b/src/alloy/tracing/tracing.h index ced2081de..4ca602bc0 100644 --- a/src/alloy/tracing/tracing.h +++ b/src/alloy/tracing/tracing.h @@ -14,14 +14,12 @@ #include - namespace alloy { namespace tracing { class Channel; class Tracer; - bool Initialize(Channel* channel = 0); void Shutdown(); void Flush(); @@ -30,7 +28,8 @@ Tracer* GetThreadTracer(); void WriteEvent(uint32_t event_type, size_t size = 0, const void* data = 0); -template void WriteEvent(const T& ev) { +template +void WriteEvent(const T& ev) { if (sizeof(T) > 1) { alloy::tracing::WriteEvent(T::event_type, sizeof(T), &ev); } else { @@ -38,9 +37,7 @@ template void WriteEvent(const T& ev) { } } - } // namespace tracing } // namespace alloy - #endif // ALLOY_TRACING_TRACING_H_ diff --git a/src/alloy/type_pool.h b/src/alloy/type_pool.h index beb9dbd43..ce124eab4 100644 --- a/src/alloy/type_pool.h +++ b/src/alloy/type_pool.h @@ -14,20 +14,16 @@ #include - namespace alloy { - -template +template class TypePool { -public: - ~TypePool() { - Reset(); - } + public: + ~TypePool() { Reset(); } void Reset() { std::lock_guard guard(lock_); - for (TList::iterator it = list_.begin(); it != list_.end(); ++it) { + for (auto it = list_.begin(); it != list_.end(); ++it) { T* value = *it; delete value; } @@ -54,14 +50,12 @@ public: list_.push_back(value); } -private: - std::mutex lock_; + private: + std::mutex lock_; typedef std::vector TList; - TList list_; + TList list_; }; - } // namespace alloy - #endif // ALLOY_TYPE_POOL_H_ diff --git a/src/poly/poly-private.h b/src/poly/poly-private.h index d4095d575..500cddd52 100644 --- a/src/poly/poly-private.h +++ b/src/poly/poly-private.h @@ -12,8 +12,4 @@ #include -namespace poly { - -} // namespace poly - #endif // POLY_POLY_PRIVATE_H_ diff --git a/src/poly/poly.cc b/src/poly/poly.cc index 51b85164e..2e306025b 100644 --- a/src/poly/poly.cc +++ b/src/poly/poly.cc @@ -10,6 +10,4 @@ #include #include -namespace poly { - -} // namespace poly +namespace poly {} // namespace poly diff --git a/src/poly/poly.h b/src/poly/poly.h index 061fd09c1..f6e6eb97b 100644 --- a/src/poly/poly.h +++ b/src/poly/poly.h @@ -10,8 +10,6 @@ #ifndef POLY_POLY_H_ #define POLY_POLY_H_ -namespace poly { - -} // namespace poly +namespace poly {} // namespace poly #endif // POLY_POLY_H_