diff --git a/src/xenia/cpu/backend/a64/a64_seq_vector.cc b/src/xenia/cpu/backend/a64/a64_seq_vector.cc
index a1c69ccfe..3a918ff43 100644
--- a/src/xenia/cpu/backend/a64/a64_seq_vector.cc
+++ b/src/xenia/cpu/backend/a64/a64_seq_vector.cc
@@ -655,17 +655,43 @@ EMITTER_OPCODE_TABLE(OPCODE_EXTRACT, EXTRACT_I8, EXTRACT_I16, EXTRACT_I32);
 // ============================================================================
 // Copy a value into all elements of a vector
 struct SPLAT_I8 : Sequence<SPLAT_I8, I<OPCODE_SPLAT, V128Op, I8Op>> {
-  static void Emit(A64Emitter& e, const EmitArgType& i) {}
+  static void Emit(A64Emitter& e, const EmitArgType& i) {
+    if (i.src1.is_constant) {
+      e.MOV(W0, i.src1.constant());
+      e.DUP(Q0.B16(), W0);
+    } else {
+      e.DUP(Q0.B16(), i.src1);
+    }
+  }
 };
 struct SPLAT_I16 : Sequence<SPLAT_I16, I<OPCODE_SPLAT, V128Op, I16Op>> {
-  static void Emit(A64Emitter& e, const EmitArgType& i) {}
+  static void Emit(A64Emitter& e, const EmitArgType& i) {
+    if (i.src1.is_constant) {
+      e.MOV(W0, i.src1.constant());
+      e.DUP(Q0.H8(), W0);
+    } else {
+      e.DUP(Q0.H8(), i.src1);
+    }
+  }
 };
 struct SPLAT_I32 : Sequence<SPLAT_I32, I<OPCODE_SPLAT, V128Op, I32Op>> {
-  static void Emit(A64Emitter& e, const EmitArgType& i) {}
+  static void Emit(A64Emitter& e, const EmitArgType& i) {
+    if (i.src1.is_constant) {
+      e.MOV(W0, i.src1.constant());
+      e.DUP(Q0.S4(), W0);
+    } else {
+      e.DUP(Q0.S4(), i.src1);
+    }
+  }
 };
 struct SPLAT_F32 : Sequence<SPLAT_F32, I<OPCODE_SPLAT, V128Op, F32Op>> {
   static void Emit(A64Emitter& e, const EmitArgType& i) {
-    {}
+    if (i.src1.is_constant) {
+      e.MOV(W0, i.src1.value->constant.i32);
+      e.DUP(Q0.S4(), W0);
+    } else {
+      e.DUP(Q0.S4(), i.src1.reg().toQ().Selem()[0]);
+    }
   }
 };
 EMITTER_OPCODE_TABLE(OPCODE_SPLAT, SPLAT_I8, SPLAT_I16, SPLAT_I32, SPLAT_F32);