Fixing stdux/stdx o_o
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62b792c903
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5b91ba89e9
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@ -91,7 +91,11 @@ XEDISASMR(ldux, 0x7C00006A, X )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(ldx, 0x7C00002A, X )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(ldx, 0x7C00002A, X )(InstrData& i, InstrDisasm& d) {
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d.Init("ldx", "Load Doubleword Indexed", 0);
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d.Init("ldx", "Load Doubleword Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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if (i.X.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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return d.Finish();
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}
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}
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@ -308,11 +312,7 @@ XEDISASMR(stdu, 0xF8000001, DS )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
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d.Init("stdux", "Store Doubleword with Update Indexed", 0);
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d.Init("stdux", "Store Doubleword with Update Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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if (i.DS.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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return d.Finish();
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}
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}
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@ -320,7 +320,11 @@ XEDISASMR(stdux, 0x7C00016A, X )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(stdx, 0x7C00012A, X )(InstrData& i, InstrDisasm& d) {
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XEDISASMR(stdx, 0x7C00012A, X )(InstrData& i, InstrDisasm& d) {
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d.Init("stdx", "Store Doubleword Indexed", 0);
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d.Init("stdx", "Store Doubleword Indexed", 0);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RT, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kReadWrite);
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if (i.X.RA) {
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d.AddRegOperand(InstrRegister::kGPR, i.X.RA, InstrRegister::kRead);
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} else {
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d.AddUImmOperand(0, 1);
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}
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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d.AddRegOperand(InstrRegister::kGPR, i.X.RB, InstrRegister::kRead);
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return d.Finish();
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return d.Finish();
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}
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}
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@ -690,6 +690,23 @@ XEEMITTER(stdu, 0xF8000001, DS )(X64Emitter& e, X86Compiler& c, InstrDat
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}
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}
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XEEMITTER(stdux, 0x7C00016A, X )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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XEEMITTER(stdux, 0x7C00016A, X )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// EA <- (RA) + (RB)
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// MEM(EA, 8) <- (RS)
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// RA <- EA
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GpVar ea(c.newGpVar());
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c.mov(ea, e.gpr_value(i.X.RA));
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c.add(ea, e.gpr_value(i.X.RB));
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GpVar v = e.gpr_value(i.X.RT);
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e.WriteMemory(i.address, ea, 8, v);
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e.update_gpr_value(i.X.RA, ea);
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e.clear_constant_gpr_value(i.X.RA);
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return 0;
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}
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XEEMITTER(stdx, 0x7C00012A, X)(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// if RA = 0 then
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// if RA = 0 then
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// b <- 0
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// b <- 0
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// else
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// else
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@ -708,23 +725,6 @@ XEEMITTER(stdux, 0x7C00016A, X )(X64Emitter& e, X86Compiler& c, InstrDat
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return 0;
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return 0;
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}
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}
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XEEMITTER(stdx, 0x7C00012A, X )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// EA <- (RA) + (RB)
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// MEM(EA, 8) <- (RS)
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// RA <- EA
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GpVar ea(c.newGpVar());
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c.mov(ea, e.gpr_value(i.X.RA));
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c.add(ea, e.gpr_value(i.X.RB));
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GpVar v = e.gpr_value(i.X.RT);
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e.WriteMemory(i.address, ea, 8, v);
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e.update_gpr_value(i.X.RA, ea);
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e.clear_constant_gpr_value(i.X.RA);
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return 0;
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}
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XEEMITTER(sth, 0xB0000000, D )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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XEEMITTER(sth, 0xB0000000, D )(X64Emitter& e, X86Compiler& c, InstrData& i) {
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// if RA = 0 then
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// if RA = 0 then
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// b <- 0
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// b <- 0
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