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Removing memory reservation value check for load/store.

This commit is contained in:
Ben Vanik 2015-06-07 21:57:44 -07:00
parent 00b3b0eab9
commit 52b8f4b54b
5 changed files with 3 additions and 17 deletions
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1
src/xenia/cpu/frontend/ppc_context.h
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@ -203,7 +203,6 @@ typedef struct alignas(64) PPCContext_s {
// Reserve address for load acquire/store release. Shared. // Reserve address for load acquire/store release. Shared.
uint64_t* reserve_address; uint64_t* reserve_address;
uint64_t* reserve_value;
// Used to shuttle data into externs. Contents volatile. // Used to shuttle data into externs. Contents volatile.
uint64_t scratch; uint64_t scratch;

15
src/xenia/cpu/frontend/ppc_hir_builder.cc
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@ -448,11 +448,7 @@ Value* PPCHIRBuilder::LoadAcquire(Value* address, TypeName type,
uint32_t load_flags) { uint32_t load_flags) {
AtomicExchange(LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE), AtomicExchange(LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE),
Truncate(address, INT32_TYPE)); Truncate(address, INT32_TYPE));
Value* value = Load(address, type, load_flags); return Load(address, type, load_flags);
// Save the value so that we can compare it later in StoreRelease.
AtomicExchange(LoadContext(offsetof(PPCContext, reserve_value), INT64_TYPE),
value);
return value;
} }
Value* PPCHIRBuilder::StoreRelease(Value* address, Value* value, Value* PPCHIRBuilder::StoreRelease(Value* address, Value* value,
@ -460,13 +456,8 @@ Value* PPCHIRBuilder::StoreRelease(Value* address, Value* value,
Value* old_address = AtomicExchange( Value* old_address = AtomicExchange(
LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE), LoadContext(offsetof(PPCContext, reserve_address), INT64_TYPE),
LoadZero(INT32_TYPE)); LoadZero(INT32_TYPE));
// HACK: ensure the reservation addresses match AND the value hasn't changed. // Ensure the reservation addresses match.
Value* old_value = AtomicExchange( Value* eq = CompareEQ(Truncate(address, INT32_TYPE), old_address);
LoadContext(offsetof(PPCContext, reserve_value), INT64_TYPE),
LoadZero(value->type));
Value* current_value = Load(address, value->type);
Value* eq = And(CompareEQ(Truncate(address, INT32_TYPE), old_address),
CompareEQ(current_value, old_value));
StoreContext(offsetof(PPCContext, cr0.cr0_eq), eq); StoreContext(offsetof(PPCContext, cr0.cr0_eq), eq);
StoreContext(offsetof(PPCContext, cr0.cr0_lt), LoadZero(INT8_TYPE)); StoreContext(offsetof(PPCContext, cr0.cr0_lt), LoadZero(INT8_TYPE));
StoreContext(offsetof(PPCContext, cr0.cr0_gt), LoadZero(INT8_TYPE)); StoreContext(offsetof(PPCContext, cr0.cr0_gt), LoadZero(INT8_TYPE));

1
src/xenia/cpu/thread_state.cc
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@ -94,7 +94,6 @@ ThreadState::ThreadState(Processor* processor, uint32_t thread_id,
// Stash pointers to common structures that callbacks may need. // Stash pointers to common structures that callbacks may need.
context_->reserve_address = memory_->reserve_address(); context_->reserve_address = memory_->reserve_address();
context_->reserve_value = memory_->reserve_value();
context_->virtual_membase = memory_->virtual_membase(); context_->virtual_membase = memory_->virtual_membase();
context_->physical_membase = memory_->physical_membase(); context_->physical_membase = memory_->physical_membase();
context_->processor = processor_; context_->processor = processor_;

1
src/xenia/memory.cc
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@ -79,7 +79,6 @@ Memory::Memory()
: virtual_membase_(nullptr), : virtual_membase_(nullptr),
physical_membase_(nullptr), physical_membase_(nullptr),
reserve_address_(0), reserve_address_(0),
reserve_value_(0),
mapping_(0), mapping_(0),
mapping_base_(nullptr) { mapping_base_(nullptr) {
system_page_size_ = uint32_t(xe::page_size()); system_page_size_ = uint32_t(xe::page_size());

2
src/xenia/memory.h
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@ -182,7 +182,6 @@ class Memory {
} }
inline uint64_t* reserve_address() { return &reserve_address_; } inline uint64_t* reserve_address() { return &reserve_address_; }
inline uint64_t* reserve_value() { return &reserve_value_; }
// TODO(benvanik): make poly memory utils for these. // TODO(benvanik): make poly memory utils for these.
void Zero(uint32_t address, uint32_t size); void Zero(uint32_t address, uint32_t size);
@ -221,7 +220,6 @@ class Memory {
uint8_t* virtual_membase_; uint8_t* virtual_membase_;
uint8_t* physical_membase_; uint8_t* physical_membase_;
uint64_t reserve_address_; uint64_t reserve_address_;
uint64_t reserve_value_;
HANDLE mapping_; HANDLE mapping_;
uint8_t* mapping_base_; uint8_t* mapping_base_;