From 4a95f72fbacdbc91228191f083b074eda69663b6 Mon Sep 17 00:00:00 2001 From: Triang3l Date: Sat, 19 Jun 2021 13:57:04 +0300 Subject: [PATCH] [GPU] RT size function adjustments for Vulkan convenience --- src/xenia/gpu/render_target_cache.cc | 4 +++- src/xenia/gpu/render_target_cache.h | 6 +++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/src/xenia/gpu/render_target_cache.cc b/src/xenia/gpu/render_target_cache.cc index ec83cc4fd..76a3a2ef8 100644 --- a/src/xenia/gpu/render_target_cache.cc +++ b/src/xenia/gpu/render_target_cache.cc @@ -845,7 +845,9 @@ RenderTargetCache::GetConfigDepthFloat24Conversion() { uint32_t RenderTargetCache::GetRenderTargetHeight( uint32_t pitch_tiles_at_32bpp, xenos::MsaaSamples msaa_samples) const { - assert_not_zero(pitch_tiles_at_32bpp); + if (!pitch_tiles_at_32bpp) { + return 0; + } // Down to the end of EDRAM. uint32_t tile_rows = (xenos::kEdramTileCount + (pitch_tiles_at_32bpp - 1)) / pitch_tiles_at_32bpp; diff --git a/src/xenia/gpu/render_target_cache.h b/src/xenia/gpu/render_target_cache.h index 383c12f94..a3d580356 100644 --- a/src/xenia/gpu/render_target_cache.h +++ b/src/xenia/gpu/render_target_cache.h @@ -265,11 +265,15 @@ class RenderTargetCache { uint32_t GetPitchTiles() const { return pitch_tiles_at_32bpp << uint32_t(Is64bpp()); } - uint32_t GetWidth() const { + static constexpr uint32_t GetWidth(uint32_t pitch_tiles_at_32bpp, + xenos::MsaaSamples msaa_samples) { return pitch_tiles_at_32bpp * (xenos::kEdramTileWidthSamples >> uint32_t(msaa_samples >= xenos::MsaaSamples::k4X)); } + uint32_t GetWidth() const { + return GetWidth(pitch_tiles_at_32bpp, msaa_samples); + } std::string GetDebugName() const { return fmt::format(