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Dispatching interrupts.

This commit is contained in:
Ben Vanik 2013-10-19 12:50:26 -07:00
parent 90bc6ad1a8
commit 37065255a2
5 changed files with 11 additions and 8 deletions
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8
src/xenia/gpu/d3d11/d3d11_graphics_system.cc
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@ -22,7 +22,7 @@ using namespace xe::gpu::d3d11;
namespace { namespace {
void __stdcall D3D11GraphicsSystemVsyncCallback(D3D11GraphicsSystem* gs, BOOLEAN) { void __stdcall D3D11GraphicsSystemVsyncCallback(D3D11GraphicsSystem* gs, BOOLEAN) {
gs->DispatchInterruptCallback(); gs->DispatchInterruptCallback(0);
} }
} }
@ -135,7 +135,7 @@ void D3D11GraphicsSystem::Initialize() {
driver_ = new D3D11GraphicsDriver(memory_, device_); driver_ = new D3D11GraphicsDriver(memory_, device_);
// Initial vsync kick. // Initial vsync kick.
DispatchInterruptCallback(); DispatchInterruptCallback(0);
} }
void D3D11GraphicsSystem::Pump() { void D3D11GraphicsSystem::Pump() {
@ -145,10 +145,12 @@ void D3D11GraphicsSystem::Pump() {
// Swap window. // Swap window.
// If we are set to vsync this will block. // If we are set to vsync this will block.
window_->Swap(); window_->Swap();
DispatchInterruptCallback(0);
} else { } else {
// If we have gone too long without an interrupt, fire one. // If we have gone too long without an interrupt, fire one.
if (xe_pal_now() - last_interrupt_time_ > 16 / 1000.0) { if (xe_pal_now() - last_interrupt_time_ > 16 / 1000.0) {
DispatchInterruptCallback(); DispatchInterruptCallback(0);
} }
} }
} }

5
src/xenia/gpu/graphics_system.cc
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@ -160,7 +160,8 @@ void GraphicsSystem::WriteRegister(uint32_t r, uint64_t value) {
regs->values[r].u32 = (uint32_t)value; regs->values[r].u32 = (uint32_t)value;
} }
void GraphicsSystem::DispatchInterruptCallback(uint32_t cpu) { void GraphicsSystem::DispatchInterruptCallback(
uint32_t source, uint32_t cpu) {
// Pick a CPU, if needed. We're going to guess 2. Because. // Pick a CPU, if needed. We're going to guess 2. Because.
if (cpu == 0xFFFFFFFF) { if (cpu == 0xFFFFFFFF) {
cpu = 2; cpu = 2;
@ -172,5 +173,5 @@ void GraphicsSystem::DispatchInterruptCallback(uint32_t cpu) {
return; return;
} }
processor_->ExecuteInterrupt( processor_->ExecuteInterrupt(
cpu, interrupt_callback_, 1, interrupt_callback_data_); cpu, interrupt_callback_, source, interrupt_callback_data_);
} }

2
src/xenia/gpu/graphics_system.h
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@ -52,7 +52,7 @@ public:
virtual uint64_t ReadRegister(uint32_t r); virtual uint64_t ReadRegister(uint32_t r);
virtual void WriteRegister(uint32_t r, uint64_t value); virtual void WriteRegister(uint32_t r, uint64_t value);
void DispatchInterruptCallback(uint32_t cpu = 0xFFFFFFFF); void DispatchInterruptCallback(uint32_t source, uint32_t cpu = 0xFFFFFFFF);
bool swap_pending() const { return swap_pending_; } bool swap_pending() const { return swap_pending_; }
void set_swap_pending(bool value) { swap_pending_ = value; } void set_swap_pending(bool value) { swap_pending_ = value; }

2
src/xenia/gpu/nop/nop_graphics_system.cc
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@ -21,7 +21,7 @@ using namespace xe::gpu::nop;
namespace { namespace {
void __stdcall NopGraphicsSystemVsyncCallback(NopGraphicsSystem* gs, BOOLEAN) { void __stdcall NopGraphicsSystemVsyncCallback(NopGraphicsSystem* gs, BOOLEAN) {
gs->DispatchInterruptCallback(); gs->DispatchInterruptCallback(0);
} }
} }

2
src/xenia/gpu/ring_buffer_worker.cc
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@ -289,7 +289,7 @@ uint32_t RingBufferWorker::ExecutePacket(PacketArgs& args) {
uint32_t cpu_mask = READ_AND_ADVANCE_PTR(); uint32_t cpu_mask = READ_AND_ADVANCE_PTR();
for (int n = 0; n < 6; n++) { for (int n = 0; n < 6; n++) {
if (cpu_mask & (1 << n)) { if (cpu_mask & (1 << n)) {
graphics_system_->DispatchInterruptCallback(n); graphics_system_->DispatchInterruptCallback(1, n);
} }
} }
} }