From 321e2663ef73e60dd497925d1342f551849385de Mon Sep 17 00:00:00 2001
From: Ben Vanik <ben.vanik@gmail.com>
Date: Tue, 29 Dec 2015 20:42:20 -0800
Subject: [PATCH] Fixing mullw.

---
 src/xenia/cpu/ppc/ppc_emit_alu.cc       | 6 +++---
 src/xenia/cpu/ppc/testing/instr_mullw.s | 9 +++++++++
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/xenia/cpu/ppc/ppc_emit_alu.cc b/src/xenia/cpu/ppc/ppc_emit_alu.cc
index 354fc152c..f3e966ec8 100644
--- a/src/xenia/cpu/ppc/ppc_emit_alu.cc
+++ b/src/xenia/cpu/ppc/ppc_emit_alu.cc
@@ -392,9 +392,9 @@ int InstrEmit_mullwx(PPCHIRBuilder& f, const InstrData& i) {
     XEINSTRNOTIMPLEMENTED();
     return 1;
   }
-  Value* v = f.SignExtend(f.Mul(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE),
-                                f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE)),
-                          INT64_TYPE);
+  Value* v = f.Mul(
+      f.SignExtend(f.Truncate(f.LoadGPR(i.XO.RA), INT32_TYPE), INT64_TYPE),
+      f.SignExtend(f.Truncate(f.LoadGPR(i.XO.RB), INT32_TYPE), INT64_TYPE));
   f.StoreGPR(i.XO.RT, v);
   if (i.XO.Rc) {
     f.UpdateCR(0, v);
diff --git a/src/xenia/cpu/ppc/testing/instr_mullw.s b/src/xenia/cpu/ppc/testing/instr_mullw.s
index e01373b74..7b4637b52 100644
--- a/src/xenia/cpu/ppc/testing/instr_mullw.s
+++ b/src/xenia/cpu/ppc/testing/instr_mullw.s
@@ -198,3 +198,12 @@ test_mullw_11_constant:
   #_ REGISTER_OUT r3 0x000000007FFFFFFF
   #_ REGISTER_OUT r4 1
   #_ REGISTER_OUT r5 0x000000007FFFFFFF
+
+test_mullw_12:
+  #_ REGISTER_IN r0 0x1
+  #_ REGISTER_IN r8 0x0123456789ABCDEF
+  mullw r0, r8, r8
+  blr
+  #_ REGISTER_OUT r0 0x36B1B9D890F2A521
+  #_ REGISTER_OUT r8 0x0123456789ABCDEF
+  blr