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VECTOR_ADD signed/saturate.

This commit is contained in:
Ben Vanik 2014-08-07 13:22:51 -07:00
parent 04a3e53e50
commit 31ee323b38
1 changed files with 11 additions and 1 deletions
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12
src/alloy/backend/x64/x64_sequences.cc
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@ -2745,7 +2745,17 @@ EMITTER(VECTOR_ADD, MATCH(I<OPCODE_VECTOR_ADD, V128<>, V128<>, V128<>>)) {
// dest.f[n] = xmm1.f[n] ? xmm1.f[n] : dest.f[n];
e.vblendvps(dest, dest, e.xmm1, e.xmm1);
} else {
assert_always();
// https://software.intel.com/en-us/forums/topic/285219
// We reuse all these temps...
assert_true(src1 != e.xmm0 && src1 != e.xmm1 && src1 != e.xmm2);
assert_true(src2 != e.xmm0 && src2 != e.xmm1 && src2 != e.xmm2);
e.vpaddd(e.xmm0, src1, src2); // res
e.vpand(e.xmm1, src1, src2); // sign_and
e.vpandn(e.xmm2, e.xmm0, e.xmm1); // min_sat_mask
e.vblendvps(e.xmm2, e.xmm0, e.GetXmmConstPtr(XMMSignMaskPS), e.xmm2);
e.vpor(e.xmm1, src1, src2); // sign_or
e.vpandn(e.xmm1, e.xmm0); // max_sat_mask
e.vblendvps(e.xmm2, e.GetXmmConstPtr(XMMAbsMaskPS), e.xmm1);
}
} else {
e.vpaddd(dest, src1, src2);