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Merge branch 'master' into d3d12

This commit is contained in:
Triang3l 2018-11-20 20:22:59 +03:00
parent f8ecd47490 c65ee2aa48
commit 3139e2d33b
2 changed files with 42 additions and 9 deletions
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43
src/xenia/cpu/ppc/ppc_emit_memory.cc
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@ -9,12 +9,11 @@
#include "xenia/cpu/ppc/ppc_emit-private.h" #include "xenia/cpu/ppc/ppc_emit-private.h"
#include <stddef.h>
#include "xenia/base/assert.h" #include "xenia/base/assert.h"
#include "xenia/cpu/ppc/ppc_context.h" #include "xenia/cpu/ppc/ppc_context.h"
#include "xenia/cpu/ppc/ppc_hir_builder.h" #include "xenia/cpu/ppc/ppc_hir_builder.h"
#include <stddef.h>
namespace xe { namespace xe {
namespace cpu { namespace cpu {
namespace ppc { namespace ppc {
@ -504,10 +503,26 @@ int InstrEmit_stw(PPCHIRBuilder& f, const InstrData& i) {
} else { } else {
b = f.LoadGPR(i.D.RA); b = f.LoadGPR(i.D.RA);
} }
Value* offset = f.LoadConstantInt64(XEEXTS16(i.D.DS)); Value* offset = f.LoadConstantInt64(XEEXTS16(i.D.DS));
f.StoreOffset(b, offset, f.StoreOffset(b, offset,
f.ByteSwap(f.Truncate(f.LoadGPR(i.D.RT), INT32_TYPE))); f.ByteSwap(f.Truncate(f.LoadGPR(i.D.RT), INT32_TYPE)));
return 0;
}
int InstrEmit_stmw(PPCHIRBuilder& f, const InstrData& i) {
Value* b;
if (i.D.RA == 0) {
b = f.LoadZeroInt64();
} else {
b = f.LoadGPR(i.D.RA);
}
for (uint32_t j = 0; j < 32 - i.D.RT; ++j) {
Value* offset = f.LoadConstantInt64(XEEXTS16(i.D.DS) + j * 4);
f.StoreOffset(b, offset,
f.ByteSwap(f.Truncate(f.LoadGPR(i.D.RT + j), INT32_TYPE)));
}
return 0; return 0;
} }
@ -674,13 +689,23 @@ int InstrEmit_stdbrx(PPCHIRBuilder& f, const InstrData& i) {
// Integer load and store multiple (A-16) // Integer load and store multiple (A-16)
int InstrEmit_lmw(PPCHIRBuilder& f, const InstrData& i) { int InstrEmit_lmw(PPCHIRBuilder& f, const InstrData& i) {
XEINSTRNOTIMPLEMENTED(); Value* b;
return 1; if (i.D.RA == 0) {
} b = f.LoadZeroInt64();
} else {
b = f.LoadGPR(i.D.RA);
}
int InstrEmit_stmw(PPCHIRBuilder& f, const InstrData& i) { for (uint32_t j = 0; j < 32 - i.D.RT; ++j) {
XEINSTRNOTIMPLEMENTED(); if (i.D.RT + j == i.D.RA) {
return 1; continue;
}
Value* offset = f.LoadConstantInt64(XEEXTS16(i.D.DS) + j * 4);
Value* rt = f.ZeroExtend(f.ByteSwap(f.LoadOffset(b, offset, INT32_TYPE)),
INT64_TYPE);
f.StoreGPR(i.D.RT + j, rt);
}
return 0;
} }
// Integer load and store string (A-17) // Integer load and store string (A-17)

8
src/xenia/kernel/xboxkrnl/xboxkrnl_memory.cc
View File

@ -347,6 +347,14 @@ dword_result_t MmAllocatePhysicalMemoryEx(dword_t flags, dword_t region_size,
DECLARE_XBOXKRNL_EXPORT(MmAllocatePhysicalMemoryEx, DECLARE_XBOXKRNL_EXPORT(MmAllocatePhysicalMemoryEx,
ExportTag::kImplemented | ExportTag::kMemory); ExportTag::kImplemented | ExportTag::kMemory);
dword_result_t MmAllocatePhysicalMemory(dword_t flags, dword_t region_size,
dword_t protect_bits) {
return MmAllocatePhysicalMemoryEx(flags, region_size, protect_bits, 0,
0xFFFFFFFFu, 0);
}
DECLARE_XBOXKRNL_EXPORT(MmAllocatePhysicalMemory,
ExportTag::kImplemented | ExportTag::kMemory);
void MmFreePhysicalMemory(dword_t type, dword_t base_address) { void MmFreePhysicalMemory(dword_t type, dword_t base_address) {
// base_address = result of MmAllocatePhysicalMemory. // base_address = result of MmAllocatePhysicalMemory.