From 2e2f47f2de772e65b2c9e84940b87d601c9100a9 Mon Sep 17 00:00:00 2001
From: Wunkolo <Wunkolo@gmail.com>
Date: Fri, 10 May 2024 19:57:38 -0700
Subject: [PATCH] [a64] Fix `AND_NOT_V128`

Operand order is wrong.
---
 src/xenia/cpu/backend/a64/a64_sequences.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/xenia/cpu/backend/a64/a64_sequences.cc b/src/xenia/cpu/backend/a64/a64_sequences.cc
index 0f957e8ee..2a2f64a35 100644
--- a/src/xenia/cpu/backend/a64/a64_sequences.cc
+++ b/src/xenia/cpu/backend/a64/a64_sequences.cc
@@ -2262,7 +2262,7 @@ struct AND_NOT_V128
   static void Emit(A64Emitter& e, const EmitArgType& i) {
     EmitCommutativeBinaryVOp(
         e, i, [](A64Emitter& e, QReg dest, QReg src1, QReg src2) {
-          e.BIC(dest.B16(), src2.B16(), src1.B16());
+          e.BIC(dest.B16(), src1.B16(), src2.B16());
         });
   }
 };