[a64] Use VectorCodeGenerator rather than CodeBlock+CodeGenerator
The emitter doesn't actually hold onto executable code, but just generates the assembly-data into a buffer for the currently-resolving function before placing it into a code-cache. When code gets pushed into the code-cache, it can just be copied from an `std::vector` and reset. The code-cache itself maintains the actual executable memory and stack-unwinding code and such. This also fixes a bunch of errornous relative-addressing glitches where relative addresses were calculated based on the address of the unused CodeBlock rather than being position-independent. `MOVP2R` in particular was generating different instructions depending on its distance from the code block when it should always just use `MOV` and not do any relative-address calculations since we can't predict where the actual instruction's offset will be(we cannot predict what the program counter will be). Oaknut probably needs a "position independent" policy or mode or something so that it avoids PC-relative instructions.
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02edbd264d
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@ -58,8 +58,6 @@ using xe::cpu::hir::Instr;
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using namespace xe::literals;
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using namespace oaknut::util;
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static const size_t kMaxCodeSize = 1_MiB;
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static const size_t kStashOffset = 32;
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// static const size_t kStashOffsetHigh = 32 + 32;
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@ -73,8 +71,7 @@ const uint8_t A64Emitter::fpr_reg_map_[A64Emitter::FPR_COUNT] = {
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};
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A64Emitter::A64Emitter(A64Backend* backend)
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: CodeBlock(kMaxCodeSize),
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CodeGenerator(CodeBlock::ptr()),
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: VectorCodeGenerator(assembly_buffer),
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processor_(backend->processor()),
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backend_(backend),
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code_cache_(backend->code_cache()) {
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@ -138,23 +135,22 @@ bool A64Emitter::Emit(GuestFunction* function, HIRBuilder* builder,
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void* A64Emitter::Emplace(const EmitFunctionInfo& func_info,
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GuestFunction* function) {
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// Copy the current oaknut instruction-buffer into the code-cache
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uint32_t* old_address = CodeBlock::ptr();
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void* new_execute_address;
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void* new_write_address;
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assert_true(func_info.code_size.total == offset());
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if (function) {
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code_cache_->PlaceGuestCode(function->address(), CodeBlock::ptr(),
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code_cache_->PlaceGuestCode(function->address(), assembly_buffer.data(),
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func_info, function, new_execute_address,
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new_write_address);
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} else {
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code_cache_->PlaceHostCode(0, CodeBlock::ptr(), func_info,
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code_cache_->PlaceHostCode(0, assembly_buffer.data(), func_info,
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new_execute_address, new_write_address);
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}
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// Reset the oaknut instruction-buffer
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set_wptr(reinterpret_cast<uint32_t*>(old_address));
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assembly_buffer.clear();
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label_lookup_.clear();
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return new_execute_address;
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@ -224,7 +220,8 @@ bool A64Emitter::Emit(HIRBuilder* builder, EmitFunctionInfo& func_info) {
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// Call count.
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MOV(W0, 1);
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MOVP2R(X5, low_address(&trace_header->function_call_count));
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MOV(X5, reinterpret_cast<uintptr_t>(
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low_address(&trace_header->function_call_count)));
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LDADDAL(X0, X0, X5);
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// Get call history slot.
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@ -234,8 +231,8 @@ bool A64Emitter::Emit(HIRBuilder* builder, EmitFunctionInfo& func_info) {
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AND(W0, W0, 0b00000011);
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// Record call history value into slot (guest addr in W1).
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MOV(X5, uint32_t(
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uint64_t(low_address(&trace_header->function_caller_history))));
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MOV(X5, reinterpret_cast<uintptr_t>(
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low_address(&trace_header->function_caller_history)));
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STR(W1, X5, X0, oaknut::IndexExt::LSL, 2);
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// Calling thread. Load X0 with thread ID.
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@ -243,7 +240,8 @@ bool A64Emitter::Emit(HIRBuilder* builder, EmitFunctionInfo& func_info) {
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MOV(W5, 1);
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LSL(W0, W5, W0);
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MOVP2R(X5, low_address(&trace_header->function_thread_use));
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MOV(X5, reinterpret_cast<uintptr_t>(
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low_address(&trace_header->function_thread_use)));
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LDSET(W0, WZR, X5);
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}
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@ -334,8 +332,9 @@ void A64Emitter::MarkSourceOffset(const Instr* i) {
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const uint32_t instruction_index =
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(entry->guest_address - trace_data_->start_address()) / 4;
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MOV(X0, 1);
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MOVP2R(X1, low_address(trace_data_->instruction_execute_counts() +
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instruction_index * 8));
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MOV(X1, reinterpret_cast<uintptr_t>(
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low_address(trace_data_->instruction_execute_counts() +
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instruction_index * 8)));
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LDADDAL(X0, ZR, X1);
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}
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}
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@ -803,11 +802,9 @@ void A64Emitter::FreeConstData(uintptr_t data) {
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memory::DeallocationType::kRelease);
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}
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std::byte* A64Emitter::GetVConstPtr() const {
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return reinterpret_cast<std::byte*>(backend_->emitter_data());
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}
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uintptr_t A64Emitter::GetVConstPtr() const { return backend_->emitter_data(); }
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std::byte* A64Emitter::GetVConstPtr(VConst id) const {
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uintptr_t A64Emitter::GetVConstPtr(VConst id) const {
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// Load through fixed constant table setup by PlaceConstData.
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// It's important that the pointer is not signed, as it will be sign-extended.
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return GetVConstPtr() + GetVConstOffset(id);
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@ -122,7 +122,7 @@ enum A64EmitterFeatureFlags {
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kA64EmitF16C = 1 << 1,
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};
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class A64Emitter : public oaknut::CodeBlock, public oaknut::CodeGenerator {
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class A64Emitter : public oaknut::VectorCodeGenerator {
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public:
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A64Emitter(A64Backend* backend);
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virtual ~A64Emitter();
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@ -203,8 +203,8 @@ class A64Emitter : public oaknut::CodeBlock, public oaknut::CodeGenerator {
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static bool ConstantFitsIn32Reg(uint64_t v);
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void MovMem64(const oaknut::XRegSp& addr, intptr_t offset, uint64_t v);
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std::byte* GetVConstPtr() const;
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std::byte* GetVConstPtr(VConst id) const;
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uintptr_t GetVConstPtr() const;
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uintptr_t GetVConstPtr(VConst id) const;
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static constexpr uintptr_t GetVConstOffset(VConst id) {
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return sizeof(vec128_t) * id;
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}
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@ -239,6 +239,8 @@ class A64Emitter : public oaknut::CodeBlock, public oaknut::CodeGenerator {
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A64CodeCache* code_cache_ = nullptr;
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uint32_t feature_flags_ = 0;
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std::vector<std::uint32_t> assembly_buffer;
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oaknut::Label* epilog_label_ = nullptr;
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// Convert from plain-text label-names into oaknut-labels
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@ -83,10 +83,10 @@ struct LOAD_VECTOR_SHL_I8
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if (i.src1.is_constant) {
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auto sh = i.src1.constant();
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assert_true(sh < xe::countof(lvsl_table));
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e.MOVP2R(X0, &lvsl_table[sh]);
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e.MOV(X0, reinterpret_cast<uintptr_t>(&lvsl_table[sh]));
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e.LDR(i.dest, X0);
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} else {
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e.MOVP2R(X0, lvsl_table);
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e.MOV(X0, reinterpret_cast<uintptr_t>(lvsl_table));
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e.AND(X1, i.src1.reg().toX(), 0xf);
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e.LDR(i.dest, X0, X1, IndexExt::LSL, 4);
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}
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@ -121,10 +121,10 @@ struct LOAD_VECTOR_SHR_I8
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if (i.src1.is_constant) {
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auto sh = i.src1.constant();
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assert_true(sh < xe::countof(lvsr_table));
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e.MOVP2R(X0, &lvsr_table[sh]);
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e.MOV(X0, reinterpret_cast<uintptr_t>(&lvsr_table[sh]));
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e.LDR(i.dest, X0);
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} else {
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e.MOVP2R(X0, lvsr_table);
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e.MOV(X0, reinterpret_cast<uintptr_t>(lvsr_table));
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e.AND(X1, i.src1.reg().toX(), 0xf);
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e.LDR(i.dest, X0, X1, IndexExt::LSL, 4);
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}
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@ -1007,7 +1007,7 @@ struct EXTRACT_I32
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e.AND(X0, i.src2.reg().toX(), 0b11);
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e.LSL(X0, X0, 4);
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e.MOVP2R(X1, extract_table_32);
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e.MOV(X1, reinterpret_cast<uintptr_t>(extract_table_32));
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e.LDR(Q0, X1, X0);
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// Byte-table lookup
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@ -1335,7 +1335,7 @@ struct PACK : Sequence<PACK, I<OPCODE_PACK, V128Op, V128Op, V128Op>> {
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}
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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// Saturate to [3,3....] so that only values between 3...[00] and 3...[FF]
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// are valid - max before min to pack NaN as zero (5454082B is heavily
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@ -1435,7 +1435,7 @@ struct PACK : Sequence<PACK, I<OPCODE_PACK, V128Op, V128Op, V128Op>> {
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e.LoadConstantV(src, i.src1.constant());
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}
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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// Saturate
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e.LDR(Q1, VConstData, e.GetVConstOffset(VPackSHORT_Min));
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@ -1456,7 +1456,7 @@ struct PACK : Sequence<PACK, I<OPCODE_PACK, V128Op, V128Op, V128Op>> {
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e.LoadConstantV(src, i.src1.constant());
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}
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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// Saturate
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e.LDR(Q1, VConstData, e.GetVConstOffset(VPackSHORT_Min));
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@ -1478,7 +1478,7 @@ struct PACK : Sequence<PACK, I<OPCODE_PACK, V128Op, V128Op, V128Op>> {
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e.LoadConstantV(src, i.src1.constant());
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}
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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// Saturate.
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e.LDR(Q1, VConstData, e.GetVConstOffset(VPackUINT_2101010_MinUnpacked));
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@ -1519,7 +1519,7 @@ struct PACK : Sequence<PACK, I<OPCODE_PACK, V128Op, V128Op, V128Op>> {
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e.LoadConstantV(src, i.src1.constant());
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}
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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// Saturate.
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e.LDR(Q1, VConstData, e.GetVConstOffset(VPackULONG_4202020_MinUnpacked));
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@ -1740,7 +1740,7 @@ struct UNPACK : Sequence<UNPACK, I<OPCODE_UNPACK, V128Op, V128Op>> {
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static void EmitD3DCOLOR(A64Emitter& e, const EmitArgType& i) {
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// ARGB (WXYZ) -> RGBA (XYZW)
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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QReg src(0);
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@ -1849,7 +1849,7 @@ struct UNPACK : Sequence<UNPACK, I<OPCODE_UNPACK, V128Op, V128Op>> {
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// (VD.w) = 1.0 (games splat W after unpacking to get vectors of 1.0f)
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// src is (xx,xx,xx,VALUE)
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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QReg src(0);
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if (i.src1.is_constant) {
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@ -1892,7 +1892,7 @@ struct UNPACK : Sequence<UNPACK, I<OPCODE_UNPACK, V128Op, V128Op>> {
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// src is (xx,xx,VALUE,VALUE)
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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QReg src(0);
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if (i.src1.is_constant) {
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@ -1928,7 +1928,7 @@ struct UNPACK : Sequence<UNPACK, I<OPCODE_UNPACK, V128Op, V128Op>> {
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}
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static void EmitUINT_2101010(A64Emitter& e, const EmitArgType& i) {
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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QReg src(0);
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if (i.src1.is_constant) {
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@ -1972,7 +1972,7 @@ struct UNPACK : Sequence<UNPACK, I<OPCODE_UNPACK, V128Op, V128Op>> {
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}
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static void EmitULONG_4202020(A64Emitter& e, const EmitArgType& i) {
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const XReg VConstData = X3;
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e.MOVP2R(VConstData, e.GetVConstPtr());
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e.MOV(VConstData, e.GetVConstPtr());
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QReg src(0);
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if (i.src1.is_constant) {
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@ -2758,7 +2758,7 @@ struct SET_ROUNDING_MODE_I32
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e.AND(W1, i.src1, 0b111);
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// Use the low 3 bits as an index into a LUT
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e.MOVP2R(X0, fpcr_table);
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e.MOV(X0, reinterpret_cast<uintptr_t>(fpcr_table));
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e.LDRB(W0, X0, X1);
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// Replace FPCR bits with new value
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