[Vulkan] Force red channel into all channels for DXT5A. Probably wrong solution but will work for now.
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@ -38,8 +38,8 @@ struct TextureConfig {
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};
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};
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#define SWIZ(r, g, b, a) r, g, b, a
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#define SWIZ(r, g, b, a) r, g, b, a
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#define ___R SWIZ(-7, -7, -7, 0)
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#define ___a SWIZ(-7, -7, -7, 3)
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#define ___A SWIZ(-7, -7, -7, 3)
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#define rrrr SWIZ(-1, -1, -1, -1)
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#define GRAB SWIZ(1, 0, 3, 2)
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#define GRAB SWIZ(1, 0, 3, 2)
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#define BGRA SWIZ(2, 1, 0, 3)
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#define BGRA SWIZ(2, 1, 0, 3)
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@ -114,8 +114,8 @@ static const TextureConfig texture_configs[64] = {
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/* k_10_11_11_AS_16_16_16_16 */ {VK_FORMAT_B10G11R11_UFLOAT_PACK32}, // ?
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/* k_10_11_11_AS_16_16_16_16 */ {VK_FORMAT_B10G11R11_UFLOAT_PACK32}, // ?
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/* k_11_11_10_AS_16_16_16_16 */ {VK_FORMAT_B10G11R11_UFLOAT_PACK32}, // ?
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/* k_11_11_10_AS_16_16_16_16 */ {VK_FORMAT_B10G11R11_UFLOAT_PACK32}, // ?
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/* k_32_32_32_FLOAT */ {VK_FORMAT_R32G32B32_SFLOAT},
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/* k_32_32_32_FLOAT */ {VK_FORMAT_R32G32B32_SFLOAT},
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/* k_DXT3A */ {VK_FORMAT_BC2_UNORM_BLOCK, ___A},
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/* k_DXT3A */ {VK_FORMAT_BC2_UNORM_BLOCK, ___a},
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/* k_DXT5A */ {VK_FORMAT_BC4_UNORM_BLOCK}, // ATI1N
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/* k_DXT5A */ {VK_FORMAT_BC4_UNORM_BLOCK, rrrr}, // ATI1N
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// http://fileadmin.cs.lth.se/cs/Personal/Michael_Doggett/talks/unc-xenos-doggett.pdf
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// http://fileadmin.cs.lth.se/cs/Personal/Michael_Doggett/talks/unc-xenos-doggett.pdf
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/* k_CTX1 */ {VK_FORMAT_R8G8_UINT},
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/* k_CTX1 */ {VK_FORMAT_R8G8_UINT},
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@ -129,8 +129,9 @@ static const TextureConfig texture_configs[64] = {
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#undef BGRA
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#undef BGRA
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#undef GRAB
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#undef GRAB
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#undef ___A
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#undef RZZZ
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#undef ___R
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#undef rrrr
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#undef ___a
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#undef SWIZ
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#undef SWIZ
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const char* get_dimension_name(Dimension dimension) {
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const char* get_dimension_name(Dimension dimension) {
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