[CPU] Handle NaN in fctidxx, fctiwxx.
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0206e90398
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@ -242,10 +242,20 @@ int InstrEmit_fcfidx(PPCHIRBuilder& f, const InstrData& i) {
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int InstrEmit_fctidxx_(PPCHIRBuilder& f, const InstrData& i,
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RoundMode round_mode) {
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Value* v = f.Convert(f.LoadFPR(i.X.RB), INT64_TYPE, round_mode);
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auto end = f.NewLabel();
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auto isnan = f.NewLabel();
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Value* v;
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f.BranchTrue(f.IsNan(f.LoadFPR(i.X.RB)), isnan);
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v = f.Convert(f.LoadFPR(i.X.RB), INT64_TYPE, round_mode);
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v = f.Cast(v, FLOAT64_TYPE);
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f.StoreFPR(i.X.RT, v);
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f.UpdateFPSCR(v, i.X.Rc);
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f.Branch(end);
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f.MarkLabel(isnan);
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v = f.Cast(f.LoadConstantUint64(0x8000000000000000u), FLOAT64_TYPE);
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f.StoreFPR(i.X.RT, v);
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f.UpdateFPSCR(v, i.X.Rc);
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f.MarkLabel(end);
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return 0;
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}
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@ -260,10 +270,20 @@ int InstrEmit_fctidzx(PPCHIRBuilder& f, const InstrData& i) {
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int InstrEmit_fctiwxx_(PPCHIRBuilder& f, const InstrData& i,
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RoundMode round_mode) {
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Value* v = f.Convert(f.LoadFPR(i.X.RB), INT32_TYPE, round_mode);
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auto end = f.NewLabel();
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auto isnan = f.NewLabel();
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Value* v;
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f.BranchTrue(f.IsNan(f.LoadFPR(i.X.RB)), isnan);
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v = f.Convert(f.LoadFPR(i.X.RB), INT32_TYPE, round_mode);
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v = f.Cast(f.SignExtend(v, INT64_TYPE), FLOAT64_TYPE);
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f.StoreFPR(i.X.RT, v);
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f.UpdateFPSCR(v, i.X.Rc);
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f.Branch(end);
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f.MarkLabel(isnan);
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v = f.Cast(f.LoadConstantUint32(0x80000000u), FLOAT64_TYPE);
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f.StoreFPR(i.X.RT, v);
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f.UpdateFPSCR(v, i.X.Rc);
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f.MarkLabel(end);
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return 0;
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}
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