diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisb.bin b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.bin new file mode 100644 index 000000000..4d17de5ac Binary files /dev/null and b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.bin differ diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisb.dis b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.dis new file mode 100644 index 000000000..8378aca3e --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.dis @@ -0,0 +1,21 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vspltisb.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 60 03 0c vspltisb v3,0 + 100004: 4e 80 00 20 blr + +0000000000100008 : + 100008: 10 61 03 0c vspltisb v3,1 + 10000c: 4e 80 00 20 blr + +0000000000100010 : + 100010: 10 7f 03 0c vspltisb v3,-1 + 100014: 4e 80 00 20 blr + +0000000000100018 : + 100018: 10 7e 03 0c vspltisb v3,-2 + 10001c: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisb.map b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.map new file mode 100644 index 000000000..93d21b9ed --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltisb.map @@ -0,0 +1,4 @@ +0000000000000000 t test_vspltisb_1 +0000000000000008 t test_vspltisb_2 +0000000000000010 t test_vspltisb_3 +0000000000000018 t test_vspltisb_4 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltish.bin b/src/alloy/frontend/ppc/test/bin/instr_vspltish.bin new file mode 100644 index 000000000..f2db822f7 Binary files /dev/null and b/src/alloy/frontend/ppc/test/bin/instr_vspltish.bin differ diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltish.dis b/src/alloy/frontend/ppc/test/bin/instr_vspltish.dis new file mode 100644 index 000000000..7eb39018e --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltish.dis @@ -0,0 +1,21 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vspltish.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 60 03 4c vspltish v3,0 + 100004: 4e 80 00 20 blr + +0000000000100008 : + 100008: 10 61 03 4c vspltish v3,1 + 10000c: 4e 80 00 20 blr + +0000000000100010 : + 100010: 10 7f 03 4c vspltish v3,-1 + 100014: 4e 80 00 20 blr + +0000000000100018 : + 100018: 10 7e 03 4c vspltish v3,-2 + 10001c: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltish.map b/src/alloy/frontend/ppc/test/bin/instr_vspltish.map new file mode 100644 index 000000000..9eb8c3160 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltish.map @@ -0,0 +1,4 @@ +0000000000000000 t test_vspltish_1 +0000000000000008 t test_vspltish_2 +0000000000000010 t test_vspltish_3 +0000000000000018 t test_vspltish_4 diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisw.bin b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.bin new file mode 100644 index 000000000..687d74ce1 Binary files /dev/null and b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.bin differ diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisw.dis b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.dis new file mode 100644 index 000000000..740a94ea9 --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.dis @@ -0,0 +1,21 @@ + +/vagrant/src/alloy/frontend/ppc/test/bin//instr_vspltisw.o: file format elf64-powerpc + + +Disassembly of section .text: + +0000000000100000 : + 100000: 10 60 03 8c vspltisw v3,0 + 100004: 4e 80 00 20 blr + +0000000000100008 : + 100008: 10 61 03 8c vspltisw v3,1 + 10000c: 4e 80 00 20 blr + +0000000000100010 : + 100010: 10 7f 03 8c vspltisw v3,-1 + 100014: 4e 80 00 20 blr + +0000000000100018 : + 100018: 10 7e 03 8c vspltisw v3,-2 + 10001c: 4e 80 00 20 blr diff --git a/src/alloy/frontend/ppc/test/bin/instr_vspltisw.map b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.map new file mode 100644 index 000000000..46346e99c --- /dev/null +++ b/src/alloy/frontend/ppc/test/bin/instr_vspltisw.map @@ -0,0 +1,4 @@ +0000000000000000 t test_vspltisw_1 +0000000000000008 t test_vspltisw_2 +0000000000000010 t test_vspltisw_3 +0000000000000018 t test_vspltisw_4 diff --git a/src/alloy/frontend/ppc/test/instr_vspltisb.s b/src/alloy/frontend/ppc/test/instr_vspltisb.s new file mode 100644 index 000000000..83e48c09f --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vspltisb.s @@ -0,0 +1,19 @@ +test_vspltisb_1: + vspltisb v3, 0 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + +test_vspltisb_2: + vspltisb v3, 1 + blr + #_ REGISTER_OUT v3 [01010101, 01010101, 01010101, 01010101] + +test_vspltisb_3: + vspltisb v3, -1 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vspltisb_4: + vspltisb v3, -2 + blr + #_ REGISTER_OUT v3 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] diff --git a/src/alloy/frontend/ppc/test/instr_vspltish.s b/src/alloy/frontend/ppc/test/instr_vspltish.s new file mode 100644 index 000000000..40ae3d61a --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vspltish.s @@ -0,0 +1,19 @@ +test_vspltish_1: + vspltish v3, 0 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + +test_vspltish_2: + vspltish v3, 1 + blr + #_ REGISTER_OUT v3 [00010001, 00010001, 00010001, 00010001] + +test_vspltish_3: + vspltish v3, -1 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vspltish_4: + vspltish v3, -2 + blr + #_ REGISTER_OUT v3 [FFFEFFFE, FFFEFFFE, FFFEFFFE, FFFEFFFE] diff --git a/src/alloy/frontend/ppc/test/instr_vspltisw.s b/src/alloy/frontend/ppc/test/instr_vspltisw.s new file mode 100644 index 000000000..696544cdc --- /dev/null +++ b/src/alloy/frontend/ppc/test/instr_vspltisw.s @@ -0,0 +1,19 @@ +test_vspltisw_1: + vspltisw v3, 0 + blr + #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] + +test_vspltisw_2: + vspltisw v3, 1 + blr + #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] + +test_vspltisw_3: + vspltisw v3, -1 + blr + #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] + +test_vspltisw_4: + vspltisw v3, -2 + blr + #_ REGISTER_OUT v3 [FFFFFFFE, FFFFFFFE, FFFFFFFE, FFFFFFFE]