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Tweaking GPU callbacks.

This commit is contained in:
Ben Vanik 2014-11-08 10:13:08 -08:00
parent 7bb61b8099
commit 21b6c93db0
4 changed files with 10 additions and 5 deletions
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2
src/xenia/gpu/command_processor.cc
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@ -512,7 +512,7 @@ uint32_t CommandProcessor::ExecutePacket(PacketArgs& args) {
uint32_t value = READ_PTR(); uint32_t value = READ_PTR();
// Writeback initiator. // Writeback initiator.
WriteRegister(packet_ptr, XE_GPU_REG_VGT_EVENT_INITIATOR, WriteRegister(packet_ptr, XE_GPU_REG_VGT_EVENT_INITIATOR,
initiator & 0x1F); initiator & 0x3F);
uint32_t data_value; uint32_t data_value;
if ((initiator >> 31) & 0x1) { if ((initiator >> 31) & 0x1) {
// Write counter (GPU vblank counter?). // Write counter (GPU vblank counter?).

3
src/xenia/gpu/graphics_system.cc
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@ -192,6 +192,9 @@ void GraphicsSystem::DispatchInterruptCallback(
cpu = 2; cpu = 2;
} }
XELOGGPU("Dispatching GPU interrupt at %.8X w/ mode %d on cpu %d",
interrupt_callback_, source, cpu);
// NOTE: we may be executing in some random thread. // NOTE: we may be executing in some random thread.
if (!interrupt_callback_) { if (!interrupt_callback_) {
return; return;

8
src/xenia/gpu/xenos/register_table.inc
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@ -18,12 +18,12 @@
XE_GPU_REGISTER(0x01DD, dword, SCRATCH_ADDR) XE_GPU_REGISTER(0x01DD, dword, SCRATCH_ADDR)
XE_GPU_REGISTER(0x01DC, dword, SCRATCH_UMSK) XE_GPU_REGISTER(0x01DC, dword, SCRATCH_UMSK)
XE_GPU_REGISTER(0x0578, dword, SCRATCH_REG0) XE_GPU_REGISTER(0x0578, dword, SCRATCH_REG0) // interrupt sync
XE_GPU_REGISTER(0x0579, dword, SCRATCH_REG1) XE_GPU_REGISTER(0x0579, dword, SCRATCH_REG1) // present interval
XE_GPU_REGISTER(0x057A, dword, SCRATCH_REG2) XE_GPU_REGISTER(0x057A, dword, SCRATCH_REG2)
XE_GPU_REGISTER(0x057B, dword, SCRATCH_REG3) XE_GPU_REGISTER(0x057B, dword, SCRATCH_REG3)
XE_GPU_REGISTER(0x057C, dword, SCRATCH_REG4) XE_GPU_REGISTER(0x057C, dword, CALLBACK_ADDRESS)
XE_GPU_REGISTER(0x057D, dword, SCRATCH_REG5) XE_GPU_REGISTER(0x057D, dword, CALLBACK_CONTEXT)
XE_GPU_REGISTER(0x057E, dword, SCRATCH_REG6) XE_GPU_REGISTER(0x057E, dword, SCRATCH_REG6)
XE_GPU_REGISTER(0x057F, dword, SCRATCH_REG7) XE_GPU_REGISTER(0x057F, dword, SCRATCH_REG7)

2
src/xenia/kernel/xboxkrnl_threading.cc
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@ -1177,6 +1177,8 @@ SHIM_CALL KeInsertQueueDpc_shim(PPCContext* ppc_state, KernelState* state) {
uint32_t arg1 = SHIM_GET_ARG_32(1); uint32_t arg1 = SHIM_GET_ARG_32(1);
uint32_t arg2 = SHIM_GET_ARG_32(2); uint32_t arg2 = SHIM_GET_ARG_32(2);
assert_always("DPC does not dispatch yet; going to hang!");
XELOGD("KeInsertQueueDpc(%.8X, %.8X, %.8X)", dpc_ptr, arg1, arg2); XELOGD("KeInsertQueueDpc(%.8X, %.8X, %.8X)", dpc_ptr, arg1, arg2);
uint32_t list_entry_ptr = dpc_ptr + 4; uint32_t list_entry_ptr = dpc_ptr + 4;