From 17987ca7551720115f5684f7d0b4d876ef196e0c Mon Sep 17 00:00:00 2001 From: Wunkolo Date: Sun, 5 May 2024 19:14:51 -0700 Subject: [PATCH] [a64] Use `X4` for address-generation veneer --- src/xenia/cpu/backend/a64/a64_seq_memory.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/xenia/cpu/backend/a64/a64_seq_memory.cc b/src/xenia/cpu/backend/a64/a64_seq_memory.cc index 12b625c01..4b86aa4cf 100644 --- a/src/xenia/cpu/backend/a64/a64_seq_memory.cc +++ b/src/xenia/cpu/backend/a64/a64_seq_memory.cc @@ -25,7 +25,7 @@ volatile int anchor_memory = 0; template XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset, - XReg address_register = X0) { + XReg address_register = X4) { assert_true(offset.is_constant); int32_t offset_const = static_cast(offset.constant()); @@ -71,7 +71,7 @@ XReg ComputeMemoryAddressOffset(A64Emitter& e, const T& guest, const T& offset, // Note: most *should* be aligned, but needs to be checked! template XReg ComputeMemoryAddress(A64Emitter& e, const T& guest, - XReg address_register = X0) { + XReg address_register = X4) { if (guest.is_constant) { // TODO(benvanik): figure out how to do this without a temp. // Since the constant is often 0x8... if we tried to use that as a