From ae6fd98c3c750c1b1d89f1e1e0ac9b48f6cc51a0 Mon Sep 17 00:00:00 2001
From: Triang3l <triang3l@yandex.ru>
Date: Tue, 8 Jan 2019 01:39:21 +0300
Subject: [PATCH] [CPU] Ignore upper bits of shift amount in srdx/srwx

---
 src/xenia/cpu/ppc/ppc_emit_alu.cc | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/xenia/cpu/ppc/ppc_emit_alu.cc b/src/xenia/cpu/ppc/ppc_emit_alu.cc
index 72780974f..1b0ed6327 100644
--- a/src/xenia/cpu/ppc/ppc_emit_alu.cc
+++ b/src/xenia/cpu/ppc/ppc_emit_alu.cc
@@ -1077,8 +1077,8 @@ int InstrEmit_srdx(PPCHIRBuilder& f, const InstrData& i) {
   // else
   //   m <- i64.0
   // RA <- r & m
-  // TODO(benvanik): if >3F, zero out the result.
-  Value* sh = f.Truncate(f.LoadGPR(i.X.RB), INT8_TYPE);
+  Value* sh =
+      f.And(f.Truncate(f.LoadGPR(i.X.RB), INT8_TYPE), f.LoadConstantInt8(0x7F));
   Value* v = f.Select(f.IsTrue(f.And(sh, f.LoadConstantInt8(0x40))),
                       f.LoadZeroInt64(), f.Shr(f.LoadGPR(i.X.RT), sh));
   f.StoreGPR(i.X.RA, v);
@@ -1096,8 +1096,8 @@ int InstrEmit_srwx(PPCHIRBuilder& f, const InstrData& i) {
   // else
   //   m <- i64.0
   // RA <- r & m
-  // TODO(benvanik): if >1F, zero out the result.
-  Value* sh = f.Truncate(f.LoadGPR(i.X.RB), INT8_TYPE);
+  Value* sh =
+      f.And(f.Truncate(f.LoadGPR(i.X.RB), INT8_TYPE), f.LoadConstantInt8(0x3F));
   Value* v =
       f.Select(f.IsTrue(f.And(sh, f.LoadConstantInt8(0x20))), f.LoadZeroInt32(),
                f.Shr(f.Truncate(f.LoadGPR(i.X.RT), INT32_TYPE), sh));