JIT - fctidz: Properly saturate
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@ -1453,12 +1453,32 @@ struct CONVERT_I32_F64
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struct CONVERT_I64_F64
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struct CONVERT_I64_F64
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: Sequence<CONVERT_I64_F64, I<OPCODE_CONVERT, I64Op, F64Op>> {
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: Sequence<CONVERT_I64_F64, I<OPCODE_CONVERT, I64Op, F64Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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// Copy src1.
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e.movq(e.rcx, i.src1);
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// TODO(benvanik): saturation check? cvtt* (trunc?)
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// TODO(benvanik): saturation check? cvtt* (trunc?)
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if (i.instr->flags == ROUND_TO_ZERO) {
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if (i.instr->flags == ROUND_TO_ZERO) {
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e.vcvttsd2si(i.dest, i.src1);
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e.vcvttsd2si(i.dest, i.src1);
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} else {
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} else {
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e.vcvtsd2si(i.dest, i.src1);
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e.vcvtsd2si(i.dest, i.src1);
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}
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}
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// 0x8000000000000000
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e.mov(e.rax, 0x1);
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e.shl(e.rax, 63);
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// Saturate positive overflow
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// TODO(DrChat): Find a shorter equivalent sequence.
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// if (result ind. && src1 >= 0)
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// result = 0x7FFFFFFFFFFFFFFF;
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e.cmp(e.rax, i.dest);
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e.sete(e.al);
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e.movzx(e.rax, e.al);
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e.shr(e.rcx, 63);
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e.xor_(e.rcx, 0x01);
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e.and_(e.rax, e.rcx);
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e.sub(i.dest, e.rax);
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}
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}
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};
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};
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struct CONVERT_F32_I32
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struct CONVERT_F32_I32
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@ -95,3 +95,100 @@ test_fctiwz_10:
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# blr
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# blr
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# #_ REGISTER_OUT f0 0xfff4000000000000
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# #_ REGISTER_OUT f0 0xfff4000000000000
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# #_ REGISTER_OUT f1 0x0000000080000000
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# #_ REGISTER_OUT f1 0x0000000080000000
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# +0
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test_fctidz_1:
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#_ REGISTER_IN f0 0x0000000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x0000000000000000
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#_ REGISTER_OUT f1 0x0000000000000000
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# -0
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test_fctidz_2:
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#_ REGISTER_IN f0 0x8000000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x8000000000000000
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#_ REGISTER_OUT f1 0x0000000000000000
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# smallest positive subnormal
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test_fctidz_3:
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#_ REGISTER_IN f0 0x0000000000000001
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x0000000000000001
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#_ REGISTER_OUT f1 0x0000000000000000
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# largest subnormal
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test_fctidz_4:
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#_ REGISTER_IN f0 0x000fffffffffffff
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x000fffffffffffff
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#_ REGISTER_OUT f1 0x0000000000000000
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# +1
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test_fctidz_5:
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#_ REGISTER_IN f0 0x3ff0000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x3ff0000000000000
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#_ REGISTER_OUT f1 0x0000000000000001
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# -1
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test_fctidz_6:
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#_ REGISTER_IN f0 0xbff0000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0xbff0000000000000
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#_ REGISTER_OUT f1 0xffffffffffffffff
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# -(2^31)
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test_fctidz_7:
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#_ REGISTER_IN f0 0xc1e0000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0xc1e0000000000000
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#_ REGISTER_OUT f1 0xffffffff80000000
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# 2^31 - 1
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test_fctidz_8:
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#_ REGISTER_IN f0 0x41dfffffffc00000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x41dfffffffc00000
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#_ REGISTER_OUT f1 0x000000007fffffff
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# +infinity
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test_fctidz_9:
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#_ REGISTER_IN f0 0x7ff0000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0x7ff0000000000000
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#_ REGISTER_OUT f1 0x7fffffffffffffff
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# -infinity
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test_fctidz_10:
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#_ REGISTER_IN f0 0xfff0000000000000
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fctidz f1, f0
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blr
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#_ REGISTER_OUT f0 0xfff0000000000000
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#_ REGISTER_OUT f1 0x8000000000000000
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# TODO(DrChat): Xenia doesn't handle NaNs yet.
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# # QNaN
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# test_fctidz_11:
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# #_ REGISTER_IN f0 0xfff8000000000000
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# fctidz f1, f0
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# blr
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# #_ REGISTER_OUT f0 0xfff8000000000000
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# #_ REGISTER_OUT f1 0x8000000000000000
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#
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# # SNaN
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# test_fctidz_12:
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# #_ REGISTER_IN f0 0xfff4000000000000
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# fctidz f1, f0
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# blr
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# #_ REGISTER_OUT f0 0xfff4000000000000
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# #_ REGISTER_OUT f1 0x8000000000000000
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