Adding (somewhat) ivm compatible ctx load/store tracing.
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638d9631af
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0123b63aa2
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@ -30,6 +30,9 @@ namespace {
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#define UNIMPLEMENTED_SEQ() __debugbreak()
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#define ASSERT_INVALID_TYPE() XEASSERTALWAYS()
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#define ITRACE 1
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#define DTRACE 0
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// TODO(benvanik): emit traces/printfs/etc
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void Dummy() {
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@ -43,6 +46,22 @@ void PrintString(void* raw_context, const char* str) {
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fflush(stdout);
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}
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void TraceContextLoad(void* raw_context, uint64_t offset, uint64_t value) {
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fprintf(stdout, "%lld (%.llX) = ctx i64 +%lld\n", (int64_t)value, value, offset);
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fflush(stdout);
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}
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void TraceContextStore(void* raw_context, uint64_t offset, uint64_t value) {
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fprintf(stdout, "ctx i64 +%lld = %lld (%.llX)\n", offset, (int64_t)value, value);
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fflush(stdout);
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}
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void CallNative(X64Emitter& e, void* target) {
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e.mov(e.rax, (uint64_t)target);
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e.call(e.rax);
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e.mov(e.rcx, e.qword[e.rsp + 0]);
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e.mov(e.rdx, e.qword[e.rcx + 8]); // membase
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}
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// TODO(benvanik): fancy stuff.
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void* ResolveFunctionSymbol(void* raw_context, FunctionInfo* symbol_info) {
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// TODO(benvanik): generate this thunk at runtime? or a shim?
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@ -679,14 +698,14 @@ void alloy::backend::x64::lowering::RegisterSequences(LoweringTable* table) {
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// --------------------------------------------------------------------------
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table->AddSequence(OPCODE_COMMENT, [](X64Emitter& e, Instr*& i) {
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#if ITRACE
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// TODO(benvanik): pass through.
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// TODO(benvanik): don't just leak this memory.
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auto str = (const char*)i->src1.offset;
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auto str_copy = xestrdupa(str);
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e.mov(e.rdx, (uint64_t)str_copy);
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e.mov(e.rax, (uint64_t)PrintString);
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e.call(e.rax);
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e.mov(e.rcx, e.qword[e.rsp + 0]);
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e.mov(e.rdx, e.qword[e.rcx + 8]); // membase
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CallNative(e, PrintString);
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#endif // ITRACE
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i = e.Advance(i);
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return true;
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});
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@ -1069,21 +1088,41 @@ void alloy::backend::x64::lowering::RegisterSequences(LoweringTable* table) {
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e.BeginOp(i->dest, dest, REG_DEST);
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e.mov(dest, e.byte[e.rcx + i->src1.offset]);
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e.EndOp(dest);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8b, dest);
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CallNative(e, TraceContextLoad);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_I16, SIG_TYPE_IGNORE)) {
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Reg16 dest;
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e.BeginOp(i->dest, dest, REG_DEST);
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e.mov(dest, e.word[e.rcx + i->src1.offset]);
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e.EndOp(dest);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8w, dest);
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CallNative(e, TraceContextLoad);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_I32, SIG_TYPE_IGNORE)) {
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Reg32 dest;
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e.BeginOp(i->dest, dest, REG_DEST);
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e.mov(dest, e.dword[e.rcx + i->src1.offset]);
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e.EndOp(dest);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8d, dest);
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CallNative(e, TraceContextLoad);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_I64, SIG_TYPE_IGNORE)) {
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Reg64 dest;
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e.BeginOp(i->dest, dest, REG_DEST);
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e.mov(dest, e.qword[e.rcx + i->src1.offset]);
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e.EndOp(dest);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8, dest);
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CallNative(e, TraceContextLoad);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_F32, SIG_TYPE_IGNORE)) {
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Xmm dest;
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e.BeginOp(i->dest, dest, REG_DEST);
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@ -1113,29 +1152,69 @@ void alloy::backend::x64::lowering::RegisterSequences(LoweringTable* table) {
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e.BeginOp(i->src2.value, src, 0);
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e.mov(e.byte[e.rcx + i->src1.offset], src);
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e.EndOp(src);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8b, src);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I8C)) {
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e.mov(e.byte[e.rcx + i->src1.offset], i->src2.value->constant.i8);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8b, i->src2.value->constant.i8);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I16)) {
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Reg16 src;
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e.BeginOp(i->src2.value, src, 0);
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e.mov(e.word[e.rcx + i->src1.offset], src);
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e.EndOp(src);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8w, src);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I16C)) {
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e.mov(e.word[e.rcx + i->src1.offset], i->src2.value->constant.i16);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8w, i->src2.value->constant.i16);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I32)) {
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Reg32 src;
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e.BeginOp(i->src2.value, src, 0);
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e.mov(e.dword[e.rcx + i->src1.offset], src);
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e.EndOp(src);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8d, src);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I32C)) {
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e.mov(e.dword[e.rcx + i->src1.offset], i->src2.value->constant.i32);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8d, i->src2.value->constant.i32);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I64)) {
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Reg64 src;
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e.BeginOp(i->src2.value, src, 0);
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e.mov(e.qword[e.rcx + i->src1.offset], src);
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e.EndOp(src);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8, src);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_I64C)) {
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e.mov(e.qword[e.rcx + i->src1.offset], i->src2.value->constant.i64);
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#if DTRACE
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e.mov(e.rdx, i->src1.offset);
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e.mov(e.r8, i->src2.value->constant.i64);
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CallNative(e, TraceContextStore);
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#endif // DTRACE
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} else if (i->Match(SIG_TYPE_X, SIG_TYPE_IGNORE, SIG_TYPE_F32)) {
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Xmm src;
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e.BeginOp(i->src2.value, src, 0);
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