170 lines
6.6 KiB
C
170 lines
6.6 KiB
C
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_PPC_STATE_H_
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#define XENIA_CPU_PPC_STATE_H_
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/**
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* NOTE: this file is included by xethunk and as such should have a *MINIMAL*
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* set of dependencies!
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*/
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#include <stdint.h>
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#ifdef XE_THUNK
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#define XECACHEALIGN __attribute__ ((aligned(8)))
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#define XECACHEALIGN64 __attribute__ ((aligned(64)))
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#endif
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// namespace FPRF {
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// enum FPRF_e {
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// QUIET_NAN = 0x00088000,
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// NEG_INFINITY = 0x00090000,
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// NEG_NORMALIZED = 0x00010000,
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// NEG_DENORMALIZED = 0x00018000,
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// NEG_ZERO = 0x00048000,
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// POS_ZERO = 0x00040000,
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// POS_DENORMALIZED = 0x00028000,
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// POS_NORMALIZED = 0x00020000,
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// POS_INFINITY = 0x000A0000,
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// };
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// } // FPRF
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#define kXEPPCRegLR 0xFFFF0001
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#define kXEPPCRegCTR 0xFFFF0002
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typedef struct XECACHEALIGN xe_float4 {
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union {
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struct {
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float x;
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float y;
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float z;
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float w;
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};
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float f4[4];
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struct {
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uint64_t low;
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uint64_t high;
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};
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};
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} xe_float4_t;
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typedef struct XECACHEALIGN64 xe_ppc_state {
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uint32_t cia; // Current PC (CIA)
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uint32_t nia; // Next PC (NIA)
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uint64_t xer; // XER register
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uint64_t lr; // Link register
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uint64_t ctr; // Count register
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uint64_t r[32]; // General purpose registers
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xe_float4_t v[128]; // VMX128 vector registers
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double f[32]; // Floating-point registers
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union {
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uint32_t value;
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struct {
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uint8_t lt :1; // Negative (LT) - result is negative
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uint8_t gt :1; // Positive (GT) - result is positive (and not zero)
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uint8_t eq :1; // Zero (EQ) - result is zero or a stwcx/stdcx completed successfully
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uint8_t so :1; // Summary Overflow (SO) - copy of XER[SO]
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} cr0;
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struct {
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uint8_t fx :1; // FP exception summary - copy of FPSCR[FX]
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uint8_t fex :1; // FP enabled exception summary - copy of FPSCR[FEX]
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uint8_t vx :1; // FP invalid operation exception summary - copy of FPSCR[VX]
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uint8_t ox :1; // FP overflow exception - copy of FPSCR[OX]
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} cr1;
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struct {
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uint8_t value :4;
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} cr2;
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struct {
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uint8_t value :4;
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} cr3;
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struct {
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uint8_t value :4;
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} cr4;
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struct {
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uint8_t value :4;
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} cr5;
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struct {
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uint8_t value :4;
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} cr6;
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struct {
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uint8_t value :4;
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} cr7;
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} cr; // Condition register
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union {
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uint32_t value;
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struct {
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uint8_t fx :1; // FP exception summary -- sticky
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uint8_t fex :1; // FP enabled exception summary
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uint8_t vx :1; // FP invalid operation exception summary
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uint8_t ox :1; // FP overflow exception -- sticky
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uint8_t ux :1; // FP underflow exception -- sticky
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uint8_t zx :1; // FP zero divide exception -- sticky
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uint8_t xx :1; // FP inexact exception -- sticky
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uint8_t vxsnan :1; // FP invalid op exception: SNaN -- sticky
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uint8_t vxisi :1; // FP invalid op exception: infinity - infinity -- sticky
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uint8_t vxidi :1; // FP invalid op exception: infinity / infinity -- sticky
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uint8_t vxzdz :1; // FP invalid op exception: 0 / 0 -- sticky
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uint8_t vximz :1; // FP invalid op exception: infinity * 0 -- sticky
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uint8_t vxvc :1; // FP invalid op exception: invalid compare -- sticky
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uint8_t fr :1; // FP fraction rounded
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uint8_t fi :1; // FP fraction inexact
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uint8_t fprf_c :1; // FP result class
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uint8_t fprf_lt :1; // FP result less than or negative (FL or <)
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uint8_t fprf_gt :1; // FP result greater than or positive (FG or >)
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uint8_t fprf_eq :1; // FP result equal or zero (FE or =)
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uint8_t fprf_un :1; // FP result unordered or NaN (FU or ?)
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uint8_t reserved :1;
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uint8_t vxsoft :1; // FP invalid op exception: software request -- sticky
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uint8_t vxsqrt :1; // FP invalid op exception: invalid sqrt -- sticky
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uint8_t vxcvi :1; // FP invalid op exception: invalid integer convert -- sticky
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uint8_t ve :1; // FP invalid op exception enable
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uint8_t oe :1; // IEEE floating-point overflow exception enable
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uint8_t ue :1; // IEEE floating-point underflow exception enable
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uint8_t ze :1; // IEEE floating-point zero divide exception enable
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uint8_t xe :1; // IEEE floating-point inexact exception enable
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uint8_t ni :1; // Floating-point non-IEEE mode
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uint8_t rn :2; // FP rounding control: 00 = nearest
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// 01 = toward zero
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// 10 = toward +infinity
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// 11 = toward -infinity
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} bits;
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} fpscr; // Floating-point status and control register
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// uint32_t get_fprf() {
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// return fpscr.value & 0x000F8000;
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// }
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// void set_fprf(const uint32_t v) {
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// fpscr.value = (fpscr.value & ~0x000F8000) | v;
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// }
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// Runtime-specific data pointer. Used on callbacks to get access to the
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// current runtime and its data.
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uint8_t* membase;
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void* processor;
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void* thread_state;
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void* runtime;
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void SetRegFromString(const char* name, const char* value);
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bool CompareRegWithString(const char* name, const char* value,
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char* out_value, size_t out_value_size);
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} xe_ppc_state_t;
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#endif // XENIA_CPU_PPC_STATE_H_
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