329 lines
8.2 KiB
C++
329 lines
8.2 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_PPC_INSTR_H_
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#define XENIA_CPU_PPC_INSTR_H_
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#include <xenia/common.h>
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#include <string>
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#include <vector>
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namespace xe {
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namespace cpu {
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namespace ppc {
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// TODO(benvanik): rename these
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typedef enum {
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kXEPPCInstrFormatI = 0,
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kXEPPCInstrFormatB = 1,
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kXEPPCInstrFormatSC = 2,
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kXEPPCInstrFormatD = 3,
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kXEPPCInstrFormatDS = 4,
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kXEPPCInstrFormatX = 5,
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kXEPPCInstrFormatXL = 6,
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kXEPPCInstrFormatXFX = 7,
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kXEPPCInstrFormatXFL = 8,
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kXEPPCInstrFormatXS = 9,
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kXEPPCInstrFormatXO = 10,
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kXEPPCInstrFormatA = 11,
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kXEPPCInstrFormatM = 12,
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kXEPPCInstrFormatMD = 13,
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kXEPPCInstrFormatMDS = 14,
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kXEPPCInstrFormatVA = 15,
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kXEPPCInstrFormatVX = 16,
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kXEPPCInstrFormatVXR = 17,
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} xe_ppc_instr_format_e;
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typedef enum {
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kXEPPCInstrTypeGeneral = (1 << 0),
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kXEPPCInstrTypeBranch = (1 << 1),
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kXEPPCInstrTypeBranchCond = kXEPPCInstrTypeBranch | (1 << 2),
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kXEPPCInstrTypeBranchAlways = kXEPPCInstrTypeBranch | (1 << 3),
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kXEPPCInstrTypeSyscall = (1 << 4),
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} xe_ppc_instr_type_e;
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typedef enum {
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kXEPPCInstrFlagReserved = 0,
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} xe_ppc_instr_flag_e;
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class InstrType;
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static inline int32_t XEEXTS16(uint32_t v) {
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return (int32_t)((int16_t)v);
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}
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static inline int32_t XEEXTS26(uint32_t v) {
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return v & 0x02000000 ? (int32_t)v | 0xFC000000 : (int32_t)(v);
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}
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static inline uint64_t XEMASK(uint32_t mstart, uint32_t mstop) {
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// if mstart ≤ mstop then
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// mask[mstart:mstop] = ones
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// mask[all other bits] = zeros
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// else
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// mask[mstart:63] = ones
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// mask[0:mstop] = ones
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// mask[all other bits] = zeros
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uint64_t value =
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(UINT64_MAX >> mstart) ^ ((mstop >= 63) ? 0 : UINT64_MAX >> (mstop + 1));
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return mstart <= mstop ? value : ~value;
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}
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typedef struct {
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InstrType* type;
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uint32_t address;
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union {
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uint32_t code;
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// kXEPPCInstrFormatI
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struct {
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uint32_t LK : 1;
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uint32_t AA : 1;
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uint32_t LI : 24;
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uint32_t : 6;
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} I;
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// kXEPPCInstrFormatB
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struct {
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uint32_t LK : 1;
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uint32_t AA : 1;
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uint32_t BD : 14;
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uint32_t BI : 5;
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uint32_t BO : 5;
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uint32_t : 6;
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} B;
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// kXEPPCInstrFormatSC
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// kXEPPCInstrFormatD
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struct {
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uint32_t DS : 16;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} D;
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// kXEPPCInstrFormatDS
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struct {
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uint32_t : 2;
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uint32_t DS : 14;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} DS;
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// kXEPPCInstrFormatX
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struct {
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uint32_t Rc : 1;
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uint32_t : 10;
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uint32_t RB : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} X;
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// kXEPPCInstrFormatXL
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struct {
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uint32_t LK : 1;
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uint32_t : 10;
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uint32_t BB : 5;
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uint32_t BI : 5;
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uint32_t BO : 5;
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uint32_t : 6;
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} XL;
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// kXEPPCInstrFormatXFX
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struct {
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uint32_t : 1;
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uint32_t : 10;
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uint32_t spr : 10;
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uint32_t RT : 5;
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uint32_t : 6;
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} XFX;
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// kXEPPCInstrFormatXFL
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// kXEPPCInstrFormatXS
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struct {
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uint32_t Rc : 1;
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uint32_t SH5 : 1;
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uint32_t : 9;
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uint32_t SH : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} XS;
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// kXEPPCInstrFormatXO
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struct {
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uint32_t Rc : 1;
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uint32_t : 9;
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uint32_t OE : 1;
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uint32_t RB : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} XO;
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// kXEPPCInstrFormatA
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// kXEPPCInstrFormatM
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struct {
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uint32_t Rc : 1;
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uint32_t ME : 5;
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uint32_t MB : 5;
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uint32_t SH : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} M;
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// kXEPPCInstrFormatMD
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struct {
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uint32_t Rc : 1;
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uint32_t SH5 : 1;
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uint32_t : 3;
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uint32_t MB5 : 1;
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uint32_t MB : 5;
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uint32_t SH : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} MD;
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// kXEPPCInstrFormatMDS
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struct {
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uint32_t Rc : 1;
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uint32_t : 4;
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uint32_t MB5 : 1;
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uint32_t MB : 5;
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uint32_t RB : 5;
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uint32_t RA : 5;
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uint32_t RT : 5;
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uint32_t : 6;
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} MDS;
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// kXEPPCInstrFormatVA
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// kXEPPCInstrFormatVX
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// kXEPPCInstrFormatVXR
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};
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} InstrData;
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typedef struct {
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enum RegisterSet {
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kXER,
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kLR,
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kCTR,
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kCR, // 0-7
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kFPSCR,
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kGPR, // 0-31
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kFPR, // 0-31
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kVMX, // 0-127
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};
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enum Access {
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kRead = 1 << 0,
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kWrite = 1 << 1,
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kReadWrite = kRead | kWrite,
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};
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RegisterSet set;
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uint32_t ordinal;
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Access access;
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} InstrRegister;
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typedef struct {
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enum OperandType {
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kRegister,
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kImmediate,
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};
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OperandType type;
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union {
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InstrRegister reg;
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struct {
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bool is_signed;
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uint64_t value;
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size_t width;
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} imm;
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};
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char display[32];
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} InstrOperand;
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class InstrAccessBits {
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public:
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InstrAccessBits() : spr(0), cr(0), gpr(0), fpr(0) {}
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// Bitmasks derived from the accesses to registers.
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// Format is 2 bits for each register, even bits indicating reads and odds
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// indicating writes.
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uint64_t spr; // fpcsr/ctr/lr/xer
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uint64_t cr; // cr7/6/5/4/3/2/1/0
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uint64_t gpr; // r31-0
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uint64_t fpr; // f31-0
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void Clear();
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void Extend(InstrAccessBits& other);
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void MarkAccess(InstrRegister& reg);
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void Dump(std::string& out_str);
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};
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class InstrDisasm {
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public:
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enum Flags {
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kOE = 1 << 0,
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kRc = 1 << 1,
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kCA = 1 << 2,
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kLR = 1 << 4,
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};
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char name[16];
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char info[64];
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std::vector<InstrOperand> operands;
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std::vector<InstrRegister> special_registers;
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InstrAccessBits access_bits;
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void Init(std::string name, std::string info, uint32_t flags);
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void AddLR(InstrRegister::Access access);
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void AddCTR(InstrRegister::Access access);
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void AddCR(uint32_t bf, InstrRegister::Access access);
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void AddRegOperand(InstrRegister::RegisterSet set, uint32_t ordinal,
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InstrRegister::Access access, std::string display = "");
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void AddSImmOperand(uint64_t value, size_t width, std::string display = "");
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void AddUImmOperand(uint64_t value, size_t width, std::string display = "");
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int Finish();
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void Dump(std::string& str, size_t pad = 8);
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};
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typedef int (*InstrDisassembleFn)(InstrData& i, InstrDisasm& d);
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typedef void* InstrEmitFn;
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class InstrType {
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public:
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uint32_t opcode;
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uint32_t format; // xe_ppc_instr_format_e
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uint32_t type; // xe_ppc_instr_type_e
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uint32_t flags; // xe_ppc_instr_flag_e
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char name[16];
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InstrDisassembleFn disassemble;
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InstrEmitFn emit;
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};
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InstrType* GetInstrType(uint32_t code);
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int RegisterInstrDisassemble(uint32_t code, InstrDisassembleFn disassemble);
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int RegisterInstrEmit(uint32_t code, InstrEmitFn emit);
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} // namespace ppc
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} // namespace cpu
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} // namespace xe
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#endif // XENIA_CPU_PPC_INSTR_H_
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