Commit Graph

6895 Commits

Author SHA1 Message Date
Triang3l 3b4845511d [Vulkan] Don't require an explicit uint64_t cast for SetDeviceObjectName 2022-06-20 12:25:52 +03:00
Triang3l 67ff108f53 [Vulkan] Explain why CreateShaderModule takes uint32_t* [ci skip] 2022-06-20 12:22:41 +03:00
Triang3l b61953374e [GPU] Make resolve EDRAM binding DS 0 and rename it
Ordering the descriptor sets by the change frequency on Vulkan, in increasing order (the opposite of D3D12 root signatures). The EDRAM binding never changes there (always one storage buffer), while the destination buffer binding may become changeable in the future (to split dispatches if exceeding `maxStorageBufferRange`, for example).
2022-06-20 12:15:52 +03:00
Triang3l 1200b205cf Merge branch 'master' into vulkan 2022-06-19 17:52:28 +03:00
Triang3l 9b83d3d0f4 [GPU] XeSL resolve shaders + host depth store width fix 2022-06-19 17:50:21 +03:00
Triang3l 166be463be [XeSL] Metal Shading Language definitions 2022-06-16 21:39:16 +03:00
Triang3l 127bf34264 [Vulkan] Trace dump tool 2022-06-13 13:03:02 +03:00
Triang3l ac268afbe9 [Vulkan] Fix 1<< uint32_t constants 2022-06-12 19:45:12 +03:00
Triang3l 140ed51e9a [GPU] Fix missing xenia-ui dependency in gpu > gpu-shader-compiler (needed for gmake2) 2022-06-12 19:44:24 +03:00
Triang3l 17c835b245 Merge branch 'master' into vulkan 2022-06-12 18:51:08 +03:00
Triang3l 820b7ba217 [GPU] Fix GetActiveTextureHostSwizzle return type 2022-06-12 18:50:38 +03:00
Triang3l 1a22216e44 [SPIR-V] Texture fetch instructions 2022-06-09 21:42:16 +03:00
Triang3l f875a8d887 Merge branch 'master' into vulkan 2022-06-09 21:35:12 +03:00
Triang3l 78d1eb8bf8 [GPU] TextureCache::GetActiveTextureHostSwizzle 2022-06-09 21:34:21 +03:00
Triang3l 56f72da137 [GPU] More exact PWL texture/RT gamma conversion 2022-06-07 21:26:34 +03:00
Triang3l a8cfe9bebb [Vulkan] Unsubsample odd-sized 4:2:2 textures 2022-06-02 23:10:50 +03:00
Triang3l 1ce45ee150 Merge branch 'master' into vulkan 2022-06-02 22:50:14 +03:00
Triang3l 55a91afcc7 [D3D12] Don't decompress unaligned BC textures if supported 2022-06-02 22:48:03 +03:00
Triang3l 84fcd5defa [GPU] Fix resolve destination offset and extent calculation 2022-06-02 21:47:30 +03:00
Triang3l a9a072bf00 [GPU] Explain why a 32x32x4bpp linear texture takes 2 pages, not 1 [ci skip] 2022-06-01 13:00:23 +03:00
Triang3l 8bd244f277 [GPU] Better explanation for exact texture memory extent calculation [ci skip] 2022-06-01 12:55:16 +03:00
Triang3l d1ad10b98c [GPU] Primitive reset comment typo correction [ci skip] 2022-05-31 23:23:53 +03:00
Triang3l efd7ef212a [D3D12] 128 megatexel limit explanation based on the spec [ci skip] 2022-05-31 23:23:10 +03:00
Triang3l 25594c918c [GPU] Fix tiled texture memory extent calculation 2022-05-31 23:17:33 +03:00
Rick Gibbed a3e5ea8575
[Base] Fix missing include in utf8.cc. 2022-05-27 17:56:14 -05:00
Triang3l 6c9a06b2da [Vulkan] Texture loading 2022-05-24 22:42:22 +03:00
Triang3l 9c445d397b [Vulkan] Fix single-type descriptor pool reuse 2022-05-24 22:37:49 +03:00
Triang3l aac28f19d1 Merge branch 'master' into vulkan 2022-05-24 22:34:40 +03:00
Triang3l a4840e1992 [GPU] FIXME comment for 1bpb/2bpb texture tiled extent 2022-05-24 22:33:27 +03:00
Triang3l 8701c9f24e [D3D12] Texture load code cleanup and resolution scaling fixes
The resolution scale is now taken into account when copying from the mip tail.
2022-05-24 22:28:42 +03:00
Triang3l 75c185e759 [GPU] Move texture load shader info to common 2022-05-24 22:24:33 +03:00
Triang3l f994d3ebb3 [Vulkan] Single block-compressed flag for host texture formats, not block sizes 2022-05-23 13:27:43 +03:00
Triang3l f7b0edee6b [Vulkan] GBGR/BGRG decompression 2022-05-23 13:18:47 +03:00
Triang3l 4c2f8764d6 Merge branch 'master' into vulkan 2022-05-23 12:36:35 +03:00
Triang3l c1f15c86a3 [GPU] Decompress GBGR/BGRG into RGBB, not RGB1
While the alpha of the texture data is not used at all (replaced with blue using the view swizzle), still make the shader code state the intention more explicitly if the format is decompressed for use as signed. Unsigned 1.0 is 0xFF, while signed 1.0 is 0x7F.
2022-05-23 12:31:45 +03:00
Triang3l cf3069eb13 [GPU] Signedness in Cr_Y1_Cb_Y0_REP/Y1_Cr_Y0_Cb_REP comment [ci skip] 2022-05-22 22:11:59 +03:00
Triang3l ef808e9def [GPU] _REP explanation in Cr_Y1_Cb_Y0_REP/Y1_Cr_Y0_Cb_REP comment [ci skip] 2022-05-22 21:46:11 +03:00
Triang3l 6735dbd941 [GPU] Calculate, not store, texture load host X blocks per thread 2022-05-22 21:21:54 +03:00
Triang3l 888d5044e0 [GPU] 2x1-subsampled texture RGBA8 conversion shader 2022-05-22 21:07:38 +03:00
Triang3l d3561d2f47 [D3D12] Pre-swizzle 2x1-subsampled formats 2022-05-22 20:31:48 +03:00
Triang3l 5de825e3a0 [GPU] Prevent multiple evaluation of XE_TEXTURE_LOAD_TRANSFORM arguments 2022-05-22 19:48:23 +03:00
Triang3l 2f0a884438 [GPU] Add k prefix to texture load group size constants 2022-05-22 19:35:25 +03:00
Triang3l 8f06ba6f7d [D3D12] Texture host BPB in LoadModeInfo 2022-05-22 19:28:05 +03:00
Triang3l 003c62ba73 [GPU] Correct rounding of texture load row size
The original multiplication was likely added early during the development of generic resolution scaling. Before generic resolution scaling, invocations were done for unscaled guest blocks, now they're done for scaled blocks, so with 3x1 scaling, an invocation for 8 blocks writes 8 host blocks, not 24.
2022-05-22 18:33:59 +03:00
Triang3l 6aa30ed074 [GPU] 128-thread groups in all texture load shaders
Vulkan's minimum requirement (maxComputeWorkGroupInvocations) is 128.
2022-05-22 18:03:09 +03:00
Triang3l 91c4e02e96 [Vulkan] Implement ClearCaches and don't do it for pipelines 2022-05-22 15:05:15 +03:00
Triang3l 35cfb07967 Merge branch 'master' into vulkan 2022-05-22 14:56:44 +03:00
Triang3l 88784101c8 [D3D12] Remove PipelineCache::ClearCache leftovers 2022-05-22 14:56:22 +03:00
Triang3l 68e7c56918 Merge branch 'master' into vulkan 2022-05-22 14:47:20 +03:00
Triang3l d31ddd9b23 [GPU] Remove PipelineCache::ClearCache 2022-05-22 14:46:03 +03:00