From a191fbcf3480bfe6ea88ff5ede5f7e722ea94730 Mon Sep 17 00:00:00 2001 From: "Dr. Chat" Date: Sun, 16 Aug 2015 19:56:03 -0500 Subject: [PATCH] Tests: vaddfp/vaddfp128/vmsum3fp128/vsubfp/vsubfp128 --- src/xenia/cpu/frontend/testing/instr_vaddfp.s | 9 +++++++++ src/xenia/cpu/frontend/testing/instr_vaddfp128.s | 10 ++++++++++ src/xenia/cpu/frontend/testing/instr_vmsum3fp128.s | 10 ++++++++++ src/xenia/cpu/frontend/testing/instr_vsubfp.s | 9 +++++++++ src/xenia/cpu/frontend/testing/instr_vsubfp128.s | 10 ++++++++++ 5 files changed, 48 insertions(+) create mode 100644 src/xenia/cpu/frontend/testing/instr_vaddfp.s create mode 100644 src/xenia/cpu/frontend/testing/instr_vaddfp128.s create mode 100644 src/xenia/cpu/frontend/testing/instr_vmsum3fp128.s create mode 100644 src/xenia/cpu/frontend/testing/instr_vsubfp.s create mode 100644 src/xenia/cpu/frontend/testing/instr_vsubfp128.s diff --git a/src/xenia/cpu/frontend/testing/instr_vaddfp.s b/src/xenia/cpu/frontend/testing/instr_vaddfp.s new file mode 100644 index 000000000..d7cfdcae5 --- /dev/null +++ b/src/xenia/cpu/frontend/testing/instr_vaddfp.s @@ -0,0 +1,9 @@ +test_vaddfp_1: + # v3 = [10.0, -10.0, 15.0, -15.0] + # v4 = [-10.0, 20.0, -20.0, 30.0] + #_ REGISTER_IN v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_IN v4 [C1200000, 41A00000, C1A00000, 41F00000] + vaddfp v3, v3, v4 + blr + #_ REGISTER_OUT v3 [00000000, 41200000, C0A00000, 41700000] + #_ REGISTER_OUT v4 [C1200000, 41A00000, C1A00000, 41F00000] diff --git a/src/xenia/cpu/frontend/testing/instr_vaddfp128.s b/src/xenia/cpu/frontend/testing/instr_vaddfp128.s new file mode 100644 index 000000000..9972760c0 --- /dev/null +++ b/src/xenia/cpu/frontend/testing/instr_vaddfp128.s @@ -0,0 +1,10 @@ +test_vaddfp128_1: + # v3 = [10.0, -10.0, 15.0, -15.0] + # v4 = [-10.0, 20.0, -20.0, 30.0] + #_ REGISTER_IN v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_IN v4 [C1200000, 41A00000, C1A00000, 41F00000] + vaddfp128 v0, v3, v4 + blr + #_ REGISTER_OUT v0 [00000000, 41200000, C0A00000, 41700000] + #_ REGISTER_OUT v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_OUT v4 [C1200000, 41A00000, C1A00000, 41F00000] diff --git a/src/xenia/cpu/frontend/testing/instr_vmsum3fp128.s b/src/xenia/cpu/frontend/testing/instr_vmsum3fp128.s new file mode 100644 index 000000000..f88cf8a6c --- /dev/null +++ b/src/xenia/cpu/frontend/testing/instr_vmsum3fp128.s @@ -0,0 +1,10 @@ +test_vmsum3fp128_1: + # v3 = [1.0, 1.5, 1.1, 0.0] + # v4 = [2.0, 3.75, 2.31, 0.0] + #_ REGISTER_IN v3 [3f800000, 3fc00000, 3f8ccccd, 01020304] + #_ REGISTER_IN v4 [40000000, 40700000, 4013d70a, 01020304] + vmsum3fp128 v5, v3, v4 + blr + #_ REGISTER_OUT v3 [3f800000, 3fc00000, 3f8ccccd, 01020304] + #_ REGISTER_OUT v4 [40000000, 40700000, 4013d70a, 01020304] + #_ REGISTER_OUT v5 [4122A7F0, 4122A7F0, 4122A7F0, 4122A7F0] diff --git a/src/xenia/cpu/frontend/testing/instr_vsubfp.s b/src/xenia/cpu/frontend/testing/instr_vsubfp.s new file mode 100644 index 000000000..0aadf5cf0 --- /dev/null +++ b/src/xenia/cpu/frontend/testing/instr_vsubfp.s @@ -0,0 +1,9 @@ +test_vsubfp_1: + # v3 = [10.0, -10.0, 15.0, -15.0] + # v4 = [-10.0, 20.0, -20.0, 30.0] + #_ REGISTER_IN v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_IN v4 [C1200000, 41A00000, C1A00000, 41F00000] + vsubfp v3, v3, v4 + blr + #_ REGISTER_OUT v3 [41A00000, C1F00000, 420C0000, C2340000] + #_ REGISTER_OUT v4 [C1200000, 41A00000, C1A00000, 41F00000] diff --git a/src/xenia/cpu/frontend/testing/instr_vsubfp128.s b/src/xenia/cpu/frontend/testing/instr_vsubfp128.s new file mode 100644 index 000000000..33c01ede0 --- /dev/null +++ b/src/xenia/cpu/frontend/testing/instr_vsubfp128.s @@ -0,0 +1,10 @@ +test_vsubfp128_1: + # v3 = [10.0, -10.0, 15.0, -15.0] + # v4 = [-10.0, 20.0, -20.0, 30.0] + #_ REGISTER_IN v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_IN v4 [C1200000, 41A00000, C1A00000, 41F00000] + vsubfp128 v0, v3, v4 + blr + #_ REGISTER_OUT v0 [41A00000, C1F00000, 420C0000, C2340000] + #_ REGISTER_OUT v3 [41200000, C1200000, 41700000, C1700000] + #_ REGISTER_OUT v4 [C1200000, 41A00000, C1A00000, 41F00000]