load_acquire/store_release
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2549292a57
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ec4bf50363
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@ -39,10 +39,13 @@ int IVMFunction::CallImpl(ThreadState* thread_state, uint64_t return_address) {
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size_t register_file_size = register_count_ * sizeof(Register);
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Register* register_file = (Register*)alloca(register_file_size);
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Memory* memory = thread_state->memory();
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IntCodeState ics;
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ics.rf = register_file;
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ics.context = (uint8_t*)thread_state->raw_context();
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ics.membase = thread_state->memory()->membase();
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ics.membase = memory->membase();
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ics.reserve_address = memory->reserve_address();
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ics.did_carry = 0;
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ics.access_callbacks = thread_state->runtime()->access_callbacks();
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ics.thread_state = thread_state;
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@ -1246,6 +1246,61 @@ int Translate_LOAD(TranslationContext& ctx, Instr* i) {
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return DispatchToC(ctx, i, fns[i->dest->type]);
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}
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uint32_t IntCode_LOAD_ACQUIRE_I8(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].i8 = *((int8_t*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_I16(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].i16 = *((int16_t*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_I32(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].i32 = *((int32_t*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_I64(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].i64 = *((int64_t*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_F32(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].f32 = *((float*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_F64(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].f64 = *((double*)(ics.membase + address));
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return IA_NEXT;
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}
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uint32_t IntCode_LOAD_ACQUIRE_V128(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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xe_atomic_exchange_32(address, ics.reserve_address);
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ics.rf[i->dest_reg].v128 = *((vec128_t*)(ics.membase + (address & ~0xF)));
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return IA_NEXT;
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}
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int Translate_LOAD_ACQUIRE(TranslationContext& ctx, Instr* i) {
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static IntCodeFn fns[] = {
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IntCode_LOAD_ACQUIRE_I8,
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IntCode_LOAD_ACQUIRE_I16,
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IntCode_LOAD_ACQUIRE_I32,
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IntCode_LOAD_ACQUIRE_I64,
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IntCode_LOAD_ACQUIRE_F32,
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IntCode_LOAD_ACQUIRE_F64,
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IntCode_LOAD_ACQUIRE_V128,
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};
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return DispatchToC(ctx, i, fns[i->dest->type]);
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}
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uint32_t IntCode_STORE_I8(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
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@ -1331,6 +1386,89 @@ int Translate_STORE(TranslationContext& ctx, Instr* i) {
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return DispatchToC(ctx, i, fns[i->src2.value->type]);
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}
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uint32_t IntCode_STORE_RELEASE_I8(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((int8_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i8;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_I16(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((int16_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i16;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_I32(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((int32_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i32;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_I64(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((int64_t*)(ics.membase + address)) = ics.rf[i->src2_reg].i64;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_F32(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((float*)(ics.membase + address)) = ics.rf[i->src2_reg].f32;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_F64(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((double*)(ics.membase + address)) = ics.rf[i->src2_reg].f64;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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uint32_t IntCode_STORE_RELEASE_V128(IntCodeState& ics, const IntCode* i) {
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uint32_t address = ics.rf[i->src1_reg].u32;
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int8_t stored = 0;
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if (xe_atomic_exchange_32(0, ics.reserve_address) == address) {
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*((vec128_t*)(ics.membase + (address & ~0xF))) = ics.rf[i->src2_reg].v128;
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stored = 1;
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}
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ics.rf[i->dest_reg].i8 = stored;
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return IA_NEXT;
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}
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int Translate_STORE_RELEASE(TranslationContext& ctx, Instr* i) {
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static IntCodeFn fns[] = {
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IntCode_STORE_RELEASE_I8,
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IntCode_STORE_RELEASE_I16,
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IntCode_STORE_RELEASE_I32,
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IntCode_STORE_RELEASE_I64,
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IntCode_STORE_RELEASE_F32,
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IntCode_STORE_RELEASE_F64,
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IntCode_STORE_RELEASE_V128,
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};
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return DispatchToC(ctx, i, fns[i->src2.value->type]);
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}
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uint32_t IntCode_PREFETCH(IntCodeState& ics, const IntCode* i) {
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return IA_NEXT;
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}
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@ -2865,9 +3003,9 @@ static const TranslateFn dispatch_table[] = {
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Translate_STORE_CONTEXT,
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Translate_LOAD,
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TranslateInvalid, //Translate_LOAD_ACQUIRE,
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Translate_LOAD_ACQUIRE,
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Translate_STORE,
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TranslateInvalid, //Translate_STORE_RELEASE,
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Translate_STORE_RELEASE,
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Translate_PREFETCH,
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TranslateInvalid, //Translate_MAX,
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@ -43,6 +43,7 @@ typedef struct {
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Register* rf;
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uint8_t* context;
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uint8_t* membase;
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uint32_t* reserve_address;
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int8_t did_carry;
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runtime::RegisterAccessCallbacks* access_callbacks;
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runtime::ThreadState* thread_state;
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@ -32,6 +32,7 @@ public:
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inline uint8_t* Translate(uint64_t guest_address) const {
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return membase_ + guest_address;
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};
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inline uint32_t* reserve_address() { return &reserve_address_; }
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virtual int Initialize();
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@ -53,6 +54,7 @@ public:
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protected:
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size_t system_page_size_;
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uint8_t* membase_;
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uint32_t reserve_address_;
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};
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