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Show relative constant fetch in the microcode disassembler

This commit is contained in:
Dan Weatherford 2015-11-11 17:10:46 -06:00
parent 2fda17cf3c
commit dca0ab38d5
1 changed files with 18 additions and 8 deletions
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26
src/xenia/gpu/ucode_disassembler.cc
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@ -76,7 +76,7 @@ static const char chan_names[] = {
}; };
void print_srcreg(StringBuffer* output, uint32_t num, uint32_t type, void print_srcreg(StringBuffer* output, uint32_t num, uint32_t type,
uint32_t swiz, uint32_t negate, uint32_t abs_constants, uint32_t swiz, uint32_t negate, uint32_t abs_constants, bool const_rel,
ShaderType shader_type) { ShaderType shader_type) {
if (negate) { if (negate) {
output->Append('-'); output->Append('-');
@ -94,7 +94,13 @@ void print_srcreg(StringBuffer* output, uint32_t num, uint32_t type,
output->Append('|'); output->Append('|');
} }
num += shader_type == ShaderType::kPixel ? 256 : 0; num += shader_type == ShaderType::kPixel ? 256 : 0;
output->AppendFormat("C%u", num);
if (const_rel) {
output->AppendFormat("C[%u + a0]", num);
} else {
output->AppendFormat("C%u", num);
}
if (abs_constants) { if (abs_constants) {
output->Append('|'); output->Append('|');
} }
@ -272,15 +278,19 @@ int disasm_alu(StringBuffer* output, const uint32_t* dwords, uint32_t alu_off,
output->Append(" = "); output->Append(" = ");
if (vector_instructions[alu->vector_opc].num_srcs == 3) { if (vector_instructions[alu->vector_opc].num_srcs == 3) {
print_srcreg(output, alu->src3_reg, alu->src3_sel, alu->src3_swiz, print_srcreg(output, alu->src3_reg, alu->src3_sel, alu->src3_swiz,
alu->src3_reg_negate, alu->abs_constants, type); alu->src3_reg_negate, alu->abs_constants, false, type);
output->Append(", "); output->Append(", ");
} }
bool const_rel = alu->const_0_rel_abs && alu->relative_addr;
print_srcreg(output, alu->src1_reg, alu->src1_sel, alu->src1_swiz, print_srcreg(output, alu->src1_reg, alu->src1_sel, alu->src1_swiz,
alu->src1_reg_negate, alu->abs_constants, type); alu->src1_reg_negate, alu->abs_constants, const_rel, type);
if (vector_instructions[alu->vector_opc].num_srcs > 1) { if (vector_instructions[alu->vector_opc].num_srcs > 1) {
if (alu->src1_sel == 0) {
const_rel = alu->const_1_rel_abs && alu->relative_addr;
}
output->Append(", "); output->Append(", ");
print_srcreg(output, alu->src2_reg, alu->src2_sel, alu->src2_swiz, print_srcreg(output, alu->src2_reg, alu->src2_sel, alu->src2_swiz,
alu->src2_reg_negate, alu->abs_constants, type); alu->src2_reg_negate, alu->abs_constants, const_rel, type);
} }
if (alu->vector_clamp) { if (alu->vector_clamp) {
@ -321,17 +331,17 @@ int disasm_alu(StringBuffer* output, const uint32_t* dwords, uint32_t alu_off,
uint32_t swiz_a = ((src3_swiz >> 6) - 1) & 0x3; uint32_t swiz_a = ((src3_swiz >> 6) - 1) & 0x3;
uint32_t swiz_b = (src3_swiz & 0x3); uint32_t swiz_b = (src3_swiz & 0x3);
print_srcreg(output, alu->src3_reg, 0, 0, alu->src3_reg_negate, print_srcreg(output, alu->src3_reg, 0, 0, alu->src3_reg_negate,
alu->abs_constants, type); alu->abs_constants, false, type);
output->AppendFormat(".%c", chan_names[swiz_a]); output->AppendFormat(".%c", chan_names[swiz_a]);
output->Append(", "); output->Append(", ");
uint32_t reg2 = (alu->scalar_opc & 1) | (alu->src3_swiz & 0x3C) | uint32_t reg2 = (alu->scalar_opc & 1) | (alu->src3_swiz & 0x3C) |
(alu->src3_sel << 1); (alu->src3_sel << 1);
print_srcreg(output, reg2, 1, 0, alu->src3_reg_negate, alu->abs_constants, print_srcreg(output, reg2, 1, 0, alu->src3_reg_negate, alu->abs_constants,
type); false, type);
output->AppendFormat(".%c", chan_names[swiz_b]); output->AppendFormat(".%c", chan_names[swiz_b]);
} else { } else {
print_srcreg(output, alu->src3_reg, alu->src3_sel, alu->src3_swiz, print_srcreg(output, alu->src3_reg, alu->src3_sel, alu->src3_swiz,
alu->src3_reg_negate, alu->abs_constants, type); alu->src3_reg_negate, alu->abs_constants, false, type);
} }
if (alu->scalar_clamp) { if (alu->scalar_clamp) {
output->Append(" CLAMP"); output->Append(" CLAMP");