diff --git a/src/xenia/cpu/backend/x64/x64_emitter.cc b/src/xenia/cpu/backend/x64/x64_emitter.cc index 03b8b4abd..3ba47cad4 100644 --- a/src/xenia/cpu/backend/x64/x64_emitter.cc +++ b/src/xenia/cpu/backend/x64/x64_emitter.cc @@ -405,9 +405,10 @@ void X64Emitter::EmitProfilerEpilogue() { if (cvars::instrument_call_times) { uint64_t* profiler_entry = backend()->GetProfilerRecordForFunction(current_guest_function_); + mov(ecx, 0x7ffe0014); mov(rdx, qword[rcx]); - mov(rbx, (uintptr_t)profiler_entry); + mov(r10, (uintptr_t)profiler_entry); sub(rdx, qword[rsp + StackLayout::GUEST_PROFILER_START]); // atomic add our time to the profiler entry @@ -416,7 +417,8 @@ void X64Emitter::EmitProfilerEpilogue() { // this a few cycles less intrusive, but its good enough for now // actually... lets just try without atomics lol // lock(); - add(qword[rbx], rdx); + add(qword[r10], rdx); + } #endif } diff --git a/src/xenia/cpu/hir/hir_builder.cc b/src/xenia/cpu/hir/hir_builder.cc index d89b954fb..286a19845 100644 --- a/src/xenia/cpu/hir/hir_builder.cc +++ b/src/xenia/cpu/hir/hir_builder.cc @@ -1872,26 +1872,24 @@ Value* HIRBuilder::AndNot(Value* value1, Value* value2) { ASSERT_NON_FLOAT_TYPE(value1); ASSERT_NON_FLOAT_TYPE(value2); ASSERT_TYPES_EQUAL(value1, value2); -// e.andn(i.dest.reg().cvt64(), i.src2.reg().cvt64(), temp.cvt64()); -#if 1 + //only other type it can be used with is INT64_TYPE (andc) + if (value1->type != VEC128_TYPE) { + return this->And(this->Not(value2), value1); + } else { + if (value1 == value2) { + return LoadZero(value1->type); + } else if (value1->IsConstantZero()) { + return value1; + } else if (value2->IsConstantZero()) { + return value1; + } - return this->And(this->Not(value2), value1); - -#else - if (value1 == value2) { - return LoadZero(value1->type); - } else if (value1->IsConstantZero()) { - return value1; - } else if (value2->IsConstantZero()) { - return value1; + Instr* i = AppendInstr(OPCODE_AND_NOT_info, 0, AllocValue(value1->type)); + i->set_src1(value1); + i->set_src2(value2); + i->src3.value = NULL; + return i->dest; } - - Instr* i = AppendInstr(OPCODE_AND_NOT_info, 0, AllocValue(value1->type)); - i->set_src1(value1); - i->set_src2(value2); - i->src3.value = NULL; - return i->dest; -#endif } Value* HIRBuilder::Or(Value* value1, Value* value2) { diff --git a/src/xenia/gpu/d3d12/d3d12_command_processor.cc b/src/xenia/gpu/d3d12/d3d12_command_processor.cc index c4ad41fda..9f00648b0 100644 --- a/src/xenia/gpu/d3d12/d3d12_command_processor.cc +++ b/src/xenia/gpu/d3d12/d3d12_command_processor.cc @@ -4877,7 +4877,7 @@ bool D3D12CommandProcessor::UpdateBindings_BindfulPath( bool& retflag) { retflag = true; auto& provider = this->GetD3D12Provider(); - size_t texture_count_pixel = textures_pixel->size(); + size_t texture_count_pixel = textures_pixel ? textures_pixel->size() : 0; size_t texture_count_vertex = textures_vertex.size(); // // Bindful descriptors path.