Tests for vmrg* (broken! woo!)

src/alloy/frontend/ppc/test/bin/instr_vmrghb.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrghb.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrghb_1>:
+  100000:	10 a3 20 0c 	vmrghb  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrghb.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrghb_1

src/alloy/frontend/ppc/test/bin/instr_vmrghh.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrghh.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrghh_1>:
+  100000:	10 a3 20 4c 	vmrghh  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrghh.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrghh_1

src/alloy/frontend/ppc/test/bin/instr_vmrghw.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrghw.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrghw_1>:
+  100000:	10 a3 20 8c 	vmrghw  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrghw.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrghw_1

src/alloy/frontend/ppc/test/bin/instr_vmrglb.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrglb.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrglb_1>:
+  100000:	10 a3 21 0c 	vmrglb  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrglb.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrglb_1

src/alloy/frontend/ppc/test/bin/instr_vmrglh.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrglh.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrglh_1>:
+  100000:	10 a3 21 4c 	vmrglh  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrglh.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrglh_1

src/alloy/frontend/ppc/test/bin/instr_vmrglw.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/alloy/frontend/ppc/test/bin//instr_vmrglw.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_vmrglw_1>:
+  100000:	10 a3 21 8c 	vmrglw  v5,v3,v4
+  100004:	4e 80 00 20 	blr

src/alloy/frontend/ppc/test/bin/instr_vmrglw.map

@@ -0,0 +1 @@
+0000000000000000 t test_vmrglw_1

src/alloy/frontend/ppc/test/bin/instr_vrlimi128.dis

@@ -13,7 +13,7 @@ Disassembly of section .text:
   10000c:	4e 80 00 20 	blr
 
 0000000000100010 <test_vrlimi128_3>:
-  100010:	1b 2f d7 55 	vrlimi128 v57,v58,15,0
+  100010:	18 8f 1f 50 	vrlimi128 v4,v3,15,0
   100014:	4e 80 00 20 	blr
 
 0000000000100018 <test_vrlimi128_4>:
@@ -21,7 +21,7 @@ Disassembly of section .text:
   10001c:	4e 80 00 20 	blr
 
 0000000000100020 <test_vrlimi128_5>:
-  100020:	1a ef c7 d5 	vrlimi128 v55,v56,15,2
+  100020:	18 8f 1f d0 	vrlimi128 v4,v3,15,2
   100024:	4e 80 00 20 	blr
 
 0000000000100028 <test_vrlimi128_6>:

src/alloy/frontend/ppc/test/instr_vmrghb.s

@@ -0,0 +1,8 @@
+test_vmrghb_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrghb v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [00100111, 02120313, 04140515, 06160717]

src/alloy/frontend/ppc/test/instr_vmrghh.s

@@ -0,0 +1,8 @@
+test_vmrghh_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrghh v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [00011011, 02031213, 04051415, 06071617]

src/alloy/frontend/ppc/test/instr_vmrghw.s

@@ -0,0 +1,8 @@
+test_vmrghw_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrghw v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [00010203, 10111213, 04050607, 14151617]

src/alloy/frontend/ppc/test/instr_vmrglb.s

@@ -0,0 +1,8 @@
+test_vmrglb_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrglb v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [08180919, 0a1a0b1b, 0c1c0d1d, 0e1e0f1f]

src/alloy/frontend/ppc/test/instr_vmrglh.s

@@ -0,0 +1,8 @@
+test_vmrglh_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrglh v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [08091819, 0a0b1a1b, 0c0d1c1d, 0e0f1e1f]

src/alloy/frontend/ppc/test/instr_vmrglw.s

@@ -0,0 +1,8 @@
+test_vmrglw_1:
+  #_ REGISTER_IN v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_IN v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  vmrglw v5, v3, v4
+  blr
+  #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F]
+  #_ REGISTER_OUT v4 [10111213, 14151617, 18191A1B, 1C1D1E1F]
+  #_ REGISTER_OUT v5 [08090a0b, 18191a1b, 0c0d0e0f, 1c1d1e1f]