[SPIR-V] tfetch UseRegisterLOD support
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@ -111,6 +111,8 @@ void SpirvShaderTranslator::StartTranslation() {
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"pc");
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a0_ = b.createVariable(spv::StorageClass::StorageClassFunction, int_type_,
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"a0");
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lod_ = b.createVariable(spv::StorageClass::StorageClassFunction, float_type_,
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"lod");
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// Uniform constants.
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Id float_consts_type =
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@ -1843,6 +1845,10 @@ void SpirvShaderTranslator::ProcessTextureFetchInstruction(
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spv::Builder::TextureParameters params = {0};
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params.coords = src;
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params.sampler = texture;
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if (instr.attributes.use_register_lod) {
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params.lod = b.createLoad(lod_);
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}
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dest =
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b.createTextureCall(spv::NoPrecision, vec4_float_type_, false, false,
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false, false, is_vertex_shader(), params);
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@ -1906,6 +1912,7 @@ void SpirvShaderTranslator::ProcessTextureFetchInstruction(
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// <lod register> = src1.x (MIP level)
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// ... immediately after
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// tfetch UseRegisterLOD=true
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b.createStore(b.createCompositeExtract(src, float_type_, 0), lod_);
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} break;
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default:
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@ -149,6 +149,7 @@ class SpirvShaderTranslator : public ShaderTranslator {
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spv::Id loop_count_ = 0; // Loop counter stack
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spv::Id ps_ = 0, pv_ = 0; // IDs of previous results
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spv::Id pc_ = 0; // Program counter
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spv::Id lod_ = 0; // LOD register
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spv::Id pos_ = 0;
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spv::Id push_consts_ = 0;
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spv::Id interpolators_ = 0;
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