[D3D12] 32bpp raw resolve shader
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@ -37,6 +37,7 @@ namespace d3d12 {
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_color_7e3_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_color_7e3_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_depth_float_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_depth_float_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_depth_unorm_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_store_depth_unorm_cs.h"
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#include "xenia/gpu/d3d12/shaders/bin/edram_tile_sample_32bpp_cs.h"
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const RenderTargetCache::EDRAMLoadStoreModeInfo
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const RenderTargetCache::EDRAMLoadStoreModeInfo
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RenderTargetCache::edram_load_store_mode_info_[size_t(
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RenderTargetCache::edram_load_store_mode_info_[size_t(
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@ -169,7 +170,7 @@ bool RenderTargetCache::Initialize() {
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pipeline_desc.CS.BytecodeLength = mode_info.load_shader_size;
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pipeline_desc.CS.BytecodeLength = mode_info.load_shader_size;
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if (FAILED(device->CreateComputePipelineState(
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if (FAILED(device->CreateComputePipelineState(
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&pipeline_desc, IID_PPV_ARGS(&edram_load_pipelines_[i])))) {
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&pipeline_desc, IID_PPV_ARGS(&edram_load_pipelines_[i])))) {
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XELOGE("Failed to create EDRAM load pipeline for mode %u", i);
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XELOGE("Failed to create the EDRAM load pipeline for mode %u", i);
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Shutdown();
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Shutdown();
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return false;
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return false;
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}
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}
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@ -179,12 +180,22 @@ bool RenderTargetCache::Initialize() {
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pipeline_desc.CS.BytecodeLength = mode_info.store_shader_size;
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pipeline_desc.CS.BytecodeLength = mode_info.store_shader_size;
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if (FAILED(device->CreateComputePipelineState(
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if (FAILED(device->CreateComputePipelineState(
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&pipeline_desc, IID_PPV_ARGS(&edram_store_pipelines_[i])))) {
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&pipeline_desc, IID_PPV_ARGS(&edram_store_pipelines_[i])))) {
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XELOGE("Failed to create EDRAM store pipeline for mode %u", i);
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XELOGE("Failed to create the EDRAM store pipeline for mode %u", i);
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Shutdown();
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Shutdown();
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return false;
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return false;
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}
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}
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edram_store_pipelines_[i]->SetName(mode_info.store_pipeline_name);
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edram_store_pipelines_[i]->SetName(mode_info.store_pipeline_name);
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}
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}
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// Tile single sample into a texture - 32 bits per pixel.
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pipeline_desc.CS.pShaderBytecode = edram_tile_sample_32bpp_cs;
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pipeline_desc.CS.BytecodeLength = sizeof(edram_tile_sample_32bpp_cs);
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if (FAILED(device->CreateComputePipelineState(
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&pipeline_desc, IID_PPV_ARGS(&edram_tile_sample_32bpp_pipeline_)))) {
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XELOGE("Failed to create the 32bpp EDRAM raw resolve pipeline");
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Shutdown();
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return false;
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}
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edram_tile_sample_32bpp_pipeline_->SetName(L"EDRAM Raw Resolve 32bpp");
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return true;
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return true;
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}
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}
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@ -192,6 +203,10 @@ bool RenderTargetCache::Initialize() {
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void RenderTargetCache::Shutdown() {
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void RenderTargetCache::Shutdown() {
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ClearCache();
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ClearCache();
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if (edram_tile_sample_32bpp_pipeline_ != nullptr) {
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edram_tile_sample_32bpp_pipeline_->Release();
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edram_tile_sample_32bpp_pipeline_ = nullptr;
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}
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for (uint32_t i = 0; i < uint32_t(EDRAMLoadStoreMode::kCount); ++i) {
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for (uint32_t i = 0; i < uint32_t(EDRAMLoadStoreMode::kCount); ++i) {
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if (edram_load_pipelines_[i] != nullptr) {
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if (edram_load_pipelines_[i] != nullptr) {
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edram_load_pipelines_[i]->Release();
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edram_load_pipelines_[i]->Release();
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@ -404,6 +404,7 @@ class RenderTargetCache {
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edram_load_pipelines_[size_t(EDRAMLoadStoreMode::kCount)] = {};
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edram_load_pipelines_[size_t(EDRAMLoadStoreMode::kCount)] = {};
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ID3D12PipelineState*
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ID3D12PipelineState*
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edram_store_pipelines_[size_t(EDRAMLoadStoreMode::kCount)] = {};
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edram_store_pipelines_[size_t(EDRAMLoadStoreMode::kCount)] = {};
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ID3D12PipelineState* edram_tile_sample_32bpp_pipeline_ = nullptr;
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// 32 MB heaps backing used render targets resources, created when needed.
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// 32 MB heaps backing used render targets resources, created when needed.
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// 24 MB proved to be not enough to store a single render target occupying the
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// 24 MB proved to be not enough to store a single render target occupying the
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@ -0,0 +1,59 @@
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#include "edram_load_store.hlsli"
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#include "texture_address.hlsli"
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[numthreads(20, 16, 1)]
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void main(uint3 xe_group_id : SV_GroupID,
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uint3 xe_group_thread_id : SV_GroupThreadID,
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uint3 xe_thread_id : SV_DispatchThreadID) {
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// Check if not outside of the destination texture completely.
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uint4 copy_rect =
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(xe_edram_tile_sample_rect.xyxy >> uint4(0u, 0u, 16u, 16u)) & 0xFFFFu;
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uint2 texel_index = xe_thread_id.xy;
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texel_index.x *= 4u;
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[branch] if (any(texel_index < copy_rect.xy) ||
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any(texel_index >= copy_rect.zw)) {
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return;
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}
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// Get the samples from the EDRAM buffer.
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// XY - log2(pixel size), ZW - selected sample offset.
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uint4 sample_info =
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(xe_edram_tile_sample_dest_info.xxxx >> uint4(15u, 14u, 17u, 16u)) & 1u;
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uint edram_offset = XeEDRAMOffset(
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xe_group_id.xy << sample_info.xy,
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xe_thread_id.xy << (sample_info.xy + uint2(2u, 0u)) + sample_info.zw);
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// At 1x and 2x, this contains samples of 4 pixels. At 4x, this contains
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// samples of 2, need to load 2 more.
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uint4 pixels = xe_edram_load_store_source.Load4(edram_offset);
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[branch] if (sample_info.x != 0u) {
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pixels.xy = pixels.xz;
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pixels.zw = xe_edram_load_store_source.Load3(edram_offset + 16u).xz;
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}
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uint red_blue_swap = xe_edram_tile_sample_dest_info >> 20u;
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if (red_blue_swap != 0u) {
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uint red_mask = (1u << (red_blue_swap & 31u)) - 1u;
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// No need to be ready for a long shift Barney, it's just 16 or 20.
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uint blue_shift = red_blue_swap >> 5u;
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uint blue_mask = red_mask << blue_shift;
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pixels = (pixels & ~(red_mask | blue_mask)) |
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((pixels & red_mask) << blue_shift) |
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((pixels >> blue_shift) & red_mask);
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}
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// Tile the pixels to the shared memory.
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uint4 texel_addresses =
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xe_edram_tile_sample_dest_base +
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XeTextureTiledOffset2D(texel_index - copy_rect.xy,
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xe_edram_tile_sample_dest_info & 16383u, 2u);
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xe_edram_load_store_dest.Store(texel_addresses.x, pixels.x);
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[branch] if (texel_index.x + 1u < copy_rect.z) {
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xe_edram_load_store_dest.Store(texel_addresses.y, pixels.y);
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[branch] if (texel_index.x + 2u < copy_rect.z) {
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xe_edram_load_store_dest.Store(texel_addresses.z, pixels.z);
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[branch] if (texel_index.x + 3u < copy_rect.z) {
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xe_edram_load_store_dest.Store(texel_addresses.w, pixels.w);
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}
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}
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}
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}
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