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[CPU] Added constant propagation pass for: OPCODE_AND_NOT

This commit is contained in:
Gliniak 2022-03-07 08:17:51 +01:00 committed by Triang3l
parent 1887ea0795
commit c5e6352c34
2 changed files with 24 additions and 21 deletions
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6
src/xenia/cpu/backend/x64/x64_sequences.cc
View File

@ -2697,12 +2697,7 @@ EMITTER_OPCODE_TABLE(OPCODE_AND, AND_I8, AND_I16, AND_I32, AND_I64, AND_V128);
template <typename SEQ, typename REG, typename ARGS>
void EmitAndNotXX(X64Emitter& e, const ARGS& i) {
if (i.src1.is_constant) {
if (i.src2.is_constant) {
// Both constants.
e.mov(i.dest, i.src1.constant() & ~i.src2.constant());
} else {
// src1 constant.
// `and` instruction only supports up to 32-bit immediate constants
// 64-bit constants will need a temp register
if (i.dest.reg().getBit() == 64) {
@ -2725,7 +2720,6 @@ void EmitAndNotXX(X64Emitter& e, const ARGS& i) {
e.not_(i.dest);
e.and_(i.dest, uint32_t(i.src1.constant()));
}
}
} else if (i.src2.is_constant) {
// src2 constant.
if (i.dest == i.src1) {

9
src/xenia/cpu/compiler/passes/constant_propagation_pass.cc
View File

@ -648,6 +648,15 @@ bool ConstantPropagationPass::Run(HIRBuilder* builder, bool& result) {
result = true;
}
break;
case OPCODE_AND_NOT:
if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) {
v->set_from(i->src2.value);
v->Not();
v->And(i->src1.value);
i->Remove();
result = true;
}
break;
case OPCODE_OR:
if (i->src1.value->IsConstant() && i->src2.value->IsConstant()) {
v->set_from(i->src1.value);