Fixed shit precision in RECIP, made multiplication codegen less garbage
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364937e836
commit
bfc31f8706
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@ -57,13 +57,13 @@ static const size_t kStashOffset = 32;
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// static const size_t kStashOffsetHigh = 32 + 32;
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const uint32_t X64Emitter::gpr_reg_map_[X64Emitter::GPR_COUNT] = {
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Xbyak::Operand::RBX, Xbyak::Operand::R10, Xbyak::Operand::R11,
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Xbyak::Operand::R12, Xbyak::Operand::R13, Xbyak::Operand::R14,
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Xbyak::Operand::R15,
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Xbyak::Operand::RBX, Xbyak::Operand::R10, Xbyak::Operand::R11,
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Xbyak::Operand::R12, Xbyak::Operand::R13, Xbyak::Operand::R14,
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Xbyak::Operand::R15,
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};
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const uint32_t X64Emitter::xmm_reg_map_[X64Emitter::XMM_COUNT] = {
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4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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};
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X64Emitter::X64Emitter(X64Backend* backend, XbyakAllocator* allocator)
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@ -212,9 +212,8 @@ bool X64Emitter::Emit(HIRBuilder* builder, EmitFunctionInfo& func_info) {
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// Record call history value into slot (guest addr in RDX).
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mov(dword[Xbyak::RegExp(uint32_t(uint64_t(
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low_address(&trace_header->function_caller_history)))) +
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rax * 4],
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edx);
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low_address(&trace_header->function_caller_history)))) +
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rax * 4], edx);
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// Calling thread. Load ax with thread ID.
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EmitGetCurrentThreadId();
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@ -739,9 +738,8 @@ static const vec128_t xmm_consts[] = {
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/* XMMIntMax */ vec128i(INT_MAX),
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/* XMMIntMaxPD */ vec128d(INT_MAX),
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/* XMMPosIntMinPS */ vec128f((float)0x80000000u),
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/* XMMQNaN */ vec128i(0x7FC00000u),
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/*XMMSelectTableBase */vec128i(0),
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/*XMMSelectTableLast*/ vec128i(-1)
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/* XMMQNaN */ vec128i(0x7FC00000u),
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/* XMMOneDouble */ vec128d(1.0)
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};
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// First location to try and place constants.
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@ -780,17 +778,14 @@ void X64Emitter::FreeConstData(uintptr_t data) {
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memory::DeallocFixed(reinterpret_cast<void*>(data), 0,
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memory::DeallocationType::kRelease);
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}
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uintptr_t X64Emitter::GetXmmRawAddress(XmmConst id) {
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return backend_->emitter_data() + sizeof(vec128_t) * id;
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}
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Xbyak::Address X64Emitter::GetXmmConstPtr(XmmConst id) {
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// Load through fixed constant table setup by PlaceConstData.
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// It's important that the pointer is not signed, as it will be sign-extended.
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return ptr[GetXmmRawAddress(id)];
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return ptr[reinterpret_cast<void*>(backend_->emitter_data() +
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sizeof(vec128_t) * id)];
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}
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// Implies possible StashXmm(0, ...)!
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void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, const vec128_t& v) {
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// https://www.agner.org/optimize/optimizing_assembly.pdf
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@ -804,10 +799,10 @@ void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, const vec128_t& v) {
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} else {
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for(unsigned i = 0; i < (kConstDataSize / sizeof(vec128_t)); ++i) {
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if(xmm_consts[i] == v) {
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vmovapd(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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if(xmm_consts[i] == v) {
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vmovapd(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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}
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// TODO(benvanik): see what other common values are.
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// TODO(benvanik): build constant table - 99% are reused.
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@ -832,15 +827,13 @@ void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, float v) {
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// TODO(benvanik): see what other common values are.
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// TODO(benvanik): build constant table - 99% are reused.
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unsigned raw_bits =*reinterpret_cast<unsigned*>(&v);
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for (unsigned i = 0; i < (kConstDataSize / sizeof(vec128_t)); ++i) {
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if(xmm_consts[i].u32[0] == raw_bits) {
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vmovss(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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if(xmm_consts[i].u32[0] == raw_bits) {
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vmovss(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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}
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mov(eax, x.i);
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@ -867,11 +860,10 @@ void X64Emitter::LoadConstantXmm(Xbyak::Xmm dest, double v) {
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uint64_t raw_bits = *reinterpret_cast<uint64_t*>(&v);
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for (unsigned i = 0; i < (kConstDataSize / sizeof(vec128_t)); ++i) {
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if(xmm_consts[i].u64[0] == raw_bits) {
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vmovsd(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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if(xmm_consts[i].u64[0] == raw_bits) {
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vmovsd(dest, GetXmmConstPtr((XmmConst)i));
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return;
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}
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}
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mov(rax, x.i);
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vmovq(dest, rax);
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@ -114,8 +114,7 @@ enum XmmConst {
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XMMIntMaxPD,
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XMMPosIntMinPS,
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XMMQNaN,
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XMMSelectTableBase,
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XMMSelectTableLast,
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XMMOneDouble
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};
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// Unfortunately due to the design of xbyak we have to pass this to the ctor.
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@ -212,7 +211,6 @@ class X64Emitter : public Xbyak::CodeGenerator {
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void MovMem64(const Xbyak::RegExp& addr, uint64_t v);
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Xbyak::Address GetXmmConstPtr(XmmConst id);
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uintptr_t GetXmmRawAddress(XmmConst id);
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void LoadConstantXmm(Xbyak::Xmm dest, float v);
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void LoadConstantXmm(Xbyak::Xmm dest, double v);
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void LoadConstantXmm(Xbyak::Xmm dest, const vec128_t& v);
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@ -175,7 +175,7 @@ struct ZERO_EXTEND_I32_I8
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struct ZERO_EXTEND_I64_I8
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: Sequence<ZERO_EXTEND_I64_I8, I<OPCODE_ZERO_EXTEND, I64Op, I8Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.movzx(i.dest, i.src1);
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e.movzx(i.dest.reg().cvt32(), i.src1);
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}
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};
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struct ZERO_EXTEND_I32_I16
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@ -187,7 +187,7 @@ struct ZERO_EXTEND_I32_I16
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struct ZERO_EXTEND_I64_I16
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: Sequence<ZERO_EXTEND_I64_I16, I<OPCODE_ZERO_EXTEND, I64Op, I16Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.movzx(i.dest, i.src1);
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e.movzx(i.dest.reg().cvt32(), i.src1);
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}
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};
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struct ZERO_EXTEND_I64_I32
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@ -1323,6 +1323,19 @@ EMITTER_OPCODE_TABLE(OPCODE_SUB, SUB_I8, SUB_I16, SUB_I32, SUB_I64, SUB_F32,
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// We exploit mulx here to avoid creating too much register pressure.
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struct MUL_I8 : Sequence<MUL_I8, I<OPCODE_MUL, I8Op, I8Op, I8Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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if(i.src1.is_constant || i.src2.is_constant ) {
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uint64_t cval =i.src1.is_constant ? i.src1.constant() : i.src2.constant();
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if(cval < (1ull<<32)) {
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auto& whichevs = i.src1.is_constant ? i.src2 : i.src1;
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e.imul(i.dest, whichevs, (int)cval);
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return;
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}
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}
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if (e.IsFeatureEnabled(kX64EmitBMI2)) {
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// mulx: $1:$2 = EDX * $3
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@ -1364,6 +1377,19 @@ struct MUL_I8 : Sequence<MUL_I8, I<OPCODE_MUL, I8Op, I8Op, I8Op>> {
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};
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struct MUL_I16 : Sequence<MUL_I16, I<OPCODE_MUL, I16Op, I16Op, I16Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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if(i.src1.is_constant || i.src2.is_constant ) {
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uint64_t cval =i.src1.is_constant ? i.src1.constant() : i.src2.constant();
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if(cval < (1ull<<32)) {
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auto& whichevs = i.src1.is_constant ? i.src2 : i.src1;
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e.imul(i.dest, whichevs, (int)cval);
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return;
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}
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}
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if (e.IsFeatureEnabled(kX64EmitBMI2)) {
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// mulx: $1:$2 = EDX * $3
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@ -1412,6 +1438,20 @@ struct MUL_I32 : Sequence<MUL_I32, I<OPCODE_MUL, I32Op, I32Op, I32Op>> {
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return;
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}
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}
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if(i.src1.is_constant || i.src2.is_constant ) {
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uint64_t cval =i.src1.is_constant ? i.src1.constant() : i.src2.constant();
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if(cval < (1ull<<32)) {
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auto& whichevs = i.src1.is_constant ? i.src2 : i.src1;
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e.imul(i.dest, whichevs, (int)cval);
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return;
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}
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}
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if (e.IsFeatureEnabled(kX64EmitBMI2)) {
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// mulx: $1:$2 = EDX * $3
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@ -1462,6 +1502,21 @@ struct MUL_I64 : Sequence<MUL_I64, I<OPCODE_MUL, I64Op, I64Op, I64Op>> {
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return;
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}
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}
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if(i.src1.is_constant || i.src2.is_constant ) {
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uint64_t cval =i.src1.is_constant ? i.src1.constant() : i.src2.constant();
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if(cval < (1ull<<32)) {
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auto& whichevs = i.src1.is_constant ? i.src2 : i.src1;
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e.imul(i.dest, whichevs, (int)cval);
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return;
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}
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}
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if (e.IsFeatureEnabled(kX64EmitBMI2)) {
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// mulx: $1:$2 = RDX * $3
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@ -2470,9 +2525,14 @@ struct RSQRT_F32 : Sequence<RSQRT_F32, I<OPCODE_RSQRT, F32Op, F32Op>> {
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};
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struct RSQRT_F64 : Sequence<RSQRT_F64, I<OPCODE_RSQRT, F64Op, F64Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.vcvtsd2ss(i.dest, i.src1);
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/*e.vcvtsd2ss(i.dest, i.src1);
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e.vrsqrtss(i.dest, i.dest);
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e.vcvtss2sd(i.dest, i.dest);
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e.vcvtss2sd(i.dest, i.dest);*/
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e.vmovsd(e.xmm0, e.GetXmmConstPtr(XmmConst::XMMOneDouble));
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e.vsqrtsd(i.dest, i.src1);
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e.vdivsd(i.dest, e.xmm0, i.dest);
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}
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};
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struct RSQRT_V128 : Sequence<RSQRT_V128, I<OPCODE_RSQRT, V128Op, V128Op>> {
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@ -2492,9 +2552,11 @@ struct RECIP_F32 : Sequence<RECIP_F32, I<OPCODE_RECIP, F32Op, F32Op>> {
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};
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struct RECIP_F64 : Sequence<RECIP_F64, I<OPCODE_RECIP, F64Op, F64Op>> {
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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e.vcvtsd2ss(i.dest, i.src1);
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/*e.vcvtsd2ss(i.dest, i.src1);
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e.vrcpss(i.dest, i.dest);
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e.vcvtss2sd(i.dest, i.dest);
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e.vcvtss2sd(i.dest, i.dest);*/
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e.vmovsd(e.xmm0, e.GetXmmConstPtr(XmmConst::XMMOneDouble));
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e.vdivsd(i.dest, e.xmm0, i.src1);
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}
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};
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struct RECIP_V128 : Sequence<RECIP_V128, I<OPCODE_RECIP, V128Op, V128Op>> {
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