From b750875e9d1cc25ab00bdcf09ca18598f657c710 Mon Sep 17 00:00:00 2001 From: Ben Vanik Date: Sat, 21 Nov 2015 19:07:07 -0800 Subject: [PATCH] Fixing style. --- src/xenia/gpu/command_processor.cc | 7 ++++--- src/xenia/gpu/command_processor.h | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/xenia/gpu/command_processor.cc b/src/xenia/gpu/command_processor.cc index e261b6b12..ced5a53db 100644 --- a/src/xenia/gpu/command_processor.cc +++ b/src/xenia/gpu/command_processor.cc @@ -596,7 +596,8 @@ bool CommandProcessor::ExecutePacketType3(RingbufferReader* reader, break; default: - XELOGGPU("Not Implemented GPU OPCODE: 0x%X\t\tCOUNT: %d\n", opcode, count); + XELOGGPU("Not Implemented GPU OPCODE: 0x%X\t\tCOUNT: %d\n", opcode, + count); reader->Skip(count); break; } @@ -792,8 +793,8 @@ bool CommandProcessor::ExecutePacketType3_REG_RMW(RingbufferReader* reader, } bool CommandProcessor::ExecutePacketType3_REG_TO_MEM(RingbufferReader* reader, - uint32_t packet, - uint32_t count) { + uint32_t packet, + uint32_t count) { // Copy Register to Memory (?) // Count is 2, assuming a Register Addr and a Memory Addr. diff --git a/src/xenia/gpu/command_processor.h b/src/xenia/gpu/command_processor.h index 95d526189..55e0a4d12 100644 --- a/src/xenia/gpu/command_processor.h +++ b/src/xenia/gpu/command_processor.h @@ -137,7 +137,7 @@ class CommandProcessor { bool ExecutePacketType3_REG_RMW(RingbufferReader* reader, uint32_t packet, uint32_t count); bool ExecutePacketType3_REG_TO_MEM(RingbufferReader* reader, uint32_t packet, - uint32_t count); + uint32_t count); bool ExecutePacketType3_COND_WRITE(RingbufferReader* reader, uint32_t packet, uint32_t count); bool ExecutePacketType3_EVENT_WRITE(RingbufferReader* reader, uint32_t packet,