PipelineCache: Better stencil support, and allow null pixel shaders.
This commit is contained in:
parent
a065120793
commit
b478408dfb
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@ -27,6 +27,7 @@ namespace vulkan {
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using xe::ui::vulkan::CheckResult;
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// Generated with `xenia-build genspirv`.
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#include "xenia/gpu/vulkan/shaders/bin/dummy_frag.h"
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#include "xenia/gpu/vulkan/shaders/bin/line_quad_list_geom.h"
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#include "xenia/gpu/vulkan/shaders/bin/point_list_geom.h"
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#include "xenia/gpu/vulkan/shaders/bin/quad_list_geom.h"
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@ -113,6 +114,13 @@ PipelineCache::PipelineCache(
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err = vkCreateShaderModule(device_, &shader_module_info, nullptr,
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&geometry_shaders_.rect_list);
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CheckResult(err, "vkCreateShaderModule");
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shader_module_info.codeSize = static_cast<uint32_t>(sizeof(dummy_frag));
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shader_module_info.pCode = reinterpret_cast<const uint32_t*>(dummy_frag);
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err = vkCreateShaderModule(device_, &shader_module_info, nullptr,
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&dummy_pixel_shader_);
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// We can also use the GLSL translator with a Vulkan dialect.
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shader_translator_.reset(new SpirvShaderTranslator());
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}
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PipelineCache::~PipelineCache() {
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@ -127,6 +135,7 @@ PipelineCache::~PipelineCache() {
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vkDestroyShaderModule(device_, geometry_shaders_.point_list, nullptr);
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vkDestroyShaderModule(device_, geometry_shaders_.quad_list, nullptr);
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vkDestroyShaderModule(device_, geometry_shaders_.rect_list, nullptr);
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vkDestroyShaderModule(device_, dummy_pixel_shader_, nullptr);
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vkDestroyPipelineLayout(device_, pipeline_layout_, nullptr);
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vkDestroyPipelineCache(device_, pipeline_cache_, nullptr);
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@ -261,9 +270,12 @@ VkPipeline PipelineCache::GetPipeline(const RenderState* render_state,
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pipeline_info.basePipelineHandle = nullptr;
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pipeline_info.basePipelineIndex = -1;
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VkPipeline pipeline = nullptr;
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auto err = vkCreateGraphicsPipelines(device_, pipeline_cache_, 1,
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auto result = vkCreateGraphicsPipelines(device_, pipeline_cache_, 1,
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&pipeline_info, nullptr, &pipeline);
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CheckResult(err, "vkCreateGraphicsPipelines");
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if (result != VK_SUCCESS) {
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XELOGE("vkCreateGraphicsPipelines failed with code %d", result);
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return nullptr;
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}
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// Dump shader disassembly.
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if (FLAGS_vulkan_dump_disasm) {
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@ -280,7 +292,7 @@ bool PipelineCache::TranslateShader(VulkanShader* shader,
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xenos::xe_gpu_program_cntl_t cntl) {
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// Perform translation.
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// If this fails the shader will be marked as invalid and ignored later.
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if (!shader_translator_.Translate(shader, cntl)) {
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if (!shader_translator_->Translate(shader, cntl)) {
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XELOGE("Shader translation failed; marking shader as ignored");
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return false;
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}
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@ -392,6 +404,7 @@ void PipelineCache::DumpShaderDisasmNV(
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disasm_fp.c_str());
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}
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vkDestroyPipeline(device_, dummy_pipeline, nullptr);
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vkDestroyPipelineCache(device_, dummy_pipeline_cache, nullptr);
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}
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@ -529,9 +542,6 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer,
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VkViewport viewport_rect;
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std::memset(&viewport_rect, 0, sizeof(VkViewport));
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viewport_rect.minDepth = 0;
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viewport_rect.maxDepth = 1;
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if (vport_xscale_enable) {
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float texel_offset_x = 0.0f;
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float texel_offset_y = 0.0f;
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@ -549,10 +559,6 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer,
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viewport_rect.y = vpy + texel_offset_y;
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viewport_rect.width = vpw;
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viewport_rect.height = vph;
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// TODO(benvanik): depth range adjustment?
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// float voz = vport_zoffset_enable ? regs.pa_cl_vport_zoffset : 0;
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// float vsz = vport_zscale_enable ? regs.pa_cl_vport_zscale : 1;
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} else {
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float texel_offset_x = 0.0f;
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float texel_offset_y = 0.0f;
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@ -569,6 +575,8 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer,
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float vsz = vport_zscale_enable ? regs.pa_cl_vport_zscale : 1;
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viewport_rect.minDepth = voz;
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viewport_rect.maxDepth = voz + vsz;
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assert_true(viewport_rect.minDepth >= 0 && viewport_rect.minDepth <= 1);
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assert_true(viewport_rect.maxDepth >= -1 && viewport_rect.maxDepth <= 1);
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vkCmdSetViewport(command_buffer, 0, 1, &viewport_rect);
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}
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@ -587,24 +595,25 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer,
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vkCmdSetBlendConstants(command_buffer, regs.rb_blend_rgba);
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}
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if (full_update) {
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// VK_DYNAMIC_STATE_LINE_WIDTH
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vkCmdSetLineWidth(command_buffer, 1.0f);
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// VK_DYNAMIC_STATE_DEPTH_BIAS
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vkCmdSetDepthBias(command_buffer, 0.0f, 0.0f, 0.0f);
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// VK_DYNAMIC_STATE_DEPTH_BOUNDS
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vkCmdSetDepthBounds(command_buffer, 0.0f, 1.0f);
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// VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK
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vkCmdSetStencilCompareMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, 0);
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bool stencil_state_dirty = full_update;
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stencil_state_dirty |=
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SetShadowRegister(®s.rb_stencilrefmask, XE_GPU_REG_RB_STENCILREFMASK);
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if (stencil_state_dirty) {
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uint32_t stencil_ref = (regs.rb_stencilrefmask & 0xFF);
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uint32_t stencil_read_mask = (regs.rb_stencilrefmask >> 8) & 0xFF;
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uint32_t stencil_write_mask = (regs.rb_stencilrefmask >> 16) & 0xFF;
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// VK_DYNAMIC_STATE_STENCIL_REFERENCE
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vkCmdSetStencilReference(command_buffer, VK_STENCIL_FRONT_AND_BACK, 0);
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vkCmdSetStencilReference(command_buffer, VK_STENCIL_FRONT_AND_BACK,
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stencil_ref);
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// VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK
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vkCmdSetStencilCompareMask(command_buffer, VK_STENCIL_FRONT_AND_BACK,
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stencil_read_mask);
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// VK_DYNAMIC_STATE_STENCIL_WRITE_MASK
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vkCmdSetStencilWriteMask(command_buffer, VK_STENCIL_FRONT_AND_BACK, 0);
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vkCmdSetStencilWriteMask(command_buffer, VK_STENCIL_FRONT_AND_BACK,
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stencil_write_mask);
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}
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bool push_constants_dirty = full_update || viewport_state_dirty;
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@ -676,6 +685,17 @@ bool PipelineCache::SetDynamicState(VkCommandBuffer command_buffer,
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kSpirvPushConstantsSize, &push_constants);
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}
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if (full_update) {
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// VK_DYNAMIC_STATE_LINE_WIDTH
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vkCmdSetLineWidth(command_buffer, 1.0f);
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// VK_DYNAMIC_STATE_DEPTH_BIAS
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vkCmdSetDepthBias(command_buffer, 0.0f, 0.0f, 0.0f);
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// VK_DYNAMIC_STATE_DEPTH_BOUNDS
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vkCmdSetDepthBounds(command_buffer, 0.0f, 1.0f);
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}
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return true;
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}
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@ -775,7 +795,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateShaderStages(
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return UpdateStatus::kError;
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}
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if (!pixel_shader->is_translated() &&
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if (pixel_shader && !pixel_shader->is_translated() &&
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!TranslateShader(pixel_shader, sq_program_cntl)) {
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XELOGE("Failed to translate the pixel shader!");
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return UpdateStatus::kError;
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@ -822,7 +842,8 @@ PipelineCache::UpdateStatus PipelineCache::UpdateShaderStages(
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pixel_pipeline_stage.pNext = nullptr;
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pixel_pipeline_stage.flags = 0;
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pixel_pipeline_stage.stage = VK_SHADER_STAGE_FRAGMENT_BIT;
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pixel_pipeline_stage.module = pixel_shader->shader_module();
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pixel_pipeline_stage.module =
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pixel_shader ? pixel_shader->shader_module() : dummy_pixel_shader_;
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pixel_pipeline_stage.pName = "main";
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pixel_pipeline_stage.pSpecializationInfo = nullptr;
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@ -1051,6 +1072,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
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bool dirty = false;
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dirty |= regs.primitive_type != primitive_type;
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dirty |= SetShadowRegister(®s.pa_cl_clip_cntl, XE_GPU_REG_PA_CL_CLIP_CNTL);
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dirty |= SetShadowRegister(®s.pa_su_sc_mode_cntl,
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XE_GPU_REG_PA_SU_SC_MODE_CNTL);
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dirty |= SetShadowRegister(®s.pa_sc_screen_scissor_tl,
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@ -1070,14 +1092,14 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
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state_info.pNext = nullptr;
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state_info.flags = 0;
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// TODO(benvanik): right setting?
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state_info.depthClampEnable = VK_FALSE;
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state_info.rasterizerDiscardEnable = VK_FALSE;
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// ZCLIP_NEAR_DISABLE
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// state_info.depthClampEnable = !(regs.pa_cl_clip_cntl & (1 << 26));
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// RASTERIZER_DISABLE
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// state_info.rasterizerDiscardEnable = !!(regs.pa_cl_clip_cntl & (1 << 22));
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// KILL_PIX_POST_EARLY_Z
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if (regs.pa_sc_viz_query & 0x80) {
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state_info.rasterizerDiscardEnable = VK_TRUE;
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}
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// CLIP_DISABLE
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state_info.depthClampEnable = !!(regs.pa_cl_clip_cntl & (1 << 16));
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state_info.rasterizerDiscardEnable = VK_FALSE;
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bool poly_mode = ((regs.pa_su_sc_mode_cntl >> 3) & 0x3) != 0;
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if (poly_mode) {
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@ -1213,11 +1235,11 @@ PipelineCache::UpdateStatus PipelineCache::UpdateDepthStencilState() {
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/* 0 */ VK_STENCIL_OP_KEEP,
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/* 1 */ VK_STENCIL_OP_ZERO,
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/* 2 */ VK_STENCIL_OP_REPLACE,
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/* 3 */ VK_STENCIL_OP_INCREMENT_AND_WRAP,
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/* 4 */ VK_STENCIL_OP_DECREMENT_AND_WRAP,
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/* 3 */ VK_STENCIL_OP_INCREMENT_AND_CLAMP,
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/* 4 */ VK_STENCIL_OP_DECREMENT_AND_CLAMP,
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/* 5 */ VK_STENCIL_OP_INVERT,
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/* 6 */ VK_STENCIL_OP_INCREMENT_AND_CLAMP,
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/* 7 */ VK_STENCIL_OP_DECREMENT_AND_CLAMP,
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/* 6 */ VK_STENCIL_OP_INCREMENT_AND_WRAP,
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/* 7 */ VK_STENCIL_OP_DECREMENT_AND_WRAP,
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};
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// Depth state
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@ -1230,9 +1252,6 @@ PipelineCache::UpdateStatus PipelineCache::UpdateDepthStencilState() {
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compare_func_map[(regs.rb_depthcontrol >> 4) & 0x7];
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state_info.depthBoundsTestEnable = VK_FALSE;
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uint32_t stencil_ref = (regs.rb_stencilrefmask & 0x000000FF);
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uint32_t stencil_read_mask = (regs.rb_stencilrefmask & 0x0000FF00) >> 8;
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// Stencil state
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state_info.front.compareOp =
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compare_func_map[(regs.rb_depthcontrol >> 8) & 0x7];
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@ -14,6 +14,7 @@
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#include "third_party/xxhash/xxhash.h"
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#include "xenia/gpu/glsl_shader_translator.h"
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#include "xenia/gpu/register_file.h"
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#include "xenia/gpu/spirv_shader_translator.h"
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#include "xenia/gpu/vulkan/render_cache.h"
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@ -87,7 +88,7 @@ class PipelineCache {
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VkDevice device_ = nullptr;
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// Reusable shader translator.
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SpirvShaderTranslator shader_translator_;
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std::unique_ptr<ShaderTranslator> shader_translator_ = nullptr;
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// Disassembler used to get the SPIRV disasm. Only used in debug.
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xe::ui::spirv::SpirvDisassembler disassembler_;
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// All loaded shaders mapped by their guest hash key.
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@ -108,6 +109,9 @@ class PipelineCache {
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VkShaderModule rect_list;
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} geometry_shaders_;
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// Shared dummy pixel shader.
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VkShaderModule dummy_pixel_shader_;
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// Hash state used to incrementally produce pipeline hashes during update.
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// By the time the full update pass has run the hash will represent the
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// current state in a way that can uniquely identify the produced VkPipeline.
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@ -211,6 +215,7 @@ class PipelineCache {
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struct UpdateRasterizationStateRegisters {
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PrimitiveType primitive_type;
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uint32_t pa_cl_clip_cntl;
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uint32_t pa_su_sc_mode_cntl;
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uint32_t pa_sc_screen_scissor_tl;
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uint32_t pa_sc_screen_scissor_br;
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@ -270,6 +275,7 @@ class PipelineCache {
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float pa_cl_vport_zscale;
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float rb_blend_rgba[4];
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uint32_t rb_stencilrefmask;
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uint32_t sq_program_cntl;
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uint32_t sq_context_misc;
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@ -0,0 +1,152 @@
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// generated from `xb genspirv`
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// source: dummy.frag
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const uint8_t dummy_frag[] = {
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0x03, 0x02, 0x23, 0x07, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x08, 0x00,
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0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00,
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0x01, 0x00, 0x00, 0x00, 0x11, 0x00, 0x02, 0x00, 0x2B, 0x00, 0x00, 0x00,
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0x0B, 0x00, 0x06, 0x00, 0x01, 0x00, 0x00, 0x00, 0x47, 0x4C, 0x53, 0x4C,
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0x2E, 0x73, 0x74, 0x64, 0x2E, 0x34, 0x35, 0x30, 0x00, 0x00, 0x00, 0x00,
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0x0E, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
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0x0F, 0x00, 0x07, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
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0x6D, 0x61, 0x69, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x2F, 0x00, 0x00, 0x00,
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0x33, 0x00, 0x00, 0x00, 0x10, 0x00, 0x03, 0x00, 0x04, 0x00, 0x00, 0x00,
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0x07, 0x00, 0x00, 0x00, 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00,
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0xC2, 0x01, 0x00, 0x00, 0x05, 0x00, 0x04, 0x00, 0x04, 0x00, 0x00, 0x00,
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0x6D, 0x61, 0x69, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x05, 0x00,
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0x10, 0x00, 0x00, 0x00, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x73, 0x5F, 0x74,
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0x79, 0x70, 0x65, 0x00, 0x06, 0x00, 0x07, 0x00, 0x10, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x66, 0x6C, 0x6F, 0x61, 0x74, 0x5F, 0x63, 0x6F,
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0x6E, 0x73, 0x74, 0x73, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x06, 0x00,
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0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x6C, 0x6F, 0x6F, 0x70,
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0x5F, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x73, 0x00, 0x06, 0x00, 0x06, 0x00,
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0x10, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x62, 0x6F, 0x6F, 0x6C,
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0x5F, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x73, 0x00, 0x05, 0x00, 0x04, 0x00,
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0x12, 0x00, 0x00, 0x00, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x73, 0x00, 0x00,
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0x05, 0x00, 0x07, 0x00, 0x13, 0x00, 0x00, 0x00, 0x70, 0x75, 0x73, 0x68,
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0x5F, 0x63, 0x6F, 0x6E, 0x73, 0x74, 0x73, 0x5F, 0x74, 0x79, 0x70, 0x65,
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0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x07, 0x00, 0x13, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x77, 0x69, 0x6E, 0x64, 0x6F, 0x77, 0x5F, 0x73,
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0x63, 0x61, 0x6C, 0x65, 0x00, 0x00, 0x00, 0x00, 0x06, 0x00, 0x05, 0x00,
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0x13, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x76, 0x74, 0x78, 0x5F,
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0x66, 0x6D, 0x74, 0x00, 0x06, 0x00, 0x06, 0x00, 0x13, 0x00, 0x00, 0x00,
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0x02, 0x00, 0x00, 0x00, 0x61, 0x6C, 0x70, 0x68, 0x61, 0x5F, 0x74, 0x65,
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0x73, 0x74, 0x00, 0x00, 0x06, 0x00, 0x07, 0x00, 0x13, 0x00, 0x00, 0x00,
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0x03, 0x00, 0x00, 0x00, 0x70, 0x73, 0x5F, 0x70, 0x61, 0x72, 0x61, 0x6D,
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0x5F, 0x67, 0x65, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x06, 0x00,
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0x15, 0x00, 0x00, 0x00, 0x70, 0x75, 0x73, 0x68, 0x5F, 0x63, 0x6F, 0x6E,
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0x73, 0x74, 0x61, 0x6E, 0x74, 0x73, 0x00, 0x00, 0x05, 0x00, 0x05, 0x00,
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0x1A, 0x00, 0x00, 0x00, 0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x73,
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0x31, 0x44, 0x00, 0x00, 0x05, 0x00, 0x05, 0x00, 0x1F, 0x00, 0x00, 0x00,
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0x74, 0x65, 0x78, 0x74, 0x75, 0x72, 0x65, 0x73, 0x32, 0x44, 0x00, 0x00,
|
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};
|
|
@ -0,0 +1,105 @@
|
|||
; SPIR-V
|
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; Version: 1.0
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|
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|
||||
%43 = OpTypeArray %8 %42
|
||||
%44 = OpConstant %9 1
|
||||
%45 = OpTypeArray %43 %44
|
||||
%46 = OpTypePointer Input %45
|
||||
%47 = OpVariable %46 Input
|
||||
%48 = OpConstant %9 4
|
||||
%49 = OpTypeArray %8 %48
|
||||
%50 = OpTypePointer Output %49
|
||||
%51 = OpVariable %50 Output
|
||||
%4 = OpFunction %2 None %3
|
||||
%5 = OpLabel
|
||||
OpReturn
|
||||
OpFunctionEnd
|
|
@ -0,0 +1,31 @@
|
|||
// NOTE: This file is compiled and embedded into the exe.
|
||||
// Use `xenia-build genspirv` and check in any changes under bin/.
|
||||
|
||||
#version 450 core
|
||||
#extension all : warn
|
||||
|
||||
layout(set = 0, binding = 1) uniform consts_type {
|
||||
vec4 float_consts[512];
|
||||
uint loop_consts[32];
|
||||
uint bool_consts[8];
|
||||
} consts;
|
||||
|
||||
layout(push_constant) uniform push_consts_type {
|
||||
vec4 window_scale;
|
||||
vec4 vtx_fmt;
|
||||
vec4 alpha_test;
|
||||
uint ps_param_gen;
|
||||
} push_constants;
|
||||
|
||||
layout(set = 1, binding = 0) uniform sampler1D textures1D[32];
|
||||
layout(set = 1, binding = 1) uniform sampler2D textures2D[32];
|
||||
layout(set = 1, binding = 2) uniform sampler3D textures3D[32];
|
||||
layout(set = 1, binding = 3) uniform samplerCube textures4D[32];
|
||||
|
||||
layout(location = 0) in vec4 in_interpolators[][16];
|
||||
layout(location = 0) out vec4 oC[4];
|
||||
|
||||
void main() {
|
||||
// This shader does absolutely nothing!
|
||||
return;
|
||||
}
|
Loading…
Reference in New Issue