Merge pull request #718 from parkerlamb/disasm_fixes

PPC disassembly fixes
This commit is contained in:
Justin Moore 2017-06-25 13:01:19 -05:00 committed by GitHub
commit a2fb0a06fe
4 changed files with 8 additions and 3 deletions

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@ -86,6 +86,7 @@ struct PPCDecodeData {
union { union {
uint32_t value_; uint32_t value_;
struct { struct {
uint32_t : 2;
uint32_t DS : 14; uint32_t DS : 14;
uint32_t RA : 5; uint32_t RA : 5;
uint32_t RT : 5; uint32_t RT : 5;

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@ -1689,9 +1689,9 @@ void PrintDisasm_mtmsrd(const PPCDecodeData& d, StringBuffer* str) {
str->AppendFormat("r%d", d.X.RS()); str->AppendFormat("r%d", d.X.RS());
} }
void PrintDisasm_mtspr(const PPCDecodeData& d, StringBuffer* str) { void PrintDisasm_mtspr(const PPCDecodeData& d, StringBuffer* str) {
// mtmspr [SPR], [RS] // mtspr [SPR], [RS]
size_t str_start = str->length(); size_t str_start = str->length();
str->Append("mtmspr"); str->Append("mtspr");
PadStringBuffer(str, str_start, kNamePad); PadStringBuffer(str, str_start, kNamePad);
str->AppendFormat("%d", d.XFX.SPR()); str->AppendFormat("%d", d.XFX.SPR());
str->Append(", "); str->Append(", ");

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@ -908,7 +908,7 @@
<insn mnem="mtspr" opcode="7c0003a6" form="XFX" group="c" desc="Move to Special-Purpose Register"> <insn mnem="mtspr" opcode="7c0003a6" form="XFX" group="c" desc="Move to Special-Purpose Register">
<in field="RS" /> <in field="RS" />
<out field="SPR" /> <out field="SPR" />
<disasm>mtmspr [SPR], [RS]</disasm> <disasm>mtspr [SPR], [RS]</disasm>
</insn> </insn>
<insn mnem="mulhdx" opcode="7c000092" form="XO" group="i" desc="Multiply High Doubleword"> <insn mnem="mulhdx" opcode="7c000092" form="XO" group="i" desc="Multiply High Doubleword">
<in field="RA" /> <in field="RA" />

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@ -137,6 +137,7 @@ def generate_opcodes(insns):
w0('#define XENIA_CPU_PPC_PPC_OPCODE_H_') w0('#define XENIA_CPU_PPC_PPC_OPCODE_H_')
w0('') w0('')
w0('#include <cstdint>') w0('#include <cstdint>')
w0('#include <cstdlib>')
w0('') w0('')
w0('namespace xe {') w0('namespace xe {')
w0('namespace cpu {') w0('namespace cpu {')
@ -176,6 +177,7 @@ def generate_table(insns):
w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0])) w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0]))
w0('// clang-format off') w0('// clang-format off')
w0('#include <cstdint>') w0('#include <cstdint>')
w0('#include <cstdlib>')
w0('') w0('')
w0('#include "xenia/base/assert.h"') w0('#include "xenia/base/assert.h"')
w0('#include "xenia/cpu/ppc/ppc_opcode.h"') w0('#include "xenia/cpu/ppc/ppc_opcode.h"')
@ -279,6 +281,7 @@ def generate_disasm(insns):
w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0])) w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0]))
w0('// clang-format off') w0('// clang-format off')
w0('#include <cstdint>') w0('#include <cstdint>')
w0('#include <cstdlib>')
w0('') w0('')
w0('#include "xenia/base/assert.h"') w0('#include "xenia/base/assert.h"')
w0('#include "xenia/cpu/ppc/ppc_decode_data.h"') w0('#include "xenia/cpu/ppc/ppc_decode_data.h"')
@ -410,6 +413,7 @@ def generate_lookup(insns):
w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0])) w0('// This code was autogenerated by %s. Do not modify!' % (sys.argv[0]))
w0('// clang-format off') w0('// clang-format off')
w0('#include <cstdint>') w0('#include <cstdint>')
w0('#include <cstdlib>')
w0('') w0('')
w0('#include "xenia/base/assert.h"') w0('#include "xenia/base/assert.h"')
w0('#include "xenia/cpu/ppc/ppc_opcode.h"') w0('#include "xenia/cpu/ppc/ppc_opcode.h"')