So few (faked) registers seems to break some things.

This commit is contained in:
Ben Vanik 2014-02-15 15:49:41 -08:00
parent b2f886be98
commit 86f66c4ab7
1 changed files with 2 additions and 2 deletions

View File

@ -38,14 +38,14 @@ int IVMBackend::Initialize() {
0, 0,
"gpr", "gpr",
MachineInfo::RegisterSet::INT_TYPES, MachineInfo::RegisterSet::INT_TYPES,
6, 16,
}; };
machine_info_.register_sets[1] = { machine_info_.register_sets[1] = {
1, 1,
"vec", "vec",
MachineInfo::RegisterSet::FLOAT_TYPES | MachineInfo::RegisterSet::FLOAT_TYPES |
MachineInfo::RegisterSet::VEC_TYPES, MachineInfo::RegisterSet::VEC_TYPES,
6, 16,
}; };
alloy::tracing::WriteEvent(EventType::Init({ alloy::tracing::WriteEvent(EventType::Init({