Fixing order of MULADDv.
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271abbf874
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@ -874,12 +874,11 @@ int TranslateALU_MULADDv(
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ctx.output->append("saturate(");
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}
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ctx.output->append("mad(");
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// TODO(benvanik): verify correct - may be 1,2,3 for (1*2+3)
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AppendSrcReg(ctx, alu.src1_reg, alu.src1_sel, alu.src1_swiz, alu.src1_reg_negate, alu.src1_reg_abs);
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ctx.output->append(", ");
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AppendSrcReg(ctx, alu.src2_reg, alu.src2_sel, alu.src2_swiz, alu.src2_reg_negate, alu.src2_reg_abs);
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ctx.output->append(", ");
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AppendSrcReg(ctx, alu.src3_reg, alu.src3_sel, alu.src3_swiz, alu.src3_reg_negate, alu.src3_reg_abs);
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ctx.output->append(", ");
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AppendSrcReg(ctx, alu.src1_reg, alu.src1_sel, alu.src1_swiz, alu.src1_reg_negate, alu.src1_reg_abs);
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ctx.output->append(")");
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if (alu.vector_clamp) {
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ctx.output->append(")");
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